| 1 | /* Generated automatically by the program `genattrtab' |
| 2 | from the machine description file `md'. */ |
| 3 | |
| 4 | #include "config.h" |
| 5 | #include "system.h" |
| 6 | #include "coretypes.h" |
| 7 | #include "backend.h" |
| 8 | #include "predict.h" |
| 9 | #include "tree.h" |
| 10 | #include "rtl.h" |
| 11 | #include "alias.h" |
| 12 | #include "options.h" |
| 13 | #include "varasm.h" |
| 14 | #include "stor-layout.h" |
| 15 | #include "calls.h" |
| 16 | #include "insn-attr.h" |
| 17 | #include "memmodel.h" |
| 18 | #include "tm_p.h" |
| 19 | #include "insn-config.h" |
| 20 | #include "recog.h" |
| 21 | #include "regs.h" |
| 22 | #include "real.h" |
| 23 | #include "output.h" |
| 24 | #include "toplev.h" |
| 25 | #include "flags.h" |
| 26 | #include "emit-rtl.h" |
| 27 | |
| 28 | #define operands recog_data.operand |
| 29 | |
| 30 | extern int insn_default_latency_znver1 (rtx_insn *); |
| 31 | extern int insn_default_latency_btver2 (rtx_insn *); |
| 32 | extern int insn_default_latency_bdver4 (rtx_insn *); |
| 33 | extern int insn_default_latency_bdver3 (rtx_insn *); |
| 34 | extern int insn_default_latency_bdver2 (rtx_insn *); |
| 35 | extern int insn_default_latency_bdver1 (rtx_insn *); |
| 36 | extern int insn_default_latency_amdfam10 (rtx_insn *); |
| 37 | extern int insn_default_latency_generic (rtx_insn *); |
| 38 | extern int insn_default_latency_haswell (rtx_insn *); |
| 39 | extern int insn_default_latency_slm (rtx_insn *); |
| 40 | extern int insn_default_latency_atom (rtx_insn *); |
| 41 | extern int insn_default_latency_nehalem (rtx_insn *); |
| 42 | extern int insn_default_latency_core2 (rtx_insn *); |
| 43 | extern int insn_default_latency_k8 (rtx_insn *); |
| 44 | extern int insn_default_latency_athlon (rtx_insn *); |
| 45 | extern int insn_default_latency_k6 (rtx_insn *); |
| 46 | extern int insn_default_latency_geode (rtx_insn *); |
| 47 | extern int insn_default_latency_pentiumpro (rtx_insn *); |
| 48 | extern int insn_default_latency_pentium (rtx_insn *); |
| 49 | extern int insn_default_latency_none (rtx_insn *); |
| 50 | |
| 51 | int |
| 52 | insn_default_latency_none (rtx_insn *insn ATTRIBUTE_UNUSED) |
| 53 | { |
| 54 | switch (recog_memoized (insn)) |
| 55 | { |
| 56 | case -1: |
| 57 | if (GET_CODE (PATTERN (insn)) != ASM_INPUT |
| 58 | && asm_noperands (PATTERN (insn)) < 0) |
| 59 | fatal_insn_not_found (insn); |
| 60 | /* FALLTHRU */ |
| 61 | default: |
| 62 | return 0; |
| 63 | |
| 64 | } |
| 65 | } |
| 66 | |
| 67 | int |
| 68 | insn_default_latency_pentium (rtx_insn *insn ATTRIBUTE_UNUSED) |
| 69 | { |
| 70 | enum attr_memory cached_memory ATTRIBUTE_UNUSED; |
| 71 | enum attr_type cached_type ATTRIBUTE_UNUSED; |
| 72 | enum attr_pent_pair cached_pent_pair ATTRIBUTE_UNUSED; |
| 73 | |
| 74 | switch (recog_memoized (insn)) |
| 75 | { |
| 76 | case 3904: /* sse4_2_pcmpistr_cconly */ |
| 77 | case 3900: /* sse4_2_pcmpestr_cconly */ |
| 78 | extract_constrain_insn_cached (insn); |
| 79 | if (!((1 << which_alternative) & 0x5)) |
| 80 | { |
| 81 | return 2; |
| 82 | } |
| 83 | else |
| 84 | { |
| 85 | return 1; |
| 86 | } |
| 87 | |
| 88 | case 2530: /* vec_extract_hi_v32qi */ |
| 89 | case 2526: /* vec_extract_hi_v16hi */ |
| 90 | extract_constrain_insn_cached (insn); |
| 91 | if (((1 << which_alternative) & 0x15)) |
| 92 | { |
| 93 | return 1; |
| 94 | } |
| 95 | else |
| 96 | { |
| 97 | return 0; |
| 98 | } |
| 99 | |
| 100 | case 4770: /* avx512vl_expandv2df_mask */ |
| 101 | case 4769: /* avx512vl_expandv2di_mask */ |
| 102 | case 4768: /* avx512vl_expandv4sf_mask */ |
| 103 | case 4767: /* avx512vl_expandv4si_mask */ |
| 104 | case 4766: /* avx512vl_expandv4df_mask */ |
| 105 | case 4765: /* avx512vl_expandv4di_mask */ |
| 106 | case 4764: /* avx512vl_expandv8sf_mask */ |
| 107 | case 4763: /* avx512vl_expandv8si_mask */ |
| 108 | case 4762: /* avx512f_expandv8df_mask */ |
| 109 | case 4761: /* avx512f_expandv8di_mask */ |
| 110 | case 4760: /* avx512f_expandv16sf_mask */ |
| 111 | case 4759: /* avx512f_expandv16si_mask */ |
| 112 | case 3903: /* sse4_2_pcmpistrm */ |
| 113 | case 3902: /* sse4_2_pcmpistri */ |
| 114 | case 3901: /* sse4_2_pcmpistr */ |
| 115 | case 3899: /* sse4_2_pcmpestrm */ |
| 116 | case 3898: /* sse4_2_pcmpestri */ |
| 117 | case 3897: /* sse4_2_pcmpestr */ |
| 118 | case 1256: /* avx512vl_loadv8hi_mask */ |
| 119 | case 1255: /* avx512vl_loadv16hi_mask */ |
| 120 | case 1254: /* avx512bw_loadv32hi_mask */ |
| 121 | case 1253: /* avx512vl_loadv32qi_mask */ |
| 122 | case 1252: /* avx512vl_loadv16qi_mask */ |
| 123 | case 1251: /* avx512bw_loadv64qi_mask */ |
| 124 | case 1250: /* avx512vl_loadv2df_mask */ |
| 125 | case 1249: /* avx512vl_loadv4df_mask */ |
| 126 | case 1248: /* avx512f_loadv8df_mask */ |
| 127 | case 1247: /* avx512vl_loadv4sf_mask */ |
| 128 | case 1246: /* avx512vl_loadv8sf_mask */ |
| 129 | case 1245: /* avx512f_loadv16sf_mask */ |
| 130 | case 1244: /* avx512vl_loadv2di_mask */ |
| 131 | case 1243: /* avx512vl_loadv4di_mask */ |
| 132 | case 1242: /* avx512f_loadv8di_mask */ |
| 133 | case 1241: /* avx512vl_loadv4si_mask */ |
| 134 | case 1240: /* avx512vl_loadv8si_mask */ |
| 135 | case 1239: /* avx512f_loadv16si_mask */ |
| 136 | extract_constrain_insn_cached (insn); |
| 137 | if (which_alternative != 0) |
| 138 | { |
| 139 | return 2; |
| 140 | } |
| 141 | else |
| 142 | { |
| 143 | return 1; |
| 144 | } |
| 145 | |
| 146 | case 2783: /* avx512vl_us_truncatev16hiv16qi2_mask */ |
| 147 | case 2782: /* avx512vl_truncatev16hiv16qi2_mask */ |
| 148 | case 2781: /* avx512vl_ss_truncatev16hiv16qi2_mask */ |
| 149 | case 2780: /* avx512vl_us_truncatev8siv8hi2_mask */ |
| 150 | case 2779: /* avx512vl_truncatev8siv8hi2_mask */ |
| 151 | case 2778: /* avx512vl_ss_truncatev8siv8hi2_mask */ |
| 152 | case 2777: /* avx512vl_us_truncatev4div4si2_mask */ |
| 153 | case 2776: /* avx512vl_truncatev4div4si2_mask */ |
| 154 | case 2775: /* avx512vl_ss_truncatev4div4si2_mask */ |
| 155 | case 2774: /* *avx512vl_us_truncatev16hiv16qi2 */ |
| 156 | case 2773: /* *avx512vl_truncatev16hiv16qi2 */ |
| 157 | case 2772: /* *avx512vl_ss_truncatev16hiv16qi2 */ |
| 158 | case 2771: /* *avx512vl_us_truncatev8siv8hi2 */ |
| 159 | case 2770: /* *avx512vl_truncatev8siv8hi2 */ |
| 160 | case 2769: /* *avx512vl_ss_truncatev8siv8hi2 */ |
| 161 | case 2768: /* *avx512vl_us_truncatev4div4si2 */ |
| 162 | case 2767: /* *avx512vl_truncatev4div4si2 */ |
| 163 | case 2766: /* *avx512vl_ss_truncatev4div4si2 */ |
| 164 | case 2765: /* avx512bw_us_truncatev32hiv32qi2_mask */ |
| 165 | case 2764: /* avx512bw_truncatev32hiv32qi2_mask */ |
| 166 | case 2763: /* avx512bw_ss_truncatev32hiv32qi2_mask */ |
| 167 | case 2762: /* avx512bw_us_truncatev32hiv32qi2 */ |
| 168 | case 2761: /* avx512bw_truncatev32hiv32qi2 */ |
| 169 | case 2760: /* avx512bw_ss_truncatev32hiv32qi2 */ |
| 170 | case 2759: /* avx512f_us_truncatev8div8hi2_mask */ |
| 171 | case 2758: /* avx512f_truncatev8div8hi2_mask */ |
| 172 | case 2757: /* avx512f_ss_truncatev8div8hi2_mask */ |
| 173 | case 2756: /* avx512f_us_truncatev8div8si2_mask */ |
| 174 | case 2755: /* avx512f_truncatev8div8si2_mask */ |
| 175 | case 2754: /* avx512f_ss_truncatev8div8si2_mask */ |
| 176 | case 2753: /* avx512f_us_truncatev16siv16hi2_mask */ |
| 177 | case 2752: /* avx512f_truncatev16siv16hi2_mask */ |
| 178 | case 2751: /* avx512f_ss_truncatev16siv16hi2_mask */ |
| 179 | case 2750: /* avx512f_us_truncatev16siv16qi2_mask */ |
| 180 | case 2749: /* avx512f_truncatev16siv16qi2_mask */ |
| 181 | case 2748: /* avx512f_ss_truncatev16siv16qi2_mask */ |
| 182 | case 2747: /* *avx512f_us_truncatev8div8hi2 */ |
| 183 | case 2746: /* *avx512f_truncatev8div8hi2 */ |
| 184 | case 2745: /* *avx512f_ss_truncatev8div8hi2 */ |
| 185 | case 2744: /* *avx512f_us_truncatev8div8si2 */ |
| 186 | case 2743: /* *avx512f_truncatev8div8si2 */ |
| 187 | case 2742: /* *avx512f_ss_truncatev8div8si2 */ |
| 188 | case 2741: /* *avx512f_us_truncatev16siv16hi2 */ |
| 189 | case 2740: /* *avx512f_truncatev16siv16hi2 */ |
| 190 | case 2739: /* *avx512f_ss_truncatev16siv16hi2 */ |
| 191 | case 2738: /* *avx512f_us_truncatev16siv16qi2 */ |
| 192 | case 2737: /* *avx512f_truncatev16siv16qi2 */ |
| 193 | case 2736: /* *avx512f_ss_truncatev16siv16qi2 */ |
| 194 | case 2528: /* vec_extract_hi_v64qi */ |
| 195 | case 2524: /* vec_extract_hi_v32hi */ |
| 196 | case 2510: /* vec_extract_hi_v4df_mask */ |
| 197 | case 2509: /* vec_extract_hi_v4df */ |
| 198 | case 2508: /* vec_extract_hi_v4di_mask */ |
| 199 | case 2507: /* vec_extract_hi_v4di */ |
| 200 | case 2506: /* vec_extract_lo_v4df_mask */ |
| 201 | case 2505: /* vec_extract_lo_v4df */ |
| 202 | case 2504: /* vec_extract_lo_v4di_mask */ |
| 203 | case 2503: /* vec_extract_lo_v4di */ |
| 204 | case 1051: /* fnstsw */ |
| 205 | extract_constrain_insn_cached (insn); |
| 206 | if (which_alternative == 0) |
| 207 | { |
| 208 | return 1; |
| 209 | } |
| 210 | else |
| 211 | { |
| 212 | return 0; |
| 213 | } |
| 214 | |
| 215 | case 968: /* *strlenqi_1 */ |
| 216 | case 967: /* *strlenqi_1 */ |
| 217 | case 966: /* *cmpstrnqi_1 */ |
| 218 | case 965: /* *cmpstrnqi_1 */ |
| 219 | case 964: /* *cmpstrnqi_nz_1 */ |
| 220 | case 963: /* *cmpstrnqi_nz_1 */ |
| 221 | case 962: /* *rep_stosqi */ |
| 222 | case 961: /* *rep_stosqi */ |
| 223 | case 960: /* *rep_stossi */ |
| 224 | case 959: /* *rep_stossi */ |
| 225 | case 958: /* *rep_stosdi_rex64 */ |
| 226 | case 957: /* *rep_stosdi_rex64 */ |
| 227 | case 956: /* *strsetqi_1 */ |
| 228 | case 955: /* *strsetqi_1 */ |
| 229 | case 954: /* *strsethi_1 */ |
| 230 | case 953: /* *strsethi_1 */ |
| 231 | case 952: /* *strsetsi_1 */ |
| 232 | case 951: /* *strsetsi_1 */ |
| 233 | case 950: /* *strsetdi_rex_1 */ |
| 234 | case 949: /* *strsetdi_rex_1 */ |
| 235 | case 948: /* *rep_movqi */ |
| 236 | case 947: /* *rep_movqi */ |
| 237 | case 946: /* *rep_movsi */ |
| 238 | case 945: /* *rep_movsi */ |
| 239 | case 944: /* *rep_movdi_rex64 */ |
| 240 | case 943: /* *rep_movdi_rex64 */ |
| 241 | case 942: /* *strmovqi_1 */ |
| 242 | case 941: /* *strmovqi_1 */ |
| 243 | case 940: /* *strmovhi_1 */ |
| 244 | case 939: /* *strmovhi_1 */ |
| 245 | case 938: /* *strmovsi_1 */ |
| 246 | case 937: /* *strmovsi_1 */ |
| 247 | case 936: /* *strmovdi_rex_1 */ |
| 248 | case 935: /* *strmovdi_rex_1 */ |
| 249 | return 12 /* 0xc */; |
| 250 | |
| 251 | case 889: /* fistsi2_with_temp */ |
| 252 | case 888: /* fisthi2_with_temp */ |
| 253 | case 887: /* fistsi2 */ |
| 254 | case 886: /* fisthi2 */ |
| 255 | case 885: /* *fistsi2_1 */ |
| 256 | case 884: /* *fisthi2_1 */ |
| 257 | case 883: /* fistdi2_with_temp */ |
| 258 | case 882: /* fistdi2 */ |
| 259 | case 881: /* *fistdi2_1 */ |
| 260 | case 880: /* rintdf2_frndint */ |
| 261 | case 879: /* rintsf2_frndint */ |
| 262 | case 878: /* rintxf2 */ |
| 263 | case 875: /* fscalexf4_i387 */ |
| 264 | case 874: /* *f2xm1xf2_i387 */ |
| 265 | case 873: /* fxtract_extenddfxf3_i387 */ |
| 266 | case 872: /* fxtract_extendsfxf3_i387 */ |
| 267 | case 871: /* fxtractxf3_i387 */ |
| 268 | case 870: /* fyl2xp1_extenddfxf3_i387 */ |
| 269 | case 869: /* fyl2xp1_extendsfxf3_i387 */ |
| 270 | case 868: /* fyl2xp1xf3_i387 */ |
| 271 | case 867: /* fyl2x_extenddfxf3_i387 */ |
| 272 | case 866: /* fyl2x_extendsfxf3_i387 */ |
| 273 | case 865: /* fyl2xxf3_i387 */ |
| 274 | case 864: /* fpatan_extenddfxf3_i387 */ |
| 275 | case 863: /* fpatan_extendsfxf3_i387 */ |
| 276 | case 862: /* *fpatanxf3_i387 */ |
| 277 | case 861: /* fptan_extenddfxf4_i387 */ |
| 278 | case 860: /* fptan_extendsfxf4_i387 */ |
| 279 | case 859: /* fptanxf4_i387 */ |
| 280 | case 858: /* sincos_extenddfxf3_i387 */ |
| 281 | case 857: /* sincos_extendsfxf3_i387 */ |
| 282 | case 856: /* sincosxf3 */ |
| 283 | case 855: /* *cos_extenddfxf2_i387 */ |
| 284 | case 854: /* *sin_extenddfxf2_i387 */ |
| 285 | case 853: /* *cos_extendsfxf2_i387 */ |
| 286 | case 852: /* *sin_extendsfxf2_i387 */ |
| 287 | case 851: /* *cosxf2_i387 */ |
| 288 | case 850: /* *sinxf2_i387 */ |
| 289 | case 849: /* fprem1xf4_i387 */ |
| 290 | case 848: /* fpremxf4_i387 */ |
| 291 | case 844: /* sqrt_extenddfxf2_i387 */ |
| 292 | case 843: /* sqrt_extendsfxf2_i387 */ |
| 293 | case 842: /* sqrtxf2 */ |
| 294 | return 70 /* 0x46 */; |
| 295 | |
| 296 | case 3672: /* sse_ldmxcsr */ |
| 297 | case 1098: /* *bnd64_ldx */ |
| 298 | case 1097: /* *bnd32_ldx */ |
| 299 | case 1050: /* fldenv */ |
| 300 | case 1048: /* xrstors64 */ |
| 301 | case 1047: /* xrstor64 */ |
| 302 | case 1046: /* xrstors_rex64 */ |
| 303 | case 1045: /* xrstor_rex64 */ |
| 304 | case 1044: /* xrstors */ |
| 305 | case 1043: /* xrstor */ |
| 306 | case 1030: /* fxrstor64 */ |
| 307 | case 1029: /* fxrstor */ |
| 308 | case 909: /* frndintxf2_mask_pm_i387 */ |
| 309 | case 908: /* frndintxf2_mask_pm */ |
| 310 | case 907: /* frndintxf2_trunc_i387 */ |
| 311 | case 906: /* frndintxf2_ceil_i387 */ |
| 312 | case 905: /* frndintxf2_floor_i387 */ |
| 313 | case 904: /* frndintdf2_trunc_i387 */ |
| 314 | case 903: /* frndintdf2_ceil_i387 */ |
| 315 | case 902: /* frndintdf2_floor_i387 */ |
| 316 | case 901: /* frndintsf2_trunc_i387 */ |
| 317 | case 900: /* frndintsf2_ceil_i387 */ |
| 318 | case 899: /* frndintsf2_floor_i387 */ |
| 319 | case 898: /* frndintxf2_trunc */ |
| 320 | case 897: /* frndintxf2_ceil */ |
| 321 | case 896: /* frndintxf2_floor */ |
| 322 | case 895: /* frndintdf2_trunc */ |
| 323 | case 894: /* frndintdf2_ceil */ |
| 324 | case 893: /* frndintdf2_floor */ |
| 325 | case 892: /* frndintsf2_trunc */ |
| 326 | case 891: /* frndintsf2_ceil */ |
| 327 | case 890: /* frndintsf2_floor */ |
| 328 | case 805: /* *add_tp_di */ |
| 329 | case 804: /* *add_tp_si */ |
| 330 | case 803: /* *add_tp_x32_zext */ |
| 331 | case 802: /* *add_tp_x32 */ |
| 332 | return 2; |
| 333 | |
| 334 | case 810: /* *tls_dynamic_gnu2_call_64 */ |
| 335 | case 807: /* *tls_dynamic_gnu2_call_32 */ |
| 336 | case 685: /* *sibcall_value_pop_memory */ |
| 337 | case 684: /* *sibcall_value_pop */ |
| 338 | case 683: /* *call_value_pop */ |
| 339 | case 682: /* *sibcall_value_memory */ |
| 340 | case 681: /* *sibcall_value_memory */ |
| 341 | case 680: /* *sibcall_value */ |
| 342 | case 679: /* *sibcall_value */ |
| 343 | case 678: /* *sibcall_value_GOT_32 */ |
| 344 | case 677: /* *call_value_got_x32 */ |
| 345 | case 676: /* *call_value */ |
| 346 | case 675: /* *call_value */ |
| 347 | case 674: /* *sibcall_pop_memory */ |
| 348 | case 673: /* *sibcall_pop */ |
| 349 | case 672: /* *call_pop */ |
| 350 | case 671: /* *sibcall_memory */ |
| 351 | case 670: /* *sibcall_memory */ |
| 352 | case 669: /* *sibcall */ |
| 353 | case 668: /* *sibcall */ |
| 354 | case 667: /* *sibcall_GOT_32 */ |
| 355 | case 666: /* *call_got_x32 */ |
| 356 | case 665: /* *call */ |
| 357 | case 664: /* *call */ |
| 358 | return 10 /* 0xa */; |
| 359 | |
| 360 | case 693: /* simple_return_indirect_internal */ |
| 361 | case 663: /* *tablejump_1 */ |
| 362 | case 662: /* *tablejump_1 */ |
| 363 | case 661: /* *indirect_jump */ |
| 364 | case 660: /* *indirect_jump */ |
| 365 | extract_constrain_insn_cached (insn); |
| 366 | if (! ( |
| 367 | #line 12442 "/___NETBSD_SRC___/tools/gcc/../../external/gpl3/gcc/dist/gcc/config/i386/i386.md" |
| 368 | ((cfun->machine->indirect_branch_type |
| 369 | != indirect_branch_keep)))) |
| 370 | { |
| 371 | return 1; |
| 372 | } |
| 373 | else if ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) |
| 374 | { |
| 375 | return 2; |
| 376 | } |
| 377 | else if (cached_memory == MEMORY_NONE) |
| 378 | { |
| 379 | return 1; |
| 380 | } |
| 381 | else |
| 382 | { |
| 383 | return 0; |
| 384 | } |
| 385 | |
| 386 | case 624: /* *setcc_qi_slp */ |
| 387 | case 623: /* *setcc_qi */ |
| 388 | if (get_attr_memory (insn) == MEMORY_NONE) |
| 389 | { |
| 390 | return 1; |
| 391 | } |
| 392 | else |
| 393 | { |
| 394 | return 0; |
| 395 | } |
| 396 | |
| 397 | case 356: /* *umulditi3_1 */ |
| 398 | case 355: /* *umulsidi3_1 */ |
| 399 | extract_constrain_insn_cached (insn); |
| 400 | if (which_alternative != 0) |
| 401 | { |
| 402 | return 11 /* 0xb */; |
| 403 | } |
| 404 | else if ((cached_memory = get_attr_memory (insn)) == MEMORY_BOTH) |
| 405 | { |
| 406 | return 3; |
| 407 | } |
| 408 | else if (cached_memory == MEMORY_LOAD) |
| 409 | { |
| 410 | return 2; |
| 411 | } |
| 412 | else if (cached_memory == MEMORY_NONE) |
| 413 | { |
| 414 | return 1; |
| 415 | } |
| 416 | else |
| 417 | { |
| 418 | return 0; |
| 419 | } |
| 420 | |
| 421 | case 366: /* *umulsi3_highpart_1 */ |
| 422 | case 365: /* *smulsi3_highpart_1 */ |
| 423 | case 364: /* *umulsi3_highpart_zext */ |
| 424 | case 363: /* *smulsi3_highpart_zext */ |
| 425 | case 362: /* *umuldi3_highpart_1 */ |
| 426 | case 361: /* *smuldi3_highpart_1 */ |
| 427 | case 360: /* *umulqihi3_1 */ |
| 428 | case 359: /* *mulqihi3_1 */ |
| 429 | case 358: /* *mulditi3_1 */ |
| 430 | case 357: /* *mulsidi3_1 */ |
| 431 | case 352: /* *umulvqi4 */ |
| 432 | case 351: /* *mulvqi4 */ |
| 433 | case 350: /* *umulvdi4 */ |
| 434 | case 349: /* *umulvsi4 */ |
| 435 | case 348: /* *umulvhi4 */ |
| 436 | case 347: /* *mulvdi4_1 */ |
| 437 | case 346: /* *mulvsi4_1 */ |
| 438 | case 345: /* *mulvhi4_1 */ |
| 439 | case 344: /* *mulvhi4 */ |
| 440 | case 343: /* *mulvdi4 */ |
| 441 | case 342: /* *mulvsi4 */ |
| 442 | case 341: /* *mulqi3_1 */ |
| 443 | case 340: /* *mulsi3_1_zext */ |
| 444 | case 339: /* *muldi3_1 */ |
| 445 | case 338: /* *mulsi3_1 */ |
| 446 | case 337: /* *mulhi3_1 */ |
| 447 | return 11 /* 0xb */; |
| 448 | |
| 449 | case 927: /* fistsi2_ceil_with_temp */ |
| 450 | case 926: /* fistsi2_floor_with_temp */ |
| 451 | case 925: /* fisthi2_ceil_with_temp */ |
| 452 | case 924: /* fisthi2_floor_with_temp */ |
| 453 | case 923: /* fistsi2_ceil */ |
| 454 | case 922: /* fistsi2_floor */ |
| 455 | case 921: /* fisthi2_ceil */ |
| 456 | case 920: /* fisthi2_floor */ |
| 457 | case 919: /* fistdi2_ceil_with_temp */ |
| 458 | case 918: /* fistdi2_floor_with_temp */ |
| 459 | case 917: /* fistdi2_ceil */ |
| 460 | case 916: /* fistdi2_floor */ |
| 461 | case 915: /* *fistdi2_ceil_1 */ |
| 462 | case 914: /* *fistdi2_floor_1 */ |
| 463 | case 913: /* *fistsi2_ceil_1 */ |
| 464 | case 912: /* *fistsi2_floor_1 */ |
| 465 | case 911: /* *fisthi2_ceil_1 */ |
| 466 | case 910: /* *fisthi2_floor_1 */ |
| 467 | case 191: /* fix_truncsi_i387_with_temp */ |
| 468 | case 190: /* fix_trunchi_i387_with_temp */ |
| 469 | case 189: /* fix_truncsi_i387 */ |
| 470 | case 188: /* fix_trunchi_i387 */ |
| 471 | case 187: /* fix_truncdi_i387_with_temp */ |
| 472 | case 186: /* fix_truncdi_i387 */ |
| 473 | case 185: /* *fix_truncdi_i387_1 */ |
| 474 | case 184: /* *fix_truncsi_i387_1 */ |
| 475 | case 183: /* *fix_trunchi_i387_1 */ |
| 476 | return 3; |
| 477 | |
| 478 | case 4869: /* sha256rnds2 */ |
| 479 | case 4868: /* sha256msg2 */ |
| 480 | case 4867: /* sha256msg1 */ |
| 481 | case 4866: /* sha1rnds4 */ |
| 482 | case 4865: /* sha1nexte */ |
| 483 | case 4864: /* sha1msg2 */ |
| 484 | case 4863: /* sha1msg1 */ |
| 485 | case 4838: /* avx512bw_dbpsadbwv32hi_mask */ |
| 486 | case 4837: /* *avx512bw_dbpsadbwv32hi */ |
| 487 | case 4836: /* avx512bw_dbpsadbwv16hi_mask */ |
| 488 | case 4835: /* *avx512bw_dbpsadbwv16hi */ |
| 489 | case 4834: /* avx512bw_dbpsadbwv8hi_mask */ |
| 490 | case 4833: /* *avx512bw_dbpsadbwv8hi */ |
| 491 | case 4432: /* avx2_maskstoreq256 */ |
| 492 | case 4431: /* avx2_maskstored256 */ |
| 493 | case 4430: /* avx2_maskstoreq */ |
| 494 | case 4429: /* avx2_maskstored */ |
| 495 | case 4428: /* avx_maskstorepd256 */ |
| 496 | case 4427: /* avx_maskstoreps256 */ |
| 497 | case 4426: /* avx_maskstorepd */ |
| 498 | case 4425: /* avx_maskstoreps */ |
| 499 | case 4424: /* avx2_maskloadq256 */ |
| 500 | case 4423: /* avx2_maskloadd256 */ |
| 501 | case 4422: /* avx2_maskloadq */ |
| 502 | case 4421: /* avx2_maskloadd */ |
| 503 | case 4420: /* avx_maskloadpd256 */ |
| 504 | case 4419: /* avx_maskloadps256 */ |
| 505 | case 4418: /* avx_maskloadpd */ |
| 506 | case 4417: /* avx_maskloadps */ |
| 507 | case 4110: /* avx2_vec_dupv4df */ |
| 508 | case 4054: /* pclmulqdq */ |
| 509 | case 4053: /* aeskeygenassist */ |
| 510 | case 4052: /* aesimc */ |
| 511 | case 4051: /* aesdeclast */ |
| 512 | case 4050: /* aesdec */ |
| 513 | case 4049: /* aesenclast */ |
| 514 | case 4048: /* aesenc */ |
| 515 | case 3801: /* sse4_1_phminposuw */ |
| 516 | case 3788: /* sse4_1_mpsadbw */ |
| 517 | case 3787: /* avx2_mpsadbw */ |
| 518 | case 3763: /* absv2si2 */ |
| 519 | case 3762: /* absv4hi2 */ |
| 520 | case 3761: /* absv8qi2 */ |
| 521 | case 3760: /* absv8hi2_mask */ |
| 522 | case 3759: /* absv16hi2_mask */ |
| 523 | case 3758: /* absv32hi2_mask */ |
| 524 | case 3757: /* absv32qi2_mask */ |
| 525 | case 3756: /* absv16qi2_mask */ |
| 526 | case 3755: /* absv64qi2_mask */ |
| 527 | case 3754: /* absv2di2_mask */ |
| 528 | case 3753: /* absv4di2_mask */ |
| 529 | case 3752: /* absv8di2_mask */ |
| 530 | case 3751: /* absv4si2_mask */ |
| 531 | case 3750: /* absv8si2_mask */ |
| 532 | case 3749: /* absv16si2_mask */ |
| 533 | case 3748: /* *absv2di2 */ |
| 534 | case 3747: /* *absv4di2 */ |
| 535 | case 3746: /* *absv8di2 */ |
| 536 | case 3745: /* *absv4si2 */ |
| 537 | case 3744: /* *absv8si2 */ |
| 538 | case 3743: /* *absv16si2 */ |
| 539 | case 3742: /* *absv8hi2 */ |
| 540 | case 3741: /* *absv16hi2 */ |
| 541 | case 3740: /* *absv32hi2 */ |
| 542 | case 3739: /* *absv16qi2 */ |
| 543 | case 3738: /* *absv32qi2 */ |
| 544 | case 3737: /* *absv64qi2 */ |
| 545 | case 3729: /* ssse3_psignv2si3 */ |
| 546 | case 3728: /* ssse3_psignv4hi3 */ |
| 547 | case 3727: /* ssse3_psignv8qi3 */ |
| 548 | case 3726: /* ssse3_psignv4si3 */ |
| 549 | case 3725: /* avx2_psignv8si3 */ |
| 550 | case 3724: /* ssse3_psignv8hi3 */ |
| 551 | case 3723: /* avx2_psignv16hi3 */ |
| 552 | case 3722: /* ssse3_psignv16qi3 */ |
| 553 | case 3721: /* avx2_psignv32qi3 */ |
| 554 | case 3720: /* ssse3_pshufbv8qi3 */ |
| 555 | case 3719: /* ssse3_pshufbv16qi3_mask */ |
| 556 | case 3718: /* ssse3_pshufbv16qi3 */ |
| 557 | case 3717: /* avx2_pshufbv32qi3_mask */ |
| 558 | case 3716: /* avx2_pshufbv32qi3 */ |
| 559 | case 3715: /* avx512bw_pshufbv64qi3_mask */ |
| 560 | case 3714: /* avx512bw_pshufbv64qi3 */ |
| 561 | case 3635: /* *vec_extractv4si_zext */ |
| 562 | case 3626: /* *vec_extractv8hi_zext */ |
| 563 | case 3625: /* *vec_extractv8hi_zext */ |
| 564 | case 3624: /* *vec_extractv16qi_zext */ |
| 565 | case 3623: /* *vec_extractv16qi_zext */ |
| 566 | case 3622: /* *vec_extractv8hi */ |
| 567 | case 3621: /* *vec_extractv16qi */ |
| 568 | case 3607: /* sse2_pshufd_1_mask */ |
| 569 | case 3606: /* sse2_pshufd_1 */ |
| 570 | case 3605: /* avx2_pshufd_1_mask */ |
| 571 | case 3604: /* avx2_pshufd_1 */ |
| 572 | case 3603: /* avx512f_pshufd_1_mask */ |
| 573 | case 3602: /* avx512f_pshufd_1 */ |
| 574 | case 2734: /* vec_dupv2df_mask */ |
| 575 | case 2733: /* vec_dupv2df */ |
| 576 | case 2522: /* vec_extract_hi_v8sf */ |
| 577 | case 2521: /* vec_extract_hi_v8si */ |
| 578 | case 2520: /* vec_extract_hi_v8sf_mask */ |
| 579 | case 2519: /* vec_extract_hi_v8si_mask */ |
| 580 | case 2518: /* vec_extract_hi_v8sf_maskm */ |
| 581 | case 2517: /* vec_extract_hi_v8si_maskm */ |
| 582 | case 2516: /* vec_extract_lo_v8sf_maskm */ |
| 583 | case 2515: /* vec_extract_lo_v8si_maskm */ |
| 584 | case 2514: /* vec_extract_lo_v8sf_mask */ |
| 585 | case 2513: /* vec_extract_lo_v8sf */ |
| 586 | case 2512: /* vec_extract_lo_v8si_mask */ |
| 587 | case 2511: /* vec_extract_lo_v8si */ |
| 588 | case 2498: /* vec_extract_hi_v16si_mask */ |
| 589 | case 2497: /* vec_extract_hi_v16si */ |
| 590 | case 2496: /* vec_extract_hi_v16sf_mask */ |
| 591 | case 2495: /* vec_extract_hi_v16sf */ |
| 592 | case 2494: /* vec_extract_hi_v16si_maskm */ |
| 593 | case 2493: /* vec_extract_hi_v16sf_maskm */ |
| 594 | case 2492: /* vec_extract_hi_v8di_mask */ |
| 595 | case 2491: /* vec_extract_hi_v8di */ |
| 596 | case 2490: /* vec_extract_hi_v8df_mask */ |
| 597 | case 2489: /* vec_extract_hi_v8df */ |
| 598 | case 2486: /* vec_extract_lo_v8di_mask */ |
| 599 | case 2485: /* vec_extract_lo_v8di */ |
| 600 | case 2484: /* vec_extract_lo_v8df_mask */ |
| 601 | case 2483: /* vec_extract_lo_v8df */ |
| 602 | case 2482: /* vec_extract_lo_v8di_maskm */ |
| 603 | case 2481: /* vec_extract_lo_v8df_maskm */ |
| 604 | case 2480: /* avx512f_vextracti32x4_1_mask */ |
| 605 | case 2479: /* *avx512f_vextracti32x4_1 */ |
| 606 | case 2478: /* avx512f_vextractf32x4_1_mask */ |
| 607 | case 2477: /* *avx512f_vextractf32x4_1 */ |
| 608 | case 2476: /* avx512dq_vextracti64x2_1_mask */ |
| 609 | case 2475: /* *avx512dq_vextracti64x2_1 */ |
| 610 | case 2474: /* avx512dq_vextractf64x2_1_mask */ |
| 611 | case 2473: /* *avx512dq_vextractf64x2_1 */ |
| 612 | case 2458: /* avx512f_vec_dupv8df_1 */ |
| 613 | case 2457: /* avx512f_vec_dupv16sf_1 */ |
| 614 | case 2456: /* avx2_vec_dupv8sf_1 */ |
| 615 | case 2455: /* avx2_vec_dupv4sf */ |
| 616 | case 2454: /* avx2_vec_dupv8sf */ |
| 617 | case 1020: /* sse4_2_crc32di */ |
| 618 | case 1019: /* sse4_2_crc32si */ |
| 619 | case 1018: /* sse4_2_crc32hi */ |
| 620 | case 1017: /* sse4_2_crc32qi */ |
| 621 | case 1000: /* probe_stack_di */ |
| 622 | case 999: /* probe_stack_si */ |
| 623 | case 732: /* tzcnt_hi */ |
| 624 | case 730: /* *tzcnt_di_falsedep */ |
| 625 | case 728: /* *tzcnt_si_falsedep */ |
| 626 | case 726: /* tzcnt_di */ |
| 627 | case 724: /* tzcnt_si */ |
| 628 | case 719: /* *bsrhi */ |
| 629 | case 718: /* bsr */ |
| 630 | case 717: /* bsr_rex64 */ |
| 631 | case 716: /* *ctzdi2_falsedep */ |
| 632 | case 715: /* *ctzsi2_falsedep */ |
| 633 | case 714: /* ctzdi2 */ |
| 634 | case 713: /* ctzsi2 */ |
| 635 | case 712: /* *bsfdi_1 */ |
| 636 | case 711: /* *bsfsi_1 */ |
| 637 | case 710: /* *tzcntdi_1_falsedep */ |
| 638 | case 709: /* *tzcntsi_1_falsedep */ |
| 639 | case 708: /* *tzcntdi_1 */ |
| 640 | case 707: /* *tzcntsi_1 */ |
| 641 | case 613: /* *btdi */ |
| 642 | case 612: /* *btsi */ |
| 643 | case 611: /* *btcq */ |
| 644 | case 610: /* *btrq */ |
| 645 | case 609: /* *btsq */ |
| 646 | case 512: /* *one_cmplsi2_2_zext */ |
| 647 | case 511: /* *one_cmpldi2_2 */ |
| 648 | case 510: /* *one_cmplsi2_2 */ |
| 649 | case 509: /* *one_cmplhi2_2 */ |
| 650 | case 508: /* *one_cmplqi2_2 */ |
| 651 | case 507: /* *one_cmplqi2_1 */ |
| 652 | case 506: /* *one_cmplsi2_1_zext */ |
| 653 | case 505: /* *one_cmpldi2_1 */ |
| 654 | case 504: /* *one_cmplsi2_1 */ |
| 655 | case 503: /* *one_cmplhi2_1 */ |
| 656 | case 479: /* *negvdi3 */ |
| 657 | case 478: /* *negvsi3 */ |
| 658 | case 477: /* *negvhi3 */ |
| 659 | case 476: /* *negvqi3 */ |
| 660 | case 475: /* *negsi2_cmpz_zext */ |
| 661 | case 474: /* *negdi2_cmpz */ |
| 662 | case 473: /* *negsi2_cmpz */ |
| 663 | case 472: /* *neghi2_cmpz */ |
| 664 | case 471: /* *negqi2_cmpz */ |
| 665 | case 470: /* *negsi2_1_zext */ |
| 666 | case 469: /* *negdi2_1 */ |
| 667 | case 468: /* *negsi2_1 */ |
| 668 | case 467: /* *neghi2_1 */ |
| 669 | case 466: /* *negqi2_1 */ |
| 670 | case 450: /* *xorqi_2_slp */ |
| 671 | case 449: /* *iorqi_2_slp */ |
| 672 | case 436: /* *xorqi_1_slp */ |
| 673 | case 435: /* *iorqi_1_slp */ |
| 674 | case 410: /* *andqi_2_slp */ |
| 675 | case 403: /* *andqi_1_slp */ |
| 676 | case 276: /* *subqi_1_slp */ |
| 677 | case 138: /* zero_extendqihi2_and */ |
| 678 | case 135: /* zero_extendhisi2_and */ |
| 679 | case 134: /* zero_extendqisi2_and */ |
| 680 | case 100: /* *movstricthi_xor */ |
| 681 | case 99: /* *movstrictqi_xor */ |
| 682 | case 77: /* *movdi_or */ |
| 683 | case 76: /* *movsi_or */ |
| 684 | case 75: /* *movdi_xor */ |
| 685 | case 74: /* *movsi_xor */ |
| 686 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_BOTH) |
| 687 | { |
| 688 | return 3; |
| 689 | } |
| 690 | else if (cached_memory == MEMORY_NONE) |
| 691 | { |
| 692 | return 1; |
| 693 | } |
| 694 | else |
| 695 | { |
| 696 | return 0; |
| 697 | } |
| 698 | |
| 699 | case 4056: /* avx_vzeroupper */ |
| 700 | case 4055: /* *avx_vzeroall */ |
| 701 | case 1217: /* *mmx_femms */ |
| 702 | case 1216: /* *mmx_emms */ |
| 703 | case 1102: /* move_size_reloc_di */ |
| 704 | case 1101: /* move_size_reloc_si */ |
| 705 | case 1096: /* *bnd64_cn */ |
| 706 | case 1095: /* *bnd64_cu */ |
| 707 | case 1094: /* *bnd64_cl */ |
| 708 | case 1093: /* *bnd32_cn */ |
| 709 | case 1092: /* *bnd32_cu */ |
| 710 | case 1091: /* *bnd32_cl */ |
| 711 | case 1088: /* *bnd64_mk */ |
| 712 | case 1087: /* *bnd32_mk */ |
| 713 | case 1052: /* fnclex */ |
| 714 | case 1008: /* *prefetch_prefetchwt1 */ |
| 715 | case 1007: /* *prefetch_3dnow */ |
| 716 | case 1006: /* *prefetch_sse */ |
| 717 | case 980: /* *movxfcc_1 */ |
| 718 | case 974: /* *x86_movdicc_0_m1_neg */ |
| 719 | case 973: /* *x86_movsicc_0_m1_neg */ |
| 720 | case 972: /* *x86_movdicc_0_m1_se */ |
| 721 | case 971: /* *x86_movsicc_0_m1_se */ |
| 722 | case 970: /* *x86_movdicc_0_m1 */ |
| 723 | case 969: /* *x86_movsicc_0_m1 */ |
| 724 | case 809: /* *tls_dynamic_gnu2_lea_64 */ |
| 725 | case 806: /* *tls_dynamic_gnu2_lea_32 */ |
| 726 | case 801: /* *load_tp_di */ |
| 727 | case 800: /* *load_tp_si */ |
| 728 | case 799: /* *load_tp_x32_zext */ |
| 729 | case 798: /* *load_tp_x32 */ |
| 730 | case 704: /* leave_rex64 */ |
| 731 | case 703: /* leave */ |
| 732 | case 701: /* set_got_offset_rex64 */ |
| 733 | case 700: /* set_rip_rex64 */ |
| 734 | case 699: /* set_got_rex64 */ |
| 735 | case 659: /* jump */ |
| 736 | case 628: /* *jcc_2 */ |
| 737 | case 627: /* *jcc_1 */ |
| 738 | case 386: /* udivmodhiqi3 */ |
| 739 | case 385: /* *udivmoddi4_noext */ |
| 740 | case 384: /* *udivmodsi4_noext */ |
| 741 | case 383: /* *udivmodhi4_noext */ |
| 742 | case 375: /* divmodhiqi3 */ |
| 743 | case 374: /* *divmoddi4_noext */ |
| 744 | case 373: /* *divmodsi4_noext */ |
| 745 | case 372: /* *divmodhi4_noext */ |
| 746 | case 268: /* *leadi_general_4 */ |
| 747 | case 267: /* *leadi_general_4 */ |
| 748 | case 266: /* *leasi_general_4 */ |
| 749 | case 265: /* *leasi_general_4 */ |
| 750 | case 264: /* *leahi_general_4 */ |
| 751 | case 263: /* *leahi_general_4 */ |
| 752 | case 262: /* *leaqi_general_4 */ |
| 753 | case 261: /* *leaqi_general_4 */ |
| 754 | case 260: /* *leahi_general_3b */ |
| 755 | case 259: /* *leaqi_general_3b */ |
| 756 | case 258: /* *leahi_general_3 */ |
| 757 | case 257: /* *leaqi_general_3 */ |
| 758 | case 256: /* *leahi_general_2b */ |
| 759 | case 255: /* *leaqi_general_2b */ |
| 760 | case 254: /* *leahi_general_2 */ |
| 761 | case 253: /* *leaqi_general_2 */ |
| 762 | case 252: /* *leahi_general_1 */ |
| 763 | case 251: /* *leaqi_general_1 */ |
| 764 | case 214: /* *leadi */ |
| 765 | case 213: /* *leasi */ |
| 766 | case 116: /* *insvqi_3 */ |
| 767 | case 115: /* *insvqi_3 */ |
| 768 | case 114: /* *insvqi_2 */ |
| 769 | case 113: /* *insvqi_2 */ |
| 770 | case 112: /* *insvqi_1 */ |
| 771 | case 111: /* *insvqi_1_mem_rex64 */ |
| 772 | case 110: /* insvdi_1 */ |
| 773 | case 109: /* insvsi_1 */ |
| 774 | case 108: /* insvhi_1 */ |
| 775 | case 106: /* *extzvqi_mem_rex64 */ |
| 776 | case 98: /* *movstricthi_1 */ |
| 777 | case 97: /* *movstrictqi_1 */ |
| 778 | case 96: /* *swaphi */ |
| 779 | case 95: /* *swapqi */ |
| 780 | case 94: /* *swapdi */ |
| 781 | case 93: /* *swapsi */ |
| 782 | case 92: /* *movabsdi_2 */ |
| 783 | case 91: /* *movabssi_2 */ |
| 784 | case 90: /* *movabshi_2 */ |
| 785 | case 89: /* *movabsqi_2 */ |
| 786 | case 88: /* *movabsdi_1 */ |
| 787 | case 87: /* *movabssi_1 */ |
| 788 | case 86: /* *movabshi_1 */ |
| 789 | case 85: /* *movabsqi_1 */ |
| 790 | case 73: /* *popfldi1 */ |
| 791 | case 72: /* *popflsi1 */ |
| 792 | case 69: /* *popdi1_epilogue */ |
| 793 | case 68: /* *popsi1_epilogue */ |
| 794 | case 67: /* *popdi1 */ |
| 795 | case 66: /* *popsi1 */ |
| 796 | return 1; |
| 797 | |
| 798 | case 71: /* *pushfldi2 */ |
| 799 | case 70: /* *pushflsi2 */ |
| 800 | case 65: /* *pushdi2_prologue */ |
| 801 | case 64: /* *pushsi2_prologue */ |
| 802 | case 63: /* *pushhi2 */ |
| 803 | case 62: /* *pushqi2 */ |
| 804 | case 61: /* *pushsi2_rex64 */ |
| 805 | case 60: /* *pushhi2_rex64 */ |
| 806 | case 59: /* *pushqi2_rex64 */ |
| 807 | case 58: /* *pushsi2 */ |
| 808 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_STORE) |
| 809 | { |
| 810 | return 1; |
| 811 | } |
| 812 | else if (cached_memory == MEMORY_BOTH) |
| 813 | { |
| 814 | return 3; |
| 815 | } |
| 816 | else |
| 817 | { |
| 818 | return 0; |
| 819 | } |
| 820 | |
| 821 | case 4984: /* atomic_bit_test_and_resetdi_1 */ |
| 822 | case 4983: /* atomic_bit_test_and_resetsi_1 */ |
| 823 | case 4982: /* atomic_bit_test_and_resethi_1 */ |
| 824 | case 4981: /* atomic_bit_test_and_complementdi_1 */ |
| 825 | case 4980: /* atomic_bit_test_and_complementsi_1 */ |
| 826 | case 4979: /* atomic_bit_test_and_complementhi_1 */ |
| 827 | case 4978: /* atomic_bit_test_and_setdi_1 */ |
| 828 | case 4977: /* atomic_bit_test_and_setsi_1 */ |
| 829 | case 4976: /* atomic_bit_test_and_sethi_1 */ |
| 830 | case 4975: /* atomic_xordi */ |
| 831 | case 4974: /* atomic_ordi */ |
| 832 | case 4973: /* atomic_anddi */ |
| 833 | case 4972: /* atomic_xorsi */ |
| 834 | case 4971: /* atomic_orsi */ |
| 835 | case 4970: /* atomic_andsi */ |
| 836 | case 4969: /* atomic_xorhi */ |
| 837 | case 4968: /* atomic_orhi */ |
| 838 | case 4967: /* atomic_andhi */ |
| 839 | case 4966: /* atomic_xorqi */ |
| 840 | case 4965: /* atomic_orqi */ |
| 841 | case 4964: /* atomic_andqi */ |
| 842 | case 4963: /* atomic_subdi */ |
| 843 | case 4962: /* atomic_subsi */ |
| 844 | case 4961: /* atomic_subhi */ |
| 845 | case 4960: /* atomic_subqi */ |
| 846 | case 4959: /* atomic_adddi */ |
| 847 | case 4958: /* atomic_addsi */ |
| 848 | case 4957: /* atomic_addhi */ |
| 849 | case 4956: /* atomic_addqi */ |
| 850 | case 4955: /* atomic_exchangedi */ |
| 851 | case 4954: /* atomic_exchangesi */ |
| 852 | case 4953: /* atomic_exchangehi */ |
| 853 | case 4952: /* atomic_exchangeqi */ |
| 854 | case 4951: /* *atomic_fetch_add_cmpdi */ |
| 855 | case 4950: /* *atomic_fetch_add_cmpsi */ |
| 856 | case 4949: /* *atomic_fetch_add_cmphi */ |
| 857 | case 4948: /* *atomic_fetch_add_cmpqi */ |
| 858 | case 4947: /* atomic_fetch_adddi */ |
| 859 | case 4946: /* atomic_fetch_addsi */ |
| 860 | case 4945: /* atomic_fetch_addhi */ |
| 861 | case 4944: /* atomic_fetch_addqi */ |
| 862 | case 4943: /* atomic_compare_and_swapdi_1 */ |
| 863 | case 4942: /* atomic_compare_and_swapsi_1 */ |
| 864 | case 4941: /* atomic_compare_and_swaphi_1 */ |
| 865 | case 4940: /* atomic_compare_and_swapqi_1 */ |
| 866 | case 4939: /* atomic_compare_and_swapti_doubleword */ |
| 867 | case 4938: /* atomic_compare_and_swapdi_doubleword */ |
| 868 | case 4933: /* atomic_storedi_fpu */ |
| 869 | case 4932: /* atomic_storedi_1 */ |
| 870 | case 4931: /* atomic_storesi_1 */ |
| 871 | case 4930: /* atomic_storehi_1 */ |
| 872 | case 4929: /* atomic_storeqi_1 */ |
| 873 | case 4928: /* atomic_loaddi_fpu */ |
| 874 | case 4927: /* mfence_nosse */ |
| 875 | case 4926: /* mfence_sse2 */ |
| 876 | case 4925: /* *sse_sfence */ |
| 877 | case 4924: /* *sse2_lfence */ |
| 878 | case 4923: /* vpopcountv8di_mask */ |
| 879 | case 4922: /* vpopcountv8di */ |
| 880 | case 4921: /* vpopcountv16si_mask */ |
| 881 | case 4920: /* vpopcountv16si */ |
| 882 | case 4901: /* *movv64si_internal */ |
| 883 | case 4900: /* *movv64sf_internal */ |
| 884 | case 4875: /* avx512f_pd512_256pd */ |
| 885 | case 4874: /* avx512f_ps512_256ps */ |
| 886 | case 4873: /* avx512f_si512_256si */ |
| 887 | case 4872: /* avx512f_pd512_pd */ |
| 888 | case 4871: /* avx512f_ps512_ps */ |
| 889 | case 4870: /* avx512f_si512_si */ |
| 890 | case 4832: /* avx512f_vgetmantv2df_round */ |
| 891 | case 4831: /* avx512f_vgetmantv2df */ |
| 892 | case 4830: /* avx512f_vgetmantv4sf_round */ |
| 893 | case 4829: /* avx512f_vgetmantv4sf */ |
| 894 | case 4828: /* avx512vl_getmantv2df_mask_round */ |
| 895 | case 4827: /* avx512vl_getmantv2df_mask */ |
| 896 | case 4826: /* avx512vl_getmantv2df_round */ |
| 897 | case 4825: /* avx512vl_getmantv2df */ |
| 898 | case 4824: /* avx512vl_getmantv4df_mask_round */ |
| 899 | case 4823: /* avx512vl_getmantv4df_mask */ |
| 900 | case 4822: /* avx512vl_getmantv4df_round */ |
| 901 | case 4821: /* avx512vl_getmantv4df */ |
| 902 | case 4820: /* avx512f_getmantv8df_mask_round */ |
| 903 | case 4819: /* avx512f_getmantv8df_mask */ |
| 904 | case 4818: /* avx512f_getmantv8df_round */ |
| 905 | case 4817: /* avx512f_getmantv8df */ |
| 906 | case 4816: /* avx512vl_getmantv4sf_mask_round */ |
| 907 | case 4815: /* avx512vl_getmantv4sf_mask */ |
| 908 | case 4814: /* avx512vl_getmantv4sf_round */ |
| 909 | case 4813: /* avx512vl_getmantv4sf */ |
| 910 | case 4812: /* avx512vl_getmantv8sf_mask_round */ |
| 911 | case 4811: /* avx512vl_getmantv8sf_mask */ |
| 912 | case 4810: /* avx512vl_getmantv8sf_round */ |
| 913 | case 4809: /* avx512vl_getmantv8sf */ |
| 914 | case 4808: /* avx512f_getmantv16sf_mask_round */ |
| 915 | case 4807: /* avx512f_getmantv16sf_mask */ |
| 916 | case 4806: /* avx512f_getmantv16sf_round */ |
| 917 | case 4805: /* avx512f_getmantv16sf */ |
| 918 | case 4758: /* avx512vl_compressstorev2df_mask */ |
| 919 | case 4757: /* avx512vl_compressstorev2di_mask */ |
| 920 | case 4756: /* avx512vl_compressstorev4sf_mask */ |
| 921 | case 4755: /* avx512vl_compressstorev4si_mask */ |
| 922 | case 4754: /* avx512vl_compressstorev4df_mask */ |
| 923 | case 4753: /* avx512vl_compressstorev4di_mask */ |
| 924 | case 4752: /* avx512vl_compressstorev8sf_mask */ |
| 925 | case 4751: /* avx512vl_compressstorev8si_mask */ |
| 926 | case 4750: /* avx512f_compressstorev8df_mask */ |
| 927 | case 4749: /* avx512f_compressstorev8di_mask */ |
| 928 | case 4748: /* avx512f_compressstorev16sf_mask */ |
| 929 | case 4747: /* avx512f_compressstorev16si_mask */ |
| 930 | case 4435: /* avx_pd256_pd */ |
| 931 | case 4434: /* avx_ps256_ps */ |
| 932 | case 4433: /* avx_si256_si */ |
| 933 | case 4252: /* *avx_vperm_broadcast_v4df */ |
| 934 | case 4251: /* *avx_vperm_broadcast_v8sf */ |
| 935 | case 3677: /* sse3_monitor_di */ |
| 936 | case 3676: /* sse3_monitor_si */ |
| 937 | case 3675: /* sse3_mwait */ |
| 938 | case 3674: /* sse2_clflush */ |
| 939 | case 3673: /* sse_stmxcsr */ |
| 940 | case 3637: /* *vec_extractv4si_zext_mem */ |
| 941 | case 3636: /* *vec_extractv4si_mem */ |
| 942 | case 3633: /* *vec_extractv4si_0_zext */ |
| 943 | case 3632: /* *vec_extractv4si_0_zext_sse4 */ |
| 944 | case 3631: /* *vec_extractv2di_0_sse */ |
| 945 | case 3630: /* *vec_extractv2di_0 */ |
| 946 | case 3629: /* *vec_extractv4si_0 */ |
| 947 | case 3628: /* *vec_extractv8hi_mem */ |
| 948 | case 3627: /* *vec_extractv16qi_mem */ |
| 949 | case 3503: /* avx512vl_testnmv2di3_mask */ |
| 950 | case 3502: /* avx512vl_testnmv2di3 */ |
| 951 | case 3501: /* avx512vl_testnmv4di3_mask */ |
| 952 | case 3500: /* avx512vl_testnmv4di3 */ |
| 953 | case 3499: /* avx512f_testnmv8di3_mask */ |
| 954 | case 3498: /* avx512f_testnmv8di3 */ |
| 955 | case 3497: /* avx512vl_testnmv4si3_mask */ |
| 956 | case 3496: /* avx512vl_testnmv4si3 */ |
| 957 | case 3495: /* avx512vl_testnmv8si3_mask */ |
| 958 | case 3494: /* avx512vl_testnmv8si3 */ |
| 959 | case 3493: /* avx512f_testnmv16si3_mask */ |
| 960 | case 3492: /* avx512f_testnmv16si3 */ |
| 961 | case 3491: /* avx512vl_testnmv8hi3_mask */ |
| 962 | case 3490: /* avx512vl_testnmv8hi3 */ |
| 963 | case 3489: /* avx512vl_testnmv16hi3_mask */ |
| 964 | case 3488: /* avx512vl_testnmv16hi3 */ |
| 965 | case 3487: /* avx512bw_testnmv32hi3_mask */ |
| 966 | case 3486: /* avx512bw_testnmv32hi3 */ |
| 967 | case 3485: /* avx512vl_testnmv32qi3_mask */ |
| 968 | case 3484: /* avx512vl_testnmv32qi3 */ |
| 969 | case 3483: /* avx512vl_testnmv16qi3_mask */ |
| 970 | case 3482: /* avx512vl_testnmv16qi3 */ |
| 971 | case 3481: /* avx512bw_testnmv64qi3_mask */ |
| 972 | case 3480: /* avx512bw_testnmv64qi3 */ |
| 973 | case 3479: /* avx512vl_testmv2di3_mask */ |
| 974 | case 3478: /* avx512vl_testmv2di3 */ |
| 975 | case 3477: /* avx512vl_testmv4di3_mask */ |
| 976 | case 3476: /* avx512vl_testmv4di3 */ |
| 977 | case 3475: /* avx512f_testmv8di3_mask */ |
| 978 | case 3474: /* avx512f_testmv8di3 */ |
| 979 | case 3473: /* avx512vl_testmv4si3_mask */ |
| 980 | case 3472: /* avx512vl_testmv4si3 */ |
| 981 | case 3471: /* avx512vl_testmv8si3_mask */ |
| 982 | case 3470: /* avx512vl_testmv8si3 */ |
| 983 | case 3469: /* avx512f_testmv16si3_mask */ |
| 984 | case 3468: /* avx512f_testmv16si3 */ |
| 985 | case 3467: /* avx512vl_testmv8hi3_mask */ |
| 986 | case 3466: /* avx512vl_testmv8hi3 */ |
| 987 | case 3465: /* avx512vl_testmv16hi3_mask */ |
| 988 | case 3464: /* avx512vl_testmv16hi3 */ |
| 989 | case 3463: /* avx512bw_testmv32hi3_mask */ |
| 990 | case 3462: /* avx512bw_testmv32hi3 */ |
| 991 | case 3461: /* avx512vl_testmv32qi3_mask */ |
| 992 | case 3460: /* avx512vl_testmv32qi3 */ |
| 993 | case 3459: /* avx512vl_testmv16qi3_mask */ |
| 994 | case 3458: /* avx512vl_testmv16qi3 */ |
| 995 | case 3457: /* avx512bw_testmv64qi3_mask */ |
| 996 | case 3456: /* avx512bw_testmv64qi3 */ |
| 997 | case 3191: /* avx512vl_rorv2di_mask */ |
| 998 | case 3190: /* avx512vl_rorv2di */ |
| 999 | case 3189: /* avx512vl_rolv2di_mask */ |
| 1000 | case 3188: /* avx512vl_rolv2di */ |
| 1001 | case 3187: /* avx512vl_rorv4di_mask */ |
| 1002 | case 3186: /* avx512vl_rorv4di */ |
| 1003 | case 3185: /* avx512vl_rolv4di_mask */ |
| 1004 | case 3184: /* avx512vl_rolv4di */ |
| 1005 | case 3183: /* avx512f_rorv8di_mask */ |
| 1006 | case 3182: /* avx512f_rorv8di */ |
| 1007 | case 3181: /* avx512f_rolv8di_mask */ |
| 1008 | case 3180: /* avx512f_rolv8di */ |
| 1009 | case 3179: /* avx512vl_rorv4si_mask */ |
| 1010 | case 3178: /* avx512vl_rorv4si */ |
| 1011 | case 3177: /* avx512vl_rolv4si_mask */ |
| 1012 | case 3176: /* avx512vl_rolv4si */ |
| 1013 | case 3175: /* avx512vl_rorv8si_mask */ |
| 1014 | case 3174: /* avx512vl_rorv8si */ |
| 1015 | case 3173: /* avx512vl_rolv8si_mask */ |
| 1016 | case 3172: /* avx512vl_rolv8si */ |
| 1017 | case 3171: /* avx512f_rorv16si_mask */ |
| 1018 | case 3170: /* avx512f_rorv16si */ |
| 1019 | case 3169: /* avx512f_rolv16si_mask */ |
| 1020 | case 3168: /* avx512f_rolv16si */ |
| 1021 | case 3167: /* avx512vl_rorvv2di_mask */ |
| 1022 | case 3166: /* avx512vl_rorvv2di */ |
| 1023 | case 3165: /* avx512vl_rolvv2di_mask */ |
| 1024 | case 3164: /* avx512vl_rolvv2di */ |
| 1025 | case 3163: /* avx512vl_rorvv4di_mask */ |
| 1026 | case 3162: /* avx512vl_rorvv4di */ |
| 1027 | case 3161: /* avx512vl_rolvv4di_mask */ |
| 1028 | case 3160: /* avx512vl_rolvv4di */ |
| 1029 | case 3159: /* avx512f_rorvv8di_mask */ |
| 1030 | case 3158: /* avx512f_rorvv8di */ |
| 1031 | case 3157: /* avx512f_rolvv8di_mask */ |
| 1032 | case 3156: /* avx512f_rolvv8di */ |
| 1033 | case 3155: /* avx512vl_rorvv4si_mask */ |
| 1034 | case 3154: /* avx512vl_rorvv4si */ |
| 1035 | case 3153: /* avx512vl_rolvv4si_mask */ |
| 1036 | case 3152: /* avx512vl_rolvv4si */ |
| 1037 | case 3151: /* avx512vl_rorvv8si_mask */ |
| 1038 | case 3150: /* avx512vl_rorvv8si */ |
| 1039 | case 3149: /* avx512vl_rolvv8si_mask */ |
| 1040 | case 3148: /* avx512vl_rolvv8si */ |
| 1041 | case 3147: /* avx512f_rorvv16si_mask */ |
| 1042 | case 3146: /* avx512f_rorvv16si */ |
| 1043 | case 3145: /* avx512f_rolvv16si_mask */ |
| 1044 | case 3144: /* avx512f_rolvv16si */ |
| 1045 | case 2933: /* avx512f_us_truncatev8div16qi2_mask_store */ |
| 1046 | case 2932: /* avx512f_truncatev8div16qi2_mask_store */ |
| 1047 | case 2931: /* avx512f_ss_truncatev8div16qi2_mask_store */ |
| 1048 | case 2924: /* *avx512f_us_truncatev8div16qi2_store */ |
| 1049 | case 2923: /* *avx512f_truncatev8div16qi2_store */ |
| 1050 | case 2922: /* *avx512f_ss_truncatev8div16qi2_store */ |
| 1051 | case 2918: /* avx512vl_us_truncatev2div2si2_mask_store */ |
| 1052 | case 2917: /* avx512vl_truncatev2div2si2_mask_store */ |
| 1053 | case 2916: /* avx512vl_ss_truncatev2div2si2_mask_store */ |
| 1054 | case 2909: /* *avx512vl_us_truncatev2div2si2_store */ |
| 1055 | case 2908: /* *avx512vl_truncatev2div2si2_store */ |
| 1056 | case 2907: /* *avx512vl_ss_truncatev2div2si2_store */ |
| 1057 | case 2903: /* avx512vl_us_truncatev2div2hi2_mask_store */ |
| 1058 | case 2902: /* avx512vl_truncatev2div2hi2_mask_store */ |
| 1059 | case 2901: /* avx512vl_ss_truncatev2div2hi2_mask_store */ |
| 1060 | case 2894: /* *avx512vl_us_truncatev2div2hi2_store */ |
| 1061 | case 2893: /* *avx512vl_truncatev2div2hi2_store */ |
| 1062 | case 2892: /* *avx512vl_ss_truncatev2div2hi2_store */ |
| 1063 | case 2891: /* avx512vl_us_truncatev4div4hi2_mask_store */ |
| 1064 | case 2890: /* avx512vl_truncatev4div4hi2_mask_store */ |
| 1065 | case 2889: /* avx512vl_ss_truncatev4div4hi2_mask_store */ |
| 1066 | case 2888: /* avx512vl_us_truncatev4siv4hi2_mask_store */ |
| 1067 | case 2887: /* avx512vl_truncatev4siv4hi2_mask_store */ |
| 1068 | case 2886: /* avx512vl_ss_truncatev4siv4hi2_mask_store */ |
| 1069 | case 2873: /* *avx512vl_us_truncatev4div4hi2_store */ |
| 1070 | case 2872: /* *avx512vl_truncatev4div4hi2_store */ |
| 1071 | case 2871: /* *avx512vl_ss_truncatev4div4hi2_store */ |
| 1072 | case 2870: /* *avx512vl_us_truncatev4siv4hi2_store */ |
| 1073 | case 2869: /* *avx512vl_truncatev4siv4hi2_store */ |
| 1074 | case 2868: /* *avx512vl_ss_truncatev4siv4hi2_store */ |
| 1075 | case 2858: /* avx512vl_us_truncatev8siv8qi2_mask_store */ |
| 1076 | case 2857: /* avx512vl_truncatev8siv8qi2_mask_store */ |
| 1077 | case 2856: /* avx512vl_ss_truncatev8siv8qi2_mask_store */ |
| 1078 | case 2855: /* avx512vl_us_truncatev8hiv8qi2_mask_store */ |
| 1079 | case 2854: /* avx512vl_truncatev8hiv8qi2_mask_store */ |
| 1080 | case 2853: /* avx512vl_ss_truncatev8hiv8qi2_mask_store */ |
| 1081 | case 2840: /* *avx512vl_us_truncatev8siv8qi2_store */ |
| 1082 | case 2839: /* *avx512vl_truncatev8siv8qi2_store */ |
| 1083 | case 2838: /* *avx512vl_ss_truncatev8siv8qi2_store */ |
| 1084 | case 2837: /* *avx512vl_us_truncatev8hiv8qi2_store */ |
| 1085 | case 2836: /* *avx512vl_truncatev8hiv8qi2_store */ |
| 1086 | case 2835: /* *avx512vl_ss_truncatev8hiv8qi2_store */ |
| 1087 | case 2834: /* avx512vl_us_truncatev4div4qi2_mask_store */ |
| 1088 | case 2833: /* avx512vl_truncatev4div4qi2_mask_store */ |
| 1089 | case 2832: /* avx512vl_ss_truncatev4div4qi2_mask_store */ |
| 1090 | case 2831: /* avx512vl_us_truncatev4siv4qi2_mask_store */ |
| 1091 | case 2830: /* avx512vl_truncatev4siv4qi2_mask_store */ |
| 1092 | case 2829: /* avx512vl_ss_truncatev4siv4qi2_mask_store */ |
| 1093 | case 2816: /* *avx512vl_us_truncatev4div4qi2_store */ |
| 1094 | case 2815: /* *avx512vl_truncatev4div4qi2_store */ |
| 1095 | case 2814: /* *avx512vl_ss_truncatev4div4qi2_store */ |
| 1096 | case 2813: /* *avx512vl_us_truncatev4siv4qi2_store */ |
| 1097 | case 2812: /* *avx512vl_truncatev4siv4qi2_store */ |
| 1098 | case 2811: /* *avx512vl_ss_truncatev4siv4qi2_store */ |
| 1099 | case 2810: /* avx512vl_us_truncatev2div2qi2_mask_store */ |
| 1100 | case 2809: /* avx512vl_truncatev2div2qi2_mask_store */ |
| 1101 | case 2808: /* avx512vl_ss_truncatev2div2qi2_mask_store */ |
| 1102 | case 2801: /* *avx512vl_us_truncatev2div2qi2_store */ |
| 1103 | case 2800: /* *avx512vl_truncatev2div2qi2_store */ |
| 1104 | case 2799: /* *avx512vl_ss_truncatev2div2qi2_store */ |
| 1105 | case 2704: /* avx512f_rndscalev2df_round */ |
| 1106 | case 2703: /* avx512f_rndscalev2df */ |
| 1107 | case 2702: /* avx512f_rndscalev4sf_round */ |
| 1108 | case 2701: /* avx512f_rndscalev4sf */ |
| 1109 | case 2700: /* avx512vl_rndscalev2df_mask_round */ |
| 1110 | case 2699: /* avx512vl_rndscalev2df_mask */ |
| 1111 | case 2698: /* avx512vl_rndscalev2df_round */ |
| 1112 | case 2697: /* avx512vl_rndscalev2df */ |
| 1113 | case 2696: /* avx512vl_rndscalev4df_mask_round */ |
| 1114 | case 2695: /* avx512vl_rndscalev4df_mask */ |
| 1115 | case 2694: /* avx512vl_rndscalev4df_round */ |
| 1116 | case 2693: /* avx512vl_rndscalev4df */ |
| 1117 | case 2692: /* avx512f_rndscalev8df_mask_round */ |
| 1118 | case 2691: /* avx512f_rndscalev8df_mask */ |
| 1119 | case 2690: /* avx512f_rndscalev8df_round */ |
| 1120 | case 2689: /* avx512f_rndscalev8df */ |
| 1121 | case 2688: /* avx512vl_rndscalev4sf_mask_round */ |
| 1122 | case 2687: /* avx512vl_rndscalev4sf_mask */ |
| 1123 | case 2686: /* avx512vl_rndscalev4sf_round */ |
| 1124 | case 2685: /* avx512vl_rndscalev4sf */ |
| 1125 | case 2684: /* avx512vl_rndscalev8sf_mask_round */ |
| 1126 | case 2683: /* avx512vl_rndscalev8sf_mask */ |
| 1127 | case 2682: /* avx512vl_rndscalev8sf_round */ |
| 1128 | case 2681: /* avx512vl_rndscalev8sf */ |
| 1129 | case 2680: /* avx512f_rndscalev16sf_mask_round */ |
| 1130 | case 2679: /* avx512f_rndscalev16sf_mask */ |
| 1131 | case 2678: /* avx512f_rndscalev16sf_round */ |
| 1132 | case 2677: /* avx512f_rndscalev16sf */ |
| 1133 | case 2676: /* avx512f_sfixupimmv2df_mask_round */ |
| 1134 | case 2675: /* avx512f_sfixupimmv2df_mask */ |
| 1135 | case 2674: /* avx512f_sfixupimmv4sf_mask_round */ |
| 1136 | case 2673: /* avx512f_sfixupimmv4sf_mask */ |
| 1137 | case 2672: /* avx512f_sfixupimmv2df_maskz_1_round */ |
| 1138 | case 2671: /* avx512f_sfixupimmv2df_maskz_1 */ |
| 1139 | case 2670: /* avx512f_sfixupimmv2df_round */ |
| 1140 | case 2669: /* avx512f_sfixupimmv2df */ |
| 1141 | case 2668: /* avx512f_sfixupimmv4sf_maskz_1_round */ |
| 1142 | case 2667: /* avx512f_sfixupimmv4sf_maskz_1 */ |
| 1143 | case 2666: /* avx512f_sfixupimmv4sf_round */ |
| 1144 | case 2665: /* avx512f_sfixupimmv4sf */ |
| 1145 | case 2664: /* avx512vl_fixupimmv2df_mask_round */ |
| 1146 | case 2663: /* avx512vl_fixupimmv2df_mask */ |
| 1147 | case 2662: /* avx512vl_fixupimmv4df_mask_round */ |
| 1148 | case 2661: /* avx512vl_fixupimmv4df_mask */ |
| 1149 | case 2660: /* avx512f_fixupimmv8df_mask_round */ |
| 1150 | case 2659: /* avx512f_fixupimmv8df_mask */ |
| 1151 | case 2658: /* avx512vl_fixupimmv4sf_mask_round */ |
| 1152 | case 2657: /* avx512vl_fixupimmv4sf_mask */ |
| 1153 | case 2656: /* avx512vl_fixupimmv8sf_mask_round */ |
| 1154 | case 2655: /* avx512vl_fixupimmv8sf_mask */ |
| 1155 | case 2654: /* avx512f_fixupimmv16sf_mask_round */ |
| 1156 | case 2653: /* avx512f_fixupimmv16sf_mask */ |
| 1157 | case 2652: /* avx512vl_fixupimmv2df_maskz_1_round */ |
| 1158 | case 2651: /* avx512vl_fixupimmv2df_maskz_1 */ |
| 1159 | case 2650: /* avx512vl_fixupimmv2df_round */ |
| 1160 | case 2649: /* avx512vl_fixupimmv2df */ |
| 1161 | case 2648: /* avx512vl_fixupimmv4df_maskz_1_round */ |
| 1162 | case 2647: /* avx512vl_fixupimmv4df_maskz_1 */ |
| 1163 | case 2646: /* avx512vl_fixupimmv4df_round */ |
| 1164 | case 2645: /* avx512vl_fixupimmv4df */ |
| 1165 | case 2644: /* avx512f_fixupimmv8df_maskz_1_round */ |
| 1166 | case 2643: /* avx512f_fixupimmv8df_maskz_1 */ |
| 1167 | case 2642: /* avx512f_fixupimmv8df_round */ |
| 1168 | case 2641: /* avx512f_fixupimmv8df */ |
| 1169 | case 2640: /* avx512vl_fixupimmv4sf_maskz_1_round */ |
| 1170 | case 2639: /* avx512vl_fixupimmv4sf_maskz_1 */ |
| 1171 | case 2638: /* avx512vl_fixupimmv4sf_round */ |
| 1172 | case 2637: /* avx512vl_fixupimmv4sf */ |
| 1173 | case 2636: /* avx512vl_fixupimmv8sf_maskz_1_round */ |
| 1174 | case 2635: /* avx512vl_fixupimmv8sf_maskz_1 */ |
| 1175 | case 2634: /* avx512vl_fixupimmv8sf_round */ |
| 1176 | case 2633: /* avx512vl_fixupimmv8sf */ |
| 1177 | case 2632: /* avx512f_fixupimmv16sf_maskz_1_round */ |
| 1178 | case 2631: /* avx512f_fixupimmv16sf_maskz_1 */ |
| 1179 | case 2630: /* avx512f_fixupimmv16sf_round */ |
| 1180 | case 2629: /* avx512f_fixupimmv16sf */ |
| 1181 | case 2628: /* avx512vl_alignv2di_mask */ |
| 1182 | case 2627: /* *avx512vl_alignv2di */ |
| 1183 | case 2626: /* avx512vl_alignv4di_mask */ |
| 1184 | case 2625: /* *avx512vl_alignv4di */ |
| 1185 | case 2624: /* avx512f_alignv8di_mask */ |
| 1186 | case 2623: /* *avx512f_alignv8di */ |
| 1187 | case 2622: /* avx512vl_alignv4si_mask */ |
| 1188 | case 2621: /* *avx512vl_alignv4si */ |
| 1189 | case 2620: /* avx512vl_alignv8si_mask */ |
| 1190 | case 2619: /* *avx512vl_alignv8si */ |
| 1191 | case 2618: /* avx512f_alignv16si_mask */ |
| 1192 | case 2617: /* *avx512f_alignv16si */ |
| 1193 | case 2616: /* avx512f_sgetexpv2df_round */ |
| 1194 | case 2615: /* avx512f_sgetexpv2df */ |
| 1195 | case 2614: /* avx512f_sgetexpv4sf_round */ |
| 1196 | case 2613: /* avx512f_sgetexpv4sf */ |
| 1197 | case 2612: /* avx512vl_getexpv2df_mask_round */ |
| 1198 | case 2611: /* avx512vl_getexpv2df_mask */ |
| 1199 | case 2610: /* avx512vl_getexpv2df_round */ |
| 1200 | case 2609: /* avx512vl_getexpv2df */ |
| 1201 | case 2608: /* avx512vl_getexpv4df_mask_round */ |
| 1202 | case 2607: /* avx512vl_getexpv4df_mask */ |
| 1203 | case 2606: /* avx512vl_getexpv4df_round */ |
| 1204 | case 2605: /* avx512vl_getexpv4df */ |
| 1205 | case 2604: /* avx512f_getexpv8df_mask_round */ |
| 1206 | case 2603: /* avx512f_getexpv8df_mask */ |
| 1207 | case 2602: /* avx512f_getexpv8df_round */ |
| 1208 | case 2601: /* avx512f_getexpv8df */ |
| 1209 | case 2600: /* avx512vl_getexpv4sf_mask_round */ |
| 1210 | case 2599: /* avx512vl_getexpv4sf_mask */ |
| 1211 | case 2598: /* avx512vl_getexpv4sf_round */ |
| 1212 | case 2597: /* avx512vl_getexpv4sf */ |
| 1213 | case 2596: /* avx512vl_getexpv8sf_mask_round */ |
| 1214 | case 2595: /* avx512vl_getexpv8sf_mask */ |
| 1215 | case 2594: /* avx512vl_getexpv8sf_round */ |
| 1216 | case 2593: /* avx512vl_getexpv8sf */ |
| 1217 | case 2592: /* avx512f_getexpv16sf_mask_round */ |
| 1218 | case 2591: /* avx512f_getexpv16sf_mask */ |
| 1219 | case 2590: /* avx512f_getexpv16sf_round */ |
| 1220 | case 2589: /* avx512f_getexpv16sf */ |
| 1221 | case 2570: /* avx512vl_scalefv2df_mask_round */ |
| 1222 | case 2569: /* avx512vl_scalefv2df_mask */ |
| 1223 | case 2568: /* avx512vl_scalefv2df_round */ |
| 1224 | case 2567: /* avx512vl_scalefv2df */ |
| 1225 | case 2566: /* avx512vl_scalefv4df_mask_round */ |
| 1226 | case 2565: /* avx512vl_scalefv4df_mask */ |
| 1227 | case 2564: /* avx512vl_scalefv4df_round */ |
| 1228 | case 2563: /* avx512vl_scalefv4df */ |
| 1229 | case 2562: /* avx512f_scalefv8df_mask_round */ |
| 1230 | case 2561: /* avx512f_scalefv8df_mask */ |
| 1231 | case 2560: /* avx512f_scalefv8df_round */ |
| 1232 | case 2559: /* avx512f_scalefv8df */ |
| 1233 | case 2558: /* avx512vl_scalefv4sf_mask_round */ |
| 1234 | case 2557: /* avx512vl_scalefv4sf_mask */ |
| 1235 | case 2556: /* avx512vl_scalefv4sf_round */ |
| 1236 | case 2555: /* avx512vl_scalefv4sf */ |
| 1237 | case 2554: /* avx512vl_scalefv8sf_mask_round */ |
| 1238 | case 2553: /* avx512vl_scalefv8sf_mask */ |
| 1239 | case 2552: /* avx512vl_scalefv8sf_round */ |
| 1240 | case 2551: /* avx512vl_scalefv8sf */ |
| 1241 | case 2550: /* avx512f_scalefv16sf_mask_round */ |
| 1242 | case 2549: /* avx512f_scalefv16sf_mask */ |
| 1243 | case 2548: /* avx512f_scalefv16sf_round */ |
| 1244 | case 2547: /* avx512f_scalefv16sf */ |
| 1245 | case 2546: /* avx512f_vmscalefv2df_round */ |
| 1246 | case 2545: /* avx512f_vmscalefv2df */ |
| 1247 | case 2544: /* avx512f_vmscalefv4sf_round */ |
| 1248 | case 2543: /* avx512f_vmscalefv4sf */ |
| 1249 | case 2529: /* vec_extract_lo_v32qi */ |
| 1250 | case 2527: /* vec_extract_lo_v64qi */ |
| 1251 | case 2525: /* vec_extract_lo_v16hi */ |
| 1252 | case 2523: /* vec_extract_lo_v32hi */ |
| 1253 | case 2502: /* vec_extract_lo_v16si_mask */ |
| 1254 | case 2501: /* vec_extract_lo_v16si */ |
| 1255 | case 2500: /* vec_extract_lo_v16sf_mask */ |
| 1256 | case 2499: /* vec_extract_lo_v16sf */ |
| 1257 | case 2488: /* vec_extract_hi_v8di_maskm */ |
| 1258 | case 2487: /* vec_extract_hi_v8df_maskm */ |
| 1259 | case 2472: /* avx512f_vextracti32x4_1_maskm */ |
| 1260 | case 2471: /* avx512f_vextractf32x4_1_maskm */ |
| 1261 | case 2470: /* avx512dq_vextracti64x2_1_maskm */ |
| 1262 | case 2469: /* avx512dq_vextractf64x2_1_maskm */ |
| 1263 | case 2468: /* *vec_extractv4sf_mem */ |
| 1264 | case 2466: /* *vec_extractv4sf_0 */ |
| 1265 | case 2415: /* *avx512vl_cvtmask2qv2di */ |
| 1266 | case 2414: /* *avx512vl_cvtmask2qv4di */ |
| 1267 | case 2413: /* *avx512f_cvtmask2qv8di */ |
| 1268 | case 2412: /* *avx512vl_cvtmask2dv4si */ |
| 1269 | case 2411: /* *avx512vl_cvtmask2dv8si */ |
| 1270 | case 2410: /* *avx512f_cvtmask2dv16si */ |
| 1271 | case 2409: /* *avx512vl_cvtmask2wv8hi */ |
| 1272 | case 2408: /* *avx512vl_cvtmask2wv16hi */ |
| 1273 | case 2407: /* *avx512bw_cvtmask2wv32hi */ |
| 1274 | case 2406: /* *avx512vl_cvtmask2bv32qi */ |
| 1275 | case 2405: /* *avx512vl_cvtmask2bv16qi */ |
| 1276 | case 2404: /* *avx512bw_cvtmask2bv64qi */ |
| 1277 | case 2403: /* avx512vl_cvtq2maskv2di */ |
| 1278 | case 2402: /* avx512vl_cvtq2maskv4di */ |
| 1279 | case 2401: /* avx512f_cvtq2maskv8di */ |
| 1280 | case 2400: /* avx512vl_cvtd2maskv4si */ |
| 1281 | case 2399: /* avx512vl_cvtd2maskv8si */ |
| 1282 | case 2398: /* avx512f_cvtd2maskv16si */ |
| 1283 | case 2397: /* avx512vl_cvtw2maskv8hi */ |
| 1284 | case 2396: /* avx512vl_cvtw2maskv16hi */ |
| 1285 | case 2395: /* avx512bw_cvtw2maskv32hi */ |
| 1286 | case 2394: /* avx512vl_cvtb2maskv32qi */ |
| 1287 | case 2393: /* avx512vl_cvtb2maskv16qi */ |
| 1288 | case 2392: /* avx512bw_cvtb2maskv64qi */ |
| 1289 | case 1360: /* *absnegv2df2 */ |
| 1290 | case 1359: /* *absnegv4df2 */ |
| 1291 | case 1358: /* *absnegv8df2 */ |
| 1292 | case 1357: /* *absnegv4sf2 */ |
| 1293 | case 1356: /* *absnegv8sf2 */ |
| 1294 | case 1355: /* *absnegv16sf2 */ |
| 1295 | case 1354: /* kunpckdi */ |
| 1296 | case 1353: /* kunpcksi */ |
| 1297 | case 1294: /* movdi_to_sse */ |
| 1298 | case 1292: /* avx512vl_storev8hi_mask */ |
| 1299 | case 1291: /* avx512vl_storev16hi_mask */ |
| 1300 | case 1290: /* avx512bw_storev32hi_mask */ |
| 1301 | case 1289: /* avx512vl_storev32qi_mask */ |
| 1302 | case 1288: /* avx512vl_storev16qi_mask */ |
| 1303 | case 1287: /* avx512bw_storev64qi_mask */ |
| 1304 | case 1286: /* avx512vl_storev2df_mask */ |
| 1305 | case 1285: /* avx512vl_storev4df_mask */ |
| 1306 | case 1284: /* avx512f_storev8df_mask */ |
| 1307 | case 1283: /* avx512vl_storev4sf_mask */ |
| 1308 | case 1282: /* avx512vl_storev8sf_mask */ |
| 1309 | case 1281: /* avx512f_storev16sf_mask */ |
| 1310 | case 1280: /* avx512vl_storev2di_mask */ |
| 1311 | case 1279: /* avx512vl_storev4di_mask */ |
| 1312 | case 1278: /* avx512f_storev8di_mask */ |
| 1313 | case 1277: /* avx512vl_storev4si_mask */ |
| 1314 | case 1276: /* avx512vl_storev8si_mask */ |
| 1315 | case 1275: /* avx512f_storev16si_mask */ |
| 1316 | case 1209: /* *vec_extractv2si_zext_mem */ |
| 1317 | case 1207: /* *vec_extractv2si_0 */ |
| 1318 | case 1137: /* *vec_extractv2sf_0 */ |
| 1319 | case 1105: /* rdpid */ |
| 1320 | case 1104: /* *wrpkru */ |
| 1321 | case 1103: /* *rdpkru */ |
| 1322 | case 1100: /* *bnd64_stx */ |
| 1323 | case 1099: /* *bnd32_stx */ |
| 1324 | case 1086: /* clzero_di */ |
| 1325 | case 1085: /* clzero_si */ |
| 1326 | case 1084: /* monitorx_di */ |
| 1327 | case 1083: /* monitorx_si */ |
| 1328 | case 1082: /* mwaitx */ |
| 1329 | case 1081: /* clflushopt */ |
| 1330 | case 1080: /* clwb */ |
| 1331 | case 1079: /* xtest_1 */ |
| 1332 | case 1078: /* xabort */ |
| 1333 | case 1077: /* xend */ |
| 1334 | case 1076: /* xbegin_1 */ |
| 1335 | case 1075: /* *pause */ |
| 1336 | case 1074: /* rdseeddi_1 */ |
| 1337 | case 1073: /* rdseedsi_1 */ |
| 1338 | case 1072: /* rdseedhi_1 */ |
| 1339 | case 1071: /* rdranddi_1 */ |
| 1340 | case 1070: /* rdrandsi_1 */ |
| 1341 | case 1069: /* rdrandhi_1 */ |
| 1342 | case 1068: /* wrgsbasedi */ |
| 1343 | case 1067: /* wrfsbasedi */ |
| 1344 | case 1066: /* wrgsbasesi */ |
| 1345 | case 1065: /* wrfsbasesi */ |
| 1346 | case 1064: /* rdgsbasedi */ |
| 1347 | case 1063: /* rdfsbasedi */ |
| 1348 | case 1062: /* rdgsbasesi */ |
| 1349 | case 1061: /* rdfsbasesi */ |
| 1350 | case 1060: /* *lwp_lwpinsdi3_1 */ |
| 1351 | case 1059: /* *lwp_lwpinssi3_1 */ |
| 1352 | case 1058: /* *lwp_lwpvaldi3_1 */ |
| 1353 | case 1057: /* *lwp_lwpvalsi3_1 */ |
| 1354 | case 1056: /* lwp_slwpcbdi */ |
| 1355 | case 1055: /* lwp_slwpcbsi */ |
| 1356 | case 1054: /* *lwp_llwpcbdi1 */ |
| 1357 | case 1053: /* *lwp_llwpcbsi1 */ |
| 1358 | case 1049: /* fnstenv */ |
| 1359 | case 1042: /* xsaves64 */ |
| 1360 | case 1041: /* xsavec64 */ |
| 1361 | case 1040: /* xsaveopt64 */ |
| 1362 | case 1039: /* xsave64 */ |
| 1363 | case 1038: /* xsaves_rex64 */ |
| 1364 | case 1037: /* xsavec_rex64 */ |
| 1365 | case 1036: /* xsaveopt_rex64 */ |
| 1366 | case 1035: /* xsave_rex64 */ |
| 1367 | case 1034: /* xsaves */ |
| 1368 | case 1033: /* xsavec */ |
| 1369 | case 1032: /* xsaveopt */ |
| 1370 | case 1031: /* xsave */ |
| 1371 | case 1028: /* fxsave64 */ |
| 1372 | case 1027: /* fxsave */ |
| 1373 | case 1026: /* rdtscp_rex64 */ |
| 1374 | case 1025: /* rdtscp */ |
| 1375 | case 1024: /* rdtsc_rex64 */ |
| 1376 | case 1023: /* rdtsc */ |
| 1377 | case 1022: /* rdpmc_rex64 */ |
| 1378 | case 1021: /* rdpmc */ |
| 1379 | case 1016: /* stack_tls_protect_test_di */ |
| 1380 | case 1015: /* stack_tls_protect_test_si */ |
| 1381 | case 1014: /* stack_protect_test_di */ |
| 1382 | case 1013: /* stack_protect_test_si */ |
| 1383 | case 1012: /* stack_tls_protect_set_di */ |
| 1384 | case 1011: /* stack_tls_protect_set_si */ |
| 1385 | case 1010: /* stack_protect_set_di */ |
| 1386 | case 1009: /* stack_protect_set_si */ |
| 1387 | case 1005: /* trap */ |
| 1388 | case 1004: /* probe_stack_rangedi */ |
| 1389 | case 1003: /* probe_stack_rangesi */ |
| 1390 | case 1002: /* adjust_stack_and_probedi */ |
| 1391 | case 1001: /* adjust_stack_and_probesi */ |
| 1392 | case 998: /* allocate_stack_worker_probe_di */ |
| 1393 | case 997: /* allocate_stack_worker_probe_si */ |
| 1394 | case 934: /* cld */ |
| 1395 | case 932: /* fxamdf2_i387_with_temp */ |
| 1396 | case 931: /* fxamsf2_i387_with_temp */ |
| 1397 | case 930: /* fxamxf2_i387 */ |
| 1398 | case 929: /* fxamdf2_i387 */ |
| 1399 | case 928: /* fxamsf2_i387 */ |
| 1400 | case 811: /* *tls_dynamic_gnu2_combine_64 */ |
| 1401 | case 808: /* *tls_dynamic_gnu2_combine_32 */ |
| 1402 | case 797: /* *tls_local_dynamic_32_once */ |
| 1403 | case 796: /* *tls_local_dynamic_base_64_largepic */ |
| 1404 | case 795: /* *tls_local_dynamic_base_64_di */ |
| 1405 | case 794: /* *tls_local_dynamic_base_64_si */ |
| 1406 | case 793: /* *tls_local_dynamic_base_32_gnu */ |
| 1407 | case 792: /* *tls_global_dynamic_64_largepic */ |
| 1408 | case 791: /* *tls_global_dynamic_64_di */ |
| 1409 | case 790: /* *tls_global_dynamic_64_si */ |
| 1410 | case 789: /* *tls_global_dynamic_32_gnu */ |
| 1411 | case 788: /* *parityhi2_cmp */ |
| 1412 | case 787: /* paritysi2_cmp */ |
| 1413 | case 786: /* paritydi2_cmp */ |
| 1414 | case 785: /* bswaphi_lowpart */ |
| 1415 | case 784: /* *bswaphi_lowpart_1 */ |
| 1416 | case 778: /* *popcounthi2_1 */ |
| 1417 | case 706: /* ffssi2_no_cmove */ |
| 1418 | case 705: /* split_stack_return */ |
| 1419 | case 702: /* eh_return_internal */ |
| 1420 | case 698: /* *set_got_labelled */ |
| 1421 | case 697: /* *set_got */ |
| 1422 | case 696: /* pad */ |
| 1423 | case 695: /* nops */ |
| 1424 | case 694: /* nop */ |
| 1425 | case 692: /* simple_return_pop_internal */ |
| 1426 | case 691: /* simple_return_internal_long */ |
| 1427 | case 690: /* interrupt_return */ |
| 1428 | case 689: /* simple_return_internal */ |
| 1429 | case 688: /* prologue_use */ |
| 1430 | case 687: /* *memory_blockage */ |
| 1431 | case 686: /* blockage */ |
| 1432 | case 658: /* *jccxf_si_r_i387 */ |
| 1433 | case 657: /* *jccdf_si_r_i387 */ |
| 1434 | case 656: /* *jccsf_si_r_i387 */ |
| 1435 | case 655: /* *jccxf_hi_r_i387 */ |
| 1436 | case 654: /* *jccdf_hi_r_i387 */ |
| 1437 | case 653: /* *jccsf_hi_r_i387 */ |
| 1438 | case 652: /* *jccxf_si_i387 */ |
| 1439 | case 651: /* *jccdf_si_i387 */ |
| 1440 | case 650: /* *jccsf_si_i387 */ |
| 1441 | case 649: /* *jccxf_hi_i387 */ |
| 1442 | case 648: /* *jccdf_hi_i387 */ |
| 1443 | case 647: /* *jccsf_hi_i387 */ |
| 1444 | case 646: /* *jccuxf_r_i387 */ |
| 1445 | case 645: /* *jccudf_r_i387 */ |
| 1446 | case 644: /* *jccusf_r_i387 */ |
| 1447 | case 643: /* *jccuxf_i387 */ |
| 1448 | case 642: /* *jccudf_i387 */ |
| 1449 | case 641: /* *jccusf_i387 */ |
| 1450 | case 640: /* *jccdf_r_i387 */ |
| 1451 | case 639: /* *jccsf_r_i387 */ |
| 1452 | case 638: /* *jccdf_i387 */ |
| 1453 | case 637: /* *jccsf_i387 */ |
| 1454 | case 636: /* *jccxf_r_i387 */ |
| 1455 | case 635: /* *jccxf_i387 */ |
| 1456 | case 634: /* *jccxf_0_r_i387 */ |
| 1457 | case 633: /* *jccdf_0_r_i387 */ |
| 1458 | case 632: /* *jccsf_0_r_i387 */ |
| 1459 | case 631: /* *jccxf_0_i387 */ |
| 1460 | case 630: /* *jccdf_0_i387 */ |
| 1461 | case 629: /* *jccsf_0_i387 */ |
| 1462 | case 622: /* *setcc_si_1_movzbl */ |
| 1463 | case 621: /* *setcc_si_1_and */ |
| 1464 | case 620: /* *setcc_di_1 */ |
| 1465 | case 619: /* *jcc_btdi_mask */ |
| 1466 | case 618: /* *jcc_btsi_mask */ |
| 1467 | case 617: /* *jcc_btdi_1 */ |
| 1468 | case 616: /* *jcc_btsi_1 */ |
| 1469 | case 615: /* *jcc_btdi */ |
| 1470 | case 614: /* *jcc_btsi */ |
| 1471 | case 593: /* ix86_rotrti3_doubleword */ |
| 1472 | case 592: /* ix86_rotrdi3_doubleword */ |
| 1473 | case 591: /* ix86_rotlti3_doubleword */ |
| 1474 | case 590: /* ix86_rotldi3_doubleword */ |
| 1475 | case 589: /* *rotrdi3_mask */ |
| 1476 | case 588: /* *rotldi3_mask */ |
| 1477 | case 587: /* *rotrsi3_mask */ |
| 1478 | case 586: /* *rotlsi3_mask */ |
| 1479 | case 544: /* *ashrti3_doubleword */ |
| 1480 | case 543: /* *lshrti3_doubleword */ |
| 1481 | case 542: /* *ashrdi3_doubleword */ |
| 1482 | case 541: /* *lshrdi3_doubleword */ |
| 1483 | case 540: /* *ashrdi3_mask */ |
| 1484 | case 539: /* *lshrdi3_mask */ |
| 1485 | case 538: /* *ashrsi3_mask */ |
| 1486 | case 537: /* *lshrsi3_mask */ |
| 1487 | case 518: /* *ashldi3_mask */ |
| 1488 | case 517: /* *ashlsi3_mask */ |
| 1489 | case 514: /* *ashlti3_doubleword */ |
| 1490 | case 513: /* *ashldi3_doubleword */ |
| 1491 | case 502: /* *one_cmpldi2_doubleword */ |
| 1492 | case 501: /* copysigntf3_var */ |
| 1493 | case 500: /* copysigndf3_var */ |
| 1494 | case 499: /* copysignsf3_var */ |
| 1495 | case 498: /* copysigntf3_const */ |
| 1496 | case 497: /* copysigndf3_const */ |
| 1497 | case 496: /* copysignsf3_const */ |
| 1498 | case 483: /* *absnegtf2_sse */ |
| 1499 | case 482: /* *absnegxf2_i387 */ |
| 1500 | case 481: /* *absnegdf2 */ |
| 1501 | case 480: /* *absnegsf2 */ |
| 1502 | case 465: /* *negti2_doubleword */ |
| 1503 | case 464: /* *negdi2_doubleword */ |
| 1504 | case 422: /* *xordi3_doubleword */ |
| 1505 | case 421: /* *iordi3_doubleword */ |
| 1506 | case 414: /* *andndi3_doubleword */ |
| 1507 | case 397: /* *anddi3_doubleword */ |
| 1508 | case 396: /* *testqi_ext_3 */ |
| 1509 | case 395: /* *testqi_ext_3 */ |
| 1510 | case 394: /* *testqi_ext_3 */ |
| 1511 | case 382: /* *udivmoddi4_pow2 */ |
| 1512 | case 381: /* *udivmodsi4_pow2 */ |
| 1513 | case 380: /* *udivmoddi4 */ |
| 1514 | case 379: /* *udivmodsi4 */ |
| 1515 | case 378: /* *udivmodhi4 */ |
| 1516 | case 377: /* udivmoddi4_1 */ |
| 1517 | case 376: /* udivmodsi4_1 */ |
| 1518 | case 371: /* *divmoddi4 */ |
| 1519 | case 370: /* *divmodsi4 */ |
| 1520 | case 369: /* *divmodhi4 */ |
| 1521 | case 368: /* divmoddi4_1 */ |
| 1522 | case 367: /* divmodsi4_1 */ |
| 1523 | case 270: /* *subti3_doubleword */ |
| 1524 | case 269: /* *subdi3_doubleword */ |
| 1525 | case 216: /* *addti3_doubleword */ |
| 1526 | case 215: /* *adddi3_doubleword */ |
| 1527 | case 212: /* *floatunssixf2_i387_with_xmm */ |
| 1528 | case 211: /* *floatunssidf2_i387_with_xmm */ |
| 1529 | case 210: /* *floatunssisf2_i387_with_xmm */ |
| 1530 | case 209: /* floatdixf2_i387_with_xmm */ |
| 1531 | case 208: /* floatdidf2_i387_with_xmm */ |
| 1532 | case 207: /* floatdisf2_i387_with_xmm */ |
| 1533 | case 193: /* x86_fldcw_1 */ |
| 1534 | case 192: /* x86_fnstcw_1 */ |
| 1535 | case 169: /* *fixuns_truncdf_1 */ |
| 1536 | case 168: /* *fixuns_truncsf_1 */ |
| 1537 | case 146: /* extendsidi2_1 */ |
| 1538 | case 144: /* *zextsi_doubleword */ |
| 1539 | case 143: /* *zexthi_doubleword */ |
| 1540 | case 142: /* *zextqi_doubleword */ |
| 1541 | case 141: /* *zexthi_doubleword_and */ |
| 1542 | case 140: /* *zextqi_doubleword_and */ |
| 1543 | case 121: /* *pushdf */ |
| 1544 | case 120: /* *pushxf */ |
| 1545 | case 119: /* *pushxf_rounded */ |
| 1546 | case 118: /* *pushxf_rounded */ |
| 1547 | case 117: /* *pushtf */ |
| 1548 | case 56: /* *pushti2 */ |
| 1549 | case 55: /* *pushdi2 */ |
| 1550 | case 48: /* x86_sahf_1 */ |
| 1551 | case 47: /* x86_fnstsw_1 */ |
| 1552 | case 46: /* *cmpxf_si_cc_i387 */ |
| 1553 | case 45: /* *cmpdf_si_cc_i387 */ |
| 1554 | case 44: /* *cmpsf_si_cc_i387 */ |
| 1555 | case 43: /* *cmpxf_hi_cc_i387 */ |
| 1556 | case 42: /* *cmpdf_hi_cc_i387 */ |
| 1557 | case 41: /* *cmpsf_hi_cc_i387 */ |
| 1558 | case 40: /* *cmpxf_si_i387 */ |
| 1559 | case 39: /* *cmpdf_si_i387 */ |
| 1560 | case 38: /* *cmpsf_si_i387 */ |
| 1561 | case 37: /* *cmpxf_hi_i387 */ |
| 1562 | case 36: /* *cmpdf_hi_i387 */ |
| 1563 | case 35: /* *cmpsf_hi_i387 */ |
| 1564 | case 34: /* *cmpuxf_cc_i387 */ |
| 1565 | case 33: /* *cmpudf_cc_i387 */ |
| 1566 | case 32: /* *cmpusf_cc_i387 */ |
| 1567 | case 31: /* *cmpuxf_i387 */ |
| 1568 | case 30: /* *cmpudf_i387 */ |
| 1569 | case 29: /* *cmpusf_i387 */ |
| 1570 | case 28: /* *cmpdf_cc_i387 */ |
| 1571 | case 27: /* *cmpsf_cc_i387 */ |
| 1572 | case 26: /* *cmpdf_i387 */ |
| 1573 | case 25: /* *cmpsf_i387 */ |
| 1574 | case 24: /* *cmpxf_cc_i387 */ |
| 1575 | case 23: /* *cmpxf_i387 */ |
| 1576 | case 22: /* *cmpxf_0_cc_i387 */ |
| 1577 | case 21: /* *cmpdf_0_cc_i387 */ |
| 1578 | case 20: /* *cmpsf_0_cc_i387 */ |
| 1579 | case 19: /* *cmpxf_0_i387 */ |
| 1580 | case 18: /* *cmpdf_0_i387 */ |
| 1581 | case 17: /* *cmpsf_0_i387 */ |
| 1582 | return 0; |
| 1583 | |
| 1584 | case 4043: /* xop_pcom_tfv2di3 */ |
| 1585 | case 4042: /* xop_pcom_tfv4si3 */ |
| 1586 | case 4041: /* xop_pcom_tfv8hi3 */ |
| 1587 | case 4040: /* xop_pcom_tfv16qi3 */ |
| 1588 | case 4039: /* xop_maskcmp_uns2v2di3 */ |
| 1589 | case 4038: /* xop_maskcmp_uns2v4si3 */ |
| 1590 | case 4037: /* xop_maskcmp_uns2v8hi3 */ |
| 1591 | case 4036: /* xop_maskcmp_uns2v16qi3 */ |
| 1592 | case 4035: /* xop_maskcmp_unsv2di3 */ |
| 1593 | case 4034: /* xop_maskcmp_unsv4si3 */ |
| 1594 | case 4033: /* xop_maskcmp_unsv8hi3 */ |
| 1595 | case 4032: /* xop_maskcmp_unsv16qi3 */ |
| 1596 | case 3890: /* ptesttf2 */ |
| 1597 | case 3889: /* avx_ptestv4df */ |
| 1598 | case 3888: /* avx_ptestv8sf */ |
| 1599 | case 3887: /* avx_ptestv4di */ |
| 1600 | case 3886: /* avx_ptestv8si */ |
| 1601 | case 3885: /* avx_ptestv16hi */ |
| 1602 | case 3884: /* avx_ptestv32qi */ |
| 1603 | case 3883: /* sse4_1_ptestv2df */ |
| 1604 | case 3882: /* sse4_1_ptestv4sf */ |
| 1605 | case 3881: /* sse4_1_ptestv2di */ |
| 1606 | case 3880: /* sse4_1_ptestv4si */ |
| 1607 | case 3879: /* sse4_1_ptestv8hi */ |
| 1608 | case 3878: /* sse4_1_ptestv16qi */ |
| 1609 | case 3877: /* avx_vtestpd */ |
| 1610 | case 3876: /* avx_vtestpd256 */ |
| 1611 | case 3875: /* avx_vtestps */ |
| 1612 | case 3874: /* avx_vtestps256 */ |
| 1613 | case 3383: /* sse2_gtv4si3 */ |
| 1614 | case 3382: /* sse2_gtv8hi3 */ |
| 1615 | case 3381: /* sse2_gtv16qi3 */ |
| 1616 | case 3380: /* avx512vl_gtv8hi3_mask */ |
| 1617 | case 3379: /* avx512vl_gtv8hi3 */ |
| 1618 | case 3378: /* avx512vl_gtv16hi3_mask */ |
| 1619 | case 3377: /* avx512vl_gtv16hi3 */ |
| 1620 | case 3376: /* avx512bw_gtv32hi3_mask */ |
| 1621 | case 3375: /* avx512bw_gtv32hi3 */ |
| 1622 | case 3374: /* avx512vl_gtv32qi3_mask */ |
| 1623 | case 3373: /* avx512vl_gtv32qi3 */ |
| 1624 | case 3372: /* avx512vl_gtv16qi3_mask */ |
| 1625 | case 3371: /* avx512vl_gtv16qi3 */ |
| 1626 | case 3370: /* avx512bw_gtv64qi3_mask */ |
| 1627 | case 3369: /* avx512bw_gtv64qi3 */ |
| 1628 | case 3368: /* avx512vl_gtv2di3_mask */ |
| 1629 | case 3367: /* avx512vl_gtv2di3 */ |
| 1630 | case 3366: /* avx512vl_gtv4di3_mask */ |
| 1631 | case 3365: /* avx512vl_gtv4di3 */ |
| 1632 | case 3364: /* avx512f_gtv8di3_mask */ |
| 1633 | case 3363: /* avx512f_gtv8di3 */ |
| 1634 | case 3362: /* avx512vl_gtv4si3_mask */ |
| 1635 | case 3361: /* avx512vl_gtv4si3 */ |
| 1636 | case 3360: /* avx512vl_gtv8si3_mask */ |
| 1637 | case 3359: /* avx512vl_gtv8si3 */ |
| 1638 | case 3358: /* avx512f_gtv16si3_mask */ |
| 1639 | case 3357: /* avx512f_gtv16si3 */ |
| 1640 | case 3356: /* avx2_gtv4di3 */ |
| 1641 | case 3355: /* avx2_gtv8si3 */ |
| 1642 | case 3354: /* avx2_gtv16hi3 */ |
| 1643 | case 3353: /* avx2_gtv32qi3 */ |
| 1644 | case 3352: /* sse4_2_gtv2di3 */ |
| 1645 | case 3351: /* *sse2_eqv4si3 */ |
| 1646 | case 3350: /* *sse2_eqv8hi3 */ |
| 1647 | case 3349: /* *sse2_eqv16qi3 */ |
| 1648 | case 3348: /* *sse4_1_eqv2di3 */ |
| 1649 | case 3347: /* avx512vl_eqv2di3_mask_1 */ |
| 1650 | case 3346: /* avx512vl_eqv2di3_1 */ |
| 1651 | case 3345: /* avx512vl_eqv4di3_mask_1 */ |
| 1652 | case 3344: /* avx512vl_eqv4di3_1 */ |
| 1653 | case 3343: /* avx512f_eqv8di3_mask_1 */ |
| 1654 | case 3342: /* avx512f_eqv8di3_1 */ |
| 1655 | case 3341: /* avx512vl_eqv4si3_mask_1 */ |
| 1656 | case 3340: /* avx512vl_eqv4si3_1 */ |
| 1657 | case 3339: /* avx512vl_eqv8si3_mask_1 */ |
| 1658 | case 3338: /* avx512vl_eqv8si3_1 */ |
| 1659 | case 3337: /* avx512f_eqv16si3_mask_1 */ |
| 1660 | case 3336: /* avx512f_eqv16si3_1 */ |
| 1661 | case 3335: /* avx512vl_eqv8hi3_mask_1 */ |
| 1662 | case 3334: /* avx512vl_eqv8hi3_1 */ |
| 1663 | case 3333: /* avx512vl_eqv16hi3_mask_1 */ |
| 1664 | case 3332: /* avx512vl_eqv16hi3_1 */ |
| 1665 | case 3331: /* avx512bw_eqv32hi3_mask_1 */ |
| 1666 | case 3330: /* avx512bw_eqv32hi3_1 */ |
| 1667 | case 3329: /* avx512vl_eqv32qi3_mask_1 */ |
| 1668 | case 3328: /* avx512vl_eqv32qi3_1 */ |
| 1669 | case 3327: /* avx512vl_eqv16qi3_mask_1 */ |
| 1670 | case 3326: /* avx512vl_eqv16qi3_1 */ |
| 1671 | case 3325: /* avx512bw_eqv64qi3_mask_1 */ |
| 1672 | case 3324: /* avx512bw_eqv64qi3_1 */ |
| 1673 | case 3323: /* *avx2_eqv4di3 */ |
| 1674 | case 3322: /* *avx2_eqv8si3 */ |
| 1675 | case 3321: /* *avx2_eqv16hi3 */ |
| 1676 | case 3320: /* *avx2_eqv32qi3 */ |
| 1677 | case 1740: /* sse2_ucomi_round */ |
| 1678 | case 1739: /* sse2_ucomi */ |
| 1679 | case 1738: /* sse_ucomi_round */ |
| 1680 | case 1737: /* sse_ucomi */ |
| 1681 | case 1736: /* sse2_comi_round */ |
| 1682 | case 1735: /* sse2_comi */ |
| 1683 | case 1734: /* sse_comi_round */ |
| 1684 | case 1733: /* sse_comi */ |
| 1685 | case 1732: /* avx512f_maskcmpv2df3 */ |
| 1686 | case 1731: /* avx512f_maskcmpv4df3 */ |
| 1687 | case 1730: /* avx512f_maskcmpv8df3 */ |
| 1688 | case 1729: /* avx512f_maskcmpv4sf3 */ |
| 1689 | case 1728: /* avx512f_maskcmpv8sf3 */ |
| 1690 | case 1727: /* avx512f_maskcmpv16sf3 */ |
| 1691 | case 1726: /* avx512f_vmcmpv2df3_mask_round */ |
| 1692 | case 1725: /* avx512f_vmcmpv2df3_mask */ |
| 1693 | case 1724: /* avx512f_vmcmpv4sf3_mask_round */ |
| 1694 | case 1723: /* avx512f_vmcmpv4sf3_mask */ |
| 1695 | case 1722: /* avx512f_vmcmpv2df3_round */ |
| 1696 | case 1721: /* avx512f_vmcmpv2df3 */ |
| 1697 | case 1720: /* avx512f_vmcmpv4sf3_round */ |
| 1698 | case 1719: /* avx512f_vmcmpv4sf3 */ |
| 1699 | case 1718: /* avx512vl_ucmpv2di3_mask */ |
| 1700 | case 1717: /* avx512vl_ucmpv2di3 */ |
| 1701 | case 1716: /* avx512vl_ucmpv4di3_mask */ |
| 1702 | case 1715: /* avx512vl_ucmpv4di3 */ |
| 1703 | case 1714: /* avx512f_ucmpv8di3_mask */ |
| 1704 | case 1713: /* avx512f_ucmpv8di3 */ |
| 1705 | case 1712: /* avx512vl_ucmpv4si3_mask */ |
| 1706 | case 1711: /* avx512vl_ucmpv4si3 */ |
| 1707 | case 1710: /* avx512vl_ucmpv8si3_mask */ |
| 1708 | case 1709: /* avx512vl_ucmpv8si3 */ |
| 1709 | case 1708: /* avx512f_ucmpv16si3_mask */ |
| 1710 | case 1707: /* avx512f_ucmpv16si3 */ |
| 1711 | case 1706: /* avx512vl_ucmpv8hi3_mask */ |
| 1712 | case 1705: /* avx512vl_ucmpv8hi3 */ |
| 1713 | case 1704: /* avx512vl_ucmpv16hi3_mask */ |
| 1714 | case 1703: /* avx512vl_ucmpv16hi3 */ |
| 1715 | case 1702: /* avx512bw_ucmpv32hi3_mask */ |
| 1716 | case 1701: /* avx512bw_ucmpv32hi3 */ |
| 1717 | case 1700: /* avx512vl_ucmpv32qi3_mask */ |
| 1718 | case 1699: /* avx512vl_ucmpv32qi3 */ |
| 1719 | case 1698: /* avx512vl_ucmpv16qi3_mask */ |
| 1720 | case 1697: /* avx512vl_ucmpv16qi3 */ |
| 1721 | case 1696: /* avx512bw_ucmpv64qi3_mask */ |
| 1722 | case 1695: /* avx512bw_ucmpv64qi3 */ |
| 1723 | case 1694: /* avx512vl_cmpv8hi3_mask */ |
| 1724 | case 1693: /* avx512vl_cmpv8hi3 */ |
| 1725 | case 1692: /* avx512vl_cmpv16hi3_mask */ |
| 1726 | case 1691: /* avx512vl_cmpv16hi3 */ |
| 1727 | case 1690: /* avx512bw_cmpv32hi3_mask */ |
| 1728 | case 1689: /* avx512bw_cmpv32hi3 */ |
| 1729 | case 1688: /* avx512vl_cmpv32qi3_mask */ |
| 1730 | case 1687: /* avx512vl_cmpv32qi3 */ |
| 1731 | case 1686: /* avx512vl_cmpv16qi3_mask */ |
| 1732 | case 1685: /* avx512vl_cmpv16qi3 */ |
| 1733 | case 1684: /* avx512bw_cmpv64qi3_mask */ |
| 1734 | case 1683: /* avx512bw_cmpv64qi3 */ |
| 1735 | case 1682: /* avx512vl_cmpv2df3_mask */ |
| 1736 | case 1681: /* avx512vl_cmpv2df3 */ |
| 1737 | case 1680: /* avx512vl_cmpv4df3_mask */ |
| 1738 | case 1679: /* avx512vl_cmpv4df3 */ |
| 1739 | case 1678: /* avx512f_cmpv8df3_mask_round */ |
| 1740 | case 1677: /* avx512f_cmpv8df3_round */ |
| 1741 | case 1676: /* avx512f_cmpv8df3_mask */ |
| 1742 | case 1675: /* avx512f_cmpv8df3 */ |
| 1743 | case 1674: /* avx512vl_cmpv4sf3_mask */ |
| 1744 | case 1673: /* avx512vl_cmpv4sf3 */ |
| 1745 | case 1672: /* avx512vl_cmpv8sf3_mask */ |
| 1746 | case 1671: /* avx512vl_cmpv8sf3 */ |
| 1747 | case 1670: /* avx512f_cmpv16sf3_mask_round */ |
| 1748 | case 1669: /* avx512f_cmpv16sf3_round */ |
| 1749 | case 1668: /* avx512f_cmpv16sf3_mask */ |
| 1750 | case 1667: /* avx512f_cmpv16sf3 */ |
| 1751 | case 1666: /* avx512vl_cmpv2di3_mask */ |
| 1752 | case 1665: /* avx512vl_cmpv2di3 */ |
| 1753 | case 1664: /* avx512vl_cmpv4di3_mask */ |
| 1754 | case 1663: /* avx512vl_cmpv4di3 */ |
| 1755 | case 1662: /* avx512f_cmpv8di3_mask_round */ |
| 1756 | case 1661: /* avx512f_cmpv8di3_round */ |
| 1757 | case 1660: /* avx512f_cmpv8di3_mask */ |
| 1758 | case 1659: /* avx512f_cmpv8di3 */ |
| 1759 | case 1658: /* avx512vl_cmpv4si3_mask */ |
| 1760 | case 1657: /* avx512vl_cmpv4si3 */ |
| 1761 | case 1656: /* avx512vl_cmpv8si3_mask */ |
| 1762 | case 1655: /* avx512vl_cmpv8si3 */ |
| 1763 | case 1654: /* avx512f_cmpv16si3_mask_round */ |
| 1764 | case 1653: /* avx512f_cmpv16si3_round */ |
| 1765 | case 1652: /* avx512f_cmpv16si3_mask */ |
| 1766 | case 1651: /* avx512f_cmpv16si3 */ |
| 1767 | case 1650: /* sse2_vmmaskcmpv2df3 */ |
| 1768 | case 1649: /* sse_vmmaskcmpv4sf3 */ |
| 1769 | case 1648: /* sse2_maskcmpv2df3 */ |
| 1770 | case 1647: /* avx_maskcmpv4df3 */ |
| 1771 | case 1646: /* sse_maskcmpv4sf3 */ |
| 1772 | case 1645: /* avx_maskcmpv8sf3 */ |
| 1773 | case 1644: /* *sse2_maskcmpv2df3_comm */ |
| 1774 | case 1643: /* *avx_maskcmpv4df3_comm */ |
| 1775 | case 1642: /* *sse_maskcmpv4sf3_comm */ |
| 1776 | case 1641: /* *avx_maskcmpv8sf3_comm */ |
| 1777 | case 1640: /* avx_vmcmpv2df3 */ |
| 1778 | case 1639: /* avx_vmcmpv4sf3 */ |
| 1779 | case 1638: /* avx_cmpv2df3 */ |
| 1780 | case 1637: /* avx_cmpv4df3 */ |
| 1781 | case 1636: /* avx_cmpv4sf3 */ |
| 1782 | case 1635: /* avx_cmpv8sf3 */ |
| 1783 | case 1178: /* mmx_gtv2si3 */ |
| 1784 | case 1177: /* mmx_gtv4hi3 */ |
| 1785 | case 1176: /* mmx_gtv8qi3 */ |
| 1786 | case 1175: /* *mmx_eqv2si3 */ |
| 1787 | case 1174: /* *mmx_eqv4hi3 */ |
| 1788 | case 1173: /* *mmx_eqv8qi3 */ |
| 1789 | case 1129: /* mmx_gev2sf3 */ |
| 1790 | case 1128: /* mmx_gtv2sf3 */ |
| 1791 | case 1127: /* *mmx_eqv2sf3 */ |
| 1792 | case 626: /* setcc_df_sse */ |
| 1793 | case 625: /* setcc_sf_sse */ |
| 1794 | case 393: /* *testqi_ext_2 */ |
| 1795 | case 392: /* *testqi_ext_1 */ |
| 1796 | case 391: /* *testsi_1 */ |
| 1797 | case 390: /* *testhi_1 */ |
| 1798 | case 389: /* *testqi_1 */ |
| 1799 | case 388: /* *testqi_1_maybe_si */ |
| 1800 | case 387: /* *testdi_1 */ |
| 1801 | case 54: /* *cmpiuxf_i387 */ |
| 1802 | case 53: /* *cmpixf_i387 */ |
| 1803 | case 52: /* *cmpiudf */ |
| 1804 | case 51: /* *cmpiusf */ |
| 1805 | case 50: /* *cmpidf */ |
| 1806 | case 49: /* *cmpisf */ |
| 1807 | case 16: /* *cmpqi_ext_4 */ |
| 1808 | case 15: /* *cmpqi_ext_3 */ |
| 1809 | case 14: /* *cmpqi_ext_2 */ |
| 1810 | case 13: /* *cmpqi_ext_1 */ |
| 1811 | case 12: /* *cmpdi_minus_1 */ |
| 1812 | case 11: /* *cmpsi_minus_1 */ |
| 1813 | case 10: /* *cmphi_minus_1 */ |
| 1814 | case 9: /* *cmpqi_minus_1 */ |
| 1815 | case 8: /* *cmpdi_1 */ |
| 1816 | case 7: /* *cmpsi_1 */ |
| 1817 | case 6: /* *cmphi_1 */ |
| 1818 | case 5: /* *cmpqi_1 */ |
| 1819 | case 4: /* *cmpdi_ccno_1 */ |
| 1820 | case 3: /* *cmpsi_ccno_1 */ |
| 1821 | case 2: /* *cmphi_ccno_1 */ |
| 1822 | case 1: /* *cmpqi_ccno_1 */ |
| 1823 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) |
| 1824 | { |
| 1825 | return 2; |
| 1826 | } |
| 1827 | else if (cached_memory == MEMORY_NONE) |
| 1828 | { |
| 1829 | return 1; |
| 1830 | } |
| 1831 | else |
| 1832 | { |
| 1833 | return 0; |
| 1834 | } |
| 1835 | |
| 1836 | case -1: |
| 1837 | if (GET_CODE (PATTERN (insn)) != ASM_INPUT |
| 1838 | && asm_noperands (PATTERN (insn)) < 0) |
| 1839 | fatal_insn_not_found (insn); |
| 1840 | /* FALLTHRU */ |
| 1841 | case 57: /* *pushdi2_rex64 */ |
| 1842 | case 81: /* *movdi_internal */ |
| 1843 | case 82: /* *movsi_internal */ |
| 1844 | case 83: /* *movhi_internal */ |
| 1845 | case 84: /* *movqi_internal */ |
| 1846 | case 107: /* *extzvqi */ |
| 1847 | case 122: /* *pushsf_rex64 */ |
| 1848 | case 123: /* *pushsf */ |
| 1849 | case 125: /* *movxf_internal */ |
| 1850 | case 126: /* *movdf_internal */ |
| 1851 | case 127: /* *movsf_internal */ |
| 1852 | case 154: /* *extendsfdf2 */ |
| 1853 | case 155: /* *extendsfxf2_i387 */ |
| 1854 | case 156: /* *extenddfxf2_i387 */ |
| 1855 | case 157: /* *truncdfsf_fast_mixed */ |
| 1856 | case 158: /* *truncdfsf_fast_i387 */ |
| 1857 | case 159: /* *truncdfsf_mixed */ |
| 1858 | case 160: /* *truncdfsf_i387 */ |
| 1859 | case 161: /* *truncdfsf2_i387_1 */ |
| 1860 | case 162: /* *truncxfsf2_mixed */ |
| 1861 | case 163: /* *truncxfdf2_mixed */ |
| 1862 | case 164: /* truncxfsf2_i387_noop */ |
| 1863 | case 165: /* truncxfdf2_i387_noop */ |
| 1864 | case 166: /* *truncxfsf2_i387 */ |
| 1865 | case 167: /* *truncxfdf2_i387 */ |
| 1866 | case 194: /* floathisf2 */ |
| 1867 | case 195: /* floathidf2 */ |
| 1868 | case 196: /* floathixf2 */ |
| 1869 | case 197: /* floatsixf2 */ |
| 1870 | case 198: /* floatdixf2 */ |
| 1871 | case 199: /* *floatsisf2_mixed */ |
| 1872 | case 200: /* *floatdisf2_mixed */ |
| 1873 | case 201: /* *floatsidf2_mixed */ |
| 1874 | case 202: /* *floatdidf2_mixed */ |
| 1875 | case 203: /* *floatsisf2_i387 */ |
| 1876 | case 204: /* *floatsidf2_i387 */ |
| 1877 | case 205: /* *floatdisf2_i387 */ |
| 1878 | case 206: /* *floatdidf2_i387 */ |
| 1879 | case 217: /* *addsi_1 */ |
| 1880 | case 218: /* *adddi_1 */ |
| 1881 | case 219: /* addsi_1_zext */ |
| 1882 | case 220: /* *addhi_1 */ |
| 1883 | case 221: /* *addqi_1 */ |
| 1884 | case 222: /* *addqi_1_slp */ |
| 1885 | case 223: /* *addqi_2 */ |
| 1886 | case 224: /* *addhi_2 */ |
| 1887 | case 225: /* *addsi_2 */ |
| 1888 | case 226: /* *adddi_2 */ |
| 1889 | case 227: /* *addsi_2_zext */ |
| 1890 | case 228: /* *addqi_3 */ |
| 1891 | case 229: /* *addhi_3 */ |
| 1892 | case 230: /* *addsi_3 */ |
| 1893 | case 231: /* *adddi_3 */ |
| 1894 | case 232: /* *addsi_3_zext */ |
| 1895 | case 233: /* *adddi_4 */ |
| 1896 | case 234: /* *addqi_4 */ |
| 1897 | case 235: /* *addhi_4 */ |
| 1898 | case 236: /* *addsi_4 */ |
| 1899 | case 237: /* *addqi_5 */ |
| 1900 | case 238: /* *addhi_5 */ |
| 1901 | case 239: /* *addsi_5 */ |
| 1902 | case 240: /* *adddi_5 */ |
| 1903 | case 241: /* addqi_ext_1 */ |
| 1904 | case 398: /* *anddi_1 */ |
| 1905 | case 400: /* *andhi_1 */ |
| 1906 | case 401: /* *andsi_1 */ |
| 1907 | case 515: /* x86_64_shld */ |
| 1908 | case 521: /* *ashlsi3_1 */ |
| 1909 | case 522: /* *ashldi3_1 */ |
| 1910 | case 524: /* *ashlsi3_1_zext */ |
| 1911 | case 525: /* *ashlhi3_1 */ |
| 1912 | case 526: /* *ashlqi3_1 */ |
| 1913 | case 527: /* *ashlqi3_1_slp */ |
| 1914 | case 528: /* *ashlqi3_cmp */ |
| 1915 | case 529: /* *ashlhi3_cmp */ |
| 1916 | case 530: /* *ashlsi3_cmp */ |
| 1917 | case 531: /* *ashldi3_cmp */ |
| 1918 | case 532: /* *ashlsi3_cmp_zext */ |
| 1919 | case 533: /* *ashlqi3_cconly */ |
| 1920 | case 534: /* *ashlhi3_cconly */ |
| 1921 | case 535: /* *ashlsi3_cconly */ |
| 1922 | case 536: /* *ashldi3_cconly */ |
| 1923 | case 545: /* x86_64_shrd */ |
| 1924 | case 547: /* ashrdi3_cvt */ |
| 1925 | case 548: /* *ashrsi3_cvt_zext */ |
| 1926 | case 549: /* ashrsi3_cvt */ |
| 1927 | case 554: /* *lshrsi3_1 */ |
| 1928 | case 555: /* *ashrsi3_1 */ |
| 1929 | case 556: /* *lshrdi3_1 */ |
| 1930 | case 557: /* *ashrdi3_1 */ |
| 1931 | case 560: /* *lshrsi3_1_zext */ |
| 1932 | case 561: /* *ashrsi3_1_zext */ |
| 1933 | case 562: /* *lshrqi3_1 */ |
| 1934 | case 563: /* *ashrqi3_1 */ |
| 1935 | case 564: /* *lshrhi3_1 */ |
| 1936 | case 565: /* *ashrhi3_1 */ |
| 1937 | case 566: /* *lshrqi3_1_slp */ |
| 1938 | case 567: /* *ashrqi3_1_slp */ |
| 1939 | case 568: /* *lshrqi3_cmp */ |
| 1940 | case 569: /* *ashrqi3_cmp */ |
| 1941 | case 570: /* *lshrhi3_cmp */ |
| 1942 | case 571: /* *ashrhi3_cmp */ |
| 1943 | case 572: /* *lshrsi3_cmp */ |
| 1944 | case 573: /* *ashrsi3_cmp */ |
| 1945 | case 574: /* *lshrdi3_cmp */ |
| 1946 | case 575: /* *ashrdi3_cmp */ |
| 1947 | case 576: /* *lshrsi3_cmp_zext */ |
| 1948 | case 577: /* *ashrsi3_cmp_zext */ |
| 1949 | case 578: /* *lshrqi3_cconly */ |
| 1950 | case 579: /* *ashrqi3_cconly */ |
| 1951 | case 580: /* *lshrhi3_cconly */ |
| 1952 | case 581: /* *ashrhi3_cconly */ |
| 1953 | case 582: /* *lshrsi3_cconly */ |
| 1954 | case 583: /* *ashrsi3_cconly */ |
| 1955 | case 584: /* *lshrdi3_cconly */ |
| 1956 | case 585: /* *ashrdi3_cconly */ |
| 1957 | case 596: /* *rotlsi3_1 */ |
| 1958 | case 597: /* *rotrsi3_1 */ |
| 1959 | case 598: /* *rotldi3_1 */ |
| 1960 | case 599: /* *rotrdi3_1 */ |
| 1961 | case 601: /* *rotlsi3_1_zext */ |
| 1962 | case 602: /* *rotrsi3_1_zext */ |
| 1963 | case 603: /* *rotlqi3_1 */ |
| 1964 | case 604: /* *rotrqi3_1 */ |
| 1965 | case 605: /* *rotlhi3_1 */ |
| 1966 | case 606: /* *rotrhi3_1 */ |
| 1967 | case 607: /* *rotlqi3_1_slp */ |
| 1968 | case 608: /* *rotrqi3_1_slp */ |
| 1969 | case 780: /* *bswapsi2_movbe */ |
| 1970 | case 781: /* *bswapdi2_movbe */ |
| 1971 | case 812: /* *fop_sf_comm */ |
| 1972 | case 813: /* *fop_df_comm */ |
| 1973 | case 815: /* *fop_sf_1 */ |
| 1974 | case 816: /* *fop_df_1 */ |
| 1975 | case 817: /* *fop_sf_2_i387 */ |
| 1976 | case 818: /* *fop_df_2_i387 */ |
| 1977 | case 819: /* *fop_sf_2_i387 */ |
| 1978 | case 820: /* *fop_df_2_i387 */ |
| 1979 | case 821: /* *fop_sf_3_i387 */ |
| 1980 | case 822: /* *fop_df_3_i387 */ |
| 1981 | case 823: /* *fop_sf_3_i387 */ |
| 1982 | case 824: /* *fop_df_3_i387 */ |
| 1983 | case 825: /* *fop_df_4_i387 */ |
| 1984 | case 826: /* *fop_df_5_i387 */ |
| 1985 | case 827: /* *fop_df_6_i387 */ |
| 1986 | case 828: /* *fop_xf_comm_i387 */ |
| 1987 | case 829: /* *fop_xf_1_i387 */ |
| 1988 | case 830: /* *fop_xf_2_i387 */ |
| 1989 | case 831: /* *fop_xf_2_i387 */ |
| 1990 | case 832: /* *fop_xf_3_i387 */ |
| 1991 | case 833: /* *fop_xf_3_i387 */ |
| 1992 | case 834: /* *fop_xf_4_i387 */ |
| 1993 | case 835: /* *fop_xf_4_i387 */ |
| 1994 | case 836: /* *fop_xf_5_i387 */ |
| 1995 | case 837: /* *fop_xf_5_i387 */ |
| 1996 | case 838: /* *fop_xf_6_i387 */ |
| 1997 | case 839: /* *fop_xf_6_i387 */ |
| 1998 | case 840: /* truncxfsf2_i387_noop_unspec */ |
| 1999 | case 841: /* truncxfdf2_i387_noop_unspec */ |
| 2000 | case 993: /* pro_epilogue_adjust_stack_si_add */ |
| 2001 | case 994: /* pro_epilogue_adjust_stack_di_add */ |
| 2002 | case 1106: /* *movv8qi_internal */ |
| 2003 | case 1107: /* *movv4hi_internal */ |
| 2004 | case 1108: /* *movv2si_internal */ |
| 2005 | case 1109: /* *movv1di_internal */ |
| 2006 | case 1110: /* *movv2sf_internal */ |
| 2007 | case 1138: /* *vec_extractv2sf_1 */ |
| 2008 | case 1208: /* *vec_extractv2si_1 */ |
| 2009 | case 2462: /* vec_setv4si_0 */ |
| 2010 | case 2463: /* vec_setv4sf_0 */ |
| 2011 | case 2726: /* sse2_storehpd */ |
| 2012 | case 2728: /* sse2_storelpd */ |
| 2013 | case 2730: /* sse2_loadhpd */ |
| 2014 | case 2731: /* sse2_loadlpd */ |
| 2015 | case 3638: /* *vec_extractv2di_1 */ |
| 2016 | case 4934: /* loaddi_via_fpu */ |
| 2017 | case 4935: /* storedi_via_fpu */ |
| 2018 | extract_insn_cached (insn); |
| 2019 | if ((cached_type = get_attr_type (insn)) == TYPE_IMUL) |
| 2020 | { |
| 2021 | return 11 /* 0xb */; |
| 2022 | } |
| 2023 | else if (cached_type == TYPE_STR) |
| 2024 | { |
| 2025 | return 12 /* 0xc */; |
| 2026 | } |
| 2027 | else if (cached_type == TYPE_IDIV) |
| 2028 | { |
| 2029 | return 1; |
| 2030 | } |
| 2031 | else if ((cached_type == TYPE_FMOV) && (((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) || (cached_memory == MEMORY_LOAD))) |
| 2032 | { |
| 2033 | return 1; |
| 2034 | } |
| 2035 | else if ((cached_type == TYPE_FMOV) && (((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) || (cached_memory == MEMORY_STORE)) && (get_attr_mode (insn) == MODE_XF)) |
| 2036 | { |
| 2037 | return 3; |
| 2038 | } |
| 2039 | else if ((cached_type == TYPE_FMOV) && ((immediate_operand (operands[1], VOIDmode)) || ((cached_memory = get_attr_memory (insn)) == MEMORY_STORE))) |
| 2040 | { |
| 2041 | return 2; |
| 2042 | } |
| 2043 | else if (cached_type == TYPE_IMOV) |
| 2044 | { |
| 2045 | return 1; |
| 2046 | } |
| 2047 | else if ((cached_type == TYPE_PUSH) && ((cached_memory = get_attr_memory (insn)) == MEMORY_STORE)) |
| 2048 | { |
| 2049 | return 1; |
| 2050 | } |
| 2051 | else if ((cached_type == TYPE_POP) || (cached_type == TYPE_LEAVE)) |
| 2052 | { |
| 2053 | return 1; |
| 2054 | } |
| 2055 | else if ((cached_type == TYPE_CALL) || (cached_type == TYPE_CALLV)) |
| 2056 | { |
| 2057 | return 10 /* 0xa */; |
| 2058 | } |
| 2059 | else if (cached_type == TYPE_IBR) |
| 2060 | { |
| 2061 | return 1; |
| 2062 | } |
| 2063 | else if ((cached_type == TYPE_FOP) || (cached_type == TYPE_FISTP)) |
| 2064 | { |
| 2065 | return 3; |
| 2066 | } |
| 2067 | else if (cached_type == TYPE_FMUL) |
| 2068 | { |
| 2069 | return 3; |
| 2070 | } |
| 2071 | else if (cached_type == TYPE_FDIV) |
| 2072 | { |
| 2073 | return 39 /* 0x27 */; |
| 2074 | } |
| 2075 | else if (cached_type == TYPE_FPSPC) |
| 2076 | { |
| 2077 | return 70 /* 0x46 */; |
| 2078 | } |
| 2079 | else if (((cached_pent_pair = get_attr_pent_pair (insn)) == PENT_PAIR_UV) && ((cached_memory = get_attr_memory (insn)) == MEMORY_BOTH)) |
| 2080 | { |
| 2081 | return 3; |
| 2082 | } |
| 2083 | else if ((cached_pent_pair == PENT_PAIR_PU) && ((cached_memory = get_attr_memory (insn)) == MEMORY_BOTH)) |
| 2084 | { |
| 2085 | return 3; |
| 2086 | } |
| 2087 | else if ((cached_pent_pair == PENT_PAIR_PV) && ((cached_memory = get_attr_memory (insn)) == MEMORY_BOTH)) |
| 2088 | { |
| 2089 | return 3; |
| 2090 | } |
| 2091 | else if ((cached_pent_pair == PENT_PAIR_NP) && ((cached_memory = get_attr_memory (insn)) == MEMORY_BOTH)) |
| 2092 | { |
| 2093 | return 3; |
| 2094 | } |
| 2095 | else if ((cached_pent_pair == PENT_PAIR_UV) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 2096 | { |
| 2097 | return 2; |
| 2098 | } |
| 2099 | else if ((cached_pent_pair == PENT_PAIR_PU) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 2100 | { |
| 2101 | return 2; |
| 2102 | } |
| 2103 | else if ((cached_pent_pair == PENT_PAIR_PV) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 2104 | { |
| 2105 | return 2; |
| 2106 | } |
| 2107 | else if ((cached_pent_pair == PENT_PAIR_NP) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 2108 | { |
| 2109 | return 2; |
| 2110 | } |
| 2111 | else if ((cached_pent_pair == PENT_PAIR_UV) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 2112 | { |
| 2113 | return 1; |
| 2114 | } |
| 2115 | else if ((cached_pent_pair == PENT_PAIR_PU) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 2116 | { |
| 2117 | return 1; |
| 2118 | } |
| 2119 | else if ((cached_pent_pair == PENT_PAIR_PV) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 2120 | { |
| 2121 | return 1; |
| 2122 | } |
| 2123 | else if ((cached_pent_pair == PENT_PAIR_NP) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 2124 | { |
| 2125 | return 1; |
| 2126 | } |
| 2127 | else |
| 2128 | { |
| 2129 | return 0; |
| 2130 | } |
| 2131 | |
| 2132 | default: |
| 2133 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_BOTH) |
| 2134 | { |
| 2135 | return 3; |
| 2136 | } |
| 2137 | else if (cached_memory == MEMORY_LOAD) |
| 2138 | { |
| 2139 | return 2; |
| 2140 | } |
| 2141 | else if (cached_memory == MEMORY_NONE) |
| 2142 | { |
| 2143 | return 1; |
| 2144 | } |
| 2145 | else |
| 2146 | { |
| 2147 | return 0; |
| 2148 | } |
| 2149 | |
| 2150 | } |
| 2151 | } |
| 2152 | |
| 2153 | int |
| 2154 | insn_default_latency_pentiumpro (rtx_insn *insn ATTRIBUTE_UNUSED) |
| 2155 | { |
| 2156 | enum attr_memory cached_memory ATTRIBUTE_UNUSED; |
| 2157 | enum attr_mode cached_mode ATTRIBUTE_UNUSED; |
| 2158 | enum attr_type cached_type ATTRIBUTE_UNUSED; |
| 2159 | |
| 2160 | switch (recog_memoized (insn)) |
| 2161 | { |
| 2162 | case 3639: /* *vec_concatv2si_sse4_1 */ |
| 2163 | extract_constrain_insn_cached (insn); |
| 2164 | if (which_alternative == 8) |
| 2165 | { |
| 2166 | return 4; |
| 2167 | } |
| 2168 | else |
| 2169 | { |
| 2170 | return 0; |
| 2171 | } |
| 2172 | |
| 2173 | case 2467: /* *sse4_1_extractps */ |
| 2174 | extract_constrain_insn_cached (insn); |
| 2175 | if (!((1 << which_alternative) & 0x7)) |
| 2176 | { |
| 2177 | return 6; |
| 2178 | } |
| 2179 | else if (((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) || (cached_memory == MEMORY_LOAD)) |
| 2180 | { |
| 2181 | return 2; |
| 2182 | } |
| 2183 | else |
| 2184 | { |
| 2185 | return 0; |
| 2186 | } |
| 2187 | |
| 2188 | case 4425: /* avx_maskstoreps */ |
| 2189 | case 4417: /* avx_maskloadps */ |
| 2190 | case 2455: /* avx2_vec_dupv4sf */ |
| 2191 | if (get_attr_memory (insn) == MEMORY_NONE) |
| 2192 | { |
| 2193 | return 2; |
| 2194 | } |
| 2195 | else |
| 2196 | { |
| 2197 | return 0; |
| 2198 | } |
| 2199 | |
| 2200 | case 3766: /* sse4a_vmmovntv4sf */ |
| 2201 | case 3764: /* sse4a_movntsf */ |
| 2202 | case 2453: /* sse_movss */ |
| 2203 | if (((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) || (cached_memory == MEMORY_LOAD) || (cached_memory == MEMORY_STORE)) |
| 2204 | { |
| 2205 | return 3; |
| 2206 | } |
| 2207 | else |
| 2208 | { |
| 2209 | return 0; |
| 2210 | } |
| 2211 | |
| 2212 | case 2452: /* sse_loadlps */ |
| 2213 | extract_constrain_insn_cached (insn); |
| 2214 | if ((((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) || (cached_memory == MEMORY_LOAD)) && (((1 << which_alternative) & 0x3))) |
| 2215 | { |
| 2216 | return 2; |
| 2217 | } |
| 2218 | else |
| 2219 | { |
| 2220 | return 0; |
| 2221 | } |
| 2222 | |
| 2223 | case 4376: /* avx512vl_vpermt2varv4sf3_mask */ |
| 2224 | case 4350: /* avx512vl_vpermt2varv4sf3_maskz_1 */ |
| 2225 | case 4349: /* avx512vl_vpermt2varv4sf3 */ |
| 2226 | case 4322: /* avx512vl_vpermi2varv4sf3_mask */ |
| 2227 | case 4296: /* avx512vl_vpermi2varv4sf3_maskz_1 */ |
| 2228 | case 4295: /* avx512vl_vpermi2varv4sf3 */ |
| 2229 | case 4270: /* avx_vpermilvarv4sf3_mask */ |
| 2230 | case 4269: /* avx_vpermilvarv4sf3 */ |
| 2231 | case 4258: /* *avx_vpermilpv4sf_mask */ |
| 2232 | case 4257: /* *avx_vpermilpv4sf */ |
| 2233 | case 2465: /* sse4_1_insertps */ |
| 2234 | case 2464: /* *vec_setv4sf_sse4_1 */ |
| 2235 | case 2448: /* sse_shufps_v4sf */ |
| 2236 | case 2447: /* sse_shufps_v4si */ |
| 2237 | case 2446: /* sse_shufps_v4sf_mask */ |
| 2238 | case 2431: /* vec_interleave_lowv4sf */ |
| 2239 | case 2430: /* unpcklps128_mask */ |
| 2240 | case 2425: /* vec_interleave_highv4sf_mask */ |
| 2241 | case 2424: /* vec_interleave_highv4sf */ |
| 2242 | if (((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) || (cached_memory == MEMORY_LOAD)) |
| 2243 | { |
| 2244 | return 2; |
| 2245 | } |
| 2246 | else |
| 2247 | { |
| 2248 | return 0; |
| 2249 | } |
| 2250 | |
| 2251 | case 1794: /* *xorsf3 */ |
| 2252 | case 1793: /* *iorsf3 */ |
| 2253 | case 1792: /* *andsf3 */ |
| 2254 | case 1789: /* *andnotsf3 */ |
| 2255 | extract_constrain_insn_cached (insn); |
| 2256 | if ((((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) || (cached_memory == MEMORY_LOAD)) && (((which_alternative == 2) && ( |
| 2257 | #line 841 "/___NETBSD_SRC___/tools/gcc/../../external/gpl3/gcc/dist/gcc/config/i386/i386.md" |
| 2258 | (TARGET_AVX512DQ))) || (!((1 << which_alternative) & 0xc)))) |
| 2259 | { |
| 2260 | return 2; |
| 2261 | } |
| 2262 | else |
| 2263 | { |
| 2264 | return 0; |
| 2265 | } |
| 2266 | |
| 2267 | case 3455: /* *xorv8hi3 */ |
| 2268 | case 3454: /* *iorv8hi3 */ |
| 2269 | case 3453: /* *andv8hi3 */ |
| 2270 | case 3452: /* *xorv16hi3 */ |
| 2271 | case 3451: /* *iorv16hi3 */ |
| 2272 | case 3450: /* *andv16hi3 */ |
| 2273 | case 3449: /* *xorv32hi3 */ |
| 2274 | case 3448: /* *iorv32hi3 */ |
| 2275 | case 3447: /* *andv32hi3 */ |
| 2276 | case 3446: /* *xorv16qi3 */ |
| 2277 | case 3445: /* *iorv16qi3 */ |
| 2278 | case 3444: /* *andv16qi3 */ |
| 2279 | case 3443: /* *xorv32qi3 */ |
| 2280 | case 3442: /* *iorv32qi3 */ |
| 2281 | case 3441: /* *andv32qi3 */ |
| 2282 | case 3440: /* *xorv64qi3 */ |
| 2283 | case 3439: /* *iorv64qi3 */ |
| 2284 | case 3438: /* *andv64qi3 */ |
| 2285 | case 3437: /* xorv2di3_mask */ |
| 2286 | case 3436: /* *xorv2di3 */ |
| 2287 | case 3435: /* iorv2di3_mask */ |
| 2288 | case 3434: /* *iorv2di3 */ |
| 2289 | case 3433: /* andv2di3_mask */ |
| 2290 | case 3432: /* *andv2di3 */ |
| 2291 | case 3431: /* xorv4di3_mask */ |
| 2292 | case 3430: /* *xorv4di3 */ |
| 2293 | case 3429: /* iorv4di3_mask */ |
| 2294 | case 3428: /* *iorv4di3 */ |
| 2295 | case 3427: /* andv4di3_mask */ |
| 2296 | case 3426: /* *andv4di3 */ |
| 2297 | case 3425: /* xorv8di3_mask */ |
| 2298 | case 3424: /* *xorv8di3 */ |
| 2299 | case 3423: /* iorv8di3_mask */ |
| 2300 | case 3422: /* *iorv8di3 */ |
| 2301 | case 3421: /* andv8di3_mask */ |
| 2302 | case 3420: /* *andv8di3 */ |
| 2303 | case 3419: /* xorv4si3_mask */ |
| 2304 | case 3418: /* *xorv4si3 */ |
| 2305 | case 3417: /* iorv4si3_mask */ |
| 2306 | case 3416: /* *iorv4si3 */ |
| 2307 | case 3415: /* andv4si3_mask */ |
| 2308 | case 3414: /* *andv4si3 */ |
| 2309 | case 3413: /* xorv8si3_mask */ |
| 2310 | case 3412: /* *xorv8si3 */ |
| 2311 | case 3411: /* iorv8si3_mask */ |
| 2312 | case 3410: /* *iorv8si3 */ |
| 2313 | case 3409: /* andv8si3_mask */ |
| 2314 | case 3408: /* *andv8si3 */ |
| 2315 | case 3407: /* xorv16si3_mask */ |
| 2316 | case 3406: /* *xorv16si3 */ |
| 2317 | case 3405: /* iorv16si3_mask */ |
| 2318 | case 3404: /* *iorv16si3 */ |
| 2319 | case 3403: /* andv16si3_mask */ |
| 2320 | case 3402: /* *andv16si3 */ |
| 2321 | case 3395: /* *andnotv2di3 */ |
| 2322 | case 3394: /* *andnotv4di3 */ |
| 2323 | case 3393: /* *andnotv4si3 */ |
| 2324 | case 3392: /* *andnotv8si3 */ |
| 2325 | case 3391: /* *andnotv8hi3 */ |
| 2326 | case 3390: /* *andnotv16hi3 */ |
| 2327 | case 3389: /* *andnotv32hi3 */ |
| 2328 | case 3388: /* *andnotv16qi3 */ |
| 2329 | case 3387: /* *andnotv32qi3 */ |
| 2330 | case 3386: /* *andnotv64qi3 */ |
| 2331 | case 3385: /* *andnotv8di3 */ |
| 2332 | case 3384: /* *andnotv16si3 */ |
| 2333 | case 1800: /* *xortf3 */ |
| 2334 | case 1799: /* *iortf3 */ |
| 2335 | case 1798: /* *andtf3 */ |
| 2336 | case 1797: /* *xordf3 */ |
| 2337 | case 1796: /* *iordf3 */ |
| 2338 | case 1795: /* *anddf3 */ |
| 2339 | case 1791: /* *andnottf3 */ |
| 2340 | case 1790: /* *andnotdf3 */ |
| 2341 | case 1776: /* *xorv2df3_mask */ |
| 2342 | case 1775: /* *xorv2df3 */ |
| 2343 | case 1774: /* *iorv2df3_mask */ |
| 2344 | case 1773: /* *iorv2df3 */ |
| 2345 | case 1772: /* *andv2df3_mask */ |
| 2346 | case 1771: /* *andv2df3 */ |
| 2347 | case 1770: /* *xorv4df3_mask */ |
| 2348 | case 1769: /* *xorv4df3 */ |
| 2349 | case 1768: /* *iorv4df3_mask */ |
| 2350 | case 1767: /* *iorv4df3 */ |
| 2351 | case 1766: /* *andv4df3_mask */ |
| 2352 | case 1765: /* *andv4df3 */ |
| 2353 | case 1764: /* *xorv4sf3_mask */ |
| 2354 | case 1763: /* *xorv4sf3 */ |
| 2355 | case 1762: /* *iorv4sf3_mask */ |
| 2356 | case 1761: /* *iorv4sf3 */ |
| 2357 | case 1760: /* *andv4sf3_mask */ |
| 2358 | case 1759: /* *andv4sf3 */ |
| 2359 | case 1758: /* *xorv8sf3_mask */ |
| 2360 | case 1757: /* *xorv8sf3 */ |
| 2361 | case 1756: /* *iorv8sf3_mask */ |
| 2362 | case 1755: /* *iorv8sf3 */ |
| 2363 | case 1754: /* *andv8sf3_mask */ |
| 2364 | case 1753: /* *andv8sf3 */ |
| 2365 | case 1748: /* sse2_andnotv2df3_mask */ |
| 2366 | case 1747: /* sse2_andnotv2df3 */ |
| 2367 | case 1746: /* avx_andnotv4df3_mask */ |
| 2368 | case 1745: /* avx_andnotv4df3 */ |
| 2369 | case 1744: /* sse_andnotv4sf3_mask */ |
| 2370 | case 1743: /* sse_andnotv4sf3 */ |
| 2371 | case 1742: /* avx_andnotv8sf3_mask */ |
| 2372 | case 1741: /* avx_andnotv8sf3 */ |
| 2373 | if ((((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) || (cached_memory == MEMORY_LOAD)) && (get_attr_mode (insn) == MODE_V4SF)) |
| 2374 | { |
| 2375 | return 2; |
| 2376 | } |
| 2377 | else |
| 2378 | { |
| 2379 | return 0; |
| 2380 | } |
| 2381 | |
| 2382 | case 1738: /* sse_ucomi_round */ |
| 2383 | case 1737: /* sse_ucomi */ |
| 2384 | case 1734: /* sse_comi_round */ |
| 2385 | case 1733: /* sse_comi */ |
| 2386 | if (((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) || (cached_memory == MEMORY_LOAD)) |
| 2387 | { |
| 2388 | return 1; |
| 2389 | } |
| 2390 | else |
| 2391 | { |
| 2392 | return 0; |
| 2393 | } |
| 2394 | |
| 2395 | case 1729: /* avx512f_maskcmpv4sf3 */ |
| 2396 | case 1674: /* avx512vl_cmpv4sf3_mask */ |
| 2397 | case 1673: /* avx512vl_cmpv4sf3 */ |
| 2398 | case 1646: /* sse_maskcmpv4sf3 */ |
| 2399 | case 1642: /* *sse_maskcmpv4sf3_comm */ |
| 2400 | case 1636: /* avx_cmpv4sf3 */ |
| 2401 | if (((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) || (cached_memory == MEMORY_LOAD)) |
| 2402 | { |
| 2403 | return 3; |
| 2404 | } |
| 2405 | else |
| 2406 | { |
| 2407 | return 4; |
| 2408 | } |
| 2409 | |
| 2410 | case 1456: /* sse_divv4sf3_mask */ |
| 2411 | case 1455: /* sse_divv4sf3 */ |
| 2412 | if (((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) || (cached_memory == MEMORY_LOAD)) |
| 2413 | { |
| 2414 | return 48 /* 0x30 */; |
| 2415 | } |
| 2416 | else |
| 2417 | { |
| 2418 | return 0; |
| 2419 | } |
| 2420 | |
| 2421 | case 1444: /* sse_vmdivv4sf3_round */ |
| 2422 | case 1443: /* sse_vmdivv4sf3 */ |
| 2423 | if (get_attr_memory (insn) == MEMORY_NONE) |
| 2424 | { |
| 2425 | return 18 /* 0x12 */; |
| 2426 | } |
| 2427 | else |
| 2428 | { |
| 2429 | return 0; |
| 2430 | } |
| 2431 | |
| 2432 | case 1442: /* sse_vmmulv4sf3_round */ |
| 2433 | case 1441: /* sse_vmmulv4sf3 */ |
| 2434 | if (((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) || (cached_memory == MEMORY_LOAD)) |
| 2435 | { |
| 2436 | return 4; |
| 2437 | } |
| 2438 | else |
| 2439 | { |
| 2440 | return 0; |
| 2441 | } |
| 2442 | |
| 2443 | case 3781: /* sse4_1_dpps */ |
| 2444 | case 1428: /* *mulv4sf3_mask_round */ |
| 2445 | case 1427: /* *mulv4sf3_mask */ |
| 2446 | case 1426: /* *mulv4sf3_round */ |
| 2447 | case 1425: /* *mulv4sf3 */ |
| 2448 | if (((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) || (cached_memory == MEMORY_LOAD)) |
| 2449 | { |
| 2450 | return 5; |
| 2451 | } |
| 2452 | else |
| 2453 | { |
| 2454 | return 0; |
| 2455 | } |
| 2456 | |
| 2457 | case 4744: /* avx512vl_compressv4sf_mask */ |
| 2458 | case 4730: /* *avx512f_scatterdiv4sf */ |
| 2459 | case 4729: /* *avx512f_scatterdiv4sf */ |
| 2460 | case 4706: /* *avx512f_scattersiv4sf */ |
| 2461 | case 4705: /* *avx512f_scattersiv4sf */ |
| 2462 | case 4682: /* *avx512f_gatherdiv4sf_2 */ |
| 2463 | case 4681: /* *avx512f_gatherdiv4sf_2 */ |
| 2464 | case 4658: /* *avx512f_gatherdiv4sf */ |
| 2465 | case 4657: /* *avx512f_gatherdiv4sf */ |
| 2466 | case 4634: /* *avx512f_gathersiv4sf_2 */ |
| 2467 | case 4633: /* *avx512f_gathersiv4sf_2 */ |
| 2468 | case 4610: /* *avx512f_gathersiv4sf */ |
| 2469 | case 4609: /* *avx512f_gathersiv4sf */ |
| 2470 | case 4578: /* *avx2_gatherdiv4sf_2 */ |
| 2471 | case 4577: /* *avx2_gatherdiv4sf_2 */ |
| 2472 | case 4562: /* *avx2_gatherdiv4sf */ |
| 2473 | case 4561: /* *avx2_gatherdiv4sf */ |
| 2474 | case 4546: /* *avx2_gathersiv4sf_2 */ |
| 2475 | case 4545: /* *avx2_gathersiv4sf_2 */ |
| 2476 | case 4530: /* *avx2_gathersiv4sf */ |
| 2477 | case 4529: /* *avx2_gathersiv4sf */ |
| 2478 | case 4188: /* avx512vl_vec_dup_gprv4sf_mask */ |
| 2479 | case 4187: /* *avx512vl_vec_dup_gprv4sf */ |
| 2480 | case 4132: /* avx512vl_vec_dupv4sf_mask */ |
| 2481 | case 4131: /* avx512vl_vec_dupv4sf */ |
| 2482 | case 3777: /* sse4_1_blendvps */ |
| 2483 | case 3773: /* sse4_1_blendps */ |
| 2484 | case 3663: /* *sse_movmskps_zext */ |
| 2485 | case 3659: /* sse_movmskps */ |
| 2486 | case 1301: /* sse_movntv4sf */ |
| 2487 | case 1265: /* avx512vl_blendmv4sf */ |
| 2488 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) |
| 2489 | { |
| 2490 | return 1; |
| 2491 | } |
| 2492 | else if (cached_memory == MEMORY_LOAD) |
| 2493 | { |
| 2494 | return 2; |
| 2495 | } |
| 2496 | else if (cached_memory == MEMORY_STORE) |
| 2497 | { |
| 2498 | return 3; |
| 2499 | } |
| 2500 | else |
| 2501 | { |
| 2502 | return 0; |
| 2503 | } |
| 2504 | |
| 2505 | case 4768: /* avx512vl_expandv4sf_mask */ |
| 2506 | case 1247: /* avx512vl_loadv4sf_mask */ |
| 2507 | extract_constrain_insn_cached (insn); |
| 2508 | if (which_alternative == 0) |
| 2509 | { |
| 2510 | return 1; |
| 2511 | } |
| 2512 | else |
| 2513 | { |
| 2514 | return 2; |
| 2515 | } |
| 2516 | |
| 2517 | case 1212: /* mmx_psadbw */ |
| 2518 | case 1211: /* *mmx_uavgv4hi3 */ |
| 2519 | case 1210: /* *mmx_uavgv8qi3 */ |
| 2520 | case 1193: /* mmx_packuswb */ |
| 2521 | case 1192: /* mmx_packssdw */ |
| 2522 | case 1191: /* mmx_packsswb */ |
| 2523 | case 1172: /* mmx_lshrv1di3 */ |
| 2524 | case 1171: /* mmx_ashlv1di3 */ |
| 2525 | case 1170: /* mmx_lshrv2si3 */ |
| 2526 | case 1169: /* mmx_ashlv2si3 */ |
| 2527 | case 1168: /* mmx_lshrv4hi3 */ |
| 2528 | case 1167: /* mmx_ashlv4hi3 */ |
| 2529 | case 1166: /* mmx_ashrv2si3 */ |
| 2530 | case 1165: /* mmx_ashrv4hi3 */ |
| 2531 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) |
| 2532 | { |
| 2533 | return 1; |
| 2534 | } |
| 2535 | else |
| 2536 | { |
| 2537 | return 0; |
| 2538 | } |
| 2539 | |
| 2540 | case 1206: /* *mmx_concatv2si */ |
| 2541 | case 1136: /* *mmx_concatv2sf */ |
| 2542 | extract_constrain_insn_cached (insn); |
| 2543 | if (which_alternative == 0) |
| 2544 | { |
| 2545 | return 4; |
| 2546 | } |
| 2547 | else |
| 2548 | { |
| 2549 | return 0; |
| 2550 | } |
| 2551 | |
| 2552 | case 4514: /* *vcvtps2ph_store */ |
| 2553 | case 4513: /* *vcvtps2ph_mask */ |
| 2554 | case 4512: /* *vcvtps2ph */ |
| 2555 | case 4503: /* vcvtph2ps_mask */ |
| 2556 | case 4502: /* vcvtph2ps */ |
| 2557 | case 3895: /* sse4_1_roundss */ |
| 2558 | case 3892: /* sse4_1_roundps */ |
| 2559 | case 2383: /* *sse2_cvtpd2ps_mask */ |
| 2560 | case 2382: /* *sse2_cvtpd2ps */ |
| 2561 | case 2381: /* avx_cvtpd2ps256_mask */ |
| 2562 | case 2380: /* avx_cvtpd2ps256 */ |
| 2563 | case 2272: /* *ufloatv2div2sf2_mask_1 */ |
| 2564 | case 2271: /* *floatv2div2sf2_mask_1 */ |
| 2565 | case 2270: /* ufloatv2div2sf2_mask */ |
| 2566 | case 2269: /* floatv2div2sf2_mask */ |
| 2567 | case 2268: /* *ufloatv2div2sf2 */ |
| 2568 | case 2267: /* *floatv2div2sf2 */ |
| 2569 | case 2266: /* ufloatv4div4sf2_mask */ |
| 2570 | case 2265: /* ufloatv4div4sf2 */ |
| 2571 | case 2264: /* floatv4div4sf2_mask */ |
| 2572 | case 2263: /* floatv4div4sf2 */ |
| 2573 | case 2146: /* ufloatv4siv4sf2_mask_round */ |
| 2574 | case 2145: /* ufloatv4siv4sf2_mask */ |
| 2575 | case 2144: /* ufloatv4siv4sf2_round */ |
| 2576 | case 2143: /* ufloatv4siv4sf2 */ |
| 2577 | case 2134: /* floatv4siv4sf2_mask */ |
| 2578 | case 2133: /* floatv4siv4sf2 */ |
| 2579 | case 2103: /* sse_cvtpi2ps */ |
| 2580 | case 1160: /* *sse2_umulv1siv1di3 */ |
| 2581 | case 1159: /* *mmx_pmulhrwv4hi3 */ |
| 2582 | case 1158: /* *mmx_pmaddwd */ |
| 2583 | case 1157: /* *mmx_umulv4hi3_highpart */ |
| 2584 | case 1156: /* *mmx_smulv4hi3_highpart */ |
| 2585 | case 1155: /* *mmx_mulv4hi3 */ |
| 2586 | case 1114: /* *mmx_mulv2sf3 */ |
| 2587 | if (get_attr_memory (insn) == MEMORY_NONE) |
| 2588 | { |
| 2589 | return 3; |
| 2590 | } |
| 2591 | else |
| 2592 | { |
| 2593 | return 0; |
| 2594 | } |
| 2595 | |
| 2596 | case 980: /* *movxfcc_1 */ |
| 2597 | return 2; |
| 2598 | |
| 2599 | case 880: /* rintdf2_frndint */ |
| 2600 | return 32 /* 0x20 */; |
| 2601 | |
| 2602 | case 879: /* rintsf2_frndint */ |
| 2603 | return 18 /* 0x12 */; |
| 2604 | |
| 2605 | case 878: /* rintxf2 */ |
| 2606 | case 875: /* fscalexf4_i387 */ |
| 2607 | case 874: /* *f2xm1xf2_i387 */ |
| 2608 | case 873: /* fxtract_extenddfxf3_i387 */ |
| 2609 | case 872: /* fxtract_extendsfxf3_i387 */ |
| 2610 | case 871: /* fxtractxf3_i387 */ |
| 2611 | case 870: /* fyl2xp1_extenddfxf3_i387 */ |
| 2612 | case 869: /* fyl2xp1_extendsfxf3_i387 */ |
| 2613 | case 868: /* fyl2xp1xf3_i387 */ |
| 2614 | case 867: /* fyl2x_extenddfxf3_i387 */ |
| 2615 | case 866: /* fyl2x_extendsfxf3_i387 */ |
| 2616 | case 865: /* fyl2xxf3_i387 */ |
| 2617 | case 864: /* fpatan_extenddfxf3_i387 */ |
| 2618 | case 863: /* fpatan_extendsfxf3_i387 */ |
| 2619 | case 862: /* *fpatanxf3_i387 */ |
| 2620 | case 861: /* fptan_extenddfxf4_i387 */ |
| 2621 | case 860: /* fptan_extendsfxf4_i387 */ |
| 2622 | case 859: /* fptanxf4_i387 */ |
| 2623 | case 858: /* sincos_extenddfxf3_i387 */ |
| 2624 | case 857: /* sincos_extendsfxf3_i387 */ |
| 2625 | case 856: /* sincosxf3 */ |
| 2626 | case 855: /* *cos_extenddfxf2_i387 */ |
| 2627 | case 854: /* *sin_extenddfxf2_i387 */ |
| 2628 | case 853: /* *cos_extendsfxf2_i387 */ |
| 2629 | case 852: /* *sin_extendsfxf2_i387 */ |
| 2630 | case 851: /* *cosxf2_i387 */ |
| 2631 | case 850: /* *sinxf2_i387 */ |
| 2632 | case 849: /* fprem1xf4_i387 */ |
| 2633 | case 848: /* fpremxf4_i387 */ |
| 2634 | case 844: /* sqrt_extenddfxf2_i387 */ |
| 2635 | case 843: /* sqrt_extendsfxf2_i387 */ |
| 2636 | case 842: /* sqrtxf2 */ |
| 2637 | return 38 /* 0x26 */; |
| 2638 | |
| 2639 | case 4926: /* mfence_sse2 */ |
| 2640 | case 4925: /* *sse_sfence */ |
| 2641 | case 4924: /* *sse2_lfence */ |
| 2642 | case 4756: /* avx512vl_compressstorev4sf_mask */ |
| 2643 | case 3674: /* sse2_clflush */ |
| 2644 | case 2224: /* sse2_cvttsd2si_round */ |
| 2645 | case 2223: /* sse2_cvttsd2si */ |
| 2646 | case 2219: /* sse2_cvtsd2si_2 */ |
| 2647 | case 2218: /* sse2_cvtsd2si_round */ |
| 2648 | case 2217: /* sse2_cvtsd2si */ |
| 2649 | case 2214: /* avx512f_vcvttsd2usi_round */ |
| 2650 | case 2213: /* avx512f_vcvttsd2usi */ |
| 2651 | case 2210: /* avx512f_vcvtsd2usi_round */ |
| 2652 | case 2209: /* avx512f_vcvtsd2usi */ |
| 2653 | case 2206: /* avx512f_vcvttss2usi_round */ |
| 2654 | case 2205: /* avx512f_vcvttss2usi */ |
| 2655 | case 2202: /* avx512f_vcvtss2usi_round */ |
| 2656 | case 2201: /* avx512f_vcvtss2usi */ |
| 2657 | case 2117: /* sse_cvttss2si_round */ |
| 2658 | case 2116: /* sse_cvttss2si */ |
| 2659 | case 2112: /* sse_cvtss2si_2 */ |
| 2660 | case 2111: /* sse_cvtss2si_round */ |
| 2661 | case 2110: /* sse_cvtss2si */ |
| 2662 | case 1602: /* sse_vmsminv4sf3_round */ |
| 2663 | case 1601: /* sse_vmsminv4sf3 */ |
| 2664 | case 1600: /* sse_vmsmaxv4sf3_round */ |
| 2665 | case 1599: /* sse_vmsmaxv4sf3 */ |
| 2666 | case 1518: /* sse_vmrsqrtv4sf2 */ |
| 2667 | case 1499: /* sse_vmsqrtv4sf2_round */ |
| 2668 | case 1498: /* sse_vmsqrtv4sf2 */ |
| 2669 | case 1467: /* sse_vmrcpv4sf2 */ |
| 2670 | case 1283: /* avx512vl_storev4sf_mask */ |
| 2671 | case 1081: /* clflushopt */ |
| 2672 | case 1080: /* clwb */ |
| 2673 | case 846: /* *sqrtsf2_sse */ |
| 2674 | case 845: /* *rsqrtsf2_sse */ |
| 2675 | case 814: /* *rcpsf2_sse */ |
| 2676 | case 805: /* *add_tp_di */ |
| 2677 | case 804: /* *add_tp_si */ |
| 2678 | case 803: /* *add_tp_x32_zext */ |
| 2679 | case 802: /* *add_tp_x32 */ |
| 2680 | return 3; |
| 2681 | |
| 2682 | case 693: /* simple_return_indirect_internal */ |
| 2683 | case 663: /* *tablejump_1 */ |
| 2684 | case 662: /* *tablejump_1 */ |
| 2685 | case 661: /* *indirect_jump */ |
| 2686 | case 660: /* *indirect_jump */ |
| 2687 | extract_constrain_insn_cached (insn); |
| 2688 | if ( |
| 2689 | #line 12442 "/___NETBSD_SRC___/tools/gcc/../../external/gpl3/gcc/dist/gcc/config/i386/i386.md" |
| 2690 | ((cfun->machine->indirect_branch_type |
| 2691 | != indirect_branch_keep))) |
| 2692 | { |
| 2693 | return 6; |
| 2694 | } |
| 2695 | else if ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) |
| 2696 | { |
| 2697 | return 1; |
| 2698 | } |
| 2699 | else |
| 2700 | { |
| 2701 | return 6; |
| 2702 | } |
| 2703 | |
| 2704 | case 659: /* jump */ |
| 2705 | case 628: /* *jcc_2 */ |
| 2706 | case 627: /* *jcc_1 */ |
| 2707 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) |
| 2708 | { |
| 2709 | return 1; |
| 2710 | } |
| 2711 | else |
| 2712 | { |
| 2713 | return 6; |
| 2714 | } |
| 2715 | |
| 2716 | case 1724: /* avx512f_vmcmpv4sf3_mask_round */ |
| 2717 | case 1723: /* avx512f_vmcmpv4sf3_mask */ |
| 2718 | case 1720: /* avx512f_vmcmpv4sf3_round */ |
| 2719 | case 1719: /* avx512f_vmcmpv4sf3 */ |
| 2720 | case 1649: /* sse_vmmaskcmpv4sf3 */ |
| 2721 | case 1639: /* avx_vmcmpv4sf3 */ |
| 2722 | case 1620: /* sse3_hsubv4sf3 */ |
| 2723 | case 1619: /* sse3_haddv4sf3 */ |
| 2724 | case 1610: /* sse3_addsubv4sf3 */ |
| 2725 | case 1582: /* ieee_minv4sf3_mask */ |
| 2726 | case 1581: /* ieee_minv4sf3 */ |
| 2727 | case 1580: /* ieee_maxv4sf3_mask */ |
| 2728 | case 1579: /* ieee_maxv4sf3 */ |
| 2729 | case 1542: /* *sminv4sf3_mask_round */ |
| 2730 | case 1541: /* *sminv4sf3_mask */ |
| 2731 | case 1540: /* *sminv4sf3_round */ |
| 2732 | case 1539: /* *sminv4sf3 */ |
| 2733 | case 1538: /* *smaxv4sf3_mask_round */ |
| 2734 | case 1537: /* *smaxv4sf3_mask */ |
| 2735 | case 1536: /* *smaxv4sf3_round */ |
| 2736 | case 1535: /* *smaxv4sf3 */ |
| 2737 | case 1412: /* sse_vmsubv4sf3_round */ |
| 2738 | case 1411: /* sse_vmsubv4sf3 */ |
| 2739 | case 1410: /* sse_vmaddv4sf3_round */ |
| 2740 | case 1409: /* sse_vmaddv4sf3 */ |
| 2741 | case 1384: /* *subv4sf3_mask_round */ |
| 2742 | case 1383: /* *subv4sf3_mask */ |
| 2743 | case 1382: /* *subv4sf3_round */ |
| 2744 | case 1381: /* *subv4sf3 */ |
| 2745 | case 1380: /* *addv4sf3_mask_round */ |
| 2746 | case 1379: /* *addv4sf3_mask */ |
| 2747 | case 1378: /* *addv4sf3_round */ |
| 2748 | case 1377: /* *addv4sf3 */ |
| 2749 | case 990: /* *ieee_sminsf3 */ |
| 2750 | case 989: /* *ieee_smaxsf3 */ |
| 2751 | case 986: /* sminsf3 */ |
| 2752 | case 985: /* smaxsf3 */ |
| 2753 | case 625: /* setcc_sf_sse */ |
| 2754 | if (((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) || (cached_memory == MEMORY_LOAD)) |
| 2755 | { |
| 2756 | return 3; |
| 2757 | } |
| 2758 | else |
| 2759 | { |
| 2760 | return 0; |
| 2761 | } |
| 2762 | |
| 2763 | case 624: /* *setcc_qi_slp */ |
| 2764 | case 623: /* *setcc_qi */ |
| 2765 | if (((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) || (cached_memory == MEMORY_STORE)) |
| 2766 | { |
| 2767 | return 1; |
| 2768 | } |
| 2769 | else |
| 2770 | { |
| 2771 | return 0; |
| 2772 | } |
| 2773 | |
| 2774 | case 602: /* *rotrsi3_1_zext */ |
| 2775 | case 601: /* *rotlsi3_1_zext */ |
| 2776 | case 599: /* *rotrdi3_1 */ |
| 2777 | case 598: /* *rotldi3_1 */ |
| 2778 | case 597: /* *rotrsi3_1 */ |
| 2779 | case 596: /* *rotlsi3_1 */ |
| 2780 | case 561: /* *ashrsi3_1_zext */ |
| 2781 | case 560: /* *lshrsi3_1_zext */ |
| 2782 | case 557: /* *ashrdi3_1 */ |
| 2783 | case 556: /* *lshrdi3_1 */ |
| 2784 | case 555: /* *ashrsi3_1 */ |
| 2785 | case 554: /* *lshrsi3_1 */ |
| 2786 | extract_constrain_insn_cached (insn); |
| 2787 | if (((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) && (which_alternative == 0)) |
| 2788 | { |
| 2789 | return 1; |
| 2790 | } |
| 2791 | else if ((! (cached_memory == MEMORY_NONE)) && (which_alternative == 0)) |
| 2792 | { |
| 2793 | return 4; |
| 2794 | } |
| 2795 | else |
| 2796 | { |
| 2797 | return 0; |
| 2798 | } |
| 2799 | |
| 2800 | case 608: /* *rotrqi3_1_slp */ |
| 2801 | case 607: /* *rotlqi3_1_slp */ |
| 2802 | case 606: /* *rotrhi3_1 */ |
| 2803 | case 605: /* *rotlhi3_1 */ |
| 2804 | case 604: /* *rotrqi3_1 */ |
| 2805 | case 603: /* *rotlqi3_1 */ |
| 2806 | case 585: /* *ashrdi3_cconly */ |
| 2807 | case 584: /* *lshrdi3_cconly */ |
| 2808 | case 583: /* *ashrsi3_cconly */ |
| 2809 | case 582: /* *lshrsi3_cconly */ |
| 2810 | case 581: /* *ashrhi3_cconly */ |
| 2811 | case 580: /* *lshrhi3_cconly */ |
| 2812 | case 579: /* *ashrqi3_cconly */ |
| 2813 | case 578: /* *lshrqi3_cconly */ |
| 2814 | case 577: /* *ashrsi3_cmp_zext */ |
| 2815 | case 576: /* *lshrsi3_cmp_zext */ |
| 2816 | case 575: /* *ashrdi3_cmp */ |
| 2817 | case 574: /* *lshrdi3_cmp */ |
| 2818 | case 573: /* *ashrsi3_cmp */ |
| 2819 | case 572: /* *lshrsi3_cmp */ |
| 2820 | case 571: /* *ashrhi3_cmp */ |
| 2821 | case 570: /* *lshrhi3_cmp */ |
| 2822 | case 569: /* *ashrqi3_cmp */ |
| 2823 | case 568: /* *lshrqi3_cmp */ |
| 2824 | case 567: /* *ashrqi3_1_slp */ |
| 2825 | case 566: /* *lshrqi3_1_slp */ |
| 2826 | case 565: /* *ashrhi3_1 */ |
| 2827 | case 564: /* *lshrhi3_1 */ |
| 2828 | case 563: /* *ashrqi3_1 */ |
| 2829 | case 562: /* *lshrqi3_1 */ |
| 2830 | case 546: /* x86_shrd */ |
| 2831 | case 545: /* x86_64_shrd */ |
| 2832 | case 516: /* x86_shld */ |
| 2833 | case 515: /* x86_64_shld */ |
| 2834 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) |
| 2835 | { |
| 2836 | return 1; |
| 2837 | } |
| 2838 | else |
| 2839 | { |
| 2840 | return 4; |
| 2841 | } |
| 2842 | |
| 2843 | case 386: /* udivmodhiqi3 */ |
| 2844 | case 375: /* divmodhiqi3 */ |
| 2845 | if (((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) || (cached_memory == MEMORY_LOAD)) |
| 2846 | { |
| 2847 | return 19 /* 0x13 */; |
| 2848 | } |
| 2849 | else |
| 2850 | { |
| 2851 | return 0; |
| 2852 | } |
| 2853 | |
| 2854 | case 384: /* *udivmodsi4_noext */ |
| 2855 | case 373: /* *divmodsi4_noext */ |
| 2856 | if (((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) || (cached_memory == MEMORY_LOAD)) |
| 2857 | { |
| 2858 | return 39 /* 0x27 */; |
| 2859 | } |
| 2860 | else |
| 2861 | { |
| 2862 | return 0; |
| 2863 | } |
| 2864 | |
| 2865 | case 383: /* *udivmodhi4_noext */ |
| 2866 | case 372: /* *divmodhi4_noext */ |
| 2867 | if (((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) || (cached_memory == MEMORY_LOAD)) |
| 2868 | { |
| 2869 | return 23 /* 0x17 */; |
| 2870 | } |
| 2871 | else |
| 2872 | { |
| 2873 | return 0; |
| 2874 | } |
| 2875 | |
| 2876 | case 356: /* *umulditi3_1 */ |
| 2877 | case 355: /* *umulsidi3_1 */ |
| 2878 | extract_constrain_insn_cached (insn); |
| 2879 | if (which_alternative == 1) |
| 2880 | { |
| 2881 | return 4; |
| 2882 | } |
| 2883 | else |
| 2884 | { |
| 2885 | return 0; |
| 2886 | } |
| 2887 | |
| 2888 | case 200: /* *floatdisf2_mixed */ |
| 2889 | case 199: /* *floatsisf2_mixed */ |
| 2890 | extract_constrain_insn_cached (insn); |
| 2891 | if (((((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) || (cached_memory == MEMORY_LOAD)) || (cached_memory == MEMORY_STORE)) && (which_alternative == 0)) |
| 2892 | { |
| 2893 | return 1; |
| 2894 | } |
| 2895 | else if (which_alternative != 0) |
| 2896 | { |
| 2897 | return 4; |
| 2898 | } |
| 2899 | else |
| 2900 | { |
| 2901 | return 0; |
| 2902 | } |
| 2903 | |
| 2904 | case 198: /* floatdixf2 */ |
| 2905 | case 197: /* floatsixf2 */ |
| 2906 | case 196: /* floathixf2 */ |
| 2907 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) |
| 2908 | { |
| 2909 | return 1; |
| 2910 | } |
| 2911 | else if ((cached_memory == MEMORY_LOAD) || (cached_memory == MEMORY_STORE)) |
| 2912 | { |
| 2913 | return 3; |
| 2914 | } |
| 2915 | else |
| 2916 | { |
| 2917 | return 0; |
| 2918 | } |
| 2919 | |
| 2920 | case 927: /* fistsi2_ceil_with_temp */ |
| 2921 | case 926: /* fistsi2_floor_with_temp */ |
| 2922 | case 925: /* fisthi2_ceil_with_temp */ |
| 2923 | case 924: /* fisthi2_floor_with_temp */ |
| 2924 | case 923: /* fistsi2_ceil */ |
| 2925 | case 922: /* fistsi2_floor */ |
| 2926 | case 921: /* fisthi2_ceil */ |
| 2927 | case 920: /* fisthi2_floor */ |
| 2928 | case 919: /* fistdi2_ceil_with_temp */ |
| 2929 | case 918: /* fistdi2_floor_with_temp */ |
| 2930 | case 917: /* fistdi2_ceil */ |
| 2931 | case 916: /* fistdi2_floor */ |
| 2932 | case 915: /* *fistdi2_ceil_1 */ |
| 2933 | case 914: /* *fistdi2_floor_1 */ |
| 2934 | case 913: /* *fistsi2_ceil_1 */ |
| 2935 | case 912: /* *fistsi2_floor_1 */ |
| 2936 | case 911: /* *fisthi2_ceil_1 */ |
| 2937 | case 910: /* *fisthi2_floor_1 */ |
| 2938 | case 191: /* fix_truncsi_i387_with_temp */ |
| 2939 | case 190: /* fix_trunchi_i387_with_temp */ |
| 2940 | case 189: /* fix_truncsi_i387 */ |
| 2941 | case 188: /* fix_trunchi_i387 */ |
| 2942 | case 187: /* fix_truncdi_i387_with_temp */ |
| 2943 | case 186: /* fix_truncdi_i387 */ |
| 2944 | case 185: /* *fix_truncdi_i387_1 */ |
| 2945 | case 184: /* *fix_truncsi_i387_1 */ |
| 2946 | case 183: /* *fix_trunchi_i387_1 */ |
| 2947 | return 5; |
| 2948 | |
| 2949 | case 163: /* *truncxfdf2_mixed */ |
| 2950 | case 162: /* *truncxfsf2_mixed */ |
| 2951 | case 160: /* *truncdfsf_i387 */ |
| 2952 | extract_constrain_insn_cached (insn); |
| 2953 | if (which_alternative != 0) |
| 2954 | { |
| 2955 | return 6; |
| 2956 | } |
| 2957 | else if ((((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) || (cached_memory == MEMORY_LOAD)) || (cached_memory == MEMORY_STORE)) |
| 2958 | { |
| 2959 | return 1; |
| 2960 | } |
| 2961 | else |
| 2962 | { |
| 2963 | return 0; |
| 2964 | } |
| 2965 | |
| 2966 | case 159: /* *truncdfsf_mixed */ |
| 2967 | extract_constrain_insn_cached (insn); |
| 2968 | if (!((1 << which_alternative) & 0x3)) |
| 2969 | { |
| 2970 | return 6; |
| 2971 | } |
| 2972 | else if (((((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) || (cached_memory == MEMORY_LOAD)) || (cached_memory == MEMORY_STORE)) && (which_alternative == 0)) |
| 2973 | { |
| 2974 | return 1; |
| 2975 | } |
| 2976 | else |
| 2977 | { |
| 2978 | return 0; |
| 2979 | } |
| 2980 | |
| 2981 | case 4935: /* storedi_via_fpu */ |
| 2982 | case 4934: /* loaddi_via_fpu */ |
| 2983 | case 841: /* truncxfdf2_i387_noop_unspec */ |
| 2984 | case 840: /* truncxfsf2_i387_noop_unspec */ |
| 2985 | case 206: /* *floatdidf2_i387 */ |
| 2986 | case 205: /* *floatdisf2_i387 */ |
| 2987 | case 204: /* *floatsidf2_i387 */ |
| 2988 | case 203: /* *floatsisf2_i387 */ |
| 2989 | case 195: /* floathidf2 */ |
| 2990 | case 194: /* floathisf2 */ |
| 2991 | case 167: /* *truncxfdf2_i387 */ |
| 2992 | case 166: /* *truncxfsf2_i387 */ |
| 2993 | case 165: /* truncxfdf2_i387_noop */ |
| 2994 | case 164: /* truncxfsf2_i387_noop */ |
| 2995 | case 161: /* *truncdfsf2_i387_1 */ |
| 2996 | case 158: /* *truncdfsf_fast_i387 */ |
| 2997 | if (((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) || (cached_memory == MEMORY_LOAD) || (cached_memory == MEMORY_STORE)) |
| 2998 | { |
| 2999 | return 1; |
| 3000 | } |
| 3001 | else |
| 3002 | { |
| 3003 | return 0; |
| 3004 | } |
| 3005 | |
| 3006 | case 202: /* *floatdidf2_mixed */ |
| 3007 | case 201: /* *floatsidf2_mixed */ |
| 3008 | case 157: /* *truncdfsf_fast_mixed */ |
| 3009 | extract_constrain_insn_cached (insn); |
| 3010 | if (((((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) || (cached_memory == MEMORY_LOAD)) || (cached_memory == MEMORY_STORE)) && (which_alternative == 0)) |
| 3011 | { |
| 3012 | return 1; |
| 3013 | } |
| 3014 | else |
| 3015 | { |
| 3016 | return 0; |
| 3017 | } |
| 3018 | |
| 3019 | case 131: /* *zero_extendsidi2 */ |
| 3020 | extract_constrain_insn_cached (insn); |
| 3021 | if (((1 << which_alternative) & 0x17)) |
| 3022 | { |
| 3023 | return 6; |
| 3024 | } |
| 3025 | else if ((which_alternative == 3) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 3026 | { |
| 3027 | return 1; |
| 3028 | } |
| 3029 | else if ((which_alternative == 3) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 3030 | { |
| 3031 | return 4; |
| 3032 | } |
| 3033 | else |
| 3034 | { |
| 3035 | return 0; |
| 3036 | } |
| 3037 | |
| 3038 | case 123: /* *pushsf */ |
| 3039 | case 122: /* *pushsf_rex64 */ |
| 3040 | extract_constrain_insn_cached (insn); |
| 3041 | if (which_alternative != 1) |
| 3042 | { |
| 3043 | return 6; |
| 3044 | } |
| 3045 | else if ((cached_memory = get_attr_memory (insn)) == MEMORY_STORE) |
| 3046 | { |
| 3047 | return 1; |
| 3048 | } |
| 3049 | else if (cached_memory == MEMORY_BOTH) |
| 3050 | { |
| 3051 | return 4; |
| 3052 | } |
| 3053 | else |
| 3054 | { |
| 3055 | return 0; |
| 3056 | } |
| 3057 | |
| 3058 | case 1102: /* move_size_reloc_di */ |
| 3059 | case 1101: /* move_size_reloc_si */ |
| 3060 | case 701: /* set_got_offset_rex64 */ |
| 3061 | case 116: /* *insvqi_3 */ |
| 3062 | case 115: /* *insvqi_3 */ |
| 3063 | case 114: /* *insvqi_2 */ |
| 3064 | case 113: /* *insvqi_2 */ |
| 3065 | case 112: /* *insvqi_1 */ |
| 3066 | case 111: /* *insvqi_1_mem_rex64 */ |
| 3067 | case 110: /* insvdi_1 */ |
| 3068 | case 109: /* insvsi_1 */ |
| 3069 | case 108: /* insvhi_1 */ |
| 3070 | case 106: /* *extzvqi_mem_rex64 */ |
| 3071 | case 98: /* *movstricthi_1 */ |
| 3072 | case 97: /* *movstrictqi_1 */ |
| 3073 | case 96: /* *swaphi */ |
| 3074 | case 95: /* *swapqi */ |
| 3075 | case 94: /* *swapdi */ |
| 3076 | case 93: /* *swapsi */ |
| 3077 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) |
| 3078 | { |
| 3079 | return 1; |
| 3080 | } |
| 3081 | else if (cached_memory == MEMORY_LOAD) |
| 3082 | { |
| 3083 | return 4; |
| 3084 | } |
| 3085 | else if (cached_memory == MEMORY_STORE) |
| 3086 | { |
| 3087 | return 1; |
| 3088 | } |
| 3089 | else |
| 3090 | { |
| 3091 | return 0; |
| 3092 | } |
| 3093 | |
| 3094 | case 4803: /* avx512dq_vmfpclassv4sf */ |
| 3095 | case 4796: /* avx512dq_fpclassv4sf_mask */ |
| 3096 | case 4795: /* avx512dq_fpclassv4sf */ |
| 3097 | case 4788: /* avx512dq_rangesv4sf_round */ |
| 3098 | case 4787: /* avx512dq_rangesv4sf */ |
| 3099 | case 4778: /* avx512dq_rangepv4sf_mask */ |
| 3100 | case 4777: /* avx512dq_rangepv4sf */ |
| 3101 | case 3950: /* avx512er_vmrsqrt28v4sf_round */ |
| 3102 | case 3949: /* avx512er_vmrsqrt28v4sf */ |
| 3103 | case 3938: /* avx512er_vmrcp28v4sf_round */ |
| 3104 | case 3937: /* avx512er_vmrcp28v4sf */ |
| 3105 | case 2441: /* sse3_movsldup_mask */ |
| 3106 | case 2440: /* sse3_movsldup */ |
| 3107 | case 2435: /* sse3_movshdup_mask */ |
| 3108 | case 2434: /* sse3_movshdup */ |
| 3109 | case 2124: /* cvtusi2ss64_round */ |
| 3110 | case 2123: /* cvtusi2ss64 */ |
| 3111 | case 2121: /* cvtusi2ss32_round */ |
| 3112 | case 2120: /* cvtusi2ss32 */ |
| 3113 | case 2109: /* sse_cvtsi2ssq_round */ |
| 3114 | case 2108: /* sse_cvtsi2ssq */ |
| 3115 | case 2107: /* sse_cvtsi2ss_round */ |
| 3116 | case 2106: /* sse_cvtsi2ss */ |
| 3117 | case 1633: /* reducesv4sf */ |
| 3118 | case 1626: /* reducepv4sf_mask */ |
| 3119 | case 1625: /* *reducepv4sf */ |
| 3120 | case 1516: /* rsqrt14v4sf */ |
| 3121 | case 1509: /* rsqrt14v4sf_mask */ |
| 3122 | case 1508: /* *rsqrt14v4sf */ |
| 3123 | case 1503: /* sse_rsqrtv4sf2 */ |
| 3124 | case 1489: /* sse_sqrtv4sf2_mask */ |
| 3125 | case 1488: /* sse_sqrtv4sf2 */ |
| 3126 | case 1480: /* srcp14v4sf */ |
| 3127 | case 1473: /* rcp14v4sf_mask */ |
| 3128 | case 1472: /* *rcp14v4sf */ |
| 3129 | case 1466: /* sse_rcpv4sf2 */ |
| 3130 | case 1215: /* *mmx_maskmovq */ |
| 3131 | case 1214: /* *mmx_maskmovq */ |
| 3132 | case 1213: /* mmx_pmovmskb */ |
| 3133 | case 1205: /* *vec_dupv2si */ |
| 3134 | case 1204: /* *vec_dupv4hi */ |
| 3135 | case 1203: /* mmx_pswapdv2si2 */ |
| 3136 | case 1202: /* mmx_pshufw_1 */ |
| 3137 | case 1201: /* mmx_pextrw */ |
| 3138 | case 1200: /* *mmx_pinsrw */ |
| 3139 | case 1199: /* mmx_punpckldq */ |
| 3140 | case 1198: /* mmx_punpckhdq */ |
| 3141 | case 1197: /* mmx_punpcklwd */ |
| 3142 | case 1196: /* mmx_punpckhwd */ |
| 3143 | case 1195: /* mmx_punpcklbw */ |
| 3144 | case 1194: /* mmx_punpckhbw */ |
| 3145 | case 1135: /* *vec_dupv2sf */ |
| 3146 | case 801: /* *load_tp_di */ |
| 3147 | case 800: /* *load_tp_si */ |
| 3148 | case 799: /* *load_tp_x32_zext */ |
| 3149 | case 798: /* *load_tp_x32 */ |
| 3150 | case 704: /* leave_rex64 */ |
| 3151 | case 703: /* leave */ |
| 3152 | case 366: /* *umulsi3_highpart_1 */ |
| 3153 | case 365: /* *smulsi3_highpart_1 */ |
| 3154 | case 364: /* *umulsi3_highpart_zext */ |
| 3155 | case 363: /* *smulsi3_highpart_zext */ |
| 3156 | case 362: /* *umuldi3_highpart_1 */ |
| 3157 | case 361: /* *smuldi3_highpart_1 */ |
| 3158 | case 360: /* *umulqihi3_1 */ |
| 3159 | case 359: /* *mulqihi3_1 */ |
| 3160 | case 358: /* *mulditi3_1 */ |
| 3161 | case 357: /* *mulsidi3_1 */ |
| 3162 | case 352: /* *umulvqi4 */ |
| 3163 | case 351: /* *mulvqi4 */ |
| 3164 | case 350: /* *umulvdi4 */ |
| 3165 | case 349: /* *umulvsi4 */ |
| 3166 | case 348: /* *umulvhi4 */ |
| 3167 | case 347: /* *mulvdi4_1 */ |
| 3168 | case 346: /* *mulvsi4_1 */ |
| 3169 | case 345: /* *mulvhi4_1 */ |
| 3170 | case 344: /* *mulvhi4 */ |
| 3171 | case 343: /* *mulvdi4 */ |
| 3172 | case 342: /* *mulvsi4 */ |
| 3173 | case 341: /* *mulqi3_1 */ |
| 3174 | case 340: /* *mulsi3_1_zext */ |
| 3175 | case 339: /* *muldi3_1 */ |
| 3176 | case 338: /* *mulsi3_1 */ |
| 3177 | case 337: /* *mulhi3_1 */ |
| 3178 | case 171: /* fix_truncsfdi_sse */ |
| 3179 | case 170: /* fix_truncsfsi_sse */ |
| 3180 | case 92: /* *movabsdi_2 */ |
| 3181 | case 91: /* *movabssi_2 */ |
| 3182 | case 90: /* *movabshi_2 */ |
| 3183 | case 89: /* *movabsqi_2 */ |
| 3184 | return 4; |
| 3185 | |
| 3186 | case 1217: /* *mmx_femms */ |
| 3187 | case 1216: /* *mmx_emms */ |
| 3188 | case 1007: /* *prefetch_3dnow */ |
| 3189 | case 974: /* *x86_movdicc_0_m1_neg */ |
| 3190 | case 973: /* *x86_movsicc_0_m1_neg */ |
| 3191 | case 972: /* *x86_movdicc_0_m1_se */ |
| 3192 | case 971: /* *x86_movsicc_0_m1_se */ |
| 3193 | case 970: /* *x86_movdicc_0_m1 */ |
| 3194 | case 969: /* *x86_movsicc_0_m1 */ |
| 3195 | case 809: /* *tls_dynamic_gnu2_lea_64 */ |
| 3196 | case 806: /* *tls_dynamic_gnu2_lea_32 */ |
| 3197 | case 700: /* set_rip_rex64 */ |
| 3198 | case 699: /* set_got_rex64 */ |
| 3199 | case 495: /* *negextenddfxf2 */ |
| 3200 | case 494: /* *absextenddfxf2 */ |
| 3201 | case 493: /* *negextendsfxf2 */ |
| 3202 | case 492: /* *absextendsfxf2 */ |
| 3203 | case 491: /* *negextendsfdf2 */ |
| 3204 | case 490: /* *absextendsfdf2 */ |
| 3205 | case 489: /* *negxf2_1 */ |
| 3206 | case 488: /* *absxf2_1 */ |
| 3207 | case 487: /* *negdf2_1 */ |
| 3208 | case 486: /* *absdf2_1 */ |
| 3209 | case 485: /* *negsf2_1 */ |
| 3210 | case 484: /* *abssf2_1 */ |
| 3211 | case 268: /* *leadi_general_4 */ |
| 3212 | case 267: /* *leadi_general_4 */ |
| 3213 | case 266: /* *leasi_general_4 */ |
| 3214 | case 265: /* *leasi_general_4 */ |
| 3215 | case 264: /* *leahi_general_4 */ |
| 3216 | case 263: /* *leahi_general_4 */ |
| 3217 | case 262: /* *leaqi_general_4 */ |
| 3218 | case 261: /* *leaqi_general_4 */ |
| 3219 | case 260: /* *leahi_general_3b */ |
| 3220 | case 259: /* *leaqi_general_3b */ |
| 3221 | case 258: /* *leahi_general_3 */ |
| 3222 | case 257: /* *leaqi_general_3 */ |
| 3223 | case 256: /* *leahi_general_2b */ |
| 3224 | case 255: /* *leaqi_general_2b */ |
| 3225 | case 254: /* *leahi_general_2 */ |
| 3226 | case 253: /* *leaqi_general_2 */ |
| 3227 | case 252: /* *leahi_general_1 */ |
| 3228 | case 251: /* *leaqi_general_1 */ |
| 3229 | case 214: /* *leadi */ |
| 3230 | case 213: /* *leasi */ |
| 3231 | case 88: /* *movabsdi_1 */ |
| 3232 | case 87: /* *movabssi_1 */ |
| 3233 | case 86: /* *movabshi_1 */ |
| 3234 | case 85: /* *movabsqi_1 */ |
| 3235 | return 1; |
| 3236 | |
| 3237 | case 1000: /* probe_stack_di */ |
| 3238 | case 999: /* probe_stack_si */ |
| 3239 | case 732: /* tzcnt_hi */ |
| 3240 | case 730: /* *tzcnt_di_falsedep */ |
| 3241 | case 728: /* *tzcnt_si_falsedep */ |
| 3242 | case 726: /* tzcnt_di */ |
| 3243 | case 724: /* tzcnt_si */ |
| 3244 | case 719: /* *bsrhi */ |
| 3245 | case 718: /* bsr */ |
| 3246 | case 717: /* bsr_rex64 */ |
| 3247 | case 716: /* *ctzdi2_falsedep */ |
| 3248 | case 715: /* *ctzsi2_falsedep */ |
| 3249 | case 714: /* ctzdi2 */ |
| 3250 | case 713: /* ctzsi2 */ |
| 3251 | case 712: /* *bsfdi_1 */ |
| 3252 | case 711: /* *bsfsi_1 */ |
| 3253 | case 710: /* *tzcntdi_1_falsedep */ |
| 3254 | case 709: /* *tzcntsi_1_falsedep */ |
| 3255 | case 708: /* *tzcntdi_1 */ |
| 3256 | case 707: /* *tzcntsi_1 */ |
| 3257 | case 613: /* *btdi */ |
| 3258 | case 612: /* *btsi */ |
| 3259 | case 611: /* *btcq */ |
| 3260 | case 610: /* *btrq */ |
| 3261 | case 609: /* *btsq */ |
| 3262 | case 512: /* *one_cmplsi2_2_zext */ |
| 3263 | case 511: /* *one_cmpldi2_2 */ |
| 3264 | case 510: /* *one_cmplsi2_2 */ |
| 3265 | case 509: /* *one_cmplhi2_2 */ |
| 3266 | case 508: /* *one_cmplqi2_2 */ |
| 3267 | case 507: /* *one_cmplqi2_1 */ |
| 3268 | case 506: /* *one_cmplsi2_1_zext */ |
| 3269 | case 505: /* *one_cmpldi2_1 */ |
| 3270 | case 504: /* *one_cmplsi2_1 */ |
| 3271 | case 503: /* *one_cmplhi2_1 */ |
| 3272 | case 479: /* *negvdi3 */ |
| 3273 | case 478: /* *negvsi3 */ |
| 3274 | case 477: /* *negvhi3 */ |
| 3275 | case 476: /* *negvqi3 */ |
| 3276 | case 475: /* *negsi2_cmpz_zext */ |
| 3277 | case 474: /* *negdi2_cmpz */ |
| 3278 | case 473: /* *negsi2_cmpz */ |
| 3279 | case 472: /* *neghi2_cmpz */ |
| 3280 | case 471: /* *negqi2_cmpz */ |
| 3281 | case 470: /* *negsi2_1_zext */ |
| 3282 | case 469: /* *negdi2_1 */ |
| 3283 | case 468: /* *negsi2_1 */ |
| 3284 | case 467: /* *neghi2_1 */ |
| 3285 | case 466: /* *negqi2_1 */ |
| 3286 | case 450: /* *xorqi_2_slp */ |
| 3287 | case 449: /* *iorqi_2_slp */ |
| 3288 | case 436: /* *xorqi_1_slp */ |
| 3289 | case 435: /* *iorqi_1_slp */ |
| 3290 | case 410: /* *andqi_2_slp */ |
| 3291 | case 403: /* *andqi_1_slp */ |
| 3292 | case 276: /* *subqi_1_slp */ |
| 3293 | case 138: /* zero_extendqihi2_and */ |
| 3294 | case 135: /* zero_extendhisi2_and */ |
| 3295 | case 134: /* zero_extendqisi2_and */ |
| 3296 | case 100: /* *movstricthi_xor */ |
| 3297 | case 99: /* *movstrictqi_xor */ |
| 3298 | case 77: /* *movdi_or */ |
| 3299 | case 76: /* *movsi_or */ |
| 3300 | case 75: /* *movdi_xor */ |
| 3301 | case 74: /* *movsi_xor */ |
| 3302 | if (((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) || (cached_memory == MEMORY_STORE)) |
| 3303 | { |
| 3304 | return 1; |
| 3305 | } |
| 3306 | else if (cached_memory == MEMORY_BOTH) |
| 3307 | { |
| 3308 | return 4; |
| 3309 | } |
| 3310 | else |
| 3311 | { |
| 3312 | return 0; |
| 3313 | } |
| 3314 | |
| 3315 | case 73: /* *popfldi1 */ |
| 3316 | case 72: /* *popflsi1 */ |
| 3317 | case 69: /* *popdi1_epilogue */ |
| 3318 | case 68: /* *popsi1_epilogue */ |
| 3319 | case 67: /* *popdi1 */ |
| 3320 | case 66: /* *popsi1 */ |
| 3321 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) |
| 3322 | { |
| 3323 | return 3; |
| 3324 | } |
| 3325 | else if (cached_memory == MEMORY_BOTH) |
| 3326 | { |
| 3327 | return 4; |
| 3328 | } |
| 3329 | else |
| 3330 | { |
| 3331 | return 0; |
| 3332 | } |
| 3333 | |
| 3334 | case 71: /* *pushfldi2 */ |
| 3335 | case 70: /* *pushflsi2 */ |
| 3336 | case 65: /* *pushdi2_prologue */ |
| 3337 | case 64: /* *pushsi2_prologue */ |
| 3338 | case 63: /* *pushhi2 */ |
| 3339 | case 62: /* *pushqi2 */ |
| 3340 | case 61: /* *pushsi2_rex64 */ |
| 3341 | case 60: /* *pushhi2_rex64 */ |
| 3342 | case 59: /* *pushqi2_rex64 */ |
| 3343 | case 58: /* *pushsi2 */ |
| 3344 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_STORE) |
| 3345 | { |
| 3346 | return 1; |
| 3347 | } |
| 3348 | else if (cached_memory == MEMORY_BOTH) |
| 3349 | { |
| 3350 | return 4; |
| 3351 | } |
| 3352 | else |
| 3353 | { |
| 3354 | return 0; |
| 3355 | } |
| 3356 | |
| 3357 | case 57: /* *pushdi2_rex64 */ |
| 3358 | extract_constrain_insn_cached (insn); |
| 3359 | if (which_alternative != 0) |
| 3360 | { |
| 3361 | return 6; |
| 3362 | } |
| 3363 | else if ((cached_memory = get_attr_memory (insn)) == MEMORY_STORE) |
| 3364 | { |
| 3365 | return 1; |
| 3366 | } |
| 3367 | else if (cached_memory == MEMORY_BOTH) |
| 3368 | { |
| 3369 | return 4; |
| 3370 | } |
| 3371 | else |
| 3372 | { |
| 3373 | return 0; |
| 3374 | } |
| 3375 | |
| 3376 | case 153: /* extendqihi2 */ |
| 3377 | case 152: /* *extendqisi2_zext */ |
| 3378 | case 151: /* extendqisi2 */ |
| 3379 | case 150: /* *extendhisi2_zext */ |
| 3380 | case 149: /* extendhisi2 */ |
| 3381 | case 148: /* extendhidi2 */ |
| 3382 | case 147: /* extendqidi2 */ |
| 3383 | case 145: /* *extendsidi2_rex64 */ |
| 3384 | case 105: /* *extzvdi */ |
| 3385 | case 104: /* *extzvsi */ |
| 3386 | case 103: /* *extzvhi */ |
| 3387 | case 102: /* *extvsi */ |
| 3388 | case 101: /* *extvhi */ |
| 3389 | case 54: /* *cmpiuxf_i387 */ |
| 3390 | case 53: /* *cmpixf_i387 */ |
| 3391 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) |
| 3392 | { |
| 3393 | return 1; |
| 3394 | } |
| 3395 | else if (cached_memory == MEMORY_LOAD) |
| 3396 | { |
| 3397 | return 4; |
| 3398 | } |
| 3399 | else |
| 3400 | { |
| 3401 | return 0; |
| 3402 | } |
| 3403 | |
| 3404 | case 139: /* *zero_extendqihi2 */ |
| 3405 | case 137: /* *zero_extendhisi2 */ |
| 3406 | case 136: /* *zero_extendqisi2 */ |
| 3407 | case 133: /* zero_extendhidi2 */ |
| 3408 | case 132: /* zero_extendqidi2 */ |
| 3409 | case 52: /* *cmpiudf */ |
| 3410 | case 50: /* *cmpidf */ |
| 3411 | extract_constrain_insn_cached (insn); |
| 3412 | if (((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) && (which_alternative == 0)) |
| 3413 | { |
| 3414 | return 1; |
| 3415 | } |
| 3416 | else if ((cached_memory == MEMORY_LOAD) && (which_alternative == 0)) |
| 3417 | { |
| 3418 | return 4; |
| 3419 | } |
| 3420 | else |
| 3421 | { |
| 3422 | return 0; |
| 3423 | } |
| 3424 | |
| 3425 | case 4984: /* atomic_bit_test_and_resetdi_1 */ |
| 3426 | case 4983: /* atomic_bit_test_and_resetsi_1 */ |
| 3427 | case 4982: /* atomic_bit_test_and_resethi_1 */ |
| 3428 | case 4981: /* atomic_bit_test_and_complementdi_1 */ |
| 3429 | case 4980: /* atomic_bit_test_and_complementsi_1 */ |
| 3430 | case 4979: /* atomic_bit_test_and_complementhi_1 */ |
| 3431 | case 4978: /* atomic_bit_test_and_setdi_1 */ |
| 3432 | case 4977: /* atomic_bit_test_and_setsi_1 */ |
| 3433 | case 4976: /* atomic_bit_test_and_sethi_1 */ |
| 3434 | case 4975: /* atomic_xordi */ |
| 3435 | case 4974: /* atomic_ordi */ |
| 3436 | case 4973: /* atomic_anddi */ |
| 3437 | case 4972: /* atomic_xorsi */ |
| 3438 | case 4971: /* atomic_orsi */ |
| 3439 | case 4970: /* atomic_andsi */ |
| 3440 | case 4969: /* atomic_xorhi */ |
| 3441 | case 4968: /* atomic_orhi */ |
| 3442 | case 4967: /* atomic_andhi */ |
| 3443 | case 4966: /* atomic_xorqi */ |
| 3444 | case 4965: /* atomic_orqi */ |
| 3445 | case 4964: /* atomic_andqi */ |
| 3446 | case 4963: /* atomic_subdi */ |
| 3447 | case 4962: /* atomic_subsi */ |
| 3448 | case 4961: /* atomic_subhi */ |
| 3449 | case 4960: /* atomic_subqi */ |
| 3450 | case 4959: /* atomic_adddi */ |
| 3451 | case 4958: /* atomic_addsi */ |
| 3452 | case 4957: /* atomic_addhi */ |
| 3453 | case 4956: /* atomic_addqi */ |
| 3454 | case 4955: /* atomic_exchangedi */ |
| 3455 | case 4954: /* atomic_exchangesi */ |
| 3456 | case 4953: /* atomic_exchangehi */ |
| 3457 | case 4952: /* atomic_exchangeqi */ |
| 3458 | case 4951: /* *atomic_fetch_add_cmpdi */ |
| 3459 | case 4950: /* *atomic_fetch_add_cmpsi */ |
| 3460 | case 4949: /* *atomic_fetch_add_cmphi */ |
| 3461 | case 4948: /* *atomic_fetch_add_cmpqi */ |
| 3462 | case 4947: /* atomic_fetch_adddi */ |
| 3463 | case 4946: /* atomic_fetch_addsi */ |
| 3464 | case 4945: /* atomic_fetch_addhi */ |
| 3465 | case 4944: /* atomic_fetch_addqi */ |
| 3466 | case 4943: /* atomic_compare_and_swapdi_1 */ |
| 3467 | case 4942: /* atomic_compare_and_swapsi_1 */ |
| 3468 | case 4941: /* atomic_compare_and_swaphi_1 */ |
| 3469 | case 4940: /* atomic_compare_and_swapqi_1 */ |
| 3470 | case 4939: /* atomic_compare_and_swapti_doubleword */ |
| 3471 | case 4938: /* atomic_compare_and_swapdi_doubleword */ |
| 3472 | case 4933: /* atomic_storedi_fpu */ |
| 3473 | case 4932: /* atomic_storedi_1 */ |
| 3474 | case 4931: /* atomic_storesi_1 */ |
| 3475 | case 4930: /* atomic_storehi_1 */ |
| 3476 | case 4929: /* atomic_storeqi_1 */ |
| 3477 | case 4928: /* atomic_loaddi_fpu */ |
| 3478 | case 4927: /* mfence_nosse */ |
| 3479 | case 4923: /* vpopcountv8di_mask */ |
| 3480 | case 4922: /* vpopcountv8di */ |
| 3481 | case 4921: /* vpopcountv16si_mask */ |
| 3482 | case 4920: /* vpopcountv16si */ |
| 3483 | case 4901: /* *movv64si_internal */ |
| 3484 | case 4900: /* *movv64sf_internal */ |
| 3485 | case 4875: /* avx512f_pd512_256pd */ |
| 3486 | case 4874: /* avx512f_ps512_256ps */ |
| 3487 | case 4873: /* avx512f_si512_256si */ |
| 3488 | case 4872: /* avx512f_pd512_pd */ |
| 3489 | case 4871: /* avx512f_ps512_ps */ |
| 3490 | case 4870: /* avx512f_si512_si */ |
| 3491 | case 4832: /* avx512f_vgetmantv2df_round */ |
| 3492 | case 4831: /* avx512f_vgetmantv2df */ |
| 3493 | case 4830: /* avx512f_vgetmantv4sf_round */ |
| 3494 | case 4829: /* avx512f_vgetmantv4sf */ |
| 3495 | case 4828: /* avx512vl_getmantv2df_mask_round */ |
| 3496 | case 4827: /* avx512vl_getmantv2df_mask */ |
| 3497 | case 4826: /* avx512vl_getmantv2df_round */ |
| 3498 | case 4825: /* avx512vl_getmantv2df */ |
| 3499 | case 4824: /* avx512vl_getmantv4df_mask_round */ |
| 3500 | case 4823: /* avx512vl_getmantv4df_mask */ |
| 3501 | case 4822: /* avx512vl_getmantv4df_round */ |
| 3502 | case 4821: /* avx512vl_getmantv4df */ |
| 3503 | case 4820: /* avx512f_getmantv8df_mask_round */ |
| 3504 | case 4819: /* avx512f_getmantv8df_mask */ |
| 3505 | case 4818: /* avx512f_getmantv8df_round */ |
| 3506 | case 4817: /* avx512f_getmantv8df */ |
| 3507 | case 4816: /* avx512vl_getmantv4sf_mask_round */ |
| 3508 | case 4815: /* avx512vl_getmantv4sf_mask */ |
| 3509 | case 4814: /* avx512vl_getmantv4sf_round */ |
| 3510 | case 4813: /* avx512vl_getmantv4sf */ |
| 3511 | case 4812: /* avx512vl_getmantv8sf_mask_round */ |
| 3512 | case 4811: /* avx512vl_getmantv8sf_mask */ |
| 3513 | case 4810: /* avx512vl_getmantv8sf_round */ |
| 3514 | case 4809: /* avx512vl_getmantv8sf */ |
| 3515 | case 4808: /* avx512f_getmantv16sf_mask_round */ |
| 3516 | case 4807: /* avx512f_getmantv16sf_mask */ |
| 3517 | case 4806: /* avx512f_getmantv16sf_round */ |
| 3518 | case 4805: /* avx512f_getmantv16sf */ |
| 3519 | case 4435: /* avx_pd256_pd */ |
| 3520 | case 4434: /* avx_ps256_ps */ |
| 3521 | case 4433: /* avx_si256_si */ |
| 3522 | case 4252: /* *avx_vperm_broadcast_v4df */ |
| 3523 | case 4251: /* *avx_vperm_broadcast_v8sf */ |
| 3524 | case 3677: /* sse3_monitor_di */ |
| 3525 | case 3676: /* sse3_monitor_si */ |
| 3526 | case 3675: /* sse3_mwait */ |
| 3527 | case 3637: /* *vec_extractv4si_zext_mem */ |
| 3528 | case 3636: /* *vec_extractv4si_mem */ |
| 3529 | case 3633: /* *vec_extractv4si_0_zext */ |
| 3530 | case 3632: /* *vec_extractv4si_0_zext_sse4 */ |
| 3531 | case 3631: /* *vec_extractv2di_0_sse */ |
| 3532 | case 3630: /* *vec_extractv2di_0 */ |
| 3533 | case 3629: /* *vec_extractv4si_0 */ |
| 3534 | case 3628: /* *vec_extractv8hi_mem */ |
| 3535 | case 3627: /* *vec_extractv16qi_mem */ |
| 3536 | case 3503: /* avx512vl_testnmv2di3_mask */ |
| 3537 | case 3502: /* avx512vl_testnmv2di3 */ |
| 3538 | case 3501: /* avx512vl_testnmv4di3_mask */ |
| 3539 | case 3500: /* avx512vl_testnmv4di3 */ |
| 3540 | case 3499: /* avx512f_testnmv8di3_mask */ |
| 3541 | case 3498: /* avx512f_testnmv8di3 */ |
| 3542 | case 3497: /* avx512vl_testnmv4si3_mask */ |
| 3543 | case 3496: /* avx512vl_testnmv4si3 */ |
| 3544 | case 3495: /* avx512vl_testnmv8si3_mask */ |
| 3545 | case 3494: /* avx512vl_testnmv8si3 */ |
| 3546 | case 3493: /* avx512f_testnmv16si3_mask */ |
| 3547 | case 3492: /* avx512f_testnmv16si3 */ |
| 3548 | case 3491: /* avx512vl_testnmv8hi3_mask */ |
| 3549 | case 3490: /* avx512vl_testnmv8hi3 */ |
| 3550 | case 3489: /* avx512vl_testnmv16hi3_mask */ |
| 3551 | case 3488: /* avx512vl_testnmv16hi3 */ |
| 3552 | case 3487: /* avx512bw_testnmv32hi3_mask */ |
| 3553 | case 3486: /* avx512bw_testnmv32hi3 */ |
| 3554 | case 3485: /* avx512vl_testnmv32qi3_mask */ |
| 3555 | case 3484: /* avx512vl_testnmv32qi3 */ |
| 3556 | case 3483: /* avx512vl_testnmv16qi3_mask */ |
| 3557 | case 3482: /* avx512vl_testnmv16qi3 */ |
| 3558 | case 3481: /* avx512bw_testnmv64qi3_mask */ |
| 3559 | case 3480: /* avx512bw_testnmv64qi3 */ |
| 3560 | case 3479: /* avx512vl_testmv2di3_mask */ |
| 3561 | case 3478: /* avx512vl_testmv2di3 */ |
| 3562 | case 3477: /* avx512vl_testmv4di3_mask */ |
| 3563 | case 3476: /* avx512vl_testmv4di3 */ |
| 3564 | case 3475: /* avx512f_testmv8di3_mask */ |
| 3565 | case 3474: /* avx512f_testmv8di3 */ |
| 3566 | case 3473: /* avx512vl_testmv4si3_mask */ |
| 3567 | case 3472: /* avx512vl_testmv4si3 */ |
| 3568 | case 3471: /* avx512vl_testmv8si3_mask */ |
| 3569 | case 3470: /* avx512vl_testmv8si3 */ |
| 3570 | case 3469: /* avx512f_testmv16si3_mask */ |
| 3571 | case 3468: /* avx512f_testmv16si3 */ |
| 3572 | case 3467: /* avx512vl_testmv8hi3_mask */ |
| 3573 | case 3466: /* avx512vl_testmv8hi3 */ |
| 3574 | case 3465: /* avx512vl_testmv16hi3_mask */ |
| 3575 | case 3464: /* avx512vl_testmv16hi3 */ |
| 3576 | case 3463: /* avx512bw_testmv32hi3_mask */ |
| 3577 | case 3462: /* avx512bw_testmv32hi3 */ |
| 3578 | case 3461: /* avx512vl_testmv32qi3_mask */ |
| 3579 | case 3460: /* avx512vl_testmv32qi3 */ |
| 3580 | case 3459: /* avx512vl_testmv16qi3_mask */ |
| 3581 | case 3458: /* avx512vl_testmv16qi3 */ |
| 3582 | case 3457: /* avx512bw_testmv64qi3_mask */ |
| 3583 | case 3456: /* avx512bw_testmv64qi3 */ |
| 3584 | case 3191: /* avx512vl_rorv2di_mask */ |
| 3585 | case 3190: /* avx512vl_rorv2di */ |
| 3586 | case 3189: /* avx512vl_rolv2di_mask */ |
| 3587 | case 3188: /* avx512vl_rolv2di */ |
| 3588 | case 3187: /* avx512vl_rorv4di_mask */ |
| 3589 | case 3186: /* avx512vl_rorv4di */ |
| 3590 | case 3185: /* avx512vl_rolv4di_mask */ |
| 3591 | case 3184: /* avx512vl_rolv4di */ |
| 3592 | case 3183: /* avx512f_rorv8di_mask */ |
| 3593 | case 3182: /* avx512f_rorv8di */ |
| 3594 | case 3181: /* avx512f_rolv8di_mask */ |
| 3595 | case 3180: /* avx512f_rolv8di */ |
| 3596 | case 3179: /* avx512vl_rorv4si_mask */ |
| 3597 | case 3178: /* avx512vl_rorv4si */ |
| 3598 | case 3177: /* avx512vl_rolv4si_mask */ |
| 3599 | case 3176: /* avx512vl_rolv4si */ |
| 3600 | case 3175: /* avx512vl_rorv8si_mask */ |
| 3601 | case 3174: /* avx512vl_rorv8si */ |
| 3602 | case 3173: /* avx512vl_rolv8si_mask */ |
| 3603 | case 3172: /* avx512vl_rolv8si */ |
| 3604 | case 3171: /* avx512f_rorv16si_mask */ |
| 3605 | case 3170: /* avx512f_rorv16si */ |
| 3606 | case 3169: /* avx512f_rolv16si_mask */ |
| 3607 | case 3168: /* avx512f_rolv16si */ |
| 3608 | case 3167: /* avx512vl_rorvv2di_mask */ |
| 3609 | case 3166: /* avx512vl_rorvv2di */ |
| 3610 | case 3165: /* avx512vl_rolvv2di_mask */ |
| 3611 | case 3164: /* avx512vl_rolvv2di */ |
| 3612 | case 3163: /* avx512vl_rorvv4di_mask */ |
| 3613 | case 3162: /* avx512vl_rorvv4di */ |
| 3614 | case 3161: /* avx512vl_rolvv4di_mask */ |
| 3615 | case 3160: /* avx512vl_rolvv4di */ |
| 3616 | case 3159: /* avx512f_rorvv8di_mask */ |
| 3617 | case 3158: /* avx512f_rorvv8di */ |
| 3618 | case 3157: /* avx512f_rolvv8di_mask */ |
| 3619 | case 3156: /* avx512f_rolvv8di */ |
| 3620 | case 3155: /* avx512vl_rorvv4si_mask */ |
| 3621 | case 3154: /* avx512vl_rorvv4si */ |
| 3622 | case 3153: /* avx512vl_rolvv4si_mask */ |
| 3623 | case 3152: /* avx512vl_rolvv4si */ |
| 3624 | case 3151: /* avx512vl_rorvv8si_mask */ |
| 3625 | case 3150: /* avx512vl_rorvv8si */ |
| 3626 | case 3149: /* avx512vl_rolvv8si_mask */ |
| 3627 | case 3148: /* avx512vl_rolvv8si */ |
| 3628 | case 3147: /* avx512f_rorvv16si_mask */ |
| 3629 | case 3146: /* avx512f_rorvv16si */ |
| 3630 | case 3145: /* avx512f_rolvv16si_mask */ |
| 3631 | case 3144: /* avx512f_rolvv16si */ |
| 3632 | case 2704: /* avx512f_rndscalev2df_round */ |
| 3633 | case 2703: /* avx512f_rndscalev2df */ |
| 3634 | case 2702: /* avx512f_rndscalev4sf_round */ |
| 3635 | case 2701: /* avx512f_rndscalev4sf */ |
| 3636 | case 2700: /* avx512vl_rndscalev2df_mask_round */ |
| 3637 | case 2699: /* avx512vl_rndscalev2df_mask */ |
| 3638 | case 2698: /* avx512vl_rndscalev2df_round */ |
| 3639 | case 2697: /* avx512vl_rndscalev2df */ |
| 3640 | case 2696: /* avx512vl_rndscalev4df_mask_round */ |
| 3641 | case 2695: /* avx512vl_rndscalev4df_mask */ |
| 3642 | case 2694: /* avx512vl_rndscalev4df_round */ |
| 3643 | case 2693: /* avx512vl_rndscalev4df */ |
| 3644 | case 2692: /* avx512f_rndscalev8df_mask_round */ |
| 3645 | case 2691: /* avx512f_rndscalev8df_mask */ |
| 3646 | case 2690: /* avx512f_rndscalev8df_round */ |
| 3647 | case 2689: /* avx512f_rndscalev8df */ |
| 3648 | case 2688: /* avx512vl_rndscalev4sf_mask_round */ |
| 3649 | case 2687: /* avx512vl_rndscalev4sf_mask */ |
| 3650 | case 2686: /* avx512vl_rndscalev4sf_round */ |
| 3651 | case 2685: /* avx512vl_rndscalev4sf */ |
| 3652 | case 2684: /* avx512vl_rndscalev8sf_mask_round */ |
| 3653 | case 2683: /* avx512vl_rndscalev8sf_mask */ |
| 3654 | case 2682: /* avx512vl_rndscalev8sf_round */ |
| 3655 | case 2681: /* avx512vl_rndscalev8sf */ |
| 3656 | case 2680: /* avx512f_rndscalev16sf_mask_round */ |
| 3657 | case 2679: /* avx512f_rndscalev16sf_mask */ |
| 3658 | case 2678: /* avx512f_rndscalev16sf_round */ |
| 3659 | case 2677: /* avx512f_rndscalev16sf */ |
| 3660 | case 2676: /* avx512f_sfixupimmv2df_mask_round */ |
| 3661 | case 2675: /* avx512f_sfixupimmv2df_mask */ |
| 3662 | case 2674: /* avx512f_sfixupimmv4sf_mask_round */ |
| 3663 | case 2673: /* avx512f_sfixupimmv4sf_mask */ |
| 3664 | case 2672: /* avx512f_sfixupimmv2df_maskz_1_round */ |
| 3665 | case 2671: /* avx512f_sfixupimmv2df_maskz_1 */ |
| 3666 | case 2670: /* avx512f_sfixupimmv2df_round */ |
| 3667 | case 2669: /* avx512f_sfixupimmv2df */ |
| 3668 | case 2668: /* avx512f_sfixupimmv4sf_maskz_1_round */ |
| 3669 | case 2667: /* avx512f_sfixupimmv4sf_maskz_1 */ |
| 3670 | case 2666: /* avx512f_sfixupimmv4sf_round */ |
| 3671 | case 2665: /* avx512f_sfixupimmv4sf */ |
| 3672 | case 2664: /* avx512vl_fixupimmv2df_mask_round */ |
| 3673 | case 2663: /* avx512vl_fixupimmv2df_mask */ |
| 3674 | case 2662: /* avx512vl_fixupimmv4df_mask_round */ |
| 3675 | case 2661: /* avx512vl_fixupimmv4df_mask */ |
| 3676 | case 2660: /* avx512f_fixupimmv8df_mask_round */ |
| 3677 | case 2659: /* avx512f_fixupimmv8df_mask */ |
| 3678 | case 2658: /* avx512vl_fixupimmv4sf_mask_round */ |
| 3679 | case 2657: /* avx512vl_fixupimmv4sf_mask */ |
| 3680 | case 2656: /* avx512vl_fixupimmv8sf_mask_round */ |
| 3681 | case 2655: /* avx512vl_fixupimmv8sf_mask */ |
| 3682 | case 2654: /* avx512f_fixupimmv16sf_mask_round */ |
| 3683 | case 2653: /* avx512f_fixupimmv16sf_mask */ |
| 3684 | case 2652: /* avx512vl_fixupimmv2df_maskz_1_round */ |
| 3685 | case 2651: /* avx512vl_fixupimmv2df_maskz_1 */ |
| 3686 | case 2650: /* avx512vl_fixupimmv2df_round */ |
| 3687 | case 2649: /* avx512vl_fixupimmv2df */ |
| 3688 | case 2648: /* avx512vl_fixupimmv4df_maskz_1_round */ |
| 3689 | case 2647: /* avx512vl_fixupimmv4df_maskz_1 */ |
| 3690 | case 2646: /* avx512vl_fixupimmv4df_round */ |
| 3691 | case 2645: /* avx512vl_fixupimmv4df */ |
| 3692 | case 2644: /* avx512f_fixupimmv8df_maskz_1_round */ |
| 3693 | case 2643: /* avx512f_fixupimmv8df_maskz_1 */ |
| 3694 | case 2642: /* avx512f_fixupimmv8df_round */ |
| 3695 | case 2641: /* avx512f_fixupimmv8df */ |
| 3696 | case 2640: /* avx512vl_fixupimmv4sf_maskz_1_round */ |
| 3697 | case 2639: /* avx512vl_fixupimmv4sf_maskz_1 */ |
| 3698 | case 2638: /* avx512vl_fixupimmv4sf_round */ |
| 3699 | case 2637: /* avx512vl_fixupimmv4sf */ |
| 3700 | case 2636: /* avx512vl_fixupimmv8sf_maskz_1_round */ |
| 3701 | case 2635: /* avx512vl_fixupimmv8sf_maskz_1 */ |
| 3702 | case 2634: /* avx512vl_fixupimmv8sf_round */ |
| 3703 | case 2633: /* avx512vl_fixupimmv8sf */ |
| 3704 | case 2632: /* avx512f_fixupimmv16sf_maskz_1_round */ |
| 3705 | case 2631: /* avx512f_fixupimmv16sf_maskz_1 */ |
| 3706 | case 2630: /* avx512f_fixupimmv16sf_round */ |
| 3707 | case 2629: /* avx512f_fixupimmv16sf */ |
| 3708 | case 2628: /* avx512vl_alignv2di_mask */ |
| 3709 | case 2627: /* *avx512vl_alignv2di */ |
| 3710 | case 2626: /* avx512vl_alignv4di_mask */ |
| 3711 | case 2625: /* *avx512vl_alignv4di */ |
| 3712 | case 2624: /* avx512f_alignv8di_mask */ |
| 3713 | case 2623: /* *avx512f_alignv8di */ |
| 3714 | case 2622: /* avx512vl_alignv4si_mask */ |
| 3715 | case 2621: /* *avx512vl_alignv4si */ |
| 3716 | case 2620: /* avx512vl_alignv8si_mask */ |
| 3717 | case 2619: /* *avx512vl_alignv8si */ |
| 3718 | case 2618: /* avx512f_alignv16si_mask */ |
| 3719 | case 2617: /* *avx512f_alignv16si */ |
| 3720 | case 2616: /* avx512f_sgetexpv2df_round */ |
| 3721 | case 2615: /* avx512f_sgetexpv2df */ |
| 3722 | case 2614: /* avx512f_sgetexpv4sf_round */ |
| 3723 | case 2613: /* avx512f_sgetexpv4sf */ |
| 3724 | case 2612: /* avx512vl_getexpv2df_mask_round */ |
| 3725 | case 2611: /* avx512vl_getexpv2df_mask */ |
| 3726 | case 2610: /* avx512vl_getexpv2df_round */ |
| 3727 | case 2609: /* avx512vl_getexpv2df */ |
| 3728 | case 2608: /* avx512vl_getexpv4df_mask_round */ |
| 3729 | case 2607: /* avx512vl_getexpv4df_mask */ |
| 3730 | case 2606: /* avx512vl_getexpv4df_round */ |
| 3731 | case 2605: /* avx512vl_getexpv4df */ |
| 3732 | case 2604: /* avx512f_getexpv8df_mask_round */ |
| 3733 | case 2603: /* avx512f_getexpv8df_mask */ |
| 3734 | case 2602: /* avx512f_getexpv8df_round */ |
| 3735 | case 2601: /* avx512f_getexpv8df */ |
| 3736 | case 2600: /* avx512vl_getexpv4sf_mask_round */ |
| 3737 | case 2599: /* avx512vl_getexpv4sf_mask */ |
| 3738 | case 2598: /* avx512vl_getexpv4sf_round */ |
| 3739 | case 2597: /* avx512vl_getexpv4sf */ |
| 3740 | case 2596: /* avx512vl_getexpv8sf_mask_round */ |
| 3741 | case 2595: /* avx512vl_getexpv8sf_mask */ |
| 3742 | case 2594: /* avx512vl_getexpv8sf_round */ |
| 3743 | case 2593: /* avx512vl_getexpv8sf */ |
| 3744 | case 2592: /* avx512f_getexpv16sf_mask_round */ |
| 3745 | case 2591: /* avx512f_getexpv16sf_mask */ |
| 3746 | case 2590: /* avx512f_getexpv16sf_round */ |
| 3747 | case 2589: /* avx512f_getexpv16sf */ |
| 3748 | case 2570: /* avx512vl_scalefv2df_mask_round */ |
| 3749 | case 2569: /* avx512vl_scalefv2df_mask */ |
| 3750 | case 2568: /* avx512vl_scalefv2df_round */ |
| 3751 | case 2567: /* avx512vl_scalefv2df */ |
| 3752 | case 2566: /* avx512vl_scalefv4df_mask_round */ |
| 3753 | case 2565: /* avx512vl_scalefv4df_mask */ |
| 3754 | case 2564: /* avx512vl_scalefv4df_round */ |
| 3755 | case 2563: /* avx512vl_scalefv4df */ |
| 3756 | case 2562: /* avx512f_scalefv8df_mask_round */ |
| 3757 | case 2561: /* avx512f_scalefv8df_mask */ |
| 3758 | case 2560: /* avx512f_scalefv8df_round */ |
| 3759 | case 2559: /* avx512f_scalefv8df */ |
| 3760 | case 2558: /* avx512vl_scalefv4sf_mask_round */ |
| 3761 | case 2557: /* avx512vl_scalefv4sf_mask */ |
| 3762 | case 2556: /* avx512vl_scalefv4sf_round */ |
| 3763 | case 2555: /* avx512vl_scalefv4sf */ |
| 3764 | case 2554: /* avx512vl_scalefv8sf_mask_round */ |
| 3765 | case 2553: /* avx512vl_scalefv8sf_mask */ |
| 3766 | case 2552: /* avx512vl_scalefv8sf_round */ |
| 3767 | case 2551: /* avx512vl_scalefv8sf */ |
| 3768 | case 2550: /* avx512f_scalefv16sf_mask_round */ |
| 3769 | case 2549: /* avx512f_scalefv16sf_mask */ |
| 3770 | case 2548: /* avx512f_scalefv16sf_round */ |
| 3771 | case 2547: /* avx512f_scalefv16sf */ |
| 3772 | case 2546: /* avx512f_vmscalefv2df_round */ |
| 3773 | case 2545: /* avx512f_vmscalefv2df */ |
| 3774 | case 2544: /* avx512f_vmscalefv4sf_round */ |
| 3775 | case 2543: /* avx512f_vmscalefv4sf */ |
| 3776 | case 2529: /* vec_extract_lo_v32qi */ |
| 3777 | case 2527: /* vec_extract_lo_v64qi */ |
| 3778 | case 2525: /* vec_extract_lo_v16hi */ |
| 3779 | case 2523: /* vec_extract_lo_v32hi */ |
| 3780 | case 2502: /* vec_extract_lo_v16si_mask */ |
| 3781 | case 2501: /* vec_extract_lo_v16si */ |
| 3782 | case 2500: /* vec_extract_lo_v16sf_mask */ |
| 3783 | case 2499: /* vec_extract_lo_v16sf */ |
| 3784 | case 2468: /* *vec_extractv4sf_mem */ |
| 3785 | case 2466: /* *vec_extractv4sf_0 */ |
| 3786 | case 2415: /* *avx512vl_cvtmask2qv2di */ |
| 3787 | case 2414: /* *avx512vl_cvtmask2qv4di */ |
| 3788 | case 2413: /* *avx512f_cvtmask2qv8di */ |
| 3789 | case 2412: /* *avx512vl_cvtmask2dv4si */ |
| 3790 | case 2411: /* *avx512vl_cvtmask2dv8si */ |
| 3791 | case 2410: /* *avx512f_cvtmask2dv16si */ |
| 3792 | case 2409: /* *avx512vl_cvtmask2wv8hi */ |
| 3793 | case 2408: /* *avx512vl_cvtmask2wv16hi */ |
| 3794 | case 2407: /* *avx512bw_cvtmask2wv32hi */ |
| 3795 | case 2406: /* *avx512vl_cvtmask2bv32qi */ |
| 3796 | case 2405: /* *avx512vl_cvtmask2bv16qi */ |
| 3797 | case 2404: /* *avx512bw_cvtmask2bv64qi */ |
| 3798 | case 2403: /* avx512vl_cvtq2maskv2di */ |
| 3799 | case 2402: /* avx512vl_cvtq2maskv4di */ |
| 3800 | case 2401: /* avx512f_cvtq2maskv8di */ |
| 3801 | case 2400: /* avx512vl_cvtd2maskv4si */ |
| 3802 | case 2399: /* avx512vl_cvtd2maskv8si */ |
| 3803 | case 2398: /* avx512f_cvtd2maskv16si */ |
| 3804 | case 2397: /* avx512vl_cvtw2maskv8hi */ |
| 3805 | case 2396: /* avx512vl_cvtw2maskv16hi */ |
| 3806 | case 2395: /* avx512bw_cvtw2maskv32hi */ |
| 3807 | case 2394: /* avx512vl_cvtb2maskv32qi */ |
| 3808 | case 2393: /* avx512vl_cvtb2maskv16qi */ |
| 3809 | case 2392: /* avx512bw_cvtb2maskv64qi */ |
| 3810 | case 1360: /* *absnegv2df2 */ |
| 3811 | case 1359: /* *absnegv4df2 */ |
| 3812 | case 1358: /* *absnegv8df2 */ |
| 3813 | case 1357: /* *absnegv4sf2 */ |
| 3814 | case 1356: /* *absnegv8sf2 */ |
| 3815 | case 1355: /* *absnegv16sf2 */ |
| 3816 | case 1354: /* kunpckdi */ |
| 3817 | case 1353: /* kunpcksi */ |
| 3818 | case 1294: /* movdi_to_sse */ |
| 3819 | case 1209: /* *vec_extractv2si_zext_mem */ |
| 3820 | case 1207: /* *vec_extractv2si_0 */ |
| 3821 | case 1137: /* *vec_extractv2sf_0 */ |
| 3822 | case 1105: /* rdpid */ |
| 3823 | case 1104: /* *wrpkru */ |
| 3824 | case 1103: /* *rdpkru */ |
| 3825 | case 1086: /* clzero_di */ |
| 3826 | case 1085: /* clzero_si */ |
| 3827 | case 1084: /* monitorx_di */ |
| 3828 | case 1083: /* monitorx_si */ |
| 3829 | case 1082: /* mwaitx */ |
| 3830 | case 1079: /* xtest_1 */ |
| 3831 | case 1078: /* xabort */ |
| 3832 | case 1077: /* xend */ |
| 3833 | case 1076: /* xbegin_1 */ |
| 3834 | case 1075: /* *pause */ |
| 3835 | case 1074: /* rdseeddi_1 */ |
| 3836 | case 1073: /* rdseedsi_1 */ |
| 3837 | case 1072: /* rdseedhi_1 */ |
| 3838 | case 1071: /* rdranddi_1 */ |
| 3839 | case 1070: /* rdrandsi_1 */ |
| 3840 | case 1069: /* rdrandhi_1 */ |
| 3841 | case 1068: /* wrgsbasedi */ |
| 3842 | case 1067: /* wrfsbasedi */ |
| 3843 | case 1066: /* wrgsbasesi */ |
| 3844 | case 1065: /* wrfsbasesi */ |
| 3845 | case 1064: /* rdgsbasedi */ |
| 3846 | case 1063: /* rdfsbasedi */ |
| 3847 | case 1062: /* rdgsbasesi */ |
| 3848 | case 1061: /* rdfsbasesi */ |
| 3849 | case 1052: /* fnclex */ |
| 3850 | case 1051: /* fnstsw */ |
| 3851 | case 1050: /* fldenv */ |
| 3852 | case 1049: /* fnstenv */ |
| 3853 | case 1048: /* xrstors64 */ |
| 3854 | case 1047: /* xrstor64 */ |
| 3855 | case 1046: /* xrstors_rex64 */ |
| 3856 | case 1045: /* xrstor_rex64 */ |
| 3857 | case 1044: /* xrstors */ |
| 3858 | case 1043: /* xrstor */ |
| 3859 | case 1042: /* xsaves64 */ |
| 3860 | case 1041: /* xsavec64 */ |
| 3861 | case 1040: /* xsaveopt64 */ |
| 3862 | case 1039: /* xsave64 */ |
| 3863 | case 1038: /* xsaves_rex64 */ |
| 3864 | case 1037: /* xsavec_rex64 */ |
| 3865 | case 1036: /* xsaveopt_rex64 */ |
| 3866 | case 1035: /* xsave_rex64 */ |
| 3867 | case 1034: /* xsaves */ |
| 3868 | case 1033: /* xsavec */ |
| 3869 | case 1032: /* xsaveopt */ |
| 3870 | case 1031: /* xsave */ |
| 3871 | case 1030: /* fxrstor64 */ |
| 3872 | case 1029: /* fxrstor */ |
| 3873 | case 1028: /* fxsave64 */ |
| 3874 | case 1027: /* fxsave */ |
| 3875 | case 1026: /* rdtscp_rex64 */ |
| 3876 | case 1025: /* rdtscp */ |
| 3877 | case 1024: /* rdtsc_rex64 */ |
| 3878 | case 1023: /* rdtsc */ |
| 3879 | case 1022: /* rdpmc_rex64 */ |
| 3880 | case 1021: /* rdpmc */ |
| 3881 | case 1016: /* stack_tls_protect_test_di */ |
| 3882 | case 1015: /* stack_tls_protect_test_si */ |
| 3883 | case 1014: /* stack_protect_test_di */ |
| 3884 | case 1013: /* stack_protect_test_si */ |
| 3885 | case 1012: /* stack_tls_protect_set_di */ |
| 3886 | case 1011: /* stack_tls_protect_set_si */ |
| 3887 | case 1010: /* stack_protect_set_di */ |
| 3888 | case 1009: /* stack_protect_set_si */ |
| 3889 | case 1005: /* trap */ |
| 3890 | case 1004: /* probe_stack_rangedi */ |
| 3891 | case 1003: /* probe_stack_rangesi */ |
| 3892 | case 1002: /* adjust_stack_and_probedi */ |
| 3893 | case 1001: /* adjust_stack_and_probesi */ |
| 3894 | case 998: /* allocate_stack_worker_probe_di */ |
| 3895 | case 997: /* allocate_stack_worker_probe_si */ |
| 3896 | case 968: /* *strlenqi_1 */ |
| 3897 | case 967: /* *strlenqi_1 */ |
| 3898 | case 966: /* *cmpstrnqi_1 */ |
| 3899 | case 965: /* *cmpstrnqi_1 */ |
| 3900 | case 964: /* *cmpstrnqi_nz_1 */ |
| 3901 | case 963: /* *cmpstrnqi_nz_1 */ |
| 3902 | case 962: /* *rep_stosqi */ |
| 3903 | case 961: /* *rep_stosqi */ |
| 3904 | case 960: /* *rep_stossi */ |
| 3905 | case 959: /* *rep_stossi */ |
| 3906 | case 958: /* *rep_stosdi_rex64 */ |
| 3907 | case 957: /* *rep_stosdi_rex64 */ |
| 3908 | case 956: /* *strsetqi_1 */ |
| 3909 | case 955: /* *strsetqi_1 */ |
| 3910 | case 954: /* *strsethi_1 */ |
| 3911 | case 953: /* *strsethi_1 */ |
| 3912 | case 952: /* *strsetsi_1 */ |
| 3913 | case 951: /* *strsetsi_1 */ |
| 3914 | case 950: /* *strsetdi_rex_1 */ |
| 3915 | case 949: /* *strsetdi_rex_1 */ |
| 3916 | case 948: /* *rep_movqi */ |
| 3917 | case 947: /* *rep_movqi */ |
| 3918 | case 946: /* *rep_movsi */ |
| 3919 | case 945: /* *rep_movsi */ |
| 3920 | case 944: /* *rep_movdi_rex64 */ |
| 3921 | case 943: /* *rep_movdi_rex64 */ |
| 3922 | case 942: /* *strmovqi_1 */ |
| 3923 | case 941: /* *strmovqi_1 */ |
| 3924 | case 940: /* *strmovhi_1 */ |
| 3925 | case 939: /* *strmovhi_1 */ |
| 3926 | case 938: /* *strmovsi_1 */ |
| 3927 | case 937: /* *strmovsi_1 */ |
| 3928 | case 936: /* *strmovdi_rex_1 */ |
| 3929 | case 935: /* *strmovdi_rex_1 */ |
| 3930 | case 934: /* cld */ |
| 3931 | case 932: /* fxamdf2_i387_with_temp */ |
| 3932 | case 931: /* fxamsf2_i387_with_temp */ |
| 3933 | case 930: /* fxamxf2_i387 */ |
| 3934 | case 929: /* fxamdf2_i387 */ |
| 3935 | case 928: /* fxamsf2_i387 */ |
| 3936 | case 811: /* *tls_dynamic_gnu2_combine_64 */ |
| 3937 | case 810: /* *tls_dynamic_gnu2_call_64 */ |
| 3938 | case 808: /* *tls_dynamic_gnu2_combine_32 */ |
| 3939 | case 807: /* *tls_dynamic_gnu2_call_32 */ |
| 3940 | case 797: /* *tls_local_dynamic_32_once */ |
| 3941 | case 796: /* *tls_local_dynamic_base_64_largepic */ |
| 3942 | case 795: /* *tls_local_dynamic_base_64_di */ |
| 3943 | case 794: /* *tls_local_dynamic_base_64_si */ |
| 3944 | case 793: /* *tls_local_dynamic_base_32_gnu */ |
| 3945 | case 792: /* *tls_global_dynamic_64_largepic */ |
| 3946 | case 791: /* *tls_global_dynamic_64_di */ |
| 3947 | case 790: /* *tls_global_dynamic_64_si */ |
| 3948 | case 789: /* *tls_global_dynamic_32_gnu */ |
| 3949 | case 788: /* *parityhi2_cmp */ |
| 3950 | case 787: /* paritysi2_cmp */ |
| 3951 | case 786: /* paritydi2_cmp */ |
| 3952 | case 785: /* bswaphi_lowpart */ |
| 3953 | case 784: /* *bswaphi_lowpart_1 */ |
| 3954 | case 778: /* *popcounthi2_1 */ |
| 3955 | case 706: /* ffssi2_no_cmove */ |
| 3956 | case 705: /* split_stack_return */ |
| 3957 | case 702: /* eh_return_internal */ |
| 3958 | case 698: /* *set_got_labelled */ |
| 3959 | case 697: /* *set_got */ |
| 3960 | case 696: /* pad */ |
| 3961 | case 695: /* nops */ |
| 3962 | case 694: /* nop */ |
| 3963 | case 692: /* simple_return_pop_internal */ |
| 3964 | case 691: /* simple_return_internal_long */ |
| 3965 | case 690: /* interrupt_return */ |
| 3966 | case 689: /* simple_return_internal */ |
| 3967 | case 688: /* prologue_use */ |
| 3968 | case 687: /* *memory_blockage */ |
| 3969 | case 686: /* blockage */ |
| 3970 | case 685: /* *sibcall_value_pop_memory */ |
| 3971 | case 684: /* *sibcall_value_pop */ |
| 3972 | case 683: /* *call_value_pop */ |
| 3973 | case 682: /* *sibcall_value_memory */ |
| 3974 | case 681: /* *sibcall_value_memory */ |
| 3975 | case 680: /* *sibcall_value */ |
| 3976 | case 679: /* *sibcall_value */ |
| 3977 | case 678: /* *sibcall_value_GOT_32 */ |
| 3978 | case 677: /* *call_value_got_x32 */ |
| 3979 | case 676: /* *call_value */ |
| 3980 | case 675: /* *call_value */ |
| 3981 | case 674: /* *sibcall_pop_memory */ |
| 3982 | case 673: /* *sibcall_pop */ |
| 3983 | case 672: /* *call_pop */ |
| 3984 | case 671: /* *sibcall_memory */ |
| 3985 | case 670: /* *sibcall_memory */ |
| 3986 | case 669: /* *sibcall */ |
| 3987 | case 668: /* *sibcall */ |
| 3988 | case 667: /* *sibcall_GOT_32 */ |
| 3989 | case 666: /* *call_got_x32 */ |
| 3990 | case 665: /* *call */ |
| 3991 | case 664: /* *call */ |
| 3992 | case 658: /* *jccxf_si_r_i387 */ |
| 3993 | case 657: /* *jccdf_si_r_i387 */ |
| 3994 | case 656: /* *jccsf_si_r_i387 */ |
| 3995 | case 655: /* *jccxf_hi_r_i387 */ |
| 3996 | case 654: /* *jccdf_hi_r_i387 */ |
| 3997 | case 653: /* *jccsf_hi_r_i387 */ |
| 3998 | case 652: /* *jccxf_si_i387 */ |
| 3999 | case 651: /* *jccdf_si_i387 */ |
| 4000 | case 650: /* *jccsf_si_i387 */ |
| 4001 | case 649: /* *jccxf_hi_i387 */ |
| 4002 | case 648: /* *jccdf_hi_i387 */ |
| 4003 | case 647: /* *jccsf_hi_i387 */ |
| 4004 | case 646: /* *jccuxf_r_i387 */ |
| 4005 | case 645: /* *jccudf_r_i387 */ |
| 4006 | case 644: /* *jccusf_r_i387 */ |
| 4007 | case 643: /* *jccuxf_i387 */ |
| 4008 | case 642: /* *jccudf_i387 */ |
| 4009 | case 641: /* *jccusf_i387 */ |
| 4010 | case 640: /* *jccdf_r_i387 */ |
| 4011 | case 639: /* *jccsf_r_i387 */ |
| 4012 | case 638: /* *jccdf_i387 */ |
| 4013 | case 637: /* *jccsf_i387 */ |
| 4014 | case 636: /* *jccxf_r_i387 */ |
| 4015 | case 635: /* *jccxf_i387 */ |
| 4016 | case 634: /* *jccxf_0_r_i387 */ |
| 4017 | case 633: /* *jccdf_0_r_i387 */ |
| 4018 | case 632: /* *jccsf_0_r_i387 */ |
| 4019 | case 631: /* *jccxf_0_i387 */ |
| 4020 | case 630: /* *jccdf_0_i387 */ |
| 4021 | case 629: /* *jccsf_0_i387 */ |
| 4022 | case 622: /* *setcc_si_1_movzbl */ |
| 4023 | case 621: /* *setcc_si_1_and */ |
| 4024 | case 620: /* *setcc_di_1 */ |
| 4025 | case 619: /* *jcc_btdi_mask */ |
| 4026 | case 618: /* *jcc_btsi_mask */ |
| 4027 | case 617: /* *jcc_btdi_1 */ |
| 4028 | case 616: /* *jcc_btsi_1 */ |
| 4029 | case 615: /* *jcc_btdi */ |
| 4030 | case 614: /* *jcc_btsi */ |
| 4031 | case 593: /* ix86_rotrti3_doubleword */ |
| 4032 | case 592: /* ix86_rotrdi3_doubleword */ |
| 4033 | case 591: /* ix86_rotlti3_doubleword */ |
| 4034 | case 590: /* ix86_rotldi3_doubleword */ |
| 4035 | case 589: /* *rotrdi3_mask */ |
| 4036 | case 588: /* *rotldi3_mask */ |
| 4037 | case 587: /* *rotrsi3_mask */ |
| 4038 | case 586: /* *rotlsi3_mask */ |
| 4039 | case 544: /* *ashrti3_doubleword */ |
| 4040 | case 543: /* *lshrti3_doubleword */ |
| 4041 | case 542: /* *ashrdi3_doubleword */ |
| 4042 | case 541: /* *lshrdi3_doubleword */ |
| 4043 | case 540: /* *ashrdi3_mask */ |
| 4044 | case 539: /* *lshrdi3_mask */ |
| 4045 | case 538: /* *ashrsi3_mask */ |
| 4046 | case 537: /* *lshrsi3_mask */ |
| 4047 | case 518: /* *ashldi3_mask */ |
| 4048 | case 517: /* *ashlsi3_mask */ |
| 4049 | case 514: /* *ashlti3_doubleword */ |
| 4050 | case 513: /* *ashldi3_doubleword */ |
| 4051 | case 502: /* *one_cmpldi2_doubleword */ |
| 4052 | case 501: /* copysigntf3_var */ |
| 4053 | case 500: /* copysigndf3_var */ |
| 4054 | case 499: /* copysignsf3_var */ |
| 4055 | case 498: /* copysigntf3_const */ |
| 4056 | case 497: /* copysigndf3_const */ |
| 4057 | case 496: /* copysignsf3_const */ |
| 4058 | case 483: /* *absnegtf2_sse */ |
| 4059 | case 482: /* *absnegxf2_i387 */ |
| 4060 | case 481: /* *absnegdf2 */ |
| 4061 | case 480: /* *absnegsf2 */ |
| 4062 | case 465: /* *negti2_doubleword */ |
| 4063 | case 464: /* *negdi2_doubleword */ |
| 4064 | case 422: /* *xordi3_doubleword */ |
| 4065 | case 421: /* *iordi3_doubleword */ |
| 4066 | case 414: /* *andndi3_doubleword */ |
| 4067 | case 397: /* *anddi3_doubleword */ |
| 4068 | case 396: /* *testqi_ext_3 */ |
| 4069 | case 395: /* *testqi_ext_3 */ |
| 4070 | case 394: /* *testqi_ext_3 */ |
| 4071 | case 382: /* *udivmoddi4_pow2 */ |
| 4072 | case 381: /* *udivmodsi4_pow2 */ |
| 4073 | case 380: /* *udivmoddi4 */ |
| 4074 | case 379: /* *udivmodsi4 */ |
| 4075 | case 378: /* *udivmodhi4 */ |
| 4076 | case 377: /* udivmoddi4_1 */ |
| 4077 | case 376: /* udivmodsi4_1 */ |
| 4078 | case 371: /* *divmoddi4 */ |
| 4079 | case 370: /* *divmodsi4 */ |
| 4080 | case 369: /* *divmodhi4 */ |
| 4081 | case 368: /* divmoddi4_1 */ |
| 4082 | case 367: /* divmodsi4_1 */ |
| 4083 | case 270: /* *subti3_doubleword */ |
| 4084 | case 269: /* *subdi3_doubleword */ |
| 4085 | case 216: /* *addti3_doubleword */ |
| 4086 | case 215: /* *adddi3_doubleword */ |
| 4087 | case 212: /* *floatunssixf2_i387_with_xmm */ |
| 4088 | case 211: /* *floatunssidf2_i387_with_xmm */ |
| 4089 | case 210: /* *floatunssisf2_i387_with_xmm */ |
| 4090 | case 209: /* floatdixf2_i387_with_xmm */ |
| 4091 | case 208: /* floatdidf2_i387_with_xmm */ |
| 4092 | case 207: /* floatdisf2_i387_with_xmm */ |
| 4093 | case 193: /* x86_fldcw_1 */ |
| 4094 | case 192: /* x86_fnstcw_1 */ |
| 4095 | case 169: /* *fixuns_truncdf_1 */ |
| 4096 | case 168: /* *fixuns_truncsf_1 */ |
| 4097 | case 146: /* extendsidi2_1 */ |
| 4098 | case 144: /* *zextsi_doubleword */ |
| 4099 | case 143: /* *zexthi_doubleword */ |
| 4100 | case 142: /* *zextqi_doubleword */ |
| 4101 | case 141: /* *zexthi_doubleword_and */ |
| 4102 | case 140: /* *zextqi_doubleword_and */ |
| 4103 | case 121: /* *pushdf */ |
| 4104 | case 120: /* *pushxf */ |
| 4105 | case 119: /* *pushxf_rounded */ |
| 4106 | case 118: /* *pushxf_rounded */ |
| 4107 | case 117: /* *pushtf */ |
| 4108 | case 56: /* *pushti2 */ |
| 4109 | case 55: /* *pushdi2 */ |
| 4110 | case 48: /* x86_sahf_1 */ |
| 4111 | case 47: /* x86_fnstsw_1 */ |
| 4112 | case 46: /* *cmpxf_si_cc_i387 */ |
| 4113 | case 45: /* *cmpdf_si_cc_i387 */ |
| 4114 | case 44: /* *cmpsf_si_cc_i387 */ |
| 4115 | case 43: /* *cmpxf_hi_cc_i387 */ |
| 4116 | case 42: /* *cmpdf_hi_cc_i387 */ |
| 4117 | case 41: /* *cmpsf_hi_cc_i387 */ |
| 4118 | case 40: /* *cmpxf_si_i387 */ |
| 4119 | case 39: /* *cmpdf_si_i387 */ |
| 4120 | case 38: /* *cmpsf_si_i387 */ |
| 4121 | case 37: /* *cmpxf_hi_i387 */ |
| 4122 | case 36: /* *cmpdf_hi_i387 */ |
| 4123 | case 35: /* *cmpsf_hi_i387 */ |
| 4124 | case 34: /* *cmpuxf_cc_i387 */ |
| 4125 | case 33: /* *cmpudf_cc_i387 */ |
| 4126 | case 32: /* *cmpusf_cc_i387 */ |
| 4127 | case 31: /* *cmpuxf_i387 */ |
| 4128 | case 30: /* *cmpudf_i387 */ |
| 4129 | case 29: /* *cmpusf_i387 */ |
| 4130 | case 28: /* *cmpdf_cc_i387 */ |
| 4131 | case 27: /* *cmpsf_cc_i387 */ |
| 4132 | case 26: /* *cmpdf_i387 */ |
| 4133 | case 25: /* *cmpsf_i387 */ |
| 4134 | case 24: /* *cmpxf_cc_i387 */ |
| 4135 | case 23: /* *cmpxf_i387 */ |
| 4136 | case 22: /* *cmpxf_0_cc_i387 */ |
| 4137 | case 21: /* *cmpdf_0_cc_i387 */ |
| 4138 | case 20: /* *cmpsf_0_cc_i387 */ |
| 4139 | case 19: /* *cmpxf_0_i387 */ |
| 4140 | case 18: /* *cmpdf_0_i387 */ |
| 4141 | case 17: /* *cmpsf_0_i387 */ |
| 4142 | return 6; |
| 4143 | |
| 4144 | case 1178: /* mmx_gtv2si3 */ |
| 4145 | case 1177: /* mmx_gtv4hi3 */ |
| 4146 | case 1176: /* mmx_gtv8qi3 */ |
| 4147 | case 1175: /* *mmx_eqv2si3 */ |
| 4148 | case 1174: /* *mmx_eqv4hi3 */ |
| 4149 | case 1173: /* *mmx_eqv8qi3 */ |
| 4150 | case 1129: /* mmx_gev2sf3 */ |
| 4151 | case 1128: /* mmx_gtv2sf3 */ |
| 4152 | case 1127: /* *mmx_eqv2sf3 */ |
| 4153 | case 393: /* *testqi_ext_2 */ |
| 4154 | case 392: /* *testqi_ext_1 */ |
| 4155 | case 391: /* *testsi_1 */ |
| 4156 | case 390: /* *testhi_1 */ |
| 4157 | case 389: /* *testqi_1 */ |
| 4158 | case 388: /* *testqi_1_maybe_si */ |
| 4159 | case 387: /* *testdi_1 */ |
| 4160 | case 16: /* *cmpqi_ext_4 */ |
| 4161 | case 15: /* *cmpqi_ext_3 */ |
| 4162 | case 14: /* *cmpqi_ext_2 */ |
| 4163 | case 13: /* *cmpqi_ext_1 */ |
| 4164 | case 12: /* *cmpdi_minus_1 */ |
| 4165 | case 11: /* *cmpsi_minus_1 */ |
| 4166 | case 10: /* *cmphi_minus_1 */ |
| 4167 | case 9: /* *cmpqi_minus_1 */ |
| 4168 | case 8: /* *cmpdi_1 */ |
| 4169 | case 7: /* *cmpsi_1 */ |
| 4170 | case 6: /* *cmphi_1 */ |
| 4171 | case 5: /* *cmpqi_1 */ |
| 4172 | case 4: /* *cmpdi_ccno_1 */ |
| 4173 | case 3: /* *cmpsi_ccno_1 */ |
| 4174 | case 2: /* *cmphi_ccno_1 */ |
| 4175 | case 1: /* *cmpqi_ccno_1 */ |
| 4176 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) |
| 4177 | { |
| 4178 | return 1; |
| 4179 | } |
| 4180 | else if (cached_memory == MEMORY_LOAD) |
| 4181 | { |
| 4182 | return 3; |
| 4183 | } |
| 4184 | else |
| 4185 | { |
| 4186 | return 0; |
| 4187 | } |
| 4188 | |
| 4189 | case -1: |
| 4190 | if (GET_CODE (PATTERN (insn)) != ASM_INPUT |
| 4191 | && asm_noperands (PATTERN (insn)) < 0) |
| 4192 | fatal_insn_not_found (insn); |
| 4193 | /* FALLTHRU */ |
| 4194 | case 49: /* *cmpisf */ |
| 4195 | case 51: /* *cmpiusf */ |
| 4196 | case 80: /* *movti_internal */ |
| 4197 | case 81: /* *movdi_internal */ |
| 4198 | case 82: /* *movsi_internal */ |
| 4199 | case 83: /* *movhi_internal */ |
| 4200 | case 84: /* *movqi_internal */ |
| 4201 | case 107: /* *extzvqi */ |
| 4202 | case 124: /* *movtf_internal */ |
| 4203 | case 125: /* *movxf_internal */ |
| 4204 | case 126: /* *movdf_internal */ |
| 4205 | case 127: /* *movsf_internal */ |
| 4206 | case 128: /* swapxf */ |
| 4207 | case 129: /* *swapsf */ |
| 4208 | case 130: /* *swapdf */ |
| 4209 | case 154: /* *extendsfdf2 */ |
| 4210 | case 155: /* *extendsfxf2_i387 */ |
| 4211 | case 156: /* *extenddfxf2_i387 */ |
| 4212 | case 217: /* *addsi_1 */ |
| 4213 | case 218: /* *adddi_1 */ |
| 4214 | case 219: /* addsi_1_zext */ |
| 4215 | case 220: /* *addhi_1 */ |
| 4216 | case 221: /* *addqi_1 */ |
| 4217 | case 222: /* *addqi_1_slp */ |
| 4218 | case 223: /* *addqi_2 */ |
| 4219 | case 224: /* *addhi_2 */ |
| 4220 | case 225: /* *addsi_2 */ |
| 4221 | case 226: /* *adddi_2 */ |
| 4222 | case 227: /* *addsi_2_zext */ |
| 4223 | case 228: /* *addqi_3 */ |
| 4224 | case 229: /* *addhi_3 */ |
| 4225 | case 230: /* *addsi_3 */ |
| 4226 | case 231: /* *adddi_3 */ |
| 4227 | case 232: /* *addsi_3_zext */ |
| 4228 | case 233: /* *adddi_4 */ |
| 4229 | case 234: /* *addqi_4 */ |
| 4230 | case 235: /* *addhi_4 */ |
| 4231 | case 236: /* *addsi_4 */ |
| 4232 | case 237: /* *addqi_5 */ |
| 4233 | case 238: /* *addhi_5 */ |
| 4234 | case 239: /* *addsi_5 */ |
| 4235 | case 240: /* *adddi_5 */ |
| 4236 | case 241: /* addqi_ext_1 */ |
| 4237 | case 242: /* *addqi_ext_2 */ |
| 4238 | case 243: /* *addvqi4 */ |
| 4239 | case 244: /* *addvhi4 */ |
| 4240 | case 245: /* *addvsi4 */ |
| 4241 | case 246: /* *addvdi4 */ |
| 4242 | case 247: /* *addvqi4_1 */ |
| 4243 | case 248: /* *addvhi4_1 */ |
| 4244 | case 249: /* *addvsi4_1 */ |
| 4245 | case 250: /* *addvdi4_1 */ |
| 4246 | case 271: /* *subqi_1 */ |
| 4247 | case 272: /* *subhi_1 */ |
| 4248 | case 273: /* *subsi_1 */ |
| 4249 | case 274: /* *subdi_1 */ |
| 4250 | case 275: /* *subsi_1_zext */ |
| 4251 | case 277: /* *subqi_2 */ |
| 4252 | case 278: /* *subhi_2 */ |
| 4253 | case 279: /* *subsi_2 */ |
| 4254 | case 280: /* *subdi_2 */ |
| 4255 | case 281: /* *subsi_2_zext */ |
| 4256 | case 282: /* *subvqi4 */ |
| 4257 | case 283: /* *subvhi4 */ |
| 4258 | case 284: /* *subvsi4 */ |
| 4259 | case 285: /* *subvdi4 */ |
| 4260 | case 286: /* *subvqi4_1 */ |
| 4261 | case 287: /* *subvhi4_1 */ |
| 4262 | case 288: /* *subvsi4_1 */ |
| 4263 | case 289: /* *subvdi4_1 */ |
| 4264 | case 290: /* *subqi_3 */ |
| 4265 | case 291: /* *subhi_3 */ |
| 4266 | case 292: /* *subsi_3 */ |
| 4267 | case 293: /* *subdi_3 */ |
| 4268 | case 294: /* *subsi_3_zext */ |
| 4269 | case 295: /* addqi3_carry */ |
| 4270 | case 296: /* addhi3_carry */ |
| 4271 | case 297: /* addsi3_carry */ |
| 4272 | case 298: /* adddi3_carry */ |
| 4273 | case 299: /* *addqi3_carry_0 */ |
| 4274 | case 300: /* *addhi3_carry_0 */ |
| 4275 | case 301: /* *addsi3_carry_0 */ |
| 4276 | case 302: /* *adddi3_carry_0 */ |
| 4277 | case 303: /* *addsi3_carry_zext */ |
| 4278 | case 304: /* *addsi3_carry_zext_0 */ |
| 4279 | case 305: /* addcarrysi */ |
| 4280 | case 306: /* addcarrydi */ |
| 4281 | case 307: /* subqi3_carry */ |
| 4282 | case 308: /* subhi3_carry */ |
| 4283 | case 309: /* subsi3_carry */ |
| 4284 | case 310: /* subdi3_carry */ |
| 4285 | case 311: /* *subqi3_carry_0 */ |
| 4286 | case 312: /* *subhi3_carry_0 */ |
| 4287 | case 313: /* *subsi3_carry_0 */ |
| 4288 | case 314: /* *subdi3_carry_0 */ |
| 4289 | case 315: /* *subsi3_carry_zext */ |
| 4290 | case 316: /* *subsi3_carry_zext_0 */ |
| 4291 | case 317: /* subborrowsi */ |
| 4292 | case 318: /* subborrowdi */ |
| 4293 | case 319: /* *addqi3_cconly_overflow_1 */ |
| 4294 | case 320: /* *addhi3_cconly_overflow_1 */ |
| 4295 | case 321: /* *addsi3_cconly_overflow_1 */ |
| 4296 | case 322: /* *adddi3_cconly_overflow_1 */ |
| 4297 | case 323: /* *addqi3_cc_overflow_1 */ |
| 4298 | case 324: /* *addhi3_cc_overflow_1 */ |
| 4299 | case 325: /* *addsi3_cc_overflow_1 */ |
| 4300 | case 326: /* *adddi3_cc_overflow_1 */ |
| 4301 | case 327: /* *addsi3_zext_cc_overflow_1 */ |
| 4302 | case 328: /* *addqi3_cconly_overflow_2 */ |
| 4303 | case 329: /* *addhi3_cconly_overflow_2 */ |
| 4304 | case 330: /* *addsi3_cconly_overflow_2 */ |
| 4305 | case 331: /* *adddi3_cconly_overflow_2 */ |
| 4306 | case 332: /* *addqi3_cc_overflow_2 */ |
| 4307 | case 333: /* *addhi3_cc_overflow_2 */ |
| 4308 | case 334: /* *addsi3_cc_overflow_2 */ |
| 4309 | case 335: /* *adddi3_cc_overflow_2 */ |
| 4310 | case 336: /* *addsi3_zext_cc_overflow_2 */ |
| 4311 | case 398: /* *anddi_1 */ |
| 4312 | case 399: /* *andsi_1_zext */ |
| 4313 | case 400: /* *andhi_1 */ |
| 4314 | case 401: /* *andsi_1 */ |
| 4315 | case 402: /* *andqi_1 */ |
| 4316 | case 404: /* *anddi_2 */ |
| 4317 | case 405: /* *andsi_2_zext */ |
| 4318 | case 406: /* *andqi_2_maybe_si */ |
| 4319 | case 407: /* *andqi_2 */ |
| 4320 | case 408: /* *andhi_2 */ |
| 4321 | case 409: /* *andsi_2 */ |
| 4322 | case 411: /* andqi_ext_1 */ |
| 4323 | case 412: /* *andqi_ext_1_cc */ |
| 4324 | case 413: /* *andqi_ext_2 */ |
| 4325 | case 423: /* *iorhi_1 */ |
| 4326 | case 424: /* *xorhi_1 */ |
| 4327 | case 425: /* *iorsi_1 */ |
| 4328 | case 426: /* *xorsi_1 */ |
| 4329 | case 427: /* *iordi_1 */ |
| 4330 | case 428: /* *xordi_1 */ |
| 4331 | case 429: /* *iorsi_1_zext */ |
| 4332 | case 430: /* *xorsi_1_zext */ |
| 4333 | case 431: /* *iorsi_1_zext_imm */ |
| 4334 | case 432: /* *xorsi_1_zext_imm */ |
| 4335 | case 433: /* *iorqi_1 */ |
| 4336 | case 434: /* *xorqi_1 */ |
| 4337 | case 437: /* *iorqi_2 */ |
| 4338 | case 438: /* *xorqi_2 */ |
| 4339 | case 439: /* *iorhi_2 */ |
| 4340 | case 440: /* *xorhi_2 */ |
| 4341 | case 441: /* *iorsi_2 */ |
| 4342 | case 442: /* *xorsi_2 */ |
| 4343 | case 443: /* *iordi_2 */ |
| 4344 | case 444: /* *xordi_2 */ |
| 4345 | case 445: /* *iorsi_2_zext */ |
| 4346 | case 446: /* *xorsi_2_zext */ |
| 4347 | case 447: /* *iorsi_2_zext_imm */ |
| 4348 | case 448: /* *xorsi_2_zext_imm */ |
| 4349 | case 451: /* *iorqi_3 */ |
| 4350 | case 452: /* *xorqi_3 */ |
| 4351 | case 453: /* *iorhi_3 */ |
| 4352 | case 454: /* *xorhi_3 */ |
| 4353 | case 455: /* *iorsi_3 */ |
| 4354 | case 456: /* *xorsi_3 */ |
| 4355 | case 457: /* *iordi_3 */ |
| 4356 | case 458: /* *xordi_3 */ |
| 4357 | case 459: /* *iorqi_ext_1 */ |
| 4358 | case 460: /* *xorqi_ext_1 */ |
| 4359 | case 461: /* *iorqi_ext_2 */ |
| 4360 | case 462: /* *xorqi_ext_2 */ |
| 4361 | case 463: /* *xorqi_ext_1_cc */ |
| 4362 | case 521: /* *ashlsi3_1 */ |
| 4363 | case 522: /* *ashldi3_1 */ |
| 4364 | case 524: /* *ashlsi3_1_zext */ |
| 4365 | case 525: /* *ashlhi3_1 */ |
| 4366 | case 526: /* *ashlqi3_1 */ |
| 4367 | case 527: /* *ashlqi3_1_slp */ |
| 4368 | case 528: /* *ashlqi3_cmp */ |
| 4369 | case 529: /* *ashlhi3_cmp */ |
| 4370 | case 530: /* *ashlsi3_cmp */ |
| 4371 | case 531: /* *ashldi3_cmp */ |
| 4372 | case 532: /* *ashlsi3_cmp_zext */ |
| 4373 | case 533: /* *ashlqi3_cconly */ |
| 4374 | case 534: /* *ashlhi3_cconly */ |
| 4375 | case 535: /* *ashlsi3_cconly */ |
| 4376 | case 536: /* *ashldi3_cconly */ |
| 4377 | case 547: /* ashrdi3_cvt */ |
| 4378 | case 548: /* *ashrsi3_cvt_zext */ |
| 4379 | case 549: /* ashrsi3_cvt */ |
| 4380 | case 780: /* *bswapsi2_movbe */ |
| 4381 | case 781: /* *bswapdi2_movbe */ |
| 4382 | case 812: /* *fop_sf_comm */ |
| 4383 | case 813: /* *fop_df_comm */ |
| 4384 | case 815: /* *fop_sf_1 */ |
| 4385 | case 816: /* *fop_df_1 */ |
| 4386 | case 817: /* *fop_sf_2_i387 */ |
| 4387 | case 818: /* *fop_df_2_i387 */ |
| 4388 | case 819: /* *fop_sf_2_i387 */ |
| 4389 | case 820: /* *fop_df_2_i387 */ |
| 4390 | case 821: /* *fop_sf_3_i387 */ |
| 4391 | case 822: /* *fop_df_3_i387 */ |
| 4392 | case 823: /* *fop_sf_3_i387 */ |
| 4393 | case 824: /* *fop_df_3_i387 */ |
| 4394 | case 825: /* *fop_df_4_i387 */ |
| 4395 | case 826: /* *fop_df_5_i387 */ |
| 4396 | case 827: /* *fop_df_6_i387 */ |
| 4397 | case 828: /* *fop_xf_comm_i387 */ |
| 4398 | case 829: /* *fop_xf_1_i387 */ |
| 4399 | case 830: /* *fop_xf_2_i387 */ |
| 4400 | case 831: /* *fop_xf_2_i387 */ |
| 4401 | case 832: /* *fop_xf_3_i387 */ |
| 4402 | case 833: /* *fop_xf_3_i387 */ |
| 4403 | case 834: /* *fop_xf_4_i387 */ |
| 4404 | case 835: /* *fop_xf_4_i387 */ |
| 4405 | case 836: /* *fop_xf_5_i387 */ |
| 4406 | case 837: /* *fop_xf_5_i387 */ |
| 4407 | case 838: /* *fop_xf_6_i387 */ |
| 4408 | case 839: /* *fop_xf_6_i387 */ |
| 4409 | case 975: /* *movhicc_noc */ |
| 4410 | case 976: /* *movsicc_noc */ |
| 4411 | case 977: /* *movdicc_noc */ |
| 4412 | case 978: /* *movsicc_noc_zext */ |
| 4413 | case 979: /* *movqicc_noc */ |
| 4414 | case 981: /* *movdfcc_1 */ |
| 4415 | case 982: /* *movsfcc_1_387 */ |
| 4416 | case 993: /* pro_epilogue_adjust_stack_si_add */ |
| 4417 | case 994: /* pro_epilogue_adjust_stack_di_add */ |
| 4418 | case 995: /* pro_epilogue_adjust_stack_si_sub */ |
| 4419 | case 996: /* pro_epilogue_adjust_stack_di_sub */ |
| 4420 | case 1106: /* *movv8qi_internal */ |
| 4421 | case 1107: /* *movv4hi_internal */ |
| 4422 | case 1108: /* *movv2si_internal */ |
| 4423 | case 1109: /* *movv1di_internal */ |
| 4424 | case 1110: /* *movv2sf_internal */ |
| 4425 | case 1112: /* *mmx_addv2sf3 */ |
| 4426 | case 1113: /* *mmx_subv2sf3 */ |
| 4427 | case 1115: /* *mmx_smaxv2sf3 */ |
| 4428 | case 1116: /* *mmx_sminv2sf3 */ |
| 4429 | case 1117: /* mmx_ieee_maxv2sf3 */ |
| 4430 | case 1118: /* mmx_ieee_minv2sf3 */ |
| 4431 | case 1119: /* mmx_rcpv2sf2 */ |
| 4432 | case 1120: /* mmx_rcpit1v2sf3 */ |
| 4433 | case 1121: /* mmx_rcpit2v2sf3 */ |
| 4434 | case 1122: /* mmx_rsqrtv2sf2 */ |
| 4435 | case 1123: /* mmx_rsqit1v2sf3 */ |
| 4436 | case 1124: /* mmx_haddv2sf3 */ |
| 4437 | case 1125: /* mmx_hsubv2sf3 */ |
| 4438 | case 1126: /* mmx_addsubv2sf3 */ |
| 4439 | case 1138: /* *vec_extractv2sf_1 */ |
| 4440 | case 1139: /* *mmx_addv8qi3 */ |
| 4441 | case 1140: /* *mmx_subv8qi3 */ |
| 4442 | case 1141: /* *mmx_addv4hi3 */ |
| 4443 | case 1142: /* *mmx_subv4hi3 */ |
| 4444 | case 1143: /* *mmx_addv2si3 */ |
| 4445 | case 1144: /* *mmx_subv2si3 */ |
| 4446 | case 1145: /* *mmx_addv1di3 */ |
| 4447 | case 1146: /* *mmx_subv1di3 */ |
| 4448 | case 1147: /* *mmx_ssaddv8qi3 */ |
| 4449 | case 1148: /* *mmx_usaddv8qi3 */ |
| 4450 | case 1149: /* *mmx_sssubv8qi3 */ |
| 4451 | case 1150: /* *mmx_ussubv8qi3 */ |
| 4452 | case 1151: /* *mmx_ssaddv4hi3 */ |
| 4453 | case 1152: /* *mmx_usaddv4hi3 */ |
| 4454 | case 1153: /* *mmx_sssubv4hi3 */ |
| 4455 | case 1154: /* *mmx_ussubv4hi3 */ |
| 4456 | case 1161: /* *mmx_smaxv4hi3 */ |
| 4457 | case 1162: /* *mmx_sminv4hi3 */ |
| 4458 | case 1163: /* *mmx_umaxv8qi3 */ |
| 4459 | case 1164: /* *mmx_uminv8qi3 */ |
| 4460 | case 1179: /* mmx_andnotv8qi3 */ |
| 4461 | case 1180: /* mmx_andnotv4hi3 */ |
| 4462 | case 1181: /* mmx_andnotv2si3 */ |
| 4463 | case 1182: /* *mmx_andv8qi3 */ |
| 4464 | case 1183: /* *mmx_iorv8qi3 */ |
| 4465 | case 1184: /* *mmx_xorv8qi3 */ |
| 4466 | case 1185: /* *mmx_andv4hi3 */ |
| 4467 | case 1186: /* *mmx_iorv4hi3 */ |
| 4468 | case 1187: /* *mmx_xorv4hi3 */ |
| 4469 | case 1188: /* *mmx_andv2si3 */ |
| 4470 | case 1189: /* *mmx_iorv2si3 */ |
| 4471 | case 1190: /* *mmx_xorv2si3 */ |
| 4472 | case 1208: /* *vec_extractv2si_1 */ |
| 4473 | case 1218: /* movv64qi_internal */ |
| 4474 | case 1219: /* movv32qi_internal */ |
| 4475 | case 1220: /* movv16qi_internal */ |
| 4476 | case 1221: /* movv32hi_internal */ |
| 4477 | case 1222: /* movv16hi_internal */ |
| 4478 | case 1223: /* movv8hi_internal */ |
| 4479 | case 1224: /* movv16si_internal */ |
| 4480 | case 1225: /* movv8si_internal */ |
| 4481 | case 1226: /* movv4si_internal */ |
| 4482 | case 1227: /* movv8di_internal */ |
| 4483 | case 1228: /* movv4di_internal */ |
| 4484 | case 1229: /* movv2di_internal */ |
| 4485 | case 1230: /* movv4ti_internal */ |
| 4486 | case 1231: /* movv2ti_internal */ |
| 4487 | case 1232: /* movv1ti_internal */ |
| 4488 | case 1233: /* movv16sf_internal */ |
| 4489 | case 1234: /* movv8sf_internal */ |
| 4490 | case 1235: /* movv4sf_internal */ |
| 4491 | case 1236: /* movv8df_internal */ |
| 4492 | case 1237: /* movv4df_internal */ |
| 4493 | case 1238: /* movv2df_internal */ |
| 4494 | case 2418: /* sse_movhlps */ |
| 4495 | case 2419: /* sse_movlhps */ |
| 4496 | case 2449: /* sse_storehps */ |
| 4497 | case 2450: /* sse_loadhps */ |
| 4498 | case 2451: /* sse_storelps */ |
| 4499 | case 2459: /* *vec_concatv2sf_sse4_1 */ |
| 4500 | case 2460: /* *vec_concatv2sf_sse */ |
| 4501 | case 2461: /* *vec_concatv4sf */ |
| 4502 | case 2462: /* vec_setv4si_0 */ |
| 4503 | case 2463: /* vec_setv4sf_0 */ |
| 4504 | case 2726: /* sse2_storehpd */ |
| 4505 | case 2727: /* *vec_extractv2df_1_sse */ |
| 4506 | case 2728: /* sse2_storelpd */ |
| 4507 | case 2729: /* *vec_extractv2df_0_sse */ |
| 4508 | case 2730: /* sse2_loadhpd */ |
| 4509 | case 2731: /* sse2_loadlpd */ |
| 4510 | case 2735: /* vec_concatv2df */ |
| 4511 | case 2934: /* *addv64qi3 */ |
| 4512 | case 2935: /* *subv64qi3 */ |
| 4513 | case 2936: /* *addv32qi3 */ |
| 4514 | case 2937: /* *subv32qi3 */ |
| 4515 | case 2938: /* *addv16qi3 */ |
| 4516 | case 2939: /* *subv16qi3 */ |
| 4517 | case 2940: /* *addv32hi3 */ |
| 4518 | case 2941: /* *subv32hi3 */ |
| 4519 | case 2942: /* *addv16hi3 */ |
| 4520 | case 2943: /* *subv16hi3 */ |
| 4521 | case 2944: /* *addv8hi3 */ |
| 4522 | case 2945: /* *subv8hi3 */ |
| 4523 | case 2946: /* *addv16si3 */ |
| 4524 | case 2947: /* *subv16si3 */ |
| 4525 | case 2948: /* *addv8si3 */ |
| 4526 | case 2949: /* *subv8si3 */ |
| 4527 | case 2950: /* *addv4si3 */ |
| 4528 | case 2951: /* *subv4si3 */ |
| 4529 | case 2952: /* *addv8di3 */ |
| 4530 | case 2953: /* *subv8di3 */ |
| 4531 | case 2954: /* *addv4di3 */ |
| 4532 | case 2955: /* *subv4di3 */ |
| 4533 | case 2956: /* *addv2di3 */ |
| 4534 | case 2957: /* *subv2di3 */ |
| 4535 | case 2958: /* *addv16si3_mask */ |
| 4536 | case 2959: /* *subv16si3_mask */ |
| 4537 | case 2960: /* *addv8si3_mask */ |
| 4538 | case 2961: /* *subv8si3_mask */ |
| 4539 | case 2962: /* *addv4si3_mask */ |
| 4540 | case 2963: /* *subv4si3_mask */ |
| 4541 | case 2964: /* *addv8di3_mask */ |
| 4542 | case 2965: /* *subv8di3_mask */ |
| 4543 | case 2966: /* *addv4di3_mask */ |
| 4544 | case 2967: /* *subv4di3_mask */ |
| 4545 | case 2968: /* *addv2di3_mask */ |
| 4546 | case 2969: /* *subv2di3_mask */ |
| 4547 | case 2970: /* *addv64qi3_mask */ |
| 4548 | case 2971: /* *subv64qi3_mask */ |
| 4549 | case 2972: /* *addv16qi3_mask */ |
| 4550 | case 2973: /* *subv16qi3_mask */ |
| 4551 | case 2974: /* *addv32qi3_mask */ |
| 4552 | case 2975: /* *subv32qi3_mask */ |
| 4553 | case 2976: /* *addv32hi3_mask */ |
| 4554 | case 2977: /* *subv32hi3_mask */ |
| 4555 | case 2978: /* *addv16hi3_mask */ |
| 4556 | case 2979: /* *subv16hi3_mask */ |
| 4557 | case 2980: /* *addv8hi3_mask */ |
| 4558 | case 2981: /* *subv8hi3_mask */ |
| 4559 | case 2982: /* *avx512bw_ssaddv64qi3 */ |
| 4560 | case 2983: /* *avx512bw_ssaddv64qi3_mask */ |
| 4561 | case 2984: /* *avx512bw_usaddv64qi3 */ |
| 4562 | case 2985: /* *avx512bw_usaddv64qi3_mask */ |
| 4563 | case 2986: /* *avx512bw_sssubv64qi3 */ |
| 4564 | case 2987: /* *avx512bw_sssubv64qi3_mask */ |
| 4565 | case 2988: /* *avx512bw_ussubv64qi3 */ |
| 4566 | case 2989: /* *avx512bw_ussubv64qi3_mask */ |
| 4567 | case 2990: /* *avx2_ssaddv32qi3 */ |
| 4568 | case 2991: /* *avx2_ssaddv32qi3_mask */ |
| 4569 | case 2992: /* *avx2_usaddv32qi3 */ |
| 4570 | case 2993: /* *avx2_usaddv32qi3_mask */ |
| 4571 | case 2994: /* *avx2_sssubv32qi3 */ |
| 4572 | case 2995: /* *avx2_sssubv32qi3_mask */ |
| 4573 | case 2996: /* *avx2_ussubv32qi3 */ |
| 4574 | case 2997: /* *avx2_ussubv32qi3_mask */ |
| 4575 | case 2998: /* *sse2_ssaddv16qi3 */ |
| 4576 | case 2999: /* *sse2_ssaddv16qi3_mask */ |
| 4577 | case 3000: /* *sse2_usaddv16qi3 */ |
| 4578 | case 3001: /* *sse2_usaddv16qi3_mask */ |
| 4579 | case 3002: /* *sse2_sssubv16qi3 */ |
| 4580 | case 3003: /* *sse2_sssubv16qi3_mask */ |
| 4581 | case 3004: /* *sse2_ussubv16qi3 */ |
| 4582 | case 3005: /* *sse2_ussubv16qi3_mask */ |
| 4583 | case 3006: /* *avx512bw_ssaddv32hi3 */ |
| 4584 | case 3007: /* *avx512bw_ssaddv32hi3_mask */ |
| 4585 | case 3008: /* *avx512bw_usaddv32hi3 */ |
| 4586 | case 3009: /* *avx512bw_usaddv32hi3_mask */ |
| 4587 | case 3010: /* *avx512bw_sssubv32hi3 */ |
| 4588 | case 3011: /* *avx512bw_sssubv32hi3_mask */ |
| 4589 | case 3012: /* *avx512bw_ussubv32hi3 */ |
| 4590 | case 3013: /* *avx512bw_ussubv32hi3_mask */ |
| 4591 | case 3014: /* *avx2_ssaddv16hi3 */ |
| 4592 | case 3015: /* *avx2_ssaddv16hi3_mask */ |
| 4593 | case 3016: /* *avx2_usaddv16hi3 */ |
| 4594 | case 3017: /* *avx2_usaddv16hi3_mask */ |
| 4595 | case 3018: /* *avx2_sssubv16hi3 */ |
| 4596 | case 3019: /* *avx2_sssubv16hi3_mask */ |
| 4597 | case 3020: /* *avx2_ussubv16hi3 */ |
| 4598 | case 3021: /* *avx2_ussubv16hi3_mask */ |
| 4599 | case 3022: /* *sse2_ssaddv8hi3 */ |
| 4600 | case 3023: /* *sse2_ssaddv8hi3_mask */ |
| 4601 | case 3024: /* *sse2_usaddv8hi3 */ |
| 4602 | case 3025: /* *sse2_usaddv8hi3_mask */ |
| 4603 | case 3026: /* *sse2_sssubv8hi3 */ |
| 4604 | case 3027: /* *sse2_sssubv8hi3_mask */ |
| 4605 | case 3028: /* *sse2_ussubv8hi3 */ |
| 4606 | case 3029: /* *sse2_ussubv8hi3_mask */ |
| 4607 | case 3030: /* *mulv32hi3 */ |
| 4608 | case 3031: /* *mulv32hi3_mask */ |
| 4609 | case 3032: /* *mulv16hi3 */ |
| 4610 | case 3033: /* *mulv16hi3_mask */ |
| 4611 | case 3034: /* *mulv8hi3 */ |
| 4612 | case 3035: /* *mulv8hi3_mask */ |
| 4613 | case 3036: /* *smulv32hi3_highpart */ |
| 4614 | case 3037: /* *smulv32hi3_highpart_mask */ |
| 4615 | case 3038: /* *umulv32hi3_highpart */ |
| 4616 | case 3039: /* *umulv32hi3_highpart_mask */ |
| 4617 | case 3040: /* *smulv16hi3_highpart */ |
| 4618 | case 3041: /* *smulv16hi3_highpart_mask */ |
| 4619 | case 3042: /* *umulv16hi3_highpart */ |
| 4620 | case 3043: /* *umulv16hi3_highpart_mask */ |
| 4621 | case 3044: /* *smulv8hi3_highpart */ |
| 4622 | case 3045: /* *smulv8hi3_highpart_mask */ |
| 4623 | case 3046: /* *umulv8hi3_highpart */ |
| 4624 | case 3047: /* *umulv8hi3_highpart_mask */ |
| 4625 | case 3048: /* *vec_widen_umult_even_v16si */ |
| 4626 | case 3049: /* *vec_widen_umult_even_v16si_mask */ |
| 4627 | case 3050: /* *vec_widen_umult_even_v8si */ |
| 4628 | case 3051: /* *vec_widen_umult_even_v8si_mask */ |
| 4629 | case 3052: /* *vec_widen_umult_even_v4si */ |
| 4630 | case 3053: /* *vec_widen_umult_even_v4si_mask */ |
| 4631 | case 3054: /* *vec_widen_smult_even_v16si */ |
| 4632 | case 3055: /* *vec_widen_smult_even_v16si_mask */ |
| 4633 | case 3056: /* *vec_widen_smult_even_v8si */ |
| 4634 | case 3057: /* *vec_widen_smult_even_v8si_mask */ |
| 4635 | case 3058: /* *sse4_1_mulv2siv2di3 */ |
| 4636 | case 3059: /* *sse4_1_mulv2siv2di3_mask */ |
| 4637 | case 3060: /* avx512bw_pmaddwd512v32hi */ |
| 4638 | case 3061: /* avx512bw_pmaddwd512v32hi_mask */ |
| 4639 | case 3062: /* avx512bw_pmaddwd512v16hi */ |
| 4640 | case 3063: /* avx512bw_pmaddwd512v16hi_mask */ |
| 4641 | case 3064: /* avx512bw_pmaddwd512v8hi */ |
| 4642 | case 3065: /* avx512bw_pmaddwd512v8hi_mask */ |
| 4643 | case 3066: /* *avx2_pmaddwd */ |
| 4644 | case 3067: /* *sse2_pmaddwd */ |
| 4645 | case 3068: /* avx512dq_mulv8di3 */ |
| 4646 | case 3069: /* avx512dq_mulv8di3_mask */ |
| 4647 | case 3070: /* avx512dq_mulv4di3 */ |
| 4648 | case 3071: /* avx512dq_mulv4di3_mask */ |
| 4649 | case 3072: /* avx512dq_mulv2di3 */ |
| 4650 | case 3073: /* avx512dq_mulv2di3_mask */ |
| 4651 | case 3074: /* *avx512f_mulv16si3 */ |
| 4652 | case 3075: /* *avx512f_mulv16si3_mask */ |
| 4653 | case 3076: /* *avx2_mulv8si3 */ |
| 4654 | case 3077: /* *avx2_mulv8si3_mask */ |
| 4655 | case 3078: /* *sse4_1_mulv4si3 */ |
| 4656 | case 3079: /* *sse4_1_mulv4si3_mask */ |
| 4657 | case 3080: /* *ashrv16hi3 */ |
| 4658 | case 3081: /* ashrv16hi3_mask */ |
| 4659 | case 3082: /* *ashrv8hi3 */ |
| 4660 | case 3083: /* ashrv8hi3_mask */ |
| 4661 | case 3084: /* *ashrv8si3 */ |
| 4662 | case 3085: /* ashrv8si3_mask */ |
| 4663 | case 3086: /* *ashrv4si3 */ |
| 4664 | case 3087: /* ashrv4si3_mask */ |
| 4665 | case 3088: /* ashrv16hi3 */ |
| 4666 | case 3089: /* ashrv8hi3 */ |
| 4667 | case 3090: /* ashrv8si3 */ |
| 4668 | case 3091: /* ashrv4si3 */ |
| 4669 | case 3092: /* *ashrv2di3 */ |
| 4670 | case 3093: /* ashrv2di3_mask */ |
| 4671 | case 3094: /* ashrv32hi3 */ |
| 4672 | case 3095: /* ashrv32hi3_mask */ |
| 4673 | case 3096: /* ashrv4di3 */ |
| 4674 | case 3097: /* ashrv4di3_mask */ |
| 4675 | case 3098: /* ashrv16si3 */ |
| 4676 | case 3099: /* ashrv16si3_mask */ |
| 4677 | case 3100: /* ashrv8di3 */ |
| 4678 | case 3101: /* ashrv8di3_mask */ |
| 4679 | case 3102: /* ashlv32hi3 */ |
| 4680 | case 3103: /* ashlv32hi3_mask */ |
| 4681 | case 3104: /* lshrv32hi3 */ |
| 4682 | case 3105: /* lshrv32hi3_mask */ |
| 4683 | case 3106: /* ashlv16hi3 */ |
| 4684 | case 3107: /* ashlv16hi3_mask */ |
| 4685 | case 3108: /* lshrv16hi3 */ |
| 4686 | case 3109: /* lshrv16hi3_mask */ |
| 4687 | case 3110: /* ashlv8hi3 */ |
| 4688 | case 3111: /* ashlv8hi3_mask */ |
| 4689 | case 3112: /* lshrv8hi3 */ |
| 4690 | case 3113: /* lshrv8hi3_mask */ |
| 4691 | case 3114: /* ashlv8si3 */ |
| 4692 | case 3115: /* ashlv8si3_mask */ |
| 4693 | case 3116: /* lshrv8si3 */ |
| 4694 | case 3117: /* lshrv8si3_mask */ |
| 4695 | case 3118: /* ashlv4si3 */ |
| 4696 | case 3119: /* ashlv4si3_mask */ |
| 4697 | case 3120: /* lshrv4si3 */ |
| 4698 | case 3121: /* lshrv4si3_mask */ |
| 4699 | case 3122: /* ashlv4di3 */ |
| 4700 | case 3123: /* ashlv4di3_mask */ |
| 4701 | case 3124: /* lshrv4di3 */ |
| 4702 | case 3125: /* lshrv4di3_mask */ |
| 4703 | case 3126: /* ashlv2di3 */ |
| 4704 | case 3127: /* ashlv2di3_mask */ |
| 4705 | case 3128: /* lshrv2di3 */ |
| 4706 | case 3129: /* lshrv2di3_mask */ |
| 4707 | case 3130: /* ashlv16si3 */ |
| 4708 | case 3131: /* ashlv16si3_mask */ |
| 4709 | case 3132: /* lshrv16si3 */ |
| 4710 | case 3133: /* lshrv16si3_mask */ |
| 4711 | case 3134: /* ashlv8di3 */ |
| 4712 | case 3135: /* ashlv8di3_mask */ |
| 4713 | case 3136: /* lshrv8di3 */ |
| 4714 | case 3137: /* lshrv8di3_mask */ |
| 4715 | case 3138: /* avx512bw_ashlv4ti3 */ |
| 4716 | case 3139: /* avx2_ashlv2ti3 */ |
| 4717 | case 3140: /* sse2_ashlv1ti3 */ |
| 4718 | case 3141: /* avx512bw_lshrv4ti3 */ |
| 4719 | case 3142: /* avx2_lshrv2ti3 */ |
| 4720 | case 3143: /* sse2_lshrv1ti3 */ |
| 4721 | case 3192: /* *avx2_smaxv32qi3 */ |
| 4722 | case 3193: /* *avx2_sminv32qi3 */ |
| 4723 | case 3194: /* *avx2_umaxv32qi3 */ |
| 4724 | case 3195: /* *avx2_uminv32qi3 */ |
| 4725 | case 3196: /* *avx2_smaxv16hi3 */ |
| 4726 | case 3197: /* *avx2_sminv16hi3 */ |
| 4727 | case 3198: /* *avx2_umaxv16hi3 */ |
| 4728 | case 3199: /* *avx2_uminv16hi3 */ |
| 4729 | case 3200: /* *avx2_smaxv8si3 */ |
| 4730 | case 3201: /* *avx2_sminv8si3 */ |
| 4731 | case 3202: /* *avx2_umaxv8si3 */ |
| 4732 | case 3203: /* *avx2_uminv8si3 */ |
| 4733 | case 3204: /* *avx512f_smaxv16si3 */ |
| 4734 | case 3205: /* *avx512f_smaxv16si3_mask */ |
| 4735 | case 3206: /* *avx512f_sminv16si3 */ |
| 4736 | case 3207: /* *avx512f_sminv16si3_mask */ |
| 4737 | case 3208: /* *avx512f_umaxv16si3 */ |
| 4738 | case 3209: /* *avx512f_umaxv16si3_mask */ |
| 4739 | case 3210: /* *avx512f_uminv16si3 */ |
| 4740 | case 3211: /* *avx512f_uminv16si3_mask */ |
| 4741 | case 3212: /* *avx512f_smaxv8si3 */ |
| 4742 | case 3213: /* *avx512f_smaxv8si3_mask */ |
| 4743 | case 3214: /* *avx512f_sminv8si3 */ |
| 4744 | case 3215: /* *avx512f_sminv8si3_mask */ |
| 4745 | case 3216: /* *avx512f_umaxv8si3 */ |
| 4746 | case 3217: /* *avx512f_umaxv8si3_mask */ |
| 4747 | case 3218: /* *avx512f_uminv8si3 */ |
| 4748 | case 3219: /* *avx512f_uminv8si3_mask */ |
| 4749 | case 3220: /* *avx512f_smaxv4si3 */ |
| 4750 | case 3221: /* *avx512f_smaxv4si3_mask */ |
| 4751 | case 3222: /* *avx512f_sminv4si3 */ |
| 4752 | case 3223: /* *avx512f_sminv4si3_mask */ |
| 4753 | case 3224: /* *avx512f_umaxv4si3 */ |
| 4754 | case 3225: /* *avx512f_umaxv4si3_mask */ |
| 4755 | case 3226: /* *avx512f_uminv4si3 */ |
| 4756 | case 3227: /* *avx512f_uminv4si3_mask */ |
| 4757 | case 3228: /* *avx512f_smaxv8di3 */ |
| 4758 | case 3229: /* *avx512f_smaxv8di3_mask */ |
| 4759 | case 3230: /* *avx512f_sminv8di3 */ |
| 4760 | case 3231: /* *avx512f_sminv8di3_mask */ |
| 4761 | case 3232: /* *avx512f_umaxv8di3 */ |
| 4762 | case 3233: /* *avx512f_umaxv8di3_mask */ |
| 4763 | case 3234: /* *avx512f_uminv8di3 */ |
| 4764 | case 3235: /* *avx512f_uminv8di3_mask */ |
| 4765 | case 3236: /* *avx512f_smaxv4di3 */ |
| 4766 | case 3237: /* *avx512f_smaxv4di3_mask */ |
| 4767 | case 3238: /* *avx512f_sminv4di3 */ |
| 4768 | case 3239: /* *avx512f_sminv4di3_mask */ |
| 4769 | case 3240: /* *avx512f_umaxv4di3 */ |
| 4770 | case 3241: /* *avx512f_umaxv4di3_mask */ |
| 4771 | case 3242: /* *avx512f_uminv4di3 */ |
| 4772 | case 3243: /* *avx512f_uminv4di3_mask */ |
| 4773 | case 3244: /* *avx512f_smaxv2di3 */ |
| 4774 | case 3245: /* *avx512f_smaxv2di3_mask */ |
| 4775 | case 3246: /* *avx512f_sminv2di3 */ |
| 4776 | case 3247: /* *avx512f_sminv2di3_mask */ |
| 4777 | case 3248: /* *avx512f_umaxv2di3 */ |
| 4778 | case 3249: /* *avx512f_umaxv2di3_mask */ |
| 4779 | case 3250: /* *avx512f_uminv2di3 */ |
| 4780 | case 3251: /* *avx512f_uminv2di3_mask */ |
| 4781 | case 3252: /* *smaxv64qi3 */ |
| 4782 | case 3253: /* smaxv64qi3_mask */ |
| 4783 | case 3254: /* *sminv64qi3 */ |
| 4784 | case 3255: /* sminv64qi3_mask */ |
| 4785 | case 3256: /* *umaxv64qi3 */ |
| 4786 | case 3257: /* umaxv64qi3_mask */ |
| 4787 | case 3258: /* *uminv64qi3 */ |
| 4788 | case 3259: /* uminv64qi3_mask */ |
| 4789 | case 3260: /* *smaxv16qi3 */ |
| 4790 | case 3261: /* smaxv16qi3_mask */ |
| 4791 | case 3262: /* *sminv16qi3 */ |
| 4792 | case 3263: /* sminv16qi3_mask */ |
| 4793 | case 3264: /* *umaxv16qi3 */ |
| 4794 | case 3265: /* umaxv16qi3_mask */ |
| 4795 | case 3266: /* *uminv16qi3 */ |
| 4796 | case 3267: /* uminv16qi3_mask */ |
| 4797 | case 3268: /* *smaxv32qi3 */ |
| 4798 | case 3269: /* smaxv32qi3_mask */ |
| 4799 | case 3270: /* *sminv32qi3 */ |
| 4800 | case 3271: /* sminv32qi3_mask */ |
| 4801 | case 3272: /* *umaxv32qi3 */ |
| 4802 | case 3273: /* umaxv32qi3_mask */ |
| 4803 | case 3274: /* *uminv32qi3 */ |
| 4804 | case 3275: /* uminv32qi3_mask */ |
| 4805 | case 3276: /* *smaxv32hi3 */ |
| 4806 | case 3277: /* smaxv32hi3_mask */ |
| 4807 | case 3278: /* *sminv32hi3 */ |
| 4808 | case 3279: /* sminv32hi3_mask */ |
| 4809 | case 3280: /* *umaxv32hi3 */ |
| 4810 | case 3281: /* umaxv32hi3_mask */ |
| 4811 | case 3282: /* *uminv32hi3 */ |
| 4812 | case 3283: /* uminv32hi3_mask */ |
| 4813 | case 3284: /* *smaxv16hi3 */ |
| 4814 | case 3285: /* smaxv16hi3_mask */ |
| 4815 | case 3286: /* *sminv16hi3 */ |
| 4816 | case 3287: /* sminv16hi3_mask */ |
| 4817 | case 3288: /* *umaxv16hi3 */ |
| 4818 | case 3289: /* umaxv16hi3_mask */ |
| 4819 | case 3290: /* *uminv16hi3 */ |
| 4820 | case 3291: /* uminv16hi3_mask */ |
| 4821 | case 3292: /* *smaxv8hi3 */ |
| 4822 | case 3293: /* smaxv8hi3_mask */ |
| 4823 | case 3294: /* *sminv8hi3 */ |
| 4824 | case 3295: /* sminv8hi3_mask */ |
| 4825 | case 3296: /* *umaxv8hi3 */ |
| 4826 | case 3297: /* umaxv8hi3_mask */ |
| 4827 | case 3298: /* *uminv8hi3 */ |
| 4828 | case 3299: /* uminv8hi3_mask */ |
| 4829 | case 3300: /* *sse4_1_smaxv16qi3 */ |
| 4830 | case 3301: /* *sse4_1_smaxv16qi3_mask */ |
| 4831 | case 3302: /* *sse4_1_sminv16qi3 */ |
| 4832 | case 3303: /* *sse4_1_sminv16qi3_mask */ |
| 4833 | case 3304: /* *sse4_1_smaxv4si3 */ |
| 4834 | case 3305: /* *sse4_1_smaxv4si3_mask */ |
| 4835 | case 3306: /* *sse4_1_sminv4si3 */ |
| 4836 | case 3307: /* *sse4_1_sminv4si3_mask */ |
| 4837 | case 3308: /* *smaxv8hi3 */ |
| 4838 | case 3309: /* *sminv8hi3 */ |
| 4839 | case 3310: /* *sse4_1_umaxv8hi3 */ |
| 4840 | case 3311: /* *sse4_1_umaxv8hi3_mask */ |
| 4841 | case 3312: /* *sse4_1_uminv8hi3 */ |
| 4842 | case 3313: /* *sse4_1_uminv8hi3_mask */ |
| 4843 | case 3314: /* *sse4_1_umaxv4si3 */ |
| 4844 | case 3315: /* *sse4_1_umaxv4si3_mask */ |
| 4845 | case 3316: /* *sse4_1_uminv4si3 */ |
| 4846 | case 3317: /* *sse4_1_uminv4si3_mask */ |
| 4847 | case 3318: /* *umaxv16qi3 */ |
| 4848 | case 3319: /* *uminv16qi3 */ |
| 4849 | case 3620: /* sse2_loadld */ |
| 4850 | case 3634: /* *vec_extractv4si */ |
| 4851 | case 3638: /* *vec_extractv2di_1 */ |
| 4852 | case 3640: /* *vec_concatv2si */ |
| 4853 | case 3641: /* *vec_concatv4si */ |
| 4854 | case 3642: /* vec_concatv2di */ |
| 4855 | case 3643: /* *avx512bw_uavgv64qi3 */ |
| 4856 | case 3644: /* *avx512bw_uavgv64qi3_mask */ |
| 4857 | case 3645: /* *avx2_uavgv32qi3 */ |
| 4858 | case 3646: /* *avx2_uavgv32qi3_mask */ |
| 4859 | case 3647: /* *sse2_uavgv16qi3 */ |
| 4860 | case 3648: /* *sse2_uavgv16qi3_mask */ |
| 4861 | case 3649: /* *avx512bw_uavgv32hi3 */ |
| 4862 | case 3650: /* *avx512bw_uavgv32hi3_mask */ |
| 4863 | case 3651: /* *avx2_uavgv16hi3 */ |
| 4864 | case 3652: /* *avx2_uavgv16hi3_mask */ |
| 4865 | case 3653: /* *sse2_uavgv8hi3 */ |
| 4866 | case 3654: /* *sse2_uavgv8hi3_mask */ |
| 4867 | case 3655: /* avx512f_psadbw */ |
| 4868 | case 3656: /* avx2_psadbw */ |
| 4869 | case 3657: /* sse2_psadbw */ |
| 4870 | case 3678: /* avx2_phaddwv16hi3 */ |
| 4871 | case 3679: /* avx2_phaddswv16hi3 */ |
| 4872 | case 3680: /* avx2_phsubwv16hi3 */ |
| 4873 | case 3681: /* avx2_phsubswv16hi3 */ |
| 4874 | case 3682: /* ssse3_phaddwv8hi3 */ |
| 4875 | case 3683: /* ssse3_phaddswv8hi3 */ |
| 4876 | case 3684: /* ssse3_phsubwv8hi3 */ |
| 4877 | case 3685: /* ssse3_phsubswv8hi3 */ |
| 4878 | case 3686: /* ssse3_phaddwv4hi3 */ |
| 4879 | case 3687: /* ssse3_phaddswv4hi3 */ |
| 4880 | case 3688: /* ssse3_phsubwv4hi3 */ |
| 4881 | case 3689: /* ssse3_phsubswv4hi3 */ |
| 4882 | case 3690: /* avx2_phadddv8si3 */ |
| 4883 | case 3691: /* avx2_phsubdv8si3 */ |
| 4884 | case 3692: /* ssse3_phadddv4si3 */ |
| 4885 | case 3693: /* ssse3_phsubdv4si3 */ |
| 4886 | case 3694: /* ssse3_phadddv2si3 */ |
| 4887 | case 3695: /* ssse3_phsubdv2si3 */ |
| 4888 | case 3696: /* avx2_pmaddubsw256 */ |
| 4889 | case 3697: /* avx512bw_pmaddubsw512v8hi */ |
| 4890 | case 3698: /* avx512bw_pmaddubsw512v8hi_mask */ |
| 4891 | case 3699: /* avx512bw_pmaddubsw512v16hi */ |
| 4892 | case 3700: /* avx512bw_pmaddubsw512v16hi_mask */ |
| 4893 | case 3701: /* avx512bw_pmaddubsw512v32hi */ |
| 4894 | case 3702: /* avx512bw_pmaddubsw512v32hi_mask */ |
| 4895 | case 3703: /* avx512bw_umulhrswv32hi3 */ |
| 4896 | case 3704: /* avx512bw_umulhrswv32hi3_mask */ |
| 4897 | case 3705: /* ssse3_pmaddubsw128 */ |
| 4898 | case 3706: /* ssse3_pmaddubsw */ |
| 4899 | case 3707: /* *avx512bw_pmulhrswv32hi3 */ |
| 4900 | case 3708: /* *avx512bw_pmulhrswv32hi3_mask */ |
| 4901 | case 3709: /* *avx2_pmulhrswv16hi3 */ |
| 4902 | case 3710: /* *avx2_pmulhrswv16hi3_mask */ |
| 4903 | case 3711: /* *ssse3_pmulhrswv8hi3 */ |
| 4904 | case 3712: /* *ssse3_pmulhrswv8hi3_mask */ |
| 4905 | case 3713: /* *ssse3_pmulhrswv4hi3 */ |
| 4906 | case 3730: /* avx512bw_palignrv64qi_mask */ |
| 4907 | case 3731: /* avx2_palignrv32qi_mask */ |
| 4908 | case 3732: /* ssse3_palignrv16qi_mask */ |
| 4909 | case 3733: /* avx512bw_palignrv4ti */ |
| 4910 | case 3734: /* avx2_palignrv2ti */ |
| 4911 | case 3735: /* ssse3_palignrti */ |
| 4912 | case 3736: /* ssse3_palignrdi */ |
| 4913 | case 4000: /* xop_rotlv16qi3 */ |
| 4914 | case 4001: /* xop_rotlv8hi3 */ |
| 4915 | case 4002: /* xop_rotlv4si3 */ |
| 4916 | case 4003: /* xop_rotlv2di3 */ |
| 4917 | case 4004: /* xop_rotrv16qi3 */ |
| 4918 | case 4005: /* xop_rotrv8hi3 */ |
| 4919 | case 4006: /* xop_rotrv4si3 */ |
| 4920 | case 4007: /* xop_rotrv2di3 */ |
| 4921 | case 4008: /* xop_vrotlv16qi3 */ |
| 4922 | case 4009: /* xop_vrotlv8hi3 */ |
| 4923 | case 4010: /* xop_vrotlv4si3 */ |
| 4924 | case 4011: /* xop_vrotlv2di3 */ |
| 4925 | case 4012: /* xop_shav16qi3 */ |
| 4926 | case 4013: /* xop_shav8hi3 */ |
| 4927 | case 4014: /* xop_shav4si3 */ |
| 4928 | case 4015: /* xop_shav2di3 */ |
| 4929 | case 4016: /* xop_shlv16qi3 */ |
| 4930 | case 4017: /* xop_shlv8hi3 */ |
| 4931 | case 4018: /* xop_shlv4si3 */ |
| 4932 | case 4019: /* xop_shlv2di3 */ |
| 4933 | case 4195: /* vec_dupv4sf */ |
| 4934 | case 4196: /* *vec_dupv4si */ |
| 4935 | case 4197: /* *vec_dupv2di */ |
| 4936 | case 4250: /* *avx_vperm_broadcast_v4sf */ |
| 4937 | case 4391: /* *ssse3_palignrv16qi_perm */ |
| 4938 | case 4392: /* *ssse3_palignrv8hi_perm */ |
| 4939 | case 4393: /* *ssse3_palignrv4si_perm */ |
| 4940 | case 4394: /* *ssse3_palignrv2di_perm */ |
| 4941 | case 4395: /* *ssse3_palignrv4sf_perm */ |
| 4942 | case 4396: /* *ssse3_palignrv2df_perm */ |
| 4943 | case 4436: /* avx2_ashrvv4si */ |
| 4944 | case 4437: /* avx2_ashrvv4si_mask */ |
| 4945 | case 4438: /* avx2_ashrvv8si */ |
| 4946 | case 4439: /* avx2_ashrvv8si_mask */ |
| 4947 | case 4440: /* avx512f_ashrvv16si */ |
| 4948 | case 4441: /* avx512f_ashrvv16si_mask */ |
| 4949 | case 4442: /* avx2_ashrvv2di */ |
| 4950 | case 4443: /* avx2_ashrvv2di_mask */ |
| 4951 | case 4444: /* avx2_ashrvv4di */ |
| 4952 | case 4445: /* avx2_ashrvv4di_mask */ |
| 4953 | case 4446: /* avx512f_ashrvv8di */ |
| 4954 | case 4447: /* avx512f_ashrvv8di_mask */ |
| 4955 | case 4448: /* avx512vl_ashrvv8hi */ |
| 4956 | case 4449: /* avx512vl_ashrvv8hi_mask */ |
| 4957 | case 4450: /* avx512vl_ashrvv16hi */ |
| 4958 | case 4451: /* avx512vl_ashrvv16hi_mask */ |
| 4959 | case 4452: /* avx512bw_ashrvv32hi */ |
| 4960 | case 4453: /* avx512bw_ashrvv32hi_mask */ |
| 4961 | case 4454: /* avx512f_ashlvv16si */ |
| 4962 | case 4455: /* avx512f_ashlvv16si_mask */ |
| 4963 | case 4456: /* avx512f_lshrvv16si */ |
| 4964 | case 4457: /* avx512f_lshrvv16si_mask */ |
| 4965 | case 4458: /* avx2_ashlvv8si */ |
| 4966 | case 4459: /* avx2_ashlvv8si_mask */ |
| 4967 | case 4460: /* avx2_lshrvv8si */ |
| 4968 | case 4461: /* avx2_lshrvv8si_mask */ |
| 4969 | case 4462: /* avx2_ashlvv4si */ |
| 4970 | case 4463: /* avx2_ashlvv4si_mask */ |
| 4971 | case 4464: /* avx2_lshrvv4si */ |
| 4972 | case 4465: /* avx2_lshrvv4si_mask */ |
| 4973 | case 4466: /* avx512f_ashlvv8di */ |
| 4974 | case 4467: /* avx512f_ashlvv8di_mask */ |
| 4975 | case 4468: /* avx512f_lshrvv8di */ |
| 4976 | case 4469: /* avx512f_lshrvv8di_mask */ |
| 4977 | case 4470: /* avx2_ashlvv4di */ |
| 4978 | case 4471: /* avx2_ashlvv4di_mask */ |
| 4979 | case 4472: /* avx2_lshrvv4di */ |
| 4980 | case 4473: /* avx2_lshrvv4di_mask */ |
| 4981 | case 4474: /* avx2_ashlvv2di */ |
| 4982 | case 4475: /* avx2_ashlvv2di_mask */ |
| 4983 | case 4476: /* avx2_lshrvv2di */ |
| 4984 | case 4477: /* avx2_lshrvv2di_mask */ |
| 4985 | case 4478: /* avx512vl_ashlvv8hi */ |
| 4986 | case 4479: /* avx512vl_ashlvv8hi_mask */ |
| 4987 | case 4480: /* avx512vl_lshrvv8hi */ |
| 4988 | case 4481: /* avx512vl_lshrvv8hi_mask */ |
| 4989 | case 4482: /* avx512vl_ashlvv16hi */ |
| 4990 | case 4483: /* avx512vl_ashlvv16hi_mask */ |
| 4991 | case 4484: /* avx512vl_lshrvv16hi */ |
| 4992 | case 4485: /* avx512vl_lshrvv16hi_mask */ |
| 4993 | case 4486: /* avx512bw_ashlvv32hi */ |
| 4994 | case 4487: /* avx512bw_ashlvv32hi_mask */ |
| 4995 | case 4488: /* avx512bw_lshrvv32hi */ |
| 4996 | case 4489: /* avx512bw_lshrvv32hi_mask */ |
| 4997 | if (((cached_type = get_attr_type (insn)) == TYPE_OTHER) || (cached_type == TYPE_MULTI) || (cached_type == TYPE_CALL) || (cached_type == TYPE_CALLV) || (cached_type == TYPE_STR)) |
| 4998 | { |
| 4999 | return 6; |
| 5000 | } |
| 5001 | else if (((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) && (cached_type == TYPE_IMOV)) |
| 5002 | { |
| 5003 | return 1; |
| 5004 | } |
| 5005 | else if ((cached_memory == MEMORY_LOAD) && (cached_type == TYPE_IMOV)) |
| 5006 | { |
| 5007 | return 4; |
| 5008 | } |
| 5009 | else if ((cached_memory == MEMORY_STORE) && (cached_type == TYPE_IMOV)) |
| 5010 | { |
| 5011 | return 1; |
| 5012 | } |
| 5013 | else if ((cached_memory == MEMORY_NONE) && (cached_type == TYPE_IMOVX)) |
| 5014 | { |
| 5015 | return 1; |
| 5016 | } |
| 5017 | else if ((cached_memory == MEMORY_LOAD) && (cached_type == TYPE_IMOVX)) |
| 5018 | { |
| 5019 | return 4; |
| 5020 | } |
| 5021 | else if ((cached_memory == MEMORY_NONE) && (cached_type == TYPE_LEA)) |
| 5022 | { |
| 5023 | return 1; |
| 5024 | } |
| 5025 | else if ((cached_memory == MEMORY_NONE) && ((cached_type == TYPE_ISHIFT) || (cached_type == TYPE_ISHIFT1) || (cached_type == TYPE_ROTATE) || (cached_type == TYPE_ROTATE1))) |
| 5026 | { |
| 5027 | return 1; |
| 5028 | } |
| 5029 | else if ((! (cached_memory == MEMORY_NONE)) && ((cached_type == TYPE_ISHIFT) || (cached_type == TYPE_ISHIFT1) || (cached_type == TYPE_ROTATE) || (cached_type == TYPE_ROTATE1))) |
| 5030 | { |
| 5031 | return 4; |
| 5032 | } |
| 5033 | else if ((cached_memory == MEMORY_NONE) && (cached_type == TYPE_IBR)) |
| 5034 | { |
| 5035 | return 1; |
| 5036 | } |
| 5037 | else if ((! (cached_memory == MEMORY_NONE)) && (cached_type == TYPE_IBR)) |
| 5038 | { |
| 5039 | return 6; |
| 5040 | } |
| 5041 | else if (cached_type == TYPE_LEAVE) |
| 5042 | { |
| 5043 | return 4; |
| 5044 | } |
| 5045 | else if ((cached_memory == MEMORY_NONE) && (cached_type == TYPE_IMUL)) |
| 5046 | { |
| 5047 | return 4; |
| 5048 | } |
| 5049 | else if ((! (cached_memory == MEMORY_NONE)) && (cached_type == TYPE_IMUL)) |
| 5050 | { |
| 5051 | return 4; |
| 5052 | } |
| 5053 | else if ((cached_memory == MEMORY_NONE) && ((cached_mode = get_attr_mode (insn)) == MODE_QI) && (cached_type == TYPE_IDIV)) |
| 5054 | { |
| 5055 | return 19 /* 0x13 */; |
| 5056 | } |
| 5057 | else if ((cached_memory == MEMORY_LOAD) && ((cached_mode = get_attr_mode (insn)) == MODE_QI) && (cached_type == TYPE_IDIV)) |
| 5058 | { |
| 5059 | return 19 /* 0x13 */; |
| 5060 | } |
| 5061 | else if ((cached_memory == MEMORY_NONE) && ((cached_mode = get_attr_mode (insn)) == MODE_HI) && (cached_type == TYPE_IDIV)) |
| 5062 | { |
| 5063 | return 23 /* 0x17 */; |
| 5064 | } |
| 5065 | else if ((cached_memory == MEMORY_LOAD) && ((cached_mode = get_attr_mode (insn)) == MODE_HI) && (cached_type == TYPE_IDIV)) |
| 5066 | { |
| 5067 | return 23 /* 0x17 */; |
| 5068 | } |
| 5069 | else if ((cached_memory == MEMORY_NONE) && ((cached_mode = get_attr_mode (insn)) == MODE_SI) && (cached_type == TYPE_IDIV)) |
| 5070 | { |
| 5071 | return 39 /* 0x27 */; |
| 5072 | } |
| 5073 | else if ((cached_memory == MEMORY_LOAD) && ((cached_mode = get_attr_mode (insn)) == MODE_SI) && (cached_type == TYPE_IDIV)) |
| 5074 | { |
| 5075 | return 39 /* 0x27 */; |
| 5076 | } |
| 5077 | else if (((cached_memory == MEMORY_NONE) || (cached_memory == MEMORY_UNKNOWN)) && (cached_type == TYPE_FOP)) |
| 5078 | { |
| 5079 | return 3; |
| 5080 | } |
| 5081 | else if ((cached_memory == MEMORY_LOAD) && (cached_type == TYPE_FOP)) |
| 5082 | { |
| 5083 | return 5; |
| 5084 | } |
| 5085 | else if ((cached_memory == MEMORY_STORE) && (cached_type == TYPE_FOP)) |
| 5086 | { |
| 5087 | return 3; |
| 5088 | } |
| 5089 | else if ((cached_memory == MEMORY_BOTH) && (cached_type == TYPE_FOP)) |
| 5090 | { |
| 5091 | return 5; |
| 5092 | } |
| 5093 | else if (cached_type == TYPE_FSGN) |
| 5094 | { |
| 5095 | return 1; |
| 5096 | } |
| 5097 | else if (cached_type == TYPE_FISTP) |
| 5098 | { |
| 5099 | return 5; |
| 5100 | } |
| 5101 | else if (cached_type == TYPE_FCMOV) |
| 5102 | { |
| 5103 | return 2; |
| 5104 | } |
| 5105 | else if ((cached_memory == MEMORY_NONE) && (cached_type == TYPE_FCMP)) |
| 5106 | { |
| 5107 | return 1; |
| 5108 | } |
| 5109 | else if ((cached_memory == MEMORY_LOAD) && (cached_type == TYPE_FCMP)) |
| 5110 | { |
| 5111 | return 4; |
| 5112 | } |
| 5113 | else if ((cached_memory == MEMORY_NONE) && (cached_type == TYPE_FMOV)) |
| 5114 | { |
| 5115 | return 1; |
| 5116 | } |
| 5117 | else if ((cached_memory == MEMORY_LOAD) && (! ((cached_mode = get_attr_mode (insn)) == MODE_XF)) && (cached_type == TYPE_FMOV)) |
| 5118 | { |
| 5119 | return 1; |
| 5120 | } |
| 5121 | else if ((cached_memory == MEMORY_LOAD) && ((cached_mode = get_attr_mode (insn)) == MODE_XF) && (cached_type == TYPE_FMOV)) |
| 5122 | { |
| 5123 | return 3; |
| 5124 | } |
| 5125 | else if ((cached_memory == MEMORY_STORE) && (! ((cached_mode = get_attr_mode (insn)) == MODE_XF)) && (cached_type == TYPE_FMOV)) |
| 5126 | { |
| 5127 | return 1; |
| 5128 | } |
| 5129 | else if ((cached_memory == MEMORY_STORE) && ((cached_mode = get_attr_mode (insn)) == MODE_XF) && (cached_type == TYPE_FMOV)) |
| 5130 | { |
| 5131 | return 3; |
| 5132 | } |
| 5133 | else if ((cached_memory == MEMORY_NONE) && (cached_type == TYPE_FMUL)) |
| 5134 | { |
| 5135 | return 5; |
| 5136 | } |
| 5137 | else if ((cached_memory == MEMORY_LOAD) && (cached_type == TYPE_FMUL)) |
| 5138 | { |
| 5139 | return 6; |
| 5140 | } |
| 5141 | else if ((cached_memory == MEMORY_NONE) && ((cached_mode = get_attr_mode (insn)) == MODE_SF) && ((cached_type == TYPE_FDIV) || (cached_type == TYPE_FPSPC))) |
| 5142 | { |
| 5143 | return 18 /* 0x12 */; |
| 5144 | } |
| 5145 | else if ((cached_memory == MEMORY_LOAD) && ((cached_mode = get_attr_mode (insn)) == MODE_SF) && ((cached_type == TYPE_FDIV) || (cached_type == TYPE_FPSPC))) |
| 5146 | { |
| 5147 | return 19 /* 0x13 */; |
| 5148 | } |
| 5149 | else if ((cached_memory == MEMORY_NONE) && ((cached_mode = get_attr_mode (insn)) == MODE_DF) && ((cached_type == TYPE_FDIV) || (cached_type == TYPE_FPSPC))) |
| 5150 | { |
| 5151 | return 32 /* 0x20 */; |
| 5152 | } |
| 5153 | else if ((cached_memory == MEMORY_LOAD) && ((cached_mode = get_attr_mode (insn)) == MODE_DF) && ((cached_type == TYPE_FDIV) || (cached_type == TYPE_FPSPC))) |
| 5154 | { |
| 5155 | return 33 /* 0x21 */; |
| 5156 | } |
| 5157 | else if ((cached_memory == MEMORY_NONE) && ((cached_mode = get_attr_mode (insn)) == MODE_XF) && ((cached_type == TYPE_FDIV) || (cached_type == TYPE_FPSPC))) |
| 5158 | { |
| 5159 | return 38 /* 0x26 */; |
| 5160 | } |
| 5161 | else if ((cached_memory == MEMORY_LOAD) && ((cached_mode = get_attr_mode (insn)) == MODE_XF) && ((cached_type == TYPE_FDIV) || (cached_type == TYPE_FPSPC))) |
| 5162 | { |
| 5163 | return 39 /* 0x27 */; |
| 5164 | } |
| 5165 | else if ((cached_memory == MEMORY_NONE) && (cached_type == TYPE_MMXSHFT)) |
| 5166 | { |
| 5167 | return 1; |
| 5168 | } |
| 5169 | else if ((cached_memory == MEMORY_NONE) && (cached_type == TYPE_MMXMUL)) |
| 5170 | { |
| 5171 | return 3; |
| 5172 | } |
| 5173 | else if (((cached_mode = get_attr_mode (insn)) == MODE_DI) && (cached_type == TYPE_MMXCVT)) |
| 5174 | { |
| 5175 | return 4; |
| 5176 | } |
| 5177 | else if ((cached_memory == MEMORY_UNKNOWN) && (cached_type == TYPE_SSE)) |
| 5178 | { |
| 5179 | return 3; |
| 5180 | } |
| 5181 | else if ((cached_mode == MODE_SF) && (cached_type == TYPE_SSE)) |
| 5182 | { |
| 5183 | return 3; |
| 5184 | } |
| 5185 | else if ((cached_memory == MEMORY_NONE) && (cached_mode == MODE_SF) && ((cached_type == TYPE_SSEADD) || (cached_type == TYPE_SSEADD1))) |
| 5186 | { |
| 5187 | return 3; |
| 5188 | } |
| 5189 | else if ((cached_memory == MEMORY_LOAD) && (cached_mode == MODE_SF) && ((cached_type == TYPE_SSEADD) || (cached_type == TYPE_SSEADD1))) |
| 5190 | { |
| 5191 | return 3; |
| 5192 | } |
| 5193 | else if ((cached_memory == MEMORY_NONE) && (cached_mode == MODE_SF) && (cached_type == TYPE_SSECMP)) |
| 5194 | { |
| 5195 | return 3; |
| 5196 | } |
| 5197 | else if ((cached_memory == MEMORY_LOAD) && (cached_mode == MODE_SF) && (cached_type == TYPE_SSECMP)) |
| 5198 | { |
| 5199 | return 3; |
| 5200 | } |
| 5201 | else if ((cached_memory == MEMORY_NONE) && (cached_mode == MODE_SF) && (cached_type == TYPE_SSECOMI)) |
| 5202 | { |
| 5203 | return 1; |
| 5204 | } |
| 5205 | else if ((cached_memory == MEMORY_LOAD) && (cached_mode == MODE_SF) && (cached_type == TYPE_SSECOMI)) |
| 5206 | { |
| 5207 | return 1; |
| 5208 | } |
| 5209 | else if ((cached_memory == MEMORY_NONE) && (cached_mode == MODE_SF) && (cached_type == TYPE_SSEMUL)) |
| 5210 | { |
| 5211 | return 4; |
| 5212 | } |
| 5213 | else if ((cached_memory == MEMORY_LOAD) && (cached_mode == MODE_SF) && (cached_type == TYPE_SSEMUL)) |
| 5214 | { |
| 5215 | return 4; |
| 5216 | } |
| 5217 | else if ((cached_memory == MEMORY_NONE) && (cached_mode == MODE_SF) && (cached_type == TYPE_SSEDIV)) |
| 5218 | { |
| 5219 | return 18 /* 0x12 */; |
| 5220 | } |
| 5221 | else if ((cached_memory == MEMORY_NONE) && (cached_mode == MODE_SF) && (cached_type == TYPE_SSEDIV)) |
| 5222 | { |
| 5223 | return 18 /* 0x12 */; |
| 5224 | } |
| 5225 | else if ((cached_mode == MODE_SF) && (cached_type == TYPE_SSEICVT)) |
| 5226 | { |
| 5227 | return 4; |
| 5228 | } |
| 5229 | else if ((cached_mode == MODE_SI) && (cached_type == TYPE_SSEICVT)) |
| 5230 | { |
| 5231 | return 3; |
| 5232 | } |
| 5233 | else if ((cached_memory == MEMORY_NONE) && (cached_mode == MODE_SF) && (cached_type == TYPE_SSEMOV)) |
| 5234 | { |
| 5235 | return 3; |
| 5236 | } |
| 5237 | else if ((cached_memory == MEMORY_LOAD) && (cached_mode == MODE_SF) && (cached_type == TYPE_SSEMOV)) |
| 5238 | { |
| 5239 | return 3; |
| 5240 | } |
| 5241 | else if ((cached_memory == MEMORY_STORE) && (cached_mode == MODE_SF) && (cached_type == TYPE_SSEMOV)) |
| 5242 | { |
| 5243 | return 3; |
| 5244 | } |
| 5245 | else if ((cached_mode == MODE_V4SF) && (cached_type == TYPE_SSE)) |
| 5246 | { |
| 5247 | return 4; |
| 5248 | } |
| 5249 | else if ((cached_memory == MEMORY_NONE) && (cached_mode == MODE_V4SF) && ((cached_type == TYPE_SSEADD) || (cached_type == TYPE_SSEADD1))) |
| 5250 | { |
| 5251 | return 3; |
| 5252 | } |
| 5253 | else if ((cached_memory == MEMORY_LOAD) && (cached_mode == MODE_V4SF) && ((cached_type == TYPE_SSEADD) || (cached_type == TYPE_SSEADD1))) |
| 5254 | { |
| 5255 | return 3; |
| 5256 | } |
| 5257 | else if ((cached_memory == MEMORY_NONE) && (cached_mode == MODE_V4SF) && (cached_type == TYPE_SSECMP)) |
| 5258 | { |
| 5259 | return 3; |
| 5260 | } |
| 5261 | else if ((cached_memory == MEMORY_LOAD) && (cached_mode == MODE_V4SF) && (cached_type == TYPE_SSECMP)) |
| 5262 | { |
| 5263 | return 3; |
| 5264 | } |
| 5265 | else if (((cached_memory == MEMORY_NONE) || (cached_memory == MEMORY_UNKNOWN)) && (cached_mode == MODE_V4SF) && (cached_type == TYPE_SSECVT)) |
| 5266 | { |
| 5267 | return 3; |
| 5268 | } |
| 5269 | else if (((! (cached_memory == MEMORY_NONE)) && (! (cached_memory == MEMORY_UNKNOWN))) && (cached_mode == MODE_V4SF) && (cached_type == TYPE_SSECMP)) |
| 5270 | { |
| 5271 | return 4; |
| 5272 | } |
| 5273 | else if ((cached_memory == MEMORY_NONE) && (cached_mode == MODE_V4SF) && (cached_type == TYPE_SSEMUL)) |
| 5274 | { |
| 5275 | return 5; |
| 5276 | } |
| 5277 | else if ((cached_memory == MEMORY_LOAD) && (cached_mode == MODE_V4SF) && (cached_type == TYPE_SSEMUL)) |
| 5278 | { |
| 5279 | return 5; |
| 5280 | } |
| 5281 | else if ((cached_memory == MEMORY_NONE) && (cached_mode == MODE_V4SF) && (cached_type == TYPE_SSEDIV)) |
| 5282 | { |
| 5283 | return 48 /* 0x30 */; |
| 5284 | } |
| 5285 | else if ((cached_memory == MEMORY_LOAD) && (cached_mode == MODE_V4SF) && (cached_type == TYPE_SSEDIV)) |
| 5286 | { |
| 5287 | return 48 /* 0x30 */; |
| 5288 | } |
| 5289 | else if ((cached_memory == MEMORY_NONE) && (cached_mode == MODE_V4SF) && ((cached_type == TYPE_SSELOG) || (cached_type == TYPE_SSELOG1) || (cached_type == TYPE_SSESHUF) || (cached_type == TYPE_SSESHUF1))) |
| 5290 | { |
| 5291 | return 2; |
| 5292 | } |
| 5293 | else if ((cached_memory == MEMORY_LOAD) && (cached_mode == MODE_V4SF) && ((cached_type == TYPE_SSELOG) || (cached_type == TYPE_SSELOG1) || (cached_type == TYPE_SSESHUF) || (cached_type == TYPE_SSESHUF1))) |
| 5294 | { |
| 5295 | return 2; |
| 5296 | } |
| 5297 | else if ((cached_memory == MEMORY_NONE) && (cached_mode == MODE_V4SF) && (cached_type == TYPE_SSEMOV)) |
| 5298 | { |
| 5299 | return 1; |
| 5300 | } |
| 5301 | else if ((cached_memory == MEMORY_LOAD) && (cached_mode == MODE_V4SF) && (cached_type == TYPE_SSEMOV)) |
| 5302 | { |
| 5303 | return 2; |
| 5304 | } |
| 5305 | else if ((cached_memory == MEMORY_STORE) && (cached_mode == MODE_V4SF) && (cached_type == TYPE_SSEMOV)) |
| 5306 | { |
| 5307 | return 3; |
| 5308 | } |
| 5309 | else if (((cached_memory == MEMORY_NONE) || (cached_memory == MEMORY_UNKNOWN)) && ((cached_type == TYPE_ALU) || (cached_type == TYPE_ALU1) || (cached_type == TYPE_NEGNOT) || (cached_type == TYPE_INCDEC) || (cached_type == TYPE_ICMP) || (cached_type == TYPE_TEST) || (cached_type == TYPE_SETCC) || (cached_type == TYPE_ICMOV) || (cached_type == TYPE_PUSH) || (cached_type == TYPE_POP) || (cached_type == TYPE_FXCH) || (cached_type == TYPE_SSEIADD) || (cached_type == TYPE_SSEISHFT) || (cached_type == TYPE_SSEISHFT1) || (cached_type == TYPE_SSEIMUL) || (cached_type == TYPE_MMX) || (cached_type == TYPE_MMXADD) || (cached_type == TYPE_MMXCMP))) |
| 5310 | { |
| 5311 | return 1; |
| 5312 | } |
| 5313 | else if ((cached_memory == MEMORY_LOAD) && ((cached_type == TYPE_ALU) || (cached_type == TYPE_ALU1) || (cached_type == TYPE_NEGNOT) || (cached_type == TYPE_INCDEC) || (cached_type == TYPE_ICMP) || (cached_type == TYPE_TEST) || (cached_type == TYPE_SETCC) || (cached_type == TYPE_ICMOV) || (cached_type == TYPE_PUSH) || (cached_type == TYPE_POP) || (cached_type == TYPE_FXCH) || (cached_type == TYPE_SSEIADD) || (cached_type == TYPE_SSEISHFT) || (cached_type == TYPE_SSEISHFT1) || (cached_type == TYPE_SSEIMUL) || (cached_type == TYPE_MMX) || (cached_type == TYPE_MMXADD) || (cached_type == TYPE_MMXCMP))) |
| 5314 | { |
| 5315 | return 3; |
| 5316 | } |
| 5317 | else if ((cached_memory == MEMORY_STORE) && ((cached_type == TYPE_ALU) || (cached_type == TYPE_ALU1) || (cached_type == TYPE_NEGNOT) || (cached_type == TYPE_INCDEC) || (cached_type == TYPE_ICMP) || (cached_type == TYPE_TEST) || (cached_type == TYPE_SETCC) || (cached_type == TYPE_ICMOV) || (cached_type == TYPE_PUSH) || (cached_type == TYPE_POP) || (cached_type == TYPE_FXCH) || (cached_type == TYPE_SSEIADD) || (cached_type == TYPE_SSEISHFT) || (cached_type == TYPE_SSEISHFT1) || (cached_type == TYPE_SSEIMUL) || (cached_type == TYPE_MMX) || (cached_type == TYPE_MMXADD) || (cached_type == TYPE_MMXCMP))) |
| 5318 | { |
| 5319 | return 1; |
| 5320 | } |
| 5321 | else if ((cached_memory == MEMORY_BOTH) && ((cached_type == TYPE_ALU) || (cached_type == TYPE_ALU1) || (cached_type == TYPE_NEGNOT) || (cached_type == TYPE_INCDEC) || (cached_type == TYPE_ICMP) || (cached_type == TYPE_TEST) || (cached_type == TYPE_SETCC) || (cached_type == TYPE_ICMOV) || (cached_type == TYPE_PUSH) || (cached_type == TYPE_POP) || (cached_type == TYPE_FXCH) || (cached_type == TYPE_SSEIADD) || (cached_type == TYPE_SSEISHFT) || (cached_type == TYPE_SSEISHFT1) || (cached_type == TYPE_SSEIMUL) || (cached_type == TYPE_MMX) || (cached_type == TYPE_MMXADD) || (cached_type == TYPE_MMXCMP))) |
| 5322 | { |
| 5323 | return 4; |
| 5324 | } |
| 5325 | else |
| 5326 | { |
| 5327 | return 0; |
| 5328 | } |
| 5329 | |
| 5330 | default: |
| 5331 | return 0; |
| 5332 | |
| 5333 | } |
| 5334 | } |
| 5335 | |
| 5336 | int |
| 5337 | insn_default_latency_geode (rtx_insn *insn ATTRIBUTE_UNUSED) |
| 5338 | { |
| 5339 | enum attr_type cached_type ATTRIBUTE_UNUSED; |
| 5340 | enum attr_memory cached_memory ATTRIBUTE_UNUSED; |
| 5341 | |
| 5342 | switch (recog_memoized (insn)) |
| 5343 | { |
| 5344 | case 3640: /* *vec_concatv2si */ |
| 5345 | extract_constrain_insn_cached (insn); |
| 5346 | if (!((1 << which_alternative) & 0x3b)) |
| 5347 | { |
| 5348 | return 1; |
| 5349 | } |
| 5350 | else if (which_alternative == 5) |
| 5351 | { |
| 5352 | return 2; |
| 5353 | } |
| 5354 | else |
| 5355 | { |
| 5356 | return 0; |
| 5357 | } |
| 5358 | |
| 5359 | case 3639: /* *vec_concatv2si_sse4_1 */ |
| 5360 | extract_constrain_insn_cached (insn); |
| 5361 | if (which_alternative == 9) |
| 5362 | { |
| 5363 | return 1; |
| 5364 | } |
| 5365 | else if (which_alternative == 8) |
| 5366 | { |
| 5367 | return 2; |
| 5368 | } |
| 5369 | else |
| 5370 | { |
| 5371 | return 0; |
| 5372 | } |
| 5373 | |
| 5374 | case 3638: /* *vec_extractv2di_1 */ |
| 5375 | extract_constrain_insn_cached (insn); |
| 5376 | if (which_alternative == 8) |
| 5377 | { |
| 5378 | return 1; |
| 5379 | } |
| 5380 | else |
| 5381 | { |
| 5382 | return 0; |
| 5383 | } |
| 5384 | |
| 5385 | case 2731: /* sse2_loadlpd */ |
| 5386 | extract_constrain_insn_cached (insn); |
| 5387 | if (((1 << which_alternative) & 0x600)) |
| 5388 | { |
| 5389 | return 1; |
| 5390 | } |
| 5391 | else |
| 5392 | { |
| 5393 | return 0; |
| 5394 | } |
| 5395 | |
| 5396 | case 2730: /* sse2_loadhpd */ |
| 5397 | extract_constrain_insn_cached (insn); |
| 5398 | if (!((1 << which_alternative) & 0x1f)) |
| 5399 | { |
| 5400 | return 1; |
| 5401 | } |
| 5402 | else |
| 5403 | { |
| 5404 | return 0; |
| 5405 | } |
| 5406 | |
| 5407 | case 2726: /* sse2_storehpd */ |
| 5408 | extract_constrain_insn_cached (insn); |
| 5409 | if (!((1 << which_alternative) & 0xf)) |
| 5410 | { |
| 5411 | return 1; |
| 5412 | } |
| 5413 | else |
| 5414 | { |
| 5415 | return 0; |
| 5416 | } |
| 5417 | |
| 5418 | case 2463: /* vec_setv4sf_0 */ |
| 5419 | case 2462: /* vec_setv4si_0 */ |
| 5420 | extract_constrain_insn_cached (insn); |
| 5421 | if (((1 << which_alternative) & 0x3000)) |
| 5422 | { |
| 5423 | return 1; |
| 5424 | } |
| 5425 | else |
| 5426 | { |
| 5427 | return 0; |
| 5428 | } |
| 5429 | |
| 5430 | case 2460: /* *vec_concatv2sf_sse */ |
| 5431 | extract_constrain_insn_cached (insn); |
| 5432 | if (!((1 << which_alternative) & 0x7)) |
| 5433 | { |
| 5434 | return 1; |
| 5435 | } |
| 5436 | else if (which_alternative == 2) |
| 5437 | { |
| 5438 | return 2; |
| 5439 | } |
| 5440 | else |
| 5441 | { |
| 5442 | return 0; |
| 5443 | } |
| 5444 | |
| 5445 | case 2459: /* *vec_concatv2sf_sse4_1 */ |
| 5446 | extract_constrain_insn_cached (insn); |
| 5447 | if (which_alternative == 8) |
| 5448 | { |
| 5449 | return 1; |
| 5450 | } |
| 5451 | else if (which_alternative == 7) |
| 5452 | { |
| 5453 | return 2; |
| 5454 | } |
| 5455 | else |
| 5456 | { |
| 5457 | return 0; |
| 5458 | } |
| 5459 | |
| 5460 | case 1208: /* *vec_extractv2si_1 */ |
| 5461 | case 1138: /* *vec_extractv2sf_1 */ |
| 5462 | extract_constrain_insn_cached (insn); |
| 5463 | if (!((1 << which_alternative) & 0x17)) |
| 5464 | { |
| 5465 | return 1; |
| 5466 | } |
| 5467 | else if (which_alternative == 0) |
| 5468 | { |
| 5469 | return 2; |
| 5470 | } |
| 5471 | else |
| 5472 | { |
| 5473 | return 0; |
| 5474 | } |
| 5475 | |
| 5476 | case 1206: /* *mmx_concatv2si */ |
| 5477 | case 1136: /* *mmx_concatv2sf */ |
| 5478 | extract_constrain_insn_cached (insn); |
| 5479 | if (which_alternative != 0) |
| 5480 | { |
| 5481 | return 1; |
| 5482 | } |
| 5483 | else |
| 5484 | { |
| 5485 | return 2; |
| 5486 | } |
| 5487 | |
| 5488 | case 1110: /* *movv2sf_internal */ |
| 5489 | case 1109: /* *movv1di_internal */ |
| 5490 | case 1108: /* *movv2si_internal */ |
| 5491 | case 1107: /* *movv4hi_internal */ |
| 5492 | case 1106: /* *movv8qi_internal */ |
| 5493 | extract_constrain_insn_cached (insn); |
| 5494 | if (((1 << which_alternative) & 0x7df)) |
| 5495 | { |
| 5496 | return 1; |
| 5497 | } |
| 5498 | else if (which_alternative == 5) |
| 5499 | { |
| 5500 | return 2; |
| 5501 | } |
| 5502 | else |
| 5503 | { |
| 5504 | return 0; |
| 5505 | } |
| 5506 | |
| 5507 | case 994: /* pro_epilogue_adjust_stack_di_add */ |
| 5508 | case 993: /* pro_epilogue_adjust_stack_si_add */ |
| 5509 | extract_constrain_insn_cached (insn); |
| 5510 | if (((which_alternative == 0) && (! ( |
| 5511 | #line 17556 "/___NETBSD_SRC___/tools/gcc/../../external/gpl3/gcc/dist/gcc/config/i386/i386.md" |
| 5512 | (TARGET_OPT_AGU)))) || ((cached_type = get_attr_type (insn)) == TYPE_LEA) || (cached_type == TYPE_IMOV)) |
| 5513 | { |
| 5514 | return 1; |
| 5515 | } |
| 5516 | else |
| 5517 | { |
| 5518 | return 0; |
| 5519 | } |
| 5520 | |
| 5521 | case 909: /* frndintxf2_mask_pm_i387 */ |
| 5522 | case 908: /* frndintxf2_mask_pm */ |
| 5523 | case 907: /* frndintxf2_trunc_i387 */ |
| 5524 | case 906: /* frndintxf2_ceil_i387 */ |
| 5525 | case 905: /* frndintxf2_floor_i387 */ |
| 5526 | case 904: /* frndintdf2_trunc_i387 */ |
| 5527 | case 903: /* frndintdf2_ceil_i387 */ |
| 5528 | case 902: /* frndintdf2_floor_i387 */ |
| 5529 | case 901: /* frndintsf2_trunc_i387 */ |
| 5530 | case 900: /* frndintsf2_ceil_i387 */ |
| 5531 | case 899: /* frndintsf2_floor_i387 */ |
| 5532 | case 898: /* frndintxf2_trunc */ |
| 5533 | case 897: /* frndintxf2_ceil */ |
| 5534 | case 896: /* frndintxf2_floor */ |
| 5535 | case 895: /* frndintdf2_trunc */ |
| 5536 | case 894: /* frndintdf2_ceil */ |
| 5537 | case 893: /* frndintdf2_floor */ |
| 5538 | case 892: /* frndintsf2_trunc */ |
| 5539 | case 891: /* frndintsf2_ceil */ |
| 5540 | case 890: /* frndintsf2_floor */ |
| 5541 | return 12 /* 0xc */; |
| 5542 | |
| 5543 | case 889: /* fistsi2_with_temp */ |
| 5544 | case 888: /* fisthi2_with_temp */ |
| 5545 | case 887: /* fistsi2 */ |
| 5546 | case 886: /* fisthi2 */ |
| 5547 | case 885: /* *fistsi2_1 */ |
| 5548 | case 884: /* *fisthi2_1 */ |
| 5549 | case 883: /* fistdi2_with_temp */ |
| 5550 | case 882: /* fistdi2 */ |
| 5551 | case 881: /* *fistdi2_1 */ |
| 5552 | case 880: /* rintdf2_frndint */ |
| 5553 | case 879: /* rintsf2_frndint */ |
| 5554 | case 878: /* rintxf2 */ |
| 5555 | case 875: /* fscalexf4_i387 */ |
| 5556 | case 874: /* *f2xm1xf2_i387 */ |
| 5557 | case 873: /* fxtract_extenddfxf3_i387 */ |
| 5558 | case 872: /* fxtract_extendsfxf3_i387 */ |
| 5559 | case 871: /* fxtractxf3_i387 */ |
| 5560 | case 870: /* fyl2xp1_extenddfxf3_i387 */ |
| 5561 | case 869: /* fyl2xp1_extendsfxf3_i387 */ |
| 5562 | case 868: /* fyl2xp1xf3_i387 */ |
| 5563 | case 867: /* fyl2x_extenddfxf3_i387 */ |
| 5564 | case 866: /* fyl2x_extendsfxf3_i387 */ |
| 5565 | case 865: /* fyl2xxf3_i387 */ |
| 5566 | case 864: /* fpatan_extenddfxf3_i387 */ |
| 5567 | case 863: /* fpatan_extendsfxf3_i387 */ |
| 5568 | case 862: /* *fpatanxf3_i387 */ |
| 5569 | case 861: /* fptan_extenddfxf4_i387 */ |
| 5570 | case 860: /* fptan_extendsfxf4_i387 */ |
| 5571 | case 859: /* fptanxf4_i387 */ |
| 5572 | case 858: /* sincos_extenddfxf3_i387 */ |
| 5573 | case 857: /* sincos_extendsfxf3_i387 */ |
| 5574 | case 856: /* sincosxf3 */ |
| 5575 | case 855: /* *cos_extenddfxf2_i387 */ |
| 5576 | case 854: /* *sin_extenddfxf2_i387 */ |
| 5577 | case 853: /* *cos_extendsfxf2_i387 */ |
| 5578 | case 852: /* *sin_extendsfxf2_i387 */ |
| 5579 | case 851: /* *cosxf2_i387 */ |
| 5580 | case 850: /* *sinxf2_i387 */ |
| 5581 | case 849: /* fprem1xf4_i387 */ |
| 5582 | case 848: /* fpremxf4_i387 */ |
| 5583 | case 844: /* sqrt_extenddfxf2_i387 */ |
| 5584 | case 843: /* sqrt_extendsfxf2_i387 */ |
| 5585 | case 842: /* sqrtxf2 */ |
| 5586 | return 54 /* 0x36 */; |
| 5587 | |
| 5588 | case 839: /* *fop_xf_6_i387 */ |
| 5589 | case 838: /* *fop_xf_6_i387 */ |
| 5590 | case 837: /* *fop_xf_5_i387 */ |
| 5591 | case 836: /* *fop_xf_5_i387 */ |
| 5592 | case 835: /* *fop_xf_4_i387 */ |
| 5593 | case 834: /* *fop_xf_4_i387 */ |
| 5594 | case 833: /* *fop_xf_3_i387 */ |
| 5595 | case 832: /* *fop_xf_3_i387 */ |
| 5596 | case 831: /* *fop_xf_2_i387 */ |
| 5597 | case 830: /* *fop_xf_2_i387 */ |
| 5598 | case 827: /* *fop_df_6_i387 */ |
| 5599 | case 826: /* *fop_df_5_i387 */ |
| 5600 | case 825: /* *fop_df_4_i387 */ |
| 5601 | case 824: /* *fop_df_3_i387 */ |
| 5602 | case 823: /* *fop_sf_3_i387 */ |
| 5603 | case 822: /* *fop_df_3_i387 */ |
| 5604 | case 821: /* *fop_sf_3_i387 */ |
| 5605 | case 820: /* *fop_df_2_i387 */ |
| 5606 | case 819: /* *fop_sf_2_i387 */ |
| 5607 | case 818: /* *fop_df_2_i387 */ |
| 5608 | case 817: /* *fop_sf_2_i387 */ |
| 5609 | if ((cached_type = get_attr_type (insn)) == TYPE_FOP) |
| 5610 | { |
| 5611 | return 6; |
| 5612 | } |
| 5613 | else if (cached_type == TYPE_FMUL) |
| 5614 | { |
| 5615 | return 10 /* 0xa */; |
| 5616 | } |
| 5617 | else if (cached_type == TYPE_FDIV) |
| 5618 | { |
| 5619 | return 47 /* 0x2f */; |
| 5620 | } |
| 5621 | else |
| 5622 | { |
| 5623 | return 0; |
| 5624 | } |
| 5625 | |
| 5626 | case 829: /* *fop_xf_1_i387 */ |
| 5627 | case 816: /* *fop_df_1 */ |
| 5628 | case 815: /* *fop_sf_1 */ |
| 5629 | if ((cached_type = get_attr_type (insn)) == TYPE_FOP) |
| 5630 | { |
| 5631 | return 6; |
| 5632 | } |
| 5633 | else if (cached_type == TYPE_FDIV) |
| 5634 | { |
| 5635 | return 47 /* 0x2f */; |
| 5636 | } |
| 5637 | else |
| 5638 | { |
| 5639 | return 0; |
| 5640 | } |
| 5641 | |
| 5642 | case 828: /* *fop_xf_comm_i387 */ |
| 5643 | case 813: /* *fop_df_comm */ |
| 5644 | case 812: /* *fop_sf_comm */ |
| 5645 | if ((cached_type = get_attr_type (insn)) == TYPE_FOP) |
| 5646 | { |
| 5647 | return 6; |
| 5648 | } |
| 5649 | else if (cached_type == TYPE_FMUL) |
| 5650 | { |
| 5651 | return 10 /* 0xa */; |
| 5652 | } |
| 5653 | else |
| 5654 | { |
| 5655 | return 0; |
| 5656 | } |
| 5657 | |
| 5658 | case 781: /* *bswapdi2_movbe */ |
| 5659 | case 780: /* *bswapsi2_movbe */ |
| 5660 | extract_constrain_insn_cached (insn); |
| 5661 | if (which_alternative != 0) |
| 5662 | { |
| 5663 | return 1; |
| 5664 | } |
| 5665 | else |
| 5666 | { |
| 5667 | return 0; |
| 5668 | } |
| 5669 | |
| 5670 | case 602: /* *rotrsi3_1_zext */ |
| 5671 | case 601: /* *rotlsi3_1_zext */ |
| 5672 | case 599: /* *rotrdi3_1 */ |
| 5673 | case 598: /* *rotldi3_1 */ |
| 5674 | case 597: /* *rotrsi3_1 */ |
| 5675 | case 596: /* *rotlsi3_1 */ |
| 5676 | case 561: /* *ashrsi3_1_zext */ |
| 5677 | case 560: /* *lshrsi3_1_zext */ |
| 5678 | case 557: /* *ashrdi3_1 */ |
| 5679 | case 556: /* *lshrdi3_1 */ |
| 5680 | case 555: /* *ashrsi3_1 */ |
| 5681 | case 554: /* *lshrsi3_1 */ |
| 5682 | extract_constrain_insn_cached (insn); |
| 5683 | if (which_alternative == 0) |
| 5684 | { |
| 5685 | return 2; |
| 5686 | } |
| 5687 | else |
| 5688 | { |
| 5689 | return 0; |
| 5690 | } |
| 5691 | |
| 5692 | case 549: /* ashrsi3_cvt */ |
| 5693 | case 548: /* *ashrsi3_cvt_zext */ |
| 5694 | case 547: /* ashrdi3_cvt */ |
| 5695 | extract_constrain_insn_cached (insn); |
| 5696 | if (which_alternative == 0) |
| 5697 | { |
| 5698 | return 1; |
| 5699 | } |
| 5700 | else |
| 5701 | { |
| 5702 | return 2; |
| 5703 | } |
| 5704 | |
| 5705 | case 536: /* *ashldi3_cconly */ |
| 5706 | case 535: /* *ashlsi3_cconly */ |
| 5707 | case 534: /* *ashlhi3_cconly */ |
| 5708 | case 533: /* *ashlqi3_cconly */ |
| 5709 | case 532: /* *ashlsi3_cmp_zext */ |
| 5710 | case 531: /* *ashldi3_cmp */ |
| 5711 | case 530: /* *ashlsi3_cmp */ |
| 5712 | case 529: /* *ashlhi3_cmp */ |
| 5713 | case 528: /* *ashlqi3_cmp */ |
| 5714 | if ((cached_type = get_attr_type (insn)) == TYPE_ALU) |
| 5715 | { |
| 5716 | return 1; |
| 5717 | } |
| 5718 | else if (cached_type == TYPE_ISHIFT) |
| 5719 | { |
| 5720 | return 2; |
| 5721 | } |
| 5722 | else |
| 5723 | { |
| 5724 | return 0; |
| 5725 | } |
| 5726 | |
| 5727 | case 527: /* *ashlqi3_1_slp */ |
| 5728 | if ((cached_type = get_attr_type (insn)) == TYPE_ALU1) |
| 5729 | { |
| 5730 | return 1; |
| 5731 | } |
| 5732 | else if (cached_type == TYPE_ISHIFT1) |
| 5733 | { |
| 5734 | return 2; |
| 5735 | } |
| 5736 | else |
| 5737 | { |
| 5738 | return 0; |
| 5739 | } |
| 5740 | |
| 5741 | case 526: /* *ashlqi3_1 */ |
| 5742 | extract_constrain_insn_cached (insn); |
| 5743 | if (((cached_type = get_attr_type (insn)) == TYPE_ALU) || (which_alternative == 2)) |
| 5744 | { |
| 5745 | return 1; |
| 5746 | } |
| 5747 | else if (cached_type == TYPE_ISHIFT) |
| 5748 | { |
| 5749 | return 2; |
| 5750 | } |
| 5751 | else |
| 5752 | { |
| 5753 | return 0; |
| 5754 | } |
| 5755 | |
| 5756 | case 525: /* *ashlhi3_1 */ |
| 5757 | extract_constrain_insn_cached (insn); |
| 5758 | if ((which_alternative != 0) || ((cached_type = get_attr_type (insn)) == TYPE_ALU)) |
| 5759 | { |
| 5760 | return 1; |
| 5761 | } |
| 5762 | else if (cached_type == TYPE_ISHIFT) |
| 5763 | { |
| 5764 | return 2; |
| 5765 | } |
| 5766 | else |
| 5767 | { |
| 5768 | return 0; |
| 5769 | } |
| 5770 | |
| 5771 | case 524: /* *ashlsi3_1_zext */ |
| 5772 | case 522: /* *ashldi3_1 */ |
| 5773 | case 521: /* *ashlsi3_1 */ |
| 5774 | extract_constrain_insn_cached (insn); |
| 5775 | if (((cached_type = get_attr_type (insn)) == TYPE_ALU) || (which_alternative == 1)) |
| 5776 | { |
| 5777 | return 1; |
| 5778 | } |
| 5779 | else if (cached_type == TYPE_ISHIFT) |
| 5780 | { |
| 5781 | return 2; |
| 5782 | } |
| 5783 | else |
| 5784 | { |
| 5785 | return 0; |
| 5786 | } |
| 5787 | |
| 5788 | case 1217: /* *mmx_femms */ |
| 5789 | case 1216: /* *mmx_emms */ |
| 5790 | case 1215: /* *mmx_maskmovq */ |
| 5791 | case 1214: /* *mmx_maskmovq */ |
| 5792 | case 1213: /* mmx_pmovmskb */ |
| 5793 | case 1212: /* mmx_psadbw */ |
| 5794 | case 1211: /* *mmx_uavgv4hi3 */ |
| 5795 | case 1210: /* *mmx_uavgv8qi3 */ |
| 5796 | case 1205: /* *vec_dupv2si */ |
| 5797 | case 1204: /* *vec_dupv4hi */ |
| 5798 | case 1203: /* mmx_pswapdv2si2 */ |
| 5799 | case 1202: /* mmx_pshufw_1 */ |
| 5800 | case 1201: /* mmx_pextrw */ |
| 5801 | case 1200: /* *mmx_pinsrw */ |
| 5802 | case 1199: /* mmx_punpckldq */ |
| 5803 | case 1198: /* mmx_punpckhdq */ |
| 5804 | case 1197: /* mmx_punpcklwd */ |
| 5805 | case 1196: /* mmx_punpckhwd */ |
| 5806 | case 1195: /* mmx_punpcklbw */ |
| 5807 | case 1194: /* mmx_punpckhbw */ |
| 5808 | case 1193: /* mmx_packuswb */ |
| 5809 | case 1192: /* mmx_packssdw */ |
| 5810 | case 1191: /* mmx_packsswb */ |
| 5811 | case 1190: /* *mmx_xorv2si3 */ |
| 5812 | case 1189: /* *mmx_iorv2si3 */ |
| 5813 | case 1188: /* *mmx_andv2si3 */ |
| 5814 | case 1187: /* *mmx_xorv4hi3 */ |
| 5815 | case 1186: /* *mmx_iorv4hi3 */ |
| 5816 | case 1185: /* *mmx_andv4hi3 */ |
| 5817 | case 1184: /* *mmx_xorv8qi3 */ |
| 5818 | case 1183: /* *mmx_iorv8qi3 */ |
| 5819 | case 1182: /* *mmx_andv8qi3 */ |
| 5820 | case 1181: /* mmx_andnotv2si3 */ |
| 5821 | case 1180: /* mmx_andnotv4hi3 */ |
| 5822 | case 1179: /* mmx_andnotv8qi3 */ |
| 5823 | case 1178: /* mmx_gtv2si3 */ |
| 5824 | case 1177: /* mmx_gtv4hi3 */ |
| 5825 | case 1176: /* mmx_gtv8qi3 */ |
| 5826 | case 1175: /* *mmx_eqv2si3 */ |
| 5827 | case 1174: /* *mmx_eqv4hi3 */ |
| 5828 | case 1173: /* *mmx_eqv8qi3 */ |
| 5829 | case 1172: /* mmx_lshrv1di3 */ |
| 5830 | case 1171: /* mmx_ashlv1di3 */ |
| 5831 | case 1170: /* mmx_lshrv2si3 */ |
| 5832 | case 1169: /* mmx_ashlv2si3 */ |
| 5833 | case 1168: /* mmx_lshrv4hi3 */ |
| 5834 | case 1167: /* mmx_ashlv4hi3 */ |
| 5835 | case 1166: /* mmx_ashrv2si3 */ |
| 5836 | case 1165: /* mmx_ashrv4hi3 */ |
| 5837 | case 1164: /* *mmx_uminv8qi3 */ |
| 5838 | case 1163: /* *mmx_umaxv8qi3 */ |
| 5839 | case 1162: /* *mmx_sminv4hi3 */ |
| 5840 | case 1161: /* *mmx_smaxv4hi3 */ |
| 5841 | case 1160: /* *sse2_umulv1siv1di3 */ |
| 5842 | case 1159: /* *mmx_pmulhrwv4hi3 */ |
| 5843 | case 1158: /* *mmx_pmaddwd */ |
| 5844 | case 1157: /* *mmx_umulv4hi3_highpart */ |
| 5845 | case 1156: /* *mmx_smulv4hi3_highpart */ |
| 5846 | case 1155: /* *mmx_mulv4hi3 */ |
| 5847 | case 1154: /* *mmx_ussubv4hi3 */ |
| 5848 | case 1153: /* *mmx_sssubv4hi3 */ |
| 5849 | case 1152: /* *mmx_usaddv4hi3 */ |
| 5850 | case 1151: /* *mmx_ssaddv4hi3 */ |
| 5851 | case 1150: /* *mmx_ussubv8qi3 */ |
| 5852 | case 1149: /* *mmx_sssubv8qi3 */ |
| 5853 | case 1148: /* *mmx_usaddv8qi3 */ |
| 5854 | case 1147: /* *mmx_ssaddv8qi3 */ |
| 5855 | case 1146: /* *mmx_subv1di3 */ |
| 5856 | case 1145: /* *mmx_addv1di3 */ |
| 5857 | case 1144: /* *mmx_subv2si3 */ |
| 5858 | case 1143: /* *mmx_addv2si3 */ |
| 5859 | case 1142: /* *mmx_subv4hi3 */ |
| 5860 | case 1141: /* *mmx_addv4hi3 */ |
| 5861 | case 1140: /* *mmx_subv8qi3 */ |
| 5862 | case 1139: /* *mmx_addv8qi3 */ |
| 5863 | case 1135: /* *vec_dupv2sf */ |
| 5864 | case 1134: /* mmx_pswapdv2sf2 */ |
| 5865 | case 1133: /* mmx_floatv2si2 */ |
| 5866 | case 1132: /* mmx_pi2fw */ |
| 5867 | case 1131: /* mmx_pf2iw */ |
| 5868 | case 1130: /* mmx_pf2id */ |
| 5869 | case 1129: /* mmx_gev2sf3 */ |
| 5870 | case 1128: /* mmx_gtv2sf3 */ |
| 5871 | case 1127: /* *mmx_eqv2sf3 */ |
| 5872 | case 1126: /* mmx_addsubv2sf3 */ |
| 5873 | case 1125: /* mmx_hsubv2sf3 */ |
| 5874 | case 1124: /* mmx_haddv2sf3 */ |
| 5875 | case 1123: /* mmx_rsqit1v2sf3 */ |
| 5876 | case 1122: /* mmx_rsqrtv2sf2 */ |
| 5877 | case 1121: /* mmx_rcpit2v2sf3 */ |
| 5878 | case 1120: /* mmx_rcpit1v2sf3 */ |
| 5879 | case 1119: /* mmx_rcpv2sf2 */ |
| 5880 | case 1118: /* mmx_ieee_minv2sf3 */ |
| 5881 | case 1117: /* mmx_ieee_maxv2sf3 */ |
| 5882 | case 1116: /* *mmx_sminv2sf3 */ |
| 5883 | case 1115: /* *mmx_smaxv2sf3 */ |
| 5884 | case 1114: /* *mmx_mulv2sf3 */ |
| 5885 | case 1113: /* *mmx_subv2sf3 */ |
| 5886 | case 1112: /* *mmx_addv2sf3 */ |
| 5887 | case 1007: /* *prefetch_3dnow */ |
| 5888 | case 962: /* *rep_stosqi */ |
| 5889 | case 961: /* *rep_stosqi */ |
| 5890 | case 960: /* *rep_stossi */ |
| 5891 | case 959: /* *rep_stossi */ |
| 5892 | case 958: /* *rep_stosdi_rex64 */ |
| 5893 | case 957: /* *rep_stosdi_rex64 */ |
| 5894 | case 956: /* *strsetqi_1 */ |
| 5895 | case 955: /* *strsetqi_1 */ |
| 5896 | case 954: /* *strsethi_1 */ |
| 5897 | case 953: /* *strsethi_1 */ |
| 5898 | case 952: /* *strsetsi_1 */ |
| 5899 | case 951: /* *strsetsi_1 */ |
| 5900 | case 950: /* *strsetdi_rex_1 */ |
| 5901 | case 949: /* *strsetdi_rex_1 */ |
| 5902 | case 810: /* *tls_dynamic_gnu2_call_64 */ |
| 5903 | case 807: /* *tls_dynamic_gnu2_call_32 */ |
| 5904 | case 704: /* leave_rex64 */ |
| 5905 | case 703: /* leave */ |
| 5906 | case 685: /* *sibcall_value_pop_memory */ |
| 5907 | case 684: /* *sibcall_value_pop */ |
| 5908 | case 683: /* *call_value_pop */ |
| 5909 | case 682: /* *sibcall_value_memory */ |
| 5910 | case 681: /* *sibcall_value_memory */ |
| 5911 | case 680: /* *sibcall_value */ |
| 5912 | case 679: /* *sibcall_value */ |
| 5913 | case 678: /* *sibcall_value_GOT_32 */ |
| 5914 | case 677: /* *call_value_got_x32 */ |
| 5915 | case 676: /* *call_value */ |
| 5916 | case 675: /* *call_value */ |
| 5917 | case 674: /* *sibcall_pop_memory */ |
| 5918 | case 673: /* *sibcall_pop */ |
| 5919 | case 672: /* *call_pop */ |
| 5920 | case 671: /* *sibcall_memory */ |
| 5921 | case 670: /* *sibcall_memory */ |
| 5922 | case 669: /* *sibcall */ |
| 5923 | case 668: /* *sibcall */ |
| 5924 | case 667: /* *sibcall_GOT_32 */ |
| 5925 | case 666: /* *call_got_x32 */ |
| 5926 | case 665: /* *call */ |
| 5927 | case 664: /* *call */ |
| 5928 | case 608: /* *rotrqi3_1_slp */ |
| 5929 | case 607: /* *rotlqi3_1_slp */ |
| 5930 | case 606: /* *rotrhi3_1 */ |
| 5931 | case 605: /* *rotlhi3_1 */ |
| 5932 | case 604: /* *rotrqi3_1 */ |
| 5933 | case 603: /* *rotlqi3_1 */ |
| 5934 | case 585: /* *ashrdi3_cconly */ |
| 5935 | case 584: /* *lshrdi3_cconly */ |
| 5936 | case 583: /* *ashrsi3_cconly */ |
| 5937 | case 582: /* *lshrsi3_cconly */ |
| 5938 | case 581: /* *ashrhi3_cconly */ |
| 5939 | case 580: /* *lshrhi3_cconly */ |
| 5940 | case 579: /* *ashrqi3_cconly */ |
| 5941 | case 578: /* *lshrqi3_cconly */ |
| 5942 | case 577: /* *ashrsi3_cmp_zext */ |
| 5943 | case 576: /* *lshrsi3_cmp_zext */ |
| 5944 | case 575: /* *ashrdi3_cmp */ |
| 5945 | case 574: /* *lshrdi3_cmp */ |
| 5946 | case 573: /* *ashrsi3_cmp */ |
| 5947 | case 572: /* *lshrsi3_cmp */ |
| 5948 | case 571: /* *ashrhi3_cmp */ |
| 5949 | case 570: /* *lshrhi3_cmp */ |
| 5950 | case 569: /* *ashrqi3_cmp */ |
| 5951 | case 568: /* *lshrqi3_cmp */ |
| 5952 | case 567: /* *ashrqi3_1_slp */ |
| 5953 | case 566: /* *lshrqi3_1_slp */ |
| 5954 | case 565: /* *ashrhi3_1 */ |
| 5955 | case 564: /* *lshrhi3_1 */ |
| 5956 | case 563: /* *ashrqi3_1 */ |
| 5957 | case 562: /* *lshrqi3_1 */ |
| 5958 | case 546: /* x86_shrd */ |
| 5959 | case 545: /* x86_64_shrd */ |
| 5960 | case 516: /* x86_shld */ |
| 5961 | case 515: /* x86_64_shld */ |
| 5962 | return 2; |
| 5963 | |
| 5964 | case 386: /* udivmodhiqi3 */ |
| 5965 | case 385: /* *udivmoddi4_noext */ |
| 5966 | case 384: /* *udivmodsi4_noext */ |
| 5967 | case 383: /* *udivmodhi4_noext */ |
| 5968 | case 375: /* divmodhiqi3 */ |
| 5969 | case 374: /* *divmoddi4_noext */ |
| 5970 | case 373: /* *divmodsi4_noext */ |
| 5971 | case 372: /* *divmodhi4_noext */ |
| 5972 | return 40 /* 0x28 */; |
| 5973 | |
| 5974 | case 356: /* *umulditi3_1 */ |
| 5975 | case 355: /* *umulsidi3_1 */ |
| 5976 | extract_constrain_insn_cached (insn); |
| 5977 | if (which_alternative != 0) |
| 5978 | { |
| 5979 | return 7; |
| 5980 | } |
| 5981 | else |
| 5982 | { |
| 5983 | return 0; |
| 5984 | } |
| 5985 | |
| 5986 | case 366: /* *umulsi3_highpart_1 */ |
| 5987 | case 365: /* *smulsi3_highpart_1 */ |
| 5988 | case 364: /* *umulsi3_highpart_zext */ |
| 5989 | case 363: /* *smulsi3_highpart_zext */ |
| 5990 | case 362: /* *umuldi3_highpart_1 */ |
| 5991 | case 361: /* *smuldi3_highpart_1 */ |
| 5992 | case 360: /* *umulqihi3_1 */ |
| 5993 | case 359: /* *mulqihi3_1 */ |
| 5994 | case 358: /* *mulditi3_1 */ |
| 5995 | case 357: /* *mulsidi3_1 */ |
| 5996 | case 352: /* *umulvqi4 */ |
| 5997 | case 351: /* *mulvqi4 */ |
| 5998 | case 350: /* *umulvdi4 */ |
| 5999 | case 349: /* *umulvsi4 */ |
| 6000 | case 348: /* *umulvhi4 */ |
| 6001 | case 347: /* *mulvdi4_1 */ |
| 6002 | case 346: /* *mulvsi4_1 */ |
| 6003 | case 345: /* *mulvhi4_1 */ |
| 6004 | case 344: /* *mulvhi4 */ |
| 6005 | case 343: /* *mulvdi4 */ |
| 6006 | case 342: /* *mulvsi4 */ |
| 6007 | case 341: /* *mulqi3_1 */ |
| 6008 | case 340: /* *mulsi3_1_zext */ |
| 6009 | case 339: /* *muldi3_1 */ |
| 6010 | case 338: /* *mulsi3_1 */ |
| 6011 | case 337: /* *mulhi3_1 */ |
| 6012 | return 7; |
| 6013 | |
| 6014 | case 241: /* addqi_ext_1 */ |
| 6015 | case 240: /* *adddi_5 */ |
| 6016 | case 239: /* *addsi_5 */ |
| 6017 | case 238: /* *addhi_5 */ |
| 6018 | case 237: /* *addqi_5 */ |
| 6019 | case 236: /* *addsi_4 */ |
| 6020 | case 235: /* *addhi_4 */ |
| 6021 | case 234: /* *addqi_4 */ |
| 6022 | case 233: /* *adddi_4 */ |
| 6023 | case 232: /* *addsi_3_zext */ |
| 6024 | case 231: /* *adddi_3 */ |
| 6025 | case 230: /* *addsi_3 */ |
| 6026 | case 229: /* *addhi_3 */ |
| 6027 | case 228: /* *addqi_3 */ |
| 6028 | case 227: /* *addsi_2_zext */ |
| 6029 | case 226: /* *adddi_2 */ |
| 6030 | case 225: /* *addsi_2 */ |
| 6031 | case 224: /* *addhi_2 */ |
| 6032 | case 223: /* *addqi_2 */ |
| 6033 | if (((cached_type = get_attr_type (insn)) == TYPE_ALU) || (cached_type == TYPE_INCDEC)) |
| 6034 | { |
| 6035 | return 1; |
| 6036 | } |
| 6037 | else |
| 6038 | { |
| 6039 | return 0; |
| 6040 | } |
| 6041 | |
| 6042 | case 222: /* *addqi_1_slp */ |
| 6043 | if (((cached_type = get_attr_type (insn)) == TYPE_ALU1) || (cached_type == TYPE_INCDEC)) |
| 6044 | { |
| 6045 | return 1; |
| 6046 | } |
| 6047 | else |
| 6048 | { |
| 6049 | return 0; |
| 6050 | } |
| 6051 | |
| 6052 | case 221: /* *addqi_1 */ |
| 6053 | extract_constrain_insn_cached (insn); |
| 6054 | if (((cached_type = get_attr_type (insn)) == TYPE_ALU) || (which_alternative == 5) || (cached_type == TYPE_INCDEC)) |
| 6055 | { |
| 6056 | return 1; |
| 6057 | } |
| 6058 | else |
| 6059 | { |
| 6060 | return 0; |
| 6061 | } |
| 6062 | |
| 6063 | case 219: /* addsi_1_zext */ |
| 6064 | extract_constrain_insn_cached (insn); |
| 6065 | if (((cached_type = get_attr_type (insn)) == TYPE_ALU) || (which_alternative == 2) || (cached_type == TYPE_INCDEC)) |
| 6066 | { |
| 6067 | return 1; |
| 6068 | } |
| 6069 | else |
| 6070 | { |
| 6071 | return 0; |
| 6072 | } |
| 6073 | |
| 6074 | case 220: /* *addhi_1 */ |
| 6075 | case 218: /* *adddi_1 */ |
| 6076 | case 217: /* *addsi_1 */ |
| 6077 | extract_constrain_insn_cached (insn); |
| 6078 | if (((cached_type = get_attr_type (insn)) == TYPE_ALU) || (which_alternative == 3) || (cached_type == TYPE_INCDEC)) |
| 6079 | { |
| 6080 | return 1; |
| 6081 | } |
| 6082 | else |
| 6083 | { |
| 6084 | return 0; |
| 6085 | } |
| 6086 | |
| 6087 | case 948: /* *rep_movqi */ |
| 6088 | case 947: /* *rep_movqi */ |
| 6089 | case 946: /* *rep_movsi */ |
| 6090 | case 945: /* *rep_movsi */ |
| 6091 | case 944: /* *rep_movdi_rex64 */ |
| 6092 | case 943: /* *rep_movdi_rex64 */ |
| 6093 | case 942: /* *strmovqi_1 */ |
| 6094 | case 941: /* *strmovqi_1 */ |
| 6095 | case 940: /* *strmovhi_1 */ |
| 6096 | case 939: /* *strmovhi_1 */ |
| 6097 | case 938: /* *strmovsi_1 */ |
| 6098 | case 937: /* *strmovsi_1 */ |
| 6099 | case 936: /* *strmovdi_rex_1 */ |
| 6100 | case 935: /* *strmovdi_rex_1 */ |
| 6101 | case 927: /* fistsi2_ceil_with_temp */ |
| 6102 | case 926: /* fistsi2_floor_with_temp */ |
| 6103 | case 925: /* fisthi2_ceil_with_temp */ |
| 6104 | case 924: /* fisthi2_floor_with_temp */ |
| 6105 | case 923: /* fistsi2_ceil */ |
| 6106 | case 922: /* fistsi2_floor */ |
| 6107 | case 921: /* fisthi2_ceil */ |
| 6108 | case 920: /* fisthi2_floor */ |
| 6109 | case 919: /* fistdi2_ceil_with_temp */ |
| 6110 | case 918: /* fistdi2_floor_with_temp */ |
| 6111 | case 917: /* fistdi2_ceil */ |
| 6112 | case 916: /* fistdi2_floor */ |
| 6113 | case 915: /* *fistdi2_ceil_1 */ |
| 6114 | case 914: /* *fistdi2_floor_1 */ |
| 6115 | case 913: /* *fistsi2_ceil_1 */ |
| 6116 | case 912: /* *fistsi2_floor_1 */ |
| 6117 | case 911: /* *fisthi2_ceil_1 */ |
| 6118 | case 910: /* *fisthi2_floor_1 */ |
| 6119 | case 191: /* fix_truncsi_i387_with_temp */ |
| 6120 | case 190: /* fix_trunchi_i387_with_temp */ |
| 6121 | case 189: /* fix_truncsi_i387 */ |
| 6122 | case 188: /* fix_trunchi_i387 */ |
| 6123 | case 187: /* fix_truncdi_i387_with_temp */ |
| 6124 | case 186: /* fix_truncdi_i387 */ |
| 6125 | case 185: /* *fix_truncdi_i387_1 */ |
| 6126 | case 184: /* *fix_truncsi_i387_1 */ |
| 6127 | case 183: /* *fix_trunchi_i387_1 */ |
| 6128 | case 182: /* fix_truncdi_i387_fisttp_with_temp */ |
| 6129 | case 181: /* fix_truncsi_i387_fisttp_with_temp */ |
| 6130 | case 180: /* fix_trunchi_i387_fisttp_with_temp */ |
| 6131 | case 179: /* fix_truncdi_i387_fisttp */ |
| 6132 | case 178: /* fix_truncsi_i387_fisttp */ |
| 6133 | case 177: /* fix_trunchi_i387_fisttp */ |
| 6134 | case 176: /* fix_truncdi_fisttp_i387_1 */ |
| 6135 | case 175: /* fix_truncsi_fisttp_i387_1 */ |
| 6136 | case 174: /* fix_trunchi_fisttp_i387_1 */ |
| 6137 | return 4; |
| 6138 | |
| 6139 | case 159: /* *truncdfsf_mixed */ |
| 6140 | extract_constrain_insn_cached (insn); |
| 6141 | if (which_alternative != 1) |
| 6142 | { |
| 6143 | return 1; |
| 6144 | } |
| 6145 | else |
| 6146 | { |
| 6147 | return 0; |
| 6148 | } |
| 6149 | |
| 6150 | case 202: /* *floatdidf2_mixed */ |
| 6151 | case 201: /* *floatsidf2_mixed */ |
| 6152 | case 200: /* *floatdisf2_mixed */ |
| 6153 | case 199: /* *floatsisf2_mixed */ |
| 6154 | case 157: /* *truncdfsf_fast_mixed */ |
| 6155 | case 139: /* *zero_extendqihi2 */ |
| 6156 | case 137: /* *zero_extendhisi2 */ |
| 6157 | case 136: /* *zero_extendqisi2 */ |
| 6158 | case 133: /* zero_extendhidi2 */ |
| 6159 | case 132: /* zero_extendqidi2 */ |
| 6160 | extract_constrain_insn_cached (insn); |
| 6161 | if (which_alternative == 0) |
| 6162 | { |
| 6163 | return 1; |
| 6164 | } |
| 6165 | else |
| 6166 | { |
| 6167 | return 0; |
| 6168 | } |
| 6169 | |
| 6170 | case 131: /* *zero_extendsidi2 */ |
| 6171 | extract_constrain_insn_cached (insn); |
| 6172 | if (!((1 << which_alternative) & 0x1f80)) |
| 6173 | { |
| 6174 | return 1; |
| 6175 | } |
| 6176 | else |
| 6177 | { |
| 6178 | return 0; |
| 6179 | } |
| 6180 | |
| 6181 | case 127: /* *movsf_internal */ |
| 6182 | extract_constrain_insn_cached (insn); |
| 6183 | if (((1 << which_alternative) & 0x3f81f)) |
| 6184 | { |
| 6185 | return 1; |
| 6186 | } |
| 6187 | else |
| 6188 | { |
| 6189 | return 0; |
| 6190 | } |
| 6191 | |
| 6192 | case 126: /* *movdf_internal */ |
| 6193 | extract_constrain_insn_cached (insn); |
| 6194 | if (((1 << which_alternative) & 0x3c00fff)) |
| 6195 | { |
| 6196 | return 1; |
| 6197 | } |
| 6198 | else |
| 6199 | { |
| 6200 | return 0; |
| 6201 | } |
| 6202 | |
| 6203 | case 2728: /* sse2_storelpd */ |
| 6204 | case 2467: /* *sse4_1_extractps */ |
| 6205 | case 124: /* *movtf_internal */ |
| 6206 | extract_constrain_insn_cached (insn); |
| 6207 | if (!((1 << which_alternative) & 0x7)) |
| 6208 | { |
| 6209 | return 1; |
| 6210 | } |
| 6211 | else |
| 6212 | { |
| 6213 | return 0; |
| 6214 | } |
| 6215 | |
| 6216 | case 107: /* *extzvqi */ |
| 6217 | case 84: /* *movqi_internal */ |
| 6218 | case 83: /* *movhi_internal */ |
| 6219 | if (((cached_type = get_attr_type (insn)) == TYPE_IMOV) || (cached_type == TYPE_IMOVX)) |
| 6220 | { |
| 6221 | return 1; |
| 6222 | } |
| 6223 | else |
| 6224 | { |
| 6225 | return 0; |
| 6226 | } |
| 6227 | |
| 6228 | case 82: /* *movsi_internal */ |
| 6229 | extract_constrain_insn_cached (insn); |
| 6230 | if (((cached_type = get_attr_type (insn)) == TYPE_LEA) || (cached_type == TYPE_IMOV) || (((1 << which_alternative) & 0xf8))) |
| 6231 | { |
| 6232 | return 1; |
| 6233 | } |
| 6234 | else if (which_alternative == 2) |
| 6235 | { |
| 6236 | return 2; |
| 6237 | } |
| 6238 | else |
| 6239 | { |
| 6240 | return 0; |
| 6241 | } |
| 6242 | |
| 6243 | case 81: /* *movdi_internal */ |
| 6244 | extract_constrain_insn_cached (insn); |
| 6245 | if (((cached_type = get_attr_type (insn)) == TYPE_LEA) || (cached_type == TYPE_IMOV) || (((1 << which_alternative) & 0xf83))) |
| 6246 | { |
| 6247 | return 1; |
| 6248 | } |
| 6249 | else if (which_alternative == 6) |
| 6250 | { |
| 6251 | return 2; |
| 6252 | } |
| 6253 | else |
| 6254 | { |
| 6255 | return 0; |
| 6256 | } |
| 6257 | |
| 6258 | case 154: /* *extendsfdf2 */ |
| 6259 | case 80: /* *movti_internal */ |
| 6260 | extract_constrain_insn_cached (insn); |
| 6261 | if (((1 << which_alternative) & 0x3)) |
| 6262 | { |
| 6263 | return 1; |
| 6264 | } |
| 6265 | else |
| 6266 | { |
| 6267 | return 0; |
| 6268 | } |
| 6269 | |
| 6270 | case 54: /* *cmpiuxf_i387 */ |
| 6271 | case 53: /* *cmpixf_i387 */ |
| 6272 | return 6; |
| 6273 | |
| 6274 | case 52: /* *cmpiudf */ |
| 6275 | case 51: /* *cmpiusf */ |
| 6276 | case 50: /* *cmpidf */ |
| 6277 | case 49: /* *cmpisf */ |
| 6278 | extract_constrain_insn_cached (insn); |
| 6279 | if (which_alternative == 0) |
| 6280 | { |
| 6281 | return 6; |
| 6282 | } |
| 6283 | else |
| 6284 | { |
| 6285 | return 0; |
| 6286 | } |
| 6287 | |
| 6288 | case 4984: /* atomic_bit_test_and_resetdi_1 */ |
| 6289 | case 4983: /* atomic_bit_test_and_resetsi_1 */ |
| 6290 | case 4982: /* atomic_bit_test_and_resethi_1 */ |
| 6291 | case 4981: /* atomic_bit_test_and_complementdi_1 */ |
| 6292 | case 4980: /* atomic_bit_test_and_complementsi_1 */ |
| 6293 | case 4979: /* atomic_bit_test_and_complementhi_1 */ |
| 6294 | case 4978: /* atomic_bit_test_and_setdi_1 */ |
| 6295 | case 4977: /* atomic_bit_test_and_setsi_1 */ |
| 6296 | case 4976: /* atomic_bit_test_and_sethi_1 */ |
| 6297 | case 4975: /* atomic_xordi */ |
| 6298 | case 4974: /* atomic_ordi */ |
| 6299 | case 4973: /* atomic_anddi */ |
| 6300 | case 4972: /* atomic_xorsi */ |
| 6301 | case 4971: /* atomic_orsi */ |
| 6302 | case 4970: /* atomic_andsi */ |
| 6303 | case 4969: /* atomic_xorhi */ |
| 6304 | case 4968: /* atomic_orhi */ |
| 6305 | case 4967: /* atomic_andhi */ |
| 6306 | case 4966: /* atomic_xorqi */ |
| 6307 | case 4965: /* atomic_orqi */ |
| 6308 | case 4964: /* atomic_andqi */ |
| 6309 | case 4963: /* atomic_subdi */ |
| 6310 | case 4962: /* atomic_subsi */ |
| 6311 | case 4961: /* atomic_subhi */ |
| 6312 | case 4960: /* atomic_subqi */ |
| 6313 | case 4959: /* atomic_adddi */ |
| 6314 | case 4958: /* atomic_addsi */ |
| 6315 | case 4957: /* atomic_addhi */ |
| 6316 | case 4956: /* atomic_addqi */ |
| 6317 | case 4955: /* atomic_exchangedi */ |
| 6318 | case 4954: /* atomic_exchangesi */ |
| 6319 | case 4953: /* atomic_exchangehi */ |
| 6320 | case 4952: /* atomic_exchangeqi */ |
| 6321 | case 4951: /* *atomic_fetch_add_cmpdi */ |
| 6322 | case 4950: /* *atomic_fetch_add_cmpsi */ |
| 6323 | case 4949: /* *atomic_fetch_add_cmphi */ |
| 6324 | case 4948: /* *atomic_fetch_add_cmpqi */ |
| 6325 | case 4947: /* atomic_fetch_adddi */ |
| 6326 | case 4946: /* atomic_fetch_addsi */ |
| 6327 | case 4945: /* atomic_fetch_addhi */ |
| 6328 | case 4944: /* atomic_fetch_addqi */ |
| 6329 | case 4943: /* atomic_compare_and_swapdi_1 */ |
| 6330 | case 4942: /* atomic_compare_and_swapsi_1 */ |
| 6331 | case 4941: /* atomic_compare_and_swaphi_1 */ |
| 6332 | case 4940: /* atomic_compare_and_swapqi_1 */ |
| 6333 | case 4939: /* atomic_compare_and_swapti_doubleword */ |
| 6334 | case 4938: /* atomic_compare_and_swapdi_doubleword */ |
| 6335 | case 4935: /* storedi_via_fpu */ |
| 6336 | case 4934: /* loaddi_via_fpu */ |
| 6337 | case 4933: /* atomic_storedi_fpu */ |
| 6338 | case 4932: /* atomic_storedi_1 */ |
| 6339 | case 4931: /* atomic_storesi_1 */ |
| 6340 | case 4930: /* atomic_storehi_1 */ |
| 6341 | case 4929: /* atomic_storeqi_1 */ |
| 6342 | case 4928: /* atomic_loaddi_fpu */ |
| 6343 | case 4927: /* mfence_nosse */ |
| 6344 | case 4923: /* vpopcountv8di_mask */ |
| 6345 | case 4922: /* vpopcountv8di */ |
| 6346 | case 4921: /* vpopcountv16si_mask */ |
| 6347 | case 4920: /* vpopcountv16si */ |
| 6348 | case 4901: /* *movv64si_internal */ |
| 6349 | case 4900: /* *movv64sf_internal */ |
| 6350 | case 4875: /* avx512f_pd512_256pd */ |
| 6351 | case 4874: /* avx512f_ps512_256ps */ |
| 6352 | case 4873: /* avx512f_si512_256si */ |
| 6353 | case 4872: /* avx512f_pd512_pd */ |
| 6354 | case 4871: /* avx512f_ps512_ps */ |
| 6355 | case 4870: /* avx512f_si512_si */ |
| 6356 | case 4832: /* avx512f_vgetmantv2df_round */ |
| 6357 | case 4831: /* avx512f_vgetmantv2df */ |
| 6358 | case 4830: /* avx512f_vgetmantv4sf_round */ |
| 6359 | case 4829: /* avx512f_vgetmantv4sf */ |
| 6360 | case 4828: /* avx512vl_getmantv2df_mask_round */ |
| 6361 | case 4827: /* avx512vl_getmantv2df_mask */ |
| 6362 | case 4826: /* avx512vl_getmantv2df_round */ |
| 6363 | case 4825: /* avx512vl_getmantv2df */ |
| 6364 | case 4824: /* avx512vl_getmantv4df_mask_round */ |
| 6365 | case 4823: /* avx512vl_getmantv4df_mask */ |
| 6366 | case 4822: /* avx512vl_getmantv4df_round */ |
| 6367 | case 4821: /* avx512vl_getmantv4df */ |
| 6368 | case 4820: /* avx512f_getmantv8df_mask_round */ |
| 6369 | case 4819: /* avx512f_getmantv8df_mask */ |
| 6370 | case 4818: /* avx512f_getmantv8df_round */ |
| 6371 | case 4817: /* avx512f_getmantv8df */ |
| 6372 | case 4816: /* avx512vl_getmantv4sf_mask_round */ |
| 6373 | case 4815: /* avx512vl_getmantv4sf_mask */ |
| 6374 | case 4814: /* avx512vl_getmantv4sf_round */ |
| 6375 | case 4813: /* avx512vl_getmantv4sf */ |
| 6376 | case 4812: /* avx512vl_getmantv8sf_mask_round */ |
| 6377 | case 4811: /* avx512vl_getmantv8sf_mask */ |
| 6378 | case 4810: /* avx512vl_getmantv8sf_round */ |
| 6379 | case 4809: /* avx512vl_getmantv8sf */ |
| 6380 | case 4808: /* avx512f_getmantv16sf_mask_round */ |
| 6381 | case 4807: /* avx512f_getmantv16sf_mask */ |
| 6382 | case 4806: /* avx512f_getmantv16sf_round */ |
| 6383 | case 4805: /* avx512f_getmantv16sf */ |
| 6384 | case 4435: /* avx_pd256_pd */ |
| 6385 | case 4434: /* avx_ps256_ps */ |
| 6386 | case 4433: /* avx_si256_si */ |
| 6387 | case 4252: /* *avx_vperm_broadcast_v4df */ |
| 6388 | case 4251: /* *avx_vperm_broadcast_v8sf */ |
| 6389 | case 3677: /* sse3_monitor_di */ |
| 6390 | case 3676: /* sse3_monitor_si */ |
| 6391 | case 3675: /* sse3_mwait */ |
| 6392 | case 3637: /* *vec_extractv4si_zext_mem */ |
| 6393 | case 3636: /* *vec_extractv4si_mem */ |
| 6394 | case 3633: /* *vec_extractv4si_0_zext */ |
| 6395 | case 3632: /* *vec_extractv4si_0_zext_sse4 */ |
| 6396 | case 3631: /* *vec_extractv2di_0_sse */ |
| 6397 | case 3630: /* *vec_extractv2di_0 */ |
| 6398 | case 3629: /* *vec_extractv4si_0 */ |
| 6399 | case 3628: /* *vec_extractv8hi_mem */ |
| 6400 | case 3627: /* *vec_extractv16qi_mem */ |
| 6401 | case 3503: /* avx512vl_testnmv2di3_mask */ |
| 6402 | case 3502: /* avx512vl_testnmv2di3 */ |
| 6403 | case 3501: /* avx512vl_testnmv4di3_mask */ |
| 6404 | case 3500: /* avx512vl_testnmv4di3 */ |
| 6405 | case 3499: /* avx512f_testnmv8di3_mask */ |
| 6406 | case 3498: /* avx512f_testnmv8di3 */ |
| 6407 | case 3497: /* avx512vl_testnmv4si3_mask */ |
| 6408 | case 3496: /* avx512vl_testnmv4si3 */ |
| 6409 | case 3495: /* avx512vl_testnmv8si3_mask */ |
| 6410 | case 3494: /* avx512vl_testnmv8si3 */ |
| 6411 | case 3493: /* avx512f_testnmv16si3_mask */ |
| 6412 | case 3492: /* avx512f_testnmv16si3 */ |
| 6413 | case 3491: /* avx512vl_testnmv8hi3_mask */ |
| 6414 | case 3490: /* avx512vl_testnmv8hi3 */ |
| 6415 | case 3489: /* avx512vl_testnmv16hi3_mask */ |
| 6416 | case 3488: /* avx512vl_testnmv16hi3 */ |
| 6417 | case 3487: /* avx512bw_testnmv32hi3_mask */ |
| 6418 | case 3486: /* avx512bw_testnmv32hi3 */ |
| 6419 | case 3485: /* avx512vl_testnmv32qi3_mask */ |
| 6420 | case 3484: /* avx512vl_testnmv32qi3 */ |
| 6421 | case 3483: /* avx512vl_testnmv16qi3_mask */ |
| 6422 | case 3482: /* avx512vl_testnmv16qi3 */ |
| 6423 | case 3481: /* avx512bw_testnmv64qi3_mask */ |
| 6424 | case 3480: /* avx512bw_testnmv64qi3 */ |
| 6425 | case 3479: /* avx512vl_testmv2di3_mask */ |
| 6426 | case 3478: /* avx512vl_testmv2di3 */ |
| 6427 | case 3477: /* avx512vl_testmv4di3_mask */ |
| 6428 | case 3476: /* avx512vl_testmv4di3 */ |
| 6429 | case 3475: /* avx512f_testmv8di3_mask */ |
| 6430 | case 3474: /* avx512f_testmv8di3 */ |
| 6431 | case 3473: /* avx512vl_testmv4si3_mask */ |
| 6432 | case 3472: /* avx512vl_testmv4si3 */ |
| 6433 | case 3471: /* avx512vl_testmv8si3_mask */ |
| 6434 | case 3470: /* avx512vl_testmv8si3 */ |
| 6435 | case 3469: /* avx512f_testmv16si3_mask */ |
| 6436 | case 3468: /* avx512f_testmv16si3 */ |
| 6437 | case 3467: /* avx512vl_testmv8hi3_mask */ |
| 6438 | case 3466: /* avx512vl_testmv8hi3 */ |
| 6439 | case 3465: /* avx512vl_testmv16hi3_mask */ |
| 6440 | case 3464: /* avx512vl_testmv16hi3 */ |
| 6441 | case 3463: /* avx512bw_testmv32hi3_mask */ |
| 6442 | case 3462: /* avx512bw_testmv32hi3 */ |
| 6443 | case 3461: /* avx512vl_testmv32qi3_mask */ |
| 6444 | case 3460: /* avx512vl_testmv32qi3 */ |
| 6445 | case 3459: /* avx512vl_testmv16qi3_mask */ |
| 6446 | case 3458: /* avx512vl_testmv16qi3 */ |
| 6447 | case 3457: /* avx512bw_testmv64qi3_mask */ |
| 6448 | case 3456: /* avx512bw_testmv64qi3 */ |
| 6449 | case 3191: /* avx512vl_rorv2di_mask */ |
| 6450 | case 3190: /* avx512vl_rorv2di */ |
| 6451 | case 3189: /* avx512vl_rolv2di_mask */ |
| 6452 | case 3188: /* avx512vl_rolv2di */ |
| 6453 | case 3187: /* avx512vl_rorv4di_mask */ |
| 6454 | case 3186: /* avx512vl_rorv4di */ |
| 6455 | case 3185: /* avx512vl_rolv4di_mask */ |
| 6456 | case 3184: /* avx512vl_rolv4di */ |
| 6457 | case 3183: /* avx512f_rorv8di_mask */ |
| 6458 | case 3182: /* avx512f_rorv8di */ |
| 6459 | case 3181: /* avx512f_rolv8di_mask */ |
| 6460 | case 3180: /* avx512f_rolv8di */ |
| 6461 | case 3179: /* avx512vl_rorv4si_mask */ |
| 6462 | case 3178: /* avx512vl_rorv4si */ |
| 6463 | case 3177: /* avx512vl_rolv4si_mask */ |
| 6464 | case 3176: /* avx512vl_rolv4si */ |
| 6465 | case 3175: /* avx512vl_rorv8si_mask */ |
| 6466 | case 3174: /* avx512vl_rorv8si */ |
| 6467 | case 3173: /* avx512vl_rolv8si_mask */ |
| 6468 | case 3172: /* avx512vl_rolv8si */ |
| 6469 | case 3171: /* avx512f_rorv16si_mask */ |
| 6470 | case 3170: /* avx512f_rorv16si */ |
| 6471 | case 3169: /* avx512f_rolv16si_mask */ |
| 6472 | case 3168: /* avx512f_rolv16si */ |
| 6473 | case 3167: /* avx512vl_rorvv2di_mask */ |
| 6474 | case 3166: /* avx512vl_rorvv2di */ |
| 6475 | case 3165: /* avx512vl_rolvv2di_mask */ |
| 6476 | case 3164: /* avx512vl_rolvv2di */ |
| 6477 | case 3163: /* avx512vl_rorvv4di_mask */ |
| 6478 | case 3162: /* avx512vl_rorvv4di */ |
| 6479 | case 3161: /* avx512vl_rolvv4di_mask */ |
| 6480 | case 3160: /* avx512vl_rolvv4di */ |
| 6481 | case 3159: /* avx512f_rorvv8di_mask */ |
| 6482 | case 3158: /* avx512f_rorvv8di */ |
| 6483 | case 3157: /* avx512f_rolvv8di_mask */ |
| 6484 | case 3156: /* avx512f_rolvv8di */ |
| 6485 | case 3155: /* avx512vl_rorvv4si_mask */ |
| 6486 | case 3154: /* avx512vl_rorvv4si */ |
| 6487 | case 3153: /* avx512vl_rolvv4si_mask */ |
| 6488 | case 3152: /* avx512vl_rolvv4si */ |
| 6489 | case 3151: /* avx512vl_rorvv8si_mask */ |
| 6490 | case 3150: /* avx512vl_rorvv8si */ |
| 6491 | case 3149: /* avx512vl_rolvv8si_mask */ |
| 6492 | case 3148: /* avx512vl_rolvv8si */ |
| 6493 | case 3147: /* avx512f_rorvv16si_mask */ |
| 6494 | case 3146: /* avx512f_rorvv16si */ |
| 6495 | case 3145: /* avx512f_rolvv16si_mask */ |
| 6496 | case 3144: /* avx512f_rolvv16si */ |
| 6497 | case 2704: /* avx512f_rndscalev2df_round */ |
| 6498 | case 2703: /* avx512f_rndscalev2df */ |
| 6499 | case 2702: /* avx512f_rndscalev4sf_round */ |
| 6500 | case 2701: /* avx512f_rndscalev4sf */ |
| 6501 | case 2700: /* avx512vl_rndscalev2df_mask_round */ |
| 6502 | case 2699: /* avx512vl_rndscalev2df_mask */ |
| 6503 | case 2698: /* avx512vl_rndscalev2df_round */ |
| 6504 | case 2697: /* avx512vl_rndscalev2df */ |
| 6505 | case 2696: /* avx512vl_rndscalev4df_mask_round */ |
| 6506 | case 2695: /* avx512vl_rndscalev4df_mask */ |
| 6507 | case 2694: /* avx512vl_rndscalev4df_round */ |
| 6508 | case 2693: /* avx512vl_rndscalev4df */ |
| 6509 | case 2692: /* avx512f_rndscalev8df_mask_round */ |
| 6510 | case 2691: /* avx512f_rndscalev8df_mask */ |
| 6511 | case 2690: /* avx512f_rndscalev8df_round */ |
| 6512 | case 2689: /* avx512f_rndscalev8df */ |
| 6513 | case 2688: /* avx512vl_rndscalev4sf_mask_round */ |
| 6514 | case 2687: /* avx512vl_rndscalev4sf_mask */ |
| 6515 | case 2686: /* avx512vl_rndscalev4sf_round */ |
| 6516 | case 2685: /* avx512vl_rndscalev4sf */ |
| 6517 | case 2684: /* avx512vl_rndscalev8sf_mask_round */ |
| 6518 | case 2683: /* avx512vl_rndscalev8sf_mask */ |
| 6519 | case 2682: /* avx512vl_rndscalev8sf_round */ |
| 6520 | case 2681: /* avx512vl_rndscalev8sf */ |
| 6521 | case 2680: /* avx512f_rndscalev16sf_mask_round */ |
| 6522 | case 2679: /* avx512f_rndscalev16sf_mask */ |
| 6523 | case 2678: /* avx512f_rndscalev16sf_round */ |
| 6524 | case 2677: /* avx512f_rndscalev16sf */ |
| 6525 | case 2676: /* avx512f_sfixupimmv2df_mask_round */ |
| 6526 | case 2675: /* avx512f_sfixupimmv2df_mask */ |
| 6527 | case 2674: /* avx512f_sfixupimmv4sf_mask_round */ |
| 6528 | case 2673: /* avx512f_sfixupimmv4sf_mask */ |
| 6529 | case 2672: /* avx512f_sfixupimmv2df_maskz_1_round */ |
| 6530 | case 2671: /* avx512f_sfixupimmv2df_maskz_1 */ |
| 6531 | case 2670: /* avx512f_sfixupimmv2df_round */ |
| 6532 | case 2669: /* avx512f_sfixupimmv2df */ |
| 6533 | case 2668: /* avx512f_sfixupimmv4sf_maskz_1_round */ |
| 6534 | case 2667: /* avx512f_sfixupimmv4sf_maskz_1 */ |
| 6535 | case 2666: /* avx512f_sfixupimmv4sf_round */ |
| 6536 | case 2665: /* avx512f_sfixupimmv4sf */ |
| 6537 | case 2664: /* avx512vl_fixupimmv2df_mask_round */ |
| 6538 | case 2663: /* avx512vl_fixupimmv2df_mask */ |
| 6539 | case 2662: /* avx512vl_fixupimmv4df_mask_round */ |
| 6540 | case 2661: /* avx512vl_fixupimmv4df_mask */ |
| 6541 | case 2660: /* avx512f_fixupimmv8df_mask_round */ |
| 6542 | case 2659: /* avx512f_fixupimmv8df_mask */ |
| 6543 | case 2658: /* avx512vl_fixupimmv4sf_mask_round */ |
| 6544 | case 2657: /* avx512vl_fixupimmv4sf_mask */ |
| 6545 | case 2656: /* avx512vl_fixupimmv8sf_mask_round */ |
| 6546 | case 2655: /* avx512vl_fixupimmv8sf_mask */ |
| 6547 | case 2654: /* avx512f_fixupimmv16sf_mask_round */ |
| 6548 | case 2653: /* avx512f_fixupimmv16sf_mask */ |
| 6549 | case 2652: /* avx512vl_fixupimmv2df_maskz_1_round */ |
| 6550 | case 2651: /* avx512vl_fixupimmv2df_maskz_1 */ |
| 6551 | case 2650: /* avx512vl_fixupimmv2df_round */ |
| 6552 | case 2649: /* avx512vl_fixupimmv2df */ |
| 6553 | case 2648: /* avx512vl_fixupimmv4df_maskz_1_round */ |
| 6554 | case 2647: /* avx512vl_fixupimmv4df_maskz_1 */ |
| 6555 | case 2646: /* avx512vl_fixupimmv4df_round */ |
| 6556 | case 2645: /* avx512vl_fixupimmv4df */ |
| 6557 | case 2644: /* avx512f_fixupimmv8df_maskz_1_round */ |
| 6558 | case 2643: /* avx512f_fixupimmv8df_maskz_1 */ |
| 6559 | case 2642: /* avx512f_fixupimmv8df_round */ |
| 6560 | case 2641: /* avx512f_fixupimmv8df */ |
| 6561 | case 2640: /* avx512vl_fixupimmv4sf_maskz_1_round */ |
| 6562 | case 2639: /* avx512vl_fixupimmv4sf_maskz_1 */ |
| 6563 | case 2638: /* avx512vl_fixupimmv4sf_round */ |
| 6564 | case 2637: /* avx512vl_fixupimmv4sf */ |
| 6565 | case 2636: /* avx512vl_fixupimmv8sf_maskz_1_round */ |
| 6566 | case 2635: /* avx512vl_fixupimmv8sf_maskz_1 */ |
| 6567 | case 2634: /* avx512vl_fixupimmv8sf_round */ |
| 6568 | case 2633: /* avx512vl_fixupimmv8sf */ |
| 6569 | case 2632: /* avx512f_fixupimmv16sf_maskz_1_round */ |
| 6570 | case 2631: /* avx512f_fixupimmv16sf_maskz_1 */ |
| 6571 | case 2630: /* avx512f_fixupimmv16sf_round */ |
| 6572 | case 2629: /* avx512f_fixupimmv16sf */ |
| 6573 | case 2628: /* avx512vl_alignv2di_mask */ |
| 6574 | case 2627: /* *avx512vl_alignv2di */ |
| 6575 | case 2626: /* avx512vl_alignv4di_mask */ |
| 6576 | case 2625: /* *avx512vl_alignv4di */ |
| 6577 | case 2624: /* avx512f_alignv8di_mask */ |
| 6578 | case 2623: /* *avx512f_alignv8di */ |
| 6579 | case 2622: /* avx512vl_alignv4si_mask */ |
| 6580 | case 2621: /* *avx512vl_alignv4si */ |
| 6581 | case 2620: /* avx512vl_alignv8si_mask */ |
| 6582 | case 2619: /* *avx512vl_alignv8si */ |
| 6583 | case 2618: /* avx512f_alignv16si_mask */ |
| 6584 | case 2617: /* *avx512f_alignv16si */ |
| 6585 | case 2616: /* avx512f_sgetexpv2df_round */ |
| 6586 | case 2615: /* avx512f_sgetexpv2df */ |
| 6587 | case 2614: /* avx512f_sgetexpv4sf_round */ |
| 6588 | case 2613: /* avx512f_sgetexpv4sf */ |
| 6589 | case 2612: /* avx512vl_getexpv2df_mask_round */ |
| 6590 | case 2611: /* avx512vl_getexpv2df_mask */ |
| 6591 | case 2610: /* avx512vl_getexpv2df_round */ |
| 6592 | case 2609: /* avx512vl_getexpv2df */ |
| 6593 | case 2608: /* avx512vl_getexpv4df_mask_round */ |
| 6594 | case 2607: /* avx512vl_getexpv4df_mask */ |
| 6595 | case 2606: /* avx512vl_getexpv4df_round */ |
| 6596 | case 2605: /* avx512vl_getexpv4df */ |
| 6597 | case 2604: /* avx512f_getexpv8df_mask_round */ |
| 6598 | case 2603: /* avx512f_getexpv8df_mask */ |
| 6599 | case 2602: /* avx512f_getexpv8df_round */ |
| 6600 | case 2601: /* avx512f_getexpv8df */ |
| 6601 | case 2600: /* avx512vl_getexpv4sf_mask_round */ |
| 6602 | case 2599: /* avx512vl_getexpv4sf_mask */ |
| 6603 | case 2598: /* avx512vl_getexpv4sf_round */ |
| 6604 | case 2597: /* avx512vl_getexpv4sf */ |
| 6605 | case 2596: /* avx512vl_getexpv8sf_mask_round */ |
| 6606 | case 2595: /* avx512vl_getexpv8sf_mask */ |
| 6607 | case 2594: /* avx512vl_getexpv8sf_round */ |
| 6608 | case 2593: /* avx512vl_getexpv8sf */ |
| 6609 | case 2592: /* avx512f_getexpv16sf_mask_round */ |
| 6610 | case 2591: /* avx512f_getexpv16sf_mask */ |
| 6611 | case 2590: /* avx512f_getexpv16sf_round */ |
| 6612 | case 2589: /* avx512f_getexpv16sf */ |
| 6613 | case 2570: /* avx512vl_scalefv2df_mask_round */ |
| 6614 | case 2569: /* avx512vl_scalefv2df_mask */ |
| 6615 | case 2568: /* avx512vl_scalefv2df_round */ |
| 6616 | case 2567: /* avx512vl_scalefv2df */ |
| 6617 | case 2566: /* avx512vl_scalefv4df_mask_round */ |
| 6618 | case 2565: /* avx512vl_scalefv4df_mask */ |
| 6619 | case 2564: /* avx512vl_scalefv4df_round */ |
| 6620 | case 2563: /* avx512vl_scalefv4df */ |
| 6621 | case 2562: /* avx512f_scalefv8df_mask_round */ |
| 6622 | case 2561: /* avx512f_scalefv8df_mask */ |
| 6623 | case 2560: /* avx512f_scalefv8df_round */ |
| 6624 | case 2559: /* avx512f_scalefv8df */ |
| 6625 | case 2558: /* avx512vl_scalefv4sf_mask_round */ |
| 6626 | case 2557: /* avx512vl_scalefv4sf_mask */ |
| 6627 | case 2556: /* avx512vl_scalefv4sf_round */ |
| 6628 | case 2555: /* avx512vl_scalefv4sf */ |
| 6629 | case 2554: /* avx512vl_scalefv8sf_mask_round */ |
| 6630 | case 2553: /* avx512vl_scalefv8sf_mask */ |
| 6631 | case 2552: /* avx512vl_scalefv8sf_round */ |
| 6632 | case 2551: /* avx512vl_scalefv8sf */ |
| 6633 | case 2550: /* avx512f_scalefv16sf_mask_round */ |
| 6634 | case 2549: /* avx512f_scalefv16sf_mask */ |
| 6635 | case 2548: /* avx512f_scalefv16sf_round */ |
| 6636 | case 2547: /* avx512f_scalefv16sf */ |
| 6637 | case 2546: /* avx512f_vmscalefv2df_round */ |
| 6638 | case 2545: /* avx512f_vmscalefv2df */ |
| 6639 | case 2544: /* avx512f_vmscalefv4sf_round */ |
| 6640 | case 2543: /* avx512f_vmscalefv4sf */ |
| 6641 | case 2529: /* vec_extract_lo_v32qi */ |
| 6642 | case 2527: /* vec_extract_lo_v64qi */ |
| 6643 | case 2525: /* vec_extract_lo_v16hi */ |
| 6644 | case 2523: /* vec_extract_lo_v32hi */ |
| 6645 | case 2502: /* vec_extract_lo_v16si_mask */ |
| 6646 | case 2501: /* vec_extract_lo_v16si */ |
| 6647 | case 2500: /* vec_extract_lo_v16sf_mask */ |
| 6648 | case 2499: /* vec_extract_lo_v16sf */ |
| 6649 | case 2468: /* *vec_extractv4sf_mem */ |
| 6650 | case 2466: /* *vec_extractv4sf_0 */ |
| 6651 | case 2415: /* *avx512vl_cvtmask2qv2di */ |
| 6652 | case 2414: /* *avx512vl_cvtmask2qv4di */ |
| 6653 | case 2413: /* *avx512f_cvtmask2qv8di */ |
| 6654 | case 2412: /* *avx512vl_cvtmask2dv4si */ |
| 6655 | case 2411: /* *avx512vl_cvtmask2dv8si */ |
| 6656 | case 2410: /* *avx512f_cvtmask2dv16si */ |
| 6657 | case 2409: /* *avx512vl_cvtmask2wv8hi */ |
| 6658 | case 2408: /* *avx512vl_cvtmask2wv16hi */ |
| 6659 | case 2407: /* *avx512bw_cvtmask2wv32hi */ |
| 6660 | case 2406: /* *avx512vl_cvtmask2bv32qi */ |
| 6661 | case 2405: /* *avx512vl_cvtmask2bv16qi */ |
| 6662 | case 2404: /* *avx512bw_cvtmask2bv64qi */ |
| 6663 | case 2403: /* avx512vl_cvtq2maskv2di */ |
| 6664 | case 2402: /* avx512vl_cvtq2maskv4di */ |
| 6665 | case 2401: /* avx512f_cvtq2maskv8di */ |
| 6666 | case 2400: /* avx512vl_cvtd2maskv4si */ |
| 6667 | case 2399: /* avx512vl_cvtd2maskv8si */ |
| 6668 | case 2398: /* avx512f_cvtd2maskv16si */ |
| 6669 | case 2397: /* avx512vl_cvtw2maskv8hi */ |
| 6670 | case 2396: /* avx512vl_cvtw2maskv16hi */ |
| 6671 | case 2395: /* avx512bw_cvtw2maskv32hi */ |
| 6672 | case 2394: /* avx512vl_cvtb2maskv32qi */ |
| 6673 | case 2393: /* avx512vl_cvtb2maskv16qi */ |
| 6674 | case 2392: /* avx512bw_cvtb2maskv64qi */ |
| 6675 | case 1360: /* *absnegv2df2 */ |
| 6676 | case 1359: /* *absnegv4df2 */ |
| 6677 | case 1358: /* *absnegv8df2 */ |
| 6678 | case 1357: /* *absnegv4sf2 */ |
| 6679 | case 1356: /* *absnegv8sf2 */ |
| 6680 | case 1355: /* *absnegv16sf2 */ |
| 6681 | case 1354: /* kunpckdi */ |
| 6682 | case 1353: /* kunpcksi */ |
| 6683 | case 1294: /* movdi_to_sse */ |
| 6684 | case 1209: /* *vec_extractv2si_zext_mem */ |
| 6685 | case 1207: /* *vec_extractv2si_0 */ |
| 6686 | case 1137: /* *vec_extractv2sf_0 */ |
| 6687 | case 1111: /* sse_movntq */ |
| 6688 | case 1105: /* rdpid */ |
| 6689 | case 1104: /* *wrpkru */ |
| 6690 | case 1103: /* *rdpkru */ |
| 6691 | case 1102: /* move_size_reloc_di */ |
| 6692 | case 1101: /* move_size_reloc_si */ |
| 6693 | case 1086: /* clzero_di */ |
| 6694 | case 1085: /* clzero_si */ |
| 6695 | case 1084: /* monitorx_di */ |
| 6696 | case 1083: /* monitorx_si */ |
| 6697 | case 1082: /* mwaitx */ |
| 6698 | case 1079: /* xtest_1 */ |
| 6699 | case 1078: /* xabort */ |
| 6700 | case 1077: /* xend */ |
| 6701 | case 1076: /* xbegin_1 */ |
| 6702 | case 1075: /* *pause */ |
| 6703 | case 1074: /* rdseeddi_1 */ |
| 6704 | case 1073: /* rdseedsi_1 */ |
| 6705 | case 1072: /* rdseedhi_1 */ |
| 6706 | case 1071: /* rdranddi_1 */ |
| 6707 | case 1070: /* rdrandsi_1 */ |
| 6708 | case 1069: /* rdrandhi_1 */ |
| 6709 | case 1068: /* wrgsbasedi */ |
| 6710 | case 1067: /* wrfsbasedi */ |
| 6711 | case 1066: /* wrgsbasesi */ |
| 6712 | case 1065: /* wrfsbasesi */ |
| 6713 | case 1064: /* rdgsbasedi */ |
| 6714 | case 1063: /* rdfsbasedi */ |
| 6715 | case 1062: /* rdgsbasesi */ |
| 6716 | case 1061: /* rdfsbasesi */ |
| 6717 | case 1052: /* fnclex */ |
| 6718 | case 1051: /* fnstsw */ |
| 6719 | case 1050: /* fldenv */ |
| 6720 | case 1049: /* fnstenv */ |
| 6721 | case 1048: /* xrstors64 */ |
| 6722 | case 1047: /* xrstor64 */ |
| 6723 | case 1046: /* xrstors_rex64 */ |
| 6724 | case 1045: /* xrstor_rex64 */ |
| 6725 | case 1044: /* xrstors */ |
| 6726 | case 1043: /* xrstor */ |
| 6727 | case 1042: /* xsaves64 */ |
| 6728 | case 1041: /* xsavec64 */ |
| 6729 | case 1040: /* xsaveopt64 */ |
| 6730 | case 1039: /* xsave64 */ |
| 6731 | case 1038: /* xsaves_rex64 */ |
| 6732 | case 1037: /* xsavec_rex64 */ |
| 6733 | case 1036: /* xsaveopt_rex64 */ |
| 6734 | case 1035: /* xsave_rex64 */ |
| 6735 | case 1034: /* xsaves */ |
| 6736 | case 1033: /* xsavec */ |
| 6737 | case 1032: /* xsaveopt */ |
| 6738 | case 1031: /* xsave */ |
| 6739 | case 1030: /* fxrstor64 */ |
| 6740 | case 1029: /* fxrstor */ |
| 6741 | case 1028: /* fxsave64 */ |
| 6742 | case 1027: /* fxsave */ |
| 6743 | case 1026: /* rdtscp_rex64 */ |
| 6744 | case 1025: /* rdtscp */ |
| 6745 | case 1024: /* rdtsc_rex64 */ |
| 6746 | case 1023: /* rdtsc */ |
| 6747 | case 1022: /* rdpmc_rex64 */ |
| 6748 | case 1021: /* rdpmc */ |
| 6749 | case 1016: /* stack_tls_protect_test_di */ |
| 6750 | case 1015: /* stack_tls_protect_test_si */ |
| 6751 | case 1014: /* stack_protect_test_di */ |
| 6752 | case 1013: /* stack_protect_test_si */ |
| 6753 | case 1012: /* stack_tls_protect_set_di */ |
| 6754 | case 1011: /* stack_tls_protect_set_si */ |
| 6755 | case 1010: /* stack_protect_set_di */ |
| 6756 | case 1009: /* stack_protect_set_si */ |
| 6757 | case 1005: /* trap */ |
| 6758 | case 1004: /* probe_stack_rangedi */ |
| 6759 | case 1003: /* probe_stack_rangesi */ |
| 6760 | case 1002: /* adjust_stack_and_probedi */ |
| 6761 | case 1001: /* adjust_stack_and_probesi */ |
| 6762 | case 1000: /* probe_stack_di */ |
| 6763 | case 999: /* probe_stack_si */ |
| 6764 | case 998: /* allocate_stack_worker_probe_di */ |
| 6765 | case 997: /* allocate_stack_worker_probe_si */ |
| 6766 | case 996: /* pro_epilogue_adjust_stack_di_sub */ |
| 6767 | case 995: /* pro_epilogue_adjust_stack_si_sub */ |
| 6768 | case 982: /* *movsfcc_1_387 */ |
| 6769 | case 981: /* *movdfcc_1 */ |
| 6770 | case 980: /* *movxfcc_1 */ |
| 6771 | case 979: /* *movqicc_noc */ |
| 6772 | case 978: /* *movsicc_noc_zext */ |
| 6773 | case 977: /* *movdicc_noc */ |
| 6774 | case 976: /* *movsicc_noc */ |
| 6775 | case 975: /* *movhicc_noc */ |
| 6776 | case 974: /* *x86_movdicc_0_m1_neg */ |
| 6777 | case 973: /* *x86_movsicc_0_m1_neg */ |
| 6778 | case 972: /* *x86_movdicc_0_m1_se */ |
| 6779 | case 971: /* *x86_movsicc_0_m1_se */ |
| 6780 | case 970: /* *x86_movdicc_0_m1 */ |
| 6781 | case 969: /* *x86_movsicc_0_m1 */ |
| 6782 | case 934: /* cld */ |
| 6783 | case 932: /* fxamdf2_i387_with_temp */ |
| 6784 | case 931: /* fxamsf2_i387_with_temp */ |
| 6785 | case 930: /* fxamxf2_i387 */ |
| 6786 | case 929: /* fxamdf2_i387 */ |
| 6787 | case 928: /* fxamsf2_i387 */ |
| 6788 | case 841: /* truncxfdf2_i387_noop_unspec */ |
| 6789 | case 840: /* truncxfsf2_i387_noop_unspec */ |
| 6790 | case 811: /* *tls_dynamic_gnu2_combine_64 */ |
| 6791 | case 809: /* *tls_dynamic_gnu2_lea_64 */ |
| 6792 | case 808: /* *tls_dynamic_gnu2_combine_32 */ |
| 6793 | case 806: /* *tls_dynamic_gnu2_lea_32 */ |
| 6794 | case 805: /* *add_tp_di */ |
| 6795 | case 804: /* *add_tp_si */ |
| 6796 | case 803: /* *add_tp_x32_zext */ |
| 6797 | case 802: /* *add_tp_x32 */ |
| 6798 | case 801: /* *load_tp_di */ |
| 6799 | case 800: /* *load_tp_si */ |
| 6800 | case 799: /* *load_tp_x32_zext */ |
| 6801 | case 798: /* *load_tp_x32 */ |
| 6802 | case 797: /* *tls_local_dynamic_32_once */ |
| 6803 | case 796: /* *tls_local_dynamic_base_64_largepic */ |
| 6804 | case 795: /* *tls_local_dynamic_base_64_di */ |
| 6805 | case 794: /* *tls_local_dynamic_base_64_si */ |
| 6806 | case 793: /* *tls_local_dynamic_base_32_gnu */ |
| 6807 | case 792: /* *tls_global_dynamic_64_largepic */ |
| 6808 | case 791: /* *tls_global_dynamic_64_di */ |
| 6809 | case 790: /* *tls_global_dynamic_64_si */ |
| 6810 | case 789: /* *tls_global_dynamic_32_gnu */ |
| 6811 | case 788: /* *parityhi2_cmp */ |
| 6812 | case 787: /* paritysi2_cmp */ |
| 6813 | case 786: /* paritydi2_cmp */ |
| 6814 | case 785: /* bswaphi_lowpart */ |
| 6815 | case 784: /* *bswaphi_lowpart_1 */ |
| 6816 | case 778: /* *popcounthi2_1 */ |
| 6817 | case 732: /* tzcnt_hi */ |
| 6818 | case 730: /* *tzcnt_di_falsedep */ |
| 6819 | case 728: /* *tzcnt_si_falsedep */ |
| 6820 | case 726: /* tzcnt_di */ |
| 6821 | case 724: /* tzcnt_si */ |
| 6822 | case 719: /* *bsrhi */ |
| 6823 | case 718: /* bsr */ |
| 6824 | case 717: /* bsr_rex64 */ |
| 6825 | case 716: /* *ctzdi2_falsedep */ |
| 6826 | case 715: /* *ctzsi2_falsedep */ |
| 6827 | case 714: /* ctzdi2 */ |
| 6828 | case 713: /* ctzsi2 */ |
| 6829 | case 712: /* *bsfdi_1 */ |
| 6830 | case 711: /* *bsfsi_1 */ |
| 6831 | case 710: /* *tzcntdi_1_falsedep */ |
| 6832 | case 709: /* *tzcntsi_1_falsedep */ |
| 6833 | case 708: /* *tzcntdi_1 */ |
| 6834 | case 707: /* *tzcntsi_1 */ |
| 6835 | case 706: /* ffssi2_no_cmove */ |
| 6836 | case 705: /* split_stack_return */ |
| 6837 | case 702: /* eh_return_internal */ |
| 6838 | case 701: /* set_got_offset_rex64 */ |
| 6839 | case 700: /* set_rip_rex64 */ |
| 6840 | case 699: /* set_got_rex64 */ |
| 6841 | case 698: /* *set_got_labelled */ |
| 6842 | case 697: /* *set_got */ |
| 6843 | case 696: /* pad */ |
| 6844 | case 695: /* nops */ |
| 6845 | case 694: /* nop */ |
| 6846 | case 693: /* simple_return_indirect_internal */ |
| 6847 | case 692: /* simple_return_pop_internal */ |
| 6848 | case 691: /* simple_return_internal_long */ |
| 6849 | case 690: /* interrupt_return */ |
| 6850 | case 689: /* simple_return_internal */ |
| 6851 | case 688: /* prologue_use */ |
| 6852 | case 687: /* *memory_blockage */ |
| 6853 | case 686: /* blockage */ |
| 6854 | case 663: /* *tablejump_1 */ |
| 6855 | case 662: /* *tablejump_1 */ |
| 6856 | case 661: /* *indirect_jump */ |
| 6857 | case 660: /* *indirect_jump */ |
| 6858 | case 659: /* jump */ |
| 6859 | case 658: /* *jccxf_si_r_i387 */ |
| 6860 | case 657: /* *jccdf_si_r_i387 */ |
| 6861 | case 656: /* *jccsf_si_r_i387 */ |
| 6862 | case 655: /* *jccxf_hi_r_i387 */ |
| 6863 | case 654: /* *jccdf_hi_r_i387 */ |
| 6864 | case 653: /* *jccsf_hi_r_i387 */ |
| 6865 | case 652: /* *jccxf_si_i387 */ |
| 6866 | case 651: /* *jccdf_si_i387 */ |
| 6867 | case 650: /* *jccsf_si_i387 */ |
| 6868 | case 649: /* *jccxf_hi_i387 */ |
| 6869 | case 648: /* *jccdf_hi_i387 */ |
| 6870 | case 647: /* *jccsf_hi_i387 */ |
| 6871 | case 646: /* *jccuxf_r_i387 */ |
| 6872 | case 645: /* *jccudf_r_i387 */ |
| 6873 | case 644: /* *jccusf_r_i387 */ |
| 6874 | case 643: /* *jccuxf_i387 */ |
| 6875 | case 642: /* *jccudf_i387 */ |
| 6876 | case 641: /* *jccusf_i387 */ |
| 6877 | case 640: /* *jccdf_r_i387 */ |
| 6878 | case 639: /* *jccsf_r_i387 */ |
| 6879 | case 638: /* *jccdf_i387 */ |
| 6880 | case 637: /* *jccsf_i387 */ |
| 6881 | case 636: /* *jccxf_r_i387 */ |
| 6882 | case 635: /* *jccxf_i387 */ |
| 6883 | case 634: /* *jccxf_0_r_i387 */ |
| 6884 | case 633: /* *jccdf_0_r_i387 */ |
| 6885 | case 632: /* *jccsf_0_r_i387 */ |
| 6886 | case 631: /* *jccxf_0_i387 */ |
| 6887 | case 630: /* *jccdf_0_i387 */ |
| 6888 | case 629: /* *jccsf_0_i387 */ |
| 6889 | case 628: /* *jcc_2 */ |
| 6890 | case 627: /* *jcc_1 */ |
| 6891 | case 624: /* *setcc_qi_slp */ |
| 6892 | case 623: /* *setcc_qi */ |
| 6893 | case 622: /* *setcc_si_1_movzbl */ |
| 6894 | case 621: /* *setcc_si_1_and */ |
| 6895 | case 620: /* *setcc_di_1 */ |
| 6896 | case 619: /* *jcc_btdi_mask */ |
| 6897 | case 618: /* *jcc_btsi_mask */ |
| 6898 | case 617: /* *jcc_btdi_1 */ |
| 6899 | case 616: /* *jcc_btsi_1 */ |
| 6900 | case 615: /* *jcc_btdi */ |
| 6901 | case 614: /* *jcc_btsi */ |
| 6902 | case 613: /* *btdi */ |
| 6903 | case 612: /* *btsi */ |
| 6904 | case 611: /* *btcq */ |
| 6905 | case 610: /* *btrq */ |
| 6906 | case 609: /* *btsq */ |
| 6907 | case 593: /* ix86_rotrti3_doubleword */ |
| 6908 | case 592: /* ix86_rotrdi3_doubleword */ |
| 6909 | case 591: /* ix86_rotlti3_doubleword */ |
| 6910 | case 590: /* ix86_rotldi3_doubleword */ |
| 6911 | case 589: /* *rotrdi3_mask */ |
| 6912 | case 588: /* *rotldi3_mask */ |
| 6913 | case 587: /* *rotrsi3_mask */ |
| 6914 | case 586: /* *rotlsi3_mask */ |
| 6915 | case 544: /* *ashrti3_doubleword */ |
| 6916 | case 543: /* *lshrti3_doubleword */ |
| 6917 | case 542: /* *ashrdi3_doubleword */ |
| 6918 | case 541: /* *lshrdi3_doubleword */ |
| 6919 | case 540: /* *ashrdi3_mask */ |
| 6920 | case 539: /* *lshrdi3_mask */ |
| 6921 | case 538: /* *ashrsi3_mask */ |
| 6922 | case 537: /* *lshrsi3_mask */ |
| 6923 | case 518: /* *ashldi3_mask */ |
| 6924 | case 517: /* *ashlsi3_mask */ |
| 6925 | case 514: /* *ashlti3_doubleword */ |
| 6926 | case 513: /* *ashldi3_doubleword */ |
| 6927 | case 512: /* *one_cmplsi2_2_zext */ |
| 6928 | case 511: /* *one_cmpldi2_2 */ |
| 6929 | case 510: /* *one_cmplsi2_2 */ |
| 6930 | case 509: /* *one_cmplhi2_2 */ |
| 6931 | case 508: /* *one_cmplqi2_2 */ |
| 6932 | case 507: /* *one_cmplqi2_1 */ |
| 6933 | case 506: /* *one_cmplsi2_1_zext */ |
| 6934 | case 505: /* *one_cmpldi2_1 */ |
| 6935 | case 504: /* *one_cmplsi2_1 */ |
| 6936 | case 503: /* *one_cmplhi2_1 */ |
| 6937 | case 502: /* *one_cmpldi2_doubleword */ |
| 6938 | case 501: /* copysigntf3_var */ |
| 6939 | case 500: /* copysigndf3_var */ |
| 6940 | case 499: /* copysignsf3_var */ |
| 6941 | case 498: /* copysigntf3_const */ |
| 6942 | case 497: /* copysigndf3_const */ |
| 6943 | case 496: /* copysignsf3_const */ |
| 6944 | case 495: /* *negextenddfxf2 */ |
| 6945 | case 494: /* *absextenddfxf2 */ |
| 6946 | case 493: /* *negextendsfxf2 */ |
| 6947 | case 492: /* *absextendsfxf2 */ |
| 6948 | case 491: /* *negextendsfdf2 */ |
| 6949 | case 490: /* *absextendsfdf2 */ |
| 6950 | case 489: /* *negxf2_1 */ |
| 6951 | case 488: /* *absxf2_1 */ |
| 6952 | case 487: /* *negdf2_1 */ |
| 6953 | case 486: /* *absdf2_1 */ |
| 6954 | case 485: /* *negsf2_1 */ |
| 6955 | case 484: /* *abssf2_1 */ |
| 6956 | case 483: /* *absnegtf2_sse */ |
| 6957 | case 482: /* *absnegxf2_i387 */ |
| 6958 | case 481: /* *absnegdf2 */ |
| 6959 | case 480: /* *absnegsf2 */ |
| 6960 | case 479: /* *negvdi3 */ |
| 6961 | case 478: /* *negvsi3 */ |
| 6962 | case 477: /* *negvhi3 */ |
| 6963 | case 476: /* *negvqi3 */ |
| 6964 | case 475: /* *negsi2_cmpz_zext */ |
| 6965 | case 474: /* *negdi2_cmpz */ |
| 6966 | case 473: /* *negsi2_cmpz */ |
| 6967 | case 472: /* *neghi2_cmpz */ |
| 6968 | case 471: /* *negqi2_cmpz */ |
| 6969 | case 470: /* *negsi2_1_zext */ |
| 6970 | case 469: /* *negdi2_1 */ |
| 6971 | case 468: /* *negsi2_1 */ |
| 6972 | case 467: /* *neghi2_1 */ |
| 6973 | case 466: /* *negqi2_1 */ |
| 6974 | case 465: /* *negti2_doubleword */ |
| 6975 | case 464: /* *negdi2_doubleword */ |
| 6976 | case 463: /* *xorqi_ext_1_cc */ |
| 6977 | case 462: /* *xorqi_ext_2 */ |
| 6978 | case 461: /* *iorqi_ext_2 */ |
| 6979 | case 460: /* *xorqi_ext_1 */ |
| 6980 | case 459: /* *iorqi_ext_1 */ |
| 6981 | case 458: /* *xordi_3 */ |
| 6982 | case 457: /* *iordi_3 */ |
| 6983 | case 456: /* *xorsi_3 */ |
| 6984 | case 455: /* *iorsi_3 */ |
| 6985 | case 454: /* *xorhi_3 */ |
| 6986 | case 453: /* *iorhi_3 */ |
| 6987 | case 452: /* *xorqi_3 */ |
| 6988 | case 451: /* *iorqi_3 */ |
| 6989 | case 450: /* *xorqi_2_slp */ |
| 6990 | case 449: /* *iorqi_2_slp */ |
| 6991 | case 448: /* *xorsi_2_zext_imm */ |
| 6992 | case 447: /* *iorsi_2_zext_imm */ |
| 6993 | case 446: /* *xorsi_2_zext */ |
| 6994 | case 445: /* *iorsi_2_zext */ |
| 6995 | case 444: /* *xordi_2 */ |
| 6996 | case 443: /* *iordi_2 */ |
| 6997 | case 442: /* *xorsi_2 */ |
| 6998 | case 441: /* *iorsi_2 */ |
| 6999 | case 440: /* *xorhi_2 */ |
| 7000 | case 439: /* *iorhi_2 */ |
| 7001 | case 438: /* *xorqi_2 */ |
| 7002 | case 437: /* *iorqi_2 */ |
| 7003 | case 436: /* *xorqi_1_slp */ |
| 7004 | case 435: /* *iorqi_1_slp */ |
| 7005 | case 434: /* *xorqi_1 */ |
| 7006 | case 433: /* *iorqi_1 */ |
| 7007 | case 432: /* *xorsi_1_zext_imm */ |
| 7008 | case 431: /* *iorsi_1_zext_imm */ |
| 7009 | case 430: /* *xorsi_1_zext */ |
| 7010 | case 429: /* *iorsi_1_zext */ |
| 7011 | case 428: /* *xordi_1 */ |
| 7012 | case 427: /* *iordi_1 */ |
| 7013 | case 426: /* *xorsi_1 */ |
| 7014 | case 425: /* *iorsi_1 */ |
| 7015 | case 424: /* *xorhi_1 */ |
| 7016 | case 423: /* *iorhi_1 */ |
| 7017 | case 422: /* *xordi3_doubleword */ |
| 7018 | case 421: /* *iordi3_doubleword */ |
| 7019 | case 414: /* *andndi3_doubleword */ |
| 7020 | case 413: /* *andqi_ext_2 */ |
| 7021 | case 412: /* *andqi_ext_1_cc */ |
| 7022 | case 411: /* andqi_ext_1 */ |
| 7023 | case 410: /* *andqi_2_slp */ |
| 7024 | case 409: /* *andsi_2 */ |
| 7025 | case 408: /* *andhi_2 */ |
| 7026 | case 407: /* *andqi_2 */ |
| 7027 | case 406: /* *andqi_2_maybe_si */ |
| 7028 | case 405: /* *andsi_2_zext */ |
| 7029 | case 404: /* *anddi_2 */ |
| 7030 | case 403: /* *andqi_1_slp */ |
| 7031 | case 402: /* *andqi_1 */ |
| 7032 | case 401: /* *andsi_1 */ |
| 7033 | case 400: /* *andhi_1 */ |
| 7034 | case 399: /* *andsi_1_zext */ |
| 7035 | case 398: /* *anddi_1 */ |
| 7036 | case 397: /* *anddi3_doubleword */ |
| 7037 | case 396: /* *testqi_ext_3 */ |
| 7038 | case 395: /* *testqi_ext_3 */ |
| 7039 | case 394: /* *testqi_ext_3 */ |
| 7040 | case 393: /* *testqi_ext_2 */ |
| 7041 | case 392: /* *testqi_ext_1 */ |
| 7042 | case 391: /* *testsi_1 */ |
| 7043 | case 390: /* *testhi_1 */ |
| 7044 | case 389: /* *testqi_1 */ |
| 7045 | case 388: /* *testqi_1_maybe_si */ |
| 7046 | case 387: /* *testdi_1 */ |
| 7047 | case 382: /* *udivmoddi4_pow2 */ |
| 7048 | case 381: /* *udivmodsi4_pow2 */ |
| 7049 | case 380: /* *udivmoddi4 */ |
| 7050 | case 379: /* *udivmodsi4 */ |
| 7051 | case 378: /* *udivmodhi4 */ |
| 7052 | case 377: /* udivmoddi4_1 */ |
| 7053 | case 376: /* udivmodsi4_1 */ |
| 7054 | case 371: /* *divmoddi4 */ |
| 7055 | case 370: /* *divmodsi4 */ |
| 7056 | case 369: /* *divmodhi4 */ |
| 7057 | case 368: /* divmoddi4_1 */ |
| 7058 | case 367: /* divmodsi4_1 */ |
| 7059 | case 336: /* *addsi3_zext_cc_overflow_2 */ |
| 7060 | case 335: /* *adddi3_cc_overflow_2 */ |
| 7061 | case 334: /* *addsi3_cc_overflow_2 */ |
| 7062 | case 333: /* *addhi3_cc_overflow_2 */ |
| 7063 | case 332: /* *addqi3_cc_overflow_2 */ |
| 7064 | case 331: /* *adddi3_cconly_overflow_2 */ |
| 7065 | case 330: /* *addsi3_cconly_overflow_2 */ |
| 7066 | case 329: /* *addhi3_cconly_overflow_2 */ |
| 7067 | case 328: /* *addqi3_cconly_overflow_2 */ |
| 7068 | case 327: /* *addsi3_zext_cc_overflow_1 */ |
| 7069 | case 326: /* *adddi3_cc_overflow_1 */ |
| 7070 | case 325: /* *addsi3_cc_overflow_1 */ |
| 7071 | case 324: /* *addhi3_cc_overflow_1 */ |
| 7072 | case 323: /* *addqi3_cc_overflow_1 */ |
| 7073 | case 322: /* *adddi3_cconly_overflow_1 */ |
| 7074 | case 321: /* *addsi3_cconly_overflow_1 */ |
| 7075 | case 320: /* *addhi3_cconly_overflow_1 */ |
| 7076 | case 319: /* *addqi3_cconly_overflow_1 */ |
| 7077 | case 318: /* subborrowdi */ |
| 7078 | case 317: /* subborrowsi */ |
| 7079 | case 316: /* *subsi3_carry_zext_0 */ |
| 7080 | case 315: /* *subsi3_carry_zext */ |
| 7081 | case 314: /* *subdi3_carry_0 */ |
| 7082 | case 313: /* *subsi3_carry_0 */ |
| 7083 | case 312: /* *subhi3_carry_0 */ |
| 7084 | case 311: /* *subqi3_carry_0 */ |
| 7085 | case 310: /* subdi3_carry */ |
| 7086 | case 309: /* subsi3_carry */ |
| 7087 | case 308: /* subhi3_carry */ |
| 7088 | case 307: /* subqi3_carry */ |
| 7089 | case 306: /* addcarrydi */ |
| 7090 | case 305: /* addcarrysi */ |
| 7091 | case 304: /* *addsi3_carry_zext_0 */ |
| 7092 | case 303: /* *addsi3_carry_zext */ |
| 7093 | case 302: /* *adddi3_carry_0 */ |
| 7094 | case 301: /* *addsi3_carry_0 */ |
| 7095 | case 300: /* *addhi3_carry_0 */ |
| 7096 | case 299: /* *addqi3_carry_0 */ |
| 7097 | case 298: /* adddi3_carry */ |
| 7098 | case 297: /* addsi3_carry */ |
| 7099 | case 296: /* addhi3_carry */ |
| 7100 | case 295: /* addqi3_carry */ |
| 7101 | case 294: /* *subsi_3_zext */ |
| 7102 | case 293: /* *subdi_3 */ |
| 7103 | case 292: /* *subsi_3 */ |
| 7104 | case 291: /* *subhi_3 */ |
| 7105 | case 290: /* *subqi_3 */ |
| 7106 | case 289: /* *subvdi4_1 */ |
| 7107 | case 288: /* *subvsi4_1 */ |
| 7108 | case 287: /* *subvhi4_1 */ |
| 7109 | case 286: /* *subvqi4_1 */ |
| 7110 | case 285: /* *subvdi4 */ |
| 7111 | case 284: /* *subvsi4 */ |
| 7112 | case 283: /* *subvhi4 */ |
| 7113 | case 282: /* *subvqi4 */ |
| 7114 | case 281: /* *subsi_2_zext */ |
| 7115 | case 280: /* *subdi_2 */ |
| 7116 | case 279: /* *subsi_2 */ |
| 7117 | case 278: /* *subhi_2 */ |
| 7118 | case 277: /* *subqi_2 */ |
| 7119 | case 276: /* *subqi_1_slp */ |
| 7120 | case 275: /* *subsi_1_zext */ |
| 7121 | case 274: /* *subdi_1 */ |
| 7122 | case 273: /* *subsi_1 */ |
| 7123 | case 272: /* *subhi_1 */ |
| 7124 | case 271: /* *subqi_1 */ |
| 7125 | case 270: /* *subti3_doubleword */ |
| 7126 | case 269: /* *subdi3_doubleword */ |
| 7127 | case 268: /* *leadi_general_4 */ |
| 7128 | case 267: /* *leadi_general_4 */ |
| 7129 | case 266: /* *leasi_general_4 */ |
| 7130 | case 265: /* *leasi_general_4 */ |
| 7131 | case 264: /* *leahi_general_4 */ |
| 7132 | case 263: /* *leahi_general_4 */ |
| 7133 | case 262: /* *leaqi_general_4 */ |
| 7134 | case 261: /* *leaqi_general_4 */ |
| 7135 | case 260: /* *leahi_general_3b */ |
| 7136 | case 259: /* *leaqi_general_3b */ |
| 7137 | case 258: /* *leahi_general_3 */ |
| 7138 | case 257: /* *leaqi_general_3 */ |
| 7139 | case 256: /* *leahi_general_2b */ |
| 7140 | case 255: /* *leaqi_general_2b */ |
| 7141 | case 254: /* *leahi_general_2 */ |
| 7142 | case 253: /* *leaqi_general_2 */ |
| 7143 | case 252: /* *leahi_general_1 */ |
| 7144 | case 251: /* *leaqi_general_1 */ |
| 7145 | case 250: /* *addvdi4_1 */ |
| 7146 | case 249: /* *addvsi4_1 */ |
| 7147 | case 248: /* *addvhi4_1 */ |
| 7148 | case 247: /* *addvqi4_1 */ |
| 7149 | case 246: /* *addvdi4 */ |
| 7150 | case 245: /* *addvsi4 */ |
| 7151 | case 244: /* *addvhi4 */ |
| 7152 | case 243: /* *addvqi4 */ |
| 7153 | case 242: /* *addqi_ext_2 */ |
| 7154 | case 216: /* *addti3_doubleword */ |
| 7155 | case 215: /* *adddi3_doubleword */ |
| 7156 | case 214: /* *leadi */ |
| 7157 | case 213: /* *leasi */ |
| 7158 | case 212: /* *floatunssixf2_i387_with_xmm */ |
| 7159 | case 211: /* *floatunssidf2_i387_with_xmm */ |
| 7160 | case 210: /* *floatunssisf2_i387_with_xmm */ |
| 7161 | case 209: /* floatdixf2_i387_with_xmm */ |
| 7162 | case 208: /* floatdidf2_i387_with_xmm */ |
| 7163 | case 207: /* floatdisf2_i387_with_xmm */ |
| 7164 | case 206: /* *floatdidf2_i387 */ |
| 7165 | case 205: /* *floatdisf2_i387 */ |
| 7166 | case 204: /* *floatsidf2_i387 */ |
| 7167 | case 203: /* *floatsisf2_i387 */ |
| 7168 | case 198: /* floatdixf2 */ |
| 7169 | case 197: /* floatsixf2 */ |
| 7170 | case 196: /* floathixf2 */ |
| 7171 | case 195: /* floathidf2 */ |
| 7172 | case 194: /* floathisf2 */ |
| 7173 | case 193: /* x86_fldcw_1 */ |
| 7174 | case 192: /* x86_fnstcw_1 */ |
| 7175 | case 169: /* *fixuns_truncdf_1 */ |
| 7176 | case 168: /* *fixuns_truncsf_1 */ |
| 7177 | case 167: /* *truncxfdf2_i387 */ |
| 7178 | case 166: /* *truncxfsf2_i387 */ |
| 7179 | case 165: /* truncxfdf2_i387_noop */ |
| 7180 | case 164: /* truncxfsf2_i387_noop */ |
| 7181 | case 163: /* *truncxfdf2_mixed */ |
| 7182 | case 162: /* *truncxfsf2_mixed */ |
| 7183 | case 161: /* *truncdfsf2_i387_1 */ |
| 7184 | case 160: /* *truncdfsf_i387 */ |
| 7185 | case 158: /* *truncdfsf_fast_i387 */ |
| 7186 | case 156: /* *extenddfxf2_i387 */ |
| 7187 | case 155: /* *extendsfxf2_i387 */ |
| 7188 | case 153: /* extendqihi2 */ |
| 7189 | case 152: /* *extendqisi2_zext */ |
| 7190 | case 151: /* extendqisi2 */ |
| 7191 | case 150: /* *extendhisi2_zext */ |
| 7192 | case 149: /* extendhisi2 */ |
| 7193 | case 148: /* extendhidi2 */ |
| 7194 | case 147: /* extendqidi2 */ |
| 7195 | case 146: /* extendsidi2_1 */ |
| 7196 | case 145: /* *extendsidi2_rex64 */ |
| 7197 | case 144: /* *zextsi_doubleword */ |
| 7198 | case 143: /* *zexthi_doubleword */ |
| 7199 | case 142: /* *zextqi_doubleword */ |
| 7200 | case 141: /* *zexthi_doubleword_and */ |
| 7201 | case 140: /* *zextqi_doubleword_and */ |
| 7202 | case 138: /* zero_extendqihi2_and */ |
| 7203 | case 135: /* zero_extendhisi2_and */ |
| 7204 | case 134: /* zero_extendqisi2_and */ |
| 7205 | case 130: /* *swapdf */ |
| 7206 | case 129: /* *swapsf */ |
| 7207 | case 128: /* swapxf */ |
| 7208 | case 125: /* *movxf_internal */ |
| 7209 | case 123: /* *pushsf */ |
| 7210 | case 122: /* *pushsf_rex64 */ |
| 7211 | case 121: /* *pushdf */ |
| 7212 | case 120: /* *pushxf */ |
| 7213 | case 119: /* *pushxf_rounded */ |
| 7214 | case 118: /* *pushxf_rounded */ |
| 7215 | case 117: /* *pushtf */ |
| 7216 | case 116: /* *insvqi_3 */ |
| 7217 | case 115: /* *insvqi_3 */ |
| 7218 | case 114: /* *insvqi_2 */ |
| 7219 | case 113: /* *insvqi_2 */ |
| 7220 | case 112: /* *insvqi_1 */ |
| 7221 | case 111: /* *insvqi_1_mem_rex64 */ |
| 7222 | case 110: /* insvdi_1 */ |
| 7223 | case 109: /* insvsi_1 */ |
| 7224 | case 108: /* insvhi_1 */ |
| 7225 | case 106: /* *extzvqi_mem_rex64 */ |
| 7226 | case 105: /* *extzvdi */ |
| 7227 | case 104: /* *extzvsi */ |
| 7228 | case 103: /* *extzvhi */ |
| 7229 | case 102: /* *extvsi */ |
| 7230 | case 101: /* *extvhi */ |
| 7231 | case 100: /* *movstricthi_xor */ |
| 7232 | case 99: /* *movstrictqi_xor */ |
| 7233 | case 98: /* *movstricthi_1 */ |
| 7234 | case 97: /* *movstrictqi_1 */ |
| 7235 | case 96: /* *swaphi */ |
| 7236 | case 95: /* *swapqi */ |
| 7237 | case 94: /* *swapdi */ |
| 7238 | case 93: /* *swapsi */ |
| 7239 | case 92: /* *movabsdi_2 */ |
| 7240 | case 91: /* *movabssi_2 */ |
| 7241 | case 90: /* *movabshi_2 */ |
| 7242 | case 89: /* *movabsqi_2 */ |
| 7243 | case 88: /* *movabsdi_1 */ |
| 7244 | case 87: /* *movabssi_1 */ |
| 7245 | case 86: /* *movabshi_1 */ |
| 7246 | case 85: /* *movabsqi_1 */ |
| 7247 | case 77: /* *movdi_or */ |
| 7248 | case 76: /* *movsi_or */ |
| 7249 | case 75: /* *movdi_xor */ |
| 7250 | case 74: /* *movsi_xor */ |
| 7251 | case 73: /* *popfldi1 */ |
| 7252 | case 72: /* *popflsi1 */ |
| 7253 | case 71: /* *pushfldi2 */ |
| 7254 | case 70: /* *pushflsi2 */ |
| 7255 | case 69: /* *popdi1_epilogue */ |
| 7256 | case 68: /* *popsi1_epilogue */ |
| 7257 | case 67: /* *popdi1 */ |
| 7258 | case 66: /* *popsi1 */ |
| 7259 | case 65: /* *pushdi2_prologue */ |
| 7260 | case 64: /* *pushsi2_prologue */ |
| 7261 | case 63: /* *pushhi2 */ |
| 7262 | case 62: /* *pushqi2 */ |
| 7263 | case 61: /* *pushsi2_rex64 */ |
| 7264 | case 60: /* *pushhi2_rex64 */ |
| 7265 | case 59: /* *pushqi2_rex64 */ |
| 7266 | case 58: /* *pushsi2 */ |
| 7267 | case 57: /* *pushdi2_rex64 */ |
| 7268 | case 56: /* *pushti2 */ |
| 7269 | case 55: /* *pushdi2 */ |
| 7270 | case 48: /* x86_sahf_1 */ |
| 7271 | case 47: /* x86_fnstsw_1 */ |
| 7272 | case 46: /* *cmpxf_si_cc_i387 */ |
| 7273 | case 45: /* *cmpdf_si_cc_i387 */ |
| 7274 | case 44: /* *cmpsf_si_cc_i387 */ |
| 7275 | case 43: /* *cmpxf_hi_cc_i387 */ |
| 7276 | case 42: /* *cmpdf_hi_cc_i387 */ |
| 7277 | case 41: /* *cmpsf_hi_cc_i387 */ |
| 7278 | case 40: /* *cmpxf_si_i387 */ |
| 7279 | case 39: /* *cmpdf_si_i387 */ |
| 7280 | case 38: /* *cmpsf_si_i387 */ |
| 7281 | case 37: /* *cmpxf_hi_i387 */ |
| 7282 | case 36: /* *cmpdf_hi_i387 */ |
| 7283 | case 35: /* *cmpsf_hi_i387 */ |
| 7284 | case 34: /* *cmpuxf_cc_i387 */ |
| 7285 | case 33: /* *cmpudf_cc_i387 */ |
| 7286 | case 32: /* *cmpusf_cc_i387 */ |
| 7287 | case 31: /* *cmpuxf_i387 */ |
| 7288 | case 30: /* *cmpudf_i387 */ |
| 7289 | case 29: /* *cmpusf_i387 */ |
| 7290 | case 28: /* *cmpdf_cc_i387 */ |
| 7291 | case 27: /* *cmpsf_cc_i387 */ |
| 7292 | case 26: /* *cmpdf_i387 */ |
| 7293 | case 25: /* *cmpsf_i387 */ |
| 7294 | case 24: /* *cmpxf_cc_i387 */ |
| 7295 | case 23: /* *cmpxf_i387 */ |
| 7296 | case 22: /* *cmpxf_0_cc_i387 */ |
| 7297 | case 21: /* *cmpdf_0_cc_i387 */ |
| 7298 | case 20: /* *cmpsf_0_cc_i387 */ |
| 7299 | case 19: /* *cmpxf_0_i387 */ |
| 7300 | case 18: /* *cmpdf_0_i387 */ |
| 7301 | case 17: /* *cmpsf_0_i387 */ |
| 7302 | case 16: /* *cmpqi_ext_4 */ |
| 7303 | case 15: /* *cmpqi_ext_3 */ |
| 7304 | case 14: /* *cmpqi_ext_2 */ |
| 7305 | case 13: /* *cmpqi_ext_1 */ |
| 7306 | case 12: /* *cmpdi_minus_1 */ |
| 7307 | case 11: /* *cmpsi_minus_1 */ |
| 7308 | case 10: /* *cmphi_minus_1 */ |
| 7309 | case 9: /* *cmpqi_minus_1 */ |
| 7310 | case 8: /* *cmpdi_1 */ |
| 7311 | case 7: /* *cmpsi_1 */ |
| 7312 | case 6: /* *cmphi_1 */ |
| 7313 | case 5: /* *cmpqi_1 */ |
| 7314 | case 4: /* *cmpdi_ccno_1 */ |
| 7315 | case 3: /* *cmpsi_ccno_1 */ |
| 7316 | case 2: /* *cmphi_ccno_1 */ |
| 7317 | case 1: /* *cmpqi_ccno_1 */ |
| 7318 | return 1; |
| 7319 | |
| 7320 | case -1: |
| 7321 | if (GET_CODE (PATTERN (insn)) != ASM_INPUT |
| 7322 | && asm_noperands (PATTERN (insn)) < 0) |
| 7323 | fatal_insn_not_found (insn); |
| 7324 | /* FALLTHRU */ |
| 7325 | if (((cached_type = get_attr_type (insn)) == TYPE_ALU) || (cached_type == TYPE_ALU1) || (cached_type == TYPE_NEGNOT) || (cached_type == TYPE_ICMP) || (cached_type == TYPE_LEA) || (cached_type == TYPE_TEST) || (cached_type == TYPE_IMOV) || (cached_type == TYPE_IMOVX) || (cached_type == TYPE_ICMOV) || (cached_type == TYPE_INCDEC) || (cached_type == TYPE_SETCC)) |
| 7326 | { |
| 7327 | return 1; |
| 7328 | } |
| 7329 | else if ((cached_type == TYPE_ISHIFT) || (cached_type == TYPE_ISHIFT1) || (cached_type == TYPE_ROTATE) || (cached_type == TYPE_ROTATE1)) |
| 7330 | { |
| 7331 | return 2; |
| 7332 | } |
| 7333 | else if (cached_type == TYPE_IMUL) |
| 7334 | { |
| 7335 | return 7; |
| 7336 | } |
| 7337 | else if (cached_type == TYPE_IDIV) |
| 7338 | { |
| 7339 | return 40 /* 0x28 */; |
| 7340 | } |
| 7341 | else if ((cached_type == TYPE_CALL) || (cached_type == TYPE_CALLV)) |
| 7342 | { |
| 7343 | return 2; |
| 7344 | } |
| 7345 | else if (cached_type == TYPE_IBR) |
| 7346 | { |
| 7347 | return 1; |
| 7348 | } |
| 7349 | else if ((cached_type == TYPE_POP) || (cached_type == TYPE_PUSH)) |
| 7350 | { |
| 7351 | return 1; |
| 7352 | } |
| 7353 | else if (cached_type == TYPE_LEAVE) |
| 7354 | { |
| 7355 | return 2; |
| 7356 | } |
| 7357 | else if ((cached_type == TYPE_STR) && (((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) || (cached_memory == MEMORY_BOTH))) |
| 7358 | { |
| 7359 | return 4; |
| 7360 | } |
| 7361 | else if ((cached_type == TYPE_STR) && ((cached_memory = get_attr_memory (insn)) == MEMORY_STORE)) |
| 7362 | { |
| 7363 | return 2; |
| 7364 | } |
| 7365 | else if ((cached_type == TYPE_MULTI) || (cached_type == TYPE_OTHER)) |
| 7366 | { |
| 7367 | return 1; |
| 7368 | } |
| 7369 | else if ((cached_type == TYPE_FOP) || (cached_type == TYPE_FCMP)) |
| 7370 | { |
| 7371 | return 6; |
| 7372 | } |
| 7373 | else if ((cached_type == TYPE_FMOV) || (cached_type == TYPE_FCMOV) || (cached_type == TYPE_FSGN) || (cached_type == TYPE_FXCH)) |
| 7374 | { |
| 7375 | return 1; |
| 7376 | } |
| 7377 | else if ((cached_type == TYPE_FISTP) || (cached_type == TYPE_FISTTP)) |
| 7378 | { |
| 7379 | return 4; |
| 7380 | } |
| 7381 | else if (cached_type == TYPE_FMUL) |
| 7382 | { |
| 7383 | return 10 /* 0xa */; |
| 7384 | } |
| 7385 | else if (cached_type == TYPE_FDIV) |
| 7386 | { |
| 7387 | return 47 /* 0x2f */; |
| 7388 | } |
| 7389 | else if (cached_type == TYPE_FPSPC) |
| 7390 | { |
| 7391 | return 54 /* 0x36 */; |
| 7392 | } |
| 7393 | else if (cached_type == TYPE_FRNDINT) |
| 7394 | { |
| 7395 | return 12 /* 0xc */; |
| 7396 | } |
| 7397 | else if (cached_type == TYPE_MMXMOV) |
| 7398 | { |
| 7399 | return 1; |
| 7400 | } |
| 7401 | else if ((cached_type == TYPE_MMX) || (cached_type == TYPE_MMXADD) || (cached_type == TYPE_MMXMUL) || (cached_type == TYPE_MMXCMP) || (cached_type == TYPE_MMXCVT) || (cached_type == TYPE_MMXSHFT)) |
| 7402 | { |
| 7403 | return 2; |
| 7404 | } |
| 7405 | else |
| 7406 | { |
| 7407 | return 0; |
| 7408 | } |
| 7409 | |
| 7410 | default: |
| 7411 | return 0; |
| 7412 | |
| 7413 | } |
| 7414 | } |
| 7415 | |
| 7416 | int |
| 7417 | insn_default_latency_k6 (rtx_insn *insn ATTRIBUTE_UNUSED) |
| 7418 | { |
| 7419 | enum attr_memory cached_memory ATTRIBUTE_UNUSED; |
| 7420 | enum attr_type cached_type ATTRIBUTE_UNUSED; |
| 7421 | |
| 7422 | switch (recog_memoized (insn)) |
| 7423 | { |
| 7424 | case 3904: /* sse4_2_pcmpistr_cconly */ |
| 7425 | case 3900: /* sse4_2_pcmpestr_cconly */ |
| 7426 | extract_constrain_insn_cached (insn); |
| 7427 | if (!((1 << which_alternative) & 0x5)) |
| 7428 | { |
| 7429 | return 3; |
| 7430 | } |
| 7431 | else |
| 7432 | { |
| 7433 | return 0; |
| 7434 | } |
| 7435 | |
| 7436 | case 2530: /* vec_extract_hi_v32qi */ |
| 7437 | case 2526: /* vec_extract_hi_v16hi */ |
| 7438 | extract_constrain_insn_cached (insn); |
| 7439 | if (!((1 << which_alternative) & 0x15)) |
| 7440 | { |
| 7441 | return 2; |
| 7442 | } |
| 7443 | else |
| 7444 | { |
| 7445 | return 0; |
| 7446 | } |
| 7447 | |
| 7448 | case 4770: /* avx512vl_expandv2df_mask */ |
| 7449 | case 4769: /* avx512vl_expandv2di_mask */ |
| 7450 | case 4768: /* avx512vl_expandv4sf_mask */ |
| 7451 | case 4767: /* avx512vl_expandv4si_mask */ |
| 7452 | case 4766: /* avx512vl_expandv4df_mask */ |
| 7453 | case 4765: /* avx512vl_expandv4di_mask */ |
| 7454 | case 4764: /* avx512vl_expandv8sf_mask */ |
| 7455 | case 4763: /* avx512vl_expandv8si_mask */ |
| 7456 | case 4762: /* avx512f_expandv8df_mask */ |
| 7457 | case 4761: /* avx512f_expandv8di_mask */ |
| 7458 | case 4760: /* avx512f_expandv16sf_mask */ |
| 7459 | case 4759: /* avx512f_expandv16si_mask */ |
| 7460 | case 3903: /* sse4_2_pcmpistrm */ |
| 7461 | case 3902: /* sse4_2_pcmpistri */ |
| 7462 | case 3901: /* sse4_2_pcmpistr */ |
| 7463 | case 3899: /* sse4_2_pcmpestrm */ |
| 7464 | case 3898: /* sse4_2_pcmpestri */ |
| 7465 | case 3897: /* sse4_2_pcmpestr */ |
| 7466 | case 1256: /* avx512vl_loadv8hi_mask */ |
| 7467 | case 1255: /* avx512vl_loadv16hi_mask */ |
| 7468 | case 1254: /* avx512bw_loadv32hi_mask */ |
| 7469 | case 1253: /* avx512vl_loadv32qi_mask */ |
| 7470 | case 1252: /* avx512vl_loadv16qi_mask */ |
| 7471 | case 1251: /* avx512bw_loadv64qi_mask */ |
| 7472 | case 1250: /* avx512vl_loadv2df_mask */ |
| 7473 | case 1249: /* avx512vl_loadv4df_mask */ |
| 7474 | case 1248: /* avx512f_loadv8df_mask */ |
| 7475 | case 1247: /* avx512vl_loadv4sf_mask */ |
| 7476 | case 1246: /* avx512vl_loadv8sf_mask */ |
| 7477 | case 1245: /* avx512f_loadv16sf_mask */ |
| 7478 | case 1244: /* avx512vl_loadv2di_mask */ |
| 7479 | case 1243: /* avx512vl_loadv4di_mask */ |
| 7480 | case 1242: /* avx512f_loadv8di_mask */ |
| 7481 | case 1241: /* avx512vl_loadv4si_mask */ |
| 7482 | case 1240: /* avx512vl_loadv8si_mask */ |
| 7483 | case 1239: /* avx512f_loadv16si_mask */ |
| 7484 | extract_constrain_insn_cached (insn); |
| 7485 | if (which_alternative != 0) |
| 7486 | { |
| 7487 | return 3; |
| 7488 | } |
| 7489 | else |
| 7490 | { |
| 7491 | return 0; |
| 7492 | } |
| 7493 | |
| 7494 | case 2783: /* avx512vl_us_truncatev16hiv16qi2_mask */ |
| 7495 | case 2782: /* avx512vl_truncatev16hiv16qi2_mask */ |
| 7496 | case 2781: /* avx512vl_ss_truncatev16hiv16qi2_mask */ |
| 7497 | case 2780: /* avx512vl_us_truncatev8siv8hi2_mask */ |
| 7498 | case 2779: /* avx512vl_truncatev8siv8hi2_mask */ |
| 7499 | case 2778: /* avx512vl_ss_truncatev8siv8hi2_mask */ |
| 7500 | case 2777: /* avx512vl_us_truncatev4div4si2_mask */ |
| 7501 | case 2776: /* avx512vl_truncatev4div4si2_mask */ |
| 7502 | case 2775: /* avx512vl_ss_truncatev4div4si2_mask */ |
| 7503 | case 2774: /* *avx512vl_us_truncatev16hiv16qi2 */ |
| 7504 | case 2773: /* *avx512vl_truncatev16hiv16qi2 */ |
| 7505 | case 2772: /* *avx512vl_ss_truncatev16hiv16qi2 */ |
| 7506 | case 2771: /* *avx512vl_us_truncatev8siv8hi2 */ |
| 7507 | case 2770: /* *avx512vl_truncatev8siv8hi2 */ |
| 7508 | case 2769: /* *avx512vl_ss_truncatev8siv8hi2 */ |
| 7509 | case 2768: /* *avx512vl_us_truncatev4div4si2 */ |
| 7510 | case 2767: /* *avx512vl_truncatev4div4si2 */ |
| 7511 | case 2766: /* *avx512vl_ss_truncatev4div4si2 */ |
| 7512 | case 2765: /* avx512bw_us_truncatev32hiv32qi2_mask */ |
| 7513 | case 2764: /* avx512bw_truncatev32hiv32qi2_mask */ |
| 7514 | case 2763: /* avx512bw_ss_truncatev32hiv32qi2_mask */ |
| 7515 | case 2762: /* avx512bw_us_truncatev32hiv32qi2 */ |
| 7516 | case 2761: /* avx512bw_truncatev32hiv32qi2 */ |
| 7517 | case 2760: /* avx512bw_ss_truncatev32hiv32qi2 */ |
| 7518 | case 2759: /* avx512f_us_truncatev8div8hi2_mask */ |
| 7519 | case 2758: /* avx512f_truncatev8div8hi2_mask */ |
| 7520 | case 2757: /* avx512f_ss_truncatev8div8hi2_mask */ |
| 7521 | case 2756: /* avx512f_us_truncatev8div8si2_mask */ |
| 7522 | case 2755: /* avx512f_truncatev8div8si2_mask */ |
| 7523 | case 2754: /* avx512f_ss_truncatev8div8si2_mask */ |
| 7524 | case 2753: /* avx512f_us_truncatev16siv16hi2_mask */ |
| 7525 | case 2752: /* avx512f_truncatev16siv16hi2_mask */ |
| 7526 | case 2751: /* avx512f_ss_truncatev16siv16hi2_mask */ |
| 7527 | case 2750: /* avx512f_us_truncatev16siv16qi2_mask */ |
| 7528 | case 2749: /* avx512f_truncatev16siv16qi2_mask */ |
| 7529 | case 2748: /* avx512f_ss_truncatev16siv16qi2_mask */ |
| 7530 | case 2747: /* *avx512f_us_truncatev8div8hi2 */ |
| 7531 | case 2746: /* *avx512f_truncatev8div8hi2 */ |
| 7532 | case 2745: /* *avx512f_ss_truncatev8div8hi2 */ |
| 7533 | case 2744: /* *avx512f_us_truncatev8div8si2 */ |
| 7534 | case 2743: /* *avx512f_truncatev8div8si2 */ |
| 7535 | case 2742: /* *avx512f_ss_truncatev8div8si2 */ |
| 7536 | case 2741: /* *avx512f_us_truncatev16siv16hi2 */ |
| 7537 | case 2740: /* *avx512f_truncatev16siv16hi2 */ |
| 7538 | case 2739: /* *avx512f_ss_truncatev16siv16hi2 */ |
| 7539 | case 2738: /* *avx512f_us_truncatev16siv16qi2 */ |
| 7540 | case 2737: /* *avx512f_truncatev16siv16qi2 */ |
| 7541 | case 2736: /* *avx512f_ss_truncatev16siv16qi2 */ |
| 7542 | case 2528: /* vec_extract_hi_v64qi */ |
| 7543 | case 2524: /* vec_extract_hi_v32hi */ |
| 7544 | case 2510: /* vec_extract_hi_v4df_mask */ |
| 7545 | case 2509: /* vec_extract_hi_v4df */ |
| 7546 | case 2508: /* vec_extract_hi_v4di_mask */ |
| 7547 | case 2507: /* vec_extract_hi_v4di */ |
| 7548 | case 2506: /* vec_extract_lo_v4df_mask */ |
| 7549 | case 2505: /* vec_extract_lo_v4df */ |
| 7550 | case 2504: /* vec_extract_lo_v4di_mask */ |
| 7551 | case 2503: /* vec_extract_lo_v4di */ |
| 7552 | case 1051: /* fnstsw */ |
| 7553 | extract_constrain_insn_cached (insn); |
| 7554 | if (which_alternative != 0) |
| 7555 | { |
| 7556 | return 2; |
| 7557 | } |
| 7558 | else |
| 7559 | { |
| 7560 | return 0; |
| 7561 | } |
| 7562 | |
| 7563 | case 4869: /* sha256rnds2 */ |
| 7564 | case 4868: /* sha256msg2 */ |
| 7565 | case 4867: /* sha256msg1 */ |
| 7566 | case 4866: /* sha1rnds4 */ |
| 7567 | case 4865: /* sha1nexte */ |
| 7568 | case 4864: /* sha1msg2 */ |
| 7569 | case 4863: /* sha1msg1 */ |
| 7570 | case 4838: /* avx512bw_dbpsadbwv32hi_mask */ |
| 7571 | case 4837: /* *avx512bw_dbpsadbwv32hi */ |
| 7572 | case 4836: /* avx512bw_dbpsadbwv16hi_mask */ |
| 7573 | case 4835: /* *avx512bw_dbpsadbwv16hi */ |
| 7574 | case 4834: /* avx512bw_dbpsadbwv8hi_mask */ |
| 7575 | case 4833: /* *avx512bw_dbpsadbwv8hi */ |
| 7576 | case 4432: /* avx2_maskstoreq256 */ |
| 7577 | case 4431: /* avx2_maskstored256 */ |
| 7578 | case 4430: /* avx2_maskstoreq */ |
| 7579 | case 4429: /* avx2_maskstored */ |
| 7580 | case 4428: /* avx_maskstorepd256 */ |
| 7581 | case 4427: /* avx_maskstoreps256 */ |
| 7582 | case 4426: /* avx_maskstorepd */ |
| 7583 | case 4425: /* avx_maskstoreps */ |
| 7584 | case 4424: /* avx2_maskloadq256 */ |
| 7585 | case 4423: /* avx2_maskloadd256 */ |
| 7586 | case 4422: /* avx2_maskloadq */ |
| 7587 | case 4421: /* avx2_maskloadd */ |
| 7588 | case 4420: /* avx_maskloadpd256 */ |
| 7589 | case 4419: /* avx_maskloadps256 */ |
| 7590 | case 4418: /* avx_maskloadpd */ |
| 7591 | case 4417: /* avx_maskloadps */ |
| 7592 | case 4110: /* avx2_vec_dupv4df */ |
| 7593 | case 4054: /* pclmulqdq */ |
| 7594 | case 4053: /* aeskeygenassist */ |
| 7595 | case 4052: /* aesimc */ |
| 7596 | case 4051: /* aesdeclast */ |
| 7597 | case 4050: /* aesdec */ |
| 7598 | case 4049: /* aesenclast */ |
| 7599 | case 4048: /* aesenc */ |
| 7600 | case 3801: /* sse4_1_phminposuw */ |
| 7601 | case 3788: /* sse4_1_mpsadbw */ |
| 7602 | case 3787: /* avx2_mpsadbw */ |
| 7603 | case 3763: /* absv2si2 */ |
| 7604 | case 3762: /* absv4hi2 */ |
| 7605 | case 3761: /* absv8qi2 */ |
| 7606 | case 3760: /* absv8hi2_mask */ |
| 7607 | case 3759: /* absv16hi2_mask */ |
| 7608 | case 3758: /* absv32hi2_mask */ |
| 7609 | case 3757: /* absv32qi2_mask */ |
| 7610 | case 3756: /* absv16qi2_mask */ |
| 7611 | case 3755: /* absv64qi2_mask */ |
| 7612 | case 3754: /* absv2di2_mask */ |
| 7613 | case 3753: /* absv4di2_mask */ |
| 7614 | case 3752: /* absv8di2_mask */ |
| 7615 | case 3751: /* absv4si2_mask */ |
| 7616 | case 3750: /* absv8si2_mask */ |
| 7617 | case 3749: /* absv16si2_mask */ |
| 7618 | case 3748: /* *absv2di2 */ |
| 7619 | case 3747: /* *absv4di2 */ |
| 7620 | case 3746: /* *absv8di2 */ |
| 7621 | case 3745: /* *absv4si2 */ |
| 7622 | case 3744: /* *absv8si2 */ |
| 7623 | case 3743: /* *absv16si2 */ |
| 7624 | case 3742: /* *absv8hi2 */ |
| 7625 | case 3741: /* *absv16hi2 */ |
| 7626 | case 3740: /* *absv32hi2 */ |
| 7627 | case 3739: /* *absv16qi2 */ |
| 7628 | case 3738: /* *absv32qi2 */ |
| 7629 | case 3737: /* *absv64qi2 */ |
| 7630 | case 3729: /* ssse3_psignv2si3 */ |
| 7631 | case 3728: /* ssse3_psignv4hi3 */ |
| 7632 | case 3727: /* ssse3_psignv8qi3 */ |
| 7633 | case 3726: /* ssse3_psignv4si3 */ |
| 7634 | case 3725: /* avx2_psignv8si3 */ |
| 7635 | case 3724: /* ssse3_psignv8hi3 */ |
| 7636 | case 3723: /* avx2_psignv16hi3 */ |
| 7637 | case 3722: /* ssse3_psignv16qi3 */ |
| 7638 | case 3721: /* avx2_psignv32qi3 */ |
| 7639 | case 3720: /* ssse3_pshufbv8qi3 */ |
| 7640 | case 3719: /* ssse3_pshufbv16qi3_mask */ |
| 7641 | case 3718: /* ssse3_pshufbv16qi3 */ |
| 7642 | case 3717: /* avx2_pshufbv32qi3_mask */ |
| 7643 | case 3716: /* avx2_pshufbv32qi3 */ |
| 7644 | case 3715: /* avx512bw_pshufbv64qi3_mask */ |
| 7645 | case 3714: /* avx512bw_pshufbv64qi3 */ |
| 7646 | case 3635: /* *vec_extractv4si_zext */ |
| 7647 | case 3626: /* *vec_extractv8hi_zext */ |
| 7648 | case 3625: /* *vec_extractv8hi_zext */ |
| 7649 | case 3624: /* *vec_extractv16qi_zext */ |
| 7650 | case 3623: /* *vec_extractv16qi_zext */ |
| 7651 | case 3622: /* *vec_extractv8hi */ |
| 7652 | case 3621: /* *vec_extractv16qi */ |
| 7653 | case 3607: /* sse2_pshufd_1_mask */ |
| 7654 | case 3606: /* sse2_pshufd_1 */ |
| 7655 | case 3605: /* avx2_pshufd_1_mask */ |
| 7656 | case 3604: /* avx2_pshufd_1 */ |
| 7657 | case 3603: /* avx512f_pshufd_1_mask */ |
| 7658 | case 3602: /* avx512f_pshufd_1 */ |
| 7659 | case 2734: /* vec_dupv2df_mask */ |
| 7660 | case 2733: /* vec_dupv2df */ |
| 7661 | case 2522: /* vec_extract_hi_v8sf */ |
| 7662 | case 2521: /* vec_extract_hi_v8si */ |
| 7663 | case 2520: /* vec_extract_hi_v8sf_mask */ |
| 7664 | case 2519: /* vec_extract_hi_v8si_mask */ |
| 7665 | case 2518: /* vec_extract_hi_v8sf_maskm */ |
| 7666 | case 2517: /* vec_extract_hi_v8si_maskm */ |
| 7667 | case 2516: /* vec_extract_lo_v8sf_maskm */ |
| 7668 | case 2515: /* vec_extract_lo_v8si_maskm */ |
| 7669 | case 2514: /* vec_extract_lo_v8sf_mask */ |
| 7670 | case 2513: /* vec_extract_lo_v8sf */ |
| 7671 | case 2512: /* vec_extract_lo_v8si_mask */ |
| 7672 | case 2511: /* vec_extract_lo_v8si */ |
| 7673 | case 2498: /* vec_extract_hi_v16si_mask */ |
| 7674 | case 2497: /* vec_extract_hi_v16si */ |
| 7675 | case 2496: /* vec_extract_hi_v16sf_mask */ |
| 7676 | case 2495: /* vec_extract_hi_v16sf */ |
| 7677 | case 2494: /* vec_extract_hi_v16si_maskm */ |
| 7678 | case 2493: /* vec_extract_hi_v16sf_maskm */ |
| 7679 | case 2492: /* vec_extract_hi_v8di_mask */ |
| 7680 | case 2491: /* vec_extract_hi_v8di */ |
| 7681 | case 2490: /* vec_extract_hi_v8df_mask */ |
| 7682 | case 2489: /* vec_extract_hi_v8df */ |
| 7683 | case 2486: /* vec_extract_lo_v8di_mask */ |
| 7684 | case 2485: /* vec_extract_lo_v8di */ |
| 7685 | case 2484: /* vec_extract_lo_v8df_mask */ |
| 7686 | case 2483: /* vec_extract_lo_v8df */ |
| 7687 | case 2482: /* vec_extract_lo_v8di_maskm */ |
| 7688 | case 2481: /* vec_extract_lo_v8df_maskm */ |
| 7689 | case 2480: /* avx512f_vextracti32x4_1_mask */ |
| 7690 | case 2479: /* *avx512f_vextracti32x4_1 */ |
| 7691 | case 2478: /* avx512f_vextractf32x4_1_mask */ |
| 7692 | case 2477: /* *avx512f_vextractf32x4_1 */ |
| 7693 | case 2476: /* avx512dq_vextracti64x2_1_mask */ |
| 7694 | case 2475: /* *avx512dq_vextracti64x2_1 */ |
| 7695 | case 2474: /* avx512dq_vextractf64x2_1_mask */ |
| 7696 | case 2473: /* *avx512dq_vextractf64x2_1 */ |
| 7697 | case 2458: /* avx512f_vec_dupv8df_1 */ |
| 7698 | case 2457: /* avx512f_vec_dupv16sf_1 */ |
| 7699 | case 2456: /* avx2_vec_dupv8sf_1 */ |
| 7700 | case 2455: /* avx2_vec_dupv4sf */ |
| 7701 | case 2454: /* avx2_vec_dupv8sf */ |
| 7702 | case 1020: /* sse4_2_crc32di */ |
| 7703 | case 1019: /* sse4_2_crc32si */ |
| 7704 | case 1018: /* sse4_2_crc32hi */ |
| 7705 | case 1017: /* sse4_2_crc32qi */ |
| 7706 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_BOTH) |
| 7707 | { |
| 7708 | return 3; |
| 7709 | } |
| 7710 | else if (cached_memory == MEMORY_STORE) |
| 7711 | { |
| 7712 | return 2; |
| 7713 | } |
| 7714 | else |
| 7715 | { |
| 7716 | return 0; |
| 7717 | } |
| 7718 | |
| 7719 | case 968: /* *strlenqi_1 */ |
| 7720 | case 967: /* *strlenqi_1 */ |
| 7721 | case 966: /* *cmpstrnqi_1 */ |
| 7722 | case 965: /* *cmpstrnqi_1 */ |
| 7723 | case 964: /* *cmpstrnqi_nz_1 */ |
| 7724 | case 963: /* *cmpstrnqi_nz_1 */ |
| 7725 | return 10 /* 0xa */; |
| 7726 | |
| 7727 | case 889: /* fistsi2_with_temp */ |
| 7728 | case 888: /* fisthi2_with_temp */ |
| 7729 | case 887: /* fistsi2 */ |
| 7730 | case 886: /* fisthi2 */ |
| 7731 | case 885: /* *fistsi2_1 */ |
| 7732 | case 884: /* *fisthi2_1 */ |
| 7733 | case 883: /* fistdi2_with_temp */ |
| 7734 | case 882: /* fistdi2 */ |
| 7735 | case 881: /* *fistdi2_1 */ |
| 7736 | case 880: /* rintdf2_frndint */ |
| 7737 | case 879: /* rintsf2_frndint */ |
| 7738 | case 878: /* rintxf2 */ |
| 7739 | case 875: /* fscalexf4_i387 */ |
| 7740 | case 874: /* *f2xm1xf2_i387 */ |
| 7741 | case 873: /* fxtract_extenddfxf3_i387 */ |
| 7742 | case 872: /* fxtract_extendsfxf3_i387 */ |
| 7743 | case 871: /* fxtractxf3_i387 */ |
| 7744 | case 870: /* fyl2xp1_extenddfxf3_i387 */ |
| 7745 | case 869: /* fyl2xp1_extendsfxf3_i387 */ |
| 7746 | case 868: /* fyl2xp1xf3_i387 */ |
| 7747 | case 867: /* fyl2x_extenddfxf3_i387 */ |
| 7748 | case 866: /* fyl2x_extendsfxf3_i387 */ |
| 7749 | case 865: /* fyl2xxf3_i387 */ |
| 7750 | case 864: /* fpatan_extenddfxf3_i387 */ |
| 7751 | case 863: /* fpatan_extendsfxf3_i387 */ |
| 7752 | case 862: /* *fpatanxf3_i387 */ |
| 7753 | case 861: /* fptan_extenddfxf4_i387 */ |
| 7754 | case 860: /* fptan_extendsfxf4_i387 */ |
| 7755 | case 859: /* fptanxf4_i387 */ |
| 7756 | case 858: /* sincos_extenddfxf3_i387 */ |
| 7757 | case 857: /* sincos_extendsfxf3_i387 */ |
| 7758 | case 856: /* sincosxf3 */ |
| 7759 | case 855: /* *cos_extenddfxf2_i387 */ |
| 7760 | case 854: /* *sin_extenddfxf2_i387 */ |
| 7761 | case 853: /* *cos_extendsfxf2_i387 */ |
| 7762 | case 852: /* *sin_extendsfxf2_i387 */ |
| 7763 | case 851: /* *cosxf2_i387 */ |
| 7764 | case 850: /* *sinxf2_i387 */ |
| 7765 | case 849: /* fprem1xf4_i387 */ |
| 7766 | case 848: /* fpremxf4_i387 */ |
| 7767 | case 844: /* sqrt_extenddfxf2_i387 */ |
| 7768 | case 843: /* sqrt_extendsfxf2_i387 */ |
| 7769 | case 842: /* sqrtxf2 */ |
| 7770 | return 56 /* 0x38 */; |
| 7771 | |
| 7772 | case 693: /* simple_return_indirect_internal */ |
| 7773 | case 663: /* *tablejump_1 */ |
| 7774 | case 662: /* *tablejump_1 */ |
| 7775 | case 661: /* *indirect_jump */ |
| 7776 | case 660: /* *indirect_jump */ |
| 7777 | extract_constrain_insn_cached (insn); |
| 7778 | if (! ( |
| 7779 | #line 12442 "/___NETBSD_SRC___/tools/gcc/../../external/gpl3/gcc/dist/gcc/config/i386/i386.md" |
| 7780 | ((cfun->machine->indirect_branch_type |
| 7781 | != indirect_branch_keep)))) |
| 7782 | { |
| 7783 | return 1; |
| 7784 | } |
| 7785 | else if (get_attr_memory (insn) == MEMORY_LOAD) |
| 7786 | { |
| 7787 | return 3; |
| 7788 | } |
| 7789 | else |
| 7790 | { |
| 7791 | return 0; |
| 7792 | } |
| 7793 | |
| 7794 | case 4043: /* xop_pcom_tfv2di3 */ |
| 7795 | case 4042: /* xop_pcom_tfv4si3 */ |
| 7796 | case 4041: /* xop_pcom_tfv8hi3 */ |
| 7797 | case 4040: /* xop_pcom_tfv16qi3 */ |
| 7798 | case 4039: /* xop_maskcmp_uns2v2di3 */ |
| 7799 | case 4038: /* xop_maskcmp_uns2v4si3 */ |
| 7800 | case 4037: /* xop_maskcmp_uns2v8hi3 */ |
| 7801 | case 4036: /* xop_maskcmp_uns2v16qi3 */ |
| 7802 | case 4035: /* xop_maskcmp_unsv2di3 */ |
| 7803 | case 4034: /* xop_maskcmp_unsv4si3 */ |
| 7804 | case 4033: /* xop_maskcmp_unsv8hi3 */ |
| 7805 | case 4032: /* xop_maskcmp_unsv16qi3 */ |
| 7806 | case 3890: /* ptesttf2 */ |
| 7807 | case 3889: /* avx_ptestv4df */ |
| 7808 | case 3888: /* avx_ptestv8sf */ |
| 7809 | case 3887: /* avx_ptestv4di */ |
| 7810 | case 3886: /* avx_ptestv8si */ |
| 7811 | case 3885: /* avx_ptestv16hi */ |
| 7812 | case 3884: /* avx_ptestv32qi */ |
| 7813 | case 3883: /* sse4_1_ptestv2df */ |
| 7814 | case 3882: /* sse4_1_ptestv4sf */ |
| 7815 | case 3881: /* sse4_1_ptestv2di */ |
| 7816 | case 3880: /* sse4_1_ptestv4si */ |
| 7817 | case 3879: /* sse4_1_ptestv8hi */ |
| 7818 | case 3878: /* sse4_1_ptestv16qi */ |
| 7819 | case 3877: /* avx_vtestpd */ |
| 7820 | case 3876: /* avx_vtestpd256 */ |
| 7821 | case 3875: /* avx_vtestps */ |
| 7822 | case 3874: /* avx_vtestps256 */ |
| 7823 | case 3383: /* sse2_gtv4si3 */ |
| 7824 | case 3382: /* sse2_gtv8hi3 */ |
| 7825 | case 3381: /* sse2_gtv16qi3 */ |
| 7826 | case 3380: /* avx512vl_gtv8hi3_mask */ |
| 7827 | case 3379: /* avx512vl_gtv8hi3 */ |
| 7828 | case 3378: /* avx512vl_gtv16hi3_mask */ |
| 7829 | case 3377: /* avx512vl_gtv16hi3 */ |
| 7830 | case 3376: /* avx512bw_gtv32hi3_mask */ |
| 7831 | case 3375: /* avx512bw_gtv32hi3 */ |
| 7832 | case 3374: /* avx512vl_gtv32qi3_mask */ |
| 7833 | case 3373: /* avx512vl_gtv32qi3 */ |
| 7834 | case 3372: /* avx512vl_gtv16qi3_mask */ |
| 7835 | case 3371: /* avx512vl_gtv16qi3 */ |
| 7836 | case 3370: /* avx512bw_gtv64qi3_mask */ |
| 7837 | case 3369: /* avx512bw_gtv64qi3 */ |
| 7838 | case 3368: /* avx512vl_gtv2di3_mask */ |
| 7839 | case 3367: /* avx512vl_gtv2di3 */ |
| 7840 | case 3366: /* avx512vl_gtv4di3_mask */ |
| 7841 | case 3365: /* avx512vl_gtv4di3 */ |
| 7842 | case 3364: /* avx512f_gtv8di3_mask */ |
| 7843 | case 3363: /* avx512f_gtv8di3 */ |
| 7844 | case 3362: /* avx512vl_gtv4si3_mask */ |
| 7845 | case 3361: /* avx512vl_gtv4si3 */ |
| 7846 | case 3360: /* avx512vl_gtv8si3_mask */ |
| 7847 | case 3359: /* avx512vl_gtv8si3 */ |
| 7848 | case 3358: /* avx512f_gtv16si3_mask */ |
| 7849 | case 3357: /* avx512f_gtv16si3 */ |
| 7850 | case 3356: /* avx2_gtv4di3 */ |
| 7851 | case 3355: /* avx2_gtv8si3 */ |
| 7852 | case 3354: /* avx2_gtv16hi3 */ |
| 7853 | case 3353: /* avx2_gtv32qi3 */ |
| 7854 | case 3352: /* sse4_2_gtv2di3 */ |
| 7855 | case 3351: /* *sse2_eqv4si3 */ |
| 7856 | case 3350: /* *sse2_eqv8hi3 */ |
| 7857 | case 3349: /* *sse2_eqv16qi3 */ |
| 7858 | case 3348: /* *sse4_1_eqv2di3 */ |
| 7859 | case 3347: /* avx512vl_eqv2di3_mask_1 */ |
| 7860 | case 3346: /* avx512vl_eqv2di3_1 */ |
| 7861 | case 3345: /* avx512vl_eqv4di3_mask_1 */ |
| 7862 | case 3344: /* avx512vl_eqv4di3_1 */ |
| 7863 | case 3343: /* avx512f_eqv8di3_mask_1 */ |
| 7864 | case 3342: /* avx512f_eqv8di3_1 */ |
| 7865 | case 3341: /* avx512vl_eqv4si3_mask_1 */ |
| 7866 | case 3340: /* avx512vl_eqv4si3_1 */ |
| 7867 | case 3339: /* avx512vl_eqv8si3_mask_1 */ |
| 7868 | case 3338: /* avx512vl_eqv8si3_1 */ |
| 7869 | case 3337: /* avx512f_eqv16si3_mask_1 */ |
| 7870 | case 3336: /* avx512f_eqv16si3_1 */ |
| 7871 | case 3335: /* avx512vl_eqv8hi3_mask_1 */ |
| 7872 | case 3334: /* avx512vl_eqv8hi3_1 */ |
| 7873 | case 3333: /* avx512vl_eqv16hi3_mask_1 */ |
| 7874 | case 3332: /* avx512vl_eqv16hi3_1 */ |
| 7875 | case 3331: /* avx512bw_eqv32hi3_mask_1 */ |
| 7876 | case 3330: /* avx512bw_eqv32hi3_1 */ |
| 7877 | case 3329: /* avx512vl_eqv32qi3_mask_1 */ |
| 7878 | case 3328: /* avx512vl_eqv32qi3_1 */ |
| 7879 | case 3327: /* avx512vl_eqv16qi3_mask_1 */ |
| 7880 | case 3326: /* avx512vl_eqv16qi3_1 */ |
| 7881 | case 3325: /* avx512bw_eqv64qi3_mask_1 */ |
| 7882 | case 3324: /* avx512bw_eqv64qi3_1 */ |
| 7883 | case 3323: /* *avx2_eqv4di3 */ |
| 7884 | case 3322: /* *avx2_eqv8si3 */ |
| 7885 | case 3321: /* *avx2_eqv16hi3 */ |
| 7886 | case 3320: /* *avx2_eqv32qi3 */ |
| 7887 | case 1740: /* sse2_ucomi_round */ |
| 7888 | case 1739: /* sse2_ucomi */ |
| 7889 | case 1738: /* sse_ucomi_round */ |
| 7890 | case 1737: /* sse_ucomi */ |
| 7891 | case 1736: /* sse2_comi_round */ |
| 7892 | case 1735: /* sse2_comi */ |
| 7893 | case 1734: /* sse_comi_round */ |
| 7894 | case 1733: /* sse_comi */ |
| 7895 | case 1732: /* avx512f_maskcmpv2df3 */ |
| 7896 | case 1731: /* avx512f_maskcmpv4df3 */ |
| 7897 | case 1730: /* avx512f_maskcmpv8df3 */ |
| 7898 | case 1729: /* avx512f_maskcmpv4sf3 */ |
| 7899 | case 1728: /* avx512f_maskcmpv8sf3 */ |
| 7900 | case 1727: /* avx512f_maskcmpv16sf3 */ |
| 7901 | case 1726: /* avx512f_vmcmpv2df3_mask_round */ |
| 7902 | case 1725: /* avx512f_vmcmpv2df3_mask */ |
| 7903 | case 1724: /* avx512f_vmcmpv4sf3_mask_round */ |
| 7904 | case 1723: /* avx512f_vmcmpv4sf3_mask */ |
| 7905 | case 1722: /* avx512f_vmcmpv2df3_round */ |
| 7906 | case 1721: /* avx512f_vmcmpv2df3 */ |
| 7907 | case 1720: /* avx512f_vmcmpv4sf3_round */ |
| 7908 | case 1719: /* avx512f_vmcmpv4sf3 */ |
| 7909 | case 1718: /* avx512vl_ucmpv2di3_mask */ |
| 7910 | case 1717: /* avx512vl_ucmpv2di3 */ |
| 7911 | case 1716: /* avx512vl_ucmpv4di3_mask */ |
| 7912 | case 1715: /* avx512vl_ucmpv4di3 */ |
| 7913 | case 1714: /* avx512f_ucmpv8di3_mask */ |
| 7914 | case 1713: /* avx512f_ucmpv8di3 */ |
| 7915 | case 1712: /* avx512vl_ucmpv4si3_mask */ |
| 7916 | case 1711: /* avx512vl_ucmpv4si3 */ |
| 7917 | case 1710: /* avx512vl_ucmpv8si3_mask */ |
| 7918 | case 1709: /* avx512vl_ucmpv8si3 */ |
| 7919 | case 1708: /* avx512f_ucmpv16si3_mask */ |
| 7920 | case 1707: /* avx512f_ucmpv16si3 */ |
| 7921 | case 1706: /* avx512vl_ucmpv8hi3_mask */ |
| 7922 | case 1705: /* avx512vl_ucmpv8hi3 */ |
| 7923 | case 1704: /* avx512vl_ucmpv16hi3_mask */ |
| 7924 | case 1703: /* avx512vl_ucmpv16hi3 */ |
| 7925 | case 1702: /* avx512bw_ucmpv32hi3_mask */ |
| 7926 | case 1701: /* avx512bw_ucmpv32hi3 */ |
| 7927 | case 1700: /* avx512vl_ucmpv32qi3_mask */ |
| 7928 | case 1699: /* avx512vl_ucmpv32qi3 */ |
| 7929 | case 1698: /* avx512vl_ucmpv16qi3_mask */ |
| 7930 | case 1697: /* avx512vl_ucmpv16qi3 */ |
| 7931 | case 1696: /* avx512bw_ucmpv64qi3_mask */ |
| 7932 | case 1695: /* avx512bw_ucmpv64qi3 */ |
| 7933 | case 1694: /* avx512vl_cmpv8hi3_mask */ |
| 7934 | case 1693: /* avx512vl_cmpv8hi3 */ |
| 7935 | case 1692: /* avx512vl_cmpv16hi3_mask */ |
| 7936 | case 1691: /* avx512vl_cmpv16hi3 */ |
| 7937 | case 1690: /* avx512bw_cmpv32hi3_mask */ |
| 7938 | case 1689: /* avx512bw_cmpv32hi3 */ |
| 7939 | case 1688: /* avx512vl_cmpv32qi3_mask */ |
| 7940 | case 1687: /* avx512vl_cmpv32qi3 */ |
| 7941 | case 1686: /* avx512vl_cmpv16qi3_mask */ |
| 7942 | case 1685: /* avx512vl_cmpv16qi3 */ |
| 7943 | case 1684: /* avx512bw_cmpv64qi3_mask */ |
| 7944 | case 1683: /* avx512bw_cmpv64qi3 */ |
| 7945 | case 1682: /* avx512vl_cmpv2df3_mask */ |
| 7946 | case 1681: /* avx512vl_cmpv2df3 */ |
| 7947 | case 1680: /* avx512vl_cmpv4df3_mask */ |
| 7948 | case 1679: /* avx512vl_cmpv4df3 */ |
| 7949 | case 1678: /* avx512f_cmpv8df3_mask_round */ |
| 7950 | case 1677: /* avx512f_cmpv8df3_round */ |
| 7951 | case 1676: /* avx512f_cmpv8df3_mask */ |
| 7952 | case 1675: /* avx512f_cmpv8df3 */ |
| 7953 | case 1674: /* avx512vl_cmpv4sf3_mask */ |
| 7954 | case 1673: /* avx512vl_cmpv4sf3 */ |
| 7955 | case 1672: /* avx512vl_cmpv8sf3_mask */ |
| 7956 | case 1671: /* avx512vl_cmpv8sf3 */ |
| 7957 | case 1670: /* avx512f_cmpv16sf3_mask_round */ |
| 7958 | case 1669: /* avx512f_cmpv16sf3_round */ |
| 7959 | case 1668: /* avx512f_cmpv16sf3_mask */ |
| 7960 | case 1667: /* avx512f_cmpv16sf3 */ |
| 7961 | case 1666: /* avx512vl_cmpv2di3_mask */ |
| 7962 | case 1665: /* avx512vl_cmpv2di3 */ |
| 7963 | case 1664: /* avx512vl_cmpv4di3_mask */ |
| 7964 | case 1663: /* avx512vl_cmpv4di3 */ |
| 7965 | case 1662: /* avx512f_cmpv8di3_mask_round */ |
| 7966 | case 1661: /* avx512f_cmpv8di3_round */ |
| 7967 | case 1660: /* avx512f_cmpv8di3_mask */ |
| 7968 | case 1659: /* avx512f_cmpv8di3 */ |
| 7969 | case 1658: /* avx512vl_cmpv4si3_mask */ |
| 7970 | case 1657: /* avx512vl_cmpv4si3 */ |
| 7971 | case 1656: /* avx512vl_cmpv8si3_mask */ |
| 7972 | case 1655: /* avx512vl_cmpv8si3 */ |
| 7973 | case 1654: /* avx512f_cmpv16si3_mask_round */ |
| 7974 | case 1653: /* avx512f_cmpv16si3_round */ |
| 7975 | case 1652: /* avx512f_cmpv16si3_mask */ |
| 7976 | case 1651: /* avx512f_cmpv16si3 */ |
| 7977 | case 1650: /* sse2_vmmaskcmpv2df3 */ |
| 7978 | case 1649: /* sse_vmmaskcmpv4sf3 */ |
| 7979 | case 1648: /* sse2_maskcmpv2df3 */ |
| 7980 | case 1647: /* avx_maskcmpv4df3 */ |
| 7981 | case 1646: /* sse_maskcmpv4sf3 */ |
| 7982 | case 1645: /* avx_maskcmpv8sf3 */ |
| 7983 | case 1644: /* *sse2_maskcmpv2df3_comm */ |
| 7984 | case 1643: /* *avx_maskcmpv4df3_comm */ |
| 7985 | case 1642: /* *sse_maskcmpv4sf3_comm */ |
| 7986 | case 1641: /* *avx_maskcmpv8sf3_comm */ |
| 7987 | case 1640: /* avx_vmcmpv2df3 */ |
| 7988 | case 1639: /* avx_vmcmpv4sf3 */ |
| 7989 | case 1638: /* avx_cmpv2df3 */ |
| 7990 | case 1637: /* avx_cmpv4df3 */ |
| 7991 | case 1636: /* avx_cmpv4sf3 */ |
| 7992 | case 1635: /* avx_cmpv8sf3 */ |
| 7993 | case 1178: /* mmx_gtv2si3 */ |
| 7994 | case 1177: /* mmx_gtv4hi3 */ |
| 7995 | case 1176: /* mmx_gtv8qi3 */ |
| 7996 | case 1175: /* *mmx_eqv2si3 */ |
| 7997 | case 1174: /* *mmx_eqv4hi3 */ |
| 7998 | case 1173: /* *mmx_eqv8qi3 */ |
| 7999 | case 1129: /* mmx_gev2sf3 */ |
| 8000 | case 1128: /* mmx_gtv2sf3 */ |
| 8001 | case 1127: /* *mmx_eqv2sf3 */ |
| 8002 | case 626: /* setcc_df_sse */ |
| 8003 | case 625: /* setcc_sf_sse */ |
| 8004 | if (get_attr_memory (insn) == MEMORY_LOAD) |
| 8005 | { |
| 8006 | return 3; |
| 8007 | } |
| 8008 | else |
| 8009 | { |
| 8010 | return 0; |
| 8011 | } |
| 8012 | |
| 8013 | case 624: /* *setcc_qi_slp */ |
| 8014 | case 623: /* *setcc_qi */ |
| 8015 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) |
| 8016 | { |
| 8017 | return 1; |
| 8018 | } |
| 8019 | else if (cached_memory == MEMORY_STORE) |
| 8020 | { |
| 8021 | return 3; |
| 8022 | } |
| 8023 | else |
| 8024 | { |
| 8025 | return 0; |
| 8026 | } |
| 8027 | |
| 8028 | case 123: /* *pushsf */ |
| 8029 | case 122: /* *pushsf_rex64 */ |
| 8030 | extract_constrain_insn_cached (insn); |
| 8031 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_BOTH) |
| 8032 | { |
| 8033 | return 3; |
| 8034 | } |
| 8035 | else if ((which_alternative == 1) || (cached_memory == MEMORY_STORE)) |
| 8036 | { |
| 8037 | return 2; |
| 8038 | } |
| 8039 | else |
| 8040 | { |
| 8041 | return 0; |
| 8042 | } |
| 8043 | |
| 8044 | case 4758: /* avx512vl_compressstorev2df_mask */ |
| 8045 | case 4757: /* avx512vl_compressstorev2di_mask */ |
| 8046 | case 4756: /* avx512vl_compressstorev4sf_mask */ |
| 8047 | case 4755: /* avx512vl_compressstorev4si_mask */ |
| 8048 | case 4754: /* avx512vl_compressstorev4df_mask */ |
| 8049 | case 4753: /* avx512vl_compressstorev4di_mask */ |
| 8050 | case 4752: /* avx512vl_compressstorev8sf_mask */ |
| 8051 | case 4751: /* avx512vl_compressstorev8si_mask */ |
| 8052 | case 4750: /* avx512f_compressstorev8df_mask */ |
| 8053 | case 4749: /* avx512f_compressstorev8di_mask */ |
| 8054 | case 4748: /* avx512f_compressstorev16sf_mask */ |
| 8055 | case 4747: /* avx512f_compressstorev16si_mask */ |
| 8056 | case 3673: /* sse_stmxcsr */ |
| 8057 | case 2933: /* avx512f_us_truncatev8div16qi2_mask_store */ |
| 8058 | case 2932: /* avx512f_truncatev8div16qi2_mask_store */ |
| 8059 | case 2931: /* avx512f_ss_truncatev8div16qi2_mask_store */ |
| 8060 | case 2924: /* *avx512f_us_truncatev8div16qi2_store */ |
| 8061 | case 2923: /* *avx512f_truncatev8div16qi2_store */ |
| 8062 | case 2922: /* *avx512f_ss_truncatev8div16qi2_store */ |
| 8063 | case 2918: /* avx512vl_us_truncatev2div2si2_mask_store */ |
| 8064 | case 2917: /* avx512vl_truncatev2div2si2_mask_store */ |
| 8065 | case 2916: /* avx512vl_ss_truncatev2div2si2_mask_store */ |
| 8066 | case 2909: /* *avx512vl_us_truncatev2div2si2_store */ |
| 8067 | case 2908: /* *avx512vl_truncatev2div2si2_store */ |
| 8068 | case 2907: /* *avx512vl_ss_truncatev2div2si2_store */ |
| 8069 | case 2903: /* avx512vl_us_truncatev2div2hi2_mask_store */ |
| 8070 | case 2902: /* avx512vl_truncatev2div2hi2_mask_store */ |
| 8071 | case 2901: /* avx512vl_ss_truncatev2div2hi2_mask_store */ |
| 8072 | case 2894: /* *avx512vl_us_truncatev2div2hi2_store */ |
| 8073 | case 2893: /* *avx512vl_truncatev2div2hi2_store */ |
| 8074 | case 2892: /* *avx512vl_ss_truncatev2div2hi2_store */ |
| 8075 | case 2891: /* avx512vl_us_truncatev4div4hi2_mask_store */ |
| 8076 | case 2890: /* avx512vl_truncatev4div4hi2_mask_store */ |
| 8077 | case 2889: /* avx512vl_ss_truncatev4div4hi2_mask_store */ |
| 8078 | case 2888: /* avx512vl_us_truncatev4siv4hi2_mask_store */ |
| 8079 | case 2887: /* avx512vl_truncatev4siv4hi2_mask_store */ |
| 8080 | case 2886: /* avx512vl_ss_truncatev4siv4hi2_mask_store */ |
| 8081 | case 2873: /* *avx512vl_us_truncatev4div4hi2_store */ |
| 8082 | case 2872: /* *avx512vl_truncatev4div4hi2_store */ |
| 8083 | case 2871: /* *avx512vl_ss_truncatev4div4hi2_store */ |
| 8084 | case 2870: /* *avx512vl_us_truncatev4siv4hi2_store */ |
| 8085 | case 2869: /* *avx512vl_truncatev4siv4hi2_store */ |
| 8086 | case 2868: /* *avx512vl_ss_truncatev4siv4hi2_store */ |
| 8087 | case 2858: /* avx512vl_us_truncatev8siv8qi2_mask_store */ |
| 8088 | case 2857: /* avx512vl_truncatev8siv8qi2_mask_store */ |
| 8089 | case 2856: /* avx512vl_ss_truncatev8siv8qi2_mask_store */ |
| 8090 | case 2855: /* avx512vl_us_truncatev8hiv8qi2_mask_store */ |
| 8091 | case 2854: /* avx512vl_truncatev8hiv8qi2_mask_store */ |
| 8092 | case 2853: /* avx512vl_ss_truncatev8hiv8qi2_mask_store */ |
| 8093 | case 2840: /* *avx512vl_us_truncatev8siv8qi2_store */ |
| 8094 | case 2839: /* *avx512vl_truncatev8siv8qi2_store */ |
| 8095 | case 2838: /* *avx512vl_ss_truncatev8siv8qi2_store */ |
| 8096 | case 2837: /* *avx512vl_us_truncatev8hiv8qi2_store */ |
| 8097 | case 2836: /* *avx512vl_truncatev8hiv8qi2_store */ |
| 8098 | case 2835: /* *avx512vl_ss_truncatev8hiv8qi2_store */ |
| 8099 | case 2834: /* avx512vl_us_truncatev4div4qi2_mask_store */ |
| 8100 | case 2833: /* avx512vl_truncatev4div4qi2_mask_store */ |
| 8101 | case 2832: /* avx512vl_ss_truncatev4div4qi2_mask_store */ |
| 8102 | case 2831: /* avx512vl_us_truncatev4siv4qi2_mask_store */ |
| 8103 | case 2830: /* avx512vl_truncatev4siv4qi2_mask_store */ |
| 8104 | case 2829: /* avx512vl_ss_truncatev4siv4qi2_mask_store */ |
| 8105 | case 2816: /* *avx512vl_us_truncatev4div4qi2_store */ |
| 8106 | case 2815: /* *avx512vl_truncatev4div4qi2_store */ |
| 8107 | case 2814: /* *avx512vl_ss_truncatev4div4qi2_store */ |
| 8108 | case 2813: /* *avx512vl_us_truncatev4siv4qi2_store */ |
| 8109 | case 2812: /* *avx512vl_truncatev4siv4qi2_store */ |
| 8110 | case 2811: /* *avx512vl_ss_truncatev4siv4qi2_store */ |
| 8111 | case 2810: /* avx512vl_us_truncatev2div2qi2_mask_store */ |
| 8112 | case 2809: /* avx512vl_truncatev2div2qi2_mask_store */ |
| 8113 | case 2808: /* avx512vl_ss_truncatev2div2qi2_mask_store */ |
| 8114 | case 2801: /* *avx512vl_us_truncatev2div2qi2_store */ |
| 8115 | case 2800: /* *avx512vl_truncatev2div2qi2_store */ |
| 8116 | case 2799: /* *avx512vl_ss_truncatev2div2qi2_store */ |
| 8117 | case 2488: /* vec_extract_hi_v8di_maskm */ |
| 8118 | case 2487: /* vec_extract_hi_v8df_maskm */ |
| 8119 | case 2472: /* avx512f_vextracti32x4_1_maskm */ |
| 8120 | case 2471: /* avx512f_vextractf32x4_1_maskm */ |
| 8121 | case 2470: /* avx512dq_vextracti64x2_1_maskm */ |
| 8122 | case 2469: /* avx512dq_vextractf64x2_1_maskm */ |
| 8123 | case 1292: /* avx512vl_storev8hi_mask */ |
| 8124 | case 1291: /* avx512vl_storev16hi_mask */ |
| 8125 | case 1290: /* avx512bw_storev32hi_mask */ |
| 8126 | case 1289: /* avx512vl_storev32qi_mask */ |
| 8127 | case 1288: /* avx512vl_storev16qi_mask */ |
| 8128 | case 1287: /* avx512bw_storev64qi_mask */ |
| 8129 | case 1286: /* avx512vl_storev2df_mask */ |
| 8130 | case 1285: /* avx512vl_storev4df_mask */ |
| 8131 | case 1284: /* avx512f_storev8df_mask */ |
| 8132 | case 1283: /* avx512vl_storev4sf_mask */ |
| 8133 | case 1282: /* avx512vl_storev8sf_mask */ |
| 8134 | case 1281: /* avx512f_storev16sf_mask */ |
| 8135 | case 1280: /* avx512vl_storev2di_mask */ |
| 8136 | case 1279: /* avx512vl_storev4di_mask */ |
| 8137 | case 1278: /* avx512f_storev8di_mask */ |
| 8138 | case 1277: /* avx512vl_storev4si_mask */ |
| 8139 | case 1276: /* avx512vl_storev8si_mask */ |
| 8140 | case 1275: /* avx512f_storev16si_mask */ |
| 8141 | case 1100: /* *bnd64_stx */ |
| 8142 | case 1099: /* *bnd32_stx */ |
| 8143 | case 1049: /* fnstenv */ |
| 8144 | case 1042: /* xsaves64 */ |
| 8145 | case 1041: /* xsavec64 */ |
| 8146 | case 1040: /* xsaveopt64 */ |
| 8147 | case 1039: /* xsave64 */ |
| 8148 | case 1038: /* xsaves_rex64 */ |
| 8149 | case 1037: /* xsavec_rex64 */ |
| 8150 | case 1036: /* xsaveopt_rex64 */ |
| 8151 | case 1035: /* xsave_rex64 */ |
| 8152 | case 1034: /* xsaves */ |
| 8153 | case 1033: /* xsavec */ |
| 8154 | case 1032: /* xsaveopt */ |
| 8155 | case 1031: /* xsave */ |
| 8156 | case 1028: /* fxsave64 */ |
| 8157 | case 1027: /* fxsave */ |
| 8158 | case 962: /* *rep_stosqi */ |
| 8159 | case 961: /* *rep_stosqi */ |
| 8160 | case 960: /* *rep_stossi */ |
| 8161 | case 959: /* *rep_stossi */ |
| 8162 | case 958: /* *rep_stosdi_rex64 */ |
| 8163 | case 957: /* *rep_stosdi_rex64 */ |
| 8164 | case 956: /* *strsetqi_1 */ |
| 8165 | case 955: /* *strsetqi_1 */ |
| 8166 | case 954: /* *strsethi_1 */ |
| 8167 | case 953: /* *strsethi_1 */ |
| 8168 | case 952: /* *strsetsi_1 */ |
| 8169 | case 951: /* *strsetsi_1 */ |
| 8170 | case 950: /* *strsetdi_rex_1 */ |
| 8171 | case 949: /* *strsetdi_rex_1 */ |
| 8172 | case 809: /* *tls_dynamic_gnu2_lea_64 */ |
| 8173 | case 806: /* *tls_dynamic_gnu2_lea_32 */ |
| 8174 | case 801: /* *load_tp_di */ |
| 8175 | case 800: /* *load_tp_si */ |
| 8176 | case 799: /* *load_tp_x32_zext */ |
| 8177 | case 798: /* *load_tp_x32 */ |
| 8178 | case 700: /* set_rip_rex64 */ |
| 8179 | case 699: /* set_got_rex64 */ |
| 8180 | case 366: /* *umulsi3_highpart_1 */ |
| 8181 | case 365: /* *smulsi3_highpart_1 */ |
| 8182 | case 364: /* *umulsi3_highpart_zext */ |
| 8183 | case 363: /* *smulsi3_highpart_zext */ |
| 8184 | case 362: /* *umuldi3_highpart_1 */ |
| 8185 | case 361: /* *smuldi3_highpart_1 */ |
| 8186 | case 360: /* *umulqihi3_1 */ |
| 8187 | case 359: /* *mulqihi3_1 */ |
| 8188 | case 358: /* *mulditi3_1 */ |
| 8189 | case 357: /* *mulsidi3_1 */ |
| 8190 | case 352: /* *umulvqi4 */ |
| 8191 | case 351: /* *mulvqi4 */ |
| 8192 | case 350: /* *umulvdi4 */ |
| 8193 | case 349: /* *umulvsi4 */ |
| 8194 | case 348: /* *umulvhi4 */ |
| 8195 | case 347: /* *mulvdi4_1 */ |
| 8196 | case 346: /* *mulvsi4_1 */ |
| 8197 | case 345: /* *mulvhi4_1 */ |
| 8198 | case 344: /* *mulvhi4 */ |
| 8199 | case 343: /* *mulvdi4 */ |
| 8200 | case 342: /* *mulvsi4 */ |
| 8201 | case 341: /* *mulqi3_1 */ |
| 8202 | case 340: /* *mulsi3_1_zext */ |
| 8203 | case 339: /* *muldi3_1 */ |
| 8204 | case 338: /* *mulsi3_1 */ |
| 8205 | case 337: /* *mulhi3_1 */ |
| 8206 | case 268: /* *leadi_general_4 */ |
| 8207 | case 267: /* *leadi_general_4 */ |
| 8208 | case 266: /* *leasi_general_4 */ |
| 8209 | case 265: /* *leasi_general_4 */ |
| 8210 | case 264: /* *leahi_general_4 */ |
| 8211 | case 263: /* *leahi_general_4 */ |
| 8212 | case 262: /* *leaqi_general_4 */ |
| 8213 | case 261: /* *leaqi_general_4 */ |
| 8214 | case 260: /* *leahi_general_3b */ |
| 8215 | case 259: /* *leaqi_general_3b */ |
| 8216 | case 258: /* *leahi_general_3 */ |
| 8217 | case 257: /* *leaqi_general_3 */ |
| 8218 | case 256: /* *leahi_general_2b */ |
| 8219 | case 255: /* *leaqi_general_2b */ |
| 8220 | case 254: /* *leahi_general_2 */ |
| 8221 | case 253: /* *leaqi_general_2 */ |
| 8222 | case 252: /* *leahi_general_1 */ |
| 8223 | case 251: /* *leaqi_general_1 */ |
| 8224 | case 214: /* *leadi */ |
| 8225 | case 213: /* *leasi */ |
| 8226 | case 92: /* *movabsdi_2 */ |
| 8227 | case 91: /* *movabssi_2 */ |
| 8228 | case 90: /* *movabshi_2 */ |
| 8229 | case 89: /* *movabsqi_2 */ |
| 8230 | return 2; |
| 8231 | |
| 8232 | case 974: /* *x86_movdicc_0_m1_neg */ |
| 8233 | case 973: /* *x86_movsicc_0_m1_neg */ |
| 8234 | case 972: /* *x86_movdicc_0_m1_se */ |
| 8235 | case 971: /* *x86_movsicc_0_m1_se */ |
| 8236 | case 970: /* *x86_movdicc_0_m1 */ |
| 8237 | case 969: /* *x86_movsicc_0_m1 */ |
| 8238 | case 810: /* *tls_dynamic_gnu2_call_64 */ |
| 8239 | case 807: /* *tls_dynamic_gnu2_call_32 */ |
| 8240 | case 685: /* *sibcall_value_pop_memory */ |
| 8241 | case 684: /* *sibcall_value_pop */ |
| 8242 | case 683: /* *call_value_pop */ |
| 8243 | case 682: /* *sibcall_value_memory */ |
| 8244 | case 681: /* *sibcall_value_memory */ |
| 8245 | case 680: /* *sibcall_value */ |
| 8246 | case 679: /* *sibcall_value */ |
| 8247 | case 678: /* *sibcall_value_GOT_32 */ |
| 8248 | case 677: /* *call_value_got_x32 */ |
| 8249 | case 676: /* *call_value */ |
| 8250 | case 675: /* *call_value */ |
| 8251 | case 674: /* *sibcall_pop_memory */ |
| 8252 | case 673: /* *sibcall_pop */ |
| 8253 | case 672: /* *call_pop */ |
| 8254 | case 671: /* *sibcall_memory */ |
| 8255 | case 670: /* *sibcall_memory */ |
| 8256 | case 669: /* *sibcall */ |
| 8257 | case 668: /* *sibcall */ |
| 8258 | case 667: /* *sibcall_GOT_32 */ |
| 8259 | case 666: /* *call_got_x32 */ |
| 8260 | case 665: /* *call */ |
| 8261 | case 664: /* *call */ |
| 8262 | case 659: /* jump */ |
| 8263 | case 628: /* *jcc_2 */ |
| 8264 | case 627: /* *jcc_1 */ |
| 8265 | case 88: /* *movabsdi_1 */ |
| 8266 | case 87: /* *movabssi_1 */ |
| 8267 | case 86: /* *movabshi_1 */ |
| 8268 | case 85: /* *movabsqi_1 */ |
| 8269 | return 1; |
| 8270 | |
| 8271 | case 3672: /* sse_ldmxcsr */ |
| 8272 | case 1098: /* *bnd64_ldx */ |
| 8273 | case 1097: /* *bnd32_ldx */ |
| 8274 | case 1050: /* fldenv */ |
| 8275 | case 1048: /* xrstors64 */ |
| 8276 | case 1047: /* xrstor64 */ |
| 8277 | case 1046: /* xrstors_rex64 */ |
| 8278 | case 1045: /* xrstor_rex64 */ |
| 8279 | case 1044: /* xrstors */ |
| 8280 | case 1043: /* xrstor */ |
| 8281 | case 1030: /* fxrstor64 */ |
| 8282 | case 1029: /* fxrstor */ |
| 8283 | case 948: /* *rep_movqi */ |
| 8284 | case 947: /* *rep_movqi */ |
| 8285 | case 946: /* *rep_movsi */ |
| 8286 | case 945: /* *rep_movsi */ |
| 8287 | case 944: /* *rep_movdi_rex64 */ |
| 8288 | case 943: /* *rep_movdi_rex64 */ |
| 8289 | case 942: /* *strmovqi_1 */ |
| 8290 | case 941: /* *strmovqi_1 */ |
| 8291 | case 940: /* *strmovhi_1 */ |
| 8292 | case 939: /* *strmovhi_1 */ |
| 8293 | case 938: /* *strmovsi_1 */ |
| 8294 | case 937: /* *strmovsi_1 */ |
| 8295 | case 936: /* *strmovdi_rex_1 */ |
| 8296 | case 935: /* *strmovdi_rex_1 */ |
| 8297 | case 927: /* fistsi2_ceil_with_temp */ |
| 8298 | case 926: /* fistsi2_floor_with_temp */ |
| 8299 | case 925: /* fisthi2_ceil_with_temp */ |
| 8300 | case 924: /* fisthi2_floor_with_temp */ |
| 8301 | case 923: /* fistsi2_ceil */ |
| 8302 | case 922: /* fistsi2_floor */ |
| 8303 | case 921: /* fisthi2_ceil */ |
| 8304 | case 920: /* fisthi2_floor */ |
| 8305 | case 919: /* fistdi2_ceil_with_temp */ |
| 8306 | case 918: /* fistdi2_floor_with_temp */ |
| 8307 | case 917: /* fistdi2_ceil */ |
| 8308 | case 916: /* fistdi2_floor */ |
| 8309 | case 915: /* *fistdi2_ceil_1 */ |
| 8310 | case 914: /* *fistdi2_floor_1 */ |
| 8311 | case 913: /* *fistsi2_ceil_1 */ |
| 8312 | case 912: /* *fistsi2_floor_1 */ |
| 8313 | case 911: /* *fisthi2_ceil_1 */ |
| 8314 | case 910: /* *fisthi2_floor_1 */ |
| 8315 | case 909: /* frndintxf2_mask_pm_i387 */ |
| 8316 | case 908: /* frndintxf2_mask_pm */ |
| 8317 | case 907: /* frndintxf2_trunc_i387 */ |
| 8318 | case 906: /* frndintxf2_ceil_i387 */ |
| 8319 | case 905: /* frndintxf2_floor_i387 */ |
| 8320 | case 904: /* frndintdf2_trunc_i387 */ |
| 8321 | case 903: /* frndintdf2_ceil_i387 */ |
| 8322 | case 902: /* frndintdf2_floor_i387 */ |
| 8323 | case 901: /* frndintsf2_trunc_i387 */ |
| 8324 | case 900: /* frndintsf2_ceil_i387 */ |
| 8325 | case 899: /* frndintsf2_floor_i387 */ |
| 8326 | case 898: /* frndintxf2_trunc */ |
| 8327 | case 897: /* frndintxf2_ceil */ |
| 8328 | case 896: /* frndintxf2_floor */ |
| 8329 | case 895: /* frndintdf2_trunc */ |
| 8330 | case 894: /* frndintdf2_ceil */ |
| 8331 | case 893: /* frndintdf2_floor */ |
| 8332 | case 892: /* frndintsf2_trunc */ |
| 8333 | case 891: /* frndintsf2_ceil */ |
| 8334 | case 890: /* frndintsf2_floor */ |
| 8335 | case 805: /* *add_tp_di */ |
| 8336 | case 804: /* *add_tp_si */ |
| 8337 | case 803: /* *add_tp_x32_zext */ |
| 8338 | case 802: /* *add_tp_x32 */ |
| 8339 | case 704: /* leave_rex64 */ |
| 8340 | case 703: /* leave */ |
| 8341 | case 191: /* fix_truncsi_i387_with_temp */ |
| 8342 | case 190: /* fix_trunchi_i387_with_temp */ |
| 8343 | case 189: /* fix_truncsi_i387 */ |
| 8344 | case 188: /* fix_trunchi_i387 */ |
| 8345 | case 187: /* fix_truncdi_i387_with_temp */ |
| 8346 | case 186: /* fix_truncdi_i387 */ |
| 8347 | case 185: /* *fix_truncdi_i387_1 */ |
| 8348 | case 184: /* *fix_truncsi_i387_1 */ |
| 8349 | case 183: /* *fix_trunchi_i387_1 */ |
| 8350 | case 73: /* *popfldi1 */ |
| 8351 | case 72: /* *popflsi1 */ |
| 8352 | case 69: /* *popdi1_epilogue */ |
| 8353 | case 68: /* *popsi1_epilogue */ |
| 8354 | case 67: /* *popdi1 */ |
| 8355 | case 66: /* *popsi1 */ |
| 8356 | return 3; |
| 8357 | |
| 8358 | case 71: /* *pushfldi2 */ |
| 8359 | case 70: /* *pushflsi2 */ |
| 8360 | case 65: /* *pushdi2_prologue */ |
| 8361 | case 64: /* *pushsi2_prologue */ |
| 8362 | case 63: /* *pushhi2 */ |
| 8363 | case 62: /* *pushqi2 */ |
| 8364 | case 61: /* *pushsi2_rex64 */ |
| 8365 | case 60: /* *pushhi2_rex64 */ |
| 8366 | case 59: /* *pushqi2_rex64 */ |
| 8367 | case 58: /* *pushsi2 */ |
| 8368 | if (get_attr_memory (insn) == MEMORY_BOTH) |
| 8369 | { |
| 8370 | return 3; |
| 8371 | } |
| 8372 | else |
| 8373 | { |
| 8374 | return 2; |
| 8375 | } |
| 8376 | |
| 8377 | case 57: /* *pushdi2_rex64 */ |
| 8378 | extract_constrain_insn_cached (insn); |
| 8379 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_BOTH) |
| 8380 | { |
| 8381 | return 3; |
| 8382 | } |
| 8383 | else if ((which_alternative != 1) || (cached_memory == MEMORY_STORE)) |
| 8384 | { |
| 8385 | return 2; |
| 8386 | } |
| 8387 | else |
| 8388 | { |
| 8389 | return 0; |
| 8390 | } |
| 8391 | |
| 8392 | case 54: /* *cmpiuxf_i387 */ |
| 8393 | case 53: /* *cmpixf_i387 */ |
| 8394 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) |
| 8395 | { |
| 8396 | return 3; |
| 8397 | } |
| 8398 | else if (cached_memory == MEMORY_NONE) |
| 8399 | { |
| 8400 | return 2; |
| 8401 | } |
| 8402 | else |
| 8403 | { |
| 8404 | return 0; |
| 8405 | } |
| 8406 | |
| 8407 | case 52: /* *cmpiudf */ |
| 8408 | case 51: /* *cmpiusf */ |
| 8409 | case 50: /* *cmpidf */ |
| 8410 | case 49: /* *cmpisf */ |
| 8411 | extract_constrain_insn_cached (insn); |
| 8412 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) |
| 8413 | { |
| 8414 | return 3; |
| 8415 | } |
| 8416 | else if ((which_alternative == 0) && (cached_memory == MEMORY_NONE)) |
| 8417 | { |
| 8418 | return 2; |
| 8419 | } |
| 8420 | else |
| 8421 | { |
| 8422 | return 0; |
| 8423 | } |
| 8424 | |
| 8425 | case 4984: /* atomic_bit_test_and_resetdi_1 */ |
| 8426 | case 4983: /* atomic_bit_test_and_resetsi_1 */ |
| 8427 | case 4982: /* atomic_bit_test_and_resethi_1 */ |
| 8428 | case 4981: /* atomic_bit_test_and_complementdi_1 */ |
| 8429 | case 4980: /* atomic_bit_test_and_complementsi_1 */ |
| 8430 | case 4979: /* atomic_bit_test_and_complementhi_1 */ |
| 8431 | case 4978: /* atomic_bit_test_and_setdi_1 */ |
| 8432 | case 4977: /* atomic_bit_test_and_setsi_1 */ |
| 8433 | case 4976: /* atomic_bit_test_and_sethi_1 */ |
| 8434 | case 4975: /* atomic_xordi */ |
| 8435 | case 4974: /* atomic_ordi */ |
| 8436 | case 4973: /* atomic_anddi */ |
| 8437 | case 4972: /* atomic_xorsi */ |
| 8438 | case 4971: /* atomic_orsi */ |
| 8439 | case 4970: /* atomic_andsi */ |
| 8440 | case 4969: /* atomic_xorhi */ |
| 8441 | case 4968: /* atomic_orhi */ |
| 8442 | case 4967: /* atomic_andhi */ |
| 8443 | case 4966: /* atomic_xorqi */ |
| 8444 | case 4965: /* atomic_orqi */ |
| 8445 | case 4964: /* atomic_andqi */ |
| 8446 | case 4963: /* atomic_subdi */ |
| 8447 | case 4962: /* atomic_subsi */ |
| 8448 | case 4961: /* atomic_subhi */ |
| 8449 | case 4960: /* atomic_subqi */ |
| 8450 | case 4959: /* atomic_adddi */ |
| 8451 | case 4958: /* atomic_addsi */ |
| 8452 | case 4957: /* atomic_addhi */ |
| 8453 | case 4956: /* atomic_addqi */ |
| 8454 | case 4955: /* atomic_exchangedi */ |
| 8455 | case 4954: /* atomic_exchangesi */ |
| 8456 | case 4953: /* atomic_exchangehi */ |
| 8457 | case 4952: /* atomic_exchangeqi */ |
| 8458 | case 4951: /* *atomic_fetch_add_cmpdi */ |
| 8459 | case 4950: /* *atomic_fetch_add_cmpsi */ |
| 8460 | case 4949: /* *atomic_fetch_add_cmphi */ |
| 8461 | case 4948: /* *atomic_fetch_add_cmpqi */ |
| 8462 | case 4947: /* atomic_fetch_adddi */ |
| 8463 | case 4946: /* atomic_fetch_addsi */ |
| 8464 | case 4945: /* atomic_fetch_addhi */ |
| 8465 | case 4944: /* atomic_fetch_addqi */ |
| 8466 | case 4943: /* atomic_compare_and_swapdi_1 */ |
| 8467 | case 4942: /* atomic_compare_and_swapsi_1 */ |
| 8468 | case 4941: /* atomic_compare_and_swaphi_1 */ |
| 8469 | case 4940: /* atomic_compare_and_swapqi_1 */ |
| 8470 | case 4939: /* atomic_compare_and_swapti_doubleword */ |
| 8471 | case 4938: /* atomic_compare_and_swapdi_doubleword */ |
| 8472 | case 4933: /* atomic_storedi_fpu */ |
| 8473 | case 4932: /* atomic_storedi_1 */ |
| 8474 | case 4931: /* atomic_storesi_1 */ |
| 8475 | case 4930: /* atomic_storehi_1 */ |
| 8476 | case 4929: /* atomic_storeqi_1 */ |
| 8477 | case 4928: /* atomic_loaddi_fpu */ |
| 8478 | case 4927: /* mfence_nosse */ |
| 8479 | case 4926: /* mfence_sse2 */ |
| 8480 | case 4925: /* *sse_sfence */ |
| 8481 | case 4924: /* *sse2_lfence */ |
| 8482 | case 4923: /* vpopcountv8di_mask */ |
| 8483 | case 4922: /* vpopcountv8di */ |
| 8484 | case 4921: /* vpopcountv16si_mask */ |
| 8485 | case 4920: /* vpopcountv16si */ |
| 8486 | case 4901: /* *movv64si_internal */ |
| 8487 | case 4900: /* *movv64sf_internal */ |
| 8488 | case 4875: /* avx512f_pd512_256pd */ |
| 8489 | case 4874: /* avx512f_ps512_256ps */ |
| 8490 | case 4873: /* avx512f_si512_256si */ |
| 8491 | case 4872: /* avx512f_pd512_pd */ |
| 8492 | case 4871: /* avx512f_ps512_ps */ |
| 8493 | case 4870: /* avx512f_si512_si */ |
| 8494 | case 4832: /* avx512f_vgetmantv2df_round */ |
| 8495 | case 4831: /* avx512f_vgetmantv2df */ |
| 8496 | case 4830: /* avx512f_vgetmantv4sf_round */ |
| 8497 | case 4829: /* avx512f_vgetmantv4sf */ |
| 8498 | case 4828: /* avx512vl_getmantv2df_mask_round */ |
| 8499 | case 4827: /* avx512vl_getmantv2df_mask */ |
| 8500 | case 4826: /* avx512vl_getmantv2df_round */ |
| 8501 | case 4825: /* avx512vl_getmantv2df */ |
| 8502 | case 4824: /* avx512vl_getmantv4df_mask_round */ |
| 8503 | case 4823: /* avx512vl_getmantv4df_mask */ |
| 8504 | case 4822: /* avx512vl_getmantv4df_round */ |
| 8505 | case 4821: /* avx512vl_getmantv4df */ |
| 8506 | case 4820: /* avx512f_getmantv8df_mask_round */ |
| 8507 | case 4819: /* avx512f_getmantv8df_mask */ |
| 8508 | case 4818: /* avx512f_getmantv8df_round */ |
| 8509 | case 4817: /* avx512f_getmantv8df */ |
| 8510 | case 4816: /* avx512vl_getmantv4sf_mask_round */ |
| 8511 | case 4815: /* avx512vl_getmantv4sf_mask */ |
| 8512 | case 4814: /* avx512vl_getmantv4sf_round */ |
| 8513 | case 4813: /* avx512vl_getmantv4sf */ |
| 8514 | case 4812: /* avx512vl_getmantv8sf_mask_round */ |
| 8515 | case 4811: /* avx512vl_getmantv8sf_mask */ |
| 8516 | case 4810: /* avx512vl_getmantv8sf_round */ |
| 8517 | case 4809: /* avx512vl_getmantv8sf */ |
| 8518 | case 4808: /* avx512f_getmantv16sf_mask_round */ |
| 8519 | case 4807: /* avx512f_getmantv16sf_mask */ |
| 8520 | case 4806: /* avx512f_getmantv16sf_round */ |
| 8521 | case 4805: /* avx512f_getmantv16sf */ |
| 8522 | case 4435: /* avx_pd256_pd */ |
| 8523 | case 4434: /* avx_ps256_ps */ |
| 8524 | case 4433: /* avx_si256_si */ |
| 8525 | case 4252: /* *avx_vperm_broadcast_v4df */ |
| 8526 | case 4251: /* *avx_vperm_broadcast_v8sf */ |
| 8527 | case 4056: /* avx_vzeroupper */ |
| 8528 | case 4055: /* *avx_vzeroall */ |
| 8529 | case 3677: /* sse3_monitor_di */ |
| 8530 | case 3676: /* sse3_monitor_si */ |
| 8531 | case 3675: /* sse3_mwait */ |
| 8532 | case 3674: /* sse2_clflush */ |
| 8533 | case 3637: /* *vec_extractv4si_zext_mem */ |
| 8534 | case 3636: /* *vec_extractv4si_mem */ |
| 8535 | case 3633: /* *vec_extractv4si_0_zext */ |
| 8536 | case 3632: /* *vec_extractv4si_0_zext_sse4 */ |
| 8537 | case 3631: /* *vec_extractv2di_0_sse */ |
| 8538 | case 3630: /* *vec_extractv2di_0 */ |
| 8539 | case 3629: /* *vec_extractv4si_0 */ |
| 8540 | case 3628: /* *vec_extractv8hi_mem */ |
| 8541 | case 3627: /* *vec_extractv16qi_mem */ |
| 8542 | case 3503: /* avx512vl_testnmv2di3_mask */ |
| 8543 | case 3502: /* avx512vl_testnmv2di3 */ |
| 8544 | case 3501: /* avx512vl_testnmv4di3_mask */ |
| 8545 | case 3500: /* avx512vl_testnmv4di3 */ |
| 8546 | case 3499: /* avx512f_testnmv8di3_mask */ |
| 8547 | case 3498: /* avx512f_testnmv8di3 */ |
| 8548 | case 3497: /* avx512vl_testnmv4si3_mask */ |
| 8549 | case 3496: /* avx512vl_testnmv4si3 */ |
| 8550 | case 3495: /* avx512vl_testnmv8si3_mask */ |
| 8551 | case 3494: /* avx512vl_testnmv8si3 */ |
| 8552 | case 3493: /* avx512f_testnmv16si3_mask */ |
| 8553 | case 3492: /* avx512f_testnmv16si3 */ |
| 8554 | case 3491: /* avx512vl_testnmv8hi3_mask */ |
| 8555 | case 3490: /* avx512vl_testnmv8hi3 */ |
| 8556 | case 3489: /* avx512vl_testnmv16hi3_mask */ |
| 8557 | case 3488: /* avx512vl_testnmv16hi3 */ |
| 8558 | case 3487: /* avx512bw_testnmv32hi3_mask */ |
| 8559 | case 3486: /* avx512bw_testnmv32hi3 */ |
| 8560 | case 3485: /* avx512vl_testnmv32qi3_mask */ |
| 8561 | case 3484: /* avx512vl_testnmv32qi3 */ |
| 8562 | case 3483: /* avx512vl_testnmv16qi3_mask */ |
| 8563 | case 3482: /* avx512vl_testnmv16qi3 */ |
| 8564 | case 3481: /* avx512bw_testnmv64qi3_mask */ |
| 8565 | case 3480: /* avx512bw_testnmv64qi3 */ |
| 8566 | case 3479: /* avx512vl_testmv2di3_mask */ |
| 8567 | case 3478: /* avx512vl_testmv2di3 */ |
| 8568 | case 3477: /* avx512vl_testmv4di3_mask */ |
| 8569 | case 3476: /* avx512vl_testmv4di3 */ |
| 8570 | case 3475: /* avx512f_testmv8di3_mask */ |
| 8571 | case 3474: /* avx512f_testmv8di3 */ |
| 8572 | case 3473: /* avx512vl_testmv4si3_mask */ |
| 8573 | case 3472: /* avx512vl_testmv4si3 */ |
| 8574 | case 3471: /* avx512vl_testmv8si3_mask */ |
| 8575 | case 3470: /* avx512vl_testmv8si3 */ |
| 8576 | case 3469: /* avx512f_testmv16si3_mask */ |
| 8577 | case 3468: /* avx512f_testmv16si3 */ |
| 8578 | case 3467: /* avx512vl_testmv8hi3_mask */ |
| 8579 | case 3466: /* avx512vl_testmv8hi3 */ |
| 8580 | case 3465: /* avx512vl_testmv16hi3_mask */ |
| 8581 | case 3464: /* avx512vl_testmv16hi3 */ |
| 8582 | case 3463: /* avx512bw_testmv32hi3_mask */ |
| 8583 | case 3462: /* avx512bw_testmv32hi3 */ |
| 8584 | case 3461: /* avx512vl_testmv32qi3_mask */ |
| 8585 | case 3460: /* avx512vl_testmv32qi3 */ |
| 8586 | case 3459: /* avx512vl_testmv16qi3_mask */ |
| 8587 | case 3458: /* avx512vl_testmv16qi3 */ |
| 8588 | case 3457: /* avx512bw_testmv64qi3_mask */ |
| 8589 | case 3456: /* avx512bw_testmv64qi3 */ |
| 8590 | case 3191: /* avx512vl_rorv2di_mask */ |
| 8591 | case 3190: /* avx512vl_rorv2di */ |
| 8592 | case 3189: /* avx512vl_rolv2di_mask */ |
| 8593 | case 3188: /* avx512vl_rolv2di */ |
| 8594 | case 3187: /* avx512vl_rorv4di_mask */ |
| 8595 | case 3186: /* avx512vl_rorv4di */ |
| 8596 | case 3185: /* avx512vl_rolv4di_mask */ |
| 8597 | case 3184: /* avx512vl_rolv4di */ |
| 8598 | case 3183: /* avx512f_rorv8di_mask */ |
| 8599 | case 3182: /* avx512f_rorv8di */ |
| 8600 | case 3181: /* avx512f_rolv8di_mask */ |
| 8601 | case 3180: /* avx512f_rolv8di */ |
| 8602 | case 3179: /* avx512vl_rorv4si_mask */ |
| 8603 | case 3178: /* avx512vl_rorv4si */ |
| 8604 | case 3177: /* avx512vl_rolv4si_mask */ |
| 8605 | case 3176: /* avx512vl_rolv4si */ |
| 8606 | case 3175: /* avx512vl_rorv8si_mask */ |
| 8607 | case 3174: /* avx512vl_rorv8si */ |
| 8608 | case 3173: /* avx512vl_rolv8si_mask */ |
| 8609 | case 3172: /* avx512vl_rolv8si */ |
| 8610 | case 3171: /* avx512f_rorv16si_mask */ |
| 8611 | case 3170: /* avx512f_rorv16si */ |
| 8612 | case 3169: /* avx512f_rolv16si_mask */ |
| 8613 | case 3168: /* avx512f_rolv16si */ |
| 8614 | case 3167: /* avx512vl_rorvv2di_mask */ |
| 8615 | case 3166: /* avx512vl_rorvv2di */ |
| 8616 | case 3165: /* avx512vl_rolvv2di_mask */ |
| 8617 | case 3164: /* avx512vl_rolvv2di */ |
| 8618 | case 3163: /* avx512vl_rorvv4di_mask */ |
| 8619 | case 3162: /* avx512vl_rorvv4di */ |
| 8620 | case 3161: /* avx512vl_rolvv4di_mask */ |
| 8621 | case 3160: /* avx512vl_rolvv4di */ |
| 8622 | case 3159: /* avx512f_rorvv8di_mask */ |
| 8623 | case 3158: /* avx512f_rorvv8di */ |
| 8624 | case 3157: /* avx512f_rolvv8di_mask */ |
| 8625 | case 3156: /* avx512f_rolvv8di */ |
| 8626 | case 3155: /* avx512vl_rorvv4si_mask */ |
| 8627 | case 3154: /* avx512vl_rorvv4si */ |
| 8628 | case 3153: /* avx512vl_rolvv4si_mask */ |
| 8629 | case 3152: /* avx512vl_rolvv4si */ |
| 8630 | case 3151: /* avx512vl_rorvv8si_mask */ |
| 8631 | case 3150: /* avx512vl_rorvv8si */ |
| 8632 | case 3149: /* avx512vl_rolvv8si_mask */ |
| 8633 | case 3148: /* avx512vl_rolvv8si */ |
| 8634 | case 3147: /* avx512f_rorvv16si_mask */ |
| 8635 | case 3146: /* avx512f_rorvv16si */ |
| 8636 | case 3145: /* avx512f_rolvv16si_mask */ |
| 8637 | case 3144: /* avx512f_rolvv16si */ |
| 8638 | case 2704: /* avx512f_rndscalev2df_round */ |
| 8639 | case 2703: /* avx512f_rndscalev2df */ |
| 8640 | case 2702: /* avx512f_rndscalev4sf_round */ |
| 8641 | case 2701: /* avx512f_rndscalev4sf */ |
| 8642 | case 2700: /* avx512vl_rndscalev2df_mask_round */ |
| 8643 | case 2699: /* avx512vl_rndscalev2df_mask */ |
| 8644 | case 2698: /* avx512vl_rndscalev2df_round */ |
| 8645 | case 2697: /* avx512vl_rndscalev2df */ |
| 8646 | case 2696: /* avx512vl_rndscalev4df_mask_round */ |
| 8647 | case 2695: /* avx512vl_rndscalev4df_mask */ |
| 8648 | case 2694: /* avx512vl_rndscalev4df_round */ |
| 8649 | case 2693: /* avx512vl_rndscalev4df */ |
| 8650 | case 2692: /* avx512f_rndscalev8df_mask_round */ |
| 8651 | case 2691: /* avx512f_rndscalev8df_mask */ |
| 8652 | case 2690: /* avx512f_rndscalev8df_round */ |
| 8653 | case 2689: /* avx512f_rndscalev8df */ |
| 8654 | case 2688: /* avx512vl_rndscalev4sf_mask_round */ |
| 8655 | case 2687: /* avx512vl_rndscalev4sf_mask */ |
| 8656 | case 2686: /* avx512vl_rndscalev4sf_round */ |
| 8657 | case 2685: /* avx512vl_rndscalev4sf */ |
| 8658 | case 2684: /* avx512vl_rndscalev8sf_mask_round */ |
| 8659 | case 2683: /* avx512vl_rndscalev8sf_mask */ |
| 8660 | case 2682: /* avx512vl_rndscalev8sf_round */ |
| 8661 | case 2681: /* avx512vl_rndscalev8sf */ |
| 8662 | case 2680: /* avx512f_rndscalev16sf_mask_round */ |
| 8663 | case 2679: /* avx512f_rndscalev16sf_mask */ |
| 8664 | case 2678: /* avx512f_rndscalev16sf_round */ |
| 8665 | case 2677: /* avx512f_rndscalev16sf */ |
| 8666 | case 2676: /* avx512f_sfixupimmv2df_mask_round */ |
| 8667 | case 2675: /* avx512f_sfixupimmv2df_mask */ |
| 8668 | case 2674: /* avx512f_sfixupimmv4sf_mask_round */ |
| 8669 | case 2673: /* avx512f_sfixupimmv4sf_mask */ |
| 8670 | case 2672: /* avx512f_sfixupimmv2df_maskz_1_round */ |
| 8671 | case 2671: /* avx512f_sfixupimmv2df_maskz_1 */ |
| 8672 | case 2670: /* avx512f_sfixupimmv2df_round */ |
| 8673 | case 2669: /* avx512f_sfixupimmv2df */ |
| 8674 | case 2668: /* avx512f_sfixupimmv4sf_maskz_1_round */ |
| 8675 | case 2667: /* avx512f_sfixupimmv4sf_maskz_1 */ |
| 8676 | case 2666: /* avx512f_sfixupimmv4sf_round */ |
| 8677 | case 2665: /* avx512f_sfixupimmv4sf */ |
| 8678 | case 2664: /* avx512vl_fixupimmv2df_mask_round */ |
| 8679 | case 2663: /* avx512vl_fixupimmv2df_mask */ |
| 8680 | case 2662: /* avx512vl_fixupimmv4df_mask_round */ |
| 8681 | case 2661: /* avx512vl_fixupimmv4df_mask */ |
| 8682 | case 2660: /* avx512f_fixupimmv8df_mask_round */ |
| 8683 | case 2659: /* avx512f_fixupimmv8df_mask */ |
| 8684 | case 2658: /* avx512vl_fixupimmv4sf_mask_round */ |
| 8685 | case 2657: /* avx512vl_fixupimmv4sf_mask */ |
| 8686 | case 2656: /* avx512vl_fixupimmv8sf_mask_round */ |
| 8687 | case 2655: /* avx512vl_fixupimmv8sf_mask */ |
| 8688 | case 2654: /* avx512f_fixupimmv16sf_mask_round */ |
| 8689 | case 2653: /* avx512f_fixupimmv16sf_mask */ |
| 8690 | case 2652: /* avx512vl_fixupimmv2df_maskz_1_round */ |
| 8691 | case 2651: /* avx512vl_fixupimmv2df_maskz_1 */ |
| 8692 | case 2650: /* avx512vl_fixupimmv2df_round */ |
| 8693 | case 2649: /* avx512vl_fixupimmv2df */ |
| 8694 | case 2648: /* avx512vl_fixupimmv4df_maskz_1_round */ |
| 8695 | case 2647: /* avx512vl_fixupimmv4df_maskz_1 */ |
| 8696 | case 2646: /* avx512vl_fixupimmv4df_round */ |
| 8697 | case 2645: /* avx512vl_fixupimmv4df */ |
| 8698 | case 2644: /* avx512f_fixupimmv8df_maskz_1_round */ |
| 8699 | case 2643: /* avx512f_fixupimmv8df_maskz_1 */ |
| 8700 | case 2642: /* avx512f_fixupimmv8df_round */ |
| 8701 | case 2641: /* avx512f_fixupimmv8df */ |
| 8702 | case 2640: /* avx512vl_fixupimmv4sf_maskz_1_round */ |
| 8703 | case 2639: /* avx512vl_fixupimmv4sf_maskz_1 */ |
| 8704 | case 2638: /* avx512vl_fixupimmv4sf_round */ |
| 8705 | case 2637: /* avx512vl_fixupimmv4sf */ |
| 8706 | case 2636: /* avx512vl_fixupimmv8sf_maskz_1_round */ |
| 8707 | case 2635: /* avx512vl_fixupimmv8sf_maskz_1 */ |
| 8708 | case 2634: /* avx512vl_fixupimmv8sf_round */ |
| 8709 | case 2633: /* avx512vl_fixupimmv8sf */ |
| 8710 | case 2632: /* avx512f_fixupimmv16sf_maskz_1_round */ |
| 8711 | case 2631: /* avx512f_fixupimmv16sf_maskz_1 */ |
| 8712 | case 2630: /* avx512f_fixupimmv16sf_round */ |
| 8713 | case 2629: /* avx512f_fixupimmv16sf */ |
| 8714 | case 2628: /* avx512vl_alignv2di_mask */ |
| 8715 | case 2627: /* *avx512vl_alignv2di */ |
| 8716 | case 2626: /* avx512vl_alignv4di_mask */ |
| 8717 | case 2625: /* *avx512vl_alignv4di */ |
| 8718 | case 2624: /* avx512f_alignv8di_mask */ |
| 8719 | case 2623: /* *avx512f_alignv8di */ |
| 8720 | case 2622: /* avx512vl_alignv4si_mask */ |
| 8721 | case 2621: /* *avx512vl_alignv4si */ |
| 8722 | case 2620: /* avx512vl_alignv8si_mask */ |
| 8723 | case 2619: /* *avx512vl_alignv8si */ |
| 8724 | case 2618: /* avx512f_alignv16si_mask */ |
| 8725 | case 2617: /* *avx512f_alignv16si */ |
| 8726 | case 2616: /* avx512f_sgetexpv2df_round */ |
| 8727 | case 2615: /* avx512f_sgetexpv2df */ |
| 8728 | case 2614: /* avx512f_sgetexpv4sf_round */ |
| 8729 | case 2613: /* avx512f_sgetexpv4sf */ |
| 8730 | case 2612: /* avx512vl_getexpv2df_mask_round */ |
| 8731 | case 2611: /* avx512vl_getexpv2df_mask */ |
| 8732 | case 2610: /* avx512vl_getexpv2df_round */ |
| 8733 | case 2609: /* avx512vl_getexpv2df */ |
| 8734 | case 2608: /* avx512vl_getexpv4df_mask_round */ |
| 8735 | case 2607: /* avx512vl_getexpv4df_mask */ |
| 8736 | case 2606: /* avx512vl_getexpv4df_round */ |
| 8737 | case 2605: /* avx512vl_getexpv4df */ |
| 8738 | case 2604: /* avx512f_getexpv8df_mask_round */ |
| 8739 | case 2603: /* avx512f_getexpv8df_mask */ |
| 8740 | case 2602: /* avx512f_getexpv8df_round */ |
| 8741 | case 2601: /* avx512f_getexpv8df */ |
| 8742 | case 2600: /* avx512vl_getexpv4sf_mask_round */ |
| 8743 | case 2599: /* avx512vl_getexpv4sf_mask */ |
| 8744 | case 2598: /* avx512vl_getexpv4sf_round */ |
| 8745 | case 2597: /* avx512vl_getexpv4sf */ |
| 8746 | case 2596: /* avx512vl_getexpv8sf_mask_round */ |
| 8747 | case 2595: /* avx512vl_getexpv8sf_mask */ |
| 8748 | case 2594: /* avx512vl_getexpv8sf_round */ |
| 8749 | case 2593: /* avx512vl_getexpv8sf */ |
| 8750 | case 2592: /* avx512f_getexpv16sf_mask_round */ |
| 8751 | case 2591: /* avx512f_getexpv16sf_mask */ |
| 8752 | case 2590: /* avx512f_getexpv16sf_round */ |
| 8753 | case 2589: /* avx512f_getexpv16sf */ |
| 8754 | case 2570: /* avx512vl_scalefv2df_mask_round */ |
| 8755 | case 2569: /* avx512vl_scalefv2df_mask */ |
| 8756 | case 2568: /* avx512vl_scalefv2df_round */ |
| 8757 | case 2567: /* avx512vl_scalefv2df */ |
| 8758 | case 2566: /* avx512vl_scalefv4df_mask_round */ |
| 8759 | case 2565: /* avx512vl_scalefv4df_mask */ |
| 8760 | case 2564: /* avx512vl_scalefv4df_round */ |
| 8761 | case 2563: /* avx512vl_scalefv4df */ |
| 8762 | case 2562: /* avx512f_scalefv8df_mask_round */ |
| 8763 | case 2561: /* avx512f_scalefv8df_mask */ |
| 8764 | case 2560: /* avx512f_scalefv8df_round */ |
| 8765 | case 2559: /* avx512f_scalefv8df */ |
| 8766 | case 2558: /* avx512vl_scalefv4sf_mask_round */ |
| 8767 | case 2557: /* avx512vl_scalefv4sf_mask */ |
| 8768 | case 2556: /* avx512vl_scalefv4sf_round */ |
| 8769 | case 2555: /* avx512vl_scalefv4sf */ |
| 8770 | case 2554: /* avx512vl_scalefv8sf_mask_round */ |
| 8771 | case 2553: /* avx512vl_scalefv8sf_mask */ |
| 8772 | case 2552: /* avx512vl_scalefv8sf_round */ |
| 8773 | case 2551: /* avx512vl_scalefv8sf */ |
| 8774 | case 2550: /* avx512f_scalefv16sf_mask_round */ |
| 8775 | case 2549: /* avx512f_scalefv16sf_mask */ |
| 8776 | case 2548: /* avx512f_scalefv16sf_round */ |
| 8777 | case 2547: /* avx512f_scalefv16sf */ |
| 8778 | case 2546: /* avx512f_vmscalefv2df_round */ |
| 8779 | case 2545: /* avx512f_vmscalefv2df */ |
| 8780 | case 2544: /* avx512f_vmscalefv4sf_round */ |
| 8781 | case 2543: /* avx512f_vmscalefv4sf */ |
| 8782 | case 2529: /* vec_extract_lo_v32qi */ |
| 8783 | case 2527: /* vec_extract_lo_v64qi */ |
| 8784 | case 2525: /* vec_extract_lo_v16hi */ |
| 8785 | case 2523: /* vec_extract_lo_v32hi */ |
| 8786 | case 2502: /* vec_extract_lo_v16si_mask */ |
| 8787 | case 2501: /* vec_extract_lo_v16si */ |
| 8788 | case 2500: /* vec_extract_lo_v16sf_mask */ |
| 8789 | case 2499: /* vec_extract_lo_v16sf */ |
| 8790 | case 2468: /* *vec_extractv4sf_mem */ |
| 8791 | case 2466: /* *vec_extractv4sf_0 */ |
| 8792 | case 2415: /* *avx512vl_cvtmask2qv2di */ |
| 8793 | case 2414: /* *avx512vl_cvtmask2qv4di */ |
| 8794 | case 2413: /* *avx512f_cvtmask2qv8di */ |
| 8795 | case 2412: /* *avx512vl_cvtmask2dv4si */ |
| 8796 | case 2411: /* *avx512vl_cvtmask2dv8si */ |
| 8797 | case 2410: /* *avx512f_cvtmask2dv16si */ |
| 8798 | case 2409: /* *avx512vl_cvtmask2wv8hi */ |
| 8799 | case 2408: /* *avx512vl_cvtmask2wv16hi */ |
| 8800 | case 2407: /* *avx512bw_cvtmask2wv32hi */ |
| 8801 | case 2406: /* *avx512vl_cvtmask2bv32qi */ |
| 8802 | case 2405: /* *avx512vl_cvtmask2bv16qi */ |
| 8803 | case 2404: /* *avx512bw_cvtmask2bv64qi */ |
| 8804 | case 2403: /* avx512vl_cvtq2maskv2di */ |
| 8805 | case 2402: /* avx512vl_cvtq2maskv4di */ |
| 8806 | case 2401: /* avx512f_cvtq2maskv8di */ |
| 8807 | case 2400: /* avx512vl_cvtd2maskv4si */ |
| 8808 | case 2399: /* avx512vl_cvtd2maskv8si */ |
| 8809 | case 2398: /* avx512f_cvtd2maskv16si */ |
| 8810 | case 2397: /* avx512vl_cvtw2maskv8hi */ |
| 8811 | case 2396: /* avx512vl_cvtw2maskv16hi */ |
| 8812 | case 2395: /* avx512bw_cvtw2maskv32hi */ |
| 8813 | case 2394: /* avx512vl_cvtb2maskv32qi */ |
| 8814 | case 2393: /* avx512vl_cvtb2maskv16qi */ |
| 8815 | case 2392: /* avx512bw_cvtb2maskv64qi */ |
| 8816 | case 1360: /* *absnegv2df2 */ |
| 8817 | case 1359: /* *absnegv4df2 */ |
| 8818 | case 1358: /* *absnegv8df2 */ |
| 8819 | case 1357: /* *absnegv4sf2 */ |
| 8820 | case 1356: /* *absnegv8sf2 */ |
| 8821 | case 1355: /* *absnegv16sf2 */ |
| 8822 | case 1354: /* kunpckdi */ |
| 8823 | case 1353: /* kunpcksi */ |
| 8824 | case 1294: /* movdi_to_sse */ |
| 8825 | case 1217: /* *mmx_femms */ |
| 8826 | case 1216: /* *mmx_emms */ |
| 8827 | case 1209: /* *vec_extractv2si_zext_mem */ |
| 8828 | case 1207: /* *vec_extractv2si_0 */ |
| 8829 | case 1137: /* *vec_extractv2sf_0 */ |
| 8830 | case 1105: /* rdpid */ |
| 8831 | case 1104: /* *wrpkru */ |
| 8832 | case 1103: /* *rdpkru */ |
| 8833 | case 1096: /* *bnd64_cn */ |
| 8834 | case 1095: /* *bnd64_cu */ |
| 8835 | case 1094: /* *bnd64_cl */ |
| 8836 | case 1093: /* *bnd32_cn */ |
| 8837 | case 1092: /* *bnd32_cu */ |
| 8838 | case 1091: /* *bnd32_cl */ |
| 8839 | case 1088: /* *bnd64_mk */ |
| 8840 | case 1087: /* *bnd32_mk */ |
| 8841 | case 1086: /* clzero_di */ |
| 8842 | case 1085: /* clzero_si */ |
| 8843 | case 1084: /* monitorx_di */ |
| 8844 | case 1083: /* monitorx_si */ |
| 8845 | case 1082: /* mwaitx */ |
| 8846 | case 1081: /* clflushopt */ |
| 8847 | case 1080: /* clwb */ |
| 8848 | case 1079: /* xtest_1 */ |
| 8849 | case 1078: /* xabort */ |
| 8850 | case 1077: /* xend */ |
| 8851 | case 1076: /* xbegin_1 */ |
| 8852 | case 1075: /* *pause */ |
| 8853 | case 1074: /* rdseeddi_1 */ |
| 8854 | case 1073: /* rdseedsi_1 */ |
| 8855 | case 1072: /* rdseedhi_1 */ |
| 8856 | case 1071: /* rdranddi_1 */ |
| 8857 | case 1070: /* rdrandsi_1 */ |
| 8858 | case 1069: /* rdrandhi_1 */ |
| 8859 | case 1068: /* wrgsbasedi */ |
| 8860 | case 1067: /* wrfsbasedi */ |
| 8861 | case 1066: /* wrgsbasesi */ |
| 8862 | case 1065: /* wrfsbasesi */ |
| 8863 | case 1064: /* rdgsbasedi */ |
| 8864 | case 1063: /* rdfsbasedi */ |
| 8865 | case 1062: /* rdgsbasesi */ |
| 8866 | case 1061: /* rdfsbasesi */ |
| 8867 | case 1060: /* *lwp_lwpinsdi3_1 */ |
| 8868 | case 1059: /* *lwp_lwpinssi3_1 */ |
| 8869 | case 1058: /* *lwp_lwpvaldi3_1 */ |
| 8870 | case 1057: /* *lwp_lwpvalsi3_1 */ |
| 8871 | case 1056: /* lwp_slwpcbdi */ |
| 8872 | case 1055: /* lwp_slwpcbsi */ |
| 8873 | case 1054: /* *lwp_llwpcbdi1 */ |
| 8874 | case 1053: /* *lwp_llwpcbsi1 */ |
| 8875 | case 1052: /* fnclex */ |
| 8876 | case 1026: /* rdtscp_rex64 */ |
| 8877 | case 1025: /* rdtscp */ |
| 8878 | case 1024: /* rdtsc_rex64 */ |
| 8879 | case 1023: /* rdtsc */ |
| 8880 | case 1022: /* rdpmc_rex64 */ |
| 8881 | case 1021: /* rdpmc */ |
| 8882 | case 1016: /* stack_tls_protect_test_di */ |
| 8883 | case 1015: /* stack_tls_protect_test_si */ |
| 8884 | case 1014: /* stack_protect_test_di */ |
| 8885 | case 1013: /* stack_protect_test_si */ |
| 8886 | case 1012: /* stack_tls_protect_set_di */ |
| 8887 | case 1011: /* stack_tls_protect_set_si */ |
| 8888 | case 1010: /* stack_protect_set_di */ |
| 8889 | case 1009: /* stack_protect_set_si */ |
| 8890 | case 1008: /* *prefetch_prefetchwt1 */ |
| 8891 | case 1007: /* *prefetch_3dnow */ |
| 8892 | case 1006: /* *prefetch_sse */ |
| 8893 | case 1005: /* trap */ |
| 8894 | case 1004: /* probe_stack_rangedi */ |
| 8895 | case 1003: /* probe_stack_rangesi */ |
| 8896 | case 1002: /* adjust_stack_and_probedi */ |
| 8897 | case 1001: /* adjust_stack_and_probesi */ |
| 8898 | case 998: /* allocate_stack_worker_probe_di */ |
| 8899 | case 997: /* allocate_stack_worker_probe_si */ |
| 8900 | case 980: /* *movxfcc_1 */ |
| 8901 | case 934: /* cld */ |
| 8902 | case 932: /* fxamdf2_i387_with_temp */ |
| 8903 | case 931: /* fxamsf2_i387_with_temp */ |
| 8904 | case 930: /* fxamxf2_i387 */ |
| 8905 | case 929: /* fxamdf2_i387 */ |
| 8906 | case 928: /* fxamsf2_i387 */ |
| 8907 | case 811: /* *tls_dynamic_gnu2_combine_64 */ |
| 8908 | case 808: /* *tls_dynamic_gnu2_combine_32 */ |
| 8909 | case 797: /* *tls_local_dynamic_32_once */ |
| 8910 | case 796: /* *tls_local_dynamic_base_64_largepic */ |
| 8911 | case 795: /* *tls_local_dynamic_base_64_di */ |
| 8912 | case 794: /* *tls_local_dynamic_base_64_si */ |
| 8913 | case 793: /* *tls_local_dynamic_base_32_gnu */ |
| 8914 | case 792: /* *tls_global_dynamic_64_largepic */ |
| 8915 | case 791: /* *tls_global_dynamic_64_di */ |
| 8916 | case 790: /* *tls_global_dynamic_64_si */ |
| 8917 | case 789: /* *tls_global_dynamic_32_gnu */ |
| 8918 | case 788: /* *parityhi2_cmp */ |
| 8919 | case 787: /* paritysi2_cmp */ |
| 8920 | case 786: /* paritydi2_cmp */ |
| 8921 | case 785: /* bswaphi_lowpart */ |
| 8922 | case 784: /* *bswaphi_lowpart_1 */ |
| 8923 | case 778: /* *popcounthi2_1 */ |
| 8924 | case 706: /* ffssi2_no_cmove */ |
| 8925 | case 705: /* split_stack_return */ |
| 8926 | case 702: /* eh_return_internal */ |
| 8927 | case 698: /* *set_got_labelled */ |
| 8928 | case 697: /* *set_got */ |
| 8929 | case 696: /* pad */ |
| 8930 | case 695: /* nops */ |
| 8931 | case 694: /* nop */ |
| 8932 | case 692: /* simple_return_pop_internal */ |
| 8933 | case 691: /* simple_return_internal_long */ |
| 8934 | case 690: /* interrupt_return */ |
| 8935 | case 689: /* simple_return_internal */ |
| 8936 | case 688: /* prologue_use */ |
| 8937 | case 687: /* *memory_blockage */ |
| 8938 | case 686: /* blockage */ |
| 8939 | case 658: /* *jccxf_si_r_i387 */ |
| 8940 | case 657: /* *jccdf_si_r_i387 */ |
| 8941 | case 656: /* *jccsf_si_r_i387 */ |
| 8942 | case 655: /* *jccxf_hi_r_i387 */ |
| 8943 | case 654: /* *jccdf_hi_r_i387 */ |
| 8944 | case 653: /* *jccsf_hi_r_i387 */ |
| 8945 | case 652: /* *jccxf_si_i387 */ |
| 8946 | case 651: /* *jccdf_si_i387 */ |
| 8947 | case 650: /* *jccsf_si_i387 */ |
| 8948 | case 649: /* *jccxf_hi_i387 */ |
| 8949 | case 648: /* *jccdf_hi_i387 */ |
| 8950 | case 647: /* *jccsf_hi_i387 */ |
| 8951 | case 646: /* *jccuxf_r_i387 */ |
| 8952 | case 645: /* *jccudf_r_i387 */ |
| 8953 | case 644: /* *jccusf_r_i387 */ |
| 8954 | case 643: /* *jccuxf_i387 */ |
| 8955 | case 642: /* *jccudf_i387 */ |
| 8956 | case 641: /* *jccusf_i387 */ |
| 8957 | case 640: /* *jccdf_r_i387 */ |
| 8958 | case 639: /* *jccsf_r_i387 */ |
| 8959 | case 638: /* *jccdf_i387 */ |
| 8960 | case 637: /* *jccsf_i387 */ |
| 8961 | case 636: /* *jccxf_r_i387 */ |
| 8962 | case 635: /* *jccxf_i387 */ |
| 8963 | case 634: /* *jccxf_0_r_i387 */ |
| 8964 | case 633: /* *jccdf_0_r_i387 */ |
| 8965 | case 632: /* *jccsf_0_r_i387 */ |
| 8966 | case 631: /* *jccxf_0_i387 */ |
| 8967 | case 630: /* *jccdf_0_i387 */ |
| 8968 | case 629: /* *jccsf_0_i387 */ |
| 8969 | case 622: /* *setcc_si_1_movzbl */ |
| 8970 | case 621: /* *setcc_si_1_and */ |
| 8971 | case 620: /* *setcc_di_1 */ |
| 8972 | case 619: /* *jcc_btdi_mask */ |
| 8973 | case 618: /* *jcc_btsi_mask */ |
| 8974 | case 617: /* *jcc_btdi_1 */ |
| 8975 | case 616: /* *jcc_btsi_1 */ |
| 8976 | case 615: /* *jcc_btdi */ |
| 8977 | case 614: /* *jcc_btsi */ |
| 8978 | case 593: /* ix86_rotrti3_doubleword */ |
| 8979 | case 592: /* ix86_rotrdi3_doubleword */ |
| 8980 | case 591: /* ix86_rotlti3_doubleword */ |
| 8981 | case 590: /* ix86_rotldi3_doubleword */ |
| 8982 | case 589: /* *rotrdi3_mask */ |
| 8983 | case 588: /* *rotldi3_mask */ |
| 8984 | case 587: /* *rotrsi3_mask */ |
| 8985 | case 586: /* *rotlsi3_mask */ |
| 8986 | case 544: /* *ashrti3_doubleword */ |
| 8987 | case 543: /* *lshrti3_doubleword */ |
| 8988 | case 542: /* *ashrdi3_doubleword */ |
| 8989 | case 541: /* *lshrdi3_doubleword */ |
| 8990 | case 540: /* *ashrdi3_mask */ |
| 8991 | case 539: /* *lshrdi3_mask */ |
| 8992 | case 538: /* *ashrsi3_mask */ |
| 8993 | case 537: /* *lshrsi3_mask */ |
| 8994 | case 518: /* *ashldi3_mask */ |
| 8995 | case 517: /* *ashlsi3_mask */ |
| 8996 | case 514: /* *ashlti3_doubleword */ |
| 8997 | case 513: /* *ashldi3_doubleword */ |
| 8998 | case 502: /* *one_cmpldi2_doubleword */ |
| 8999 | case 501: /* copysigntf3_var */ |
| 9000 | case 500: /* copysigndf3_var */ |
| 9001 | case 499: /* copysignsf3_var */ |
| 9002 | case 498: /* copysigntf3_const */ |
| 9003 | case 497: /* copysigndf3_const */ |
| 9004 | case 496: /* copysignsf3_const */ |
| 9005 | case 483: /* *absnegtf2_sse */ |
| 9006 | case 482: /* *absnegxf2_i387 */ |
| 9007 | case 481: /* *absnegdf2 */ |
| 9008 | case 480: /* *absnegsf2 */ |
| 9009 | case 465: /* *negti2_doubleword */ |
| 9010 | case 464: /* *negdi2_doubleword */ |
| 9011 | case 422: /* *xordi3_doubleword */ |
| 9012 | case 421: /* *iordi3_doubleword */ |
| 9013 | case 414: /* *andndi3_doubleword */ |
| 9014 | case 397: /* *anddi3_doubleword */ |
| 9015 | case 396: /* *testqi_ext_3 */ |
| 9016 | case 395: /* *testqi_ext_3 */ |
| 9017 | case 394: /* *testqi_ext_3 */ |
| 9018 | case 382: /* *udivmoddi4_pow2 */ |
| 9019 | case 381: /* *udivmodsi4_pow2 */ |
| 9020 | case 380: /* *udivmoddi4 */ |
| 9021 | case 379: /* *udivmodsi4 */ |
| 9022 | case 378: /* *udivmodhi4 */ |
| 9023 | case 377: /* udivmoddi4_1 */ |
| 9024 | case 376: /* udivmodsi4_1 */ |
| 9025 | case 371: /* *divmoddi4 */ |
| 9026 | case 370: /* *divmodsi4 */ |
| 9027 | case 369: /* *divmodhi4 */ |
| 9028 | case 368: /* divmoddi4_1 */ |
| 9029 | case 367: /* divmodsi4_1 */ |
| 9030 | case 270: /* *subti3_doubleword */ |
| 9031 | case 269: /* *subdi3_doubleword */ |
| 9032 | case 216: /* *addti3_doubleword */ |
| 9033 | case 215: /* *adddi3_doubleword */ |
| 9034 | case 212: /* *floatunssixf2_i387_with_xmm */ |
| 9035 | case 211: /* *floatunssidf2_i387_with_xmm */ |
| 9036 | case 210: /* *floatunssisf2_i387_with_xmm */ |
| 9037 | case 209: /* floatdixf2_i387_with_xmm */ |
| 9038 | case 208: /* floatdidf2_i387_with_xmm */ |
| 9039 | case 207: /* floatdisf2_i387_with_xmm */ |
| 9040 | case 193: /* x86_fldcw_1 */ |
| 9041 | case 192: /* x86_fnstcw_1 */ |
| 9042 | case 169: /* *fixuns_truncdf_1 */ |
| 9043 | case 168: /* *fixuns_truncsf_1 */ |
| 9044 | case 146: /* extendsidi2_1 */ |
| 9045 | case 144: /* *zextsi_doubleword */ |
| 9046 | case 143: /* *zexthi_doubleword */ |
| 9047 | case 142: /* *zextqi_doubleword */ |
| 9048 | case 141: /* *zexthi_doubleword_and */ |
| 9049 | case 140: /* *zextqi_doubleword_and */ |
| 9050 | case 121: /* *pushdf */ |
| 9051 | case 120: /* *pushxf */ |
| 9052 | case 119: /* *pushxf_rounded */ |
| 9053 | case 118: /* *pushxf_rounded */ |
| 9054 | case 117: /* *pushtf */ |
| 9055 | case 56: /* *pushti2 */ |
| 9056 | case 55: /* *pushdi2 */ |
| 9057 | case 48: /* x86_sahf_1 */ |
| 9058 | case 47: /* x86_fnstsw_1 */ |
| 9059 | case 46: /* *cmpxf_si_cc_i387 */ |
| 9060 | case 45: /* *cmpdf_si_cc_i387 */ |
| 9061 | case 44: /* *cmpsf_si_cc_i387 */ |
| 9062 | case 43: /* *cmpxf_hi_cc_i387 */ |
| 9063 | case 42: /* *cmpdf_hi_cc_i387 */ |
| 9064 | case 41: /* *cmpsf_hi_cc_i387 */ |
| 9065 | case 40: /* *cmpxf_si_i387 */ |
| 9066 | case 39: /* *cmpdf_si_i387 */ |
| 9067 | case 38: /* *cmpsf_si_i387 */ |
| 9068 | case 37: /* *cmpxf_hi_i387 */ |
| 9069 | case 36: /* *cmpdf_hi_i387 */ |
| 9070 | case 35: /* *cmpsf_hi_i387 */ |
| 9071 | case 34: /* *cmpuxf_cc_i387 */ |
| 9072 | case 33: /* *cmpudf_cc_i387 */ |
| 9073 | case 32: /* *cmpusf_cc_i387 */ |
| 9074 | case 31: /* *cmpuxf_i387 */ |
| 9075 | case 30: /* *cmpudf_i387 */ |
| 9076 | case 29: /* *cmpusf_i387 */ |
| 9077 | case 28: /* *cmpdf_cc_i387 */ |
| 9078 | case 27: /* *cmpsf_cc_i387 */ |
| 9079 | case 26: /* *cmpdf_i387 */ |
| 9080 | case 25: /* *cmpsf_i387 */ |
| 9081 | case 24: /* *cmpxf_cc_i387 */ |
| 9082 | case 23: /* *cmpxf_i387 */ |
| 9083 | case 22: /* *cmpxf_0_cc_i387 */ |
| 9084 | case 21: /* *cmpdf_0_cc_i387 */ |
| 9085 | case 20: /* *cmpsf_0_cc_i387 */ |
| 9086 | case 19: /* *cmpxf_0_i387 */ |
| 9087 | case 18: /* *cmpdf_0_i387 */ |
| 9088 | case 17: /* *cmpsf_0_i387 */ |
| 9089 | return 0; |
| 9090 | |
| 9091 | case 393: /* *testqi_ext_2 */ |
| 9092 | case 392: /* *testqi_ext_1 */ |
| 9093 | case 391: /* *testsi_1 */ |
| 9094 | case 390: /* *testhi_1 */ |
| 9095 | case 389: /* *testqi_1 */ |
| 9096 | case 388: /* *testqi_1_maybe_si */ |
| 9097 | case 387: /* *testdi_1 */ |
| 9098 | case 16: /* *cmpqi_ext_4 */ |
| 9099 | case 15: /* *cmpqi_ext_3 */ |
| 9100 | case 14: /* *cmpqi_ext_2 */ |
| 9101 | case 13: /* *cmpqi_ext_1 */ |
| 9102 | case 12: /* *cmpdi_minus_1 */ |
| 9103 | case 11: /* *cmpsi_minus_1 */ |
| 9104 | case 10: /* *cmphi_minus_1 */ |
| 9105 | case 9: /* *cmpqi_minus_1 */ |
| 9106 | case 8: /* *cmpdi_1 */ |
| 9107 | case 7: /* *cmpsi_1 */ |
| 9108 | case 6: /* *cmphi_1 */ |
| 9109 | case 5: /* *cmpqi_1 */ |
| 9110 | case 4: /* *cmpdi_ccno_1 */ |
| 9111 | case 3: /* *cmpsi_ccno_1 */ |
| 9112 | case 2: /* *cmphi_ccno_1 */ |
| 9113 | case 1: /* *cmpqi_ccno_1 */ |
| 9114 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) |
| 9115 | { |
| 9116 | return 1; |
| 9117 | } |
| 9118 | else if (cached_memory == MEMORY_LOAD) |
| 9119 | { |
| 9120 | return 3; |
| 9121 | } |
| 9122 | else |
| 9123 | { |
| 9124 | return 0; |
| 9125 | } |
| 9126 | |
| 9127 | case -1: |
| 9128 | if (GET_CODE (PATTERN (insn)) != ASM_INPUT |
| 9129 | && asm_noperands (PATTERN (insn)) < 0) |
| 9130 | fatal_insn_not_found (insn); |
| 9131 | /* FALLTHRU */ |
| 9132 | default: |
| 9133 | extract_insn_cached (insn); |
| 9134 | if ((((cached_type = get_attr_type (insn)) == TYPE_ISHIFT) || (cached_type == TYPE_ISHIFT1) || (cached_type == TYPE_ROTATE) || (cached_type == TYPE_ROTATE1) || (cached_type == TYPE_ALU1) || (cached_type == TYPE_NEGNOT)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 9135 | { |
| 9136 | return 1; |
| 9137 | } |
| 9138 | else if (((cached_type == TYPE_ISHIFT) || (cached_type == TYPE_ISHIFT1) || (cached_type == TYPE_ROTATE) || (cached_type == TYPE_ROTATE1) || (cached_type == TYPE_ALU1) || (cached_type == TYPE_NEGNOT)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 9139 | { |
| 9140 | return 3; |
| 9141 | } |
| 9142 | else if (((cached_type == TYPE_ISHIFT) || (cached_type == TYPE_ISHIFT1) || (cached_type == TYPE_ROTATE) || (cached_type == TYPE_ROTATE1) || (cached_type == TYPE_ALU1) || (cached_type == TYPE_NEGNOT)) && (((cached_memory = get_attr_memory (insn)) == MEMORY_STORE) || (cached_memory == MEMORY_BOTH) || (cached_memory == MEMORY_UNKNOWN))) |
| 9143 | { |
| 9144 | return 3; |
| 9145 | } |
| 9146 | else if (cached_type == TYPE_IMUL) |
| 9147 | { |
| 9148 | return 2; |
| 9149 | } |
| 9150 | else if ((cached_type == TYPE_IDIV) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 9151 | { |
| 9152 | return 17 /* 0x11 */; |
| 9153 | } |
| 9154 | else if ((cached_type == TYPE_IDIV) && (! ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE))) |
| 9155 | { |
| 9156 | return 19 /* 0x13 */; |
| 9157 | } |
| 9158 | else if (((cached_type == TYPE_ALU) || (cached_type == TYPE_ALU1) || (cached_type == TYPE_NEGNOT) || (cached_type == TYPE_ICMP) || (cached_type == TYPE_TEST) || (cached_type == TYPE_IMOVX) || (cached_type == TYPE_INCDEC) || (cached_type == TYPE_SETCC)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 9159 | { |
| 9160 | return 1; |
| 9161 | } |
| 9162 | else if (((cached_type == TYPE_ALU) || (cached_type == TYPE_ALU1) || (cached_type == TYPE_NEGNOT) || (cached_type == TYPE_ICMP) || (cached_type == TYPE_TEST) || (cached_type == TYPE_IMOVX) || (cached_type == TYPE_INCDEC) || (cached_type == TYPE_SETCC)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 9163 | { |
| 9164 | return 3; |
| 9165 | } |
| 9166 | else if (((cached_type == TYPE_ALU) || (cached_type == TYPE_ALU1) || (cached_type == TYPE_NEGNOT) || (cached_type == TYPE_ICMP) || (cached_type == TYPE_TEST) || (cached_type == TYPE_IMOVX) || (cached_type == TYPE_INCDEC) || (cached_type == TYPE_SETCC)) && (((cached_memory = get_attr_memory (insn)) == MEMORY_STORE) || (cached_memory == MEMORY_BOTH) || (cached_memory == MEMORY_UNKNOWN))) |
| 9167 | { |
| 9168 | return 3; |
| 9169 | } |
| 9170 | else if ((cached_type == TYPE_IMOV) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) && (nonimmediate_operand (operands[1], VOIDmode))) |
| 9171 | { |
| 9172 | return 1; |
| 9173 | } |
| 9174 | else if ((cached_type == TYPE_IMOV) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) && (immediate_operand (operands[1], VOIDmode))) |
| 9175 | { |
| 9176 | return 0; |
| 9177 | } |
| 9178 | else if ((cached_type == TYPE_IMOV) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 9179 | { |
| 9180 | return 2; |
| 9181 | } |
| 9182 | else if ((cached_type == TYPE_IMOV) && ((cached_memory = get_attr_memory (insn)) == MEMORY_STORE)) |
| 9183 | { |
| 9184 | return 1; |
| 9185 | } |
| 9186 | else if ((cached_type == TYPE_IMOV) && (((cached_memory = get_attr_memory (insn)) == MEMORY_BOTH) || (cached_memory == MEMORY_UNKNOWN))) |
| 9187 | { |
| 9188 | return 2; |
| 9189 | } |
| 9190 | else if ((cached_type == TYPE_CALL) || (cached_type == TYPE_CALLV)) |
| 9191 | { |
| 9192 | return 1; |
| 9193 | } |
| 9194 | else if (cached_type == TYPE_IBR) |
| 9195 | { |
| 9196 | return 1; |
| 9197 | } |
| 9198 | else if ((cached_type == TYPE_POP) || ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) || (cached_memory == MEMORY_BOTH)) |
| 9199 | { |
| 9200 | return 3; |
| 9201 | } |
| 9202 | else if (cached_type == TYPE_LEAVE) |
| 9203 | { |
| 9204 | return 5; |
| 9205 | } |
| 9206 | else if (cached_type == TYPE_LEA) |
| 9207 | { |
| 9208 | return 2; |
| 9209 | } |
| 9210 | else if ((cached_type == TYPE_PUSH) || (cached_memory == MEMORY_STORE)) |
| 9211 | { |
| 9212 | return 2; |
| 9213 | } |
| 9214 | else if (cached_type == TYPE_STR) |
| 9215 | { |
| 9216 | return 10 /* 0xa */; |
| 9217 | } |
| 9218 | else if (((cached_type == TYPE_FOP) || (cached_type == TYPE_FMOV) || (cached_type == TYPE_FCMP) || (cached_type == TYPE_FISTP)) && (cached_memory == MEMORY_NONE)) |
| 9219 | { |
| 9220 | return 2; |
| 9221 | } |
| 9222 | else if ((cached_type == TYPE_FMUL) && (cached_memory == MEMORY_NONE)) |
| 9223 | { |
| 9224 | return 2; |
| 9225 | } |
| 9226 | else if ((cached_type == TYPE_FDIV) || (cached_type == TYPE_FPSPC)) |
| 9227 | { |
| 9228 | return 56 /* 0x38 */; |
| 9229 | } |
| 9230 | else |
| 9231 | { |
| 9232 | return 0; |
| 9233 | } |
| 9234 | |
| 9235 | } |
| 9236 | } |
| 9237 | |
| 9238 | int |
| 9239 | insn_default_latency_athlon (rtx_insn *insn ATTRIBUTE_UNUSED) |
| 9240 | { |
| 9241 | enum attr_memory cached_memory ATTRIBUTE_UNUSED; |
| 9242 | enum attr_type cached_type ATTRIBUTE_UNUSED; |
| 9243 | enum attr_athlon_decode cached_athlon_decode ATTRIBUTE_UNUSED; |
| 9244 | enum attr_unit cached_unit ATTRIBUTE_UNUSED; |
| 9245 | enum attr_mode cached_mode ATTRIBUTE_UNUSED; |
| 9246 | |
| 9247 | switch (recog_memoized (insn)) |
| 9248 | { |
| 9249 | case 4217: /* avx_vbroadcastf128_v4df */ |
| 9250 | case 4216: /* avx_vbroadcastf128_v8sf */ |
| 9251 | case 4215: /* avx_vbroadcastf128_v4di */ |
| 9252 | case 4214: /* avx_vbroadcastf128_v8si */ |
| 9253 | case 4213: /* avx_vbroadcastf128_v16hi */ |
| 9254 | case 4212: /* avx_vbroadcastf128_v32qi */ |
| 9255 | extract_constrain_insn_cached (insn); |
| 9256 | if ((((1 << which_alternative) & 0x29)) && ((memory_operand (operands[1], DFmode)) || (get_attr_memory (insn) == MEMORY_LOAD))) |
| 9257 | { |
| 9258 | return 0; |
| 9259 | } |
| 9260 | else if (((1 << which_alternative) & 0x29)) |
| 9261 | { |
| 9262 | return 2; |
| 9263 | } |
| 9264 | else |
| 9265 | { |
| 9266 | return 3; |
| 9267 | } |
| 9268 | |
| 9269 | case 4196: /* *vec_dupv4si */ |
| 9270 | case 4195: /* vec_dupv4sf */ |
| 9271 | extract_constrain_insn_cached (insn); |
| 9272 | if ((which_alternative == 1) && ((memory_operand (operands[1], DFmode)) || (get_attr_memory (insn) == MEMORY_LOAD))) |
| 9273 | { |
| 9274 | return 0; |
| 9275 | } |
| 9276 | else if (which_alternative == 1) |
| 9277 | { |
| 9278 | return 2; |
| 9279 | } |
| 9280 | else |
| 9281 | { |
| 9282 | return 3; |
| 9283 | } |
| 9284 | |
| 9285 | case 3642: /* vec_concatv2di */ |
| 9286 | extract_constrain_insn_cached (insn); |
| 9287 | if ((!((1 << which_alternative) & 0x18f)) && ((memory_operand (operands[1], DFmode)) || (get_attr_memory (insn) == MEMORY_LOAD))) |
| 9288 | { |
| 9289 | return 0; |
| 9290 | } |
| 9291 | else if (!((1 << which_alternative) & 0x18f)) |
| 9292 | { |
| 9293 | return 2; |
| 9294 | } |
| 9295 | else |
| 9296 | { |
| 9297 | return 3; |
| 9298 | } |
| 9299 | |
| 9300 | case 3634: /* *vec_extractv4si */ |
| 9301 | extract_constrain_insn_cached (insn); |
| 9302 | if (((1 << which_alternative) & 0x3)) |
| 9303 | { |
| 9304 | return 3; |
| 9305 | } |
| 9306 | else |
| 9307 | { |
| 9308 | return 0; |
| 9309 | } |
| 9310 | |
| 9311 | case 2735: /* vec_concatv2df */ |
| 9312 | extract_constrain_insn_cached (insn); |
| 9313 | if ((!((1 << which_alternative) & 0x1f)) && ((memory_operand (operands[1], DFmode)) || (get_attr_memory (insn) == MEMORY_LOAD))) |
| 9314 | { |
| 9315 | return 0; |
| 9316 | } |
| 9317 | else if (!((1 << which_alternative) & 0x1f)) |
| 9318 | { |
| 9319 | return 2; |
| 9320 | } |
| 9321 | else |
| 9322 | { |
| 9323 | return 3; |
| 9324 | } |
| 9325 | |
| 9326 | case 2732: /* sse2_movsd */ |
| 9327 | extract_constrain_insn_cached (insn); |
| 9328 | if ((which_alternative != 5) && ((memory_operand (operands[1], DFmode)) || (get_attr_memory (insn) == MEMORY_LOAD))) |
| 9329 | { |
| 9330 | return 0; |
| 9331 | } |
| 9332 | else if (which_alternative != 5) |
| 9333 | { |
| 9334 | return 2; |
| 9335 | } |
| 9336 | else |
| 9337 | { |
| 9338 | return 3; |
| 9339 | } |
| 9340 | |
| 9341 | case 2542: /* *vec_interleave_lowv2df */ |
| 9342 | case 2536: /* *vec_interleave_highv2df */ |
| 9343 | extract_constrain_insn_cached (insn); |
| 9344 | if ((!((1 << which_alternative) & 0x7)) && ((memory_operand (operands[1], DFmode)) || (get_attr_memory (insn) == MEMORY_LOAD))) |
| 9345 | { |
| 9346 | return 0; |
| 9347 | } |
| 9348 | else if (!((1 << which_alternative) & 0x7)) |
| 9349 | { |
| 9350 | return 2; |
| 9351 | } |
| 9352 | else |
| 9353 | { |
| 9354 | return 3; |
| 9355 | } |
| 9356 | |
| 9357 | case 2417: /* sse2_cvtps2pd_mask */ |
| 9358 | case 2416: /* sse2_cvtps2pd */ |
| 9359 | if (get_attr_memory (insn) == MEMORY_LOAD) |
| 9360 | { |
| 9361 | return 5; |
| 9362 | } |
| 9363 | else |
| 9364 | { |
| 9365 | return 3; |
| 9366 | } |
| 9367 | |
| 9368 | case 2372: /* *sse2_vd_cvtsd2ss */ |
| 9369 | case 2371: /* sse2_cvtsd2ss_round */ |
| 9370 | case 2370: /* sse2_cvtsd2ss */ |
| 9371 | extract_constrain_insn_cached (insn); |
| 9372 | if ((which_alternative == 1) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 9373 | { |
| 9374 | return 9; |
| 9375 | } |
| 9376 | else if ((which_alternative == 0) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 9377 | { |
| 9378 | return 12 /* 0xc */; |
| 9379 | } |
| 9380 | else |
| 9381 | { |
| 9382 | return 0; |
| 9383 | } |
| 9384 | |
| 9385 | case 2383: /* *sse2_cvtpd2ps_mask */ |
| 9386 | case 2382: /* *sse2_cvtpd2ps */ |
| 9387 | case 2369: /* sse2_cvttpd2dq_mask */ |
| 9388 | case 2368: /* sse2_cvttpd2dq */ |
| 9389 | case 2291: /* sse2_cvtpd2dq_mask */ |
| 9390 | case 2290: /* sse2_cvtpd2dq */ |
| 9391 | if (((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) || (cached_memory == MEMORY_NONE)) |
| 9392 | { |
| 9393 | return 8; |
| 9394 | } |
| 9395 | else |
| 9396 | { |
| 9397 | return 0; |
| 9398 | } |
| 9399 | |
| 9400 | case 2195: /* sse2_cvtpi2pd */ |
| 9401 | extract_constrain_insn_cached (insn); |
| 9402 | if ((which_alternative == 0) && (get_attr_memory (insn) == MEMORY_LOAD)) |
| 9403 | { |
| 9404 | return 3; |
| 9405 | } |
| 9406 | else if (which_alternative == 0) |
| 9407 | { |
| 9408 | return 2; |
| 9409 | } |
| 9410 | else |
| 9411 | { |
| 9412 | return 0; |
| 9413 | } |
| 9414 | |
| 9415 | case 2126: /* cvtusi2sd64_round */ |
| 9416 | case 2125: /* cvtusi2sd64 */ |
| 9417 | case 2124: /* cvtusi2ss64_round */ |
| 9418 | case 2123: /* cvtusi2ss64 */ |
| 9419 | case 2122: /* cvtusi2sd32 */ |
| 9420 | case 2121: /* cvtusi2ss32_round */ |
| 9421 | case 2120: /* cvtusi2ss32 */ |
| 9422 | if (get_attr_memory (insn) == MEMORY_LOAD) |
| 9423 | { |
| 9424 | return 6; |
| 9425 | } |
| 9426 | else |
| 9427 | { |
| 9428 | return 0; |
| 9429 | } |
| 9430 | |
| 9431 | case 2226: /* sse2_cvttsd2siq_round */ |
| 9432 | case 2225: /* sse2_cvttsd2siq */ |
| 9433 | case 2224: /* sse2_cvttsd2si_round */ |
| 9434 | case 2223: /* sse2_cvttsd2si */ |
| 9435 | case 2222: /* sse2_cvtsd2siq_2 */ |
| 9436 | case 2221: /* sse2_cvtsd2siq_round */ |
| 9437 | case 2220: /* sse2_cvtsd2siq */ |
| 9438 | case 2219: /* sse2_cvtsd2si_2 */ |
| 9439 | case 2218: /* sse2_cvtsd2si_round */ |
| 9440 | case 2217: /* sse2_cvtsd2si */ |
| 9441 | case 2119: /* sse_cvttss2siq_round */ |
| 9442 | case 2118: /* sse_cvttss2siq */ |
| 9443 | case 2117: /* sse_cvttss2si_round */ |
| 9444 | case 2116: /* sse_cvttss2si */ |
| 9445 | case 2115: /* sse_cvtss2siq_2 */ |
| 9446 | case 2114: /* sse_cvtss2siq_round */ |
| 9447 | case 2113: /* sse_cvtss2siq */ |
| 9448 | case 2112: /* sse_cvtss2si_2 */ |
| 9449 | case 2111: /* sse_cvtss2si_round */ |
| 9450 | case 2110: /* sse_cvtss2si */ |
| 9451 | extract_constrain_insn_cached (insn); |
| 9452 | if (((which_alternative == 1) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) || ((which_alternative == 0) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE))) |
| 9453 | { |
| 9454 | return 9; |
| 9455 | } |
| 9456 | else |
| 9457 | { |
| 9458 | return 0; |
| 9459 | } |
| 9460 | |
| 9461 | case 1464: /* sse2_divv2df3_mask */ |
| 9462 | case 1463: /* sse2_divv2df3 */ |
| 9463 | case 1462: /* avx_divv4df3_mask */ |
| 9464 | case 1461: /* avx_divv4df3 */ |
| 9465 | case 1460: /* avx512f_divv8df3_mask_round */ |
| 9466 | case 1459: /* avx512f_divv8df3_mask */ |
| 9467 | case 1458: /* avx512f_divv8df3_round */ |
| 9468 | case 1457: /* avx512f_divv8df3 */ |
| 9469 | case 1456: /* sse_divv4sf3_mask */ |
| 9470 | case 1455: /* sse_divv4sf3 */ |
| 9471 | case 1454: /* avx_divv8sf3_mask */ |
| 9472 | case 1453: /* avx_divv8sf3 */ |
| 9473 | case 1452: /* avx512f_divv16sf3_mask_round */ |
| 9474 | case 1451: /* avx512f_divv16sf3_mask */ |
| 9475 | case 1450: /* avx512f_divv16sf3_round */ |
| 9476 | case 1449: /* avx512f_divv16sf3 */ |
| 9477 | return 39 /* 0x27 */; |
| 9478 | |
| 9479 | case 1448: /* sse2_vmdivv2df3_round */ |
| 9480 | case 1447: /* sse2_vmdivv2df3 */ |
| 9481 | case 1444: /* sse_vmdivv4sf3_round */ |
| 9482 | case 1443: /* sse_vmdivv4sf3 */ |
| 9483 | return 20 /* 0x14 */; |
| 9484 | |
| 9485 | case 3783: /* sse4_1_dppd */ |
| 9486 | case 3782: /* avx_dppd256 */ |
| 9487 | case 3781: /* sse4_1_dpps */ |
| 9488 | case 3780: /* avx_dpps256 */ |
| 9489 | case 1620: /* sse3_hsubv4sf3 */ |
| 9490 | case 1619: /* sse3_haddv4sf3 */ |
| 9491 | case 1618: /* avx_hsubv8sf3 */ |
| 9492 | case 1617: /* avx_haddv8sf3 */ |
| 9493 | case 1616: /* *sse3_hsubv2df3_low */ |
| 9494 | case 1615: /* *sse3_haddv2df3_low */ |
| 9495 | case 1614: /* sse3_hsubv2df3 */ |
| 9496 | case 1613: /* *sse3_haddv2df3 */ |
| 9497 | case 1612: /* avx_hsubv4df3 */ |
| 9498 | case 1611: /* avx_haddv4df3 */ |
| 9499 | case 1610: /* sse3_addsubv4sf3 */ |
| 9500 | case 1609: /* avx_addsubv8sf3 */ |
| 9501 | case 1608: /* sse3_addsubv2df3 */ |
| 9502 | case 1607: /* avx_addsubv4df3 */ |
| 9503 | case 1598: /* ieee_minv2df3_mask */ |
| 9504 | case 1597: /* ieee_minv2df3 */ |
| 9505 | case 1596: /* ieee_maxv2df3_mask */ |
| 9506 | case 1595: /* ieee_maxv2df3 */ |
| 9507 | case 1594: /* ieee_minv4df3_mask */ |
| 9508 | case 1593: /* ieee_minv4df3 */ |
| 9509 | case 1592: /* ieee_maxv4df3_mask */ |
| 9510 | case 1591: /* ieee_maxv4df3 */ |
| 9511 | case 1590: /* ieee_minv8df3_mask_round */ |
| 9512 | case 1589: /* ieee_minv8df3_mask */ |
| 9513 | case 1588: /* ieee_minv8df3_round */ |
| 9514 | case 1587: /* ieee_minv8df3 */ |
| 9515 | case 1586: /* ieee_maxv8df3_mask_round */ |
| 9516 | case 1585: /* ieee_maxv8df3_mask */ |
| 9517 | case 1584: /* ieee_maxv8df3_round */ |
| 9518 | case 1583: /* ieee_maxv8df3 */ |
| 9519 | case 1582: /* ieee_minv4sf3_mask */ |
| 9520 | case 1581: /* ieee_minv4sf3 */ |
| 9521 | case 1580: /* ieee_maxv4sf3_mask */ |
| 9522 | case 1579: /* ieee_maxv4sf3 */ |
| 9523 | case 1578: /* ieee_minv8sf3_mask */ |
| 9524 | case 1577: /* ieee_minv8sf3 */ |
| 9525 | case 1576: /* ieee_maxv8sf3_mask */ |
| 9526 | case 1575: /* ieee_maxv8sf3 */ |
| 9527 | case 1574: /* ieee_minv16sf3_mask_round */ |
| 9528 | case 1573: /* ieee_minv16sf3_mask */ |
| 9529 | case 1572: /* ieee_minv16sf3_round */ |
| 9530 | case 1571: /* ieee_minv16sf3 */ |
| 9531 | case 1570: /* ieee_maxv16sf3_mask_round */ |
| 9532 | case 1569: /* ieee_maxv16sf3_mask */ |
| 9533 | case 1568: /* ieee_maxv16sf3_round */ |
| 9534 | case 1567: /* ieee_maxv16sf3 */ |
| 9535 | case 1566: /* *sminv2df3_mask_round */ |
| 9536 | case 1565: /* *sminv2df3_mask */ |
| 9537 | case 1564: /* *sminv2df3_round */ |
| 9538 | case 1563: /* *sminv2df3 */ |
| 9539 | case 1562: /* *smaxv2df3_mask_round */ |
| 9540 | case 1561: /* *smaxv2df3_mask */ |
| 9541 | case 1560: /* *smaxv2df3_round */ |
| 9542 | case 1559: /* *smaxv2df3 */ |
| 9543 | case 1558: /* *sminv4df3_mask_round */ |
| 9544 | case 1557: /* *sminv4df3_mask */ |
| 9545 | case 1556: /* *sminv4df3_round */ |
| 9546 | case 1555: /* *sminv4df3 */ |
| 9547 | case 1554: /* *smaxv4df3_mask_round */ |
| 9548 | case 1553: /* *smaxv4df3_mask */ |
| 9549 | case 1552: /* *smaxv4df3_round */ |
| 9550 | case 1551: /* *smaxv4df3 */ |
| 9551 | case 1550: /* *sminv8df3_mask_round */ |
| 9552 | case 1549: /* *sminv8df3_mask */ |
| 9553 | case 1548: /* *sminv8df3_round */ |
| 9554 | case 1547: /* *sminv8df3 */ |
| 9555 | case 1546: /* *smaxv8df3_mask_round */ |
| 9556 | case 1545: /* *smaxv8df3_mask */ |
| 9557 | case 1544: /* *smaxv8df3_round */ |
| 9558 | case 1543: /* *smaxv8df3 */ |
| 9559 | case 1542: /* *sminv4sf3_mask_round */ |
| 9560 | case 1541: /* *sminv4sf3_mask */ |
| 9561 | case 1540: /* *sminv4sf3_round */ |
| 9562 | case 1539: /* *sminv4sf3 */ |
| 9563 | case 1538: /* *smaxv4sf3_mask_round */ |
| 9564 | case 1537: /* *smaxv4sf3_mask */ |
| 9565 | case 1536: /* *smaxv4sf3_round */ |
| 9566 | case 1535: /* *smaxv4sf3 */ |
| 9567 | case 1534: /* *sminv8sf3_mask_round */ |
| 9568 | case 1533: /* *sminv8sf3_mask */ |
| 9569 | case 1532: /* *sminv8sf3_round */ |
| 9570 | case 1531: /* *sminv8sf3 */ |
| 9571 | case 1530: /* *smaxv8sf3_mask_round */ |
| 9572 | case 1529: /* *smaxv8sf3_mask */ |
| 9573 | case 1528: /* *smaxv8sf3_round */ |
| 9574 | case 1527: /* *smaxv8sf3 */ |
| 9575 | case 1526: /* *sminv16sf3_mask_round */ |
| 9576 | case 1525: /* *sminv16sf3_mask */ |
| 9577 | case 1524: /* *sminv16sf3_round */ |
| 9578 | case 1523: /* *sminv16sf3 */ |
| 9579 | case 1522: /* *smaxv16sf3_mask_round */ |
| 9580 | case 1521: /* *smaxv16sf3_mask */ |
| 9581 | case 1520: /* *smaxv16sf3_round */ |
| 9582 | case 1519: /* *smaxv16sf3 */ |
| 9583 | case 1440: /* *mulv2df3_mask_round */ |
| 9584 | case 1439: /* *mulv2df3_mask */ |
| 9585 | case 1438: /* *mulv2df3_round */ |
| 9586 | case 1437: /* *mulv2df3 */ |
| 9587 | case 1436: /* *mulv4df3_mask_round */ |
| 9588 | case 1435: /* *mulv4df3_mask */ |
| 9589 | case 1434: /* *mulv4df3_round */ |
| 9590 | case 1433: /* *mulv4df3 */ |
| 9591 | case 1432: /* *mulv8df3_mask_round */ |
| 9592 | case 1431: /* *mulv8df3_mask */ |
| 9593 | case 1430: /* *mulv8df3_round */ |
| 9594 | case 1429: /* *mulv8df3 */ |
| 9595 | case 1428: /* *mulv4sf3_mask_round */ |
| 9596 | case 1427: /* *mulv4sf3_mask */ |
| 9597 | case 1426: /* *mulv4sf3_round */ |
| 9598 | case 1425: /* *mulv4sf3 */ |
| 9599 | case 1424: /* *mulv8sf3_mask_round */ |
| 9600 | case 1423: /* *mulv8sf3_mask */ |
| 9601 | case 1422: /* *mulv8sf3_round */ |
| 9602 | case 1421: /* *mulv8sf3 */ |
| 9603 | case 1420: /* *mulv16sf3_mask_round */ |
| 9604 | case 1419: /* *mulv16sf3_mask */ |
| 9605 | case 1418: /* *mulv16sf3_round */ |
| 9606 | case 1417: /* *mulv16sf3 */ |
| 9607 | case 1408: /* *subv2df3_mask_round */ |
| 9608 | case 1407: /* *subv2df3_mask */ |
| 9609 | case 1406: /* *subv2df3_round */ |
| 9610 | case 1405: /* *subv2df3 */ |
| 9611 | case 1404: /* *addv2df3_mask_round */ |
| 9612 | case 1403: /* *addv2df3_mask */ |
| 9613 | case 1402: /* *addv2df3_round */ |
| 9614 | case 1401: /* *addv2df3 */ |
| 9615 | case 1400: /* *subv4df3_mask_round */ |
| 9616 | case 1399: /* *subv4df3_mask */ |
| 9617 | case 1398: /* *subv4df3_round */ |
| 9618 | case 1397: /* *subv4df3 */ |
| 9619 | case 1396: /* *addv4df3_mask_round */ |
| 9620 | case 1395: /* *addv4df3_mask */ |
| 9621 | case 1394: /* *addv4df3_round */ |
| 9622 | case 1393: /* *addv4df3 */ |
| 9623 | case 1392: /* *subv8df3_mask_round */ |
| 9624 | case 1391: /* *subv8df3_mask */ |
| 9625 | case 1390: /* *subv8df3_round */ |
| 9626 | case 1389: /* *subv8df3 */ |
| 9627 | case 1388: /* *addv8df3_mask_round */ |
| 9628 | case 1387: /* *addv8df3_mask */ |
| 9629 | case 1386: /* *addv8df3_round */ |
| 9630 | case 1385: /* *addv8df3 */ |
| 9631 | case 1384: /* *subv4sf3_mask_round */ |
| 9632 | case 1383: /* *subv4sf3_mask */ |
| 9633 | case 1382: /* *subv4sf3_round */ |
| 9634 | case 1381: /* *subv4sf3 */ |
| 9635 | case 1380: /* *addv4sf3_mask_round */ |
| 9636 | case 1379: /* *addv4sf3_mask */ |
| 9637 | case 1378: /* *addv4sf3_round */ |
| 9638 | case 1377: /* *addv4sf3 */ |
| 9639 | case 1376: /* *subv8sf3_mask_round */ |
| 9640 | case 1375: /* *subv8sf3_mask */ |
| 9641 | case 1374: /* *subv8sf3_round */ |
| 9642 | case 1373: /* *subv8sf3 */ |
| 9643 | case 1372: /* *addv8sf3_mask_round */ |
| 9644 | case 1371: /* *addv8sf3_mask */ |
| 9645 | case 1370: /* *addv8sf3_round */ |
| 9646 | case 1369: /* *addv8sf3 */ |
| 9647 | case 1368: /* *subv16sf3_mask_round */ |
| 9648 | case 1367: /* *subv16sf3_mask */ |
| 9649 | case 1366: /* *subv16sf3_round */ |
| 9650 | case 1365: /* *subv16sf3 */ |
| 9651 | case 1364: /* *addv16sf3_mask_round */ |
| 9652 | case 1363: /* *addv16sf3_mask */ |
| 9653 | case 1362: /* *addv16sf3_round */ |
| 9654 | case 1361: /* *addv16sf3 */ |
| 9655 | return 5; |
| 9656 | |
| 9657 | case 4937: /* storedi_via_sse */ |
| 9658 | case 4936: /* loaddi_via_sse */ |
| 9659 | case 3766: /* sse4a_vmmovntv4sf */ |
| 9660 | case 3764: /* sse4a_movntsf */ |
| 9661 | case 2453: /* sse_movss */ |
| 9662 | case 1298: /* sse2_movntidi */ |
| 9663 | extract_insn_cached (insn); |
| 9664 | if (memory_operand (operands[1], DFmode)) |
| 9665 | { |
| 9666 | return 0; |
| 9667 | } |
| 9668 | else if ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) |
| 9669 | { |
| 9670 | return 1; |
| 9671 | } |
| 9672 | else |
| 9673 | { |
| 9674 | return 2; |
| 9675 | } |
| 9676 | |
| 9677 | case 4758: /* avx512vl_compressstorev2df_mask */ |
| 9678 | case 4757: /* avx512vl_compressstorev2di_mask */ |
| 9679 | case 4756: /* avx512vl_compressstorev4sf_mask */ |
| 9680 | case 4755: /* avx512vl_compressstorev4si_mask */ |
| 9681 | case 4754: /* avx512vl_compressstorev4df_mask */ |
| 9682 | case 4753: /* avx512vl_compressstorev4di_mask */ |
| 9683 | case 4752: /* avx512vl_compressstorev8sf_mask */ |
| 9684 | case 4751: /* avx512vl_compressstorev8si_mask */ |
| 9685 | case 4750: /* avx512f_compressstorev8df_mask */ |
| 9686 | case 4749: /* avx512f_compressstorev8di_mask */ |
| 9687 | case 4748: /* avx512f_compressstorev16sf_mask */ |
| 9688 | case 4747: /* avx512f_compressstorev16si_mask */ |
| 9689 | case 2933: /* avx512f_us_truncatev8div16qi2_mask_store */ |
| 9690 | case 2932: /* avx512f_truncatev8div16qi2_mask_store */ |
| 9691 | case 2931: /* avx512f_ss_truncatev8div16qi2_mask_store */ |
| 9692 | case 2924: /* *avx512f_us_truncatev8div16qi2_store */ |
| 9693 | case 2923: /* *avx512f_truncatev8div16qi2_store */ |
| 9694 | case 2922: /* *avx512f_ss_truncatev8div16qi2_store */ |
| 9695 | case 2918: /* avx512vl_us_truncatev2div2si2_mask_store */ |
| 9696 | case 2917: /* avx512vl_truncatev2div2si2_mask_store */ |
| 9697 | case 2916: /* avx512vl_ss_truncatev2div2si2_mask_store */ |
| 9698 | case 2909: /* *avx512vl_us_truncatev2div2si2_store */ |
| 9699 | case 2908: /* *avx512vl_truncatev2div2si2_store */ |
| 9700 | case 2907: /* *avx512vl_ss_truncatev2div2si2_store */ |
| 9701 | case 2903: /* avx512vl_us_truncatev2div2hi2_mask_store */ |
| 9702 | case 2902: /* avx512vl_truncatev2div2hi2_mask_store */ |
| 9703 | case 2901: /* avx512vl_ss_truncatev2div2hi2_mask_store */ |
| 9704 | case 2894: /* *avx512vl_us_truncatev2div2hi2_store */ |
| 9705 | case 2893: /* *avx512vl_truncatev2div2hi2_store */ |
| 9706 | case 2892: /* *avx512vl_ss_truncatev2div2hi2_store */ |
| 9707 | case 2891: /* avx512vl_us_truncatev4div4hi2_mask_store */ |
| 9708 | case 2890: /* avx512vl_truncatev4div4hi2_mask_store */ |
| 9709 | case 2889: /* avx512vl_ss_truncatev4div4hi2_mask_store */ |
| 9710 | case 2888: /* avx512vl_us_truncatev4siv4hi2_mask_store */ |
| 9711 | case 2887: /* avx512vl_truncatev4siv4hi2_mask_store */ |
| 9712 | case 2886: /* avx512vl_ss_truncatev4siv4hi2_mask_store */ |
| 9713 | case 2873: /* *avx512vl_us_truncatev4div4hi2_store */ |
| 9714 | case 2872: /* *avx512vl_truncatev4div4hi2_store */ |
| 9715 | case 2871: /* *avx512vl_ss_truncatev4div4hi2_store */ |
| 9716 | case 2870: /* *avx512vl_us_truncatev4siv4hi2_store */ |
| 9717 | case 2869: /* *avx512vl_truncatev4siv4hi2_store */ |
| 9718 | case 2868: /* *avx512vl_ss_truncatev4siv4hi2_store */ |
| 9719 | case 2858: /* avx512vl_us_truncatev8siv8qi2_mask_store */ |
| 9720 | case 2857: /* avx512vl_truncatev8siv8qi2_mask_store */ |
| 9721 | case 2856: /* avx512vl_ss_truncatev8siv8qi2_mask_store */ |
| 9722 | case 2855: /* avx512vl_us_truncatev8hiv8qi2_mask_store */ |
| 9723 | case 2854: /* avx512vl_truncatev8hiv8qi2_mask_store */ |
| 9724 | case 2853: /* avx512vl_ss_truncatev8hiv8qi2_mask_store */ |
| 9725 | case 2840: /* *avx512vl_us_truncatev8siv8qi2_store */ |
| 9726 | case 2839: /* *avx512vl_truncatev8siv8qi2_store */ |
| 9727 | case 2838: /* *avx512vl_ss_truncatev8siv8qi2_store */ |
| 9728 | case 2837: /* *avx512vl_us_truncatev8hiv8qi2_store */ |
| 9729 | case 2836: /* *avx512vl_truncatev8hiv8qi2_store */ |
| 9730 | case 2835: /* *avx512vl_ss_truncatev8hiv8qi2_store */ |
| 9731 | case 2834: /* avx512vl_us_truncatev4div4qi2_mask_store */ |
| 9732 | case 2833: /* avx512vl_truncatev4div4qi2_mask_store */ |
| 9733 | case 2832: /* avx512vl_ss_truncatev4div4qi2_mask_store */ |
| 9734 | case 2831: /* avx512vl_us_truncatev4siv4qi2_mask_store */ |
| 9735 | case 2830: /* avx512vl_truncatev4siv4qi2_mask_store */ |
| 9736 | case 2829: /* avx512vl_ss_truncatev4siv4qi2_mask_store */ |
| 9737 | case 2816: /* *avx512vl_us_truncatev4div4qi2_store */ |
| 9738 | case 2815: /* *avx512vl_truncatev4div4qi2_store */ |
| 9739 | case 2814: /* *avx512vl_ss_truncatev4div4qi2_store */ |
| 9740 | case 2813: /* *avx512vl_us_truncatev4siv4qi2_store */ |
| 9741 | case 2812: /* *avx512vl_truncatev4siv4qi2_store */ |
| 9742 | case 2811: /* *avx512vl_ss_truncatev4siv4qi2_store */ |
| 9743 | case 2810: /* avx512vl_us_truncatev2div2qi2_mask_store */ |
| 9744 | case 2809: /* avx512vl_truncatev2div2qi2_mask_store */ |
| 9745 | case 2808: /* avx512vl_ss_truncatev2div2qi2_mask_store */ |
| 9746 | case 2801: /* *avx512vl_us_truncatev2div2qi2_store */ |
| 9747 | case 2800: /* *avx512vl_truncatev2div2qi2_store */ |
| 9748 | case 2799: /* *avx512vl_ss_truncatev2div2qi2_store */ |
| 9749 | case 2783: /* avx512vl_us_truncatev16hiv16qi2_mask */ |
| 9750 | case 2782: /* avx512vl_truncatev16hiv16qi2_mask */ |
| 9751 | case 2781: /* avx512vl_ss_truncatev16hiv16qi2_mask */ |
| 9752 | case 2780: /* avx512vl_us_truncatev8siv8hi2_mask */ |
| 9753 | case 2779: /* avx512vl_truncatev8siv8hi2_mask */ |
| 9754 | case 2778: /* avx512vl_ss_truncatev8siv8hi2_mask */ |
| 9755 | case 2777: /* avx512vl_us_truncatev4div4si2_mask */ |
| 9756 | case 2776: /* avx512vl_truncatev4div4si2_mask */ |
| 9757 | case 2775: /* avx512vl_ss_truncatev4div4si2_mask */ |
| 9758 | case 2774: /* *avx512vl_us_truncatev16hiv16qi2 */ |
| 9759 | case 2773: /* *avx512vl_truncatev16hiv16qi2 */ |
| 9760 | case 2772: /* *avx512vl_ss_truncatev16hiv16qi2 */ |
| 9761 | case 2771: /* *avx512vl_us_truncatev8siv8hi2 */ |
| 9762 | case 2770: /* *avx512vl_truncatev8siv8hi2 */ |
| 9763 | case 2769: /* *avx512vl_ss_truncatev8siv8hi2 */ |
| 9764 | case 2768: /* *avx512vl_us_truncatev4div4si2 */ |
| 9765 | case 2767: /* *avx512vl_truncatev4div4si2 */ |
| 9766 | case 2766: /* *avx512vl_ss_truncatev4div4si2 */ |
| 9767 | case 2765: /* avx512bw_us_truncatev32hiv32qi2_mask */ |
| 9768 | case 2764: /* avx512bw_truncatev32hiv32qi2_mask */ |
| 9769 | case 2763: /* avx512bw_ss_truncatev32hiv32qi2_mask */ |
| 9770 | case 2762: /* avx512bw_us_truncatev32hiv32qi2 */ |
| 9771 | case 2761: /* avx512bw_truncatev32hiv32qi2 */ |
| 9772 | case 2760: /* avx512bw_ss_truncatev32hiv32qi2 */ |
| 9773 | case 2759: /* avx512f_us_truncatev8div8hi2_mask */ |
| 9774 | case 2758: /* avx512f_truncatev8div8hi2_mask */ |
| 9775 | case 2757: /* avx512f_ss_truncatev8div8hi2_mask */ |
| 9776 | case 2756: /* avx512f_us_truncatev8div8si2_mask */ |
| 9777 | case 2755: /* avx512f_truncatev8div8si2_mask */ |
| 9778 | case 2754: /* avx512f_ss_truncatev8div8si2_mask */ |
| 9779 | case 2753: /* avx512f_us_truncatev16siv16hi2_mask */ |
| 9780 | case 2752: /* avx512f_truncatev16siv16hi2_mask */ |
| 9781 | case 2751: /* avx512f_ss_truncatev16siv16hi2_mask */ |
| 9782 | case 2750: /* avx512f_us_truncatev16siv16qi2_mask */ |
| 9783 | case 2749: /* avx512f_truncatev16siv16qi2_mask */ |
| 9784 | case 2748: /* avx512f_ss_truncatev16siv16qi2_mask */ |
| 9785 | case 2747: /* *avx512f_us_truncatev8div8hi2 */ |
| 9786 | case 2746: /* *avx512f_truncatev8div8hi2 */ |
| 9787 | case 2745: /* *avx512f_ss_truncatev8div8hi2 */ |
| 9788 | case 2744: /* *avx512f_us_truncatev8div8si2 */ |
| 9789 | case 2743: /* *avx512f_truncatev8div8si2 */ |
| 9790 | case 2742: /* *avx512f_ss_truncatev8div8si2 */ |
| 9791 | case 2741: /* *avx512f_us_truncatev16siv16hi2 */ |
| 9792 | case 2740: /* *avx512f_truncatev16siv16hi2 */ |
| 9793 | case 2739: /* *avx512f_ss_truncatev16siv16hi2 */ |
| 9794 | case 2738: /* *avx512f_us_truncatev16siv16qi2 */ |
| 9795 | case 2737: /* *avx512f_truncatev16siv16qi2 */ |
| 9796 | case 2736: /* *avx512f_ss_truncatev16siv16qi2 */ |
| 9797 | case 1292: /* avx512vl_storev8hi_mask */ |
| 9798 | case 1291: /* avx512vl_storev16hi_mask */ |
| 9799 | case 1290: /* avx512bw_storev32hi_mask */ |
| 9800 | case 1289: /* avx512vl_storev32qi_mask */ |
| 9801 | case 1288: /* avx512vl_storev16qi_mask */ |
| 9802 | case 1287: /* avx512bw_storev64qi_mask */ |
| 9803 | case 1286: /* avx512vl_storev2df_mask */ |
| 9804 | case 1285: /* avx512vl_storev4df_mask */ |
| 9805 | case 1284: /* avx512f_storev8df_mask */ |
| 9806 | case 1283: /* avx512vl_storev4sf_mask */ |
| 9807 | case 1282: /* avx512vl_storev8sf_mask */ |
| 9808 | case 1281: /* avx512f_storev16sf_mask */ |
| 9809 | case 1280: /* avx512vl_storev2di_mask */ |
| 9810 | case 1279: /* avx512vl_storev4di_mask */ |
| 9811 | case 1278: /* avx512f_storev8di_mask */ |
| 9812 | case 1277: /* avx512vl_storev4si_mask */ |
| 9813 | case 1276: /* avx512vl_storev8si_mask */ |
| 9814 | case 1275: /* avx512f_storev16si_mask */ |
| 9815 | extract_insn_cached (insn); |
| 9816 | if (memory_operand (operands[1], DFmode)) |
| 9817 | { |
| 9818 | return 0; |
| 9819 | } |
| 9820 | else |
| 9821 | { |
| 9822 | return 2; |
| 9823 | } |
| 9824 | |
| 9825 | case 4770: /* avx512vl_expandv2df_mask */ |
| 9826 | case 4769: /* avx512vl_expandv2di_mask */ |
| 9827 | case 4768: /* avx512vl_expandv4sf_mask */ |
| 9828 | case 4767: /* avx512vl_expandv4si_mask */ |
| 9829 | case 4766: /* avx512vl_expandv4df_mask */ |
| 9830 | case 4765: /* avx512vl_expandv4di_mask */ |
| 9831 | case 4764: /* avx512vl_expandv8sf_mask */ |
| 9832 | case 4763: /* avx512vl_expandv8si_mask */ |
| 9833 | case 4762: /* avx512f_expandv8df_mask */ |
| 9834 | case 4761: /* avx512f_expandv8di_mask */ |
| 9835 | case 4760: /* avx512f_expandv16sf_mask */ |
| 9836 | case 4759: /* avx512f_expandv16si_mask */ |
| 9837 | case 1256: /* avx512vl_loadv8hi_mask */ |
| 9838 | case 1255: /* avx512vl_loadv16hi_mask */ |
| 9839 | case 1254: /* avx512bw_loadv32hi_mask */ |
| 9840 | case 1253: /* avx512vl_loadv32qi_mask */ |
| 9841 | case 1252: /* avx512vl_loadv16qi_mask */ |
| 9842 | case 1251: /* avx512bw_loadv64qi_mask */ |
| 9843 | case 1250: /* avx512vl_loadv2df_mask */ |
| 9844 | case 1249: /* avx512vl_loadv4df_mask */ |
| 9845 | case 1248: /* avx512f_loadv8df_mask */ |
| 9846 | case 1247: /* avx512vl_loadv4sf_mask */ |
| 9847 | case 1246: /* avx512vl_loadv8sf_mask */ |
| 9848 | case 1245: /* avx512f_loadv16sf_mask */ |
| 9849 | case 1244: /* avx512vl_loadv2di_mask */ |
| 9850 | case 1243: /* avx512vl_loadv4di_mask */ |
| 9851 | case 1242: /* avx512f_loadv8di_mask */ |
| 9852 | case 1241: /* avx512vl_loadv4si_mask */ |
| 9853 | case 1240: /* avx512vl_loadv8si_mask */ |
| 9854 | case 1239: /* avx512f_loadv16si_mask */ |
| 9855 | extract_constrain_insn_cached (insn); |
| 9856 | if ((memory_operand (operands[1], DFmode)) || (which_alternative != 0)) |
| 9857 | { |
| 9858 | return 0; |
| 9859 | } |
| 9860 | else |
| 9861 | { |
| 9862 | return 2; |
| 9863 | } |
| 9864 | |
| 9865 | case 1160: /* *sse2_umulv1siv1di3 */ |
| 9866 | case 1159: /* *mmx_pmulhrwv4hi3 */ |
| 9867 | case 1158: /* *mmx_pmaddwd */ |
| 9868 | case 1157: /* *mmx_umulv4hi3_highpart */ |
| 9869 | case 1156: /* *mmx_smulv4hi3_highpart */ |
| 9870 | case 1155: /* *mmx_mulv4hi3 */ |
| 9871 | case 1114: /* *mmx_mulv2sf3 */ |
| 9872 | if (get_attr_memory (insn) == MEMORY_LOAD) |
| 9873 | { |
| 9874 | return 4; |
| 9875 | } |
| 9876 | else |
| 9877 | { |
| 9878 | return 3; |
| 9879 | } |
| 9880 | |
| 9881 | case 2197: /* sse2_cvttpd2pi */ |
| 9882 | case 2196: /* sse2_cvtpd2pi */ |
| 9883 | case 2105: /* sse_cvttps2pi */ |
| 9884 | case 2104: /* sse_cvtps2pi */ |
| 9885 | case 1215: /* *mmx_maskmovq */ |
| 9886 | case 1214: /* *mmx_maskmovq */ |
| 9887 | case 1213: /* mmx_pmovmskb */ |
| 9888 | case 1212: /* mmx_psadbw */ |
| 9889 | case 1211: /* *mmx_uavgv4hi3 */ |
| 9890 | case 1210: /* *mmx_uavgv8qi3 */ |
| 9891 | case 1205: /* *vec_dupv2si */ |
| 9892 | case 1204: /* *vec_dupv4hi */ |
| 9893 | case 1203: /* mmx_pswapdv2si2 */ |
| 9894 | case 1202: /* mmx_pshufw_1 */ |
| 9895 | case 1201: /* mmx_pextrw */ |
| 9896 | case 1200: /* *mmx_pinsrw */ |
| 9897 | case 1199: /* mmx_punpckldq */ |
| 9898 | case 1198: /* mmx_punpckhdq */ |
| 9899 | case 1197: /* mmx_punpcklwd */ |
| 9900 | case 1196: /* mmx_punpckhwd */ |
| 9901 | case 1195: /* mmx_punpcklbw */ |
| 9902 | case 1194: /* mmx_punpckhbw */ |
| 9903 | case 1193: /* mmx_packuswb */ |
| 9904 | case 1192: /* mmx_packssdw */ |
| 9905 | case 1191: /* mmx_packsswb */ |
| 9906 | case 1190: /* *mmx_xorv2si3 */ |
| 9907 | case 1189: /* *mmx_iorv2si3 */ |
| 9908 | case 1188: /* *mmx_andv2si3 */ |
| 9909 | case 1187: /* *mmx_xorv4hi3 */ |
| 9910 | case 1186: /* *mmx_iorv4hi3 */ |
| 9911 | case 1185: /* *mmx_andv4hi3 */ |
| 9912 | case 1184: /* *mmx_xorv8qi3 */ |
| 9913 | case 1183: /* *mmx_iorv8qi3 */ |
| 9914 | case 1182: /* *mmx_andv8qi3 */ |
| 9915 | case 1181: /* mmx_andnotv2si3 */ |
| 9916 | case 1180: /* mmx_andnotv4hi3 */ |
| 9917 | case 1179: /* mmx_andnotv8qi3 */ |
| 9918 | case 1178: /* mmx_gtv2si3 */ |
| 9919 | case 1177: /* mmx_gtv4hi3 */ |
| 9920 | case 1176: /* mmx_gtv8qi3 */ |
| 9921 | case 1175: /* *mmx_eqv2si3 */ |
| 9922 | case 1174: /* *mmx_eqv4hi3 */ |
| 9923 | case 1173: /* *mmx_eqv8qi3 */ |
| 9924 | case 1172: /* mmx_lshrv1di3 */ |
| 9925 | case 1171: /* mmx_ashlv1di3 */ |
| 9926 | case 1170: /* mmx_lshrv2si3 */ |
| 9927 | case 1169: /* mmx_ashlv2si3 */ |
| 9928 | case 1168: /* mmx_lshrv4hi3 */ |
| 9929 | case 1167: /* mmx_ashlv4hi3 */ |
| 9930 | case 1166: /* mmx_ashrv2si3 */ |
| 9931 | case 1165: /* mmx_ashrv4hi3 */ |
| 9932 | case 1164: /* *mmx_uminv8qi3 */ |
| 9933 | case 1163: /* *mmx_umaxv8qi3 */ |
| 9934 | case 1162: /* *mmx_sminv4hi3 */ |
| 9935 | case 1161: /* *mmx_smaxv4hi3 */ |
| 9936 | case 1154: /* *mmx_ussubv4hi3 */ |
| 9937 | case 1153: /* *mmx_sssubv4hi3 */ |
| 9938 | case 1152: /* *mmx_usaddv4hi3 */ |
| 9939 | case 1151: /* *mmx_ssaddv4hi3 */ |
| 9940 | case 1150: /* *mmx_ussubv8qi3 */ |
| 9941 | case 1149: /* *mmx_sssubv8qi3 */ |
| 9942 | case 1148: /* *mmx_usaddv8qi3 */ |
| 9943 | case 1147: /* *mmx_ssaddv8qi3 */ |
| 9944 | case 1146: /* *mmx_subv1di3 */ |
| 9945 | case 1145: /* *mmx_addv1di3 */ |
| 9946 | case 1144: /* *mmx_subv2si3 */ |
| 9947 | case 1143: /* *mmx_addv2si3 */ |
| 9948 | case 1142: /* *mmx_subv4hi3 */ |
| 9949 | case 1141: /* *mmx_addv4hi3 */ |
| 9950 | case 1140: /* *mmx_subv8qi3 */ |
| 9951 | case 1139: /* *mmx_addv8qi3 */ |
| 9952 | case 1135: /* *vec_dupv2sf */ |
| 9953 | case 1134: /* mmx_pswapdv2sf2 */ |
| 9954 | case 1133: /* mmx_floatv2si2 */ |
| 9955 | case 1132: /* mmx_pi2fw */ |
| 9956 | case 1131: /* mmx_pf2iw */ |
| 9957 | case 1130: /* mmx_pf2id */ |
| 9958 | case 1129: /* mmx_gev2sf3 */ |
| 9959 | case 1128: /* mmx_gtv2sf3 */ |
| 9960 | case 1127: /* *mmx_eqv2sf3 */ |
| 9961 | case 1126: /* mmx_addsubv2sf3 */ |
| 9962 | case 1125: /* mmx_hsubv2sf3 */ |
| 9963 | case 1124: /* mmx_haddv2sf3 */ |
| 9964 | case 1123: /* mmx_rsqit1v2sf3 */ |
| 9965 | case 1122: /* mmx_rsqrtv2sf2 */ |
| 9966 | case 1121: /* mmx_rcpit2v2sf3 */ |
| 9967 | case 1120: /* mmx_rcpit1v2sf3 */ |
| 9968 | case 1119: /* mmx_rcpv2sf2 */ |
| 9969 | case 1118: /* mmx_ieee_minv2sf3 */ |
| 9970 | case 1117: /* mmx_ieee_maxv2sf3 */ |
| 9971 | case 1116: /* *mmx_sminv2sf3 */ |
| 9972 | case 1115: /* *mmx_smaxv2sf3 */ |
| 9973 | case 1113: /* *mmx_subv2sf3 */ |
| 9974 | case 1112: /* *mmx_addv2sf3 */ |
| 9975 | if (get_attr_memory (insn) == MEMORY_LOAD) |
| 9976 | { |
| 9977 | return 3; |
| 9978 | } |
| 9979 | else |
| 9980 | { |
| 9981 | return 2; |
| 9982 | } |
| 9983 | |
| 9984 | case 1111: /* sse_movntq */ |
| 9985 | if (get_attr_memory (insn) == MEMORY_LOAD) |
| 9986 | { |
| 9987 | return 0; |
| 9988 | } |
| 9989 | else |
| 9990 | { |
| 9991 | return 2; |
| 9992 | } |
| 9993 | |
| 9994 | case 980: /* *movxfcc_1 */ |
| 9995 | return 7; |
| 9996 | |
| 9997 | case 1050: /* fldenv */ |
| 9998 | case 1048: /* xrstors64 */ |
| 9999 | case 1047: /* xrstor64 */ |
| 10000 | case 1046: /* xrstors_rex64 */ |
| 10001 | case 1045: /* xrstor_rex64 */ |
| 10002 | case 1044: /* xrstors */ |
| 10003 | case 1043: /* xrstor */ |
| 10004 | case 1030: /* fxrstor64 */ |
| 10005 | case 1029: /* fxrstor */ |
| 10006 | case 962: /* *rep_stosqi */ |
| 10007 | case 961: /* *rep_stosqi */ |
| 10008 | case 960: /* *rep_stossi */ |
| 10009 | case 959: /* *rep_stossi */ |
| 10010 | case 958: /* *rep_stosdi_rex64 */ |
| 10011 | case 957: /* *rep_stosdi_rex64 */ |
| 10012 | case 956: /* *strsetqi_1 */ |
| 10013 | case 955: /* *strsetqi_1 */ |
| 10014 | case 954: /* *strsethi_1 */ |
| 10015 | case 953: /* *strsethi_1 */ |
| 10016 | case 952: /* *strsetsi_1 */ |
| 10017 | case 951: /* *strsetsi_1 */ |
| 10018 | case 950: /* *strsetdi_rex_1 */ |
| 10019 | case 949: /* *strsetdi_rex_1 */ |
| 10020 | case 948: /* *rep_movqi */ |
| 10021 | case 947: /* *rep_movqi */ |
| 10022 | case 946: /* *rep_movsi */ |
| 10023 | case 945: /* *rep_movsi */ |
| 10024 | case 944: /* *rep_movdi_rex64 */ |
| 10025 | case 943: /* *rep_movdi_rex64 */ |
| 10026 | case 942: /* *strmovqi_1 */ |
| 10027 | case 941: /* *strmovqi_1 */ |
| 10028 | case 940: /* *strmovhi_1 */ |
| 10029 | case 939: /* *strmovhi_1 */ |
| 10030 | case 938: /* *strmovsi_1 */ |
| 10031 | case 937: /* *strmovsi_1 */ |
| 10032 | case 936: /* *strmovdi_rex_1 */ |
| 10033 | case 935: /* *strmovdi_rex_1 */ |
| 10034 | return 6; |
| 10035 | |
| 10036 | case 4746: /* avx512vl_compressv2df_mask */ |
| 10037 | case 4745: /* avx512vl_compressv2di_mask */ |
| 10038 | case 4744: /* avx512vl_compressv4sf_mask */ |
| 10039 | case 4743: /* avx512vl_compressv4si_mask */ |
| 10040 | case 4742: /* avx512vl_compressv4df_mask */ |
| 10041 | case 4741: /* avx512vl_compressv4di_mask */ |
| 10042 | case 4740: /* avx512vl_compressv8sf_mask */ |
| 10043 | case 4739: /* avx512vl_compressv8si_mask */ |
| 10044 | case 4738: /* avx512f_compressv8df_mask */ |
| 10045 | case 4737: /* avx512f_compressv8di_mask */ |
| 10046 | case 4736: /* avx512f_compressv16sf_mask */ |
| 10047 | case 4735: /* avx512f_compressv16si_mask */ |
| 10048 | case 4734: /* *avx512f_scatterdiv2df */ |
| 10049 | case 4733: /* *avx512f_scatterdiv2df */ |
| 10050 | case 4732: /* *avx512f_scatterdiv2di */ |
| 10051 | case 4731: /* *avx512f_scatterdiv2di */ |
| 10052 | case 4730: /* *avx512f_scatterdiv4sf */ |
| 10053 | case 4729: /* *avx512f_scatterdiv4sf */ |
| 10054 | case 4728: /* *avx512f_scatterdiv4si */ |
| 10055 | case 4727: /* *avx512f_scatterdiv4si */ |
| 10056 | case 4726: /* *avx512f_scatterdiv4df */ |
| 10057 | case 4725: /* *avx512f_scatterdiv4df */ |
| 10058 | case 4724: /* *avx512f_scatterdiv4di */ |
| 10059 | case 4723: /* *avx512f_scatterdiv4di */ |
| 10060 | case 4722: /* *avx512f_scatterdiv8sf */ |
| 10061 | case 4721: /* *avx512f_scatterdiv8sf */ |
| 10062 | case 4720: /* *avx512f_scatterdiv8si */ |
| 10063 | case 4719: /* *avx512f_scatterdiv8si */ |
| 10064 | case 4718: /* *avx512f_scatterdiv8df */ |
| 10065 | case 4717: /* *avx512f_scatterdiv8df */ |
| 10066 | case 4716: /* *avx512f_scatterdiv8di */ |
| 10067 | case 4715: /* *avx512f_scatterdiv8di */ |
| 10068 | case 4714: /* *avx512f_scatterdiv16sf */ |
| 10069 | case 4713: /* *avx512f_scatterdiv16sf */ |
| 10070 | case 4712: /* *avx512f_scatterdiv16si */ |
| 10071 | case 4711: /* *avx512f_scatterdiv16si */ |
| 10072 | case 4710: /* *avx512f_scattersiv2df */ |
| 10073 | case 4709: /* *avx512f_scattersiv2df */ |
| 10074 | case 4708: /* *avx512f_scattersiv2di */ |
| 10075 | case 4707: /* *avx512f_scattersiv2di */ |
| 10076 | case 4706: /* *avx512f_scattersiv4sf */ |
| 10077 | case 4705: /* *avx512f_scattersiv4sf */ |
| 10078 | case 4704: /* *avx512f_scattersiv4si */ |
| 10079 | case 4703: /* *avx512f_scattersiv4si */ |
| 10080 | case 4702: /* *avx512f_scattersiv4df */ |
| 10081 | case 4701: /* *avx512f_scattersiv4df */ |
| 10082 | case 4700: /* *avx512f_scattersiv4di */ |
| 10083 | case 4699: /* *avx512f_scattersiv4di */ |
| 10084 | case 4698: /* *avx512f_scattersiv8sf */ |
| 10085 | case 4697: /* *avx512f_scattersiv8sf */ |
| 10086 | case 4696: /* *avx512f_scattersiv8si */ |
| 10087 | case 4695: /* *avx512f_scattersiv8si */ |
| 10088 | case 4694: /* *avx512f_scattersiv8df */ |
| 10089 | case 4693: /* *avx512f_scattersiv8df */ |
| 10090 | case 4692: /* *avx512f_scattersiv8di */ |
| 10091 | case 4691: /* *avx512f_scattersiv8di */ |
| 10092 | case 4690: /* *avx512f_scattersiv16sf */ |
| 10093 | case 4689: /* *avx512f_scattersiv16sf */ |
| 10094 | case 4688: /* *avx512f_scattersiv16si */ |
| 10095 | case 4687: /* *avx512f_scattersiv16si */ |
| 10096 | case 4686: /* *avx512f_gatherdiv2df_2 */ |
| 10097 | case 4685: /* *avx512f_gatherdiv2df_2 */ |
| 10098 | case 4684: /* *avx512f_gatherdiv2di_2 */ |
| 10099 | case 4683: /* *avx512f_gatherdiv2di_2 */ |
| 10100 | case 4682: /* *avx512f_gatherdiv4sf_2 */ |
| 10101 | case 4681: /* *avx512f_gatherdiv4sf_2 */ |
| 10102 | case 4680: /* *avx512f_gatherdiv4si_2 */ |
| 10103 | case 4679: /* *avx512f_gatherdiv4si_2 */ |
| 10104 | case 4678: /* *avx512f_gatherdiv4df_2 */ |
| 10105 | case 4677: /* *avx512f_gatherdiv4df_2 */ |
| 10106 | case 4676: /* *avx512f_gatherdiv4di_2 */ |
| 10107 | case 4675: /* *avx512f_gatherdiv4di_2 */ |
| 10108 | case 4674: /* *avx512f_gatherdiv8sf_2 */ |
| 10109 | case 4673: /* *avx512f_gatherdiv8sf_2 */ |
| 10110 | case 4672: /* *avx512f_gatherdiv8si_2 */ |
| 10111 | case 4671: /* *avx512f_gatherdiv8si_2 */ |
| 10112 | case 4670: /* *avx512f_gatherdiv8df_2 */ |
| 10113 | case 4669: /* *avx512f_gatherdiv8df_2 */ |
| 10114 | case 4668: /* *avx512f_gatherdiv8di_2 */ |
| 10115 | case 4667: /* *avx512f_gatherdiv8di_2 */ |
| 10116 | case 4666: /* *avx512f_gatherdiv16sf_2 */ |
| 10117 | case 4665: /* *avx512f_gatherdiv16sf_2 */ |
| 10118 | case 4664: /* *avx512f_gatherdiv16si_2 */ |
| 10119 | case 4663: /* *avx512f_gatherdiv16si_2 */ |
| 10120 | case 4662: /* *avx512f_gatherdiv2df */ |
| 10121 | case 4661: /* *avx512f_gatherdiv2df */ |
| 10122 | case 4660: /* *avx512f_gatherdiv2di */ |
| 10123 | case 4659: /* *avx512f_gatherdiv2di */ |
| 10124 | case 4658: /* *avx512f_gatherdiv4sf */ |
| 10125 | case 4657: /* *avx512f_gatherdiv4sf */ |
| 10126 | case 4656: /* *avx512f_gatherdiv4si */ |
| 10127 | case 4655: /* *avx512f_gatherdiv4si */ |
| 10128 | case 4654: /* *avx512f_gatherdiv4df */ |
| 10129 | case 4653: /* *avx512f_gatherdiv4df */ |
| 10130 | case 4652: /* *avx512f_gatherdiv4di */ |
| 10131 | case 4651: /* *avx512f_gatherdiv4di */ |
| 10132 | case 4650: /* *avx512f_gatherdiv8sf */ |
| 10133 | case 4649: /* *avx512f_gatherdiv8sf */ |
| 10134 | case 4648: /* *avx512f_gatherdiv8si */ |
| 10135 | case 4647: /* *avx512f_gatherdiv8si */ |
| 10136 | case 4646: /* *avx512f_gatherdiv8df */ |
| 10137 | case 4645: /* *avx512f_gatherdiv8df */ |
| 10138 | case 4644: /* *avx512f_gatherdiv8di */ |
| 10139 | case 4643: /* *avx512f_gatherdiv8di */ |
| 10140 | case 4642: /* *avx512f_gatherdiv16sf */ |
| 10141 | case 4641: /* *avx512f_gatherdiv16sf */ |
| 10142 | case 4640: /* *avx512f_gatherdiv16si */ |
| 10143 | case 4639: /* *avx512f_gatherdiv16si */ |
| 10144 | case 4638: /* *avx512f_gathersiv2df_2 */ |
| 10145 | case 4637: /* *avx512f_gathersiv2df_2 */ |
| 10146 | case 4636: /* *avx512f_gathersiv2di_2 */ |
| 10147 | case 4635: /* *avx512f_gathersiv2di_2 */ |
| 10148 | case 4634: /* *avx512f_gathersiv4sf_2 */ |
| 10149 | case 4633: /* *avx512f_gathersiv4sf_2 */ |
| 10150 | case 4632: /* *avx512f_gathersiv4si_2 */ |
| 10151 | case 4631: /* *avx512f_gathersiv4si_2 */ |
| 10152 | case 4630: /* *avx512f_gathersiv4df_2 */ |
| 10153 | case 4629: /* *avx512f_gathersiv4df_2 */ |
| 10154 | case 4628: /* *avx512f_gathersiv4di_2 */ |
| 10155 | case 4627: /* *avx512f_gathersiv4di_2 */ |
| 10156 | case 4626: /* *avx512f_gathersiv8sf_2 */ |
| 10157 | case 4625: /* *avx512f_gathersiv8sf_2 */ |
| 10158 | case 4624: /* *avx512f_gathersiv8si_2 */ |
| 10159 | case 4623: /* *avx512f_gathersiv8si_2 */ |
| 10160 | case 4622: /* *avx512f_gathersiv8df_2 */ |
| 10161 | case 4621: /* *avx512f_gathersiv8df_2 */ |
| 10162 | case 4620: /* *avx512f_gathersiv8di_2 */ |
| 10163 | case 4619: /* *avx512f_gathersiv8di_2 */ |
| 10164 | case 4618: /* *avx512f_gathersiv16sf_2 */ |
| 10165 | case 4617: /* *avx512f_gathersiv16sf_2 */ |
| 10166 | case 4616: /* *avx512f_gathersiv16si_2 */ |
| 10167 | case 4615: /* *avx512f_gathersiv16si_2 */ |
| 10168 | case 4614: /* *avx512f_gathersiv2df */ |
| 10169 | case 4613: /* *avx512f_gathersiv2df */ |
| 10170 | case 4612: /* *avx512f_gathersiv2di */ |
| 10171 | case 4611: /* *avx512f_gathersiv2di */ |
| 10172 | case 4610: /* *avx512f_gathersiv4sf */ |
| 10173 | case 4609: /* *avx512f_gathersiv4sf */ |
| 10174 | case 4608: /* *avx512f_gathersiv4si */ |
| 10175 | case 4607: /* *avx512f_gathersiv4si */ |
| 10176 | case 4606: /* *avx512f_gathersiv4df */ |
| 10177 | case 4605: /* *avx512f_gathersiv4df */ |
| 10178 | case 4604: /* *avx512f_gathersiv4di */ |
| 10179 | case 4603: /* *avx512f_gathersiv4di */ |
| 10180 | case 4602: /* *avx512f_gathersiv8sf */ |
| 10181 | case 4601: /* *avx512f_gathersiv8sf */ |
| 10182 | case 4600: /* *avx512f_gathersiv8si */ |
| 10183 | case 4599: /* *avx512f_gathersiv8si */ |
| 10184 | case 4598: /* *avx512f_gathersiv8df */ |
| 10185 | case 4597: /* *avx512f_gathersiv8df */ |
| 10186 | case 4596: /* *avx512f_gathersiv8di */ |
| 10187 | case 4595: /* *avx512f_gathersiv8di */ |
| 10188 | case 4594: /* *avx512f_gathersiv16sf */ |
| 10189 | case 4593: /* *avx512f_gathersiv16sf */ |
| 10190 | case 4592: /* *avx512f_gathersiv16si */ |
| 10191 | case 4591: /* *avx512f_gathersiv16si */ |
| 10192 | case 4590: /* *avx2_gatherdiv8sf_4 */ |
| 10193 | case 4589: /* *avx2_gatherdiv8sf_4 */ |
| 10194 | case 4588: /* *avx2_gatherdiv8si_4 */ |
| 10195 | case 4587: /* *avx2_gatherdiv8si_4 */ |
| 10196 | case 4586: /* *avx2_gatherdiv8sf_3 */ |
| 10197 | case 4585: /* *avx2_gatherdiv8sf_3 */ |
| 10198 | case 4584: /* *avx2_gatherdiv8si_3 */ |
| 10199 | case 4583: /* *avx2_gatherdiv8si_3 */ |
| 10200 | case 4582: /* *avx2_gatherdiv8sf_2 */ |
| 10201 | case 4581: /* *avx2_gatherdiv8sf_2 */ |
| 10202 | case 4580: /* *avx2_gatherdiv8si_2 */ |
| 10203 | case 4579: /* *avx2_gatherdiv8si_2 */ |
| 10204 | case 4578: /* *avx2_gatherdiv4sf_2 */ |
| 10205 | case 4577: /* *avx2_gatherdiv4sf_2 */ |
| 10206 | case 4576: /* *avx2_gatherdiv4si_2 */ |
| 10207 | case 4575: /* *avx2_gatherdiv4si_2 */ |
| 10208 | case 4574: /* *avx2_gatherdiv4df_2 */ |
| 10209 | case 4573: /* *avx2_gatherdiv4df_2 */ |
| 10210 | case 4572: /* *avx2_gatherdiv4di_2 */ |
| 10211 | case 4571: /* *avx2_gatherdiv4di_2 */ |
| 10212 | case 4570: /* *avx2_gatherdiv2df_2 */ |
| 10213 | case 4569: /* *avx2_gatherdiv2df_2 */ |
| 10214 | case 4568: /* *avx2_gatherdiv2di_2 */ |
| 10215 | case 4567: /* *avx2_gatherdiv2di_2 */ |
| 10216 | case 4566: /* *avx2_gatherdiv8sf */ |
| 10217 | case 4565: /* *avx2_gatherdiv8sf */ |
| 10218 | case 4564: /* *avx2_gatherdiv8si */ |
| 10219 | case 4563: /* *avx2_gatherdiv8si */ |
| 10220 | case 4562: /* *avx2_gatherdiv4sf */ |
| 10221 | case 4561: /* *avx2_gatherdiv4sf */ |
| 10222 | case 4560: /* *avx2_gatherdiv4si */ |
| 10223 | case 4559: /* *avx2_gatherdiv4si */ |
| 10224 | case 4558: /* *avx2_gatherdiv4df */ |
| 10225 | case 4557: /* *avx2_gatherdiv4df */ |
| 10226 | case 4556: /* *avx2_gatherdiv4di */ |
| 10227 | case 4555: /* *avx2_gatherdiv4di */ |
| 10228 | case 4554: /* *avx2_gatherdiv2df */ |
| 10229 | case 4553: /* *avx2_gatherdiv2df */ |
| 10230 | case 4552: /* *avx2_gatherdiv2di */ |
| 10231 | case 4551: /* *avx2_gatherdiv2di */ |
| 10232 | case 4550: /* *avx2_gathersiv8sf_2 */ |
| 10233 | case 4549: /* *avx2_gathersiv8sf_2 */ |
| 10234 | case 4548: /* *avx2_gathersiv8si_2 */ |
| 10235 | case 4547: /* *avx2_gathersiv8si_2 */ |
| 10236 | case 4546: /* *avx2_gathersiv4sf_2 */ |
| 10237 | case 4545: /* *avx2_gathersiv4sf_2 */ |
| 10238 | case 4544: /* *avx2_gathersiv4si_2 */ |
| 10239 | case 4543: /* *avx2_gathersiv4si_2 */ |
| 10240 | case 4542: /* *avx2_gathersiv4df_2 */ |
| 10241 | case 4541: /* *avx2_gathersiv4df_2 */ |
| 10242 | case 4540: /* *avx2_gathersiv4di_2 */ |
| 10243 | case 4539: /* *avx2_gathersiv4di_2 */ |
| 10244 | case 4538: /* *avx2_gathersiv2df_2 */ |
| 10245 | case 4537: /* *avx2_gathersiv2df_2 */ |
| 10246 | case 4536: /* *avx2_gathersiv2di_2 */ |
| 10247 | case 4535: /* *avx2_gathersiv2di_2 */ |
| 10248 | case 4534: /* *avx2_gathersiv8sf */ |
| 10249 | case 4533: /* *avx2_gathersiv8sf */ |
| 10250 | case 4532: /* *avx2_gathersiv8si */ |
| 10251 | case 4531: /* *avx2_gathersiv8si */ |
| 10252 | case 4530: /* *avx2_gathersiv4sf */ |
| 10253 | case 4529: /* *avx2_gathersiv4sf */ |
| 10254 | case 4528: /* *avx2_gathersiv4si */ |
| 10255 | case 4527: /* *avx2_gathersiv4si */ |
| 10256 | case 4526: /* *avx2_gathersiv4df */ |
| 10257 | case 4525: /* *avx2_gathersiv4df */ |
| 10258 | case 4524: /* *avx2_gathersiv4di */ |
| 10259 | case 4523: /* *avx2_gathersiv4di */ |
| 10260 | case 4522: /* *avx2_gathersiv2df */ |
| 10261 | case 4521: /* *avx2_gathersiv2df */ |
| 10262 | case 4520: /* *avx2_gathersiv2di */ |
| 10263 | case 4519: /* *avx2_gathersiv2di */ |
| 10264 | case 4243: /* avx512dq_broadcastv4df_mask_1 */ |
| 10265 | case 4242: /* *avx512dq_broadcastv4df_1 */ |
| 10266 | case 4241: /* avx512dq_broadcastv4di_mask_1 */ |
| 10267 | case 4240: /* *avx512dq_broadcastv4di_1 */ |
| 10268 | case 4239: /* avx512dq_broadcastv8df_mask_1 */ |
| 10269 | case 4238: /* *avx512dq_broadcastv8df_1 */ |
| 10270 | case 4237: /* avx512dq_broadcastv8di_mask_1 */ |
| 10271 | case 4236: /* *avx512dq_broadcastv8di_1 */ |
| 10272 | case 4235: /* avx512dq_broadcastv16si_mask_1 */ |
| 10273 | case 4234: /* *avx512dq_broadcastv16si_1 */ |
| 10274 | case 4233: /* avx512dq_broadcastv16sf_mask_1 */ |
| 10275 | case 4232: /* *avx512dq_broadcastv16sf_1 */ |
| 10276 | case 4231: /* avx512vl_broadcastv8sf_mask_1 */ |
| 10277 | case 4230: /* *avx512vl_broadcastv8sf_1 */ |
| 10278 | case 4229: /* avx512vl_broadcastv8si_mask_1 */ |
| 10279 | case 4228: /* *avx512vl_broadcastv8si_1 */ |
| 10280 | case 4227: /* avx512dq_broadcastv8sf_mask */ |
| 10281 | case 4226: /* *avx512dq_broadcastv8sf */ |
| 10282 | case 4225: /* avx512dq_broadcastv16sf_mask */ |
| 10283 | case 4224: /* *avx512dq_broadcastv16sf */ |
| 10284 | case 4223: /* avx512dq_broadcastv4si_mask */ |
| 10285 | case 4222: /* *avx512dq_broadcastv4si */ |
| 10286 | case 4221: /* avx512dq_broadcastv8si_mask */ |
| 10287 | case 4220: /* *avx512dq_broadcastv8si */ |
| 10288 | case 4219: /* avx512dq_broadcastv16si_mask */ |
| 10289 | case 4218: /* *avx512dq_broadcastv16si */ |
| 10290 | case 4211: /* vec_dupv4df */ |
| 10291 | case 4210: /* vec_dupv4di */ |
| 10292 | case 4209: /* vec_dupv8sf */ |
| 10293 | case 4208: /* vec_dupv8si */ |
| 10294 | case 4207: /* *vec_dupv4si */ |
| 10295 | case 4206: /* *vec_dupv8si */ |
| 10296 | case 4205: /* *vec_dupv8hi */ |
| 10297 | case 4204: /* *vec_dupv16hi */ |
| 10298 | case 4203: /* *vec_dupv16qi */ |
| 10299 | case 4202: /* *vec_dupv32qi */ |
| 10300 | case 4201: /* avx2_vbroadcasti128_v4di */ |
| 10301 | case 4200: /* avx2_vbroadcasti128_v8si */ |
| 10302 | case 4199: /* avx2_vbroadcasti128_v16hi */ |
| 10303 | case 4198: /* avx2_vbroadcasti128_v32qi */ |
| 10304 | case 4194: /* avx512vl_vec_dup_gprv2df_mask */ |
| 10305 | case 4193: /* *avx512vl_vec_dup_gprv2df */ |
| 10306 | case 4192: /* avx512vl_vec_dup_gprv4df_mask */ |
| 10307 | case 4191: /* *avx512vl_vec_dup_gprv4df */ |
| 10308 | case 4190: /* avx512f_vec_dup_gprv8df_mask */ |
| 10309 | case 4189: /* *avx512f_vec_dup_gprv8df */ |
| 10310 | case 4188: /* avx512vl_vec_dup_gprv4sf_mask */ |
| 10311 | case 4187: /* *avx512vl_vec_dup_gprv4sf */ |
| 10312 | case 4186: /* avx512vl_vec_dup_gprv8sf_mask */ |
| 10313 | case 4185: /* *avx512vl_vec_dup_gprv8sf */ |
| 10314 | case 4184: /* avx512f_vec_dup_gprv16sf_mask */ |
| 10315 | case 4183: /* *avx512f_vec_dup_gprv16sf */ |
| 10316 | case 4182: /* avx512vl_vec_dup_gprv2di_mask */ |
| 10317 | case 4181: /* *avx512vl_vec_dup_gprv2di */ |
| 10318 | case 4180: /* avx512vl_vec_dup_gprv4di_mask */ |
| 10319 | case 4179: /* *avx512vl_vec_dup_gprv4di */ |
| 10320 | case 4178: /* avx512f_vec_dup_gprv8di_mask */ |
| 10321 | case 4177: /* *avx512f_vec_dup_gprv8di */ |
| 10322 | case 4176: /* avx512vl_vec_dup_gprv4si_mask */ |
| 10323 | case 4175: /* *avx512vl_vec_dup_gprv4si */ |
| 10324 | case 4174: /* avx512vl_vec_dup_gprv8si_mask */ |
| 10325 | case 4173: /* *avx512vl_vec_dup_gprv8si */ |
| 10326 | case 4172: /* avx512f_vec_dup_gprv16si_mask */ |
| 10327 | case 4171: /* *avx512f_vec_dup_gprv16si */ |
| 10328 | case 4170: /* avx512vl_vec_dup_gprv8hi_mask */ |
| 10329 | case 4169: /* *avx512vl_vec_dup_gprv8hi */ |
| 10330 | case 4168: /* avx512vl_vec_dup_gprv16hi_mask */ |
| 10331 | case 4167: /* *avx512vl_vec_dup_gprv16hi */ |
| 10332 | case 4166: /* avx512bw_vec_dup_gprv32hi_mask */ |
| 10333 | case 4165: /* *avx512bw_vec_dup_gprv32hi */ |
| 10334 | case 4164: /* avx512vl_vec_dup_gprv32qi_mask */ |
| 10335 | case 4163: /* *avx512vl_vec_dup_gprv32qi */ |
| 10336 | case 4162: /* avx512vl_vec_dup_gprv16qi_mask */ |
| 10337 | case 4161: /* *avx512vl_vec_dup_gprv16qi */ |
| 10338 | case 4160: /* avx512bw_vec_dup_gprv64qi_mask */ |
| 10339 | case 4159: /* *avx512bw_vec_dup_gprv64qi */ |
| 10340 | case 4158: /* avx512f_broadcastv8di_mask */ |
| 10341 | case 4157: /* *avx512f_broadcastv8di */ |
| 10342 | case 4156: /* avx512f_broadcastv8df_mask */ |
| 10343 | case 4155: /* *avx512f_broadcastv8df */ |
| 10344 | case 4154: /* avx512f_broadcastv16si_mask */ |
| 10345 | case 4153: /* *avx512f_broadcastv16si */ |
| 10346 | case 4152: /* avx512f_broadcastv16sf_mask */ |
| 10347 | case 4151: /* *avx512f_broadcastv16sf */ |
| 10348 | case 4150: /* avx512vl_vec_dupv8hi_mask */ |
| 10349 | case 4149: /* avx512vl_vec_dupv8hi */ |
| 10350 | case 4148: /* avx512vl_vec_dupv16hi_mask */ |
| 10351 | case 4147: /* avx512vl_vec_dupv16hi */ |
| 10352 | case 4146: /* avx512bw_vec_dupv32hi_mask */ |
| 10353 | case 4145: /* avx512bw_vec_dupv32hi */ |
| 10354 | case 4144: /* avx512vl_vec_dupv32qi_mask */ |
| 10355 | case 4143: /* avx512vl_vec_dupv32qi */ |
| 10356 | case 4142: /* avx512vl_vec_dupv16qi_mask */ |
| 10357 | case 4141: /* avx512vl_vec_dupv16qi */ |
| 10358 | case 4140: /* avx512bw_vec_dupv64qi_mask */ |
| 10359 | case 4139: /* avx512bw_vec_dupv64qi */ |
| 10360 | case 4138: /* avx512vl_vec_dupv2df_mask */ |
| 10361 | case 4137: /* avx512vl_vec_dupv2df */ |
| 10362 | case 4136: /* avx512vl_vec_dupv4df_mask */ |
| 10363 | case 4135: /* avx512vl_vec_dupv4df */ |
| 10364 | case 4134: /* avx512f_vec_dupv8df_mask */ |
| 10365 | case 4133: /* avx512f_vec_dupv8df */ |
| 10366 | case 4132: /* avx512vl_vec_dupv4sf_mask */ |
| 10367 | case 4131: /* avx512vl_vec_dupv4sf */ |
| 10368 | case 4130: /* avx512vl_vec_dupv8sf_mask */ |
| 10369 | case 4129: /* avx512vl_vec_dupv8sf */ |
| 10370 | case 4128: /* avx512f_vec_dupv16sf_mask */ |
| 10371 | case 4127: /* avx512f_vec_dupv16sf */ |
| 10372 | case 4126: /* avx512vl_vec_dupv2di_mask */ |
| 10373 | case 4125: /* avx512vl_vec_dupv2di */ |
| 10374 | case 4124: /* avx512vl_vec_dupv4di_mask */ |
| 10375 | case 4123: /* avx512vl_vec_dupv4di */ |
| 10376 | case 4122: /* avx512f_vec_dupv8di_mask */ |
| 10377 | case 4121: /* avx512f_vec_dupv8di */ |
| 10378 | case 4120: /* avx512vl_vec_dupv4si_mask */ |
| 10379 | case 4119: /* avx512vl_vec_dupv4si */ |
| 10380 | case 4118: /* avx512vl_vec_dupv8si_mask */ |
| 10381 | case 4117: /* avx512vl_vec_dupv8si */ |
| 10382 | case 4116: /* avx512f_vec_dupv16si_mask */ |
| 10383 | case 4115: /* avx512f_vec_dupv16si */ |
| 10384 | case 4114: /* avx512bw_vec_dupv64qi_1 */ |
| 10385 | case 4113: /* avx512bw_vec_dupv32hi_1 */ |
| 10386 | case 4112: /* avx512f_vec_dupv8di_1 */ |
| 10387 | case 4111: /* avx512f_vec_dupv16si_1 */ |
| 10388 | case 4072: /* avx2_pbroadcastv4di_1 */ |
| 10389 | case 4071: /* avx2_pbroadcastv8si_1 */ |
| 10390 | case 4070: /* avx2_pbroadcastv16hi_1 */ |
| 10391 | case 4069: /* avx2_pbroadcastv32qi_1 */ |
| 10392 | case 4068: /* avx2_pbroadcastv2di */ |
| 10393 | case 4067: /* avx2_pbroadcastv4di */ |
| 10394 | case 4066: /* avx2_pbroadcastv4si */ |
| 10395 | case 4065: /* avx2_pbroadcastv8si */ |
| 10396 | case 4064: /* avx2_pbroadcastv8hi */ |
| 10397 | case 4063: /* avx2_pbroadcastv16hi */ |
| 10398 | case 4062: /* avx2_pbroadcastv32hi */ |
| 10399 | case 4061: /* avx2_pbroadcastv16qi */ |
| 10400 | case 4060: /* avx2_pbroadcastv32qi */ |
| 10401 | case 4059: /* avx2_pbroadcastv64qi */ |
| 10402 | case 4058: /* avx2_pbroadcastv8di */ |
| 10403 | case 4057: /* avx2_pbroadcastv16si */ |
| 10404 | case 3873: /* sse4_1_zero_extendv2siv2di2_mask */ |
| 10405 | case 3872: /* sse4_1_zero_extendv2siv2di2 */ |
| 10406 | case 3871: /* sse4_1_sign_extendv2siv2di2_mask */ |
| 10407 | case 3870: /* sse4_1_sign_extendv2siv2di2 */ |
| 10408 | case 3869: /* avx2_zero_extendv4siv4di2_mask */ |
| 10409 | case 3868: /* avx2_zero_extendv4siv4di2 */ |
| 10410 | case 3867: /* avx2_sign_extendv4siv4di2_mask */ |
| 10411 | case 3866: /* avx2_sign_extendv4siv4di2 */ |
| 10412 | case 3865: /* avx512f_zero_extendv8siv8di2_mask */ |
| 10413 | case 3864: /* avx512f_zero_extendv8siv8di2 */ |
| 10414 | case 3863: /* avx512f_sign_extendv8siv8di2_mask */ |
| 10415 | case 3862: /* avx512f_sign_extendv8siv8di2 */ |
| 10416 | case 3861: /* sse4_1_zero_extendv2hiv2di2_mask */ |
| 10417 | case 3860: /* sse4_1_zero_extendv2hiv2di2 */ |
| 10418 | case 3859: /* sse4_1_sign_extendv2hiv2di2_mask */ |
| 10419 | case 3858: /* sse4_1_sign_extendv2hiv2di2 */ |
| 10420 | case 3857: /* avx2_zero_extendv4hiv4di2_mask */ |
| 10421 | case 3856: /* avx2_zero_extendv4hiv4di2 */ |
| 10422 | case 3855: /* avx2_sign_extendv4hiv4di2_mask */ |
| 10423 | case 3854: /* avx2_sign_extendv4hiv4di2 */ |
| 10424 | case 3853: /* avx512f_zero_extendv8hiv8di2_mask */ |
| 10425 | case 3852: /* avx512f_zero_extendv8hiv8di2 */ |
| 10426 | case 3851: /* avx512f_sign_extendv8hiv8di2_mask */ |
| 10427 | case 3850: /* avx512f_sign_extendv8hiv8di2 */ |
| 10428 | case 3849: /* sse4_1_zero_extendv2qiv2di2_mask */ |
| 10429 | case 3848: /* sse4_1_zero_extendv2qiv2di2 */ |
| 10430 | case 3847: /* sse4_1_sign_extendv2qiv2di2_mask */ |
| 10431 | case 3846: /* sse4_1_sign_extendv2qiv2di2 */ |
| 10432 | case 3845: /* avx2_zero_extendv4qiv4di2_mask */ |
| 10433 | case 3844: /* avx2_zero_extendv4qiv4di2 */ |
| 10434 | case 3843: /* avx2_sign_extendv4qiv4di2_mask */ |
| 10435 | case 3842: /* avx2_sign_extendv4qiv4di2 */ |
| 10436 | case 3841: /* avx512f_zero_extendv8qiv8di2_mask */ |
| 10437 | case 3840: /* avx512f_zero_extendv8qiv8di2 */ |
| 10438 | case 3839: /* avx512f_sign_extendv8qiv8di2_mask */ |
| 10439 | case 3838: /* avx512f_sign_extendv8qiv8di2 */ |
| 10440 | case 3837: /* sse4_1_zero_extendv4hiv4si2_mask */ |
| 10441 | case 3836: /* sse4_1_zero_extendv4hiv4si2 */ |
| 10442 | case 3835: /* sse4_1_sign_extendv4hiv4si2_mask */ |
| 10443 | case 3834: /* sse4_1_sign_extendv4hiv4si2 */ |
| 10444 | case 3833: /* avx2_zero_extendv8hiv8si2_mask */ |
| 10445 | case 3832: /* avx2_zero_extendv8hiv8si2 */ |
| 10446 | case 3831: /* avx2_sign_extendv8hiv8si2_mask */ |
| 10447 | case 3830: /* avx2_sign_extendv8hiv8si2 */ |
| 10448 | case 3829: /* avx512f_zero_extendv16hiv16si2_mask */ |
| 10449 | case 3828: /* avx512f_zero_extendv16hiv16si2 */ |
| 10450 | case 3827: /* avx512f_sign_extendv16hiv16si2_mask */ |
| 10451 | case 3826: /* avx512f_sign_extendv16hiv16si2 */ |
| 10452 | case 3825: /* sse4_1_zero_extendv4qiv4si2_mask */ |
| 10453 | case 3824: /* sse4_1_zero_extendv4qiv4si2 */ |
| 10454 | case 3823: /* sse4_1_sign_extendv4qiv4si2_mask */ |
| 10455 | case 3822: /* sse4_1_sign_extendv4qiv4si2 */ |
| 10456 | case 3821: /* avx2_zero_extendv8qiv8si2_mask */ |
| 10457 | case 3820: /* avx2_zero_extendv8qiv8si2 */ |
| 10458 | case 3819: /* avx2_sign_extendv8qiv8si2_mask */ |
| 10459 | case 3818: /* avx2_sign_extendv8qiv8si2 */ |
| 10460 | case 3817: /* avx512f_zero_extendv16qiv16si2_mask */ |
| 10461 | case 3816: /* *avx512f_zero_extendv16qiv16si2 */ |
| 10462 | case 3815: /* avx512f_sign_extendv16qiv16si2_mask */ |
| 10463 | case 3814: /* *avx512f_sign_extendv16qiv16si2 */ |
| 10464 | case 3813: /* sse4_1_zero_extendv8qiv8hi2_mask */ |
| 10465 | case 3812: /* sse4_1_zero_extendv8qiv8hi2 */ |
| 10466 | case 3811: /* sse4_1_sign_extendv8qiv8hi2_mask */ |
| 10467 | case 3810: /* sse4_1_sign_extendv8qiv8hi2 */ |
| 10468 | case 3809: /* avx512bw_zero_extendv32qiv32hi2_mask */ |
| 10469 | case 3808: /* avx512bw_zero_extendv32qiv32hi2 */ |
| 10470 | case 3807: /* avx512bw_sign_extendv32qiv32hi2_mask */ |
| 10471 | case 3806: /* avx512bw_sign_extendv32qiv32hi2 */ |
| 10472 | case 3805: /* avx2_zero_extendv16qiv16hi2_mask */ |
| 10473 | case 3804: /* avx2_zero_extendv16qiv16hi2 */ |
| 10474 | case 3803: /* avx2_sign_extendv16qiv16hi2_mask */ |
| 10475 | case 3802: /* avx2_sign_extendv16qiv16hi2 */ |
| 10476 | case 3800: /* avx2_pblenddv4si */ |
| 10477 | case 3799: /* avx2_pblenddv8si */ |
| 10478 | case 3798: /* *avx2_pblendw */ |
| 10479 | case 3797: /* sse4_1_pblendw */ |
| 10480 | case 3796: /* sse4_1_pblendvb */ |
| 10481 | case 3795: /* avx2_pblendvb */ |
| 10482 | case 3786: /* sse4_1_movntdqa */ |
| 10483 | case 3785: /* avx2_movntdqa */ |
| 10484 | case 3784: /* avx512f_movntdqa */ |
| 10485 | case 3779: /* sse4_1_blendvpd */ |
| 10486 | case 3778: /* avx_blendvpd256 */ |
| 10487 | case 3777: /* sse4_1_blendvps */ |
| 10488 | case 3776: /* avx_blendvps256 */ |
| 10489 | case 3775: /* sse4_1_blendpd */ |
| 10490 | case 3774: /* avx_blendpd256 */ |
| 10491 | case 3773: /* sse4_1_blendps */ |
| 10492 | case 3772: /* avx_blendps256 */ |
| 10493 | case 3767: /* sse4a_vmmovntv2df */ |
| 10494 | case 3765: /* sse4a_movntdf */ |
| 10495 | case 3671: /* *sse2_maskmovdqu */ |
| 10496 | case 3670: /* *sse2_maskmovdqu */ |
| 10497 | case 3669: /* *sse2_pmovmskb_zext */ |
| 10498 | case 3668: /* *avx2_pmovmskb_zext */ |
| 10499 | case 3667: /* sse2_pmovmskb */ |
| 10500 | case 3666: /* avx2_pmovmskb */ |
| 10501 | case 3665: /* *sse2_movmskpd_zext */ |
| 10502 | case 3664: /* *avx_movmskpd256_zext */ |
| 10503 | case 3663: /* *sse_movmskps_zext */ |
| 10504 | case 3662: /* *avx_movmskps256_zext */ |
| 10505 | case 3661: /* sse2_movmskpd */ |
| 10506 | case 3660: /* avx_movmskpd256 */ |
| 10507 | case 3659: /* sse_movmskps */ |
| 10508 | case 3658: /* avx_movmskps256 */ |
| 10509 | case 2930: /* *avx512f_us_truncatev8div16qi2_mask_1 */ |
| 10510 | case 2929: /* *avx512f_truncatev8div16qi2_mask_1 */ |
| 10511 | case 2928: /* *avx512f_ss_truncatev8div16qi2_mask_1 */ |
| 10512 | case 2927: /* avx512f_us_truncatev8div16qi2_mask */ |
| 10513 | case 2926: /* avx512f_truncatev8div16qi2_mask */ |
| 10514 | case 2925: /* avx512f_ss_truncatev8div16qi2_mask */ |
| 10515 | case 2921: /* *avx512f_us_truncatev8div16qi2 */ |
| 10516 | case 2920: /* *avx512f_truncatev8div16qi2 */ |
| 10517 | case 2919: /* *avx512f_ss_truncatev8div16qi2 */ |
| 10518 | case 2915: /* *avx512vl_us_truncatev2div2si2_mask_1 */ |
| 10519 | case 2914: /* *avx512vl_truncatev2div2si2_mask_1 */ |
| 10520 | case 2913: /* *avx512vl_ss_truncatev2div2si2_mask_1 */ |
| 10521 | case 2912: /* avx512vl_us_truncatev2div2si2_mask */ |
| 10522 | case 2911: /* avx512vl_truncatev2div2si2_mask */ |
| 10523 | case 2910: /* avx512vl_ss_truncatev2div2si2_mask */ |
| 10524 | case 2906: /* *avx512vl_us_truncatev2div2si2 */ |
| 10525 | case 2905: /* *avx512vl_truncatev2div2si2 */ |
| 10526 | case 2904: /* *avx512vl_ss_truncatev2div2si2 */ |
| 10527 | case 2900: /* *avx512vl_us_truncatev2div2hi2_mask_1 */ |
| 10528 | case 2899: /* *avx512vl_truncatev2div2hi2_mask_1 */ |
| 10529 | case 2898: /* *avx512vl_ss_truncatev2div2hi2_mask_1 */ |
| 10530 | case 2897: /* avx512vl_us_truncatev2div2hi2_mask */ |
| 10531 | case 2896: /* avx512vl_truncatev2div2hi2_mask */ |
| 10532 | case 2895: /* avx512vl_ss_truncatev2div2hi2_mask */ |
| 10533 | case 2885: /* *avx512vl_us_truncatev4div4hi2_mask_1 */ |
| 10534 | case 2884: /* *avx512vl_truncatev4div4hi2_mask_1 */ |
| 10535 | case 2883: /* *avx512vl_ss_truncatev4div4hi2_mask_1 */ |
| 10536 | case 2882: /* *avx512vl_us_truncatev4siv4hi2_mask_1 */ |
| 10537 | case 2881: /* *avx512vl_truncatev4siv4hi2_mask_1 */ |
| 10538 | case 2880: /* *avx512vl_ss_truncatev4siv4hi2_mask_1 */ |
| 10539 | case 2879: /* avx512vl_us_truncatev4div4hi2_mask */ |
| 10540 | case 2878: /* avx512vl_truncatev4div4hi2_mask */ |
| 10541 | case 2877: /* avx512vl_ss_truncatev4div4hi2_mask */ |
| 10542 | case 2876: /* avx512vl_us_truncatev4siv4hi2_mask */ |
| 10543 | case 2875: /* avx512vl_truncatev4siv4hi2_mask */ |
| 10544 | case 2874: /* avx512vl_ss_truncatev4siv4hi2_mask */ |
| 10545 | case 2867: /* *avx512vl_us_truncatev4siv4hi2 */ |
| 10546 | case 2866: /* *avx512vl_truncatev4siv4hi2 */ |
| 10547 | case 2865: /* *avx512vl_ss_truncatev4siv4hi2 */ |
| 10548 | case 2864: /* *avx512vl_us_truncatev2div2hi2 */ |
| 10549 | case 2863: /* *avx512vl_truncatev2div2hi2 */ |
| 10550 | case 2862: /* *avx512vl_ss_truncatev2div2hi2 */ |
| 10551 | case 2861: /* *avx512vl_us_truncatev4div4hi2 */ |
| 10552 | case 2860: /* *avx512vl_truncatev4div4hi2 */ |
| 10553 | case 2859: /* *avx512vl_ss_truncatev4div4hi2 */ |
| 10554 | case 2852: /* *avx512vl_us_truncatev8siv8qi2_mask_1 */ |
| 10555 | case 2851: /* *avx512vl_truncatev8siv8qi2_mask_1 */ |
| 10556 | case 2850: /* *avx512vl_ss_truncatev8siv8qi2_mask_1 */ |
| 10557 | case 2849: /* *avx512vl_us_truncatev8hiv8qi2_mask_1 */ |
| 10558 | case 2848: /* *avx512vl_truncatev8hiv8qi2_mask_1 */ |
| 10559 | case 2847: /* *avx512vl_ss_truncatev8hiv8qi2_mask_1 */ |
| 10560 | case 2846: /* avx512vl_us_truncatev8siv8qi2_mask */ |
| 10561 | case 2845: /* avx512vl_truncatev8siv8qi2_mask */ |
| 10562 | case 2844: /* avx512vl_ss_truncatev8siv8qi2_mask */ |
| 10563 | case 2843: /* avx512vl_us_truncatev8hiv8qi2_mask */ |
| 10564 | case 2842: /* avx512vl_truncatev8hiv8qi2_mask */ |
| 10565 | case 2841: /* avx512vl_ss_truncatev8hiv8qi2_mask */ |
| 10566 | case 2828: /* *avx512vl_us_truncatev4div4qi2_mask_1 */ |
| 10567 | case 2827: /* *avx512vl_truncatev4div4qi2_mask_1 */ |
| 10568 | case 2826: /* *avx512vl_ss_truncatev4div4qi2_mask_1 */ |
| 10569 | case 2825: /* *avx512vl_us_truncatev4siv4qi2_mask_1 */ |
| 10570 | case 2824: /* *avx512vl_truncatev4siv4qi2_mask_1 */ |
| 10571 | case 2823: /* *avx512vl_ss_truncatev4siv4qi2_mask_1 */ |
| 10572 | case 2822: /* avx512vl_us_truncatev4div4qi2_mask */ |
| 10573 | case 2821: /* avx512vl_truncatev4div4qi2_mask */ |
| 10574 | case 2820: /* avx512vl_ss_truncatev4div4qi2_mask */ |
| 10575 | case 2819: /* avx512vl_us_truncatev4siv4qi2_mask */ |
| 10576 | case 2818: /* avx512vl_truncatev4siv4qi2_mask */ |
| 10577 | case 2817: /* avx512vl_ss_truncatev4siv4qi2_mask */ |
| 10578 | case 2807: /* *avx512vl_us_truncatev2div2qi2_mask_1 */ |
| 10579 | case 2806: /* *avx512vl_truncatev2div2qi2_mask_1 */ |
| 10580 | case 2805: /* *avx512vl_ss_truncatev2div2qi2_mask_1 */ |
| 10581 | case 2804: /* avx512vl_us_truncatev2div2qi2_mask */ |
| 10582 | case 2803: /* avx512vl_truncatev2div2qi2_mask */ |
| 10583 | case 2802: /* avx512vl_ss_truncatev2div2qi2_mask */ |
| 10584 | case 2798: /* *avx512vl_us_truncatev8hiv8qi2 */ |
| 10585 | case 2797: /* *avx512vl_truncatev8hiv8qi2 */ |
| 10586 | case 2796: /* *avx512vl_ss_truncatev8hiv8qi2 */ |
| 10587 | case 2795: /* *avx512vl_us_truncatev4siv4qi2 */ |
| 10588 | case 2794: /* *avx512vl_truncatev4siv4qi2 */ |
| 10589 | case 2793: /* *avx512vl_ss_truncatev4siv4qi2 */ |
| 10590 | case 2792: /* *avx512vl_us_truncatev8siv8qi2 */ |
| 10591 | case 2791: /* *avx512vl_truncatev8siv8qi2 */ |
| 10592 | case 2790: /* *avx512vl_ss_truncatev8siv8qi2 */ |
| 10593 | case 2789: /* *avx512vl_us_truncatev2div2qi2 */ |
| 10594 | case 2788: /* *avx512vl_truncatev2div2qi2 */ |
| 10595 | case 2787: /* *avx512vl_ss_truncatev2div2qi2 */ |
| 10596 | case 2786: /* *avx512vl_us_truncatev4div4qi2 */ |
| 10597 | case 2785: /* *avx512vl_truncatev4div4qi2 */ |
| 10598 | case 2784: /* *avx512vl_ss_truncatev4div4qi2 */ |
| 10599 | case 2729: /* *vec_extractv2df_0_sse */ |
| 10600 | case 2727: /* *vec_extractv2df_1_sse */ |
| 10601 | case 2461: /* *vec_concatv4sf */ |
| 10602 | case 2451: /* sse_storelps */ |
| 10603 | case 2450: /* sse_loadhps */ |
| 10604 | case 2449: /* sse_storehps */ |
| 10605 | case 2419: /* sse_movlhps */ |
| 10606 | case 2418: /* sse_movhlps */ |
| 10607 | case 1304: /* sse2_movntv2df */ |
| 10608 | case 1303: /* avx_movntv4df */ |
| 10609 | case 1302: /* avx512f_movntv8df */ |
| 10610 | case 1301: /* sse_movntv4sf */ |
| 10611 | case 1300: /* avx_movntv8sf */ |
| 10612 | case 1299: /* avx512f_movntv16sf */ |
| 10613 | case 1297: /* sse2_movntisi */ |
| 10614 | case 1296: /* sse3_lddqu */ |
| 10615 | case 1295: /* avx_lddqu256 */ |
| 10616 | case 1293: /* sse2_movq128 */ |
| 10617 | case 1274: /* avx512vl_blendmv8hi */ |
| 10618 | case 1273: /* avx512vl_blendmv16hi */ |
| 10619 | case 1272: /* avx512bw_blendmv32hi */ |
| 10620 | case 1271: /* avx512vl_blendmv32qi */ |
| 10621 | case 1270: /* avx512vl_blendmv16qi */ |
| 10622 | case 1269: /* avx512bw_blendmv64qi */ |
| 10623 | case 1268: /* avx512vl_blendmv2df */ |
| 10624 | case 1267: /* avx512vl_blendmv4df */ |
| 10625 | case 1266: /* avx512f_blendmv8df */ |
| 10626 | case 1265: /* avx512vl_blendmv4sf */ |
| 10627 | case 1264: /* avx512vl_blendmv8sf */ |
| 10628 | case 1263: /* avx512f_blendmv16sf */ |
| 10629 | case 1262: /* avx512vl_blendmv2di */ |
| 10630 | case 1261: /* avx512vl_blendmv4di */ |
| 10631 | case 1260: /* avx512f_blendmv8di */ |
| 10632 | case 1259: /* avx512vl_blendmv4si */ |
| 10633 | case 1258: /* avx512vl_blendmv8si */ |
| 10634 | case 1257: /* avx512f_blendmv16si */ |
| 10635 | case 933: /* movmsk_df */ |
| 10636 | extract_insn_cached (insn); |
| 10637 | if ((memory_operand (operands[1], DFmode)) || (get_attr_memory (insn) == MEMORY_LOAD)) |
| 10638 | { |
| 10639 | return 0; |
| 10640 | } |
| 10641 | else |
| 10642 | { |
| 10643 | return 2; |
| 10644 | } |
| 10645 | |
| 10646 | case 2375: /* *sse2_vd_cvtss2sd */ |
| 10647 | case 2374: /* sse2_cvtss2sd_round */ |
| 10648 | case 2373: /* sse2_cvtss2sd */ |
| 10649 | case 877: /* sse4_1_rounddf2 */ |
| 10650 | if (get_attr_memory (insn) == MEMORY_LOAD) |
| 10651 | { |
| 10652 | return 4; |
| 10653 | } |
| 10654 | else |
| 10655 | { |
| 10656 | return 2; |
| 10657 | } |
| 10658 | |
| 10659 | case 889: /* fistsi2_with_temp */ |
| 10660 | case 888: /* fisthi2_with_temp */ |
| 10661 | case 887: /* fistsi2 */ |
| 10662 | case 886: /* fisthi2 */ |
| 10663 | case 885: /* *fistsi2_1 */ |
| 10664 | case 884: /* *fisthi2_1 */ |
| 10665 | case 883: /* fistdi2_with_temp */ |
| 10666 | case 882: /* fistdi2 */ |
| 10667 | case 881: /* *fistdi2_1 */ |
| 10668 | case 880: /* rintdf2_frndint */ |
| 10669 | case 879: /* rintsf2_frndint */ |
| 10670 | case 878: /* rintxf2 */ |
| 10671 | case 875: /* fscalexf4_i387 */ |
| 10672 | case 874: /* *f2xm1xf2_i387 */ |
| 10673 | case 873: /* fxtract_extenddfxf3_i387 */ |
| 10674 | case 872: /* fxtract_extendsfxf3_i387 */ |
| 10675 | case 871: /* fxtractxf3_i387 */ |
| 10676 | case 870: /* fyl2xp1_extenddfxf3_i387 */ |
| 10677 | case 869: /* fyl2xp1_extendsfxf3_i387 */ |
| 10678 | case 868: /* fyl2xp1xf3_i387 */ |
| 10679 | case 867: /* fyl2x_extenddfxf3_i387 */ |
| 10680 | case 866: /* fyl2x_extendsfxf3_i387 */ |
| 10681 | case 865: /* fyl2xxf3_i387 */ |
| 10682 | case 864: /* fpatan_extenddfxf3_i387 */ |
| 10683 | case 863: /* fpatan_extendsfxf3_i387 */ |
| 10684 | case 862: /* *fpatanxf3_i387 */ |
| 10685 | case 861: /* fptan_extenddfxf4_i387 */ |
| 10686 | case 860: /* fptan_extendsfxf4_i387 */ |
| 10687 | case 859: /* fptanxf4_i387 */ |
| 10688 | case 858: /* sincos_extenddfxf3_i387 */ |
| 10689 | case 857: /* sincos_extendsfxf3_i387 */ |
| 10690 | case 856: /* sincosxf3 */ |
| 10691 | case 855: /* *cos_extenddfxf2_i387 */ |
| 10692 | case 854: /* *sin_extenddfxf2_i387 */ |
| 10693 | case 853: /* *cos_extendsfxf2_i387 */ |
| 10694 | case 852: /* *sin_extendsfxf2_i387 */ |
| 10695 | case 851: /* *cosxf2_i387 */ |
| 10696 | case 850: /* *sinxf2_i387 */ |
| 10697 | case 849: /* fprem1xf4_i387 */ |
| 10698 | case 848: /* fpremxf4_i387 */ |
| 10699 | case 844: /* sqrt_extenddfxf2_i387 */ |
| 10700 | case 843: /* sqrt_extendsfxf2_i387 */ |
| 10701 | case 842: /* sqrtxf2 */ |
| 10702 | return 100 /* 0x64 */; |
| 10703 | |
| 10704 | case 624: /* *setcc_qi_slp */ |
| 10705 | case 623: /* *setcc_qi */ |
| 10706 | if (((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) || (cached_memory == MEMORY_STORE)) |
| 10707 | { |
| 10708 | return 1; |
| 10709 | } |
| 10710 | else |
| 10711 | { |
| 10712 | return 0; |
| 10713 | } |
| 10714 | |
| 10715 | case 4935: /* storedi_via_fpu */ |
| 10716 | case 4934: /* loaddi_via_fpu */ |
| 10717 | case 841: /* truncxfdf2_i387_noop_unspec */ |
| 10718 | case 840: /* truncxfsf2_i387_noop_unspec */ |
| 10719 | case 206: /* *floatdidf2_i387 */ |
| 10720 | case 205: /* *floatdisf2_i387 */ |
| 10721 | case 204: /* *floatsidf2_i387 */ |
| 10722 | case 203: /* *floatsisf2_i387 */ |
| 10723 | case 195: /* floathidf2 */ |
| 10724 | case 194: /* floathisf2 */ |
| 10725 | case 167: /* *truncxfdf2_i387 */ |
| 10726 | case 166: /* *truncxfsf2_i387 */ |
| 10727 | case 165: /* truncxfdf2_i387_noop */ |
| 10728 | case 164: /* truncxfsf2_i387_noop */ |
| 10729 | case 161: /* *truncdfsf2_i387_1 */ |
| 10730 | case 158: /* *truncdfsf_fast_i387 */ |
| 10731 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) |
| 10732 | { |
| 10733 | return 0; |
| 10734 | } |
| 10735 | else if ((cached_memory == MEMORY_STORE) || (cached_memory == MEMORY_BOTH)) |
| 10736 | { |
| 10737 | return 4; |
| 10738 | } |
| 10739 | else |
| 10740 | { |
| 10741 | return 2; |
| 10742 | } |
| 10743 | |
| 10744 | case 121: /* *pushdf */ |
| 10745 | extract_constrain_insn_cached (insn); |
| 10746 | if (((1 << which_alternative) & 0x1e)) |
| 10747 | { |
| 10748 | return 2; |
| 10749 | } |
| 10750 | else |
| 10751 | { |
| 10752 | return 0; |
| 10753 | } |
| 10754 | |
| 10755 | case 120: /* *pushxf */ |
| 10756 | case 119: /* *pushxf_rounded */ |
| 10757 | case 118: /* *pushxf_rounded */ |
| 10758 | case 117: /* *pushtf */ |
| 10759 | extract_constrain_insn_cached (insn); |
| 10760 | if (which_alternative != 0) |
| 10761 | { |
| 10762 | return 2; |
| 10763 | } |
| 10764 | else |
| 10765 | { |
| 10766 | return 0; |
| 10767 | } |
| 10768 | |
| 10769 | case 1100: /* *bnd64_stx */ |
| 10770 | case 1099: /* *bnd32_stx */ |
| 10771 | case 1096: /* *bnd64_cn */ |
| 10772 | case 1095: /* *bnd64_cu */ |
| 10773 | case 1094: /* *bnd64_cl */ |
| 10774 | case 1093: /* *bnd32_cn */ |
| 10775 | case 1092: /* *bnd32_cu */ |
| 10776 | case 1091: /* *bnd32_cl */ |
| 10777 | case 1088: /* *bnd64_mk */ |
| 10778 | case 1087: /* *bnd32_mk */ |
| 10779 | case 1060: /* *lwp_lwpinsdi3_1 */ |
| 10780 | case 1059: /* *lwp_lwpinssi3_1 */ |
| 10781 | case 1058: /* *lwp_lwpvaldi3_1 */ |
| 10782 | case 1057: /* *lwp_lwpvalsi3_1 */ |
| 10783 | case 1056: /* lwp_slwpcbdi */ |
| 10784 | case 1055: /* lwp_slwpcbsi */ |
| 10785 | case 1054: /* *lwp_llwpcbdi1 */ |
| 10786 | case 1053: /* *lwp_llwpcbsi1 */ |
| 10787 | case 974: /* *x86_movdicc_0_m1_neg */ |
| 10788 | case 973: /* *x86_movsicc_0_m1_neg */ |
| 10789 | case 972: /* *x86_movdicc_0_m1_se */ |
| 10790 | case 971: /* *x86_movsicc_0_m1_se */ |
| 10791 | case 970: /* *x86_movdicc_0_m1 */ |
| 10792 | case 969: /* *x86_movsicc_0_m1 */ |
| 10793 | case 88: /* *movabsdi_1 */ |
| 10794 | case 87: /* *movabssi_1 */ |
| 10795 | case 86: /* *movabshi_1 */ |
| 10796 | case 85: /* *movabsqi_1 */ |
| 10797 | return 1; |
| 10798 | |
| 10799 | case 4501: /* avx_vec_concatv8df */ |
| 10800 | case 4500: /* avx_vec_concatv16sf */ |
| 10801 | case 4499: /* avx_vec_concatv8di */ |
| 10802 | case 4498: /* avx_vec_concatv16si */ |
| 10803 | case 4497: /* avx_vec_concatv32hi */ |
| 10804 | case 4496: /* avx_vec_concatv64qi */ |
| 10805 | case 4495: /* avx_vec_concatv4df */ |
| 10806 | case 4494: /* avx_vec_concatv8sf */ |
| 10807 | case 4493: /* avx_vec_concatv4di */ |
| 10808 | case 4492: /* avx_vec_concatv8si */ |
| 10809 | case 4491: /* avx_vec_concatv16hi */ |
| 10810 | case 4490: /* avx_vec_concatv32qi */ |
| 10811 | case 3641: /* *vec_concatv4si */ |
| 10812 | case 2452: /* sse_loadlps */ |
| 10813 | case 1238: /* movv2df_internal */ |
| 10814 | case 1237: /* movv4df_internal */ |
| 10815 | case 1236: /* movv8df_internal */ |
| 10816 | case 1235: /* movv4sf_internal */ |
| 10817 | case 1234: /* movv8sf_internal */ |
| 10818 | case 1233: /* movv16sf_internal */ |
| 10819 | case 1232: /* movv1ti_internal */ |
| 10820 | case 1231: /* movv2ti_internal */ |
| 10821 | case 1230: /* movv4ti_internal */ |
| 10822 | case 1229: /* movv2di_internal */ |
| 10823 | case 1228: /* movv4di_internal */ |
| 10824 | case 1227: /* movv8di_internal */ |
| 10825 | case 1226: /* movv4si_internal */ |
| 10826 | case 1225: /* movv8si_internal */ |
| 10827 | case 1224: /* movv16si_internal */ |
| 10828 | case 1223: /* movv8hi_internal */ |
| 10829 | case 1222: /* movv16hi_internal */ |
| 10830 | case 1221: /* movv32hi_internal */ |
| 10831 | case 1220: /* movv16qi_internal */ |
| 10832 | case 1219: /* movv32qi_internal */ |
| 10833 | case 1218: /* movv64qi_internal */ |
| 10834 | case 79: /* *movoi_internal_avx */ |
| 10835 | case 78: /* *movxi_internal_avx512f */ |
| 10836 | extract_constrain_insn_cached (insn); |
| 10837 | if ((!((1 << which_alternative) & 0x3)) && ((memory_operand (operands[1], DFmode)) || (get_attr_memory (insn) == MEMORY_LOAD))) |
| 10838 | { |
| 10839 | return 0; |
| 10840 | } |
| 10841 | else if (!((1 << which_alternative) & 0x3)) |
| 10842 | { |
| 10843 | return 2; |
| 10844 | } |
| 10845 | else |
| 10846 | { |
| 10847 | return 3; |
| 10848 | } |
| 10849 | |
| 10850 | case 1000: /* probe_stack_di */ |
| 10851 | case 999: /* probe_stack_si */ |
| 10852 | case 732: /* tzcnt_hi */ |
| 10853 | case 730: /* *tzcnt_di_falsedep */ |
| 10854 | case 728: /* *tzcnt_si_falsedep */ |
| 10855 | case 726: /* tzcnt_di */ |
| 10856 | case 724: /* tzcnt_si */ |
| 10857 | case 719: /* *bsrhi */ |
| 10858 | case 718: /* bsr */ |
| 10859 | case 717: /* bsr_rex64 */ |
| 10860 | case 716: /* *ctzdi2_falsedep */ |
| 10861 | case 715: /* *ctzsi2_falsedep */ |
| 10862 | case 714: /* ctzdi2 */ |
| 10863 | case 713: /* ctzsi2 */ |
| 10864 | case 712: /* *bsfdi_1 */ |
| 10865 | case 711: /* *bsfsi_1 */ |
| 10866 | case 710: /* *tzcntdi_1_falsedep */ |
| 10867 | case 709: /* *tzcntsi_1_falsedep */ |
| 10868 | case 708: /* *tzcntdi_1 */ |
| 10869 | case 707: /* *tzcntsi_1 */ |
| 10870 | case 613: /* *btdi */ |
| 10871 | case 612: /* *btsi */ |
| 10872 | case 611: /* *btcq */ |
| 10873 | case 610: /* *btrq */ |
| 10874 | case 609: /* *btsq */ |
| 10875 | case 608: /* *rotrqi3_1_slp */ |
| 10876 | case 607: /* *rotlqi3_1_slp */ |
| 10877 | case 567: /* *ashrqi3_1_slp */ |
| 10878 | case 566: /* *lshrqi3_1_slp */ |
| 10879 | case 512: /* *one_cmplsi2_2_zext */ |
| 10880 | case 511: /* *one_cmpldi2_2 */ |
| 10881 | case 510: /* *one_cmplsi2_2 */ |
| 10882 | case 509: /* *one_cmplhi2_2 */ |
| 10883 | case 508: /* *one_cmplqi2_2 */ |
| 10884 | case 507: /* *one_cmplqi2_1 */ |
| 10885 | case 506: /* *one_cmplsi2_1_zext */ |
| 10886 | case 505: /* *one_cmpldi2_1 */ |
| 10887 | case 504: /* *one_cmplsi2_1 */ |
| 10888 | case 503: /* *one_cmplhi2_1 */ |
| 10889 | case 479: /* *negvdi3 */ |
| 10890 | case 478: /* *negvsi3 */ |
| 10891 | case 477: /* *negvhi3 */ |
| 10892 | case 476: /* *negvqi3 */ |
| 10893 | case 475: /* *negsi2_cmpz_zext */ |
| 10894 | case 474: /* *negdi2_cmpz */ |
| 10895 | case 473: /* *negsi2_cmpz */ |
| 10896 | case 472: /* *neghi2_cmpz */ |
| 10897 | case 471: /* *negqi2_cmpz */ |
| 10898 | case 470: /* *negsi2_1_zext */ |
| 10899 | case 469: /* *negdi2_1 */ |
| 10900 | case 468: /* *negsi2_1 */ |
| 10901 | case 467: /* *neghi2_1 */ |
| 10902 | case 466: /* *negqi2_1 */ |
| 10903 | case 450: /* *xorqi_2_slp */ |
| 10904 | case 449: /* *iorqi_2_slp */ |
| 10905 | case 436: /* *xorqi_1_slp */ |
| 10906 | case 435: /* *iorqi_1_slp */ |
| 10907 | case 410: /* *andqi_2_slp */ |
| 10908 | case 403: /* *andqi_1_slp */ |
| 10909 | case 276: /* *subqi_1_slp */ |
| 10910 | case 138: /* zero_extendqihi2_and */ |
| 10911 | case 135: /* zero_extendhisi2_and */ |
| 10912 | case 134: /* zero_extendqisi2_and */ |
| 10913 | case 100: /* *movstricthi_xor */ |
| 10914 | case 99: /* *movstrictqi_xor */ |
| 10915 | case 77: /* *movdi_or */ |
| 10916 | case 76: /* *movsi_or */ |
| 10917 | case 75: /* *movdi_xor */ |
| 10918 | case 74: /* *movsi_xor */ |
| 10919 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) |
| 10920 | { |
| 10921 | return 1; |
| 10922 | } |
| 10923 | else if (cached_memory == MEMORY_BOTH) |
| 10924 | { |
| 10925 | return 4; |
| 10926 | } |
| 10927 | else if (cached_memory == MEMORY_STORE) |
| 10928 | { |
| 10929 | return 1; |
| 10930 | } |
| 10931 | else |
| 10932 | { |
| 10933 | return 0; |
| 10934 | } |
| 10935 | |
| 10936 | case 3890: /* ptesttf2 */ |
| 10937 | case 3889: /* avx_ptestv4df */ |
| 10938 | case 3888: /* avx_ptestv8sf */ |
| 10939 | case 3887: /* avx_ptestv4di */ |
| 10940 | case 3886: /* avx_ptestv8si */ |
| 10941 | case 3885: /* avx_ptestv16hi */ |
| 10942 | case 3884: /* avx_ptestv32qi */ |
| 10943 | case 3883: /* sse4_1_ptestv2df */ |
| 10944 | case 3882: /* sse4_1_ptestv4sf */ |
| 10945 | case 3881: /* sse4_1_ptestv2di */ |
| 10946 | case 3880: /* sse4_1_ptestv4si */ |
| 10947 | case 3879: /* sse4_1_ptestv8hi */ |
| 10948 | case 3878: /* sse4_1_ptestv16qi */ |
| 10949 | case 3877: /* avx_vtestpd */ |
| 10950 | case 3876: /* avx_vtestpd256 */ |
| 10951 | case 3875: /* avx_vtestps */ |
| 10952 | case 3874: /* avx_vtestps256 */ |
| 10953 | case 1740: /* sse2_ucomi_round */ |
| 10954 | case 1739: /* sse2_ucomi */ |
| 10955 | case 1738: /* sse_ucomi_round */ |
| 10956 | case 1737: /* sse_ucomi */ |
| 10957 | case 1736: /* sse2_comi_round */ |
| 10958 | case 1735: /* sse2_comi */ |
| 10959 | case 1734: /* sse_comi_round */ |
| 10960 | case 1733: /* sse_comi */ |
| 10961 | case 1446: /* sse2_vmmulv2df3_round */ |
| 10962 | case 1445: /* sse2_vmmulv2df3 */ |
| 10963 | case 1442: /* sse_vmmulv4sf3_round */ |
| 10964 | case 1441: /* sse_vmmulv4sf3 */ |
| 10965 | case 1416: /* sse2_vmsubv2df3_round */ |
| 10966 | case 1415: /* sse2_vmsubv2df3 */ |
| 10967 | case 1414: /* sse2_vmaddv2df3_round */ |
| 10968 | case 1413: /* sse2_vmaddv2df3 */ |
| 10969 | case 1412: /* sse_vmsubv4sf3_round */ |
| 10970 | case 1411: /* sse_vmsubv4sf3 */ |
| 10971 | case 1410: /* sse_vmaddv4sf3_round */ |
| 10972 | case 1409: /* sse_vmaddv4sf3 */ |
| 10973 | case 1098: /* *bnd64_ldx */ |
| 10974 | case 1097: /* *bnd32_ldx */ |
| 10975 | case 992: /* *ieee_smindf3 */ |
| 10976 | case 991: /* *ieee_smaxdf3 */ |
| 10977 | case 990: /* *ieee_sminsf3 */ |
| 10978 | case 989: /* *ieee_smaxsf3 */ |
| 10979 | case 988: /* smindf3 */ |
| 10980 | case 987: /* smaxdf3 */ |
| 10981 | case 986: /* sminsf3 */ |
| 10982 | case 985: /* smaxsf3 */ |
| 10983 | case 927: /* fistsi2_ceil_with_temp */ |
| 10984 | case 926: /* fistsi2_floor_with_temp */ |
| 10985 | case 925: /* fisthi2_ceil_with_temp */ |
| 10986 | case 924: /* fisthi2_floor_with_temp */ |
| 10987 | case 923: /* fistsi2_ceil */ |
| 10988 | case 922: /* fistsi2_floor */ |
| 10989 | case 921: /* fisthi2_ceil */ |
| 10990 | case 920: /* fisthi2_floor */ |
| 10991 | case 919: /* fistdi2_ceil_with_temp */ |
| 10992 | case 918: /* fistdi2_floor_with_temp */ |
| 10993 | case 917: /* fistdi2_ceil */ |
| 10994 | case 916: /* fistdi2_floor */ |
| 10995 | case 915: /* *fistdi2_ceil_1 */ |
| 10996 | case 914: /* *fistdi2_floor_1 */ |
| 10997 | case 913: /* *fistsi2_ceil_1 */ |
| 10998 | case 912: /* *fistsi2_floor_1 */ |
| 10999 | case 911: /* *fisthi2_ceil_1 */ |
| 11000 | case 910: /* *fisthi2_floor_1 */ |
| 11001 | case 805: /* *add_tp_di */ |
| 11002 | case 804: /* *add_tp_si */ |
| 11003 | case 803: /* *add_tp_x32_zext */ |
| 11004 | case 802: /* *add_tp_x32 */ |
| 11005 | case 191: /* fix_truncsi_i387_with_temp */ |
| 11006 | case 190: /* fix_trunchi_i387_with_temp */ |
| 11007 | case 189: /* fix_truncsi_i387 */ |
| 11008 | case 188: /* fix_trunchi_i387 */ |
| 11009 | case 187: /* fix_truncdi_i387_with_temp */ |
| 11010 | case 186: /* fix_truncdi_i387 */ |
| 11011 | case 185: /* *fix_truncdi_i387_1 */ |
| 11012 | case 184: /* *fix_truncsi_i387_1 */ |
| 11013 | case 183: /* *fix_trunchi_i387_1 */ |
| 11014 | case 182: /* fix_truncdi_i387_fisttp_with_temp */ |
| 11015 | case 181: /* fix_truncsi_i387_fisttp_with_temp */ |
| 11016 | case 180: /* fix_trunchi_i387_fisttp_with_temp */ |
| 11017 | case 179: /* fix_truncdi_i387_fisttp */ |
| 11018 | case 178: /* fix_truncsi_i387_fisttp */ |
| 11019 | case 177: /* fix_trunchi_i387_fisttp */ |
| 11020 | case 176: /* fix_truncdi_fisttp_i387_1 */ |
| 11021 | case 175: /* fix_truncsi_fisttp_i387_1 */ |
| 11022 | case 174: /* fix_trunchi_fisttp_i387_1 */ |
| 11023 | case 73: /* *popfldi1 */ |
| 11024 | case 72: /* *popflsi1 */ |
| 11025 | case 69: /* *popdi1_epilogue */ |
| 11026 | case 68: /* *popsi1_epilogue */ |
| 11027 | case 67: /* *popdi1 */ |
| 11028 | case 66: /* *popsi1 */ |
| 11029 | return 4; |
| 11030 | |
| 11031 | case 4899: /* vpmultishiftqbv32qi_mask */ |
| 11032 | case 4898: /* vpmultishiftqbv32qi */ |
| 11033 | case 4897: /* vpmultishiftqbv16qi_mask */ |
| 11034 | case 4896: /* vpmultishiftqbv16qi */ |
| 11035 | case 4895: /* vpmultishiftqbv64qi_mask */ |
| 11036 | case 4894: /* vpmultishiftqbv64qi */ |
| 11037 | case 4869: /* sha256rnds2 */ |
| 11038 | case 4868: /* sha256msg2 */ |
| 11039 | case 4867: /* sha256msg1 */ |
| 11040 | case 4866: /* sha1rnds4 */ |
| 11041 | case 4865: /* sha1nexte */ |
| 11042 | case 4864: /* sha1msg2 */ |
| 11043 | case 4863: /* sha1msg1 */ |
| 11044 | case 4838: /* avx512bw_dbpsadbwv32hi_mask */ |
| 11045 | case 4837: /* *avx512bw_dbpsadbwv32hi */ |
| 11046 | case 4836: /* avx512bw_dbpsadbwv16hi_mask */ |
| 11047 | case 4835: /* *avx512bw_dbpsadbwv16hi */ |
| 11048 | case 4834: /* avx512bw_dbpsadbwv8hi_mask */ |
| 11049 | case 4833: /* *avx512bw_dbpsadbwv8hi */ |
| 11050 | case 4432: /* avx2_maskstoreq256 */ |
| 11051 | case 4431: /* avx2_maskstored256 */ |
| 11052 | case 4430: /* avx2_maskstoreq */ |
| 11053 | case 4429: /* avx2_maskstored */ |
| 11054 | case 4428: /* avx_maskstorepd256 */ |
| 11055 | case 4427: /* avx_maskstoreps256 */ |
| 11056 | case 4426: /* avx_maskstorepd */ |
| 11057 | case 4425: /* avx_maskstoreps */ |
| 11058 | case 4424: /* avx2_maskloadq256 */ |
| 11059 | case 4423: /* avx2_maskloadd256 */ |
| 11060 | case 4422: /* avx2_maskloadq */ |
| 11061 | case 4421: /* avx2_maskloadd */ |
| 11062 | case 4420: /* avx_maskloadpd256 */ |
| 11063 | case 4419: /* avx_maskloadps256 */ |
| 11064 | case 4418: /* avx_maskloadpd */ |
| 11065 | case 4417: /* avx_maskloadps */ |
| 11066 | case 4416: /* vec_set_hi_v32qi */ |
| 11067 | case 4415: /* vec_set_lo_v32qi */ |
| 11068 | case 4414: /* vec_set_hi_v16hi */ |
| 11069 | case 4413: /* vec_set_lo_v16hi */ |
| 11070 | case 4412: /* vec_set_hi_v8sf_mask */ |
| 11071 | case 4411: /* vec_set_hi_v8sf */ |
| 11072 | case 4410: /* vec_set_hi_v8si_mask */ |
| 11073 | case 4409: /* vec_set_hi_v8si */ |
| 11074 | case 4408: /* vec_set_lo_v8sf_mask */ |
| 11075 | case 4407: /* vec_set_lo_v8sf */ |
| 11076 | case 4406: /* vec_set_lo_v8si_mask */ |
| 11077 | case 4405: /* vec_set_lo_v8si */ |
| 11078 | case 4404: /* vec_set_hi_v4df_mask */ |
| 11079 | case 4403: /* vec_set_hi_v4df */ |
| 11080 | case 4402: /* vec_set_hi_v4di_mask */ |
| 11081 | case 4401: /* vec_set_hi_v4di */ |
| 11082 | case 4400: /* vec_set_lo_v4df_mask */ |
| 11083 | case 4399: /* vec_set_lo_v4df */ |
| 11084 | case 4398: /* vec_set_lo_v4di_mask */ |
| 11085 | case 4397: /* vec_set_lo_v4di */ |
| 11086 | case 4390: /* *avx_vperm2f128v4df_nozero */ |
| 11087 | case 4389: /* *avx_vperm2f128v8sf_nozero */ |
| 11088 | case 4388: /* *avx_vperm2f128v8si_nozero */ |
| 11089 | case 4387: /* *avx_vperm2f128v4df_full */ |
| 11090 | case 4386: /* *avx_vperm2f128v8sf_full */ |
| 11091 | case 4385: /* *avx_vperm2f128v8si_full */ |
| 11092 | case 4384: /* avx512bw_vpermt2varv32hi3_mask */ |
| 11093 | case 4383: /* avx512vl_vpermt2varv16hi3_mask */ |
| 11094 | case 4382: /* avx512vl_vpermt2varv8hi3_mask */ |
| 11095 | case 4381: /* avx512vl_vpermt2varv32qi3_mask */ |
| 11096 | case 4380: /* avx512vl_vpermt2varv16qi3_mask */ |
| 11097 | case 4379: /* avx512bw_vpermt2varv64qi3_mask */ |
| 11098 | case 4378: /* avx512vl_vpermt2varv2df3_mask */ |
| 11099 | case 4377: /* avx512vl_vpermt2varv2di3_mask */ |
| 11100 | case 4376: /* avx512vl_vpermt2varv4sf3_mask */ |
| 11101 | case 4375: /* avx512vl_vpermt2varv4si3_mask */ |
| 11102 | case 4374: /* avx512vl_vpermt2varv4df3_mask */ |
| 11103 | case 4373: /* avx512vl_vpermt2varv4di3_mask */ |
| 11104 | case 4372: /* avx512vl_vpermt2varv8sf3_mask */ |
| 11105 | case 4371: /* avx512vl_vpermt2varv8si3_mask */ |
| 11106 | case 4370: /* avx512f_vpermt2varv8df3_mask */ |
| 11107 | case 4369: /* avx512f_vpermt2varv8di3_mask */ |
| 11108 | case 4368: /* avx512f_vpermt2varv16sf3_mask */ |
| 11109 | case 4367: /* avx512f_vpermt2varv16si3_mask */ |
| 11110 | case 4366: /* avx512bw_vpermt2varv32hi3_maskz_1 */ |
| 11111 | case 4365: /* avx512bw_vpermt2varv32hi3 */ |
| 11112 | case 4364: /* avx512vl_vpermt2varv16hi3_maskz_1 */ |
| 11113 | case 4363: /* avx512vl_vpermt2varv16hi3 */ |
| 11114 | case 4362: /* avx512vl_vpermt2varv8hi3_maskz_1 */ |
| 11115 | case 4361: /* avx512vl_vpermt2varv8hi3 */ |
| 11116 | case 4360: /* avx512vl_vpermt2varv32qi3_maskz_1 */ |
| 11117 | case 4359: /* avx512vl_vpermt2varv32qi3 */ |
| 11118 | case 4358: /* avx512vl_vpermt2varv16qi3_maskz_1 */ |
| 11119 | case 4357: /* avx512vl_vpermt2varv16qi3 */ |
| 11120 | case 4356: /* avx512bw_vpermt2varv64qi3_maskz_1 */ |
| 11121 | case 4355: /* avx512bw_vpermt2varv64qi3 */ |
| 11122 | case 4354: /* avx512vl_vpermt2varv2df3_maskz_1 */ |
| 11123 | case 4353: /* avx512vl_vpermt2varv2df3 */ |
| 11124 | case 4352: /* avx512vl_vpermt2varv2di3_maskz_1 */ |
| 11125 | case 4351: /* avx512vl_vpermt2varv2di3 */ |
| 11126 | case 4350: /* avx512vl_vpermt2varv4sf3_maskz_1 */ |
| 11127 | case 4349: /* avx512vl_vpermt2varv4sf3 */ |
| 11128 | case 4348: /* avx512vl_vpermt2varv4si3_maskz_1 */ |
| 11129 | case 4347: /* avx512vl_vpermt2varv4si3 */ |
| 11130 | case 4346: /* avx512vl_vpermt2varv4df3_maskz_1 */ |
| 11131 | case 4345: /* avx512vl_vpermt2varv4df3 */ |
| 11132 | case 4344: /* avx512vl_vpermt2varv4di3_maskz_1 */ |
| 11133 | case 4343: /* avx512vl_vpermt2varv4di3 */ |
| 11134 | case 4342: /* avx512vl_vpermt2varv8sf3_maskz_1 */ |
| 11135 | case 4341: /* avx512vl_vpermt2varv8sf3 */ |
| 11136 | case 4340: /* avx512vl_vpermt2varv8si3_maskz_1 */ |
| 11137 | case 4339: /* avx512vl_vpermt2varv8si3 */ |
| 11138 | case 4338: /* avx512f_vpermt2varv8df3_maskz_1 */ |
| 11139 | case 4337: /* avx512f_vpermt2varv8df3 */ |
| 11140 | case 4336: /* avx512f_vpermt2varv8di3_maskz_1 */ |
| 11141 | case 4335: /* avx512f_vpermt2varv8di3 */ |
| 11142 | case 4334: /* avx512f_vpermt2varv16sf3_maskz_1 */ |
| 11143 | case 4333: /* avx512f_vpermt2varv16sf3 */ |
| 11144 | case 4332: /* avx512f_vpermt2varv16si3_maskz_1 */ |
| 11145 | case 4331: /* avx512f_vpermt2varv16si3 */ |
| 11146 | case 4330: /* avx512bw_vpermi2varv32hi3_mask */ |
| 11147 | case 4329: /* avx512vl_vpermi2varv16hi3_mask */ |
| 11148 | case 4328: /* avx512vl_vpermi2varv8hi3_mask */ |
| 11149 | case 4327: /* avx512vl_vpermi2varv32qi3_mask */ |
| 11150 | case 4326: /* avx512vl_vpermi2varv16qi3_mask */ |
| 11151 | case 4325: /* avx512bw_vpermi2varv64qi3_mask */ |
| 11152 | case 4324: /* avx512vl_vpermi2varv2df3_mask */ |
| 11153 | case 4323: /* avx512vl_vpermi2varv2di3_mask */ |
| 11154 | case 4322: /* avx512vl_vpermi2varv4sf3_mask */ |
| 11155 | case 4321: /* avx512vl_vpermi2varv4si3_mask */ |
| 11156 | case 4320: /* avx512vl_vpermi2varv4df3_mask */ |
| 11157 | case 4319: /* avx512vl_vpermi2varv4di3_mask */ |
| 11158 | case 4318: /* avx512vl_vpermi2varv8sf3_mask */ |
| 11159 | case 4317: /* avx512vl_vpermi2varv8si3_mask */ |
| 11160 | case 4316: /* avx512f_vpermi2varv8df3_mask */ |
| 11161 | case 4315: /* avx512f_vpermi2varv8di3_mask */ |
| 11162 | case 4314: /* avx512f_vpermi2varv16sf3_mask */ |
| 11163 | case 4313: /* avx512f_vpermi2varv16si3_mask */ |
| 11164 | case 4312: /* avx512bw_vpermi2varv32hi3_maskz_1 */ |
| 11165 | case 4311: /* avx512bw_vpermi2varv32hi3 */ |
| 11166 | case 4310: /* avx512vl_vpermi2varv16hi3_maskz_1 */ |
| 11167 | case 4309: /* avx512vl_vpermi2varv16hi3 */ |
| 11168 | case 4308: /* avx512vl_vpermi2varv8hi3_maskz_1 */ |
| 11169 | case 4307: /* avx512vl_vpermi2varv8hi3 */ |
| 11170 | case 4306: /* avx512vl_vpermi2varv32qi3_maskz_1 */ |
| 11171 | case 4305: /* avx512vl_vpermi2varv32qi3 */ |
| 11172 | case 4304: /* avx512vl_vpermi2varv16qi3_maskz_1 */ |
| 11173 | case 4303: /* avx512vl_vpermi2varv16qi3 */ |
| 11174 | case 4302: /* avx512bw_vpermi2varv64qi3_maskz_1 */ |
| 11175 | case 4301: /* avx512bw_vpermi2varv64qi3 */ |
| 11176 | case 4300: /* avx512vl_vpermi2varv2df3_maskz_1 */ |
| 11177 | case 4299: /* avx512vl_vpermi2varv2df3 */ |
| 11178 | case 4298: /* avx512vl_vpermi2varv2di3_maskz_1 */ |
| 11179 | case 4297: /* avx512vl_vpermi2varv2di3 */ |
| 11180 | case 4296: /* avx512vl_vpermi2varv4sf3_maskz_1 */ |
| 11181 | case 4295: /* avx512vl_vpermi2varv4sf3 */ |
| 11182 | case 4294: /* avx512vl_vpermi2varv4si3_maskz_1 */ |
| 11183 | case 4293: /* avx512vl_vpermi2varv4si3 */ |
| 11184 | case 4292: /* avx512vl_vpermi2varv4df3_maskz_1 */ |
| 11185 | case 4291: /* avx512vl_vpermi2varv4df3 */ |
| 11186 | case 4290: /* avx512vl_vpermi2varv4di3_maskz_1 */ |
| 11187 | case 4289: /* avx512vl_vpermi2varv4di3 */ |
| 11188 | case 4288: /* avx512vl_vpermi2varv8sf3_maskz_1 */ |
| 11189 | case 4287: /* avx512vl_vpermi2varv8sf3 */ |
| 11190 | case 4286: /* avx512vl_vpermi2varv8si3_maskz_1 */ |
| 11191 | case 4285: /* avx512vl_vpermi2varv8si3 */ |
| 11192 | case 4284: /* avx512f_vpermi2varv8df3_maskz_1 */ |
| 11193 | case 4283: /* avx512f_vpermi2varv8df3 */ |
| 11194 | case 4282: /* avx512f_vpermi2varv8di3_maskz_1 */ |
| 11195 | case 4281: /* avx512f_vpermi2varv8di3 */ |
| 11196 | case 4280: /* avx512f_vpermi2varv16sf3_maskz_1 */ |
| 11197 | case 4279: /* avx512f_vpermi2varv16sf3 */ |
| 11198 | case 4278: /* avx512f_vpermi2varv16si3_maskz_1 */ |
| 11199 | case 4277: /* avx512f_vpermi2varv16si3 */ |
| 11200 | case 4276: /* avx_vpermilvarv2df3_mask */ |
| 11201 | case 4275: /* avx_vpermilvarv2df3 */ |
| 11202 | case 4274: /* avx_vpermilvarv4df3_mask */ |
| 11203 | case 4273: /* avx_vpermilvarv4df3 */ |
| 11204 | case 4272: /* avx512f_vpermilvarv8df3_mask */ |
| 11205 | case 4271: /* avx512f_vpermilvarv8df3 */ |
| 11206 | case 4270: /* avx_vpermilvarv4sf3_mask */ |
| 11207 | case 4269: /* avx_vpermilvarv4sf3 */ |
| 11208 | case 4268: /* avx_vpermilvarv8sf3_mask */ |
| 11209 | case 4267: /* avx_vpermilvarv8sf3 */ |
| 11210 | case 4266: /* avx512f_vpermilvarv16sf3_mask */ |
| 11211 | case 4265: /* avx512f_vpermilvarv16sf3 */ |
| 11212 | case 4264: /* *avx_vpermilpv2df_mask */ |
| 11213 | case 4263: /* *avx_vpermilpv2df */ |
| 11214 | case 4262: /* *avx_vpermilpv4df_mask */ |
| 11215 | case 4261: /* *avx_vpermilpv4df */ |
| 11216 | case 4260: /* *avx512f_vpermilpv8df_mask */ |
| 11217 | case 4259: /* *avx512f_vpermilpv8df */ |
| 11218 | case 4258: /* *avx_vpermilpv4sf_mask */ |
| 11219 | case 4257: /* *avx_vpermilpv4sf */ |
| 11220 | case 4256: /* *avx_vpermilpv8sf_mask */ |
| 11221 | case 4255: /* *avx_vpermilpv8sf */ |
| 11222 | case 4254: /* *avx512f_vpermilpv16sf_mask */ |
| 11223 | case 4253: /* *avx512f_vpermilpv16sf */ |
| 11224 | case 4110: /* avx2_vec_dupv4df */ |
| 11225 | case 4109: /* avx2_permv2ti */ |
| 11226 | case 4108: /* avx512f_permv8di_1_mask */ |
| 11227 | case 4107: /* avx512f_permv8di_1 */ |
| 11228 | case 4106: /* avx512f_permv8df_1_mask */ |
| 11229 | case 4105: /* avx512f_permv8df_1 */ |
| 11230 | case 4104: /* avx2_permv4df_1_mask */ |
| 11231 | case 4103: /* avx2_permv4df_1 */ |
| 11232 | case 4102: /* avx2_permv4di_1_mask */ |
| 11233 | case 4101: /* avx2_permv4di_1 */ |
| 11234 | case 4100: /* avx512bw_permvarv32hi_mask */ |
| 11235 | case 4099: /* avx512bw_permvarv32hi */ |
| 11236 | case 4098: /* avx512vl_permvarv16hi_mask */ |
| 11237 | case 4097: /* avx512vl_permvarv16hi */ |
| 11238 | case 4096: /* avx512vl_permvarv8hi_mask */ |
| 11239 | case 4095: /* avx512vl_permvarv8hi */ |
| 11240 | case 4094: /* avx512vl_permvarv32qi_mask */ |
| 11241 | case 4093: /* avx512vl_permvarv32qi */ |
| 11242 | case 4092: /* avx512vl_permvarv16qi_mask */ |
| 11243 | case 4091: /* avx512vl_permvarv16qi */ |
| 11244 | case 4090: /* avx512bw_permvarv64qi_mask */ |
| 11245 | case 4089: /* avx512bw_permvarv64qi */ |
| 11246 | case 4088: /* avx2_permvarv4df_mask */ |
| 11247 | case 4087: /* avx2_permvarv4df */ |
| 11248 | case 4086: /* avx2_permvarv4di_mask */ |
| 11249 | case 4085: /* avx2_permvarv4di */ |
| 11250 | case 4084: /* avx512f_permvarv8df_mask */ |
| 11251 | case 4083: /* avx512f_permvarv8df */ |
| 11252 | case 4082: /* avx512f_permvarv8di_mask */ |
| 11253 | case 4081: /* avx512f_permvarv8di */ |
| 11254 | case 4080: /* avx512f_permvarv16sf_mask */ |
| 11255 | case 4079: /* avx512f_permvarv16sf */ |
| 11256 | case 4078: /* avx512f_permvarv16si_mask */ |
| 11257 | case 4077: /* avx512f_permvarv16si */ |
| 11258 | case 4076: /* avx2_permvarv8sf_mask */ |
| 11259 | case 4075: /* avx2_permvarv8sf */ |
| 11260 | case 4074: /* avx2_permvarv8si_mask */ |
| 11261 | case 4073: /* avx2_permvarv8si */ |
| 11262 | case 4054: /* pclmulqdq */ |
| 11263 | case 4053: /* aeskeygenassist */ |
| 11264 | case 4052: /* aesimc */ |
| 11265 | case 4051: /* aesdeclast */ |
| 11266 | case 4050: /* aesdec */ |
| 11267 | case 4049: /* aesenclast */ |
| 11268 | case 4048: /* aesenc */ |
| 11269 | case 3904: /* sse4_2_pcmpistr_cconly */ |
| 11270 | case 3903: /* sse4_2_pcmpistrm */ |
| 11271 | case 3902: /* sse4_2_pcmpistri */ |
| 11272 | case 3901: /* sse4_2_pcmpistr */ |
| 11273 | case 3900: /* sse4_2_pcmpestr_cconly */ |
| 11274 | case 3899: /* sse4_2_pcmpestrm */ |
| 11275 | case 3898: /* sse4_2_pcmpestri */ |
| 11276 | case 3897: /* sse4_2_pcmpestr */ |
| 11277 | case 3801: /* sse4_1_phminposuw */ |
| 11278 | case 3794: /* sse4_1_packusdw_mask */ |
| 11279 | case 3793: /* sse4_1_packusdw */ |
| 11280 | case 3792: /* avx2_packusdw_mask */ |
| 11281 | case 3791: /* avx2_packusdw */ |
| 11282 | case 3790: /* avx512bw_packusdw_mask */ |
| 11283 | case 3789: /* avx512bw_packusdw */ |
| 11284 | case 3788: /* sse4_1_mpsadbw */ |
| 11285 | case 3787: /* avx2_mpsadbw */ |
| 11286 | case 3763: /* absv2si2 */ |
| 11287 | case 3762: /* absv4hi2 */ |
| 11288 | case 3761: /* absv8qi2 */ |
| 11289 | case 3760: /* absv8hi2_mask */ |
| 11290 | case 3759: /* absv16hi2_mask */ |
| 11291 | case 3758: /* absv32hi2_mask */ |
| 11292 | case 3757: /* absv32qi2_mask */ |
| 11293 | case 3756: /* absv16qi2_mask */ |
| 11294 | case 3755: /* absv64qi2_mask */ |
| 11295 | case 3754: /* absv2di2_mask */ |
| 11296 | case 3753: /* absv4di2_mask */ |
| 11297 | case 3752: /* absv8di2_mask */ |
| 11298 | case 3751: /* absv4si2_mask */ |
| 11299 | case 3750: /* absv8si2_mask */ |
| 11300 | case 3749: /* absv16si2_mask */ |
| 11301 | case 3748: /* *absv2di2 */ |
| 11302 | case 3747: /* *absv4di2 */ |
| 11303 | case 3746: /* *absv8di2 */ |
| 11304 | case 3745: /* *absv4si2 */ |
| 11305 | case 3744: /* *absv8si2 */ |
| 11306 | case 3743: /* *absv16si2 */ |
| 11307 | case 3742: /* *absv8hi2 */ |
| 11308 | case 3741: /* *absv16hi2 */ |
| 11309 | case 3740: /* *absv32hi2 */ |
| 11310 | case 3739: /* *absv16qi2 */ |
| 11311 | case 3738: /* *absv32qi2 */ |
| 11312 | case 3737: /* *absv64qi2 */ |
| 11313 | case 3729: /* ssse3_psignv2si3 */ |
| 11314 | case 3728: /* ssse3_psignv4hi3 */ |
| 11315 | case 3727: /* ssse3_psignv8qi3 */ |
| 11316 | case 3726: /* ssse3_psignv4si3 */ |
| 11317 | case 3725: /* avx2_psignv8si3 */ |
| 11318 | case 3724: /* ssse3_psignv8hi3 */ |
| 11319 | case 3723: /* avx2_psignv16hi3 */ |
| 11320 | case 3722: /* ssse3_psignv16qi3 */ |
| 11321 | case 3721: /* avx2_psignv32qi3 */ |
| 11322 | case 3720: /* ssse3_pshufbv8qi3 */ |
| 11323 | case 3719: /* ssse3_pshufbv16qi3_mask */ |
| 11324 | case 3718: /* ssse3_pshufbv16qi3 */ |
| 11325 | case 3717: /* avx2_pshufbv32qi3_mask */ |
| 11326 | case 3716: /* avx2_pshufbv32qi3 */ |
| 11327 | case 3715: /* avx512bw_pshufbv64qi3_mask */ |
| 11328 | case 3714: /* avx512bw_pshufbv64qi3 */ |
| 11329 | case 3635: /* *vec_extractv4si_zext */ |
| 11330 | case 3626: /* *vec_extractv8hi_zext */ |
| 11331 | case 3625: /* *vec_extractv8hi_zext */ |
| 11332 | case 3624: /* *vec_extractv16qi_zext */ |
| 11333 | case 3623: /* *vec_extractv16qi_zext */ |
| 11334 | case 3622: /* *vec_extractv8hi */ |
| 11335 | case 3621: /* *vec_extractv16qi */ |
| 11336 | case 3619: /* sse2_pshufhw_1_mask */ |
| 11337 | case 3618: /* sse2_pshufhw_1 */ |
| 11338 | case 3617: /* avx2_pshufhw_1_mask */ |
| 11339 | case 3616: /* avx2_pshufhw_1 */ |
| 11340 | case 3615: /* avx512bw_pshufhwv32hi_mask */ |
| 11341 | case 3614: /* *avx512bw_pshufhwv32hi */ |
| 11342 | case 3613: /* sse2_pshuflw_1_mask */ |
| 11343 | case 3612: /* sse2_pshuflw_1 */ |
| 11344 | case 3611: /* avx2_pshuflw_1_mask */ |
| 11345 | case 3610: /* avx2_pshuflw_1 */ |
| 11346 | case 3609: /* avx512bw_pshuflwv32hi_mask */ |
| 11347 | case 3608: /* *avx512bw_pshuflwv32hi */ |
| 11348 | case 3607: /* sse2_pshufd_1_mask */ |
| 11349 | case 3606: /* sse2_pshufd_1 */ |
| 11350 | case 3605: /* avx2_pshufd_1_mask */ |
| 11351 | case 3604: /* avx2_pshufd_1 */ |
| 11352 | case 3603: /* avx512f_pshufd_1_mask */ |
| 11353 | case 3602: /* avx512f_pshufd_1 */ |
| 11354 | case 3601: /* avx512f_shuf_i32x4_1_mask */ |
| 11355 | case 3600: /* avx512f_shuf_i32x4_1 */ |
| 11356 | case 3599: /* avx512f_shuf_f32x4_1_mask */ |
| 11357 | case 3598: /* avx512f_shuf_f32x4_1 */ |
| 11358 | case 3597: /* avx512vl_shuf_f32x4_1_mask */ |
| 11359 | case 3596: /* avx512vl_shuf_f32x4_1 */ |
| 11360 | case 3595: /* avx512vl_shuf_i32x4_1_mask */ |
| 11361 | case 3594: /* avx512vl_shuf_i32x4_1 */ |
| 11362 | case 3593: /* avx512f_shuf_i64x2_1_mask */ |
| 11363 | case 3592: /* avx512f_shuf_i64x2_1 */ |
| 11364 | case 3591: /* avx512f_shuf_f64x2_1_mask */ |
| 11365 | case 3590: /* avx512f_shuf_f64x2_1 */ |
| 11366 | case 3589: /* avx512dq_shuf_f64x2_1_mask */ |
| 11367 | case 3588: /* *avx512dq_shuf_f64x2_1 */ |
| 11368 | case 3587: /* avx512dq_shuf_i64x2_1_mask */ |
| 11369 | case 3586: /* *avx512dq_shuf_i64x2_1 */ |
| 11370 | case 3585: /* vec_set_hi_v8di_mask */ |
| 11371 | case 3584: /* vec_set_hi_v8di */ |
| 11372 | case 3583: /* vec_set_hi_v8df_mask */ |
| 11373 | case 3582: /* vec_set_hi_v8df */ |
| 11374 | case 3581: /* vec_set_lo_v8di_mask */ |
| 11375 | case 3580: /* vec_set_lo_v8di */ |
| 11376 | case 3579: /* vec_set_lo_v8df_mask */ |
| 11377 | case 3578: /* vec_set_lo_v8df */ |
| 11378 | case 3577: /* vec_set_hi_v16si_mask */ |
| 11379 | case 3576: /* vec_set_hi_v16si */ |
| 11380 | case 3575: /* vec_set_hi_v16sf_mask */ |
| 11381 | case 3574: /* vec_set_hi_v16sf */ |
| 11382 | case 3573: /* vec_set_lo_v16si_mask */ |
| 11383 | case 3572: /* vec_set_lo_v16si */ |
| 11384 | case 3571: /* vec_set_lo_v16sf_mask */ |
| 11385 | case 3570: /* vec_set_lo_v16sf */ |
| 11386 | case 3569: /* avx512f_vinserti32x4_1_mask */ |
| 11387 | case 3568: /* *avx512f_vinserti32x4_1 */ |
| 11388 | case 3567: /* avx512f_vinsertf32x4_1_mask */ |
| 11389 | case 3566: /* *avx512f_vinsertf32x4_1 */ |
| 11390 | case 3565: /* avx512dq_vinserti64x2_1_mask */ |
| 11391 | case 3564: /* *avx512dq_vinserti64x2_1 */ |
| 11392 | case 3563: /* avx512dq_vinsertf64x2_1_mask */ |
| 11393 | case 3562: /* *avx512dq_vinsertf64x2_1 */ |
| 11394 | case 3561: /* sse4_1_pinsrq */ |
| 11395 | case 3560: /* sse4_1_pinsrd */ |
| 11396 | case 3559: /* sse2_pinsrw */ |
| 11397 | case 3558: /* sse4_1_pinsrb */ |
| 11398 | case 3557: /* vec_interleave_lowv4si_mask */ |
| 11399 | case 3556: /* vec_interleave_lowv4si */ |
| 11400 | case 3555: /* avx512f_interleave_lowv16si_mask */ |
| 11401 | case 3554: /* *avx512f_interleave_lowv16si */ |
| 11402 | case 3553: /* avx2_interleave_lowv8si_mask */ |
| 11403 | case 3552: /* avx2_interleave_lowv8si */ |
| 11404 | case 3551: /* vec_interleave_highv4si_mask */ |
| 11405 | case 3550: /* vec_interleave_highv4si */ |
| 11406 | case 3549: /* avx512f_interleave_highv16si_mask */ |
| 11407 | case 3548: /* *avx512f_interleave_highv16si */ |
| 11408 | case 3547: /* avx2_interleave_highv8si_mask */ |
| 11409 | case 3546: /* avx2_interleave_highv8si */ |
| 11410 | case 3545: /* vec_interleave_lowv8hi_mask */ |
| 11411 | case 3544: /* vec_interleave_lowv8hi */ |
| 11412 | case 3543: /* avx2_interleave_lowv16hi_mask */ |
| 11413 | case 3542: /* avx2_interleave_lowv16hi */ |
| 11414 | case 3541: /* avx512bw_interleave_lowv32hi_mask */ |
| 11415 | case 3540: /* *avx512bw_interleave_lowv32hi */ |
| 11416 | case 3539: /* vec_interleave_highv8hi_mask */ |
| 11417 | case 3538: /* vec_interleave_highv8hi */ |
| 11418 | case 3537: /* avx2_interleave_highv16hi_mask */ |
| 11419 | case 3536: /* avx2_interleave_highv16hi */ |
| 11420 | case 3535: /* avx512bw_interleave_highv32hi_mask */ |
| 11421 | case 3534: /* avx512bw_interleave_highv32hi */ |
| 11422 | case 3533: /* vec_interleave_lowv16qi_mask */ |
| 11423 | case 3532: /* vec_interleave_lowv16qi */ |
| 11424 | case 3531: /* avx2_interleave_lowv32qi_mask */ |
| 11425 | case 3530: /* avx2_interleave_lowv32qi */ |
| 11426 | case 3529: /* avx512bw_interleave_lowv64qi_mask */ |
| 11427 | case 3528: /* avx512bw_interleave_lowv64qi */ |
| 11428 | case 3527: /* vec_interleave_highv16qi_mask */ |
| 11429 | case 3526: /* vec_interleave_highv16qi */ |
| 11430 | case 3525: /* avx2_interleave_highv32qi_mask */ |
| 11431 | case 3524: /* avx2_interleave_highv32qi */ |
| 11432 | case 3523: /* avx512bw_interleave_highv64qi_mask */ |
| 11433 | case 3522: /* avx512bw_interleave_highv64qi */ |
| 11434 | case 3521: /* sse2_packuswb_mask */ |
| 11435 | case 3520: /* sse2_packuswb */ |
| 11436 | case 3519: /* avx2_packuswb_mask */ |
| 11437 | case 3518: /* avx2_packuswb */ |
| 11438 | case 3517: /* avx512bw_packuswb_mask */ |
| 11439 | case 3516: /* avx512bw_packuswb */ |
| 11440 | case 3515: /* sse2_packssdw_mask */ |
| 11441 | case 3514: /* sse2_packssdw */ |
| 11442 | case 3513: /* avx2_packssdw_mask */ |
| 11443 | case 3512: /* avx2_packssdw */ |
| 11444 | case 3511: /* avx512bw_packssdw_mask */ |
| 11445 | case 3510: /* avx512bw_packssdw */ |
| 11446 | case 3509: /* sse2_packsswb_mask */ |
| 11447 | case 3508: /* sse2_packsswb */ |
| 11448 | case 3507: /* avx2_packsswb_mask */ |
| 11449 | case 3506: /* avx2_packsswb */ |
| 11450 | case 3505: /* avx512bw_packsswb_mask */ |
| 11451 | case 3504: /* avx512bw_packsswb */ |
| 11452 | case 3455: /* *xorv8hi3 */ |
| 11453 | case 3454: /* *iorv8hi3 */ |
| 11454 | case 3453: /* *andv8hi3 */ |
| 11455 | case 3452: /* *xorv16hi3 */ |
| 11456 | case 3451: /* *iorv16hi3 */ |
| 11457 | case 3450: /* *andv16hi3 */ |
| 11458 | case 3449: /* *xorv32hi3 */ |
| 11459 | case 3448: /* *iorv32hi3 */ |
| 11460 | case 3447: /* *andv32hi3 */ |
| 11461 | case 3446: /* *xorv16qi3 */ |
| 11462 | case 3445: /* *iorv16qi3 */ |
| 11463 | case 3444: /* *andv16qi3 */ |
| 11464 | case 3443: /* *xorv32qi3 */ |
| 11465 | case 3442: /* *iorv32qi3 */ |
| 11466 | case 3441: /* *andv32qi3 */ |
| 11467 | case 3440: /* *xorv64qi3 */ |
| 11468 | case 3439: /* *iorv64qi3 */ |
| 11469 | case 3438: /* *andv64qi3 */ |
| 11470 | case 3437: /* xorv2di3_mask */ |
| 11471 | case 3436: /* *xorv2di3 */ |
| 11472 | case 3435: /* iorv2di3_mask */ |
| 11473 | case 3434: /* *iorv2di3 */ |
| 11474 | case 3433: /* andv2di3_mask */ |
| 11475 | case 3432: /* *andv2di3 */ |
| 11476 | case 3431: /* xorv4di3_mask */ |
| 11477 | case 3430: /* *xorv4di3 */ |
| 11478 | case 3429: /* iorv4di3_mask */ |
| 11479 | case 3428: /* *iorv4di3 */ |
| 11480 | case 3427: /* andv4di3_mask */ |
| 11481 | case 3426: /* *andv4di3 */ |
| 11482 | case 3425: /* xorv8di3_mask */ |
| 11483 | case 3424: /* *xorv8di3 */ |
| 11484 | case 3423: /* iorv8di3_mask */ |
| 11485 | case 3422: /* *iorv8di3 */ |
| 11486 | case 3421: /* andv8di3_mask */ |
| 11487 | case 3420: /* *andv8di3 */ |
| 11488 | case 3419: /* xorv4si3_mask */ |
| 11489 | case 3418: /* *xorv4si3 */ |
| 11490 | case 3417: /* iorv4si3_mask */ |
| 11491 | case 3416: /* *iorv4si3 */ |
| 11492 | case 3415: /* andv4si3_mask */ |
| 11493 | case 3414: /* *andv4si3 */ |
| 11494 | case 3413: /* xorv8si3_mask */ |
| 11495 | case 3412: /* *xorv8si3 */ |
| 11496 | case 3411: /* iorv8si3_mask */ |
| 11497 | case 3410: /* *iorv8si3 */ |
| 11498 | case 3409: /* andv8si3_mask */ |
| 11499 | case 3408: /* *andv8si3 */ |
| 11500 | case 3407: /* xorv16si3_mask */ |
| 11501 | case 3406: /* *xorv16si3 */ |
| 11502 | case 3405: /* iorv16si3_mask */ |
| 11503 | case 3404: /* *iorv16si3 */ |
| 11504 | case 3403: /* andv16si3_mask */ |
| 11505 | case 3402: /* *andv16si3 */ |
| 11506 | case 3401: /* *andnotv2di3_mask */ |
| 11507 | case 3400: /* *andnotv4di3_mask */ |
| 11508 | case 3399: /* *andnotv8di3_mask */ |
| 11509 | case 3398: /* *andnotv4si3_mask */ |
| 11510 | case 3397: /* *andnotv8si3_mask */ |
| 11511 | case 3396: /* *andnotv16si3_mask */ |
| 11512 | case 3395: /* *andnotv2di3 */ |
| 11513 | case 3394: /* *andnotv4di3 */ |
| 11514 | case 3393: /* *andnotv4si3 */ |
| 11515 | case 3392: /* *andnotv8si3 */ |
| 11516 | case 3391: /* *andnotv8hi3 */ |
| 11517 | case 3390: /* *andnotv16hi3 */ |
| 11518 | case 3389: /* *andnotv32hi3 */ |
| 11519 | case 3388: /* *andnotv16qi3 */ |
| 11520 | case 3387: /* *andnotv32qi3 */ |
| 11521 | case 3386: /* *andnotv64qi3 */ |
| 11522 | case 3385: /* *andnotv8di3 */ |
| 11523 | case 3384: /* *andnotv16si3 */ |
| 11524 | case 3378: /* avx512vl_gtv16hi3_mask */ |
| 11525 | case 3377: /* avx512vl_gtv16hi3 */ |
| 11526 | case 3376: /* avx512bw_gtv32hi3_mask */ |
| 11527 | case 3375: /* avx512bw_gtv32hi3 */ |
| 11528 | case 3374: /* avx512vl_gtv32qi3_mask */ |
| 11529 | case 3373: /* avx512vl_gtv32qi3 */ |
| 11530 | case 3370: /* avx512bw_gtv64qi3_mask */ |
| 11531 | case 3369: /* avx512bw_gtv64qi3 */ |
| 11532 | case 3366: /* avx512vl_gtv4di3_mask */ |
| 11533 | case 3365: /* avx512vl_gtv4di3 */ |
| 11534 | case 3364: /* avx512f_gtv8di3_mask */ |
| 11535 | case 3363: /* avx512f_gtv8di3 */ |
| 11536 | case 3360: /* avx512vl_gtv8si3_mask */ |
| 11537 | case 3359: /* avx512vl_gtv8si3 */ |
| 11538 | case 3358: /* avx512f_gtv16si3_mask */ |
| 11539 | case 3357: /* avx512f_gtv16si3 */ |
| 11540 | case 3356: /* avx2_gtv4di3 */ |
| 11541 | case 3355: /* avx2_gtv8si3 */ |
| 11542 | case 3354: /* avx2_gtv16hi3 */ |
| 11543 | case 3353: /* avx2_gtv32qi3 */ |
| 11544 | case 3345: /* avx512vl_eqv4di3_mask_1 */ |
| 11545 | case 3344: /* avx512vl_eqv4di3_1 */ |
| 11546 | case 3343: /* avx512f_eqv8di3_mask_1 */ |
| 11547 | case 3342: /* avx512f_eqv8di3_1 */ |
| 11548 | case 3339: /* avx512vl_eqv8si3_mask_1 */ |
| 11549 | case 3338: /* avx512vl_eqv8si3_1 */ |
| 11550 | case 3337: /* avx512f_eqv16si3_mask_1 */ |
| 11551 | case 3336: /* avx512f_eqv16si3_1 */ |
| 11552 | case 3333: /* avx512vl_eqv16hi3_mask_1 */ |
| 11553 | case 3332: /* avx512vl_eqv16hi3_1 */ |
| 11554 | case 3331: /* avx512bw_eqv32hi3_mask_1 */ |
| 11555 | case 3330: /* avx512bw_eqv32hi3_1 */ |
| 11556 | case 3329: /* avx512vl_eqv32qi3_mask_1 */ |
| 11557 | case 3328: /* avx512vl_eqv32qi3_1 */ |
| 11558 | case 3325: /* avx512bw_eqv64qi3_mask_1 */ |
| 11559 | case 3324: /* avx512bw_eqv64qi3_1 */ |
| 11560 | case 3323: /* *avx2_eqv4di3 */ |
| 11561 | case 3322: /* *avx2_eqv8si3 */ |
| 11562 | case 3321: /* *avx2_eqv16hi3 */ |
| 11563 | case 3320: /* *avx2_eqv32qi3 */ |
| 11564 | case 2734: /* vec_dupv2df_mask */ |
| 11565 | case 2733: /* vec_dupv2df */ |
| 11566 | case 2725: /* sse2_shufpd_v2df */ |
| 11567 | case 2724: /* sse2_shufpd_v2di */ |
| 11568 | case 2723: /* vec_interleave_lowv2di_mask */ |
| 11569 | case 2722: /* vec_interleave_lowv2di */ |
| 11570 | case 2721: /* avx512f_interleave_lowv8di_mask */ |
| 11571 | case 2720: /* *avx512f_interleave_lowv8di */ |
| 11572 | case 2719: /* avx2_interleave_lowv4di_mask */ |
| 11573 | case 2718: /* avx2_interleave_lowv4di */ |
| 11574 | case 2717: /* vec_interleave_highv2di_mask */ |
| 11575 | case 2716: /* vec_interleave_highv2di */ |
| 11576 | case 2715: /* avx512f_interleave_highv8di_mask */ |
| 11577 | case 2714: /* *avx512f_interleave_highv8di */ |
| 11578 | case 2713: /* avx2_interleave_highv4di_mask */ |
| 11579 | case 2712: /* avx2_interleave_highv4di */ |
| 11580 | case 2711: /* sse2_shufpd_v2df_mask */ |
| 11581 | case 2710: /* avx_shufpd256_1_mask */ |
| 11582 | case 2709: /* avx_shufpd256_1 */ |
| 11583 | case 2708: /* avx512f_shufpd512_1_mask */ |
| 11584 | case 2707: /* avx512f_shufpd512_1 */ |
| 11585 | case 2706: /* avx512f_shufps512_1_mask */ |
| 11586 | case 2705: /* avx512f_shufps512_1 */ |
| 11587 | case 2588: /* avx512vl_vternlogv2di_mask */ |
| 11588 | case 2587: /* avx512vl_vternlogv4di_mask */ |
| 11589 | case 2586: /* avx512f_vternlogv8di_mask */ |
| 11590 | case 2585: /* avx512vl_vternlogv4si_mask */ |
| 11591 | case 2584: /* avx512vl_vternlogv8si_mask */ |
| 11592 | case 2583: /* avx512f_vternlogv16si_mask */ |
| 11593 | case 2582: /* avx512vl_vternlogv2di_maskz_1 */ |
| 11594 | case 2581: /* avx512vl_vternlogv2di */ |
| 11595 | case 2580: /* avx512vl_vternlogv4di_maskz_1 */ |
| 11596 | case 2579: /* avx512vl_vternlogv4di */ |
| 11597 | case 2578: /* avx512f_vternlogv8di_maskz_1 */ |
| 11598 | case 2577: /* avx512f_vternlogv8di */ |
| 11599 | case 2576: /* avx512vl_vternlogv4si_maskz_1 */ |
| 11600 | case 2575: /* avx512vl_vternlogv4si */ |
| 11601 | case 2574: /* avx512vl_vternlogv8si_maskz_1 */ |
| 11602 | case 2573: /* avx512vl_vternlogv8si */ |
| 11603 | case 2572: /* avx512f_vternlogv16si_maskz_1 */ |
| 11604 | case 2571: /* avx512f_vternlogv16si */ |
| 11605 | case 2541: /* avx512vl_unpcklpd128_mask */ |
| 11606 | case 2540: /* *avx_unpcklpd256_mask */ |
| 11607 | case 2539: /* *avx_unpcklpd256 */ |
| 11608 | case 2538: /* *avx512f_unpcklpd512_mask */ |
| 11609 | case 2537: /* *avx512f_unpcklpd512 */ |
| 11610 | case 2535: /* avx512vl_unpckhpd128_mask */ |
| 11611 | case 2534: /* avx_unpckhpd256_mask */ |
| 11612 | case 2533: /* avx_unpckhpd256 */ |
| 11613 | case 2532: /* avx512f_unpckhpd512_mask */ |
| 11614 | case 2531: /* *avx512f_unpckhpd512 */ |
| 11615 | case 2530: /* vec_extract_hi_v32qi */ |
| 11616 | case 2528: /* vec_extract_hi_v64qi */ |
| 11617 | case 2526: /* vec_extract_hi_v16hi */ |
| 11618 | case 2524: /* vec_extract_hi_v32hi */ |
| 11619 | case 2522: /* vec_extract_hi_v8sf */ |
| 11620 | case 2521: /* vec_extract_hi_v8si */ |
| 11621 | case 2520: /* vec_extract_hi_v8sf_mask */ |
| 11622 | case 2519: /* vec_extract_hi_v8si_mask */ |
| 11623 | case 2518: /* vec_extract_hi_v8sf_maskm */ |
| 11624 | case 2517: /* vec_extract_hi_v8si_maskm */ |
| 11625 | case 2516: /* vec_extract_lo_v8sf_maskm */ |
| 11626 | case 2515: /* vec_extract_lo_v8si_maskm */ |
| 11627 | case 2514: /* vec_extract_lo_v8sf_mask */ |
| 11628 | case 2513: /* vec_extract_lo_v8sf */ |
| 11629 | case 2512: /* vec_extract_lo_v8si_mask */ |
| 11630 | case 2511: /* vec_extract_lo_v8si */ |
| 11631 | case 2510: /* vec_extract_hi_v4df_mask */ |
| 11632 | case 2509: /* vec_extract_hi_v4df */ |
| 11633 | case 2508: /* vec_extract_hi_v4di_mask */ |
| 11634 | case 2507: /* vec_extract_hi_v4di */ |
| 11635 | case 2506: /* vec_extract_lo_v4df_mask */ |
| 11636 | case 2505: /* vec_extract_lo_v4df */ |
| 11637 | case 2504: /* vec_extract_lo_v4di_mask */ |
| 11638 | case 2503: /* vec_extract_lo_v4di */ |
| 11639 | case 2498: /* vec_extract_hi_v16si_mask */ |
| 11640 | case 2497: /* vec_extract_hi_v16si */ |
| 11641 | case 2496: /* vec_extract_hi_v16sf_mask */ |
| 11642 | case 2495: /* vec_extract_hi_v16sf */ |
| 11643 | case 2494: /* vec_extract_hi_v16si_maskm */ |
| 11644 | case 2493: /* vec_extract_hi_v16sf_maskm */ |
| 11645 | case 2492: /* vec_extract_hi_v8di_mask */ |
| 11646 | case 2491: /* vec_extract_hi_v8di */ |
| 11647 | case 2490: /* vec_extract_hi_v8df_mask */ |
| 11648 | case 2489: /* vec_extract_hi_v8df */ |
| 11649 | case 2488: /* vec_extract_hi_v8di_maskm */ |
| 11650 | case 2487: /* vec_extract_hi_v8df_maskm */ |
| 11651 | case 2486: /* vec_extract_lo_v8di_mask */ |
| 11652 | case 2485: /* vec_extract_lo_v8di */ |
| 11653 | case 2484: /* vec_extract_lo_v8df_mask */ |
| 11654 | case 2483: /* vec_extract_lo_v8df */ |
| 11655 | case 2482: /* vec_extract_lo_v8di_maskm */ |
| 11656 | case 2481: /* vec_extract_lo_v8df_maskm */ |
| 11657 | case 2480: /* avx512f_vextracti32x4_1_mask */ |
| 11658 | case 2479: /* *avx512f_vextracti32x4_1 */ |
| 11659 | case 2478: /* avx512f_vextractf32x4_1_mask */ |
| 11660 | case 2477: /* *avx512f_vextractf32x4_1 */ |
| 11661 | case 2476: /* avx512dq_vextracti64x2_1_mask */ |
| 11662 | case 2475: /* *avx512dq_vextracti64x2_1 */ |
| 11663 | case 2474: /* avx512dq_vextractf64x2_1_mask */ |
| 11664 | case 2473: /* *avx512dq_vextractf64x2_1 */ |
| 11665 | case 2472: /* avx512f_vextracti32x4_1_maskm */ |
| 11666 | case 2471: /* avx512f_vextractf32x4_1_maskm */ |
| 11667 | case 2470: /* avx512dq_vextracti64x2_1_maskm */ |
| 11668 | case 2469: /* avx512dq_vextractf64x2_1_maskm */ |
| 11669 | case 2465: /* sse4_1_insertps */ |
| 11670 | case 2464: /* *vec_setv4sf_sse4_1 */ |
| 11671 | case 2458: /* avx512f_vec_dupv8df_1 */ |
| 11672 | case 2457: /* avx512f_vec_dupv16sf_1 */ |
| 11673 | case 2456: /* avx2_vec_dupv8sf_1 */ |
| 11674 | case 2455: /* avx2_vec_dupv4sf */ |
| 11675 | case 2454: /* avx2_vec_dupv8sf */ |
| 11676 | case 2448: /* sse_shufps_v4sf */ |
| 11677 | case 2447: /* sse_shufps_v4si */ |
| 11678 | case 2446: /* sse_shufps_v4sf_mask */ |
| 11679 | case 2445: /* avx_shufps256_1_mask */ |
| 11680 | case 2444: /* avx_shufps256_1 */ |
| 11681 | case 2431: /* vec_interleave_lowv4sf */ |
| 11682 | case 2430: /* unpcklps128_mask */ |
| 11683 | case 2429: /* avx_unpcklps256_mask */ |
| 11684 | case 2428: /* avx_unpcklps256 */ |
| 11685 | case 2427: /* avx512f_unpcklps512_mask */ |
| 11686 | case 2426: /* *avx512f_unpcklps512 */ |
| 11687 | case 2425: /* vec_interleave_highv4sf_mask */ |
| 11688 | case 2424: /* vec_interleave_highv4sf */ |
| 11689 | case 2423: /* avx_unpckhps256_mask */ |
| 11690 | case 2422: /* avx_unpckhps256 */ |
| 11691 | case 2421: /* avx512f_unpckhps512_mask */ |
| 11692 | case 2420: /* *avx512f_unpckhps512 */ |
| 11693 | case 1800: /* *xortf3 */ |
| 11694 | case 1799: /* *iortf3 */ |
| 11695 | case 1798: /* *andtf3 */ |
| 11696 | case 1797: /* *xordf3 */ |
| 11697 | case 1796: /* *iordf3 */ |
| 11698 | case 1795: /* *anddf3 */ |
| 11699 | case 1794: /* *xorsf3 */ |
| 11700 | case 1793: /* *iorsf3 */ |
| 11701 | case 1792: /* *andsf3 */ |
| 11702 | case 1791: /* *andnottf3 */ |
| 11703 | case 1790: /* *andnotdf3 */ |
| 11704 | case 1789: /* *andnotsf3 */ |
| 11705 | case 1788: /* *xorv8df3_mask */ |
| 11706 | case 1787: /* *xorv8df3 */ |
| 11707 | case 1786: /* *iorv8df3_mask */ |
| 11708 | case 1785: /* *iorv8df3 */ |
| 11709 | case 1784: /* *andv8df3_mask */ |
| 11710 | case 1783: /* *andv8df3 */ |
| 11711 | case 1782: /* *xorv16sf3_mask */ |
| 11712 | case 1781: /* *xorv16sf3 */ |
| 11713 | case 1780: /* *iorv16sf3_mask */ |
| 11714 | case 1779: /* *iorv16sf3 */ |
| 11715 | case 1778: /* *andv16sf3_mask */ |
| 11716 | case 1777: /* *andv16sf3 */ |
| 11717 | case 1776: /* *xorv2df3_mask */ |
| 11718 | case 1775: /* *xorv2df3 */ |
| 11719 | case 1774: /* *iorv2df3_mask */ |
| 11720 | case 1773: /* *iorv2df3 */ |
| 11721 | case 1772: /* *andv2df3_mask */ |
| 11722 | case 1771: /* *andv2df3 */ |
| 11723 | case 1770: /* *xorv4df3_mask */ |
| 11724 | case 1769: /* *xorv4df3 */ |
| 11725 | case 1768: /* *iorv4df3_mask */ |
| 11726 | case 1767: /* *iorv4df3 */ |
| 11727 | case 1766: /* *andv4df3_mask */ |
| 11728 | case 1765: /* *andv4df3 */ |
| 11729 | case 1764: /* *xorv4sf3_mask */ |
| 11730 | case 1763: /* *xorv4sf3 */ |
| 11731 | case 1762: /* *iorv4sf3_mask */ |
| 11732 | case 1761: /* *iorv4sf3 */ |
| 11733 | case 1760: /* *andv4sf3_mask */ |
| 11734 | case 1759: /* *andv4sf3 */ |
| 11735 | case 1758: /* *xorv8sf3_mask */ |
| 11736 | case 1757: /* *xorv8sf3 */ |
| 11737 | case 1756: /* *iorv8sf3_mask */ |
| 11738 | case 1755: /* *iorv8sf3 */ |
| 11739 | case 1754: /* *andv8sf3_mask */ |
| 11740 | case 1753: /* *andv8sf3 */ |
| 11741 | case 1752: /* avx512f_andnotv8df3_mask */ |
| 11742 | case 1751: /* avx512f_andnotv8df3 */ |
| 11743 | case 1750: /* avx512f_andnotv16sf3_mask */ |
| 11744 | case 1749: /* avx512f_andnotv16sf3 */ |
| 11745 | case 1748: /* sse2_andnotv2df3_mask */ |
| 11746 | case 1747: /* sse2_andnotv2df3 */ |
| 11747 | case 1746: /* avx_andnotv4df3_mask */ |
| 11748 | case 1745: /* avx_andnotv4df3 */ |
| 11749 | case 1744: /* sse_andnotv4sf3_mask */ |
| 11750 | case 1743: /* sse_andnotv4sf3 */ |
| 11751 | case 1742: /* avx_andnotv8sf3_mask */ |
| 11752 | case 1741: /* avx_andnotv8sf3 */ |
| 11753 | case 1732: /* avx512f_maskcmpv2df3 */ |
| 11754 | case 1731: /* avx512f_maskcmpv4df3 */ |
| 11755 | case 1730: /* avx512f_maskcmpv8df3 */ |
| 11756 | case 1729: /* avx512f_maskcmpv4sf3 */ |
| 11757 | case 1728: /* avx512f_maskcmpv8sf3 */ |
| 11758 | case 1727: /* avx512f_maskcmpv16sf3 */ |
| 11759 | case 1716: /* avx512vl_ucmpv4di3_mask */ |
| 11760 | case 1715: /* avx512vl_ucmpv4di3 */ |
| 11761 | case 1714: /* avx512f_ucmpv8di3_mask */ |
| 11762 | case 1713: /* avx512f_ucmpv8di3 */ |
| 11763 | case 1710: /* avx512vl_ucmpv8si3_mask */ |
| 11764 | case 1709: /* avx512vl_ucmpv8si3 */ |
| 11765 | case 1708: /* avx512f_ucmpv16si3_mask */ |
| 11766 | case 1707: /* avx512f_ucmpv16si3 */ |
| 11767 | case 1704: /* avx512vl_ucmpv16hi3_mask */ |
| 11768 | case 1703: /* avx512vl_ucmpv16hi3 */ |
| 11769 | case 1702: /* avx512bw_ucmpv32hi3_mask */ |
| 11770 | case 1701: /* avx512bw_ucmpv32hi3 */ |
| 11771 | case 1700: /* avx512vl_ucmpv32qi3_mask */ |
| 11772 | case 1699: /* avx512vl_ucmpv32qi3 */ |
| 11773 | case 1696: /* avx512bw_ucmpv64qi3_mask */ |
| 11774 | case 1695: /* avx512bw_ucmpv64qi3 */ |
| 11775 | case 1692: /* avx512vl_cmpv16hi3_mask */ |
| 11776 | case 1691: /* avx512vl_cmpv16hi3 */ |
| 11777 | case 1690: /* avx512bw_cmpv32hi3_mask */ |
| 11778 | case 1689: /* avx512bw_cmpv32hi3 */ |
| 11779 | case 1688: /* avx512vl_cmpv32qi3_mask */ |
| 11780 | case 1687: /* avx512vl_cmpv32qi3 */ |
| 11781 | case 1684: /* avx512bw_cmpv64qi3_mask */ |
| 11782 | case 1683: /* avx512bw_cmpv64qi3 */ |
| 11783 | case 1682: /* avx512vl_cmpv2df3_mask */ |
| 11784 | case 1681: /* avx512vl_cmpv2df3 */ |
| 11785 | case 1680: /* avx512vl_cmpv4df3_mask */ |
| 11786 | case 1679: /* avx512vl_cmpv4df3 */ |
| 11787 | case 1678: /* avx512f_cmpv8df3_mask_round */ |
| 11788 | case 1677: /* avx512f_cmpv8df3_round */ |
| 11789 | case 1676: /* avx512f_cmpv8df3_mask */ |
| 11790 | case 1675: /* avx512f_cmpv8df3 */ |
| 11791 | case 1674: /* avx512vl_cmpv4sf3_mask */ |
| 11792 | case 1673: /* avx512vl_cmpv4sf3 */ |
| 11793 | case 1672: /* avx512vl_cmpv8sf3_mask */ |
| 11794 | case 1671: /* avx512vl_cmpv8sf3 */ |
| 11795 | case 1670: /* avx512f_cmpv16sf3_mask_round */ |
| 11796 | case 1669: /* avx512f_cmpv16sf3_round */ |
| 11797 | case 1668: /* avx512f_cmpv16sf3_mask */ |
| 11798 | case 1667: /* avx512f_cmpv16sf3 */ |
| 11799 | case 1664: /* avx512vl_cmpv4di3_mask */ |
| 11800 | case 1663: /* avx512vl_cmpv4di3 */ |
| 11801 | case 1662: /* avx512f_cmpv8di3_mask_round */ |
| 11802 | case 1661: /* avx512f_cmpv8di3_round */ |
| 11803 | case 1660: /* avx512f_cmpv8di3_mask */ |
| 11804 | case 1659: /* avx512f_cmpv8di3 */ |
| 11805 | case 1656: /* avx512vl_cmpv8si3_mask */ |
| 11806 | case 1655: /* avx512vl_cmpv8si3 */ |
| 11807 | case 1654: /* avx512f_cmpv16si3_mask_round */ |
| 11808 | case 1653: /* avx512f_cmpv16si3_round */ |
| 11809 | case 1652: /* avx512f_cmpv16si3_mask */ |
| 11810 | case 1651: /* avx512f_cmpv16si3 */ |
| 11811 | case 1648: /* sse2_maskcmpv2df3 */ |
| 11812 | case 1647: /* avx_maskcmpv4df3 */ |
| 11813 | case 1646: /* sse_maskcmpv4sf3 */ |
| 11814 | case 1645: /* avx_maskcmpv8sf3 */ |
| 11815 | case 1644: /* *sse2_maskcmpv2df3_comm */ |
| 11816 | case 1643: /* *avx_maskcmpv4df3_comm */ |
| 11817 | case 1642: /* *sse_maskcmpv4sf3_comm */ |
| 11818 | case 1641: /* *avx_maskcmpv8sf3_comm */ |
| 11819 | case 1638: /* avx_cmpv2df3 */ |
| 11820 | case 1637: /* avx_cmpv4df3 */ |
| 11821 | case 1636: /* avx_cmpv4sf3 */ |
| 11822 | case 1635: /* avx_cmpv8sf3 */ |
| 11823 | case 1020: /* sse4_2_crc32di */ |
| 11824 | case 1019: /* sse4_2_crc32si */ |
| 11825 | case 1018: /* sse4_2_crc32hi */ |
| 11826 | case 1017: /* sse4_2_crc32qi */ |
| 11827 | case 801: /* *load_tp_di */ |
| 11828 | case 800: /* *load_tp_si */ |
| 11829 | case 799: /* *load_tp_x32_zext */ |
| 11830 | case 798: /* *load_tp_x32 */ |
| 11831 | case 704: /* leave_rex64 */ |
| 11832 | case 703: /* leave */ |
| 11833 | case 92: /* *movabsdi_2 */ |
| 11834 | case 91: /* *movabssi_2 */ |
| 11835 | case 90: /* *movabshi_2 */ |
| 11836 | case 89: /* *movabsqi_2 */ |
| 11837 | case 54: /* *cmpiuxf_i387 */ |
| 11838 | case 53: /* *cmpixf_i387 */ |
| 11839 | return 3; |
| 11840 | |
| 11841 | case 52: /* *cmpiudf */ |
| 11842 | case 51: /* *cmpiusf */ |
| 11843 | case 50: /* *cmpidf */ |
| 11844 | case 49: /* *cmpisf */ |
| 11845 | extract_constrain_insn_cached (insn); |
| 11846 | if (which_alternative == 0) |
| 11847 | { |
| 11848 | return 3; |
| 11849 | } |
| 11850 | else |
| 11851 | { |
| 11852 | return 4; |
| 11853 | } |
| 11854 | |
| 11855 | case 4984: /* atomic_bit_test_and_resetdi_1 */ |
| 11856 | case 4983: /* atomic_bit_test_and_resetsi_1 */ |
| 11857 | case 4982: /* atomic_bit_test_and_resethi_1 */ |
| 11858 | case 4981: /* atomic_bit_test_and_complementdi_1 */ |
| 11859 | case 4980: /* atomic_bit_test_and_complementsi_1 */ |
| 11860 | case 4979: /* atomic_bit_test_and_complementhi_1 */ |
| 11861 | case 4978: /* atomic_bit_test_and_setdi_1 */ |
| 11862 | case 4977: /* atomic_bit_test_and_setsi_1 */ |
| 11863 | case 4976: /* atomic_bit_test_and_sethi_1 */ |
| 11864 | case 4975: /* atomic_xordi */ |
| 11865 | case 4974: /* atomic_ordi */ |
| 11866 | case 4973: /* atomic_anddi */ |
| 11867 | case 4972: /* atomic_xorsi */ |
| 11868 | case 4971: /* atomic_orsi */ |
| 11869 | case 4970: /* atomic_andsi */ |
| 11870 | case 4969: /* atomic_xorhi */ |
| 11871 | case 4968: /* atomic_orhi */ |
| 11872 | case 4967: /* atomic_andhi */ |
| 11873 | case 4966: /* atomic_xorqi */ |
| 11874 | case 4965: /* atomic_orqi */ |
| 11875 | case 4964: /* atomic_andqi */ |
| 11876 | case 4963: /* atomic_subdi */ |
| 11877 | case 4962: /* atomic_subsi */ |
| 11878 | case 4961: /* atomic_subhi */ |
| 11879 | case 4960: /* atomic_subqi */ |
| 11880 | case 4959: /* atomic_adddi */ |
| 11881 | case 4958: /* atomic_addsi */ |
| 11882 | case 4957: /* atomic_addhi */ |
| 11883 | case 4956: /* atomic_addqi */ |
| 11884 | case 4955: /* atomic_exchangedi */ |
| 11885 | case 4954: /* atomic_exchangesi */ |
| 11886 | case 4953: /* atomic_exchangehi */ |
| 11887 | case 4952: /* atomic_exchangeqi */ |
| 11888 | case 4951: /* *atomic_fetch_add_cmpdi */ |
| 11889 | case 4950: /* *atomic_fetch_add_cmpsi */ |
| 11890 | case 4949: /* *atomic_fetch_add_cmphi */ |
| 11891 | case 4948: /* *atomic_fetch_add_cmpqi */ |
| 11892 | case 4947: /* atomic_fetch_adddi */ |
| 11893 | case 4946: /* atomic_fetch_addsi */ |
| 11894 | case 4945: /* atomic_fetch_addhi */ |
| 11895 | case 4944: /* atomic_fetch_addqi */ |
| 11896 | case 4943: /* atomic_compare_and_swapdi_1 */ |
| 11897 | case 4942: /* atomic_compare_and_swapsi_1 */ |
| 11898 | case 4941: /* atomic_compare_and_swaphi_1 */ |
| 11899 | case 4940: /* atomic_compare_and_swapqi_1 */ |
| 11900 | case 4939: /* atomic_compare_and_swapti_doubleword */ |
| 11901 | case 4938: /* atomic_compare_and_swapdi_doubleword */ |
| 11902 | case 4933: /* atomic_storedi_fpu */ |
| 11903 | case 4932: /* atomic_storedi_1 */ |
| 11904 | case 4931: /* atomic_storesi_1 */ |
| 11905 | case 4930: /* atomic_storehi_1 */ |
| 11906 | case 4929: /* atomic_storeqi_1 */ |
| 11907 | case 4928: /* atomic_loaddi_fpu */ |
| 11908 | case 4927: /* mfence_nosse */ |
| 11909 | case 4923: /* vpopcountv8di_mask */ |
| 11910 | case 4922: /* vpopcountv8di */ |
| 11911 | case 4921: /* vpopcountv16si_mask */ |
| 11912 | case 4920: /* vpopcountv16si */ |
| 11913 | case 4901: /* *movv64si_internal */ |
| 11914 | case 4900: /* *movv64sf_internal */ |
| 11915 | case 4875: /* avx512f_pd512_256pd */ |
| 11916 | case 4874: /* avx512f_ps512_256ps */ |
| 11917 | case 4873: /* avx512f_si512_256si */ |
| 11918 | case 4872: /* avx512f_pd512_pd */ |
| 11919 | case 4871: /* avx512f_ps512_ps */ |
| 11920 | case 4870: /* avx512f_si512_si */ |
| 11921 | case 4832: /* avx512f_vgetmantv2df_round */ |
| 11922 | case 4831: /* avx512f_vgetmantv2df */ |
| 11923 | case 4830: /* avx512f_vgetmantv4sf_round */ |
| 11924 | case 4829: /* avx512f_vgetmantv4sf */ |
| 11925 | case 4828: /* avx512vl_getmantv2df_mask_round */ |
| 11926 | case 4827: /* avx512vl_getmantv2df_mask */ |
| 11927 | case 4826: /* avx512vl_getmantv2df_round */ |
| 11928 | case 4825: /* avx512vl_getmantv2df */ |
| 11929 | case 4824: /* avx512vl_getmantv4df_mask_round */ |
| 11930 | case 4823: /* avx512vl_getmantv4df_mask */ |
| 11931 | case 4822: /* avx512vl_getmantv4df_round */ |
| 11932 | case 4821: /* avx512vl_getmantv4df */ |
| 11933 | case 4820: /* avx512f_getmantv8df_mask_round */ |
| 11934 | case 4819: /* avx512f_getmantv8df_mask */ |
| 11935 | case 4818: /* avx512f_getmantv8df_round */ |
| 11936 | case 4817: /* avx512f_getmantv8df */ |
| 11937 | case 4816: /* avx512vl_getmantv4sf_mask_round */ |
| 11938 | case 4815: /* avx512vl_getmantv4sf_mask */ |
| 11939 | case 4814: /* avx512vl_getmantv4sf_round */ |
| 11940 | case 4813: /* avx512vl_getmantv4sf */ |
| 11941 | case 4812: /* avx512vl_getmantv8sf_mask_round */ |
| 11942 | case 4811: /* avx512vl_getmantv8sf_mask */ |
| 11943 | case 4810: /* avx512vl_getmantv8sf_round */ |
| 11944 | case 4809: /* avx512vl_getmantv8sf */ |
| 11945 | case 4808: /* avx512f_getmantv16sf_mask_round */ |
| 11946 | case 4807: /* avx512f_getmantv16sf_mask */ |
| 11947 | case 4806: /* avx512f_getmantv16sf_round */ |
| 11948 | case 4805: /* avx512f_getmantv16sf */ |
| 11949 | case 4435: /* avx_pd256_pd */ |
| 11950 | case 4434: /* avx_ps256_ps */ |
| 11951 | case 4433: /* avx_si256_si */ |
| 11952 | case 4252: /* *avx_vperm_broadcast_v4df */ |
| 11953 | case 4251: /* *avx_vperm_broadcast_v8sf */ |
| 11954 | case 4043: /* xop_pcom_tfv2di3 */ |
| 11955 | case 4042: /* xop_pcom_tfv4si3 */ |
| 11956 | case 4041: /* xop_pcom_tfv8hi3 */ |
| 11957 | case 4040: /* xop_pcom_tfv16qi3 */ |
| 11958 | case 4039: /* xop_maskcmp_uns2v2di3 */ |
| 11959 | case 4038: /* xop_maskcmp_uns2v4si3 */ |
| 11960 | case 4037: /* xop_maskcmp_uns2v8hi3 */ |
| 11961 | case 4036: /* xop_maskcmp_uns2v16qi3 */ |
| 11962 | case 4035: /* xop_maskcmp_unsv2di3 */ |
| 11963 | case 4034: /* xop_maskcmp_unsv4si3 */ |
| 11964 | case 4033: /* xop_maskcmp_unsv8hi3 */ |
| 11965 | case 4032: /* xop_maskcmp_unsv16qi3 */ |
| 11966 | case 3677: /* sse3_monitor_di */ |
| 11967 | case 3676: /* sse3_monitor_si */ |
| 11968 | case 3675: /* sse3_mwait */ |
| 11969 | case 3637: /* *vec_extractv4si_zext_mem */ |
| 11970 | case 3636: /* *vec_extractv4si_mem */ |
| 11971 | case 3633: /* *vec_extractv4si_0_zext */ |
| 11972 | case 3632: /* *vec_extractv4si_0_zext_sse4 */ |
| 11973 | case 3631: /* *vec_extractv2di_0_sse */ |
| 11974 | case 3630: /* *vec_extractv2di_0 */ |
| 11975 | case 3629: /* *vec_extractv4si_0 */ |
| 11976 | case 3628: /* *vec_extractv8hi_mem */ |
| 11977 | case 3627: /* *vec_extractv16qi_mem */ |
| 11978 | case 3503: /* avx512vl_testnmv2di3_mask */ |
| 11979 | case 3502: /* avx512vl_testnmv2di3 */ |
| 11980 | case 3501: /* avx512vl_testnmv4di3_mask */ |
| 11981 | case 3500: /* avx512vl_testnmv4di3 */ |
| 11982 | case 3499: /* avx512f_testnmv8di3_mask */ |
| 11983 | case 3498: /* avx512f_testnmv8di3 */ |
| 11984 | case 3497: /* avx512vl_testnmv4si3_mask */ |
| 11985 | case 3496: /* avx512vl_testnmv4si3 */ |
| 11986 | case 3495: /* avx512vl_testnmv8si3_mask */ |
| 11987 | case 3494: /* avx512vl_testnmv8si3 */ |
| 11988 | case 3493: /* avx512f_testnmv16si3_mask */ |
| 11989 | case 3492: /* avx512f_testnmv16si3 */ |
| 11990 | case 3491: /* avx512vl_testnmv8hi3_mask */ |
| 11991 | case 3490: /* avx512vl_testnmv8hi3 */ |
| 11992 | case 3489: /* avx512vl_testnmv16hi3_mask */ |
| 11993 | case 3488: /* avx512vl_testnmv16hi3 */ |
| 11994 | case 3487: /* avx512bw_testnmv32hi3_mask */ |
| 11995 | case 3486: /* avx512bw_testnmv32hi3 */ |
| 11996 | case 3485: /* avx512vl_testnmv32qi3_mask */ |
| 11997 | case 3484: /* avx512vl_testnmv32qi3 */ |
| 11998 | case 3483: /* avx512vl_testnmv16qi3_mask */ |
| 11999 | case 3482: /* avx512vl_testnmv16qi3 */ |
| 12000 | case 3481: /* avx512bw_testnmv64qi3_mask */ |
| 12001 | case 3480: /* avx512bw_testnmv64qi3 */ |
| 12002 | case 3479: /* avx512vl_testmv2di3_mask */ |
| 12003 | case 3478: /* avx512vl_testmv2di3 */ |
| 12004 | case 3477: /* avx512vl_testmv4di3_mask */ |
| 12005 | case 3476: /* avx512vl_testmv4di3 */ |
| 12006 | case 3475: /* avx512f_testmv8di3_mask */ |
| 12007 | case 3474: /* avx512f_testmv8di3 */ |
| 12008 | case 3473: /* avx512vl_testmv4si3_mask */ |
| 12009 | case 3472: /* avx512vl_testmv4si3 */ |
| 12010 | case 3471: /* avx512vl_testmv8si3_mask */ |
| 12011 | case 3470: /* avx512vl_testmv8si3 */ |
| 12012 | case 3469: /* avx512f_testmv16si3_mask */ |
| 12013 | case 3468: /* avx512f_testmv16si3 */ |
| 12014 | case 3467: /* avx512vl_testmv8hi3_mask */ |
| 12015 | case 3466: /* avx512vl_testmv8hi3 */ |
| 12016 | case 3465: /* avx512vl_testmv16hi3_mask */ |
| 12017 | case 3464: /* avx512vl_testmv16hi3 */ |
| 12018 | case 3463: /* avx512bw_testmv32hi3_mask */ |
| 12019 | case 3462: /* avx512bw_testmv32hi3 */ |
| 12020 | case 3461: /* avx512vl_testmv32qi3_mask */ |
| 12021 | case 3460: /* avx512vl_testmv32qi3 */ |
| 12022 | case 3459: /* avx512vl_testmv16qi3_mask */ |
| 12023 | case 3458: /* avx512vl_testmv16qi3 */ |
| 12024 | case 3457: /* avx512bw_testmv64qi3_mask */ |
| 12025 | case 3456: /* avx512bw_testmv64qi3 */ |
| 12026 | case 3383: /* sse2_gtv4si3 */ |
| 12027 | case 3382: /* sse2_gtv8hi3 */ |
| 12028 | case 3381: /* sse2_gtv16qi3 */ |
| 12029 | case 3380: /* avx512vl_gtv8hi3_mask */ |
| 12030 | case 3379: /* avx512vl_gtv8hi3 */ |
| 12031 | case 3372: /* avx512vl_gtv16qi3_mask */ |
| 12032 | case 3371: /* avx512vl_gtv16qi3 */ |
| 12033 | case 3368: /* avx512vl_gtv2di3_mask */ |
| 12034 | case 3367: /* avx512vl_gtv2di3 */ |
| 12035 | case 3362: /* avx512vl_gtv4si3_mask */ |
| 12036 | case 3361: /* avx512vl_gtv4si3 */ |
| 12037 | case 3352: /* sse4_2_gtv2di3 */ |
| 12038 | case 3351: /* *sse2_eqv4si3 */ |
| 12039 | case 3350: /* *sse2_eqv8hi3 */ |
| 12040 | case 3349: /* *sse2_eqv16qi3 */ |
| 12041 | case 3348: /* *sse4_1_eqv2di3 */ |
| 12042 | case 3347: /* avx512vl_eqv2di3_mask_1 */ |
| 12043 | case 3346: /* avx512vl_eqv2di3_1 */ |
| 12044 | case 3341: /* avx512vl_eqv4si3_mask_1 */ |
| 12045 | case 3340: /* avx512vl_eqv4si3_1 */ |
| 12046 | case 3335: /* avx512vl_eqv8hi3_mask_1 */ |
| 12047 | case 3334: /* avx512vl_eqv8hi3_1 */ |
| 12048 | case 3327: /* avx512vl_eqv16qi3_mask_1 */ |
| 12049 | case 3326: /* avx512vl_eqv16qi3_1 */ |
| 12050 | case 3191: /* avx512vl_rorv2di_mask */ |
| 12051 | case 3190: /* avx512vl_rorv2di */ |
| 12052 | case 3189: /* avx512vl_rolv2di_mask */ |
| 12053 | case 3188: /* avx512vl_rolv2di */ |
| 12054 | case 3187: /* avx512vl_rorv4di_mask */ |
| 12055 | case 3186: /* avx512vl_rorv4di */ |
| 12056 | case 3185: /* avx512vl_rolv4di_mask */ |
| 12057 | case 3184: /* avx512vl_rolv4di */ |
| 12058 | case 3183: /* avx512f_rorv8di_mask */ |
| 12059 | case 3182: /* avx512f_rorv8di */ |
| 12060 | case 3181: /* avx512f_rolv8di_mask */ |
| 12061 | case 3180: /* avx512f_rolv8di */ |
| 12062 | case 3179: /* avx512vl_rorv4si_mask */ |
| 12063 | case 3178: /* avx512vl_rorv4si */ |
| 12064 | case 3177: /* avx512vl_rolv4si_mask */ |
| 12065 | case 3176: /* avx512vl_rolv4si */ |
| 12066 | case 3175: /* avx512vl_rorv8si_mask */ |
| 12067 | case 3174: /* avx512vl_rorv8si */ |
| 12068 | case 3173: /* avx512vl_rolv8si_mask */ |
| 12069 | case 3172: /* avx512vl_rolv8si */ |
| 12070 | case 3171: /* avx512f_rorv16si_mask */ |
| 12071 | case 3170: /* avx512f_rorv16si */ |
| 12072 | case 3169: /* avx512f_rolv16si_mask */ |
| 12073 | case 3168: /* avx512f_rolv16si */ |
| 12074 | case 3167: /* avx512vl_rorvv2di_mask */ |
| 12075 | case 3166: /* avx512vl_rorvv2di */ |
| 12076 | case 3165: /* avx512vl_rolvv2di_mask */ |
| 12077 | case 3164: /* avx512vl_rolvv2di */ |
| 12078 | case 3163: /* avx512vl_rorvv4di_mask */ |
| 12079 | case 3162: /* avx512vl_rorvv4di */ |
| 12080 | case 3161: /* avx512vl_rolvv4di_mask */ |
| 12081 | case 3160: /* avx512vl_rolvv4di */ |
| 12082 | case 3159: /* avx512f_rorvv8di_mask */ |
| 12083 | case 3158: /* avx512f_rorvv8di */ |
| 12084 | case 3157: /* avx512f_rolvv8di_mask */ |
| 12085 | case 3156: /* avx512f_rolvv8di */ |
| 12086 | case 3155: /* avx512vl_rorvv4si_mask */ |
| 12087 | case 3154: /* avx512vl_rorvv4si */ |
| 12088 | case 3153: /* avx512vl_rolvv4si_mask */ |
| 12089 | case 3152: /* avx512vl_rolvv4si */ |
| 12090 | case 3151: /* avx512vl_rorvv8si_mask */ |
| 12091 | case 3150: /* avx512vl_rorvv8si */ |
| 12092 | case 3149: /* avx512vl_rolvv8si_mask */ |
| 12093 | case 3148: /* avx512vl_rolvv8si */ |
| 12094 | case 3147: /* avx512f_rorvv16si_mask */ |
| 12095 | case 3146: /* avx512f_rorvv16si */ |
| 12096 | case 3145: /* avx512f_rolvv16si_mask */ |
| 12097 | case 3144: /* avx512f_rolvv16si */ |
| 12098 | case 2704: /* avx512f_rndscalev2df_round */ |
| 12099 | case 2703: /* avx512f_rndscalev2df */ |
| 12100 | case 2702: /* avx512f_rndscalev4sf_round */ |
| 12101 | case 2701: /* avx512f_rndscalev4sf */ |
| 12102 | case 2700: /* avx512vl_rndscalev2df_mask_round */ |
| 12103 | case 2699: /* avx512vl_rndscalev2df_mask */ |
| 12104 | case 2698: /* avx512vl_rndscalev2df_round */ |
| 12105 | case 2697: /* avx512vl_rndscalev2df */ |
| 12106 | case 2696: /* avx512vl_rndscalev4df_mask_round */ |
| 12107 | case 2695: /* avx512vl_rndscalev4df_mask */ |
| 12108 | case 2694: /* avx512vl_rndscalev4df_round */ |
| 12109 | case 2693: /* avx512vl_rndscalev4df */ |
| 12110 | case 2692: /* avx512f_rndscalev8df_mask_round */ |
| 12111 | case 2691: /* avx512f_rndscalev8df_mask */ |
| 12112 | case 2690: /* avx512f_rndscalev8df_round */ |
| 12113 | case 2689: /* avx512f_rndscalev8df */ |
| 12114 | case 2688: /* avx512vl_rndscalev4sf_mask_round */ |
| 12115 | case 2687: /* avx512vl_rndscalev4sf_mask */ |
| 12116 | case 2686: /* avx512vl_rndscalev4sf_round */ |
| 12117 | case 2685: /* avx512vl_rndscalev4sf */ |
| 12118 | case 2684: /* avx512vl_rndscalev8sf_mask_round */ |
| 12119 | case 2683: /* avx512vl_rndscalev8sf_mask */ |
| 12120 | case 2682: /* avx512vl_rndscalev8sf_round */ |
| 12121 | case 2681: /* avx512vl_rndscalev8sf */ |
| 12122 | case 2680: /* avx512f_rndscalev16sf_mask_round */ |
| 12123 | case 2679: /* avx512f_rndscalev16sf_mask */ |
| 12124 | case 2678: /* avx512f_rndscalev16sf_round */ |
| 12125 | case 2677: /* avx512f_rndscalev16sf */ |
| 12126 | case 2676: /* avx512f_sfixupimmv2df_mask_round */ |
| 12127 | case 2675: /* avx512f_sfixupimmv2df_mask */ |
| 12128 | case 2674: /* avx512f_sfixupimmv4sf_mask_round */ |
| 12129 | case 2673: /* avx512f_sfixupimmv4sf_mask */ |
| 12130 | case 2672: /* avx512f_sfixupimmv2df_maskz_1_round */ |
| 12131 | case 2671: /* avx512f_sfixupimmv2df_maskz_1 */ |
| 12132 | case 2670: /* avx512f_sfixupimmv2df_round */ |
| 12133 | case 2669: /* avx512f_sfixupimmv2df */ |
| 12134 | case 2668: /* avx512f_sfixupimmv4sf_maskz_1_round */ |
| 12135 | case 2667: /* avx512f_sfixupimmv4sf_maskz_1 */ |
| 12136 | case 2666: /* avx512f_sfixupimmv4sf_round */ |
| 12137 | case 2665: /* avx512f_sfixupimmv4sf */ |
| 12138 | case 2664: /* avx512vl_fixupimmv2df_mask_round */ |
| 12139 | case 2663: /* avx512vl_fixupimmv2df_mask */ |
| 12140 | case 2662: /* avx512vl_fixupimmv4df_mask_round */ |
| 12141 | case 2661: /* avx512vl_fixupimmv4df_mask */ |
| 12142 | case 2660: /* avx512f_fixupimmv8df_mask_round */ |
| 12143 | case 2659: /* avx512f_fixupimmv8df_mask */ |
| 12144 | case 2658: /* avx512vl_fixupimmv4sf_mask_round */ |
| 12145 | case 2657: /* avx512vl_fixupimmv4sf_mask */ |
| 12146 | case 2656: /* avx512vl_fixupimmv8sf_mask_round */ |
| 12147 | case 2655: /* avx512vl_fixupimmv8sf_mask */ |
| 12148 | case 2654: /* avx512f_fixupimmv16sf_mask_round */ |
| 12149 | case 2653: /* avx512f_fixupimmv16sf_mask */ |
| 12150 | case 2652: /* avx512vl_fixupimmv2df_maskz_1_round */ |
| 12151 | case 2651: /* avx512vl_fixupimmv2df_maskz_1 */ |
| 12152 | case 2650: /* avx512vl_fixupimmv2df_round */ |
| 12153 | case 2649: /* avx512vl_fixupimmv2df */ |
| 12154 | case 2648: /* avx512vl_fixupimmv4df_maskz_1_round */ |
| 12155 | case 2647: /* avx512vl_fixupimmv4df_maskz_1 */ |
| 12156 | case 2646: /* avx512vl_fixupimmv4df_round */ |
| 12157 | case 2645: /* avx512vl_fixupimmv4df */ |
| 12158 | case 2644: /* avx512f_fixupimmv8df_maskz_1_round */ |
| 12159 | case 2643: /* avx512f_fixupimmv8df_maskz_1 */ |
| 12160 | case 2642: /* avx512f_fixupimmv8df_round */ |
| 12161 | case 2641: /* avx512f_fixupimmv8df */ |
| 12162 | case 2640: /* avx512vl_fixupimmv4sf_maskz_1_round */ |
| 12163 | case 2639: /* avx512vl_fixupimmv4sf_maskz_1 */ |
| 12164 | case 2638: /* avx512vl_fixupimmv4sf_round */ |
| 12165 | case 2637: /* avx512vl_fixupimmv4sf */ |
| 12166 | case 2636: /* avx512vl_fixupimmv8sf_maskz_1_round */ |
| 12167 | case 2635: /* avx512vl_fixupimmv8sf_maskz_1 */ |
| 12168 | case 2634: /* avx512vl_fixupimmv8sf_round */ |
| 12169 | case 2633: /* avx512vl_fixupimmv8sf */ |
| 12170 | case 2632: /* avx512f_fixupimmv16sf_maskz_1_round */ |
| 12171 | case 2631: /* avx512f_fixupimmv16sf_maskz_1 */ |
| 12172 | case 2630: /* avx512f_fixupimmv16sf_round */ |
| 12173 | case 2629: /* avx512f_fixupimmv16sf */ |
| 12174 | case 2628: /* avx512vl_alignv2di_mask */ |
| 12175 | case 2627: /* *avx512vl_alignv2di */ |
| 12176 | case 2626: /* avx512vl_alignv4di_mask */ |
| 12177 | case 2625: /* *avx512vl_alignv4di */ |
| 12178 | case 2624: /* avx512f_alignv8di_mask */ |
| 12179 | case 2623: /* *avx512f_alignv8di */ |
| 12180 | case 2622: /* avx512vl_alignv4si_mask */ |
| 12181 | case 2621: /* *avx512vl_alignv4si */ |
| 12182 | case 2620: /* avx512vl_alignv8si_mask */ |
| 12183 | case 2619: /* *avx512vl_alignv8si */ |
| 12184 | case 2618: /* avx512f_alignv16si_mask */ |
| 12185 | case 2617: /* *avx512f_alignv16si */ |
| 12186 | case 2616: /* avx512f_sgetexpv2df_round */ |
| 12187 | case 2615: /* avx512f_sgetexpv2df */ |
| 12188 | case 2614: /* avx512f_sgetexpv4sf_round */ |
| 12189 | case 2613: /* avx512f_sgetexpv4sf */ |
| 12190 | case 2612: /* avx512vl_getexpv2df_mask_round */ |
| 12191 | case 2611: /* avx512vl_getexpv2df_mask */ |
| 12192 | case 2610: /* avx512vl_getexpv2df_round */ |
| 12193 | case 2609: /* avx512vl_getexpv2df */ |
| 12194 | case 2608: /* avx512vl_getexpv4df_mask_round */ |
| 12195 | case 2607: /* avx512vl_getexpv4df_mask */ |
| 12196 | case 2606: /* avx512vl_getexpv4df_round */ |
| 12197 | case 2605: /* avx512vl_getexpv4df */ |
| 12198 | case 2604: /* avx512f_getexpv8df_mask_round */ |
| 12199 | case 2603: /* avx512f_getexpv8df_mask */ |
| 12200 | case 2602: /* avx512f_getexpv8df_round */ |
| 12201 | case 2601: /* avx512f_getexpv8df */ |
| 12202 | case 2600: /* avx512vl_getexpv4sf_mask_round */ |
| 12203 | case 2599: /* avx512vl_getexpv4sf_mask */ |
| 12204 | case 2598: /* avx512vl_getexpv4sf_round */ |
| 12205 | case 2597: /* avx512vl_getexpv4sf */ |
| 12206 | case 2596: /* avx512vl_getexpv8sf_mask_round */ |
| 12207 | case 2595: /* avx512vl_getexpv8sf_mask */ |
| 12208 | case 2594: /* avx512vl_getexpv8sf_round */ |
| 12209 | case 2593: /* avx512vl_getexpv8sf */ |
| 12210 | case 2592: /* avx512f_getexpv16sf_mask_round */ |
| 12211 | case 2591: /* avx512f_getexpv16sf_mask */ |
| 12212 | case 2590: /* avx512f_getexpv16sf_round */ |
| 12213 | case 2589: /* avx512f_getexpv16sf */ |
| 12214 | case 2570: /* avx512vl_scalefv2df_mask_round */ |
| 12215 | case 2569: /* avx512vl_scalefv2df_mask */ |
| 12216 | case 2568: /* avx512vl_scalefv2df_round */ |
| 12217 | case 2567: /* avx512vl_scalefv2df */ |
| 12218 | case 2566: /* avx512vl_scalefv4df_mask_round */ |
| 12219 | case 2565: /* avx512vl_scalefv4df_mask */ |
| 12220 | case 2564: /* avx512vl_scalefv4df_round */ |
| 12221 | case 2563: /* avx512vl_scalefv4df */ |
| 12222 | case 2562: /* avx512f_scalefv8df_mask_round */ |
| 12223 | case 2561: /* avx512f_scalefv8df_mask */ |
| 12224 | case 2560: /* avx512f_scalefv8df_round */ |
| 12225 | case 2559: /* avx512f_scalefv8df */ |
| 12226 | case 2558: /* avx512vl_scalefv4sf_mask_round */ |
| 12227 | case 2557: /* avx512vl_scalefv4sf_mask */ |
| 12228 | case 2556: /* avx512vl_scalefv4sf_round */ |
| 12229 | case 2555: /* avx512vl_scalefv4sf */ |
| 12230 | case 2554: /* avx512vl_scalefv8sf_mask_round */ |
| 12231 | case 2553: /* avx512vl_scalefv8sf_mask */ |
| 12232 | case 2552: /* avx512vl_scalefv8sf_round */ |
| 12233 | case 2551: /* avx512vl_scalefv8sf */ |
| 12234 | case 2550: /* avx512f_scalefv16sf_mask_round */ |
| 12235 | case 2549: /* avx512f_scalefv16sf_mask */ |
| 12236 | case 2548: /* avx512f_scalefv16sf_round */ |
| 12237 | case 2547: /* avx512f_scalefv16sf */ |
| 12238 | case 2546: /* avx512f_vmscalefv2df_round */ |
| 12239 | case 2545: /* avx512f_vmscalefv2df */ |
| 12240 | case 2544: /* avx512f_vmscalefv4sf_round */ |
| 12241 | case 2543: /* avx512f_vmscalefv4sf */ |
| 12242 | case 2529: /* vec_extract_lo_v32qi */ |
| 12243 | case 2527: /* vec_extract_lo_v64qi */ |
| 12244 | case 2525: /* vec_extract_lo_v16hi */ |
| 12245 | case 2523: /* vec_extract_lo_v32hi */ |
| 12246 | case 2502: /* vec_extract_lo_v16si_mask */ |
| 12247 | case 2501: /* vec_extract_lo_v16si */ |
| 12248 | case 2500: /* vec_extract_lo_v16sf_mask */ |
| 12249 | case 2499: /* vec_extract_lo_v16sf */ |
| 12250 | case 2468: /* *vec_extractv4sf_mem */ |
| 12251 | case 2466: /* *vec_extractv4sf_0 */ |
| 12252 | case 2415: /* *avx512vl_cvtmask2qv2di */ |
| 12253 | case 2414: /* *avx512vl_cvtmask2qv4di */ |
| 12254 | case 2413: /* *avx512f_cvtmask2qv8di */ |
| 12255 | case 2412: /* *avx512vl_cvtmask2dv4si */ |
| 12256 | case 2411: /* *avx512vl_cvtmask2dv8si */ |
| 12257 | case 2410: /* *avx512f_cvtmask2dv16si */ |
| 12258 | case 2409: /* *avx512vl_cvtmask2wv8hi */ |
| 12259 | case 2408: /* *avx512vl_cvtmask2wv16hi */ |
| 12260 | case 2407: /* *avx512bw_cvtmask2wv32hi */ |
| 12261 | case 2406: /* *avx512vl_cvtmask2bv32qi */ |
| 12262 | case 2405: /* *avx512vl_cvtmask2bv16qi */ |
| 12263 | case 2404: /* *avx512bw_cvtmask2bv64qi */ |
| 12264 | case 2403: /* avx512vl_cvtq2maskv2di */ |
| 12265 | case 2402: /* avx512vl_cvtq2maskv4di */ |
| 12266 | case 2401: /* avx512f_cvtq2maskv8di */ |
| 12267 | case 2400: /* avx512vl_cvtd2maskv4si */ |
| 12268 | case 2399: /* avx512vl_cvtd2maskv8si */ |
| 12269 | case 2398: /* avx512f_cvtd2maskv16si */ |
| 12270 | case 2397: /* avx512vl_cvtw2maskv8hi */ |
| 12271 | case 2396: /* avx512vl_cvtw2maskv16hi */ |
| 12272 | case 2395: /* avx512bw_cvtw2maskv32hi */ |
| 12273 | case 2394: /* avx512vl_cvtb2maskv32qi */ |
| 12274 | case 2393: /* avx512vl_cvtb2maskv16qi */ |
| 12275 | case 2392: /* avx512bw_cvtb2maskv64qi */ |
| 12276 | case 1726: /* avx512f_vmcmpv2df3_mask_round */ |
| 12277 | case 1725: /* avx512f_vmcmpv2df3_mask */ |
| 12278 | case 1724: /* avx512f_vmcmpv4sf3_mask_round */ |
| 12279 | case 1723: /* avx512f_vmcmpv4sf3_mask */ |
| 12280 | case 1722: /* avx512f_vmcmpv2df3_round */ |
| 12281 | case 1721: /* avx512f_vmcmpv2df3 */ |
| 12282 | case 1720: /* avx512f_vmcmpv4sf3_round */ |
| 12283 | case 1719: /* avx512f_vmcmpv4sf3 */ |
| 12284 | case 1718: /* avx512vl_ucmpv2di3_mask */ |
| 12285 | case 1717: /* avx512vl_ucmpv2di3 */ |
| 12286 | case 1712: /* avx512vl_ucmpv4si3_mask */ |
| 12287 | case 1711: /* avx512vl_ucmpv4si3 */ |
| 12288 | case 1706: /* avx512vl_ucmpv8hi3_mask */ |
| 12289 | case 1705: /* avx512vl_ucmpv8hi3 */ |
| 12290 | case 1698: /* avx512vl_ucmpv16qi3_mask */ |
| 12291 | case 1697: /* avx512vl_ucmpv16qi3 */ |
| 12292 | case 1694: /* avx512vl_cmpv8hi3_mask */ |
| 12293 | case 1693: /* avx512vl_cmpv8hi3 */ |
| 12294 | case 1686: /* avx512vl_cmpv16qi3_mask */ |
| 12295 | case 1685: /* avx512vl_cmpv16qi3 */ |
| 12296 | case 1666: /* avx512vl_cmpv2di3_mask */ |
| 12297 | case 1665: /* avx512vl_cmpv2di3 */ |
| 12298 | case 1658: /* avx512vl_cmpv4si3_mask */ |
| 12299 | case 1657: /* avx512vl_cmpv4si3 */ |
| 12300 | case 1650: /* sse2_vmmaskcmpv2df3 */ |
| 12301 | case 1649: /* sse_vmmaskcmpv4sf3 */ |
| 12302 | case 1640: /* avx_vmcmpv2df3 */ |
| 12303 | case 1639: /* avx_vmcmpv4sf3 */ |
| 12304 | case 1360: /* *absnegv2df2 */ |
| 12305 | case 1359: /* *absnegv4df2 */ |
| 12306 | case 1358: /* *absnegv8df2 */ |
| 12307 | case 1357: /* *absnegv4sf2 */ |
| 12308 | case 1356: /* *absnegv8sf2 */ |
| 12309 | case 1355: /* *absnegv16sf2 */ |
| 12310 | case 1354: /* kunpckdi */ |
| 12311 | case 1353: /* kunpcksi */ |
| 12312 | case 1294: /* movdi_to_sse */ |
| 12313 | case 1217: /* *mmx_femms */ |
| 12314 | case 1216: /* *mmx_emms */ |
| 12315 | case 1209: /* *vec_extractv2si_zext_mem */ |
| 12316 | case 1207: /* *vec_extractv2si_0 */ |
| 12317 | case 1137: /* *vec_extractv2sf_0 */ |
| 12318 | case 1105: /* rdpid */ |
| 12319 | case 1104: /* *wrpkru */ |
| 12320 | case 1103: /* *rdpkru */ |
| 12321 | case 1086: /* clzero_di */ |
| 12322 | case 1085: /* clzero_si */ |
| 12323 | case 1084: /* monitorx_di */ |
| 12324 | case 1083: /* monitorx_si */ |
| 12325 | case 1082: /* mwaitx */ |
| 12326 | case 1079: /* xtest_1 */ |
| 12327 | case 1078: /* xabort */ |
| 12328 | case 1077: /* xend */ |
| 12329 | case 1076: /* xbegin_1 */ |
| 12330 | case 1075: /* *pause */ |
| 12331 | case 1074: /* rdseeddi_1 */ |
| 12332 | case 1073: /* rdseedsi_1 */ |
| 12333 | case 1072: /* rdseedhi_1 */ |
| 12334 | case 1071: /* rdranddi_1 */ |
| 12335 | case 1070: /* rdrandsi_1 */ |
| 12336 | case 1069: /* rdrandhi_1 */ |
| 12337 | case 1068: /* wrgsbasedi */ |
| 12338 | case 1067: /* wrfsbasedi */ |
| 12339 | case 1066: /* wrgsbasesi */ |
| 12340 | case 1065: /* wrfsbasesi */ |
| 12341 | case 1064: /* rdgsbasedi */ |
| 12342 | case 1063: /* rdfsbasedi */ |
| 12343 | case 1062: /* rdgsbasesi */ |
| 12344 | case 1061: /* rdfsbasesi */ |
| 12345 | case 1052: /* fnclex */ |
| 12346 | case 1051: /* fnstsw */ |
| 12347 | case 1049: /* fnstenv */ |
| 12348 | case 1042: /* xsaves64 */ |
| 12349 | case 1041: /* xsavec64 */ |
| 12350 | case 1040: /* xsaveopt64 */ |
| 12351 | case 1039: /* xsave64 */ |
| 12352 | case 1038: /* xsaves_rex64 */ |
| 12353 | case 1037: /* xsavec_rex64 */ |
| 12354 | case 1036: /* xsaveopt_rex64 */ |
| 12355 | case 1035: /* xsave_rex64 */ |
| 12356 | case 1034: /* xsaves */ |
| 12357 | case 1033: /* xsavec */ |
| 12358 | case 1032: /* xsaveopt */ |
| 12359 | case 1031: /* xsave */ |
| 12360 | case 1028: /* fxsave64 */ |
| 12361 | case 1027: /* fxsave */ |
| 12362 | case 1026: /* rdtscp_rex64 */ |
| 12363 | case 1025: /* rdtscp */ |
| 12364 | case 1024: /* rdtsc_rex64 */ |
| 12365 | case 1023: /* rdtsc */ |
| 12366 | case 1022: /* rdpmc_rex64 */ |
| 12367 | case 1021: /* rdpmc */ |
| 12368 | case 1016: /* stack_tls_protect_test_di */ |
| 12369 | case 1015: /* stack_tls_protect_test_si */ |
| 12370 | case 1014: /* stack_protect_test_di */ |
| 12371 | case 1013: /* stack_protect_test_si */ |
| 12372 | case 1012: /* stack_tls_protect_set_di */ |
| 12373 | case 1011: /* stack_tls_protect_set_si */ |
| 12374 | case 1010: /* stack_protect_set_di */ |
| 12375 | case 1009: /* stack_protect_set_si */ |
| 12376 | case 1007: /* *prefetch_3dnow */ |
| 12377 | case 1005: /* trap */ |
| 12378 | case 1004: /* probe_stack_rangedi */ |
| 12379 | case 1003: /* probe_stack_rangesi */ |
| 12380 | case 1002: /* adjust_stack_and_probedi */ |
| 12381 | case 1001: /* adjust_stack_and_probesi */ |
| 12382 | case 998: /* allocate_stack_worker_probe_di */ |
| 12383 | case 997: /* allocate_stack_worker_probe_si */ |
| 12384 | case 968: /* *strlenqi_1 */ |
| 12385 | case 967: /* *strlenqi_1 */ |
| 12386 | case 966: /* *cmpstrnqi_1 */ |
| 12387 | case 965: /* *cmpstrnqi_1 */ |
| 12388 | case 964: /* *cmpstrnqi_nz_1 */ |
| 12389 | case 963: /* *cmpstrnqi_nz_1 */ |
| 12390 | case 934: /* cld */ |
| 12391 | case 811: /* *tls_dynamic_gnu2_combine_64 */ |
| 12392 | case 809: /* *tls_dynamic_gnu2_lea_64 */ |
| 12393 | case 808: /* *tls_dynamic_gnu2_combine_32 */ |
| 12394 | case 806: /* *tls_dynamic_gnu2_lea_32 */ |
| 12395 | case 797: /* *tls_local_dynamic_32_once */ |
| 12396 | case 796: /* *tls_local_dynamic_base_64_largepic */ |
| 12397 | case 795: /* *tls_local_dynamic_base_64_di */ |
| 12398 | case 794: /* *tls_local_dynamic_base_64_si */ |
| 12399 | case 793: /* *tls_local_dynamic_base_32_gnu */ |
| 12400 | case 792: /* *tls_global_dynamic_64_largepic */ |
| 12401 | case 791: /* *tls_global_dynamic_64_di */ |
| 12402 | case 790: /* *tls_global_dynamic_64_si */ |
| 12403 | case 789: /* *tls_global_dynamic_32_gnu */ |
| 12404 | case 788: /* *parityhi2_cmp */ |
| 12405 | case 787: /* paritysi2_cmp */ |
| 12406 | case 786: /* paritydi2_cmp */ |
| 12407 | case 785: /* bswaphi_lowpart */ |
| 12408 | case 784: /* *bswaphi_lowpart_1 */ |
| 12409 | case 778: /* *popcounthi2_1 */ |
| 12410 | case 706: /* ffssi2_no_cmove */ |
| 12411 | case 705: /* split_stack_return */ |
| 12412 | case 702: /* eh_return_internal */ |
| 12413 | case 700: /* set_rip_rex64 */ |
| 12414 | case 699: /* set_got_rex64 */ |
| 12415 | case 698: /* *set_got_labelled */ |
| 12416 | case 697: /* *set_got */ |
| 12417 | case 696: /* pad */ |
| 12418 | case 695: /* nops */ |
| 12419 | case 694: /* nop */ |
| 12420 | case 692: /* simple_return_pop_internal */ |
| 12421 | case 691: /* simple_return_internal_long */ |
| 12422 | case 690: /* interrupt_return */ |
| 12423 | case 689: /* simple_return_internal */ |
| 12424 | case 688: /* prologue_use */ |
| 12425 | case 687: /* *memory_blockage */ |
| 12426 | case 686: /* blockage */ |
| 12427 | case 658: /* *jccxf_si_r_i387 */ |
| 12428 | case 657: /* *jccdf_si_r_i387 */ |
| 12429 | case 656: /* *jccsf_si_r_i387 */ |
| 12430 | case 655: /* *jccxf_hi_r_i387 */ |
| 12431 | case 654: /* *jccdf_hi_r_i387 */ |
| 12432 | case 653: /* *jccsf_hi_r_i387 */ |
| 12433 | case 652: /* *jccxf_si_i387 */ |
| 12434 | case 651: /* *jccdf_si_i387 */ |
| 12435 | case 650: /* *jccsf_si_i387 */ |
| 12436 | case 649: /* *jccxf_hi_i387 */ |
| 12437 | case 648: /* *jccdf_hi_i387 */ |
| 12438 | case 647: /* *jccsf_hi_i387 */ |
| 12439 | case 646: /* *jccuxf_r_i387 */ |
| 12440 | case 645: /* *jccudf_r_i387 */ |
| 12441 | case 644: /* *jccusf_r_i387 */ |
| 12442 | case 643: /* *jccuxf_i387 */ |
| 12443 | case 642: /* *jccudf_i387 */ |
| 12444 | case 641: /* *jccusf_i387 */ |
| 12445 | case 640: /* *jccdf_r_i387 */ |
| 12446 | case 639: /* *jccsf_r_i387 */ |
| 12447 | case 638: /* *jccdf_i387 */ |
| 12448 | case 637: /* *jccsf_i387 */ |
| 12449 | case 636: /* *jccxf_r_i387 */ |
| 12450 | case 635: /* *jccxf_i387 */ |
| 12451 | case 634: /* *jccxf_0_r_i387 */ |
| 12452 | case 633: /* *jccdf_0_r_i387 */ |
| 12453 | case 632: /* *jccsf_0_r_i387 */ |
| 12454 | case 631: /* *jccxf_0_i387 */ |
| 12455 | case 630: /* *jccdf_0_i387 */ |
| 12456 | case 629: /* *jccsf_0_i387 */ |
| 12457 | case 626: /* setcc_df_sse */ |
| 12458 | case 625: /* setcc_sf_sse */ |
| 12459 | case 622: /* *setcc_si_1_movzbl */ |
| 12460 | case 621: /* *setcc_si_1_and */ |
| 12461 | case 620: /* *setcc_di_1 */ |
| 12462 | case 619: /* *jcc_btdi_mask */ |
| 12463 | case 618: /* *jcc_btsi_mask */ |
| 12464 | case 617: /* *jcc_btdi_1 */ |
| 12465 | case 616: /* *jcc_btsi_1 */ |
| 12466 | case 615: /* *jcc_btdi */ |
| 12467 | case 614: /* *jcc_btsi */ |
| 12468 | case 593: /* ix86_rotrti3_doubleword */ |
| 12469 | case 592: /* ix86_rotrdi3_doubleword */ |
| 12470 | case 591: /* ix86_rotlti3_doubleword */ |
| 12471 | case 590: /* ix86_rotldi3_doubleword */ |
| 12472 | case 589: /* *rotrdi3_mask */ |
| 12473 | case 588: /* *rotldi3_mask */ |
| 12474 | case 587: /* *rotrsi3_mask */ |
| 12475 | case 586: /* *rotlsi3_mask */ |
| 12476 | case 544: /* *ashrti3_doubleword */ |
| 12477 | case 543: /* *lshrti3_doubleword */ |
| 12478 | case 542: /* *ashrdi3_doubleword */ |
| 12479 | case 541: /* *lshrdi3_doubleword */ |
| 12480 | case 540: /* *ashrdi3_mask */ |
| 12481 | case 539: /* *lshrdi3_mask */ |
| 12482 | case 538: /* *ashrsi3_mask */ |
| 12483 | case 537: /* *lshrsi3_mask */ |
| 12484 | case 518: /* *ashldi3_mask */ |
| 12485 | case 517: /* *ashlsi3_mask */ |
| 12486 | case 514: /* *ashlti3_doubleword */ |
| 12487 | case 513: /* *ashldi3_doubleword */ |
| 12488 | case 502: /* *one_cmpldi2_doubleword */ |
| 12489 | case 501: /* copysigntf3_var */ |
| 12490 | case 500: /* copysigndf3_var */ |
| 12491 | case 499: /* copysignsf3_var */ |
| 12492 | case 498: /* copysigntf3_const */ |
| 12493 | case 497: /* copysigndf3_const */ |
| 12494 | case 496: /* copysignsf3_const */ |
| 12495 | case 495: /* *negextenddfxf2 */ |
| 12496 | case 494: /* *absextenddfxf2 */ |
| 12497 | case 493: /* *negextendsfxf2 */ |
| 12498 | case 492: /* *absextendsfxf2 */ |
| 12499 | case 491: /* *negextendsfdf2 */ |
| 12500 | case 490: /* *absextendsfdf2 */ |
| 12501 | case 489: /* *negxf2_1 */ |
| 12502 | case 488: /* *absxf2_1 */ |
| 12503 | case 487: /* *negdf2_1 */ |
| 12504 | case 486: /* *absdf2_1 */ |
| 12505 | case 485: /* *negsf2_1 */ |
| 12506 | case 484: /* *abssf2_1 */ |
| 12507 | case 483: /* *absnegtf2_sse */ |
| 12508 | case 482: /* *absnegxf2_i387 */ |
| 12509 | case 481: /* *absnegdf2 */ |
| 12510 | case 480: /* *absnegsf2 */ |
| 12511 | case 465: /* *negti2_doubleword */ |
| 12512 | case 464: /* *negdi2_doubleword */ |
| 12513 | case 422: /* *xordi3_doubleword */ |
| 12514 | case 421: /* *iordi3_doubleword */ |
| 12515 | case 414: /* *andndi3_doubleword */ |
| 12516 | case 397: /* *anddi3_doubleword */ |
| 12517 | case 396: /* *testqi_ext_3 */ |
| 12518 | case 395: /* *testqi_ext_3 */ |
| 12519 | case 394: /* *testqi_ext_3 */ |
| 12520 | case 382: /* *udivmoddi4_pow2 */ |
| 12521 | case 381: /* *udivmodsi4_pow2 */ |
| 12522 | case 380: /* *udivmoddi4 */ |
| 12523 | case 379: /* *udivmodsi4 */ |
| 12524 | case 378: /* *udivmodhi4 */ |
| 12525 | case 377: /* udivmoddi4_1 */ |
| 12526 | case 376: /* udivmodsi4_1 */ |
| 12527 | case 371: /* *divmoddi4 */ |
| 12528 | case 370: /* *divmodsi4 */ |
| 12529 | case 369: /* *divmodhi4 */ |
| 12530 | case 368: /* divmoddi4_1 */ |
| 12531 | case 367: /* divmodsi4_1 */ |
| 12532 | case 270: /* *subti3_doubleword */ |
| 12533 | case 269: /* *subdi3_doubleword */ |
| 12534 | case 268: /* *leadi_general_4 */ |
| 12535 | case 267: /* *leadi_general_4 */ |
| 12536 | case 266: /* *leasi_general_4 */ |
| 12537 | case 265: /* *leasi_general_4 */ |
| 12538 | case 264: /* *leahi_general_4 */ |
| 12539 | case 263: /* *leahi_general_4 */ |
| 12540 | case 262: /* *leaqi_general_4 */ |
| 12541 | case 261: /* *leaqi_general_4 */ |
| 12542 | case 260: /* *leahi_general_3b */ |
| 12543 | case 259: /* *leaqi_general_3b */ |
| 12544 | case 258: /* *leahi_general_3 */ |
| 12545 | case 257: /* *leaqi_general_3 */ |
| 12546 | case 256: /* *leahi_general_2b */ |
| 12547 | case 255: /* *leaqi_general_2b */ |
| 12548 | case 254: /* *leahi_general_2 */ |
| 12549 | case 253: /* *leaqi_general_2 */ |
| 12550 | case 252: /* *leahi_general_1 */ |
| 12551 | case 251: /* *leaqi_general_1 */ |
| 12552 | case 216: /* *addti3_doubleword */ |
| 12553 | case 215: /* *adddi3_doubleword */ |
| 12554 | case 214: /* *leadi */ |
| 12555 | case 213: /* *leasi */ |
| 12556 | case 212: /* *floatunssixf2_i387_with_xmm */ |
| 12557 | case 211: /* *floatunssidf2_i387_with_xmm */ |
| 12558 | case 210: /* *floatunssisf2_i387_with_xmm */ |
| 12559 | case 169: /* *fixuns_truncdf_1 */ |
| 12560 | case 168: /* *fixuns_truncsf_1 */ |
| 12561 | case 146: /* extendsidi2_1 */ |
| 12562 | case 144: /* *zextsi_doubleword */ |
| 12563 | case 143: /* *zexthi_doubleword */ |
| 12564 | case 142: /* *zextqi_doubleword */ |
| 12565 | case 141: /* *zexthi_doubleword_and */ |
| 12566 | case 140: /* *zextqi_doubleword_and */ |
| 12567 | case 71: /* *pushfldi2 */ |
| 12568 | case 70: /* *pushflsi2 */ |
| 12569 | case 65: /* *pushdi2_prologue */ |
| 12570 | case 64: /* *pushsi2_prologue */ |
| 12571 | case 63: /* *pushhi2 */ |
| 12572 | case 62: /* *pushqi2 */ |
| 12573 | case 61: /* *pushsi2_rex64 */ |
| 12574 | case 60: /* *pushhi2_rex64 */ |
| 12575 | case 59: /* *pushqi2_rex64 */ |
| 12576 | case 58: /* *pushsi2 */ |
| 12577 | case 56: /* *pushti2 */ |
| 12578 | case 55: /* *pushdi2 */ |
| 12579 | case 48: /* x86_sahf_1 */ |
| 12580 | return 2; |
| 12581 | |
| 12582 | case 393: /* *testqi_ext_2 */ |
| 12583 | case 392: /* *testqi_ext_1 */ |
| 12584 | case 391: /* *testsi_1 */ |
| 12585 | case 390: /* *testhi_1 */ |
| 12586 | case 389: /* *testqi_1 */ |
| 12587 | case 388: /* *testqi_1_maybe_si */ |
| 12588 | case 387: /* *testdi_1 */ |
| 12589 | case 222: /* *addqi_1_slp */ |
| 12590 | case 16: /* *cmpqi_ext_4 */ |
| 12591 | case 15: /* *cmpqi_ext_3 */ |
| 12592 | case 14: /* *cmpqi_ext_2 */ |
| 12593 | case 13: /* *cmpqi_ext_1 */ |
| 12594 | case 12: /* *cmpdi_minus_1 */ |
| 12595 | case 11: /* *cmpsi_minus_1 */ |
| 12596 | case 10: /* *cmphi_minus_1 */ |
| 12597 | case 9: /* *cmpqi_minus_1 */ |
| 12598 | case 8: /* *cmpdi_1 */ |
| 12599 | case 7: /* *cmpsi_1 */ |
| 12600 | case 6: /* *cmphi_1 */ |
| 12601 | case 5: /* *cmpqi_1 */ |
| 12602 | case 4: /* *cmpdi_ccno_1 */ |
| 12603 | case 3: /* *cmpsi_ccno_1 */ |
| 12604 | case 2: /* *cmphi_ccno_1 */ |
| 12605 | case 1: /* *cmpqi_ccno_1 */ |
| 12606 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) |
| 12607 | { |
| 12608 | return 1; |
| 12609 | } |
| 12610 | else if (cached_memory == MEMORY_LOAD) |
| 12611 | { |
| 12612 | return 4; |
| 12613 | } |
| 12614 | else |
| 12615 | { |
| 12616 | return 0; |
| 12617 | } |
| 12618 | |
| 12619 | case -1: |
| 12620 | if (GET_CODE (PATTERN (insn)) != ASM_INPUT |
| 12621 | && asm_noperands (PATTERN (insn)) < 0) |
| 12622 | fatal_insn_not_found (insn); |
| 12623 | /* FALLTHRU */ |
| 12624 | case 57: /* *pushdi2_rex64 */ |
| 12625 | case 80: /* *movti_internal */ |
| 12626 | case 81: /* *movdi_internal */ |
| 12627 | case 82: /* *movsi_internal */ |
| 12628 | case 83: /* *movhi_internal */ |
| 12629 | case 84: /* *movqi_internal */ |
| 12630 | case 93: /* *swapsi */ |
| 12631 | case 94: /* *swapdi */ |
| 12632 | case 95: /* *swapqi */ |
| 12633 | case 96: /* *swaphi */ |
| 12634 | case 97: /* *movstrictqi_1 */ |
| 12635 | case 98: /* *movstricthi_1 */ |
| 12636 | case 101: /* *extvhi */ |
| 12637 | case 102: /* *extvsi */ |
| 12638 | case 103: /* *extzvhi */ |
| 12639 | case 104: /* *extzvsi */ |
| 12640 | case 105: /* *extzvdi */ |
| 12641 | case 106: /* *extzvqi_mem_rex64 */ |
| 12642 | case 107: /* *extzvqi */ |
| 12643 | case 108: /* insvhi_1 */ |
| 12644 | case 109: /* insvsi_1 */ |
| 12645 | case 110: /* insvdi_1 */ |
| 12646 | case 111: /* *insvqi_1_mem_rex64 */ |
| 12647 | case 112: /* *insvqi_1 */ |
| 12648 | case 113: /* *insvqi_2 */ |
| 12649 | case 114: /* *insvqi_2 */ |
| 12650 | case 115: /* *insvqi_3 */ |
| 12651 | case 116: /* *insvqi_3 */ |
| 12652 | case 122: /* *pushsf_rex64 */ |
| 12653 | case 123: /* *pushsf */ |
| 12654 | case 124: /* *movtf_internal */ |
| 12655 | case 125: /* *movxf_internal */ |
| 12656 | case 126: /* *movdf_internal */ |
| 12657 | case 127: /* *movsf_internal */ |
| 12658 | case 131: /* *zero_extendsidi2 */ |
| 12659 | case 132: /* zero_extendqidi2 */ |
| 12660 | case 133: /* zero_extendhidi2 */ |
| 12661 | case 136: /* *zero_extendqisi2 */ |
| 12662 | case 137: /* *zero_extendhisi2 */ |
| 12663 | case 139: /* *zero_extendqihi2 */ |
| 12664 | case 145: /* *extendsidi2_rex64 */ |
| 12665 | case 147: /* extendqidi2 */ |
| 12666 | case 148: /* extendhidi2 */ |
| 12667 | case 149: /* extendhisi2 */ |
| 12668 | case 150: /* *extendhisi2_zext */ |
| 12669 | case 151: /* extendqisi2 */ |
| 12670 | case 152: /* *extendqisi2_zext */ |
| 12671 | case 153: /* extendqihi2 */ |
| 12672 | case 154: /* *extendsfdf2 */ |
| 12673 | case 155: /* *extendsfxf2_i387 */ |
| 12674 | case 156: /* *extenddfxf2_i387 */ |
| 12675 | case 157: /* *truncdfsf_fast_mixed */ |
| 12676 | case 159: /* *truncdfsf_mixed */ |
| 12677 | case 160: /* *truncdfsf_i387 */ |
| 12678 | case 162: /* *truncxfsf2_mixed */ |
| 12679 | case 163: /* *truncxfdf2_mixed */ |
| 12680 | case 170: /* fix_truncsfsi_sse */ |
| 12681 | case 171: /* fix_truncsfdi_sse */ |
| 12682 | case 172: /* fix_truncdfsi_sse */ |
| 12683 | case 173: /* fix_truncdfdi_sse */ |
| 12684 | case 196: /* floathixf2 */ |
| 12685 | case 197: /* floatsixf2 */ |
| 12686 | case 198: /* floatdixf2 */ |
| 12687 | case 199: /* *floatsisf2_mixed */ |
| 12688 | case 200: /* *floatdisf2_mixed */ |
| 12689 | case 201: /* *floatsidf2_mixed */ |
| 12690 | case 202: /* *floatdidf2_mixed */ |
| 12691 | case 217: /* *addsi_1 */ |
| 12692 | case 218: /* *adddi_1 */ |
| 12693 | case 219: /* addsi_1_zext */ |
| 12694 | case 220: /* *addhi_1 */ |
| 12695 | case 221: /* *addqi_1 */ |
| 12696 | case 223: /* *addqi_2 */ |
| 12697 | case 224: /* *addhi_2 */ |
| 12698 | case 225: /* *addsi_2 */ |
| 12699 | case 226: /* *adddi_2 */ |
| 12700 | case 227: /* *addsi_2_zext */ |
| 12701 | case 228: /* *addqi_3 */ |
| 12702 | case 229: /* *addhi_3 */ |
| 12703 | case 230: /* *addsi_3 */ |
| 12704 | case 231: /* *adddi_3 */ |
| 12705 | case 232: /* *addsi_3_zext */ |
| 12706 | case 233: /* *adddi_4 */ |
| 12707 | case 234: /* *addqi_4 */ |
| 12708 | case 235: /* *addhi_4 */ |
| 12709 | case 236: /* *addsi_4 */ |
| 12710 | case 237: /* *addqi_5 */ |
| 12711 | case 238: /* *addhi_5 */ |
| 12712 | case 239: /* *addsi_5 */ |
| 12713 | case 240: /* *adddi_5 */ |
| 12714 | case 241: /* addqi_ext_1 */ |
| 12715 | case 242: /* *addqi_ext_2 */ |
| 12716 | case 243: /* *addvqi4 */ |
| 12717 | case 244: /* *addvhi4 */ |
| 12718 | case 245: /* *addvsi4 */ |
| 12719 | case 246: /* *addvdi4 */ |
| 12720 | case 247: /* *addvqi4_1 */ |
| 12721 | case 248: /* *addvhi4_1 */ |
| 12722 | case 249: /* *addvsi4_1 */ |
| 12723 | case 250: /* *addvdi4_1 */ |
| 12724 | case 271: /* *subqi_1 */ |
| 12725 | case 272: /* *subhi_1 */ |
| 12726 | case 273: /* *subsi_1 */ |
| 12727 | case 274: /* *subdi_1 */ |
| 12728 | case 275: /* *subsi_1_zext */ |
| 12729 | case 277: /* *subqi_2 */ |
| 12730 | case 278: /* *subhi_2 */ |
| 12731 | case 279: /* *subsi_2 */ |
| 12732 | case 280: /* *subdi_2 */ |
| 12733 | case 281: /* *subsi_2_zext */ |
| 12734 | case 282: /* *subvqi4 */ |
| 12735 | case 283: /* *subvhi4 */ |
| 12736 | case 284: /* *subvsi4 */ |
| 12737 | case 285: /* *subvdi4 */ |
| 12738 | case 286: /* *subvqi4_1 */ |
| 12739 | case 287: /* *subvhi4_1 */ |
| 12740 | case 288: /* *subvsi4_1 */ |
| 12741 | case 289: /* *subvdi4_1 */ |
| 12742 | case 290: /* *subqi_3 */ |
| 12743 | case 291: /* *subhi_3 */ |
| 12744 | case 292: /* *subsi_3 */ |
| 12745 | case 293: /* *subdi_3 */ |
| 12746 | case 294: /* *subsi_3_zext */ |
| 12747 | case 295: /* addqi3_carry */ |
| 12748 | case 296: /* addhi3_carry */ |
| 12749 | case 297: /* addsi3_carry */ |
| 12750 | case 298: /* adddi3_carry */ |
| 12751 | case 299: /* *addqi3_carry_0 */ |
| 12752 | case 300: /* *addhi3_carry_0 */ |
| 12753 | case 301: /* *addsi3_carry_0 */ |
| 12754 | case 302: /* *adddi3_carry_0 */ |
| 12755 | case 303: /* *addsi3_carry_zext */ |
| 12756 | case 304: /* *addsi3_carry_zext_0 */ |
| 12757 | case 305: /* addcarrysi */ |
| 12758 | case 306: /* addcarrydi */ |
| 12759 | case 307: /* subqi3_carry */ |
| 12760 | case 308: /* subhi3_carry */ |
| 12761 | case 309: /* subsi3_carry */ |
| 12762 | case 310: /* subdi3_carry */ |
| 12763 | case 311: /* *subqi3_carry_0 */ |
| 12764 | case 312: /* *subhi3_carry_0 */ |
| 12765 | case 313: /* *subsi3_carry_0 */ |
| 12766 | case 314: /* *subdi3_carry_0 */ |
| 12767 | case 315: /* *subsi3_carry_zext */ |
| 12768 | case 316: /* *subsi3_carry_zext_0 */ |
| 12769 | case 317: /* subborrowsi */ |
| 12770 | case 318: /* subborrowdi */ |
| 12771 | case 319: /* *addqi3_cconly_overflow_1 */ |
| 12772 | case 320: /* *addhi3_cconly_overflow_1 */ |
| 12773 | case 321: /* *addsi3_cconly_overflow_1 */ |
| 12774 | case 322: /* *adddi3_cconly_overflow_1 */ |
| 12775 | case 323: /* *addqi3_cc_overflow_1 */ |
| 12776 | case 324: /* *addhi3_cc_overflow_1 */ |
| 12777 | case 325: /* *addsi3_cc_overflow_1 */ |
| 12778 | case 326: /* *adddi3_cc_overflow_1 */ |
| 12779 | case 327: /* *addsi3_zext_cc_overflow_1 */ |
| 12780 | case 328: /* *addqi3_cconly_overflow_2 */ |
| 12781 | case 329: /* *addhi3_cconly_overflow_2 */ |
| 12782 | case 330: /* *addsi3_cconly_overflow_2 */ |
| 12783 | case 331: /* *adddi3_cconly_overflow_2 */ |
| 12784 | case 332: /* *addqi3_cc_overflow_2 */ |
| 12785 | case 333: /* *addhi3_cc_overflow_2 */ |
| 12786 | case 334: /* *addsi3_cc_overflow_2 */ |
| 12787 | case 335: /* *adddi3_cc_overflow_2 */ |
| 12788 | case 336: /* *addsi3_zext_cc_overflow_2 */ |
| 12789 | case 337: /* *mulhi3_1 */ |
| 12790 | case 338: /* *mulsi3_1 */ |
| 12791 | case 339: /* *muldi3_1 */ |
| 12792 | case 340: /* *mulsi3_1_zext */ |
| 12793 | case 341: /* *mulqi3_1 */ |
| 12794 | case 342: /* *mulvsi4 */ |
| 12795 | case 343: /* *mulvdi4 */ |
| 12796 | case 344: /* *mulvhi4 */ |
| 12797 | case 345: /* *mulvhi4_1 */ |
| 12798 | case 346: /* *mulvsi4_1 */ |
| 12799 | case 347: /* *mulvdi4_1 */ |
| 12800 | case 348: /* *umulvhi4 */ |
| 12801 | case 349: /* *umulvsi4 */ |
| 12802 | case 350: /* *umulvdi4 */ |
| 12803 | case 351: /* *mulvqi4 */ |
| 12804 | case 352: /* *umulvqi4 */ |
| 12805 | case 353: /* *bmi2_umulsidi3_1 */ |
| 12806 | case 354: /* *bmi2_umulditi3_1 */ |
| 12807 | case 355: /* *umulsidi3_1 */ |
| 12808 | case 356: /* *umulditi3_1 */ |
| 12809 | case 357: /* *mulsidi3_1 */ |
| 12810 | case 358: /* *mulditi3_1 */ |
| 12811 | case 359: /* *mulqihi3_1 */ |
| 12812 | case 360: /* *umulqihi3_1 */ |
| 12813 | case 361: /* *smuldi3_highpart_1 */ |
| 12814 | case 362: /* *umuldi3_highpart_1 */ |
| 12815 | case 363: /* *smulsi3_highpart_zext */ |
| 12816 | case 364: /* *umulsi3_highpart_zext */ |
| 12817 | case 365: /* *smulsi3_highpart_1 */ |
| 12818 | case 366: /* *umulsi3_highpart_1 */ |
| 12819 | case 372: /* *divmodhi4_noext */ |
| 12820 | case 373: /* *divmodsi4_noext */ |
| 12821 | case 374: /* *divmoddi4_noext */ |
| 12822 | case 375: /* divmodhiqi3 */ |
| 12823 | case 383: /* *udivmodhi4_noext */ |
| 12824 | case 384: /* *udivmodsi4_noext */ |
| 12825 | case 385: /* *udivmoddi4_noext */ |
| 12826 | case 386: /* udivmodhiqi3 */ |
| 12827 | case 398: /* *anddi_1 */ |
| 12828 | case 399: /* *andsi_1_zext */ |
| 12829 | case 400: /* *andhi_1 */ |
| 12830 | case 401: /* *andsi_1 */ |
| 12831 | case 402: /* *andqi_1 */ |
| 12832 | case 404: /* *anddi_2 */ |
| 12833 | case 405: /* *andsi_2_zext */ |
| 12834 | case 406: /* *andqi_2_maybe_si */ |
| 12835 | case 407: /* *andqi_2 */ |
| 12836 | case 408: /* *andhi_2 */ |
| 12837 | case 409: /* *andsi_2 */ |
| 12838 | case 411: /* andqi_ext_1 */ |
| 12839 | case 412: /* *andqi_ext_1_cc */ |
| 12840 | case 413: /* *andqi_ext_2 */ |
| 12841 | case 415: /* *andnsi_1 */ |
| 12842 | case 416: /* *andndi_1 */ |
| 12843 | case 417: /* *andnqi_1 */ |
| 12844 | case 418: /* *andnhi_1 */ |
| 12845 | case 419: /* *andn_si_ccno */ |
| 12846 | case 420: /* *andn_di_ccno */ |
| 12847 | case 423: /* *iorhi_1 */ |
| 12848 | case 424: /* *xorhi_1 */ |
| 12849 | case 425: /* *iorsi_1 */ |
| 12850 | case 426: /* *xorsi_1 */ |
| 12851 | case 427: /* *iordi_1 */ |
| 12852 | case 428: /* *xordi_1 */ |
| 12853 | case 429: /* *iorsi_1_zext */ |
| 12854 | case 430: /* *xorsi_1_zext */ |
| 12855 | case 431: /* *iorsi_1_zext_imm */ |
| 12856 | case 432: /* *xorsi_1_zext_imm */ |
| 12857 | case 433: /* *iorqi_1 */ |
| 12858 | case 434: /* *xorqi_1 */ |
| 12859 | case 437: /* *iorqi_2 */ |
| 12860 | case 438: /* *xorqi_2 */ |
| 12861 | case 439: /* *iorhi_2 */ |
| 12862 | case 440: /* *xorhi_2 */ |
| 12863 | case 441: /* *iorsi_2 */ |
| 12864 | case 442: /* *xorsi_2 */ |
| 12865 | case 443: /* *iordi_2 */ |
| 12866 | case 444: /* *xordi_2 */ |
| 12867 | case 445: /* *iorsi_2_zext */ |
| 12868 | case 446: /* *xorsi_2_zext */ |
| 12869 | case 447: /* *iorsi_2_zext_imm */ |
| 12870 | case 448: /* *xorsi_2_zext_imm */ |
| 12871 | case 451: /* *iorqi_3 */ |
| 12872 | case 452: /* *xorqi_3 */ |
| 12873 | case 453: /* *iorhi_3 */ |
| 12874 | case 454: /* *xorhi_3 */ |
| 12875 | case 455: /* *iorsi_3 */ |
| 12876 | case 456: /* *xorsi_3 */ |
| 12877 | case 457: /* *iordi_3 */ |
| 12878 | case 458: /* *xordi_3 */ |
| 12879 | case 459: /* *iorqi_ext_1 */ |
| 12880 | case 460: /* *xorqi_ext_1 */ |
| 12881 | case 461: /* *iorqi_ext_2 */ |
| 12882 | case 462: /* *xorqi_ext_2 */ |
| 12883 | case 463: /* *xorqi_ext_1_cc */ |
| 12884 | case 515: /* x86_64_shld */ |
| 12885 | case 516: /* x86_shld */ |
| 12886 | case 519: /* *bmi2_ashlsi3_1 */ |
| 12887 | case 520: /* *bmi2_ashldi3_1 */ |
| 12888 | case 521: /* *ashlsi3_1 */ |
| 12889 | case 522: /* *ashldi3_1 */ |
| 12890 | case 523: /* *bmi2_ashlsi3_1_zext */ |
| 12891 | case 524: /* *ashlsi3_1_zext */ |
| 12892 | case 525: /* *ashlhi3_1 */ |
| 12893 | case 526: /* *ashlqi3_1 */ |
| 12894 | case 527: /* *ashlqi3_1_slp */ |
| 12895 | case 528: /* *ashlqi3_cmp */ |
| 12896 | case 529: /* *ashlhi3_cmp */ |
| 12897 | case 530: /* *ashlsi3_cmp */ |
| 12898 | case 531: /* *ashldi3_cmp */ |
| 12899 | case 532: /* *ashlsi3_cmp_zext */ |
| 12900 | case 533: /* *ashlqi3_cconly */ |
| 12901 | case 534: /* *ashlhi3_cconly */ |
| 12902 | case 535: /* *ashlsi3_cconly */ |
| 12903 | case 536: /* *ashldi3_cconly */ |
| 12904 | case 545: /* x86_64_shrd */ |
| 12905 | case 546: /* x86_shrd */ |
| 12906 | case 547: /* ashrdi3_cvt */ |
| 12907 | case 548: /* *ashrsi3_cvt_zext */ |
| 12908 | case 549: /* ashrsi3_cvt */ |
| 12909 | case 550: /* *bmi2_lshrsi3_1 */ |
| 12910 | case 551: /* *bmi2_ashrsi3_1 */ |
| 12911 | case 552: /* *bmi2_lshrdi3_1 */ |
| 12912 | case 553: /* *bmi2_ashrdi3_1 */ |
| 12913 | case 554: /* *lshrsi3_1 */ |
| 12914 | case 555: /* *ashrsi3_1 */ |
| 12915 | case 556: /* *lshrdi3_1 */ |
| 12916 | case 557: /* *ashrdi3_1 */ |
| 12917 | case 558: /* *bmi2_lshrsi3_1_zext */ |
| 12918 | case 559: /* *bmi2_ashrsi3_1_zext */ |
| 12919 | case 560: /* *lshrsi3_1_zext */ |
| 12920 | case 561: /* *ashrsi3_1_zext */ |
| 12921 | case 562: /* *lshrqi3_1 */ |
| 12922 | case 563: /* *ashrqi3_1 */ |
| 12923 | case 564: /* *lshrhi3_1 */ |
| 12924 | case 565: /* *ashrhi3_1 */ |
| 12925 | case 568: /* *lshrqi3_cmp */ |
| 12926 | case 569: /* *ashrqi3_cmp */ |
| 12927 | case 570: /* *lshrhi3_cmp */ |
| 12928 | case 571: /* *ashrhi3_cmp */ |
| 12929 | case 572: /* *lshrsi3_cmp */ |
| 12930 | case 573: /* *ashrsi3_cmp */ |
| 12931 | case 574: /* *lshrdi3_cmp */ |
| 12932 | case 575: /* *ashrdi3_cmp */ |
| 12933 | case 576: /* *lshrsi3_cmp_zext */ |
| 12934 | case 577: /* *ashrsi3_cmp_zext */ |
| 12935 | case 578: /* *lshrqi3_cconly */ |
| 12936 | case 579: /* *ashrqi3_cconly */ |
| 12937 | case 580: /* *lshrhi3_cconly */ |
| 12938 | case 581: /* *ashrhi3_cconly */ |
| 12939 | case 582: /* *lshrsi3_cconly */ |
| 12940 | case 583: /* *ashrsi3_cconly */ |
| 12941 | case 584: /* *lshrdi3_cconly */ |
| 12942 | case 585: /* *ashrdi3_cconly */ |
| 12943 | case 594: /* *bmi2_rorxsi3_1 */ |
| 12944 | case 595: /* *bmi2_rorxdi3_1 */ |
| 12945 | case 596: /* *rotlsi3_1 */ |
| 12946 | case 597: /* *rotrsi3_1 */ |
| 12947 | case 598: /* *rotldi3_1 */ |
| 12948 | case 599: /* *rotrdi3_1 */ |
| 12949 | case 600: /* *bmi2_rorxsi3_1_zext */ |
| 12950 | case 601: /* *rotlsi3_1_zext */ |
| 12951 | case 602: /* *rotrsi3_1_zext */ |
| 12952 | case 603: /* *rotlqi3_1 */ |
| 12953 | case 604: /* *rotrqi3_1 */ |
| 12954 | case 605: /* *rotlhi3_1 */ |
| 12955 | case 606: /* *rotrhi3_1 */ |
| 12956 | case 660: /* *indirect_jump */ |
| 12957 | case 661: /* *indirect_jump */ |
| 12958 | case 662: /* *tablejump_1 */ |
| 12959 | case 663: /* *tablejump_1 */ |
| 12960 | case 693: /* simple_return_indirect_internal */ |
| 12961 | case 701: /* set_got_offset_rex64 */ |
| 12962 | case 720: /* clzsi2_lzcnt */ |
| 12963 | case 721: /* clzdi2_lzcnt */ |
| 12964 | case 722: /* *clzsi2_lzcnt_falsedep */ |
| 12965 | case 723: /* *clzdi2_lzcnt_falsedep */ |
| 12966 | case 725: /* lzcnt_si */ |
| 12967 | case 727: /* lzcnt_di */ |
| 12968 | case 729: /* *lzcnt_si_falsedep */ |
| 12969 | case 731: /* *lzcnt_di_falsedep */ |
| 12970 | case 733: /* lzcnt_hi */ |
| 12971 | case 734: /* bmi_bextr_si */ |
| 12972 | case 735: /* bmi_bextr_di */ |
| 12973 | case 736: /* *bmi_bextr_si_ccz */ |
| 12974 | case 737: /* *bmi_bextr_di_ccz */ |
| 12975 | case 738: /* *bmi_blsi_si */ |
| 12976 | case 739: /* *bmi_blsi_di */ |
| 12977 | case 740: /* *bmi_blsmsk_si */ |
| 12978 | case 741: /* *bmi_blsmsk_di */ |
| 12979 | case 742: /* *bmi_blsr_si */ |
| 12980 | case 743: /* *bmi_blsr_di */ |
| 12981 | case 744: /* *bmi2_bzhi_si3 */ |
| 12982 | case 745: /* *bmi2_bzhi_di3 */ |
| 12983 | case 746: /* *bmi2_bzhi_si3_1 */ |
| 12984 | case 747: /* *bmi2_bzhi_di3_1 */ |
| 12985 | case 748: /* *bmi2_bzhi_si3_1_ccz */ |
| 12986 | case 749: /* *bmi2_bzhi_di3_1_ccz */ |
| 12987 | case 750: /* bmi2_pdep_si3 */ |
| 12988 | case 751: /* bmi2_pdep_di3 */ |
| 12989 | case 752: /* bmi2_pext_si3 */ |
| 12990 | case 753: /* bmi2_pext_di3 */ |
| 12991 | case 754: /* tbm_bextri_si */ |
| 12992 | case 755: /* tbm_bextri_di */ |
| 12993 | case 756: /* *tbm_blcfill_si */ |
| 12994 | case 757: /* *tbm_blcfill_di */ |
| 12995 | case 758: /* *tbm_blci_si */ |
| 12996 | case 759: /* *tbm_blci_di */ |
| 12997 | case 760: /* *tbm_blcic_si */ |
| 12998 | case 761: /* *tbm_blcic_di */ |
| 12999 | case 762: /* *tbm_blcmsk_si */ |
| 13000 | case 763: /* *tbm_blcmsk_di */ |
| 13001 | case 764: /* *tbm_blcs_si */ |
| 13002 | case 765: /* *tbm_blcs_di */ |
| 13003 | case 766: /* *tbm_blsfill_si */ |
| 13004 | case 767: /* *tbm_blsfill_di */ |
| 13005 | case 768: /* *tbm_blsic_si */ |
| 13006 | case 769: /* *tbm_blsic_di */ |
| 13007 | case 770: /* *tbm_t1mskc_si */ |
| 13008 | case 771: /* *tbm_t1mskc_di */ |
| 13009 | case 772: /* *tbm_tzmsk_si */ |
| 13010 | case 773: /* *tbm_tzmsk_di */ |
| 13011 | case 774: /* popcountsi2 */ |
| 13012 | case 775: /* popcountdi2 */ |
| 13013 | case 776: /* *popcountsi2_falsedep */ |
| 13014 | case 777: /* *popcountdi2_falsedep */ |
| 13015 | case 779: /* popcounthi2 */ |
| 13016 | case 780: /* *bswapsi2_movbe */ |
| 13017 | case 781: /* *bswapdi2_movbe */ |
| 13018 | case 782: /* *bswapsi2 */ |
| 13019 | case 783: /* *bswapdi2 */ |
| 13020 | case 812: /* *fop_sf_comm */ |
| 13021 | case 813: /* *fop_df_comm */ |
| 13022 | case 815: /* *fop_sf_1 */ |
| 13023 | case 816: /* *fop_df_1 */ |
| 13024 | case 817: /* *fop_sf_2_i387 */ |
| 13025 | case 818: /* *fop_df_2_i387 */ |
| 13026 | case 819: /* *fop_sf_2_i387 */ |
| 13027 | case 820: /* *fop_df_2_i387 */ |
| 13028 | case 821: /* *fop_sf_3_i387 */ |
| 13029 | case 822: /* *fop_df_3_i387 */ |
| 13030 | case 823: /* *fop_sf_3_i387 */ |
| 13031 | case 824: /* *fop_df_3_i387 */ |
| 13032 | case 825: /* *fop_df_4_i387 */ |
| 13033 | case 826: /* *fop_df_5_i387 */ |
| 13034 | case 827: /* *fop_df_6_i387 */ |
| 13035 | case 828: /* *fop_xf_comm_i387 */ |
| 13036 | case 829: /* *fop_xf_1_i387 */ |
| 13037 | case 830: /* *fop_xf_2_i387 */ |
| 13038 | case 831: /* *fop_xf_2_i387 */ |
| 13039 | case 832: /* *fop_xf_3_i387 */ |
| 13040 | case 833: /* *fop_xf_3_i387 */ |
| 13041 | case 834: /* *fop_xf_4_i387 */ |
| 13042 | case 835: /* *fop_xf_4_i387 */ |
| 13043 | case 836: /* *fop_xf_5_i387 */ |
| 13044 | case 837: /* *fop_xf_5_i387 */ |
| 13045 | case 838: /* *fop_xf_6_i387 */ |
| 13046 | case 839: /* *fop_xf_6_i387 */ |
| 13047 | case 975: /* *movhicc_noc */ |
| 13048 | case 976: /* *movsicc_noc */ |
| 13049 | case 977: /* *movdicc_noc */ |
| 13050 | case 978: /* *movsicc_noc_zext */ |
| 13051 | case 979: /* *movqicc_noc */ |
| 13052 | case 981: /* *movdfcc_1 */ |
| 13053 | case 982: /* *movsfcc_1_387 */ |
| 13054 | case 993: /* pro_epilogue_adjust_stack_si_add */ |
| 13055 | case 994: /* pro_epilogue_adjust_stack_di_add */ |
| 13056 | case 995: /* pro_epilogue_adjust_stack_si_sub */ |
| 13057 | case 996: /* pro_epilogue_adjust_stack_di_sub */ |
| 13058 | case 1089: /* *movbnd32_internal_mpx */ |
| 13059 | case 1090: /* *movbnd64_internal_mpx */ |
| 13060 | case 1101: /* move_size_reloc_si */ |
| 13061 | case 1102: /* move_size_reloc_di */ |
| 13062 | case 1106: /* *movv8qi_internal */ |
| 13063 | case 1107: /* *movv4hi_internal */ |
| 13064 | case 1108: /* *movv2si_internal */ |
| 13065 | case 1109: /* *movv1di_internal */ |
| 13066 | case 1110: /* *movv2sf_internal */ |
| 13067 | case 1136: /* *mmx_concatv2sf */ |
| 13068 | case 1138: /* *vec_extractv2sf_1 */ |
| 13069 | case 1206: /* *mmx_concatv2si */ |
| 13070 | case 1208: /* *vec_extractv2si_1 */ |
| 13071 | case 1308: /* kandqi */ |
| 13072 | case 1309: /* kiorqi */ |
| 13073 | case 1310: /* kxorqi */ |
| 13074 | case 1311: /* kandhi */ |
| 13075 | case 1312: /* kiorhi */ |
| 13076 | case 1313: /* kxorhi */ |
| 13077 | case 1314: /* kandsi */ |
| 13078 | case 1315: /* kiorsi */ |
| 13079 | case 1316: /* kxorsi */ |
| 13080 | case 1317: /* kanddi */ |
| 13081 | case 1318: /* kiordi */ |
| 13082 | case 1319: /* kxordi */ |
| 13083 | case 1320: /* kandnqi */ |
| 13084 | case 1321: /* kandnhi */ |
| 13085 | case 1322: /* kandnsi */ |
| 13086 | case 1323: /* kandndi */ |
| 13087 | case 1324: /* kxnorqi */ |
| 13088 | case 1325: /* kxnorhi */ |
| 13089 | case 1326: /* kxnorsi */ |
| 13090 | case 1327: /* kxnordi */ |
| 13091 | case 1328: /* knotqi */ |
| 13092 | case 1329: /* knothi */ |
| 13093 | case 1330: /* knotsi */ |
| 13094 | case 1331: /* knotdi */ |
| 13095 | case 1332: /* kaddqi */ |
| 13096 | case 1333: /* kaddhi */ |
| 13097 | case 1334: /* kaddsi */ |
| 13098 | case 1335: /* kadddi */ |
| 13099 | case 1336: /* kashiftqi */ |
| 13100 | case 1337: /* klshiftrtqi */ |
| 13101 | case 1338: /* kashifthi */ |
| 13102 | case 1339: /* klshiftrthi */ |
| 13103 | case 1340: /* kashiftsi */ |
| 13104 | case 1341: /* klshiftrtsi */ |
| 13105 | case 1342: /* kashiftdi */ |
| 13106 | case 1343: /* klshiftrtdi */ |
| 13107 | case 1344: /* ktestqi */ |
| 13108 | case 1345: /* ktesthi */ |
| 13109 | case 1346: /* ktestsi */ |
| 13110 | case 1347: /* ktestdi */ |
| 13111 | case 1348: /* kortestqi */ |
| 13112 | case 1349: /* kortesthi */ |
| 13113 | case 1350: /* kortestsi */ |
| 13114 | case 1351: /* kortestdi */ |
| 13115 | case 1352: /* kunpckhi */ |
| 13116 | case 2106: /* sse_cvtsi2ss */ |
| 13117 | case 2107: /* sse_cvtsi2ss_round */ |
| 13118 | case 2108: /* sse_cvtsi2ssq */ |
| 13119 | case 2109: /* sse_cvtsi2ssq_round */ |
| 13120 | case 2198: /* sse2_cvtsi2sd */ |
| 13121 | case 2199: /* sse2_cvtsi2sdq */ |
| 13122 | case 2200: /* sse2_cvtsi2sdq_round */ |
| 13123 | case 2459: /* *vec_concatv2sf_sse4_1 */ |
| 13124 | case 2460: /* *vec_concatv2sf_sse */ |
| 13125 | case 2462: /* vec_setv4si_0 */ |
| 13126 | case 2463: /* vec_setv4sf_0 */ |
| 13127 | case 2467: /* *sse4_1_extractps */ |
| 13128 | case 2726: /* sse2_storehpd */ |
| 13129 | case 2728: /* sse2_storelpd */ |
| 13130 | case 2730: /* sse2_loadhpd */ |
| 13131 | case 2731: /* sse2_loadlpd */ |
| 13132 | case 3620: /* sse2_loadld */ |
| 13133 | case 3638: /* *vec_extractv2di_1 */ |
| 13134 | case 3639: /* *vec_concatv2si_sse4_1 */ |
| 13135 | case 3640: /* *vec_concatv2si */ |
| 13136 | case 4197: /* *vec_dupv2di */ |
| 13137 | case 4250: /* *avx_vperm_broadcast_v4sf */ |
| 13138 | extract_insn_cached (insn); |
| 13139 | if ((cached_type = get_attr_type (insn)) == TYPE_IBR) |
| 13140 | { |
| 13141 | return 0; |
| 13142 | } |
| 13143 | else if ((cached_type == TYPE_CALL) || (cached_type == TYPE_CALLV)) |
| 13144 | { |
| 13145 | return 0; |
| 13146 | } |
| 13147 | else if (cached_type == TYPE_PUSH) |
| 13148 | { |
| 13149 | return 2; |
| 13150 | } |
| 13151 | else if (cached_type == TYPE_POP) |
| 13152 | { |
| 13153 | return 4; |
| 13154 | } |
| 13155 | else if (cached_type == TYPE_LEAVE) |
| 13156 | { |
| 13157 | return 3; |
| 13158 | } |
| 13159 | else if (cached_type == TYPE_LEA) |
| 13160 | { |
| 13161 | return 2; |
| 13162 | } |
| 13163 | else if ((cached_type == TYPE_IMUL) && (((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) || (cached_memory == MEMORY_UNKNOWN))) |
| 13164 | { |
| 13165 | return 5; |
| 13166 | } |
| 13167 | else if ((cached_type == TYPE_IMUL) && (((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) || (cached_memory == MEMORY_BOTH))) |
| 13168 | { |
| 13169 | return 8; |
| 13170 | } |
| 13171 | else if ((cached_type == TYPE_IDIV) && (((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) || (cached_memory == MEMORY_UNKNOWN))) |
| 13172 | { |
| 13173 | return 6; |
| 13174 | } |
| 13175 | else if ((cached_type == TYPE_IDIV) && (((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) || (cached_memory == MEMORY_BOTH))) |
| 13176 | { |
| 13177 | return 9; |
| 13178 | } |
| 13179 | else if ((cached_type == TYPE_STR) && (((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) || (cached_memory == MEMORY_BOTH) || (cached_memory == MEMORY_STORE))) |
| 13180 | { |
| 13181 | return 6; |
| 13182 | } |
| 13183 | else if (((cached_athlon_decode = get_attr_athlon_decode (insn)) == ATHLON_DECODE_DIRECT) && (((cached_unit = get_attr_unit (insn)) == UNIT_INTEGER) || (cached_unit == UNIT_UNKNOWN)) && (((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) || (cached_memory == MEMORY_UNKNOWN))) |
| 13184 | { |
| 13185 | return 1; |
| 13186 | } |
| 13187 | else if ((cached_athlon_decode == ATHLON_DECODE_VECTOR) && (((cached_unit = get_attr_unit (insn)) == UNIT_INTEGER) || (cached_unit == UNIT_UNKNOWN)) && (((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) || (cached_memory == MEMORY_UNKNOWN))) |
| 13188 | { |
| 13189 | return 2; |
| 13190 | } |
| 13191 | else if ((cached_type == TYPE_IMOV) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 13192 | { |
| 13193 | return 3; |
| 13194 | } |
| 13195 | else if ((cached_athlon_decode == ATHLON_DECODE_DIRECT) && (((cached_unit = get_attr_unit (insn)) == UNIT_INTEGER) || (cached_unit == UNIT_UNKNOWN)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 13196 | { |
| 13197 | return 4; |
| 13198 | } |
| 13199 | else if ((cached_athlon_decode == ATHLON_DECODE_VECTOR) && (((cached_unit = get_attr_unit (insn)) == UNIT_INTEGER) || (cached_unit == UNIT_UNKNOWN)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 13200 | { |
| 13201 | return 6; |
| 13202 | } |
| 13203 | else if ((cached_type == TYPE_IMOV) && ((cached_memory = get_attr_memory (insn)) == MEMORY_STORE)) |
| 13204 | { |
| 13205 | return 1; |
| 13206 | } |
| 13207 | else if ((cached_athlon_decode == ATHLON_DECODE_DIRECT) && (((cached_unit = get_attr_unit (insn)) == UNIT_INTEGER) || (cached_unit == UNIT_UNKNOWN)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_BOTH)) |
| 13208 | { |
| 13209 | return 4; |
| 13210 | } |
| 13211 | else if ((cached_athlon_decode == ATHLON_DECODE_VECTOR) && (((cached_unit = get_attr_unit (insn)) == UNIT_INTEGER) || (cached_unit == UNIT_UNKNOWN)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_BOTH)) |
| 13212 | { |
| 13213 | return 6; |
| 13214 | } |
| 13215 | else if ((cached_athlon_decode == ATHLON_DECODE_DIRECT) && (((cached_unit = get_attr_unit (insn)) == UNIT_INTEGER) || (cached_unit == UNIT_UNKNOWN)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_STORE)) |
| 13216 | { |
| 13217 | return 1; |
| 13218 | } |
| 13219 | else if ((cached_athlon_decode == ATHLON_DECODE_VECTOR) && (((cached_unit = get_attr_unit (insn)) == UNIT_INTEGER) || (cached_unit == UNIT_UNKNOWN)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_STORE)) |
| 13220 | { |
| 13221 | return 2; |
| 13222 | } |
| 13223 | else if ((cached_type == TYPE_FMOV) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) && ((cached_mode = get_attr_mode (insn)) == MODE_XF)) |
| 13224 | { |
| 13225 | return 12 /* 0xc */; |
| 13226 | } |
| 13227 | else if ((cached_type == TYPE_FMOV) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 13228 | { |
| 13229 | return 0; |
| 13230 | } |
| 13231 | else if ((cached_type == TYPE_FMOV) && (((cached_memory = get_attr_memory (insn)) == MEMORY_STORE) || (cached_memory == MEMORY_BOTH)) && ((cached_mode = get_attr_mode (insn)) == MODE_XF)) |
| 13232 | { |
| 13233 | return 10 /* 0xa */; |
| 13234 | } |
| 13235 | else if ((cached_type == TYPE_FMOV) && (((cached_memory = get_attr_memory (insn)) == MEMORY_STORE) || (cached_memory == MEMORY_BOTH))) |
| 13236 | { |
| 13237 | return 4; |
| 13238 | } |
| 13239 | else if ((cached_type == TYPE_FISTP) || (cached_type == TYPE_FISTTP)) |
| 13240 | { |
| 13241 | return 4; |
| 13242 | } |
| 13243 | else if (cached_type == TYPE_FMOV) |
| 13244 | { |
| 13245 | return 2; |
| 13246 | } |
| 13247 | else if ((cached_type == TYPE_FOP) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 13248 | { |
| 13249 | return 4; |
| 13250 | } |
| 13251 | else if (cached_type == TYPE_FOP) |
| 13252 | { |
| 13253 | return 4; |
| 13254 | } |
| 13255 | else if ((cached_type == TYPE_FMUL) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 13256 | { |
| 13257 | return 4; |
| 13258 | } |
| 13259 | else if (cached_type == TYPE_FMUL) |
| 13260 | { |
| 13261 | return 4; |
| 13262 | } |
| 13263 | else if (cached_type == TYPE_FSGN) |
| 13264 | { |
| 13265 | return 2; |
| 13266 | } |
| 13267 | else if ((cached_type == TYPE_FDIV) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 13268 | { |
| 13269 | return 24 /* 0x18 */; |
| 13270 | } |
| 13271 | else if (cached_type == TYPE_FDIV) |
| 13272 | { |
| 13273 | return 24 /* 0x18 */; |
| 13274 | } |
| 13275 | else if ((cached_type == TYPE_FPSPC) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 13276 | { |
| 13277 | return 103 /* 0x67 */; |
| 13278 | } |
| 13279 | else if (cached_type == TYPE_FPSPC) |
| 13280 | { |
| 13281 | return 100 /* 0x64 */; |
| 13282 | } |
| 13283 | else if ((cached_type == TYPE_FCMOV) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 13284 | { |
| 13285 | return 7; |
| 13286 | } |
| 13287 | else if (cached_type == TYPE_FCMOV) |
| 13288 | { |
| 13289 | return 7; |
| 13290 | } |
| 13291 | else if ((cached_type == TYPE_FCMP) && (cached_athlon_decode == ATHLON_DECODE_VECTOR) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 13292 | { |
| 13293 | return 3; |
| 13294 | } |
| 13295 | else if ((cached_athlon_decode == ATHLON_DECODE_VECTOR) && (cached_type == TYPE_FCMP)) |
| 13296 | { |
| 13297 | return 3; |
| 13298 | } |
| 13299 | else if ((cached_type == TYPE_FCMP) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 13300 | { |
| 13301 | return 2; |
| 13302 | } |
| 13303 | else if (cached_type == TYPE_FCMP) |
| 13304 | { |
| 13305 | return 2; |
| 13306 | } |
| 13307 | else if ((cached_type == TYPE_SSEMOV) && (memory_operand (operands[1], DFmode))) |
| 13308 | { |
| 13309 | return 0; |
| 13310 | } |
| 13311 | else if ((cached_type == TYPE_SSEMOV) && (((cached_mode = get_attr_mode (insn)) == MODE_V4SF) || (cached_mode == MODE_V2DF) || (cached_mode == MODE_TI)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 13312 | { |
| 13313 | return 0; |
| 13314 | } |
| 13315 | else if ((cached_type == TYPE_SSEMOV) && (((cached_mode = get_attr_mode (insn)) == MODE_SF) || (cached_mode == MODE_DI)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 13316 | { |
| 13317 | return 1; |
| 13318 | } |
| 13319 | else if (((cached_type == TYPE_MMXMOV) || (cached_type == TYPE_SSEMOV)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 13320 | { |
| 13321 | return 0; |
| 13322 | } |
| 13323 | else if (((cached_type == TYPE_MMXMOV) || (cached_type == TYPE_SSEMOV)) && (((cached_memory = get_attr_memory (insn)) == MEMORY_STORE) || (cached_memory == MEMORY_BOTH))) |
| 13324 | { |
| 13325 | return 2; |
| 13326 | } |
| 13327 | else if ((cached_type == TYPE_SSEMOV) && (((cached_mode = get_attr_mode (insn)) == MODE_V4SF) || (cached_mode == MODE_V2DF) || (cached_mode == MODE_TI))) |
| 13328 | { |
| 13329 | return 2; |
| 13330 | } |
| 13331 | else if ((cached_type == TYPE_MMXMOV) || (cached_type == TYPE_SSEMOV)) |
| 13332 | { |
| 13333 | return 2; |
| 13334 | } |
| 13335 | else if ((cached_type == TYPE_MMXMUL) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 13336 | { |
| 13337 | return 4; |
| 13338 | } |
| 13339 | else if (cached_type == TYPE_MMXMUL) |
| 13340 | { |
| 13341 | return 3; |
| 13342 | } |
| 13343 | else if (((cached_unit = get_attr_unit (insn)) == UNIT_MMX) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 13344 | { |
| 13345 | return 3; |
| 13346 | } |
| 13347 | else if (cached_unit == UNIT_MMX) |
| 13348 | { |
| 13349 | return 2; |
| 13350 | } |
| 13351 | else if (((cached_type == TYPE_SSELOG) || (cached_type == TYPE_SSELOG1) || (cached_type == TYPE_SSESHUF) || (cached_type == TYPE_SSESHUF1)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 13352 | { |
| 13353 | return 3; |
| 13354 | } |
| 13355 | else if ((cached_type == TYPE_SSELOG) || (cached_type == TYPE_SSELOG1) || (cached_type == TYPE_SSESHUF) || (cached_type == TYPE_SSESHUF1)) |
| 13356 | { |
| 13357 | return 3; |
| 13358 | } |
| 13359 | else if ((cached_type == TYPE_SSECMP) && (((cached_mode = get_attr_mode (insn)) == MODE_SF) || (cached_mode == MODE_DF) || (cached_mode == MODE_DI)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 13360 | { |
| 13361 | return 2; |
| 13362 | } |
| 13363 | else if ((cached_type == TYPE_SSECMP) && (((cached_mode = get_attr_mode (insn)) == MODE_SF) || (cached_mode == MODE_DF) || (cached_mode == MODE_DI) || (cached_mode == MODE_TI))) |
| 13364 | { |
| 13365 | return 2; |
| 13366 | } |
| 13367 | else if ((cached_type == TYPE_SSECMP) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 13368 | { |
| 13369 | return 3; |
| 13370 | } |
| 13371 | else if (cached_type == TYPE_SSECMP) |
| 13372 | { |
| 13373 | return 3; |
| 13374 | } |
| 13375 | else if ((cached_type == TYPE_SSECOMI) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 13376 | { |
| 13377 | return 4; |
| 13378 | } |
| 13379 | else if (cached_type == TYPE_SSECOMI) |
| 13380 | { |
| 13381 | return 4; |
| 13382 | } |
| 13383 | else if (((cached_type == TYPE_SSEADD) || (cached_type == TYPE_SSEADD1)) && (((cached_mode = get_attr_mode (insn)) == MODE_SF) || (cached_mode == MODE_DF) || (cached_mode == MODE_DI)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 13384 | { |
| 13385 | return 4; |
| 13386 | } |
| 13387 | else if (((cached_type == TYPE_SSEADD) || (cached_type == TYPE_SSEADD1)) && (((cached_mode = get_attr_mode (insn)) == MODE_SF) || (cached_mode == MODE_DF) || (cached_mode == MODE_DI))) |
| 13388 | { |
| 13389 | return 4; |
| 13390 | } |
| 13391 | else if (((cached_type == TYPE_SSEADD) || (cached_type == TYPE_SSEADD1)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 13392 | { |
| 13393 | return 5; |
| 13394 | } |
| 13395 | else if ((cached_type == TYPE_SSEADD) || (cached_type == TYPE_SSEADD1)) |
| 13396 | { |
| 13397 | return 5; |
| 13398 | } |
| 13399 | else if ((cached_type == TYPE_SSECVT) && (cached_athlon_decode == ATHLON_DECODE_DIRECT) && ((cached_mode = get_attr_mode (insn)) == MODE_DF) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 13400 | { |
| 13401 | return 4; |
| 13402 | } |
| 13403 | else if ((cached_type == TYPE_SSECVT) && (cached_athlon_decode == ATHLON_DECODE_DIRECT) && ((cached_mode = get_attr_mode (insn)) == MODE_DF)) |
| 13404 | { |
| 13405 | return 2; |
| 13406 | } |
| 13407 | else if ((cached_type == TYPE_SSECVT) && (cached_athlon_decode == ATHLON_DECODE_DOUBLE) && (((cached_mode = get_attr_mode (insn)) == MODE_V2DF) || (cached_mode == MODE_V4SF) || (cached_mode == MODE_TI)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 13408 | { |
| 13409 | return 5; |
| 13410 | } |
| 13411 | else if ((cached_type == TYPE_SSECVT) && (cached_athlon_decode == ATHLON_DECODE_DOUBLE) && (((cached_mode = get_attr_mode (insn)) == MODE_V2DF) || (cached_mode == MODE_V4SF) || (cached_mode == MODE_TI))) |
| 13412 | { |
| 13413 | return 3; |
| 13414 | } |
| 13415 | else if ((cached_type == TYPE_SSEICVT) && (cached_athlon_decode == ATHLON_DECODE_DIRECT) && (((cached_mode = get_attr_mode (insn)) == MODE_SF) || (cached_mode == MODE_DF)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 13416 | { |
| 13417 | return 6; |
| 13418 | } |
| 13419 | else if ((cached_type == TYPE_SSEICVT) && (cached_athlon_decode == ATHLON_DECODE_DOUBLE) && (((cached_mode = get_attr_mode (insn)) == MODE_SF) || (cached_mode == MODE_DF)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 13420 | { |
| 13421 | return 9; |
| 13422 | } |
| 13423 | else if ((cached_type == TYPE_SSEICVT) && (cached_athlon_decode == ATHLON_DECODE_DOUBLE) && (((cached_mode = get_attr_mode (insn)) == MODE_SF) || (cached_mode == MODE_DF)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 13424 | { |
| 13425 | return 11 /* 0xb */; |
| 13426 | } |
| 13427 | else if ((cached_type == TYPE_SSEICVT) && (cached_athlon_decode == ATHLON_DECODE_VECTOR) && (((cached_mode = get_attr_mode (insn)) == MODE_SF) || (cached_mode == MODE_DF)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 13428 | { |
| 13429 | return 14 /* 0xe */; |
| 13430 | } |
| 13431 | else if ((cached_type == TYPE_SSECVT) && (cached_athlon_decode == ATHLON_DECODE_DOUBLE) && ((cached_mode = get_attr_mode (insn)) == MODE_SF) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 13432 | { |
| 13433 | return 9; |
| 13434 | } |
| 13435 | else if ((cached_type == TYPE_SSECVT) && (cached_athlon_decode == ATHLON_DECODE_VECTOR) && ((cached_mode = get_attr_mode (insn)) == MODE_SF) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 13436 | { |
| 13437 | return 12 /* 0xc */; |
| 13438 | } |
| 13439 | else if ((cached_type == TYPE_SSECVT) && (cached_athlon_decode == ATHLON_DECODE_VECTOR) && (((cached_mode = get_attr_mode (insn)) == MODE_V4SF) || (cached_mode == MODE_V2DF) || (cached_mode == MODE_TI)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 13440 | { |
| 13441 | return 8; |
| 13442 | } |
| 13443 | else if ((cached_type == TYPE_SSECVT) && (cached_athlon_decode == ATHLON_DECODE_VECTOR) && (((cached_mode = get_attr_mode (insn)) == MODE_V4SF) || (cached_mode == MODE_V2DF) || (cached_mode == MODE_TI)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 13444 | { |
| 13445 | return 8; |
| 13446 | } |
| 13447 | else if ((cached_type == TYPE_SSEICVT) && (cached_athlon_decode == ATHLON_DECODE_VECTOR) && (((cached_mode = get_attr_mode (insn)) == MODE_SI) || (cached_mode == MODE_DI)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 13448 | { |
| 13449 | return 9; |
| 13450 | } |
| 13451 | else if ((cached_type == TYPE_SSEICVT) && (cached_athlon_decode == ATHLON_DECODE_DOUBLE) && (((cached_mode = get_attr_mode (insn)) == MODE_SI) || (cached_mode == MODE_DI)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 13452 | { |
| 13453 | return 9; |
| 13454 | } |
| 13455 | else if ((cached_type == TYPE_SSEMUL) && (((cached_mode = get_attr_mode (insn)) == MODE_SF) || (cached_mode == MODE_DF)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 13456 | { |
| 13457 | return 4; |
| 13458 | } |
| 13459 | else if ((cached_type == TYPE_SSEMUL) && (((cached_mode = get_attr_mode (insn)) == MODE_SF) || (cached_mode == MODE_DF))) |
| 13460 | { |
| 13461 | return 4; |
| 13462 | } |
| 13463 | else if ((cached_type == TYPE_SSEMUL) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 13464 | { |
| 13465 | return 5; |
| 13466 | } |
| 13467 | else if (cached_type == TYPE_SSEMUL) |
| 13468 | { |
| 13469 | return 5; |
| 13470 | } |
| 13471 | else if ((cached_type == TYPE_SSEDIV) && (((cached_mode = get_attr_mode (insn)) == MODE_SF) || (cached_mode == MODE_DF)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 13472 | { |
| 13473 | return 20 /* 0x14 */; |
| 13474 | } |
| 13475 | else if ((cached_type == TYPE_SSEDIV) && (((cached_mode = get_attr_mode (insn)) == MODE_SF) || (cached_mode == MODE_DF))) |
| 13476 | { |
| 13477 | return 20 /* 0x14 */; |
| 13478 | } |
| 13479 | else if ((cached_type == TYPE_SSEDIV) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 13480 | { |
| 13481 | return 39 /* 0x27 */; |
| 13482 | } |
| 13483 | else if (cached_type == TYPE_SSEDIV) |
| 13484 | { |
| 13485 | return 39 /* 0x27 */; |
| 13486 | } |
| 13487 | else |
| 13488 | { |
| 13489 | return 0; |
| 13490 | } |
| 13491 | |
| 13492 | default: |
| 13493 | return 0; |
| 13494 | |
| 13495 | } |
| 13496 | } |
| 13497 | |
| 13498 | int |
| 13499 | insn_default_latency_k8 (rtx_insn *insn ATTRIBUTE_UNUSED) |
| 13500 | { |
| 13501 | enum attr_memory cached_memory ATTRIBUTE_UNUSED; |
| 13502 | enum attr_type cached_type ATTRIBUTE_UNUSED; |
| 13503 | enum attr_mode cached_mode ATTRIBUTE_UNUSED; |
| 13504 | enum attr_athlon_decode cached_athlon_decode ATTRIBUTE_UNUSED; |
| 13505 | enum attr_unit cached_unit ATTRIBUTE_UNUSED; |
| 13506 | |
| 13507 | switch (recog_memoized (insn)) |
| 13508 | { |
| 13509 | case 4217: /* avx_vbroadcastf128_v4df */ |
| 13510 | case 4216: /* avx_vbroadcastf128_v8sf */ |
| 13511 | case 4215: /* avx_vbroadcastf128_v4di */ |
| 13512 | case 4214: /* avx_vbroadcastf128_v8si */ |
| 13513 | case 4213: /* avx_vbroadcastf128_v16hi */ |
| 13514 | case 4212: /* avx_vbroadcastf128_v32qi */ |
| 13515 | extract_constrain_insn_cached (insn); |
| 13516 | if (((1 << which_alternative) & 0x29)) |
| 13517 | { |
| 13518 | return 2; |
| 13519 | } |
| 13520 | else if (get_attr_memory (insn) == MEMORY_LOAD) |
| 13521 | { |
| 13522 | return 5; |
| 13523 | } |
| 13524 | else |
| 13525 | { |
| 13526 | return 3; |
| 13527 | } |
| 13528 | |
| 13529 | case 3904: /* sse4_2_pcmpistr_cconly */ |
| 13530 | case 3900: /* sse4_2_pcmpestr_cconly */ |
| 13531 | extract_constrain_insn_cached (insn); |
| 13532 | if (!((1 << which_alternative) & 0x5)) |
| 13533 | { |
| 13534 | return 5; |
| 13535 | } |
| 13536 | else |
| 13537 | { |
| 13538 | return 3; |
| 13539 | } |
| 13540 | |
| 13541 | case 3903: /* sse4_2_pcmpistrm */ |
| 13542 | case 3902: /* sse4_2_pcmpistri */ |
| 13543 | case 3901: /* sse4_2_pcmpistr */ |
| 13544 | case 3899: /* sse4_2_pcmpestrm */ |
| 13545 | case 3898: /* sse4_2_pcmpestri */ |
| 13546 | case 3897: /* sse4_2_pcmpestr */ |
| 13547 | extract_constrain_insn_cached (insn); |
| 13548 | if (which_alternative != 0) |
| 13549 | { |
| 13550 | return 5; |
| 13551 | } |
| 13552 | else |
| 13553 | { |
| 13554 | return 3; |
| 13555 | } |
| 13556 | |
| 13557 | case 3634: /* *vec_extractv4si */ |
| 13558 | extract_constrain_insn_cached (insn); |
| 13559 | if ((((1 << which_alternative) & 0x3)) && (get_attr_memory (insn) == MEMORY_LOAD)) |
| 13560 | { |
| 13561 | return 5; |
| 13562 | } |
| 13563 | else if (((1 << which_alternative) & 0x3)) |
| 13564 | { |
| 13565 | return 3; |
| 13566 | } |
| 13567 | else |
| 13568 | { |
| 13569 | return 0; |
| 13570 | } |
| 13571 | |
| 13572 | case 2783: /* avx512vl_us_truncatev16hiv16qi2_mask */ |
| 13573 | case 2782: /* avx512vl_truncatev16hiv16qi2_mask */ |
| 13574 | case 2781: /* avx512vl_ss_truncatev16hiv16qi2_mask */ |
| 13575 | case 2780: /* avx512vl_us_truncatev8siv8hi2_mask */ |
| 13576 | case 2779: /* avx512vl_truncatev8siv8hi2_mask */ |
| 13577 | case 2778: /* avx512vl_ss_truncatev8siv8hi2_mask */ |
| 13578 | case 2777: /* avx512vl_us_truncatev4div4si2_mask */ |
| 13579 | case 2776: /* avx512vl_truncatev4div4si2_mask */ |
| 13580 | case 2775: /* avx512vl_ss_truncatev4div4si2_mask */ |
| 13581 | case 2774: /* *avx512vl_us_truncatev16hiv16qi2 */ |
| 13582 | case 2773: /* *avx512vl_truncatev16hiv16qi2 */ |
| 13583 | case 2772: /* *avx512vl_ss_truncatev16hiv16qi2 */ |
| 13584 | case 2771: /* *avx512vl_us_truncatev8siv8hi2 */ |
| 13585 | case 2770: /* *avx512vl_truncatev8siv8hi2 */ |
| 13586 | case 2769: /* *avx512vl_ss_truncatev8siv8hi2 */ |
| 13587 | case 2768: /* *avx512vl_us_truncatev4div4si2 */ |
| 13588 | case 2767: /* *avx512vl_truncatev4div4si2 */ |
| 13589 | case 2766: /* *avx512vl_ss_truncatev4div4si2 */ |
| 13590 | case 2759: /* avx512f_us_truncatev8div8hi2_mask */ |
| 13591 | case 2758: /* avx512f_truncatev8div8hi2_mask */ |
| 13592 | case 2757: /* avx512f_ss_truncatev8div8hi2_mask */ |
| 13593 | case 2750: /* avx512f_us_truncatev16siv16qi2_mask */ |
| 13594 | case 2749: /* avx512f_truncatev16siv16qi2_mask */ |
| 13595 | case 2748: /* avx512f_ss_truncatev16siv16qi2_mask */ |
| 13596 | case 2747: /* *avx512f_us_truncatev8div8hi2 */ |
| 13597 | case 2746: /* *avx512f_truncatev8div8hi2 */ |
| 13598 | case 2745: /* *avx512f_ss_truncatev8div8hi2 */ |
| 13599 | case 2738: /* *avx512f_us_truncatev16siv16qi2 */ |
| 13600 | case 2737: /* *avx512f_truncatev16siv16qi2 */ |
| 13601 | case 2736: /* *avx512f_ss_truncatev16siv16qi2 */ |
| 13602 | extract_constrain_insn_cached (insn); |
| 13603 | if (memory_operand (operands[1], DFmode)) |
| 13604 | { |
| 13605 | return 2; |
| 13606 | } |
| 13607 | else if (which_alternative != 0) |
| 13608 | { |
| 13609 | return 3; |
| 13610 | } |
| 13611 | else |
| 13612 | { |
| 13613 | return 2; |
| 13614 | } |
| 13615 | |
| 13616 | case 2732: /* sse2_movsd */ |
| 13617 | extract_constrain_insn_cached (insn); |
| 13618 | if (which_alternative != 5) |
| 13619 | { |
| 13620 | return 2; |
| 13621 | } |
| 13622 | else if (get_attr_memory (insn) == MEMORY_LOAD) |
| 13623 | { |
| 13624 | return 5; |
| 13625 | } |
| 13626 | else |
| 13627 | { |
| 13628 | return 3; |
| 13629 | } |
| 13630 | |
| 13631 | case 2542: /* *vec_interleave_lowv2df */ |
| 13632 | case 2536: /* *vec_interleave_highv2df */ |
| 13633 | extract_constrain_insn_cached (insn); |
| 13634 | if (!((1 << which_alternative) & 0x7)) |
| 13635 | { |
| 13636 | return 2; |
| 13637 | } |
| 13638 | else if (get_attr_memory (insn) == MEMORY_LOAD) |
| 13639 | { |
| 13640 | return 5; |
| 13641 | } |
| 13642 | else |
| 13643 | { |
| 13644 | return 3; |
| 13645 | } |
| 13646 | |
| 13647 | case 2372: /* *sse2_vd_cvtsd2ss */ |
| 13648 | case 2371: /* sse2_cvtsd2ss_round */ |
| 13649 | case 2370: /* sse2_cvtsd2ss */ |
| 13650 | extract_constrain_insn_cached (insn); |
| 13651 | if ((which_alternative == 1) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 13652 | { |
| 13653 | return 9; |
| 13654 | } |
| 13655 | else if ((which_alternative == 0) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 13656 | { |
| 13657 | return 12 /* 0xc */; |
| 13658 | } |
| 13659 | else |
| 13660 | { |
| 13661 | return 0; |
| 13662 | } |
| 13663 | |
| 13664 | case 2383: /* *sse2_cvtpd2ps_mask */ |
| 13665 | case 2382: /* *sse2_cvtpd2ps */ |
| 13666 | case 2369: /* sse2_cvttpd2dq_mask */ |
| 13667 | case 2368: /* sse2_cvttpd2dq */ |
| 13668 | case 2291: /* sse2_cvtpd2dq_mask */ |
| 13669 | case 2290: /* sse2_cvtpd2dq */ |
| 13670 | if (((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) || (cached_memory == MEMORY_NONE)) |
| 13671 | { |
| 13672 | return 8; |
| 13673 | } |
| 13674 | else |
| 13675 | { |
| 13676 | return 0; |
| 13677 | } |
| 13678 | |
| 13679 | case 2195: /* sse2_cvtpi2pd */ |
| 13680 | extract_constrain_insn_cached (insn); |
| 13681 | if ((which_alternative == 0) && (get_attr_memory (insn) == MEMORY_LOAD)) |
| 13682 | { |
| 13683 | return 3; |
| 13684 | } |
| 13685 | else if (which_alternative == 0) |
| 13686 | { |
| 13687 | return 2; |
| 13688 | } |
| 13689 | else |
| 13690 | { |
| 13691 | return 0; |
| 13692 | } |
| 13693 | |
| 13694 | case 2126: /* cvtusi2sd64_round */ |
| 13695 | case 2125: /* cvtusi2sd64 */ |
| 13696 | case 2124: /* cvtusi2ss64_round */ |
| 13697 | case 2123: /* cvtusi2ss64 */ |
| 13698 | case 2122: /* cvtusi2sd32 */ |
| 13699 | case 2121: /* cvtusi2ss32_round */ |
| 13700 | case 2120: /* cvtusi2ss32 */ |
| 13701 | if (get_attr_memory (insn) == MEMORY_LOAD) |
| 13702 | { |
| 13703 | return 6; |
| 13704 | } |
| 13705 | else |
| 13706 | { |
| 13707 | return 0; |
| 13708 | } |
| 13709 | |
| 13710 | case 2226: /* sse2_cvttsd2siq_round */ |
| 13711 | case 2225: /* sse2_cvttsd2siq */ |
| 13712 | case 2224: /* sse2_cvttsd2si_round */ |
| 13713 | case 2223: /* sse2_cvttsd2si */ |
| 13714 | case 2222: /* sse2_cvtsd2siq_2 */ |
| 13715 | case 2221: /* sse2_cvtsd2siq_round */ |
| 13716 | case 2220: /* sse2_cvtsd2siq */ |
| 13717 | case 2219: /* sse2_cvtsd2si_2 */ |
| 13718 | case 2218: /* sse2_cvtsd2si_round */ |
| 13719 | case 2217: /* sse2_cvtsd2si */ |
| 13720 | case 2119: /* sse_cvttss2siq_round */ |
| 13721 | case 2118: /* sse_cvttss2siq */ |
| 13722 | case 2117: /* sse_cvttss2si_round */ |
| 13723 | case 2116: /* sse_cvttss2si */ |
| 13724 | case 2115: /* sse_cvtss2siq_2 */ |
| 13725 | case 2114: /* sse_cvtss2siq_round */ |
| 13726 | case 2113: /* sse_cvtss2siq */ |
| 13727 | case 2112: /* sse_cvtss2si_2 */ |
| 13728 | case 2111: /* sse_cvtss2si_round */ |
| 13729 | case 2110: /* sse_cvtss2si */ |
| 13730 | extract_constrain_insn_cached (insn); |
| 13731 | if (((which_alternative == 1) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) || ((which_alternative == 0) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE))) |
| 13732 | { |
| 13733 | return 9; |
| 13734 | } |
| 13735 | else |
| 13736 | { |
| 13737 | return 0; |
| 13738 | } |
| 13739 | |
| 13740 | case 1464: /* sse2_divv2df3_mask */ |
| 13741 | case 1463: /* sse2_divv2df3 */ |
| 13742 | case 1462: /* avx_divv4df3_mask */ |
| 13743 | case 1461: /* avx_divv4df3 */ |
| 13744 | case 1460: /* avx512f_divv8df3_mask_round */ |
| 13745 | case 1459: /* avx512f_divv8df3_mask */ |
| 13746 | case 1458: /* avx512f_divv8df3_round */ |
| 13747 | case 1457: /* avx512f_divv8df3 */ |
| 13748 | case 1456: /* sse_divv4sf3_mask */ |
| 13749 | case 1455: /* sse_divv4sf3 */ |
| 13750 | case 1454: /* avx_divv8sf3_mask */ |
| 13751 | case 1453: /* avx_divv8sf3 */ |
| 13752 | case 1452: /* avx512f_divv16sf3_mask_round */ |
| 13753 | case 1451: /* avx512f_divv16sf3_mask */ |
| 13754 | case 1450: /* avx512f_divv16sf3_round */ |
| 13755 | case 1449: /* avx512f_divv16sf3 */ |
| 13756 | if (get_attr_memory (insn) == MEMORY_LOAD) |
| 13757 | { |
| 13758 | return 35 /* 0x23 */; |
| 13759 | } |
| 13760 | else |
| 13761 | { |
| 13762 | return 39 /* 0x27 */; |
| 13763 | } |
| 13764 | |
| 13765 | case 1448: /* sse2_vmdivv2df3_round */ |
| 13766 | case 1447: /* sse2_vmdivv2df3 */ |
| 13767 | case 1444: /* sse_vmdivv4sf3_round */ |
| 13768 | case 1443: /* sse_vmdivv4sf3 */ |
| 13769 | if (get_attr_memory (insn) == MEMORY_LOAD) |
| 13770 | { |
| 13771 | return 22 /* 0x16 */; |
| 13772 | } |
| 13773 | else |
| 13774 | { |
| 13775 | return 20 /* 0x14 */; |
| 13776 | } |
| 13777 | |
| 13778 | case 3783: /* sse4_1_dppd */ |
| 13779 | case 3782: /* avx_dppd256 */ |
| 13780 | case 3781: /* sse4_1_dpps */ |
| 13781 | case 3780: /* avx_dpps256 */ |
| 13782 | case 1620: /* sse3_hsubv4sf3 */ |
| 13783 | case 1619: /* sse3_haddv4sf3 */ |
| 13784 | case 1618: /* avx_hsubv8sf3 */ |
| 13785 | case 1617: /* avx_haddv8sf3 */ |
| 13786 | case 1616: /* *sse3_hsubv2df3_low */ |
| 13787 | case 1615: /* *sse3_haddv2df3_low */ |
| 13788 | case 1614: /* sse3_hsubv2df3 */ |
| 13789 | case 1613: /* *sse3_haddv2df3 */ |
| 13790 | case 1612: /* avx_hsubv4df3 */ |
| 13791 | case 1611: /* avx_haddv4df3 */ |
| 13792 | case 1610: /* sse3_addsubv4sf3 */ |
| 13793 | case 1609: /* avx_addsubv8sf3 */ |
| 13794 | case 1608: /* sse3_addsubv2df3 */ |
| 13795 | case 1607: /* avx_addsubv4df3 */ |
| 13796 | case 1598: /* ieee_minv2df3_mask */ |
| 13797 | case 1597: /* ieee_minv2df3 */ |
| 13798 | case 1596: /* ieee_maxv2df3_mask */ |
| 13799 | case 1595: /* ieee_maxv2df3 */ |
| 13800 | case 1594: /* ieee_minv4df3_mask */ |
| 13801 | case 1593: /* ieee_minv4df3 */ |
| 13802 | case 1592: /* ieee_maxv4df3_mask */ |
| 13803 | case 1591: /* ieee_maxv4df3 */ |
| 13804 | case 1590: /* ieee_minv8df3_mask_round */ |
| 13805 | case 1589: /* ieee_minv8df3_mask */ |
| 13806 | case 1588: /* ieee_minv8df3_round */ |
| 13807 | case 1587: /* ieee_minv8df3 */ |
| 13808 | case 1586: /* ieee_maxv8df3_mask_round */ |
| 13809 | case 1585: /* ieee_maxv8df3_mask */ |
| 13810 | case 1584: /* ieee_maxv8df3_round */ |
| 13811 | case 1583: /* ieee_maxv8df3 */ |
| 13812 | case 1582: /* ieee_minv4sf3_mask */ |
| 13813 | case 1581: /* ieee_minv4sf3 */ |
| 13814 | case 1580: /* ieee_maxv4sf3_mask */ |
| 13815 | case 1579: /* ieee_maxv4sf3 */ |
| 13816 | case 1578: /* ieee_minv8sf3_mask */ |
| 13817 | case 1577: /* ieee_minv8sf3 */ |
| 13818 | case 1576: /* ieee_maxv8sf3_mask */ |
| 13819 | case 1575: /* ieee_maxv8sf3 */ |
| 13820 | case 1574: /* ieee_minv16sf3_mask_round */ |
| 13821 | case 1573: /* ieee_minv16sf3_mask */ |
| 13822 | case 1572: /* ieee_minv16sf3_round */ |
| 13823 | case 1571: /* ieee_minv16sf3 */ |
| 13824 | case 1570: /* ieee_maxv16sf3_mask_round */ |
| 13825 | case 1569: /* ieee_maxv16sf3_mask */ |
| 13826 | case 1568: /* ieee_maxv16sf3_round */ |
| 13827 | case 1567: /* ieee_maxv16sf3 */ |
| 13828 | case 1566: /* *sminv2df3_mask_round */ |
| 13829 | case 1565: /* *sminv2df3_mask */ |
| 13830 | case 1564: /* *sminv2df3_round */ |
| 13831 | case 1563: /* *sminv2df3 */ |
| 13832 | case 1562: /* *smaxv2df3_mask_round */ |
| 13833 | case 1561: /* *smaxv2df3_mask */ |
| 13834 | case 1560: /* *smaxv2df3_round */ |
| 13835 | case 1559: /* *smaxv2df3 */ |
| 13836 | case 1558: /* *sminv4df3_mask_round */ |
| 13837 | case 1557: /* *sminv4df3_mask */ |
| 13838 | case 1556: /* *sminv4df3_round */ |
| 13839 | case 1555: /* *sminv4df3 */ |
| 13840 | case 1554: /* *smaxv4df3_mask_round */ |
| 13841 | case 1553: /* *smaxv4df3_mask */ |
| 13842 | case 1552: /* *smaxv4df3_round */ |
| 13843 | case 1551: /* *smaxv4df3 */ |
| 13844 | case 1550: /* *sminv8df3_mask_round */ |
| 13845 | case 1549: /* *sminv8df3_mask */ |
| 13846 | case 1548: /* *sminv8df3_round */ |
| 13847 | case 1547: /* *sminv8df3 */ |
| 13848 | case 1546: /* *smaxv8df3_mask_round */ |
| 13849 | case 1545: /* *smaxv8df3_mask */ |
| 13850 | case 1544: /* *smaxv8df3_round */ |
| 13851 | case 1543: /* *smaxv8df3 */ |
| 13852 | case 1542: /* *sminv4sf3_mask_round */ |
| 13853 | case 1541: /* *sminv4sf3_mask */ |
| 13854 | case 1540: /* *sminv4sf3_round */ |
| 13855 | case 1539: /* *sminv4sf3 */ |
| 13856 | case 1538: /* *smaxv4sf3_mask_round */ |
| 13857 | case 1537: /* *smaxv4sf3_mask */ |
| 13858 | case 1536: /* *smaxv4sf3_round */ |
| 13859 | case 1535: /* *smaxv4sf3 */ |
| 13860 | case 1534: /* *sminv8sf3_mask_round */ |
| 13861 | case 1533: /* *sminv8sf3_mask */ |
| 13862 | case 1532: /* *sminv8sf3_round */ |
| 13863 | case 1531: /* *sminv8sf3 */ |
| 13864 | case 1530: /* *smaxv8sf3_mask_round */ |
| 13865 | case 1529: /* *smaxv8sf3_mask */ |
| 13866 | case 1528: /* *smaxv8sf3_round */ |
| 13867 | case 1527: /* *smaxv8sf3 */ |
| 13868 | case 1526: /* *sminv16sf3_mask_round */ |
| 13869 | case 1525: /* *sminv16sf3_mask */ |
| 13870 | case 1524: /* *sminv16sf3_round */ |
| 13871 | case 1523: /* *sminv16sf3 */ |
| 13872 | case 1522: /* *smaxv16sf3_mask_round */ |
| 13873 | case 1521: /* *smaxv16sf3_mask */ |
| 13874 | case 1520: /* *smaxv16sf3_round */ |
| 13875 | case 1519: /* *smaxv16sf3 */ |
| 13876 | case 1440: /* *mulv2df3_mask_round */ |
| 13877 | case 1439: /* *mulv2df3_mask */ |
| 13878 | case 1438: /* *mulv2df3_round */ |
| 13879 | case 1437: /* *mulv2df3 */ |
| 13880 | case 1436: /* *mulv4df3_mask_round */ |
| 13881 | case 1435: /* *mulv4df3_mask */ |
| 13882 | case 1434: /* *mulv4df3_round */ |
| 13883 | case 1433: /* *mulv4df3 */ |
| 13884 | case 1432: /* *mulv8df3_mask_round */ |
| 13885 | case 1431: /* *mulv8df3_mask */ |
| 13886 | case 1430: /* *mulv8df3_round */ |
| 13887 | case 1429: /* *mulv8df3 */ |
| 13888 | case 1428: /* *mulv4sf3_mask_round */ |
| 13889 | case 1427: /* *mulv4sf3_mask */ |
| 13890 | case 1426: /* *mulv4sf3_round */ |
| 13891 | case 1425: /* *mulv4sf3 */ |
| 13892 | case 1424: /* *mulv8sf3_mask_round */ |
| 13893 | case 1423: /* *mulv8sf3_mask */ |
| 13894 | case 1422: /* *mulv8sf3_round */ |
| 13895 | case 1421: /* *mulv8sf3 */ |
| 13896 | case 1420: /* *mulv16sf3_mask_round */ |
| 13897 | case 1419: /* *mulv16sf3_mask */ |
| 13898 | case 1418: /* *mulv16sf3_round */ |
| 13899 | case 1417: /* *mulv16sf3 */ |
| 13900 | case 1408: /* *subv2df3_mask_round */ |
| 13901 | case 1407: /* *subv2df3_mask */ |
| 13902 | case 1406: /* *subv2df3_round */ |
| 13903 | case 1405: /* *subv2df3 */ |
| 13904 | case 1404: /* *addv2df3_mask_round */ |
| 13905 | case 1403: /* *addv2df3_mask */ |
| 13906 | case 1402: /* *addv2df3_round */ |
| 13907 | case 1401: /* *addv2df3 */ |
| 13908 | case 1400: /* *subv4df3_mask_round */ |
| 13909 | case 1399: /* *subv4df3_mask */ |
| 13910 | case 1398: /* *subv4df3_round */ |
| 13911 | case 1397: /* *subv4df3 */ |
| 13912 | case 1396: /* *addv4df3_mask_round */ |
| 13913 | case 1395: /* *addv4df3_mask */ |
| 13914 | case 1394: /* *addv4df3_round */ |
| 13915 | case 1393: /* *addv4df3 */ |
| 13916 | case 1392: /* *subv8df3_mask_round */ |
| 13917 | case 1391: /* *subv8df3_mask */ |
| 13918 | case 1390: /* *subv8df3_round */ |
| 13919 | case 1389: /* *subv8df3 */ |
| 13920 | case 1388: /* *addv8df3_mask_round */ |
| 13921 | case 1387: /* *addv8df3_mask */ |
| 13922 | case 1386: /* *addv8df3_round */ |
| 13923 | case 1385: /* *addv8df3 */ |
| 13924 | case 1384: /* *subv4sf3_mask_round */ |
| 13925 | case 1383: /* *subv4sf3_mask */ |
| 13926 | case 1382: /* *subv4sf3_round */ |
| 13927 | case 1381: /* *subv4sf3 */ |
| 13928 | case 1380: /* *addv4sf3_mask_round */ |
| 13929 | case 1379: /* *addv4sf3_mask */ |
| 13930 | case 1378: /* *addv4sf3_round */ |
| 13931 | case 1377: /* *addv4sf3 */ |
| 13932 | case 1376: /* *subv8sf3_mask_round */ |
| 13933 | case 1375: /* *subv8sf3_mask */ |
| 13934 | case 1374: /* *subv8sf3_round */ |
| 13935 | case 1373: /* *subv8sf3 */ |
| 13936 | case 1372: /* *addv8sf3_mask_round */ |
| 13937 | case 1371: /* *addv8sf3_mask */ |
| 13938 | case 1370: /* *addv8sf3_round */ |
| 13939 | case 1369: /* *addv8sf3 */ |
| 13940 | case 1368: /* *subv16sf3_mask_round */ |
| 13941 | case 1367: /* *subv16sf3_mask */ |
| 13942 | case 1366: /* *subv16sf3_round */ |
| 13943 | case 1365: /* *subv16sf3 */ |
| 13944 | case 1364: /* *addv16sf3_mask_round */ |
| 13945 | case 1363: /* *addv16sf3_mask */ |
| 13946 | case 1362: /* *addv16sf3_round */ |
| 13947 | case 1361: /* *addv16sf3 */ |
| 13948 | if (get_attr_memory (insn) == MEMORY_LOAD) |
| 13949 | { |
| 13950 | return 7; |
| 13951 | } |
| 13952 | else |
| 13953 | { |
| 13954 | return 5; |
| 13955 | } |
| 13956 | |
| 13957 | case 4937: /* storedi_via_sse */ |
| 13958 | case 4936: /* loaddi_via_sse */ |
| 13959 | case 3766: /* sse4a_vmmovntv4sf */ |
| 13960 | case 3764: /* sse4a_movntsf */ |
| 13961 | case 2453: /* sse_movss */ |
| 13962 | case 1298: /* sse2_movntidi */ |
| 13963 | extract_insn_cached (insn); |
| 13964 | if (memory_operand (operands[1], DFmode)) |
| 13965 | { |
| 13966 | return 2; |
| 13967 | } |
| 13968 | else if (get_attr_memory (insn) == MEMORY_LOAD) |
| 13969 | { |
| 13970 | return 1; |
| 13971 | } |
| 13972 | else |
| 13973 | { |
| 13974 | return 2; |
| 13975 | } |
| 13976 | |
| 13977 | case 4758: /* avx512vl_compressstorev2df_mask */ |
| 13978 | case 4757: /* avx512vl_compressstorev2di_mask */ |
| 13979 | case 4756: /* avx512vl_compressstorev4sf_mask */ |
| 13980 | case 4755: /* avx512vl_compressstorev4si_mask */ |
| 13981 | case 2933: /* avx512f_us_truncatev8div16qi2_mask_store */ |
| 13982 | case 2932: /* avx512f_truncatev8div16qi2_mask_store */ |
| 13983 | case 2931: /* avx512f_ss_truncatev8div16qi2_mask_store */ |
| 13984 | case 2924: /* *avx512f_us_truncatev8div16qi2_store */ |
| 13985 | case 2923: /* *avx512f_truncatev8div16qi2_store */ |
| 13986 | case 2922: /* *avx512f_ss_truncatev8div16qi2_store */ |
| 13987 | case 2918: /* avx512vl_us_truncatev2div2si2_mask_store */ |
| 13988 | case 2917: /* avx512vl_truncatev2div2si2_mask_store */ |
| 13989 | case 2916: /* avx512vl_ss_truncatev2div2si2_mask_store */ |
| 13990 | case 2909: /* *avx512vl_us_truncatev2div2si2_store */ |
| 13991 | case 2908: /* *avx512vl_truncatev2div2si2_store */ |
| 13992 | case 2907: /* *avx512vl_ss_truncatev2div2si2_store */ |
| 13993 | case 2903: /* avx512vl_us_truncatev2div2hi2_mask_store */ |
| 13994 | case 2902: /* avx512vl_truncatev2div2hi2_mask_store */ |
| 13995 | case 2901: /* avx512vl_ss_truncatev2div2hi2_mask_store */ |
| 13996 | case 2894: /* *avx512vl_us_truncatev2div2hi2_store */ |
| 13997 | case 2893: /* *avx512vl_truncatev2div2hi2_store */ |
| 13998 | case 2892: /* *avx512vl_ss_truncatev2div2hi2_store */ |
| 13999 | case 2891: /* avx512vl_us_truncatev4div4hi2_mask_store */ |
| 14000 | case 2890: /* avx512vl_truncatev4div4hi2_mask_store */ |
| 14001 | case 2889: /* avx512vl_ss_truncatev4div4hi2_mask_store */ |
| 14002 | case 2888: /* avx512vl_us_truncatev4siv4hi2_mask_store */ |
| 14003 | case 2887: /* avx512vl_truncatev4siv4hi2_mask_store */ |
| 14004 | case 2886: /* avx512vl_ss_truncatev4siv4hi2_mask_store */ |
| 14005 | case 2873: /* *avx512vl_us_truncatev4div4hi2_store */ |
| 14006 | case 2872: /* *avx512vl_truncatev4div4hi2_store */ |
| 14007 | case 2871: /* *avx512vl_ss_truncatev4div4hi2_store */ |
| 14008 | case 2870: /* *avx512vl_us_truncatev4siv4hi2_store */ |
| 14009 | case 2869: /* *avx512vl_truncatev4siv4hi2_store */ |
| 14010 | case 2868: /* *avx512vl_ss_truncatev4siv4hi2_store */ |
| 14011 | case 2858: /* avx512vl_us_truncatev8siv8qi2_mask_store */ |
| 14012 | case 2857: /* avx512vl_truncatev8siv8qi2_mask_store */ |
| 14013 | case 2856: /* avx512vl_ss_truncatev8siv8qi2_mask_store */ |
| 14014 | case 2855: /* avx512vl_us_truncatev8hiv8qi2_mask_store */ |
| 14015 | case 2854: /* avx512vl_truncatev8hiv8qi2_mask_store */ |
| 14016 | case 2853: /* avx512vl_ss_truncatev8hiv8qi2_mask_store */ |
| 14017 | case 2840: /* *avx512vl_us_truncatev8siv8qi2_store */ |
| 14018 | case 2839: /* *avx512vl_truncatev8siv8qi2_store */ |
| 14019 | case 2838: /* *avx512vl_ss_truncatev8siv8qi2_store */ |
| 14020 | case 2837: /* *avx512vl_us_truncatev8hiv8qi2_store */ |
| 14021 | case 2836: /* *avx512vl_truncatev8hiv8qi2_store */ |
| 14022 | case 2835: /* *avx512vl_ss_truncatev8hiv8qi2_store */ |
| 14023 | case 2834: /* avx512vl_us_truncatev4div4qi2_mask_store */ |
| 14024 | case 2833: /* avx512vl_truncatev4div4qi2_mask_store */ |
| 14025 | case 2832: /* avx512vl_ss_truncatev4div4qi2_mask_store */ |
| 14026 | case 2831: /* avx512vl_us_truncatev4siv4qi2_mask_store */ |
| 14027 | case 2830: /* avx512vl_truncatev4siv4qi2_mask_store */ |
| 14028 | case 2829: /* avx512vl_ss_truncatev4siv4qi2_mask_store */ |
| 14029 | case 2816: /* *avx512vl_us_truncatev4div4qi2_store */ |
| 14030 | case 2815: /* *avx512vl_truncatev4div4qi2_store */ |
| 14031 | case 2814: /* *avx512vl_ss_truncatev4div4qi2_store */ |
| 14032 | case 2813: /* *avx512vl_us_truncatev4siv4qi2_store */ |
| 14033 | case 2812: /* *avx512vl_truncatev4siv4qi2_store */ |
| 14034 | case 2811: /* *avx512vl_ss_truncatev4siv4qi2_store */ |
| 14035 | case 2810: /* avx512vl_us_truncatev2div2qi2_mask_store */ |
| 14036 | case 2809: /* avx512vl_truncatev2div2qi2_mask_store */ |
| 14037 | case 2808: /* avx512vl_ss_truncatev2div2qi2_mask_store */ |
| 14038 | case 2801: /* *avx512vl_us_truncatev2div2qi2_store */ |
| 14039 | case 2800: /* *avx512vl_truncatev2div2qi2_store */ |
| 14040 | case 2799: /* *avx512vl_ss_truncatev2div2qi2_store */ |
| 14041 | case 1292: /* avx512vl_storev8hi_mask */ |
| 14042 | case 1288: /* avx512vl_storev16qi_mask */ |
| 14043 | case 1286: /* avx512vl_storev2df_mask */ |
| 14044 | case 1283: /* avx512vl_storev4sf_mask */ |
| 14045 | case 1280: /* avx512vl_storev2di_mask */ |
| 14046 | case 1277: /* avx512vl_storev4si_mask */ |
| 14047 | extract_insn_cached (insn); |
| 14048 | if (memory_operand (operands[1], DFmode)) |
| 14049 | { |
| 14050 | return 2; |
| 14051 | } |
| 14052 | else |
| 14053 | { |
| 14054 | return 3; |
| 14055 | } |
| 14056 | |
| 14057 | case 1160: /* *sse2_umulv1siv1di3 */ |
| 14058 | case 1159: /* *mmx_pmulhrwv4hi3 */ |
| 14059 | case 1158: /* *mmx_pmaddwd */ |
| 14060 | case 1157: /* *mmx_umulv4hi3_highpart */ |
| 14061 | case 1156: /* *mmx_smulv4hi3_highpart */ |
| 14062 | case 1155: /* *mmx_mulv4hi3 */ |
| 14063 | case 1114: /* *mmx_mulv2sf3 */ |
| 14064 | if (get_attr_memory (insn) == MEMORY_LOAD) |
| 14065 | { |
| 14066 | return 4; |
| 14067 | } |
| 14068 | else |
| 14069 | { |
| 14070 | return 3; |
| 14071 | } |
| 14072 | |
| 14073 | case 2197: /* sse2_cvttpd2pi */ |
| 14074 | case 2196: /* sse2_cvtpd2pi */ |
| 14075 | case 2105: /* sse_cvttps2pi */ |
| 14076 | case 2104: /* sse_cvtps2pi */ |
| 14077 | case 1215: /* *mmx_maskmovq */ |
| 14078 | case 1214: /* *mmx_maskmovq */ |
| 14079 | case 1213: /* mmx_pmovmskb */ |
| 14080 | case 1212: /* mmx_psadbw */ |
| 14081 | case 1211: /* *mmx_uavgv4hi3 */ |
| 14082 | case 1210: /* *mmx_uavgv8qi3 */ |
| 14083 | case 1205: /* *vec_dupv2si */ |
| 14084 | case 1204: /* *vec_dupv4hi */ |
| 14085 | case 1203: /* mmx_pswapdv2si2 */ |
| 14086 | case 1202: /* mmx_pshufw_1 */ |
| 14087 | case 1201: /* mmx_pextrw */ |
| 14088 | case 1200: /* *mmx_pinsrw */ |
| 14089 | case 1199: /* mmx_punpckldq */ |
| 14090 | case 1198: /* mmx_punpckhdq */ |
| 14091 | case 1197: /* mmx_punpcklwd */ |
| 14092 | case 1196: /* mmx_punpckhwd */ |
| 14093 | case 1195: /* mmx_punpcklbw */ |
| 14094 | case 1194: /* mmx_punpckhbw */ |
| 14095 | case 1193: /* mmx_packuswb */ |
| 14096 | case 1192: /* mmx_packssdw */ |
| 14097 | case 1191: /* mmx_packsswb */ |
| 14098 | case 1190: /* *mmx_xorv2si3 */ |
| 14099 | case 1189: /* *mmx_iorv2si3 */ |
| 14100 | case 1188: /* *mmx_andv2si3 */ |
| 14101 | case 1187: /* *mmx_xorv4hi3 */ |
| 14102 | case 1186: /* *mmx_iorv4hi3 */ |
| 14103 | case 1185: /* *mmx_andv4hi3 */ |
| 14104 | case 1184: /* *mmx_xorv8qi3 */ |
| 14105 | case 1183: /* *mmx_iorv8qi3 */ |
| 14106 | case 1182: /* *mmx_andv8qi3 */ |
| 14107 | case 1181: /* mmx_andnotv2si3 */ |
| 14108 | case 1180: /* mmx_andnotv4hi3 */ |
| 14109 | case 1179: /* mmx_andnotv8qi3 */ |
| 14110 | case 1178: /* mmx_gtv2si3 */ |
| 14111 | case 1177: /* mmx_gtv4hi3 */ |
| 14112 | case 1176: /* mmx_gtv8qi3 */ |
| 14113 | case 1175: /* *mmx_eqv2si3 */ |
| 14114 | case 1174: /* *mmx_eqv4hi3 */ |
| 14115 | case 1173: /* *mmx_eqv8qi3 */ |
| 14116 | case 1172: /* mmx_lshrv1di3 */ |
| 14117 | case 1171: /* mmx_ashlv1di3 */ |
| 14118 | case 1170: /* mmx_lshrv2si3 */ |
| 14119 | case 1169: /* mmx_ashlv2si3 */ |
| 14120 | case 1168: /* mmx_lshrv4hi3 */ |
| 14121 | case 1167: /* mmx_ashlv4hi3 */ |
| 14122 | case 1166: /* mmx_ashrv2si3 */ |
| 14123 | case 1165: /* mmx_ashrv4hi3 */ |
| 14124 | case 1164: /* *mmx_uminv8qi3 */ |
| 14125 | case 1163: /* *mmx_umaxv8qi3 */ |
| 14126 | case 1162: /* *mmx_sminv4hi3 */ |
| 14127 | case 1161: /* *mmx_smaxv4hi3 */ |
| 14128 | case 1154: /* *mmx_ussubv4hi3 */ |
| 14129 | case 1153: /* *mmx_sssubv4hi3 */ |
| 14130 | case 1152: /* *mmx_usaddv4hi3 */ |
| 14131 | case 1151: /* *mmx_ssaddv4hi3 */ |
| 14132 | case 1150: /* *mmx_ussubv8qi3 */ |
| 14133 | case 1149: /* *mmx_sssubv8qi3 */ |
| 14134 | case 1148: /* *mmx_usaddv8qi3 */ |
| 14135 | case 1147: /* *mmx_ssaddv8qi3 */ |
| 14136 | case 1146: /* *mmx_subv1di3 */ |
| 14137 | case 1145: /* *mmx_addv1di3 */ |
| 14138 | case 1144: /* *mmx_subv2si3 */ |
| 14139 | case 1143: /* *mmx_addv2si3 */ |
| 14140 | case 1142: /* *mmx_subv4hi3 */ |
| 14141 | case 1141: /* *mmx_addv4hi3 */ |
| 14142 | case 1140: /* *mmx_subv8qi3 */ |
| 14143 | case 1139: /* *mmx_addv8qi3 */ |
| 14144 | case 1135: /* *vec_dupv2sf */ |
| 14145 | case 1134: /* mmx_pswapdv2sf2 */ |
| 14146 | case 1133: /* mmx_floatv2si2 */ |
| 14147 | case 1132: /* mmx_pi2fw */ |
| 14148 | case 1131: /* mmx_pf2iw */ |
| 14149 | case 1130: /* mmx_pf2id */ |
| 14150 | case 1129: /* mmx_gev2sf3 */ |
| 14151 | case 1128: /* mmx_gtv2sf3 */ |
| 14152 | case 1127: /* *mmx_eqv2sf3 */ |
| 14153 | case 1126: /* mmx_addsubv2sf3 */ |
| 14154 | case 1125: /* mmx_hsubv2sf3 */ |
| 14155 | case 1124: /* mmx_haddv2sf3 */ |
| 14156 | case 1123: /* mmx_rsqit1v2sf3 */ |
| 14157 | case 1122: /* mmx_rsqrtv2sf2 */ |
| 14158 | case 1121: /* mmx_rcpit2v2sf3 */ |
| 14159 | case 1120: /* mmx_rcpit1v2sf3 */ |
| 14160 | case 1119: /* mmx_rcpv2sf2 */ |
| 14161 | case 1118: /* mmx_ieee_minv2sf3 */ |
| 14162 | case 1117: /* mmx_ieee_maxv2sf3 */ |
| 14163 | case 1116: /* *mmx_sminv2sf3 */ |
| 14164 | case 1115: /* *mmx_smaxv2sf3 */ |
| 14165 | case 1113: /* *mmx_subv2sf3 */ |
| 14166 | case 1112: /* *mmx_addv2sf3 */ |
| 14167 | if (get_attr_memory (insn) == MEMORY_LOAD) |
| 14168 | { |
| 14169 | return 3; |
| 14170 | } |
| 14171 | else |
| 14172 | { |
| 14173 | return 2; |
| 14174 | } |
| 14175 | |
| 14176 | case 3890: /* ptesttf2 */ |
| 14177 | case 3889: /* avx_ptestv4df */ |
| 14178 | case 3888: /* avx_ptestv8sf */ |
| 14179 | case 3887: /* avx_ptestv4di */ |
| 14180 | case 3886: /* avx_ptestv8si */ |
| 14181 | case 3885: /* avx_ptestv16hi */ |
| 14182 | case 3884: /* avx_ptestv32qi */ |
| 14183 | case 3883: /* sse4_1_ptestv2df */ |
| 14184 | case 3882: /* sse4_1_ptestv4sf */ |
| 14185 | case 3881: /* sse4_1_ptestv2di */ |
| 14186 | case 3880: /* sse4_1_ptestv4si */ |
| 14187 | case 3879: /* sse4_1_ptestv8hi */ |
| 14188 | case 3878: /* sse4_1_ptestv16qi */ |
| 14189 | case 3877: /* avx_vtestpd */ |
| 14190 | case 3876: /* avx_vtestpd256 */ |
| 14191 | case 3875: /* avx_vtestps */ |
| 14192 | case 3874: /* avx_vtestps256 */ |
| 14193 | case 1740: /* sse2_ucomi_round */ |
| 14194 | case 1739: /* sse2_ucomi */ |
| 14195 | case 1738: /* sse_ucomi_round */ |
| 14196 | case 1737: /* sse_ucomi */ |
| 14197 | case 1736: /* sse2_comi_round */ |
| 14198 | case 1735: /* sse2_comi */ |
| 14199 | case 1734: /* sse_comi_round */ |
| 14200 | case 1733: /* sse_comi */ |
| 14201 | case 1446: /* sse2_vmmulv2df3_round */ |
| 14202 | case 1445: /* sse2_vmmulv2df3 */ |
| 14203 | case 1442: /* sse_vmmulv4sf3_round */ |
| 14204 | case 1441: /* sse_vmmulv4sf3 */ |
| 14205 | case 1416: /* sse2_vmsubv2df3_round */ |
| 14206 | case 1415: /* sse2_vmsubv2df3 */ |
| 14207 | case 1414: /* sse2_vmaddv2df3_round */ |
| 14208 | case 1413: /* sse2_vmaddv2df3 */ |
| 14209 | case 1412: /* sse_vmsubv4sf3_round */ |
| 14210 | case 1411: /* sse_vmsubv4sf3 */ |
| 14211 | case 1410: /* sse_vmaddv4sf3_round */ |
| 14212 | case 1409: /* sse_vmaddv4sf3 */ |
| 14213 | case 992: /* *ieee_smindf3 */ |
| 14214 | case 991: /* *ieee_smaxdf3 */ |
| 14215 | case 990: /* *ieee_sminsf3 */ |
| 14216 | case 989: /* *ieee_smaxsf3 */ |
| 14217 | case 988: /* smindf3 */ |
| 14218 | case 987: /* smaxdf3 */ |
| 14219 | case 986: /* sminsf3 */ |
| 14220 | case 985: /* smaxsf3 */ |
| 14221 | if (get_attr_memory (insn) == MEMORY_LOAD) |
| 14222 | { |
| 14223 | return 6; |
| 14224 | } |
| 14225 | else |
| 14226 | { |
| 14227 | return 4; |
| 14228 | } |
| 14229 | |
| 14230 | case 980: /* *movxfcc_1 */ |
| 14231 | return 15 /* 0xf */; |
| 14232 | |
| 14233 | case 1050: /* fldenv */ |
| 14234 | case 1048: /* xrstors64 */ |
| 14235 | case 1047: /* xrstor64 */ |
| 14236 | case 1046: /* xrstors_rex64 */ |
| 14237 | case 1045: /* xrstor_rex64 */ |
| 14238 | case 1044: /* xrstors */ |
| 14239 | case 1043: /* xrstor */ |
| 14240 | case 1030: /* fxrstor64 */ |
| 14241 | case 1029: /* fxrstor */ |
| 14242 | case 962: /* *rep_stosqi */ |
| 14243 | case 961: /* *rep_stosqi */ |
| 14244 | case 960: /* *rep_stossi */ |
| 14245 | case 959: /* *rep_stossi */ |
| 14246 | case 958: /* *rep_stosdi_rex64 */ |
| 14247 | case 957: /* *rep_stosdi_rex64 */ |
| 14248 | case 956: /* *strsetqi_1 */ |
| 14249 | case 955: /* *strsetqi_1 */ |
| 14250 | case 954: /* *strsethi_1 */ |
| 14251 | case 953: /* *strsethi_1 */ |
| 14252 | case 952: /* *strsetsi_1 */ |
| 14253 | case 951: /* *strsetsi_1 */ |
| 14254 | case 950: /* *strsetdi_rex_1 */ |
| 14255 | case 949: /* *strsetdi_rex_1 */ |
| 14256 | case 948: /* *rep_movqi */ |
| 14257 | case 947: /* *rep_movqi */ |
| 14258 | case 946: /* *rep_movsi */ |
| 14259 | case 945: /* *rep_movsi */ |
| 14260 | case 944: /* *rep_movdi_rex64 */ |
| 14261 | case 943: /* *rep_movdi_rex64 */ |
| 14262 | case 942: /* *strmovqi_1 */ |
| 14263 | case 941: /* *strmovqi_1 */ |
| 14264 | case 940: /* *strmovhi_1 */ |
| 14265 | case 939: /* *strmovhi_1 */ |
| 14266 | case 938: /* *strmovsi_1 */ |
| 14267 | case 937: /* *strmovsi_1 */ |
| 14268 | case 936: /* *strmovdi_rex_1 */ |
| 14269 | case 935: /* *strmovdi_rex_1 */ |
| 14270 | return 6; |
| 14271 | |
| 14272 | case 889: /* fistsi2_with_temp */ |
| 14273 | case 888: /* fisthi2_with_temp */ |
| 14274 | case 887: /* fistsi2 */ |
| 14275 | case 886: /* fisthi2 */ |
| 14276 | case 885: /* *fistsi2_1 */ |
| 14277 | case 884: /* *fisthi2_1 */ |
| 14278 | case 883: /* fistdi2_with_temp */ |
| 14279 | case 882: /* fistdi2 */ |
| 14280 | case 881: /* *fistdi2_1 */ |
| 14281 | case 880: /* rintdf2_frndint */ |
| 14282 | case 879: /* rintsf2_frndint */ |
| 14283 | case 878: /* rintxf2 */ |
| 14284 | case 875: /* fscalexf4_i387 */ |
| 14285 | case 874: /* *f2xm1xf2_i387 */ |
| 14286 | case 873: /* fxtract_extenddfxf3_i387 */ |
| 14287 | case 872: /* fxtract_extendsfxf3_i387 */ |
| 14288 | case 871: /* fxtractxf3_i387 */ |
| 14289 | case 870: /* fyl2xp1_extenddfxf3_i387 */ |
| 14290 | case 869: /* fyl2xp1_extendsfxf3_i387 */ |
| 14291 | case 868: /* fyl2xp1xf3_i387 */ |
| 14292 | case 867: /* fyl2x_extenddfxf3_i387 */ |
| 14293 | case 866: /* fyl2x_extendsfxf3_i387 */ |
| 14294 | case 865: /* fyl2xxf3_i387 */ |
| 14295 | case 864: /* fpatan_extenddfxf3_i387 */ |
| 14296 | case 863: /* fpatan_extendsfxf3_i387 */ |
| 14297 | case 862: /* *fpatanxf3_i387 */ |
| 14298 | case 861: /* fptan_extenddfxf4_i387 */ |
| 14299 | case 860: /* fptan_extendsfxf4_i387 */ |
| 14300 | case 859: /* fptanxf4_i387 */ |
| 14301 | case 858: /* sincos_extenddfxf3_i387 */ |
| 14302 | case 857: /* sincos_extendsfxf3_i387 */ |
| 14303 | case 856: /* sincosxf3 */ |
| 14304 | case 855: /* *cos_extenddfxf2_i387 */ |
| 14305 | case 854: /* *sin_extenddfxf2_i387 */ |
| 14306 | case 853: /* *cos_extendsfxf2_i387 */ |
| 14307 | case 852: /* *sin_extendsfxf2_i387 */ |
| 14308 | case 851: /* *cosxf2_i387 */ |
| 14309 | case 850: /* *sinxf2_i387 */ |
| 14310 | case 849: /* fprem1xf4_i387 */ |
| 14311 | case 848: /* fpremxf4_i387 */ |
| 14312 | case 844: /* sqrt_extenddfxf2_i387 */ |
| 14313 | case 843: /* sqrt_extendsfxf2_i387 */ |
| 14314 | case 842: /* sqrtxf2 */ |
| 14315 | return 100 /* 0x64 */; |
| 14316 | |
| 14317 | case 4043: /* xop_pcom_tfv2di3 */ |
| 14318 | case 4042: /* xop_pcom_tfv4si3 */ |
| 14319 | case 4041: /* xop_pcom_tfv8hi3 */ |
| 14320 | case 4040: /* xop_pcom_tfv16qi3 */ |
| 14321 | case 4039: /* xop_maskcmp_uns2v2di3 */ |
| 14322 | case 4038: /* xop_maskcmp_uns2v4si3 */ |
| 14323 | case 4037: /* xop_maskcmp_uns2v8hi3 */ |
| 14324 | case 4036: /* xop_maskcmp_uns2v16qi3 */ |
| 14325 | case 4035: /* xop_maskcmp_unsv2di3 */ |
| 14326 | case 4034: /* xop_maskcmp_unsv4si3 */ |
| 14327 | case 4033: /* xop_maskcmp_unsv8hi3 */ |
| 14328 | case 4032: /* xop_maskcmp_unsv16qi3 */ |
| 14329 | case 3383: /* sse2_gtv4si3 */ |
| 14330 | case 3382: /* sse2_gtv8hi3 */ |
| 14331 | case 3381: /* sse2_gtv16qi3 */ |
| 14332 | case 3380: /* avx512vl_gtv8hi3_mask */ |
| 14333 | case 3379: /* avx512vl_gtv8hi3 */ |
| 14334 | case 3372: /* avx512vl_gtv16qi3_mask */ |
| 14335 | case 3371: /* avx512vl_gtv16qi3 */ |
| 14336 | case 3368: /* avx512vl_gtv2di3_mask */ |
| 14337 | case 3367: /* avx512vl_gtv2di3 */ |
| 14338 | case 3362: /* avx512vl_gtv4si3_mask */ |
| 14339 | case 3361: /* avx512vl_gtv4si3 */ |
| 14340 | case 3352: /* sse4_2_gtv2di3 */ |
| 14341 | case 3351: /* *sse2_eqv4si3 */ |
| 14342 | case 3350: /* *sse2_eqv8hi3 */ |
| 14343 | case 3349: /* *sse2_eqv16qi3 */ |
| 14344 | case 3348: /* *sse4_1_eqv2di3 */ |
| 14345 | case 3347: /* avx512vl_eqv2di3_mask_1 */ |
| 14346 | case 3346: /* avx512vl_eqv2di3_1 */ |
| 14347 | case 3341: /* avx512vl_eqv4si3_mask_1 */ |
| 14348 | case 3340: /* avx512vl_eqv4si3_1 */ |
| 14349 | case 3335: /* avx512vl_eqv8hi3_mask_1 */ |
| 14350 | case 3334: /* avx512vl_eqv8hi3_1 */ |
| 14351 | case 3327: /* avx512vl_eqv16qi3_mask_1 */ |
| 14352 | case 3326: /* avx512vl_eqv16qi3_1 */ |
| 14353 | case 2375: /* *sse2_vd_cvtss2sd */ |
| 14354 | case 2374: /* sse2_cvtss2sd_round */ |
| 14355 | case 2373: /* sse2_cvtss2sd */ |
| 14356 | case 1726: /* avx512f_vmcmpv2df3_mask_round */ |
| 14357 | case 1725: /* avx512f_vmcmpv2df3_mask */ |
| 14358 | case 1724: /* avx512f_vmcmpv4sf3_mask_round */ |
| 14359 | case 1723: /* avx512f_vmcmpv4sf3_mask */ |
| 14360 | case 1722: /* avx512f_vmcmpv2df3_round */ |
| 14361 | case 1721: /* avx512f_vmcmpv2df3 */ |
| 14362 | case 1720: /* avx512f_vmcmpv4sf3_round */ |
| 14363 | case 1719: /* avx512f_vmcmpv4sf3 */ |
| 14364 | case 1718: /* avx512vl_ucmpv2di3_mask */ |
| 14365 | case 1717: /* avx512vl_ucmpv2di3 */ |
| 14366 | case 1712: /* avx512vl_ucmpv4si3_mask */ |
| 14367 | case 1711: /* avx512vl_ucmpv4si3 */ |
| 14368 | case 1706: /* avx512vl_ucmpv8hi3_mask */ |
| 14369 | case 1705: /* avx512vl_ucmpv8hi3 */ |
| 14370 | case 1698: /* avx512vl_ucmpv16qi3_mask */ |
| 14371 | case 1697: /* avx512vl_ucmpv16qi3 */ |
| 14372 | case 1694: /* avx512vl_cmpv8hi3_mask */ |
| 14373 | case 1693: /* avx512vl_cmpv8hi3 */ |
| 14374 | case 1686: /* avx512vl_cmpv16qi3_mask */ |
| 14375 | case 1685: /* avx512vl_cmpv16qi3 */ |
| 14376 | case 1666: /* avx512vl_cmpv2di3_mask */ |
| 14377 | case 1665: /* avx512vl_cmpv2di3 */ |
| 14378 | case 1658: /* avx512vl_cmpv4si3_mask */ |
| 14379 | case 1657: /* avx512vl_cmpv4si3 */ |
| 14380 | case 1650: /* sse2_vmmaskcmpv2df3 */ |
| 14381 | case 1649: /* sse_vmmaskcmpv4sf3 */ |
| 14382 | case 1640: /* avx_vmcmpv2df3 */ |
| 14383 | case 1639: /* avx_vmcmpv4sf3 */ |
| 14384 | case 877: /* sse4_1_rounddf2 */ |
| 14385 | case 626: /* setcc_df_sse */ |
| 14386 | case 625: /* setcc_sf_sse */ |
| 14387 | if (get_attr_memory (insn) == MEMORY_LOAD) |
| 14388 | { |
| 14389 | return 4; |
| 14390 | } |
| 14391 | else |
| 14392 | { |
| 14393 | return 2; |
| 14394 | } |
| 14395 | |
| 14396 | case 624: /* *setcc_qi_slp */ |
| 14397 | case 623: /* *setcc_qi */ |
| 14398 | if (((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) || (cached_memory == MEMORY_STORE)) |
| 14399 | { |
| 14400 | return 1; |
| 14401 | } |
| 14402 | else |
| 14403 | { |
| 14404 | return 0; |
| 14405 | } |
| 14406 | |
| 14407 | case 163: /* *truncxfdf2_mixed */ |
| 14408 | case 162: /* *truncxfsf2_mixed */ |
| 14409 | case 160: /* *truncdfsf_i387 */ |
| 14410 | case 159: /* *truncdfsf_mixed */ |
| 14411 | case 157: /* *truncdfsf_fast_mixed */ |
| 14412 | extract_constrain_insn_cached (insn); |
| 14413 | if (which_alternative == 0) |
| 14414 | { |
| 14415 | return 2; |
| 14416 | } |
| 14417 | else |
| 14418 | { |
| 14419 | return 0; |
| 14420 | } |
| 14421 | |
| 14422 | case 121: /* *pushdf */ |
| 14423 | extract_constrain_insn_cached (insn); |
| 14424 | if (((1 << which_alternative) & 0x1e)) |
| 14425 | { |
| 14426 | return 2; |
| 14427 | } |
| 14428 | else |
| 14429 | { |
| 14430 | return 0; |
| 14431 | } |
| 14432 | |
| 14433 | case 120: /* *pushxf */ |
| 14434 | case 119: /* *pushxf_rounded */ |
| 14435 | case 118: /* *pushxf_rounded */ |
| 14436 | case 117: /* *pushtf */ |
| 14437 | extract_constrain_insn_cached (insn); |
| 14438 | if (which_alternative != 0) |
| 14439 | { |
| 14440 | return 2; |
| 14441 | } |
| 14442 | else |
| 14443 | { |
| 14444 | return 0; |
| 14445 | } |
| 14446 | |
| 14447 | case 4869: /* sha256rnds2 */ |
| 14448 | case 4868: /* sha256msg2 */ |
| 14449 | case 4867: /* sha256msg1 */ |
| 14450 | case 4866: /* sha1rnds4 */ |
| 14451 | case 4865: /* sha1nexte */ |
| 14452 | case 4864: /* sha1msg2 */ |
| 14453 | case 4863: /* sha1msg1 */ |
| 14454 | case 4838: /* avx512bw_dbpsadbwv32hi_mask */ |
| 14455 | case 4837: /* *avx512bw_dbpsadbwv32hi */ |
| 14456 | case 4836: /* avx512bw_dbpsadbwv16hi_mask */ |
| 14457 | case 4835: /* *avx512bw_dbpsadbwv16hi */ |
| 14458 | case 4834: /* avx512bw_dbpsadbwv8hi_mask */ |
| 14459 | case 4833: /* *avx512bw_dbpsadbwv8hi */ |
| 14460 | case 4432: /* avx2_maskstoreq256 */ |
| 14461 | case 4431: /* avx2_maskstored256 */ |
| 14462 | case 4430: /* avx2_maskstoreq */ |
| 14463 | case 4429: /* avx2_maskstored */ |
| 14464 | case 4428: /* avx_maskstorepd256 */ |
| 14465 | case 4427: /* avx_maskstoreps256 */ |
| 14466 | case 4426: /* avx_maskstorepd */ |
| 14467 | case 4425: /* avx_maskstoreps */ |
| 14468 | case 4424: /* avx2_maskloadq256 */ |
| 14469 | case 4423: /* avx2_maskloadd256 */ |
| 14470 | case 4422: /* avx2_maskloadq */ |
| 14471 | case 4421: /* avx2_maskloadd */ |
| 14472 | case 4420: /* avx_maskloadpd256 */ |
| 14473 | case 4419: /* avx_maskloadps256 */ |
| 14474 | case 4418: /* avx_maskloadpd */ |
| 14475 | case 4417: /* avx_maskloadps */ |
| 14476 | case 4110: /* avx2_vec_dupv4df */ |
| 14477 | case 4054: /* pclmulqdq */ |
| 14478 | case 4053: /* aeskeygenassist */ |
| 14479 | case 4052: /* aesimc */ |
| 14480 | case 4051: /* aesdeclast */ |
| 14481 | case 4050: /* aesdec */ |
| 14482 | case 4049: /* aesenclast */ |
| 14483 | case 4048: /* aesenc */ |
| 14484 | case 3801: /* sse4_1_phminposuw */ |
| 14485 | case 3788: /* sse4_1_mpsadbw */ |
| 14486 | case 3787: /* avx2_mpsadbw */ |
| 14487 | case 3763: /* absv2si2 */ |
| 14488 | case 3762: /* absv4hi2 */ |
| 14489 | case 3761: /* absv8qi2 */ |
| 14490 | case 3760: /* absv8hi2_mask */ |
| 14491 | case 3759: /* absv16hi2_mask */ |
| 14492 | case 3758: /* absv32hi2_mask */ |
| 14493 | case 3757: /* absv32qi2_mask */ |
| 14494 | case 3756: /* absv16qi2_mask */ |
| 14495 | case 3755: /* absv64qi2_mask */ |
| 14496 | case 3754: /* absv2di2_mask */ |
| 14497 | case 3753: /* absv4di2_mask */ |
| 14498 | case 3752: /* absv8di2_mask */ |
| 14499 | case 3751: /* absv4si2_mask */ |
| 14500 | case 3750: /* absv8si2_mask */ |
| 14501 | case 3749: /* absv16si2_mask */ |
| 14502 | case 3748: /* *absv2di2 */ |
| 14503 | case 3747: /* *absv4di2 */ |
| 14504 | case 3746: /* *absv8di2 */ |
| 14505 | case 3745: /* *absv4si2 */ |
| 14506 | case 3744: /* *absv8si2 */ |
| 14507 | case 3743: /* *absv16si2 */ |
| 14508 | case 3742: /* *absv8hi2 */ |
| 14509 | case 3741: /* *absv16hi2 */ |
| 14510 | case 3740: /* *absv32hi2 */ |
| 14511 | case 3739: /* *absv16qi2 */ |
| 14512 | case 3738: /* *absv32qi2 */ |
| 14513 | case 3737: /* *absv64qi2 */ |
| 14514 | case 3729: /* ssse3_psignv2si3 */ |
| 14515 | case 3728: /* ssse3_psignv4hi3 */ |
| 14516 | case 3727: /* ssse3_psignv8qi3 */ |
| 14517 | case 3726: /* ssse3_psignv4si3 */ |
| 14518 | case 3725: /* avx2_psignv8si3 */ |
| 14519 | case 3724: /* ssse3_psignv8hi3 */ |
| 14520 | case 3723: /* avx2_psignv16hi3 */ |
| 14521 | case 3722: /* ssse3_psignv16qi3 */ |
| 14522 | case 3721: /* avx2_psignv32qi3 */ |
| 14523 | case 3720: /* ssse3_pshufbv8qi3 */ |
| 14524 | case 3719: /* ssse3_pshufbv16qi3_mask */ |
| 14525 | case 3718: /* ssse3_pshufbv16qi3 */ |
| 14526 | case 3717: /* avx2_pshufbv32qi3_mask */ |
| 14527 | case 3716: /* avx2_pshufbv32qi3 */ |
| 14528 | case 3715: /* avx512bw_pshufbv64qi3_mask */ |
| 14529 | case 3714: /* avx512bw_pshufbv64qi3 */ |
| 14530 | case 3635: /* *vec_extractv4si_zext */ |
| 14531 | case 3626: /* *vec_extractv8hi_zext */ |
| 14532 | case 3625: /* *vec_extractv8hi_zext */ |
| 14533 | case 3624: /* *vec_extractv16qi_zext */ |
| 14534 | case 3623: /* *vec_extractv16qi_zext */ |
| 14535 | case 3622: /* *vec_extractv8hi */ |
| 14536 | case 3621: /* *vec_extractv16qi */ |
| 14537 | case 3607: /* sse2_pshufd_1_mask */ |
| 14538 | case 3606: /* sse2_pshufd_1 */ |
| 14539 | case 3605: /* avx2_pshufd_1_mask */ |
| 14540 | case 3604: /* avx2_pshufd_1 */ |
| 14541 | case 3603: /* avx512f_pshufd_1_mask */ |
| 14542 | case 3602: /* avx512f_pshufd_1 */ |
| 14543 | case 2734: /* vec_dupv2df_mask */ |
| 14544 | case 2733: /* vec_dupv2df */ |
| 14545 | case 2530: /* vec_extract_hi_v32qi */ |
| 14546 | case 2528: /* vec_extract_hi_v64qi */ |
| 14547 | case 2526: /* vec_extract_hi_v16hi */ |
| 14548 | case 2524: /* vec_extract_hi_v32hi */ |
| 14549 | case 2522: /* vec_extract_hi_v8sf */ |
| 14550 | case 2521: /* vec_extract_hi_v8si */ |
| 14551 | case 2520: /* vec_extract_hi_v8sf_mask */ |
| 14552 | case 2519: /* vec_extract_hi_v8si_mask */ |
| 14553 | case 2518: /* vec_extract_hi_v8sf_maskm */ |
| 14554 | case 2517: /* vec_extract_hi_v8si_maskm */ |
| 14555 | case 2516: /* vec_extract_lo_v8sf_maskm */ |
| 14556 | case 2515: /* vec_extract_lo_v8si_maskm */ |
| 14557 | case 2514: /* vec_extract_lo_v8sf_mask */ |
| 14558 | case 2513: /* vec_extract_lo_v8sf */ |
| 14559 | case 2512: /* vec_extract_lo_v8si_mask */ |
| 14560 | case 2511: /* vec_extract_lo_v8si */ |
| 14561 | case 2510: /* vec_extract_hi_v4df_mask */ |
| 14562 | case 2509: /* vec_extract_hi_v4df */ |
| 14563 | case 2508: /* vec_extract_hi_v4di_mask */ |
| 14564 | case 2507: /* vec_extract_hi_v4di */ |
| 14565 | case 2506: /* vec_extract_lo_v4df_mask */ |
| 14566 | case 2505: /* vec_extract_lo_v4df */ |
| 14567 | case 2504: /* vec_extract_lo_v4di_mask */ |
| 14568 | case 2503: /* vec_extract_lo_v4di */ |
| 14569 | case 2498: /* vec_extract_hi_v16si_mask */ |
| 14570 | case 2497: /* vec_extract_hi_v16si */ |
| 14571 | case 2496: /* vec_extract_hi_v16sf_mask */ |
| 14572 | case 2495: /* vec_extract_hi_v16sf */ |
| 14573 | case 2494: /* vec_extract_hi_v16si_maskm */ |
| 14574 | case 2493: /* vec_extract_hi_v16sf_maskm */ |
| 14575 | case 2492: /* vec_extract_hi_v8di_mask */ |
| 14576 | case 2491: /* vec_extract_hi_v8di */ |
| 14577 | case 2490: /* vec_extract_hi_v8df_mask */ |
| 14578 | case 2489: /* vec_extract_hi_v8df */ |
| 14579 | case 2488: /* vec_extract_hi_v8di_maskm */ |
| 14580 | case 2487: /* vec_extract_hi_v8df_maskm */ |
| 14581 | case 2486: /* vec_extract_lo_v8di_mask */ |
| 14582 | case 2485: /* vec_extract_lo_v8di */ |
| 14583 | case 2484: /* vec_extract_lo_v8df_mask */ |
| 14584 | case 2483: /* vec_extract_lo_v8df */ |
| 14585 | case 2482: /* vec_extract_lo_v8di_maskm */ |
| 14586 | case 2481: /* vec_extract_lo_v8df_maskm */ |
| 14587 | case 2480: /* avx512f_vextracti32x4_1_mask */ |
| 14588 | case 2479: /* *avx512f_vextracti32x4_1 */ |
| 14589 | case 2478: /* avx512f_vextractf32x4_1_mask */ |
| 14590 | case 2477: /* *avx512f_vextractf32x4_1 */ |
| 14591 | case 2476: /* avx512dq_vextracti64x2_1_mask */ |
| 14592 | case 2475: /* *avx512dq_vextracti64x2_1 */ |
| 14593 | case 2474: /* avx512dq_vextractf64x2_1_mask */ |
| 14594 | case 2473: /* *avx512dq_vextractf64x2_1 */ |
| 14595 | case 2472: /* avx512f_vextracti32x4_1_maskm */ |
| 14596 | case 2471: /* avx512f_vextractf32x4_1_maskm */ |
| 14597 | case 2470: /* avx512dq_vextracti64x2_1_maskm */ |
| 14598 | case 2469: /* avx512dq_vextractf64x2_1_maskm */ |
| 14599 | case 2458: /* avx512f_vec_dupv8df_1 */ |
| 14600 | case 2457: /* avx512f_vec_dupv16sf_1 */ |
| 14601 | case 2456: /* avx2_vec_dupv8sf_1 */ |
| 14602 | case 2455: /* avx2_vec_dupv4sf */ |
| 14603 | case 2454: /* avx2_vec_dupv8sf */ |
| 14604 | case 1020: /* sse4_2_crc32di */ |
| 14605 | case 1019: /* sse4_2_crc32si */ |
| 14606 | case 1018: /* sse4_2_crc32hi */ |
| 14607 | case 1017: /* sse4_2_crc32qi */ |
| 14608 | case 801: /* *load_tp_di */ |
| 14609 | case 800: /* *load_tp_si */ |
| 14610 | case 799: /* *load_tp_x32_zext */ |
| 14611 | case 798: /* *load_tp_x32 */ |
| 14612 | case 704: /* leave_rex64 */ |
| 14613 | case 703: /* leave */ |
| 14614 | case 92: /* *movabsdi_2 */ |
| 14615 | case 91: /* *movabssi_2 */ |
| 14616 | case 90: /* *movabshi_2 */ |
| 14617 | case 89: /* *movabsqi_2 */ |
| 14618 | return 3; |
| 14619 | |
| 14620 | case 1100: /* *bnd64_stx */ |
| 14621 | case 1099: /* *bnd32_stx */ |
| 14622 | case 1096: /* *bnd64_cn */ |
| 14623 | case 1095: /* *bnd64_cu */ |
| 14624 | case 1094: /* *bnd64_cl */ |
| 14625 | case 1093: /* *bnd32_cn */ |
| 14626 | case 1092: /* *bnd32_cu */ |
| 14627 | case 1091: /* *bnd32_cl */ |
| 14628 | case 1088: /* *bnd64_mk */ |
| 14629 | case 1087: /* *bnd32_mk */ |
| 14630 | case 1060: /* *lwp_lwpinsdi3_1 */ |
| 14631 | case 1059: /* *lwp_lwpinssi3_1 */ |
| 14632 | case 1058: /* *lwp_lwpvaldi3_1 */ |
| 14633 | case 1057: /* *lwp_lwpvalsi3_1 */ |
| 14634 | case 1056: /* lwp_slwpcbdi */ |
| 14635 | case 1055: /* lwp_slwpcbsi */ |
| 14636 | case 1054: /* *lwp_llwpcbdi1 */ |
| 14637 | case 1053: /* *lwp_llwpcbsi1 */ |
| 14638 | case 974: /* *x86_movdicc_0_m1_neg */ |
| 14639 | case 973: /* *x86_movsicc_0_m1_neg */ |
| 14640 | case 972: /* *x86_movdicc_0_m1_se */ |
| 14641 | case 971: /* *x86_movsicc_0_m1_se */ |
| 14642 | case 970: /* *x86_movdicc_0_m1 */ |
| 14643 | case 969: /* *x86_movsicc_0_m1 */ |
| 14644 | case 88: /* *movabsdi_1 */ |
| 14645 | case 87: /* *movabssi_1 */ |
| 14646 | case 86: /* *movabshi_1 */ |
| 14647 | case 85: /* *movabsqi_1 */ |
| 14648 | return 1; |
| 14649 | |
| 14650 | case 4501: /* avx_vec_concatv8df */ |
| 14651 | case 4500: /* avx_vec_concatv16sf */ |
| 14652 | case 4499: /* avx_vec_concatv8di */ |
| 14653 | case 4498: /* avx_vec_concatv16si */ |
| 14654 | case 4497: /* avx_vec_concatv32hi */ |
| 14655 | case 4496: /* avx_vec_concatv64qi */ |
| 14656 | case 4495: /* avx_vec_concatv4df */ |
| 14657 | case 4494: /* avx_vec_concatv8sf */ |
| 14658 | case 4493: /* avx_vec_concatv4di */ |
| 14659 | case 4492: /* avx_vec_concatv8si */ |
| 14660 | case 4491: /* avx_vec_concatv16hi */ |
| 14661 | case 4490: /* avx_vec_concatv32qi */ |
| 14662 | case 2452: /* sse_loadlps */ |
| 14663 | case 79: /* *movoi_internal_avx */ |
| 14664 | case 78: /* *movxi_internal_avx512f */ |
| 14665 | extract_constrain_insn_cached (insn); |
| 14666 | if (!((1 << which_alternative) & 0x3)) |
| 14667 | { |
| 14668 | return 2; |
| 14669 | } |
| 14670 | else if (get_attr_memory (insn) == MEMORY_LOAD) |
| 14671 | { |
| 14672 | return 5; |
| 14673 | } |
| 14674 | else |
| 14675 | { |
| 14676 | return 3; |
| 14677 | } |
| 14678 | |
| 14679 | case 1000: /* probe_stack_di */ |
| 14680 | case 999: /* probe_stack_si */ |
| 14681 | case 732: /* tzcnt_hi */ |
| 14682 | case 730: /* *tzcnt_di_falsedep */ |
| 14683 | case 728: /* *tzcnt_si_falsedep */ |
| 14684 | case 726: /* tzcnt_di */ |
| 14685 | case 724: /* tzcnt_si */ |
| 14686 | case 719: /* *bsrhi */ |
| 14687 | case 718: /* bsr */ |
| 14688 | case 717: /* bsr_rex64 */ |
| 14689 | case 716: /* *ctzdi2_falsedep */ |
| 14690 | case 715: /* *ctzsi2_falsedep */ |
| 14691 | case 714: /* ctzdi2 */ |
| 14692 | case 713: /* ctzsi2 */ |
| 14693 | case 712: /* *bsfdi_1 */ |
| 14694 | case 711: /* *bsfsi_1 */ |
| 14695 | case 710: /* *tzcntdi_1_falsedep */ |
| 14696 | case 709: /* *tzcntsi_1_falsedep */ |
| 14697 | case 708: /* *tzcntdi_1 */ |
| 14698 | case 707: /* *tzcntsi_1 */ |
| 14699 | case 613: /* *btdi */ |
| 14700 | case 612: /* *btsi */ |
| 14701 | case 611: /* *btcq */ |
| 14702 | case 610: /* *btrq */ |
| 14703 | case 609: /* *btsq */ |
| 14704 | case 608: /* *rotrqi3_1_slp */ |
| 14705 | case 607: /* *rotlqi3_1_slp */ |
| 14706 | case 567: /* *ashrqi3_1_slp */ |
| 14707 | case 566: /* *lshrqi3_1_slp */ |
| 14708 | case 512: /* *one_cmplsi2_2_zext */ |
| 14709 | case 511: /* *one_cmpldi2_2 */ |
| 14710 | case 510: /* *one_cmplsi2_2 */ |
| 14711 | case 509: /* *one_cmplhi2_2 */ |
| 14712 | case 508: /* *one_cmplqi2_2 */ |
| 14713 | case 507: /* *one_cmplqi2_1 */ |
| 14714 | case 506: /* *one_cmplsi2_1_zext */ |
| 14715 | case 505: /* *one_cmpldi2_1 */ |
| 14716 | case 504: /* *one_cmplsi2_1 */ |
| 14717 | case 503: /* *one_cmplhi2_1 */ |
| 14718 | case 479: /* *negvdi3 */ |
| 14719 | case 478: /* *negvsi3 */ |
| 14720 | case 477: /* *negvhi3 */ |
| 14721 | case 476: /* *negvqi3 */ |
| 14722 | case 475: /* *negsi2_cmpz_zext */ |
| 14723 | case 474: /* *negdi2_cmpz */ |
| 14724 | case 473: /* *negsi2_cmpz */ |
| 14725 | case 472: /* *neghi2_cmpz */ |
| 14726 | case 471: /* *negqi2_cmpz */ |
| 14727 | case 470: /* *negsi2_1_zext */ |
| 14728 | case 469: /* *negdi2_1 */ |
| 14729 | case 468: /* *negsi2_1 */ |
| 14730 | case 467: /* *neghi2_1 */ |
| 14731 | case 466: /* *negqi2_1 */ |
| 14732 | case 450: /* *xorqi_2_slp */ |
| 14733 | case 449: /* *iorqi_2_slp */ |
| 14734 | case 436: /* *xorqi_1_slp */ |
| 14735 | case 435: /* *iorqi_1_slp */ |
| 14736 | case 410: /* *andqi_2_slp */ |
| 14737 | case 403: /* *andqi_1_slp */ |
| 14738 | case 276: /* *subqi_1_slp */ |
| 14739 | case 138: /* zero_extendqihi2_and */ |
| 14740 | case 135: /* zero_extendhisi2_and */ |
| 14741 | case 134: /* zero_extendqisi2_and */ |
| 14742 | case 100: /* *movstricthi_xor */ |
| 14743 | case 99: /* *movstrictqi_xor */ |
| 14744 | case 77: /* *movdi_or */ |
| 14745 | case 76: /* *movsi_or */ |
| 14746 | case 75: /* *movdi_xor */ |
| 14747 | case 74: /* *movsi_xor */ |
| 14748 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) |
| 14749 | { |
| 14750 | return 1; |
| 14751 | } |
| 14752 | else if (cached_memory == MEMORY_BOTH) |
| 14753 | { |
| 14754 | return 4; |
| 14755 | } |
| 14756 | else if (cached_memory == MEMORY_STORE) |
| 14757 | { |
| 14758 | return 1; |
| 14759 | } |
| 14760 | else |
| 14761 | { |
| 14762 | return 0; |
| 14763 | } |
| 14764 | |
| 14765 | case 1098: /* *bnd64_ldx */ |
| 14766 | case 1097: /* *bnd32_ldx */ |
| 14767 | case 927: /* fistsi2_ceil_with_temp */ |
| 14768 | case 926: /* fistsi2_floor_with_temp */ |
| 14769 | case 925: /* fisthi2_ceil_with_temp */ |
| 14770 | case 924: /* fisthi2_floor_with_temp */ |
| 14771 | case 923: /* fistsi2_ceil */ |
| 14772 | case 922: /* fistsi2_floor */ |
| 14773 | case 921: /* fisthi2_ceil */ |
| 14774 | case 920: /* fisthi2_floor */ |
| 14775 | case 919: /* fistdi2_ceil_with_temp */ |
| 14776 | case 918: /* fistdi2_floor_with_temp */ |
| 14777 | case 917: /* fistdi2_ceil */ |
| 14778 | case 916: /* fistdi2_floor */ |
| 14779 | case 915: /* *fistdi2_ceil_1 */ |
| 14780 | case 914: /* *fistdi2_floor_1 */ |
| 14781 | case 913: /* *fistsi2_ceil_1 */ |
| 14782 | case 912: /* *fistsi2_floor_1 */ |
| 14783 | case 911: /* *fisthi2_ceil_1 */ |
| 14784 | case 910: /* *fisthi2_floor_1 */ |
| 14785 | case 805: /* *add_tp_di */ |
| 14786 | case 804: /* *add_tp_si */ |
| 14787 | case 803: /* *add_tp_x32_zext */ |
| 14788 | case 802: /* *add_tp_x32 */ |
| 14789 | case 191: /* fix_truncsi_i387_with_temp */ |
| 14790 | case 190: /* fix_trunchi_i387_with_temp */ |
| 14791 | case 189: /* fix_truncsi_i387 */ |
| 14792 | case 188: /* fix_trunchi_i387 */ |
| 14793 | case 187: /* fix_truncdi_i387_with_temp */ |
| 14794 | case 186: /* fix_truncdi_i387 */ |
| 14795 | case 185: /* *fix_truncdi_i387_1 */ |
| 14796 | case 184: /* *fix_truncsi_i387_1 */ |
| 14797 | case 183: /* *fix_trunchi_i387_1 */ |
| 14798 | case 182: /* fix_truncdi_i387_fisttp_with_temp */ |
| 14799 | case 181: /* fix_truncsi_i387_fisttp_with_temp */ |
| 14800 | case 180: /* fix_trunchi_i387_fisttp_with_temp */ |
| 14801 | case 179: /* fix_truncdi_i387_fisttp */ |
| 14802 | case 178: /* fix_truncsi_i387_fisttp */ |
| 14803 | case 177: /* fix_trunchi_i387_fisttp */ |
| 14804 | case 176: /* fix_truncdi_fisttp_i387_1 */ |
| 14805 | case 175: /* fix_truncsi_fisttp_i387_1 */ |
| 14806 | case 174: /* fix_trunchi_fisttp_i387_1 */ |
| 14807 | case 73: /* *popfldi1 */ |
| 14808 | case 72: /* *popflsi1 */ |
| 14809 | case 69: /* *popdi1_epilogue */ |
| 14810 | case 68: /* *popsi1_epilogue */ |
| 14811 | case 67: /* *popdi1 */ |
| 14812 | case 66: /* *popsi1 */ |
| 14813 | return 4; |
| 14814 | |
| 14815 | case 4899: /* vpmultishiftqbv32qi_mask */ |
| 14816 | case 4898: /* vpmultishiftqbv32qi */ |
| 14817 | case 4897: /* vpmultishiftqbv16qi_mask */ |
| 14818 | case 4896: /* vpmultishiftqbv16qi */ |
| 14819 | case 4895: /* vpmultishiftqbv64qi_mask */ |
| 14820 | case 4894: /* vpmultishiftqbv64qi */ |
| 14821 | case 4416: /* vec_set_hi_v32qi */ |
| 14822 | case 4415: /* vec_set_lo_v32qi */ |
| 14823 | case 4414: /* vec_set_hi_v16hi */ |
| 14824 | case 4413: /* vec_set_lo_v16hi */ |
| 14825 | case 4412: /* vec_set_hi_v8sf_mask */ |
| 14826 | case 4411: /* vec_set_hi_v8sf */ |
| 14827 | case 4410: /* vec_set_hi_v8si_mask */ |
| 14828 | case 4409: /* vec_set_hi_v8si */ |
| 14829 | case 4408: /* vec_set_lo_v8sf_mask */ |
| 14830 | case 4407: /* vec_set_lo_v8sf */ |
| 14831 | case 4406: /* vec_set_lo_v8si_mask */ |
| 14832 | case 4405: /* vec_set_lo_v8si */ |
| 14833 | case 4404: /* vec_set_hi_v4df_mask */ |
| 14834 | case 4403: /* vec_set_hi_v4df */ |
| 14835 | case 4402: /* vec_set_hi_v4di_mask */ |
| 14836 | case 4401: /* vec_set_hi_v4di */ |
| 14837 | case 4400: /* vec_set_lo_v4df_mask */ |
| 14838 | case 4399: /* vec_set_lo_v4df */ |
| 14839 | case 4398: /* vec_set_lo_v4di_mask */ |
| 14840 | case 4397: /* vec_set_lo_v4di */ |
| 14841 | case 4390: /* *avx_vperm2f128v4df_nozero */ |
| 14842 | case 4389: /* *avx_vperm2f128v8sf_nozero */ |
| 14843 | case 4388: /* *avx_vperm2f128v8si_nozero */ |
| 14844 | case 4387: /* *avx_vperm2f128v4df_full */ |
| 14845 | case 4386: /* *avx_vperm2f128v8sf_full */ |
| 14846 | case 4385: /* *avx_vperm2f128v8si_full */ |
| 14847 | case 4384: /* avx512bw_vpermt2varv32hi3_mask */ |
| 14848 | case 4383: /* avx512vl_vpermt2varv16hi3_mask */ |
| 14849 | case 4382: /* avx512vl_vpermt2varv8hi3_mask */ |
| 14850 | case 4381: /* avx512vl_vpermt2varv32qi3_mask */ |
| 14851 | case 4380: /* avx512vl_vpermt2varv16qi3_mask */ |
| 14852 | case 4379: /* avx512bw_vpermt2varv64qi3_mask */ |
| 14853 | case 4378: /* avx512vl_vpermt2varv2df3_mask */ |
| 14854 | case 4377: /* avx512vl_vpermt2varv2di3_mask */ |
| 14855 | case 4376: /* avx512vl_vpermt2varv4sf3_mask */ |
| 14856 | case 4375: /* avx512vl_vpermt2varv4si3_mask */ |
| 14857 | case 4374: /* avx512vl_vpermt2varv4df3_mask */ |
| 14858 | case 4373: /* avx512vl_vpermt2varv4di3_mask */ |
| 14859 | case 4372: /* avx512vl_vpermt2varv8sf3_mask */ |
| 14860 | case 4371: /* avx512vl_vpermt2varv8si3_mask */ |
| 14861 | case 4370: /* avx512f_vpermt2varv8df3_mask */ |
| 14862 | case 4369: /* avx512f_vpermt2varv8di3_mask */ |
| 14863 | case 4368: /* avx512f_vpermt2varv16sf3_mask */ |
| 14864 | case 4367: /* avx512f_vpermt2varv16si3_mask */ |
| 14865 | case 4366: /* avx512bw_vpermt2varv32hi3_maskz_1 */ |
| 14866 | case 4365: /* avx512bw_vpermt2varv32hi3 */ |
| 14867 | case 4364: /* avx512vl_vpermt2varv16hi3_maskz_1 */ |
| 14868 | case 4363: /* avx512vl_vpermt2varv16hi3 */ |
| 14869 | case 4362: /* avx512vl_vpermt2varv8hi3_maskz_1 */ |
| 14870 | case 4361: /* avx512vl_vpermt2varv8hi3 */ |
| 14871 | case 4360: /* avx512vl_vpermt2varv32qi3_maskz_1 */ |
| 14872 | case 4359: /* avx512vl_vpermt2varv32qi3 */ |
| 14873 | case 4358: /* avx512vl_vpermt2varv16qi3_maskz_1 */ |
| 14874 | case 4357: /* avx512vl_vpermt2varv16qi3 */ |
| 14875 | case 4356: /* avx512bw_vpermt2varv64qi3_maskz_1 */ |
| 14876 | case 4355: /* avx512bw_vpermt2varv64qi3 */ |
| 14877 | case 4354: /* avx512vl_vpermt2varv2df3_maskz_1 */ |
| 14878 | case 4353: /* avx512vl_vpermt2varv2df3 */ |
| 14879 | case 4352: /* avx512vl_vpermt2varv2di3_maskz_1 */ |
| 14880 | case 4351: /* avx512vl_vpermt2varv2di3 */ |
| 14881 | case 4350: /* avx512vl_vpermt2varv4sf3_maskz_1 */ |
| 14882 | case 4349: /* avx512vl_vpermt2varv4sf3 */ |
| 14883 | case 4348: /* avx512vl_vpermt2varv4si3_maskz_1 */ |
| 14884 | case 4347: /* avx512vl_vpermt2varv4si3 */ |
| 14885 | case 4346: /* avx512vl_vpermt2varv4df3_maskz_1 */ |
| 14886 | case 4345: /* avx512vl_vpermt2varv4df3 */ |
| 14887 | case 4344: /* avx512vl_vpermt2varv4di3_maskz_1 */ |
| 14888 | case 4343: /* avx512vl_vpermt2varv4di3 */ |
| 14889 | case 4342: /* avx512vl_vpermt2varv8sf3_maskz_1 */ |
| 14890 | case 4341: /* avx512vl_vpermt2varv8sf3 */ |
| 14891 | case 4340: /* avx512vl_vpermt2varv8si3_maskz_1 */ |
| 14892 | case 4339: /* avx512vl_vpermt2varv8si3 */ |
| 14893 | case 4338: /* avx512f_vpermt2varv8df3_maskz_1 */ |
| 14894 | case 4337: /* avx512f_vpermt2varv8df3 */ |
| 14895 | case 4336: /* avx512f_vpermt2varv8di3_maskz_1 */ |
| 14896 | case 4335: /* avx512f_vpermt2varv8di3 */ |
| 14897 | case 4334: /* avx512f_vpermt2varv16sf3_maskz_1 */ |
| 14898 | case 4333: /* avx512f_vpermt2varv16sf3 */ |
| 14899 | case 4332: /* avx512f_vpermt2varv16si3_maskz_1 */ |
| 14900 | case 4331: /* avx512f_vpermt2varv16si3 */ |
| 14901 | case 4330: /* avx512bw_vpermi2varv32hi3_mask */ |
| 14902 | case 4329: /* avx512vl_vpermi2varv16hi3_mask */ |
| 14903 | case 4328: /* avx512vl_vpermi2varv8hi3_mask */ |
| 14904 | case 4327: /* avx512vl_vpermi2varv32qi3_mask */ |
| 14905 | case 4326: /* avx512vl_vpermi2varv16qi3_mask */ |
| 14906 | case 4325: /* avx512bw_vpermi2varv64qi3_mask */ |
| 14907 | case 4324: /* avx512vl_vpermi2varv2df3_mask */ |
| 14908 | case 4323: /* avx512vl_vpermi2varv2di3_mask */ |
| 14909 | case 4322: /* avx512vl_vpermi2varv4sf3_mask */ |
| 14910 | case 4321: /* avx512vl_vpermi2varv4si3_mask */ |
| 14911 | case 4320: /* avx512vl_vpermi2varv4df3_mask */ |
| 14912 | case 4319: /* avx512vl_vpermi2varv4di3_mask */ |
| 14913 | case 4318: /* avx512vl_vpermi2varv8sf3_mask */ |
| 14914 | case 4317: /* avx512vl_vpermi2varv8si3_mask */ |
| 14915 | case 4316: /* avx512f_vpermi2varv8df3_mask */ |
| 14916 | case 4315: /* avx512f_vpermi2varv8di3_mask */ |
| 14917 | case 4314: /* avx512f_vpermi2varv16sf3_mask */ |
| 14918 | case 4313: /* avx512f_vpermi2varv16si3_mask */ |
| 14919 | case 4312: /* avx512bw_vpermi2varv32hi3_maskz_1 */ |
| 14920 | case 4311: /* avx512bw_vpermi2varv32hi3 */ |
| 14921 | case 4310: /* avx512vl_vpermi2varv16hi3_maskz_1 */ |
| 14922 | case 4309: /* avx512vl_vpermi2varv16hi3 */ |
| 14923 | case 4308: /* avx512vl_vpermi2varv8hi3_maskz_1 */ |
| 14924 | case 4307: /* avx512vl_vpermi2varv8hi3 */ |
| 14925 | case 4306: /* avx512vl_vpermi2varv32qi3_maskz_1 */ |
| 14926 | case 4305: /* avx512vl_vpermi2varv32qi3 */ |
| 14927 | case 4304: /* avx512vl_vpermi2varv16qi3_maskz_1 */ |
| 14928 | case 4303: /* avx512vl_vpermi2varv16qi3 */ |
| 14929 | case 4302: /* avx512bw_vpermi2varv64qi3_maskz_1 */ |
| 14930 | case 4301: /* avx512bw_vpermi2varv64qi3 */ |
| 14931 | case 4300: /* avx512vl_vpermi2varv2df3_maskz_1 */ |
| 14932 | case 4299: /* avx512vl_vpermi2varv2df3 */ |
| 14933 | case 4298: /* avx512vl_vpermi2varv2di3_maskz_1 */ |
| 14934 | case 4297: /* avx512vl_vpermi2varv2di3 */ |
| 14935 | case 4296: /* avx512vl_vpermi2varv4sf3_maskz_1 */ |
| 14936 | case 4295: /* avx512vl_vpermi2varv4sf3 */ |
| 14937 | case 4294: /* avx512vl_vpermi2varv4si3_maskz_1 */ |
| 14938 | case 4293: /* avx512vl_vpermi2varv4si3 */ |
| 14939 | case 4292: /* avx512vl_vpermi2varv4df3_maskz_1 */ |
| 14940 | case 4291: /* avx512vl_vpermi2varv4df3 */ |
| 14941 | case 4290: /* avx512vl_vpermi2varv4di3_maskz_1 */ |
| 14942 | case 4289: /* avx512vl_vpermi2varv4di3 */ |
| 14943 | case 4288: /* avx512vl_vpermi2varv8sf3_maskz_1 */ |
| 14944 | case 4287: /* avx512vl_vpermi2varv8sf3 */ |
| 14945 | case 4286: /* avx512vl_vpermi2varv8si3_maskz_1 */ |
| 14946 | case 4285: /* avx512vl_vpermi2varv8si3 */ |
| 14947 | case 4284: /* avx512f_vpermi2varv8df3_maskz_1 */ |
| 14948 | case 4283: /* avx512f_vpermi2varv8df3 */ |
| 14949 | case 4282: /* avx512f_vpermi2varv8di3_maskz_1 */ |
| 14950 | case 4281: /* avx512f_vpermi2varv8di3 */ |
| 14951 | case 4280: /* avx512f_vpermi2varv16sf3_maskz_1 */ |
| 14952 | case 4279: /* avx512f_vpermi2varv16sf3 */ |
| 14953 | case 4278: /* avx512f_vpermi2varv16si3_maskz_1 */ |
| 14954 | case 4277: /* avx512f_vpermi2varv16si3 */ |
| 14955 | case 4276: /* avx_vpermilvarv2df3_mask */ |
| 14956 | case 4275: /* avx_vpermilvarv2df3 */ |
| 14957 | case 4274: /* avx_vpermilvarv4df3_mask */ |
| 14958 | case 4273: /* avx_vpermilvarv4df3 */ |
| 14959 | case 4272: /* avx512f_vpermilvarv8df3_mask */ |
| 14960 | case 4271: /* avx512f_vpermilvarv8df3 */ |
| 14961 | case 4270: /* avx_vpermilvarv4sf3_mask */ |
| 14962 | case 4269: /* avx_vpermilvarv4sf3 */ |
| 14963 | case 4268: /* avx_vpermilvarv8sf3_mask */ |
| 14964 | case 4267: /* avx_vpermilvarv8sf3 */ |
| 14965 | case 4266: /* avx512f_vpermilvarv16sf3_mask */ |
| 14966 | case 4265: /* avx512f_vpermilvarv16sf3 */ |
| 14967 | case 4264: /* *avx_vpermilpv2df_mask */ |
| 14968 | case 4263: /* *avx_vpermilpv2df */ |
| 14969 | case 4262: /* *avx_vpermilpv4df_mask */ |
| 14970 | case 4261: /* *avx_vpermilpv4df */ |
| 14971 | case 4260: /* *avx512f_vpermilpv8df_mask */ |
| 14972 | case 4259: /* *avx512f_vpermilpv8df */ |
| 14973 | case 4258: /* *avx_vpermilpv4sf_mask */ |
| 14974 | case 4257: /* *avx_vpermilpv4sf */ |
| 14975 | case 4256: /* *avx_vpermilpv8sf_mask */ |
| 14976 | case 4255: /* *avx_vpermilpv8sf */ |
| 14977 | case 4254: /* *avx512f_vpermilpv16sf_mask */ |
| 14978 | case 4253: /* *avx512f_vpermilpv16sf */ |
| 14979 | case 4109: /* avx2_permv2ti */ |
| 14980 | case 4108: /* avx512f_permv8di_1_mask */ |
| 14981 | case 4107: /* avx512f_permv8di_1 */ |
| 14982 | case 4106: /* avx512f_permv8df_1_mask */ |
| 14983 | case 4105: /* avx512f_permv8df_1 */ |
| 14984 | case 4104: /* avx2_permv4df_1_mask */ |
| 14985 | case 4103: /* avx2_permv4df_1 */ |
| 14986 | case 4102: /* avx2_permv4di_1_mask */ |
| 14987 | case 4101: /* avx2_permv4di_1 */ |
| 14988 | case 4100: /* avx512bw_permvarv32hi_mask */ |
| 14989 | case 4099: /* avx512bw_permvarv32hi */ |
| 14990 | case 4098: /* avx512vl_permvarv16hi_mask */ |
| 14991 | case 4097: /* avx512vl_permvarv16hi */ |
| 14992 | case 4096: /* avx512vl_permvarv8hi_mask */ |
| 14993 | case 4095: /* avx512vl_permvarv8hi */ |
| 14994 | case 4094: /* avx512vl_permvarv32qi_mask */ |
| 14995 | case 4093: /* avx512vl_permvarv32qi */ |
| 14996 | case 4092: /* avx512vl_permvarv16qi_mask */ |
| 14997 | case 4091: /* avx512vl_permvarv16qi */ |
| 14998 | case 4090: /* avx512bw_permvarv64qi_mask */ |
| 14999 | case 4089: /* avx512bw_permvarv64qi */ |
| 15000 | case 4088: /* avx2_permvarv4df_mask */ |
| 15001 | case 4087: /* avx2_permvarv4df */ |
| 15002 | case 4086: /* avx2_permvarv4di_mask */ |
| 15003 | case 4085: /* avx2_permvarv4di */ |
| 15004 | case 4084: /* avx512f_permvarv8df_mask */ |
| 15005 | case 4083: /* avx512f_permvarv8df */ |
| 15006 | case 4082: /* avx512f_permvarv8di_mask */ |
| 15007 | case 4081: /* avx512f_permvarv8di */ |
| 15008 | case 4080: /* avx512f_permvarv16sf_mask */ |
| 15009 | case 4079: /* avx512f_permvarv16sf */ |
| 15010 | case 4078: /* avx512f_permvarv16si_mask */ |
| 15011 | case 4077: /* avx512f_permvarv16si */ |
| 15012 | case 4076: /* avx2_permvarv8sf_mask */ |
| 15013 | case 4075: /* avx2_permvarv8sf */ |
| 15014 | case 4074: /* avx2_permvarv8si_mask */ |
| 15015 | case 4073: /* avx2_permvarv8si */ |
| 15016 | case 3794: /* sse4_1_packusdw_mask */ |
| 15017 | case 3793: /* sse4_1_packusdw */ |
| 15018 | case 3792: /* avx2_packusdw_mask */ |
| 15019 | case 3791: /* avx2_packusdw */ |
| 15020 | case 3790: /* avx512bw_packusdw_mask */ |
| 15021 | case 3789: /* avx512bw_packusdw */ |
| 15022 | case 3619: /* sse2_pshufhw_1_mask */ |
| 15023 | case 3618: /* sse2_pshufhw_1 */ |
| 15024 | case 3617: /* avx2_pshufhw_1_mask */ |
| 15025 | case 3616: /* avx2_pshufhw_1 */ |
| 15026 | case 3615: /* avx512bw_pshufhwv32hi_mask */ |
| 15027 | case 3614: /* *avx512bw_pshufhwv32hi */ |
| 15028 | case 3613: /* sse2_pshuflw_1_mask */ |
| 15029 | case 3612: /* sse2_pshuflw_1 */ |
| 15030 | case 3611: /* avx2_pshuflw_1_mask */ |
| 15031 | case 3610: /* avx2_pshuflw_1 */ |
| 15032 | case 3609: /* avx512bw_pshuflwv32hi_mask */ |
| 15033 | case 3608: /* *avx512bw_pshuflwv32hi */ |
| 15034 | case 3601: /* avx512f_shuf_i32x4_1_mask */ |
| 15035 | case 3600: /* avx512f_shuf_i32x4_1 */ |
| 15036 | case 3599: /* avx512f_shuf_f32x4_1_mask */ |
| 15037 | case 3598: /* avx512f_shuf_f32x4_1 */ |
| 15038 | case 3597: /* avx512vl_shuf_f32x4_1_mask */ |
| 15039 | case 3596: /* avx512vl_shuf_f32x4_1 */ |
| 15040 | case 3595: /* avx512vl_shuf_i32x4_1_mask */ |
| 15041 | case 3594: /* avx512vl_shuf_i32x4_1 */ |
| 15042 | case 3593: /* avx512f_shuf_i64x2_1_mask */ |
| 15043 | case 3592: /* avx512f_shuf_i64x2_1 */ |
| 15044 | case 3591: /* avx512f_shuf_f64x2_1_mask */ |
| 15045 | case 3590: /* avx512f_shuf_f64x2_1 */ |
| 15046 | case 3589: /* avx512dq_shuf_f64x2_1_mask */ |
| 15047 | case 3588: /* *avx512dq_shuf_f64x2_1 */ |
| 15048 | case 3587: /* avx512dq_shuf_i64x2_1_mask */ |
| 15049 | case 3586: /* *avx512dq_shuf_i64x2_1 */ |
| 15050 | case 3585: /* vec_set_hi_v8di_mask */ |
| 15051 | case 3584: /* vec_set_hi_v8di */ |
| 15052 | case 3583: /* vec_set_hi_v8df_mask */ |
| 15053 | case 3582: /* vec_set_hi_v8df */ |
| 15054 | case 3581: /* vec_set_lo_v8di_mask */ |
| 15055 | case 3580: /* vec_set_lo_v8di */ |
| 15056 | case 3579: /* vec_set_lo_v8df_mask */ |
| 15057 | case 3578: /* vec_set_lo_v8df */ |
| 15058 | case 3577: /* vec_set_hi_v16si_mask */ |
| 15059 | case 3576: /* vec_set_hi_v16si */ |
| 15060 | case 3575: /* vec_set_hi_v16sf_mask */ |
| 15061 | case 3574: /* vec_set_hi_v16sf */ |
| 15062 | case 3573: /* vec_set_lo_v16si_mask */ |
| 15063 | case 3572: /* vec_set_lo_v16si */ |
| 15064 | case 3571: /* vec_set_lo_v16sf_mask */ |
| 15065 | case 3570: /* vec_set_lo_v16sf */ |
| 15066 | case 3569: /* avx512f_vinserti32x4_1_mask */ |
| 15067 | case 3568: /* *avx512f_vinserti32x4_1 */ |
| 15068 | case 3567: /* avx512f_vinsertf32x4_1_mask */ |
| 15069 | case 3566: /* *avx512f_vinsertf32x4_1 */ |
| 15070 | case 3565: /* avx512dq_vinserti64x2_1_mask */ |
| 15071 | case 3564: /* *avx512dq_vinserti64x2_1 */ |
| 15072 | case 3563: /* avx512dq_vinsertf64x2_1_mask */ |
| 15073 | case 3562: /* *avx512dq_vinsertf64x2_1 */ |
| 15074 | case 3561: /* sse4_1_pinsrq */ |
| 15075 | case 3560: /* sse4_1_pinsrd */ |
| 15076 | case 3559: /* sse2_pinsrw */ |
| 15077 | case 3558: /* sse4_1_pinsrb */ |
| 15078 | case 3557: /* vec_interleave_lowv4si_mask */ |
| 15079 | case 3556: /* vec_interleave_lowv4si */ |
| 15080 | case 3555: /* avx512f_interleave_lowv16si_mask */ |
| 15081 | case 3554: /* *avx512f_interleave_lowv16si */ |
| 15082 | case 3553: /* avx2_interleave_lowv8si_mask */ |
| 15083 | case 3552: /* avx2_interleave_lowv8si */ |
| 15084 | case 3551: /* vec_interleave_highv4si_mask */ |
| 15085 | case 3550: /* vec_interleave_highv4si */ |
| 15086 | case 3549: /* avx512f_interleave_highv16si_mask */ |
| 15087 | case 3548: /* *avx512f_interleave_highv16si */ |
| 15088 | case 3547: /* avx2_interleave_highv8si_mask */ |
| 15089 | case 3546: /* avx2_interleave_highv8si */ |
| 15090 | case 3545: /* vec_interleave_lowv8hi_mask */ |
| 15091 | case 3544: /* vec_interleave_lowv8hi */ |
| 15092 | case 3543: /* avx2_interleave_lowv16hi_mask */ |
| 15093 | case 3542: /* avx2_interleave_lowv16hi */ |
| 15094 | case 3541: /* avx512bw_interleave_lowv32hi_mask */ |
| 15095 | case 3540: /* *avx512bw_interleave_lowv32hi */ |
| 15096 | case 3539: /* vec_interleave_highv8hi_mask */ |
| 15097 | case 3538: /* vec_interleave_highv8hi */ |
| 15098 | case 3537: /* avx2_interleave_highv16hi_mask */ |
| 15099 | case 3536: /* avx2_interleave_highv16hi */ |
| 15100 | case 3535: /* avx512bw_interleave_highv32hi_mask */ |
| 15101 | case 3534: /* avx512bw_interleave_highv32hi */ |
| 15102 | case 3533: /* vec_interleave_lowv16qi_mask */ |
| 15103 | case 3532: /* vec_interleave_lowv16qi */ |
| 15104 | case 3531: /* avx2_interleave_lowv32qi_mask */ |
| 15105 | case 3530: /* avx2_interleave_lowv32qi */ |
| 15106 | case 3529: /* avx512bw_interleave_lowv64qi_mask */ |
| 15107 | case 3528: /* avx512bw_interleave_lowv64qi */ |
| 15108 | case 3527: /* vec_interleave_highv16qi_mask */ |
| 15109 | case 3526: /* vec_interleave_highv16qi */ |
| 15110 | case 3525: /* avx2_interleave_highv32qi_mask */ |
| 15111 | case 3524: /* avx2_interleave_highv32qi */ |
| 15112 | case 3523: /* avx512bw_interleave_highv64qi_mask */ |
| 15113 | case 3522: /* avx512bw_interleave_highv64qi */ |
| 15114 | case 3521: /* sse2_packuswb_mask */ |
| 15115 | case 3520: /* sse2_packuswb */ |
| 15116 | case 3519: /* avx2_packuswb_mask */ |
| 15117 | case 3518: /* avx2_packuswb */ |
| 15118 | case 3517: /* avx512bw_packuswb_mask */ |
| 15119 | case 3516: /* avx512bw_packuswb */ |
| 15120 | case 3515: /* sse2_packssdw_mask */ |
| 15121 | case 3514: /* sse2_packssdw */ |
| 15122 | case 3513: /* avx2_packssdw_mask */ |
| 15123 | case 3512: /* avx2_packssdw */ |
| 15124 | case 3511: /* avx512bw_packssdw_mask */ |
| 15125 | case 3510: /* avx512bw_packssdw */ |
| 15126 | case 3509: /* sse2_packsswb_mask */ |
| 15127 | case 3508: /* sse2_packsswb */ |
| 15128 | case 3507: /* avx2_packsswb_mask */ |
| 15129 | case 3506: /* avx2_packsswb */ |
| 15130 | case 3505: /* avx512bw_packsswb_mask */ |
| 15131 | case 3504: /* avx512bw_packsswb */ |
| 15132 | case 3455: /* *xorv8hi3 */ |
| 15133 | case 3454: /* *iorv8hi3 */ |
| 15134 | case 3453: /* *andv8hi3 */ |
| 15135 | case 3452: /* *xorv16hi3 */ |
| 15136 | case 3451: /* *iorv16hi3 */ |
| 15137 | case 3450: /* *andv16hi3 */ |
| 15138 | case 3449: /* *xorv32hi3 */ |
| 15139 | case 3448: /* *iorv32hi3 */ |
| 15140 | case 3447: /* *andv32hi3 */ |
| 15141 | case 3446: /* *xorv16qi3 */ |
| 15142 | case 3445: /* *iorv16qi3 */ |
| 15143 | case 3444: /* *andv16qi3 */ |
| 15144 | case 3443: /* *xorv32qi3 */ |
| 15145 | case 3442: /* *iorv32qi3 */ |
| 15146 | case 3441: /* *andv32qi3 */ |
| 15147 | case 3440: /* *xorv64qi3 */ |
| 15148 | case 3439: /* *iorv64qi3 */ |
| 15149 | case 3438: /* *andv64qi3 */ |
| 15150 | case 3437: /* xorv2di3_mask */ |
| 15151 | case 3436: /* *xorv2di3 */ |
| 15152 | case 3435: /* iorv2di3_mask */ |
| 15153 | case 3434: /* *iorv2di3 */ |
| 15154 | case 3433: /* andv2di3_mask */ |
| 15155 | case 3432: /* *andv2di3 */ |
| 15156 | case 3431: /* xorv4di3_mask */ |
| 15157 | case 3430: /* *xorv4di3 */ |
| 15158 | case 3429: /* iorv4di3_mask */ |
| 15159 | case 3428: /* *iorv4di3 */ |
| 15160 | case 3427: /* andv4di3_mask */ |
| 15161 | case 3426: /* *andv4di3 */ |
| 15162 | case 3425: /* xorv8di3_mask */ |
| 15163 | case 3424: /* *xorv8di3 */ |
| 15164 | case 3423: /* iorv8di3_mask */ |
| 15165 | case 3422: /* *iorv8di3 */ |
| 15166 | case 3421: /* andv8di3_mask */ |
| 15167 | case 3420: /* *andv8di3 */ |
| 15168 | case 3419: /* xorv4si3_mask */ |
| 15169 | case 3418: /* *xorv4si3 */ |
| 15170 | case 3417: /* iorv4si3_mask */ |
| 15171 | case 3416: /* *iorv4si3 */ |
| 15172 | case 3415: /* andv4si3_mask */ |
| 15173 | case 3414: /* *andv4si3 */ |
| 15174 | case 3413: /* xorv8si3_mask */ |
| 15175 | case 3412: /* *xorv8si3 */ |
| 15176 | case 3411: /* iorv8si3_mask */ |
| 15177 | case 3410: /* *iorv8si3 */ |
| 15178 | case 3409: /* andv8si3_mask */ |
| 15179 | case 3408: /* *andv8si3 */ |
| 15180 | case 3407: /* xorv16si3_mask */ |
| 15181 | case 3406: /* *xorv16si3 */ |
| 15182 | case 3405: /* iorv16si3_mask */ |
| 15183 | case 3404: /* *iorv16si3 */ |
| 15184 | case 3403: /* andv16si3_mask */ |
| 15185 | case 3402: /* *andv16si3 */ |
| 15186 | case 3401: /* *andnotv2di3_mask */ |
| 15187 | case 3400: /* *andnotv4di3_mask */ |
| 15188 | case 3399: /* *andnotv8di3_mask */ |
| 15189 | case 3398: /* *andnotv4si3_mask */ |
| 15190 | case 3397: /* *andnotv8si3_mask */ |
| 15191 | case 3396: /* *andnotv16si3_mask */ |
| 15192 | case 3395: /* *andnotv2di3 */ |
| 15193 | case 3394: /* *andnotv4di3 */ |
| 15194 | case 3393: /* *andnotv4si3 */ |
| 15195 | case 3392: /* *andnotv8si3 */ |
| 15196 | case 3391: /* *andnotv8hi3 */ |
| 15197 | case 3390: /* *andnotv16hi3 */ |
| 15198 | case 3389: /* *andnotv32hi3 */ |
| 15199 | case 3388: /* *andnotv16qi3 */ |
| 15200 | case 3387: /* *andnotv32qi3 */ |
| 15201 | case 3386: /* *andnotv64qi3 */ |
| 15202 | case 3385: /* *andnotv8di3 */ |
| 15203 | case 3384: /* *andnotv16si3 */ |
| 15204 | case 3378: /* avx512vl_gtv16hi3_mask */ |
| 15205 | case 3377: /* avx512vl_gtv16hi3 */ |
| 15206 | case 3376: /* avx512bw_gtv32hi3_mask */ |
| 15207 | case 3375: /* avx512bw_gtv32hi3 */ |
| 15208 | case 3374: /* avx512vl_gtv32qi3_mask */ |
| 15209 | case 3373: /* avx512vl_gtv32qi3 */ |
| 15210 | case 3370: /* avx512bw_gtv64qi3_mask */ |
| 15211 | case 3369: /* avx512bw_gtv64qi3 */ |
| 15212 | case 3366: /* avx512vl_gtv4di3_mask */ |
| 15213 | case 3365: /* avx512vl_gtv4di3 */ |
| 15214 | case 3364: /* avx512f_gtv8di3_mask */ |
| 15215 | case 3363: /* avx512f_gtv8di3 */ |
| 15216 | case 3360: /* avx512vl_gtv8si3_mask */ |
| 15217 | case 3359: /* avx512vl_gtv8si3 */ |
| 15218 | case 3358: /* avx512f_gtv16si3_mask */ |
| 15219 | case 3357: /* avx512f_gtv16si3 */ |
| 15220 | case 3356: /* avx2_gtv4di3 */ |
| 15221 | case 3355: /* avx2_gtv8si3 */ |
| 15222 | case 3354: /* avx2_gtv16hi3 */ |
| 15223 | case 3353: /* avx2_gtv32qi3 */ |
| 15224 | case 3345: /* avx512vl_eqv4di3_mask_1 */ |
| 15225 | case 3344: /* avx512vl_eqv4di3_1 */ |
| 15226 | case 3343: /* avx512f_eqv8di3_mask_1 */ |
| 15227 | case 3342: /* avx512f_eqv8di3_1 */ |
| 15228 | case 3339: /* avx512vl_eqv8si3_mask_1 */ |
| 15229 | case 3338: /* avx512vl_eqv8si3_1 */ |
| 15230 | case 3337: /* avx512f_eqv16si3_mask_1 */ |
| 15231 | case 3336: /* avx512f_eqv16si3_1 */ |
| 15232 | case 3333: /* avx512vl_eqv16hi3_mask_1 */ |
| 15233 | case 3332: /* avx512vl_eqv16hi3_1 */ |
| 15234 | case 3331: /* avx512bw_eqv32hi3_mask_1 */ |
| 15235 | case 3330: /* avx512bw_eqv32hi3_1 */ |
| 15236 | case 3329: /* avx512vl_eqv32qi3_mask_1 */ |
| 15237 | case 3328: /* avx512vl_eqv32qi3_1 */ |
| 15238 | case 3325: /* avx512bw_eqv64qi3_mask_1 */ |
| 15239 | case 3324: /* avx512bw_eqv64qi3_1 */ |
| 15240 | case 3323: /* *avx2_eqv4di3 */ |
| 15241 | case 3322: /* *avx2_eqv8si3 */ |
| 15242 | case 3321: /* *avx2_eqv16hi3 */ |
| 15243 | case 3320: /* *avx2_eqv32qi3 */ |
| 15244 | case 2725: /* sse2_shufpd_v2df */ |
| 15245 | case 2724: /* sse2_shufpd_v2di */ |
| 15246 | case 2723: /* vec_interleave_lowv2di_mask */ |
| 15247 | case 2722: /* vec_interleave_lowv2di */ |
| 15248 | case 2721: /* avx512f_interleave_lowv8di_mask */ |
| 15249 | case 2720: /* *avx512f_interleave_lowv8di */ |
| 15250 | case 2719: /* avx2_interleave_lowv4di_mask */ |
| 15251 | case 2718: /* avx2_interleave_lowv4di */ |
| 15252 | case 2717: /* vec_interleave_highv2di_mask */ |
| 15253 | case 2716: /* vec_interleave_highv2di */ |
| 15254 | case 2715: /* avx512f_interleave_highv8di_mask */ |
| 15255 | case 2714: /* *avx512f_interleave_highv8di */ |
| 15256 | case 2713: /* avx2_interleave_highv4di_mask */ |
| 15257 | case 2712: /* avx2_interleave_highv4di */ |
| 15258 | case 2711: /* sse2_shufpd_v2df_mask */ |
| 15259 | case 2710: /* avx_shufpd256_1_mask */ |
| 15260 | case 2709: /* avx_shufpd256_1 */ |
| 15261 | case 2708: /* avx512f_shufpd512_1_mask */ |
| 15262 | case 2707: /* avx512f_shufpd512_1 */ |
| 15263 | case 2706: /* avx512f_shufps512_1_mask */ |
| 15264 | case 2705: /* avx512f_shufps512_1 */ |
| 15265 | case 2588: /* avx512vl_vternlogv2di_mask */ |
| 15266 | case 2587: /* avx512vl_vternlogv4di_mask */ |
| 15267 | case 2586: /* avx512f_vternlogv8di_mask */ |
| 15268 | case 2585: /* avx512vl_vternlogv4si_mask */ |
| 15269 | case 2584: /* avx512vl_vternlogv8si_mask */ |
| 15270 | case 2583: /* avx512f_vternlogv16si_mask */ |
| 15271 | case 2582: /* avx512vl_vternlogv2di_maskz_1 */ |
| 15272 | case 2581: /* avx512vl_vternlogv2di */ |
| 15273 | case 2580: /* avx512vl_vternlogv4di_maskz_1 */ |
| 15274 | case 2579: /* avx512vl_vternlogv4di */ |
| 15275 | case 2578: /* avx512f_vternlogv8di_maskz_1 */ |
| 15276 | case 2577: /* avx512f_vternlogv8di */ |
| 15277 | case 2576: /* avx512vl_vternlogv4si_maskz_1 */ |
| 15278 | case 2575: /* avx512vl_vternlogv4si */ |
| 15279 | case 2574: /* avx512vl_vternlogv8si_maskz_1 */ |
| 15280 | case 2573: /* avx512vl_vternlogv8si */ |
| 15281 | case 2572: /* avx512f_vternlogv16si_maskz_1 */ |
| 15282 | case 2571: /* avx512f_vternlogv16si */ |
| 15283 | case 2541: /* avx512vl_unpcklpd128_mask */ |
| 15284 | case 2540: /* *avx_unpcklpd256_mask */ |
| 15285 | case 2539: /* *avx_unpcklpd256 */ |
| 15286 | case 2538: /* *avx512f_unpcklpd512_mask */ |
| 15287 | case 2537: /* *avx512f_unpcklpd512 */ |
| 15288 | case 2535: /* avx512vl_unpckhpd128_mask */ |
| 15289 | case 2534: /* avx_unpckhpd256_mask */ |
| 15290 | case 2533: /* avx_unpckhpd256 */ |
| 15291 | case 2532: /* avx512f_unpckhpd512_mask */ |
| 15292 | case 2531: /* *avx512f_unpckhpd512 */ |
| 15293 | case 2465: /* sse4_1_insertps */ |
| 15294 | case 2464: /* *vec_setv4sf_sse4_1 */ |
| 15295 | case 2448: /* sse_shufps_v4sf */ |
| 15296 | case 2447: /* sse_shufps_v4si */ |
| 15297 | case 2446: /* sse_shufps_v4sf_mask */ |
| 15298 | case 2445: /* avx_shufps256_1_mask */ |
| 15299 | case 2444: /* avx_shufps256_1 */ |
| 15300 | case 2431: /* vec_interleave_lowv4sf */ |
| 15301 | case 2430: /* unpcklps128_mask */ |
| 15302 | case 2429: /* avx_unpcklps256_mask */ |
| 15303 | case 2428: /* avx_unpcklps256 */ |
| 15304 | case 2427: /* avx512f_unpcklps512_mask */ |
| 15305 | case 2426: /* *avx512f_unpcklps512 */ |
| 15306 | case 2425: /* vec_interleave_highv4sf_mask */ |
| 15307 | case 2424: /* vec_interleave_highv4sf */ |
| 15308 | case 2423: /* avx_unpckhps256_mask */ |
| 15309 | case 2422: /* avx_unpckhps256 */ |
| 15310 | case 2421: /* avx512f_unpckhps512_mask */ |
| 15311 | case 2420: /* *avx512f_unpckhps512 */ |
| 15312 | case 2417: /* sse2_cvtps2pd_mask */ |
| 15313 | case 2416: /* sse2_cvtps2pd */ |
| 15314 | case 1800: /* *xortf3 */ |
| 15315 | case 1799: /* *iortf3 */ |
| 15316 | case 1798: /* *andtf3 */ |
| 15317 | case 1797: /* *xordf3 */ |
| 15318 | case 1796: /* *iordf3 */ |
| 15319 | case 1795: /* *anddf3 */ |
| 15320 | case 1794: /* *xorsf3 */ |
| 15321 | case 1793: /* *iorsf3 */ |
| 15322 | case 1792: /* *andsf3 */ |
| 15323 | case 1791: /* *andnottf3 */ |
| 15324 | case 1790: /* *andnotdf3 */ |
| 15325 | case 1789: /* *andnotsf3 */ |
| 15326 | case 1788: /* *xorv8df3_mask */ |
| 15327 | case 1787: /* *xorv8df3 */ |
| 15328 | case 1786: /* *iorv8df3_mask */ |
| 15329 | case 1785: /* *iorv8df3 */ |
| 15330 | case 1784: /* *andv8df3_mask */ |
| 15331 | case 1783: /* *andv8df3 */ |
| 15332 | case 1782: /* *xorv16sf3_mask */ |
| 15333 | case 1781: /* *xorv16sf3 */ |
| 15334 | case 1780: /* *iorv16sf3_mask */ |
| 15335 | case 1779: /* *iorv16sf3 */ |
| 15336 | case 1778: /* *andv16sf3_mask */ |
| 15337 | case 1777: /* *andv16sf3 */ |
| 15338 | case 1776: /* *xorv2df3_mask */ |
| 15339 | case 1775: /* *xorv2df3 */ |
| 15340 | case 1774: /* *iorv2df3_mask */ |
| 15341 | case 1773: /* *iorv2df3 */ |
| 15342 | case 1772: /* *andv2df3_mask */ |
| 15343 | case 1771: /* *andv2df3 */ |
| 15344 | case 1770: /* *xorv4df3_mask */ |
| 15345 | case 1769: /* *xorv4df3 */ |
| 15346 | case 1768: /* *iorv4df3_mask */ |
| 15347 | case 1767: /* *iorv4df3 */ |
| 15348 | case 1766: /* *andv4df3_mask */ |
| 15349 | case 1765: /* *andv4df3 */ |
| 15350 | case 1764: /* *xorv4sf3_mask */ |
| 15351 | case 1763: /* *xorv4sf3 */ |
| 15352 | case 1762: /* *iorv4sf3_mask */ |
| 15353 | case 1761: /* *iorv4sf3 */ |
| 15354 | case 1760: /* *andv4sf3_mask */ |
| 15355 | case 1759: /* *andv4sf3 */ |
| 15356 | case 1758: /* *xorv8sf3_mask */ |
| 15357 | case 1757: /* *xorv8sf3 */ |
| 15358 | case 1756: /* *iorv8sf3_mask */ |
| 15359 | case 1755: /* *iorv8sf3 */ |
| 15360 | case 1754: /* *andv8sf3_mask */ |
| 15361 | case 1753: /* *andv8sf3 */ |
| 15362 | case 1752: /* avx512f_andnotv8df3_mask */ |
| 15363 | case 1751: /* avx512f_andnotv8df3 */ |
| 15364 | case 1750: /* avx512f_andnotv16sf3_mask */ |
| 15365 | case 1749: /* avx512f_andnotv16sf3 */ |
| 15366 | case 1748: /* sse2_andnotv2df3_mask */ |
| 15367 | case 1747: /* sse2_andnotv2df3 */ |
| 15368 | case 1746: /* avx_andnotv4df3_mask */ |
| 15369 | case 1745: /* avx_andnotv4df3 */ |
| 15370 | case 1744: /* sse_andnotv4sf3_mask */ |
| 15371 | case 1743: /* sse_andnotv4sf3 */ |
| 15372 | case 1742: /* avx_andnotv8sf3_mask */ |
| 15373 | case 1741: /* avx_andnotv8sf3 */ |
| 15374 | case 1732: /* avx512f_maskcmpv2df3 */ |
| 15375 | case 1731: /* avx512f_maskcmpv4df3 */ |
| 15376 | case 1730: /* avx512f_maskcmpv8df3 */ |
| 15377 | case 1729: /* avx512f_maskcmpv4sf3 */ |
| 15378 | case 1728: /* avx512f_maskcmpv8sf3 */ |
| 15379 | case 1727: /* avx512f_maskcmpv16sf3 */ |
| 15380 | case 1716: /* avx512vl_ucmpv4di3_mask */ |
| 15381 | case 1715: /* avx512vl_ucmpv4di3 */ |
| 15382 | case 1714: /* avx512f_ucmpv8di3_mask */ |
| 15383 | case 1713: /* avx512f_ucmpv8di3 */ |
| 15384 | case 1710: /* avx512vl_ucmpv8si3_mask */ |
| 15385 | case 1709: /* avx512vl_ucmpv8si3 */ |
| 15386 | case 1708: /* avx512f_ucmpv16si3_mask */ |
| 15387 | case 1707: /* avx512f_ucmpv16si3 */ |
| 15388 | case 1704: /* avx512vl_ucmpv16hi3_mask */ |
| 15389 | case 1703: /* avx512vl_ucmpv16hi3 */ |
| 15390 | case 1702: /* avx512bw_ucmpv32hi3_mask */ |
| 15391 | case 1701: /* avx512bw_ucmpv32hi3 */ |
| 15392 | case 1700: /* avx512vl_ucmpv32qi3_mask */ |
| 15393 | case 1699: /* avx512vl_ucmpv32qi3 */ |
| 15394 | case 1696: /* avx512bw_ucmpv64qi3_mask */ |
| 15395 | case 1695: /* avx512bw_ucmpv64qi3 */ |
| 15396 | case 1692: /* avx512vl_cmpv16hi3_mask */ |
| 15397 | case 1691: /* avx512vl_cmpv16hi3 */ |
| 15398 | case 1690: /* avx512bw_cmpv32hi3_mask */ |
| 15399 | case 1689: /* avx512bw_cmpv32hi3 */ |
| 15400 | case 1688: /* avx512vl_cmpv32qi3_mask */ |
| 15401 | case 1687: /* avx512vl_cmpv32qi3 */ |
| 15402 | case 1684: /* avx512bw_cmpv64qi3_mask */ |
| 15403 | case 1683: /* avx512bw_cmpv64qi3 */ |
| 15404 | case 1682: /* avx512vl_cmpv2df3_mask */ |
| 15405 | case 1681: /* avx512vl_cmpv2df3 */ |
| 15406 | case 1680: /* avx512vl_cmpv4df3_mask */ |
| 15407 | case 1679: /* avx512vl_cmpv4df3 */ |
| 15408 | case 1678: /* avx512f_cmpv8df3_mask_round */ |
| 15409 | case 1677: /* avx512f_cmpv8df3_round */ |
| 15410 | case 1676: /* avx512f_cmpv8df3_mask */ |
| 15411 | case 1675: /* avx512f_cmpv8df3 */ |
| 15412 | case 1674: /* avx512vl_cmpv4sf3_mask */ |
| 15413 | case 1673: /* avx512vl_cmpv4sf3 */ |
| 15414 | case 1672: /* avx512vl_cmpv8sf3_mask */ |
| 15415 | case 1671: /* avx512vl_cmpv8sf3 */ |
| 15416 | case 1670: /* avx512f_cmpv16sf3_mask_round */ |
| 15417 | case 1669: /* avx512f_cmpv16sf3_round */ |
| 15418 | case 1668: /* avx512f_cmpv16sf3_mask */ |
| 15419 | case 1667: /* avx512f_cmpv16sf3 */ |
| 15420 | case 1664: /* avx512vl_cmpv4di3_mask */ |
| 15421 | case 1663: /* avx512vl_cmpv4di3 */ |
| 15422 | case 1662: /* avx512f_cmpv8di3_mask_round */ |
| 15423 | case 1661: /* avx512f_cmpv8di3_round */ |
| 15424 | case 1660: /* avx512f_cmpv8di3_mask */ |
| 15425 | case 1659: /* avx512f_cmpv8di3 */ |
| 15426 | case 1656: /* avx512vl_cmpv8si3_mask */ |
| 15427 | case 1655: /* avx512vl_cmpv8si3 */ |
| 15428 | case 1654: /* avx512f_cmpv16si3_mask_round */ |
| 15429 | case 1653: /* avx512f_cmpv16si3_round */ |
| 15430 | case 1652: /* avx512f_cmpv16si3_mask */ |
| 15431 | case 1651: /* avx512f_cmpv16si3 */ |
| 15432 | case 1648: /* sse2_maskcmpv2df3 */ |
| 15433 | case 1647: /* avx_maskcmpv4df3 */ |
| 15434 | case 1646: /* sse_maskcmpv4sf3 */ |
| 15435 | case 1645: /* avx_maskcmpv8sf3 */ |
| 15436 | case 1644: /* *sse2_maskcmpv2df3_comm */ |
| 15437 | case 1643: /* *avx_maskcmpv4df3_comm */ |
| 15438 | case 1642: /* *sse_maskcmpv4sf3_comm */ |
| 15439 | case 1641: /* *avx_maskcmpv8sf3_comm */ |
| 15440 | case 1638: /* avx_cmpv2df3 */ |
| 15441 | case 1637: /* avx_cmpv4df3 */ |
| 15442 | case 1636: /* avx_cmpv4sf3 */ |
| 15443 | case 1635: /* avx_cmpv8sf3 */ |
| 15444 | case 54: /* *cmpiuxf_i387 */ |
| 15445 | case 53: /* *cmpixf_i387 */ |
| 15446 | if (get_attr_memory (insn) == MEMORY_LOAD) |
| 15447 | { |
| 15448 | return 5; |
| 15449 | } |
| 15450 | else |
| 15451 | { |
| 15452 | return 3; |
| 15453 | } |
| 15454 | |
| 15455 | case 4984: /* atomic_bit_test_and_resetdi_1 */ |
| 15456 | case 4983: /* atomic_bit_test_and_resetsi_1 */ |
| 15457 | case 4982: /* atomic_bit_test_and_resethi_1 */ |
| 15458 | case 4981: /* atomic_bit_test_and_complementdi_1 */ |
| 15459 | case 4980: /* atomic_bit_test_and_complementsi_1 */ |
| 15460 | case 4979: /* atomic_bit_test_and_complementhi_1 */ |
| 15461 | case 4978: /* atomic_bit_test_and_setdi_1 */ |
| 15462 | case 4977: /* atomic_bit_test_and_setsi_1 */ |
| 15463 | case 4976: /* atomic_bit_test_and_sethi_1 */ |
| 15464 | case 4975: /* atomic_xordi */ |
| 15465 | case 4974: /* atomic_ordi */ |
| 15466 | case 4973: /* atomic_anddi */ |
| 15467 | case 4972: /* atomic_xorsi */ |
| 15468 | case 4971: /* atomic_orsi */ |
| 15469 | case 4970: /* atomic_andsi */ |
| 15470 | case 4969: /* atomic_xorhi */ |
| 15471 | case 4968: /* atomic_orhi */ |
| 15472 | case 4967: /* atomic_andhi */ |
| 15473 | case 4966: /* atomic_xorqi */ |
| 15474 | case 4965: /* atomic_orqi */ |
| 15475 | case 4964: /* atomic_andqi */ |
| 15476 | case 4963: /* atomic_subdi */ |
| 15477 | case 4962: /* atomic_subsi */ |
| 15478 | case 4961: /* atomic_subhi */ |
| 15479 | case 4960: /* atomic_subqi */ |
| 15480 | case 4959: /* atomic_adddi */ |
| 15481 | case 4958: /* atomic_addsi */ |
| 15482 | case 4957: /* atomic_addhi */ |
| 15483 | case 4956: /* atomic_addqi */ |
| 15484 | case 4955: /* atomic_exchangedi */ |
| 15485 | case 4954: /* atomic_exchangesi */ |
| 15486 | case 4953: /* atomic_exchangehi */ |
| 15487 | case 4952: /* atomic_exchangeqi */ |
| 15488 | case 4951: /* *atomic_fetch_add_cmpdi */ |
| 15489 | case 4950: /* *atomic_fetch_add_cmpsi */ |
| 15490 | case 4949: /* *atomic_fetch_add_cmphi */ |
| 15491 | case 4948: /* *atomic_fetch_add_cmpqi */ |
| 15492 | case 4947: /* atomic_fetch_adddi */ |
| 15493 | case 4946: /* atomic_fetch_addsi */ |
| 15494 | case 4945: /* atomic_fetch_addhi */ |
| 15495 | case 4944: /* atomic_fetch_addqi */ |
| 15496 | case 4943: /* atomic_compare_and_swapdi_1 */ |
| 15497 | case 4942: /* atomic_compare_and_swapsi_1 */ |
| 15498 | case 4941: /* atomic_compare_and_swaphi_1 */ |
| 15499 | case 4940: /* atomic_compare_and_swapqi_1 */ |
| 15500 | case 4939: /* atomic_compare_and_swapti_doubleword */ |
| 15501 | case 4938: /* atomic_compare_and_swapdi_doubleword */ |
| 15502 | case 4935: /* storedi_via_fpu */ |
| 15503 | case 4934: /* loaddi_via_fpu */ |
| 15504 | case 4933: /* atomic_storedi_fpu */ |
| 15505 | case 4932: /* atomic_storedi_1 */ |
| 15506 | case 4931: /* atomic_storesi_1 */ |
| 15507 | case 4930: /* atomic_storehi_1 */ |
| 15508 | case 4929: /* atomic_storeqi_1 */ |
| 15509 | case 4928: /* atomic_loaddi_fpu */ |
| 15510 | case 4927: /* mfence_nosse */ |
| 15511 | case 4923: /* vpopcountv8di_mask */ |
| 15512 | case 4922: /* vpopcountv8di */ |
| 15513 | case 4921: /* vpopcountv16si_mask */ |
| 15514 | case 4920: /* vpopcountv16si */ |
| 15515 | case 4901: /* *movv64si_internal */ |
| 15516 | case 4900: /* *movv64sf_internal */ |
| 15517 | case 4875: /* avx512f_pd512_256pd */ |
| 15518 | case 4874: /* avx512f_ps512_256ps */ |
| 15519 | case 4873: /* avx512f_si512_256si */ |
| 15520 | case 4872: /* avx512f_pd512_pd */ |
| 15521 | case 4871: /* avx512f_ps512_ps */ |
| 15522 | case 4870: /* avx512f_si512_si */ |
| 15523 | case 4832: /* avx512f_vgetmantv2df_round */ |
| 15524 | case 4831: /* avx512f_vgetmantv2df */ |
| 15525 | case 4830: /* avx512f_vgetmantv4sf_round */ |
| 15526 | case 4829: /* avx512f_vgetmantv4sf */ |
| 15527 | case 4828: /* avx512vl_getmantv2df_mask_round */ |
| 15528 | case 4827: /* avx512vl_getmantv2df_mask */ |
| 15529 | case 4826: /* avx512vl_getmantv2df_round */ |
| 15530 | case 4825: /* avx512vl_getmantv2df */ |
| 15531 | case 4824: /* avx512vl_getmantv4df_mask_round */ |
| 15532 | case 4823: /* avx512vl_getmantv4df_mask */ |
| 15533 | case 4822: /* avx512vl_getmantv4df_round */ |
| 15534 | case 4821: /* avx512vl_getmantv4df */ |
| 15535 | case 4820: /* avx512f_getmantv8df_mask_round */ |
| 15536 | case 4819: /* avx512f_getmantv8df_mask */ |
| 15537 | case 4818: /* avx512f_getmantv8df_round */ |
| 15538 | case 4817: /* avx512f_getmantv8df */ |
| 15539 | case 4816: /* avx512vl_getmantv4sf_mask_round */ |
| 15540 | case 4815: /* avx512vl_getmantv4sf_mask */ |
| 15541 | case 4814: /* avx512vl_getmantv4sf_round */ |
| 15542 | case 4813: /* avx512vl_getmantv4sf */ |
| 15543 | case 4812: /* avx512vl_getmantv8sf_mask_round */ |
| 15544 | case 4811: /* avx512vl_getmantv8sf_mask */ |
| 15545 | case 4810: /* avx512vl_getmantv8sf_round */ |
| 15546 | case 4809: /* avx512vl_getmantv8sf */ |
| 15547 | case 4808: /* avx512f_getmantv16sf_mask_round */ |
| 15548 | case 4807: /* avx512f_getmantv16sf_mask */ |
| 15549 | case 4806: /* avx512f_getmantv16sf_round */ |
| 15550 | case 4805: /* avx512f_getmantv16sf */ |
| 15551 | case 4770: /* avx512vl_expandv2df_mask */ |
| 15552 | case 4769: /* avx512vl_expandv2di_mask */ |
| 15553 | case 4768: /* avx512vl_expandv4sf_mask */ |
| 15554 | case 4767: /* avx512vl_expandv4si_mask */ |
| 15555 | case 4766: /* avx512vl_expandv4df_mask */ |
| 15556 | case 4765: /* avx512vl_expandv4di_mask */ |
| 15557 | case 4764: /* avx512vl_expandv8sf_mask */ |
| 15558 | case 4763: /* avx512vl_expandv8si_mask */ |
| 15559 | case 4762: /* avx512f_expandv8df_mask */ |
| 15560 | case 4761: /* avx512f_expandv8di_mask */ |
| 15561 | case 4760: /* avx512f_expandv16sf_mask */ |
| 15562 | case 4759: /* avx512f_expandv16si_mask */ |
| 15563 | case 4754: /* avx512vl_compressstorev4df_mask */ |
| 15564 | case 4753: /* avx512vl_compressstorev4di_mask */ |
| 15565 | case 4752: /* avx512vl_compressstorev8sf_mask */ |
| 15566 | case 4751: /* avx512vl_compressstorev8si_mask */ |
| 15567 | case 4750: /* avx512f_compressstorev8df_mask */ |
| 15568 | case 4749: /* avx512f_compressstorev8di_mask */ |
| 15569 | case 4748: /* avx512f_compressstorev16sf_mask */ |
| 15570 | case 4747: /* avx512f_compressstorev16si_mask */ |
| 15571 | case 4742: /* avx512vl_compressv4df_mask */ |
| 15572 | case 4741: /* avx512vl_compressv4di_mask */ |
| 15573 | case 4740: /* avx512vl_compressv8sf_mask */ |
| 15574 | case 4739: /* avx512vl_compressv8si_mask */ |
| 15575 | case 4738: /* avx512f_compressv8df_mask */ |
| 15576 | case 4737: /* avx512f_compressv8di_mask */ |
| 15577 | case 4736: /* avx512f_compressv16sf_mask */ |
| 15578 | case 4735: /* avx512f_compressv16si_mask */ |
| 15579 | case 4726: /* *avx512f_scatterdiv4df */ |
| 15580 | case 4725: /* *avx512f_scatterdiv4df */ |
| 15581 | case 4724: /* *avx512f_scatterdiv4di */ |
| 15582 | case 4723: /* *avx512f_scatterdiv4di */ |
| 15583 | case 4722: /* *avx512f_scatterdiv8sf */ |
| 15584 | case 4721: /* *avx512f_scatterdiv8sf */ |
| 15585 | case 4720: /* *avx512f_scatterdiv8si */ |
| 15586 | case 4719: /* *avx512f_scatterdiv8si */ |
| 15587 | case 4718: /* *avx512f_scatterdiv8df */ |
| 15588 | case 4717: /* *avx512f_scatterdiv8df */ |
| 15589 | case 4716: /* *avx512f_scatterdiv8di */ |
| 15590 | case 4715: /* *avx512f_scatterdiv8di */ |
| 15591 | case 4714: /* *avx512f_scatterdiv16sf */ |
| 15592 | case 4713: /* *avx512f_scatterdiv16sf */ |
| 15593 | case 4712: /* *avx512f_scatterdiv16si */ |
| 15594 | case 4711: /* *avx512f_scatterdiv16si */ |
| 15595 | case 4702: /* *avx512f_scattersiv4df */ |
| 15596 | case 4701: /* *avx512f_scattersiv4df */ |
| 15597 | case 4700: /* *avx512f_scattersiv4di */ |
| 15598 | case 4699: /* *avx512f_scattersiv4di */ |
| 15599 | case 4698: /* *avx512f_scattersiv8sf */ |
| 15600 | case 4697: /* *avx512f_scattersiv8sf */ |
| 15601 | case 4696: /* *avx512f_scattersiv8si */ |
| 15602 | case 4695: /* *avx512f_scattersiv8si */ |
| 15603 | case 4694: /* *avx512f_scattersiv8df */ |
| 15604 | case 4693: /* *avx512f_scattersiv8df */ |
| 15605 | case 4692: /* *avx512f_scattersiv8di */ |
| 15606 | case 4691: /* *avx512f_scattersiv8di */ |
| 15607 | case 4690: /* *avx512f_scattersiv16sf */ |
| 15608 | case 4689: /* *avx512f_scattersiv16sf */ |
| 15609 | case 4688: /* *avx512f_scattersiv16si */ |
| 15610 | case 4687: /* *avx512f_scattersiv16si */ |
| 15611 | case 4678: /* *avx512f_gatherdiv4df_2 */ |
| 15612 | case 4677: /* *avx512f_gatherdiv4df_2 */ |
| 15613 | case 4676: /* *avx512f_gatherdiv4di_2 */ |
| 15614 | case 4675: /* *avx512f_gatherdiv4di_2 */ |
| 15615 | case 4674: /* *avx512f_gatherdiv8sf_2 */ |
| 15616 | case 4673: /* *avx512f_gatherdiv8sf_2 */ |
| 15617 | case 4672: /* *avx512f_gatherdiv8si_2 */ |
| 15618 | case 4671: /* *avx512f_gatherdiv8si_2 */ |
| 15619 | case 4670: /* *avx512f_gatherdiv8df_2 */ |
| 15620 | case 4669: /* *avx512f_gatherdiv8df_2 */ |
| 15621 | case 4668: /* *avx512f_gatherdiv8di_2 */ |
| 15622 | case 4667: /* *avx512f_gatherdiv8di_2 */ |
| 15623 | case 4666: /* *avx512f_gatherdiv16sf_2 */ |
| 15624 | case 4665: /* *avx512f_gatherdiv16sf_2 */ |
| 15625 | case 4664: /* *avx512f_gatherdiv16si_2 */ |
| 15626 | case 4663: /* *avx512f_gatherdiv16si_2 */ |
| 15627 | case 4654: /* *avx512f_gatherdiv4df */ |
| 15628 | case 4653: /* *avx512f_gatherdiv4df */ |
| 15629 | case 4652: /* *avx512f_gatherdiv4di */ |
| 15630 | case 4651: /* *avx512f_gatherdiv4di */ |
| 15631 | case 4650: /* *avx512f_gatherdiv8sf */ |
| 15632 | case 4649: /* *avx512f_gatherdiv8sf */ |
| 15633 | case 4648: /* *avx512f_gatherdiv8si */ |
| 15634 | case 4647: /* *avx512f_gatherdiv8si */ |
| 15635 | case 4646: /* *avx512f_gatherdiv8df */ |
| 15636 | case 4645: /* *avx512f_gatherdiv8df */ |
| 15637 | case 4644: /* *avx512f_gatherdiv8di */ |
| 15638 | case 4643: /* *avx512f_gatherdiv8di */ |
| 15639 | case 4642: /* *avx512f_gatherdiv16sf */ |
| 15640 | case 4641: /* *avx512f_gatherdiv16sf */ |
| 15641 | case 4640: /* *avx512f_gatherdiv16si */ |
| 15642 | case 4639: /* *avx512f_gatherdiv16si */ |
| 15643 | case 4630: /* *avx512f_gathersiv4df_2 */ |
| 15644 | case 4629: /* *avx512f_gathersiv4df_2 */ |
| 15645 | case 4628: /* *avx512f_gathersiv4di_2 */ |
| 15646 | case 4627: /* *avx512f_gathersiv4di_2 */ |
| 15647 | case 4626: /* *avx512f_gathersiv8sf_2 */ |
| 15648 | case 4625: /* *avx512f_gathersiv8sf_2 */ |
| 15649 | case 4624: /* *avx512f_gathersiv8si_2 */ |
| 15650 | case 4623: /* *avx512f_gathersiv8si_2 */ |
| 15651 | case 4622: /* *avx512f_gathersiv8df_2 */ |
| 15652 | case 4621: /* *avx512f_gathersiv8df_2 */ |
| 15653 | case 4620: /* *avx512f_gathersiv8di_2 */ |
| 15654 | case 4619: /* *avx512f_gathersiv8di_2 */ |
| 15655 | case 4618: /* *avx512f_gathersiv16sf_2 */ |
| 15656 | case 4617: /* *avx512f_gathersiv16sf_2 */ |
| 15657 | case 4616: /* *avx512f_gathersiv16si_2 */ |
| 15658 | case 4615: /* *avx512f_gathersiv16si_2 */ |
| 15659 | case 4606: /* *avx512f_gathersiv4df */ |
| 15660 | case 4605: /* *avx512f_gathersiv4df */ |
| 15661 | case 4604: /* *avx512f_gathersiv4di */ |
| 15662 | case 4603: /* *avx512f_gathersiv4di */ |
| 15663 | case 4602: /* *avx512f_gathersiv8sf */ |
| 15664 | case 4601: /* *avx512f_gathersiv8sf */ |
| 15665 | case 4600: /* *avx512f_gathersiv8si */ |
| 15666 | case 4599: /* *avx512f_gathersiv8si */ |
| 15667 | case 4598: /* *avx512f_gathersiv8df */ |
| 15668 | case 4597: /* *avx512f_gathersiv8df */ |
| 15669 | case 4596: /* *avx512f_gathersiv8di */ |
| 15670 | case 4595: /* *avx512f_gathersiv8di */ |
| 15671 | case 4594: /* *avx512f_gathersiv16sf */ |
| 15672 | case 4593: /* *avx512f_gathersiv16sf */ |
| 15673 | case 4592: /* *avx512f_gathersiv16si */ |
| 15674 | case 4591: /* *avx512f_gathersiv16si */ |
| 15675 | case 4590: /* *avx2_gatherdiv8sf_4 */ |
| 15676 | case 4589: /* *avx2_gatherdiv8sf_4 */ |
| 15677 | case 4588: /* *avx2_gatherdiv8si_4 */ |
| 15678 | case 4587: /* *avx2_gatherdiv8si_4 */ |
| 15679 | case 4586: /* *avx2_gatherdiv8sf_3 */ |
| 15680 | case 4585: /* *avx2_gatherdiv8sf_3 */ |
| 15681 | case 4584: /* *avx2_gatherdiv8si_3 */ |
| 15682 | case 4583: /* *avx2_gatherdiv8si_3 */ |
| 15683 | case 4582: /* *avx2_gatherdiv8sf_2 */ |
| 15684 | case 4581: /* *avx2_gatherdiv8sf_2 */ |
| 15685 | case 4580: /* *avx2_gatherdiv8si_2 */ |
| 15686 | case 4579: /* *avx2_gatherdiv8si_2 */ |
| 15687 | case 4574: /* *avx2_gatherdiv4df_2 */ |
| 15688 | case 4573: /* *avx2_gatherdiv4df_2 */ |
| 15689 | case 4572: /* *avx2_gatherdiv4di_2 */ |
| 15690 | case 4571: /* *avx2_gatherdiv4di_2 */ |
| 15691 | case 4566: /* *avx2_gatherdiv8sf */ |
| 15692 | case 4565: /* *avx2_gatherdiv8sf */ |
| 15693 | case 4564: /* *avx2_gatherdiv8si */ |
| 15694 | case 4563: /* *avx2_gatherdiv8si */ |
| 15695 | case 4558: /* *avx2_gatherdiv4df */ |
| 15696 | case 4557: /* *avx2_gatherdiv4df */ |
| 15697 | case 4556: /* *avx2_gatherdiv4di */ |
| 15698 | case 4555: /* *avx2_gatherdiv4di */ |
| 15699 | case 4550: /* *avx2_gathersiv8sf_2 */ |
| 15700 | case 4549: /* *avx2_gathersiv8sf_2 */ |
| 15701 | case 4548: /* *avx2_gathersiv8si_2 */ |
| 15702 | case 4547: /* *avx2_gathersiv8si_2 */ |
| 15703 | case 4542: /* *avx2_gathersiv4df_2 */ |
| 15704 | case 4541: /* *avx2_gathersiv4df_2 */ |
| 15705 | case 4540: /* *avx2_gathersiv4di_2 */ |
| 15706 | case 4539: /* *avx2_gathersiv4di_2 */ |
| 15707 | case 4534: /* *avx2_gathersiv8sf */ |
| 15708 | case 4533: /* *avx2_gathersiv8sf */ |
| 15709 | case 4532: /* *avx2_gathersiv8si */ |
| 15710 | case 4531: /* *avx2_gathersiv8si */ |
| 15711 | case 4526: /* *avx2_gathersiv4df */ |
| 15712 | case 4525: /* *avx2_gathersiv4df */ |
| 15713 | case 4524: /* *avx2_gathersiv4di */ |
| 15714 | case 4523: /* *avx2_gathersiv4di */ |
| 15715 | case 4435: /* avx_pd256_pd */ |
| 15716 | case 4434: /* avx_ps256_ps */ |
| 15717 | case 4433: /* avx_si256_si */ |
| 15718 | case 4252: /* *avx_vperm_broadcast_v4df */ |
| 15719 | case 4251: /* *avx_vperm_broadcast_v8sf */ |
| 15720 | case 4243: /* avx512dq_broadcastv4df_mask_1 */ |
| 15721 | case 4242: /* *avx512dq_broadcastv4df_1 */ |
| 15722 | case 4241: /* avx512dq_broadcastv4di_mask_1 */ |
| 15723 | case 4240: /* *avx512dq_broadcastv4di_1 */ |
| 15724 | case 4239: /* avx512dq_broadcastv8df_mask_1 */ |
| 15725 | case 4238: /* *avx512dq_broadcastv8df_1 */ |
| 15726 | case 4237: /* avx512dq_broadcastv8di_mask_1 */ |
| 15727 | case 4236: /* *avx512dq_broadcastv8di_1 */ |
| 15728 | case 4235: /* avx512dq_broadcastv16si_mask_1 */ |
| 15729 | case 4234: /* *avx512dq_broadcastv16si_1 */ |
| 15730 | case 4233: /* avx512dq_broadcastv16sf_mask_1 */ |
| 15731 | case 4232: /* *avx512dq_broadcastv16sf_1 */ |
| 15732 | case 4231: /* avx512vl_broadcastv8sf_mask_1 */ |
| 15733 | case 4230: /* *avx512vl_broadcastv8sf_1 */ |
| 15734 | case 4229: /* avx512vl_broadcastv8si_mask_1 */ |
| 15735 | case 4228: /* *avx512vl_broadcastv8si_1 */ |
| 15736 | case 4227: /* avx512dq_broadcastv8sf_mask */ |
| 15737 | case 4226: /* *avx512dq_broadcastv8sf */ |
| 15738 | case 4225: /* avx512dq_broadcastv16sf_mask */ |
| 15739 | case 4224: /* *avx512dq_broadcastv16sf */ |
| 15740 | case 4221: /* avx512dq_broadcastv8si_mask */ |
| 15741 | case 4220: /* *avx512dq_broadcastv8si */ |
| 15742 | case 4219: /* avx512dq_broadcastv16si_mask */ |
| 15743 | case 4218: /* *avx512dq_broadcastv16si */ |
| 15744 | case 4211: /* vec_dupv4df */ |
| 15745 | case 4210: /* vec_dupv4di */ |
| 15746 | case 4209: /* vec_dupv8sf */ |
| 15747 | case 4208: /* vec_dupv8si */ |
| 15748 | case 4206: /* *vec_dupv8si */ |
| 15749 | case 4204: /* *vec_dupv16hi */ |
| 15750 | case 4202: /* *vec_dupv32qi */ |
| 15751 | case 4201: /* avx2_vbroadcasti128_v4di */ |
| 15752 | case 4200: /* avx2_vbroadcasti128_v8si */ |
| 15753 | case 4199: /* avx2_vbroadcasti128_v16hi */ |
| 15754 | case 4198: /* avx2_vbroadcasti128_v32qi */ |
| 15755 | case 4192: /* avx512vl_vec_dup_gprv4df_mask */ |
| 15756 | case 4191: /* *avx512vl_vec_dup_gprv4df */ |
| 15757 | case 4190: /* avx512f_vec_dup_gprv8df_mask */ |
| 15758 | case 4189: /* *avx512f_vec_dup_gprv8df */ |
| 15759 | case 4186: /* avx512vl_vec_dup_gprv8sf_mask */ |
| 15760 | case 4185: /* *avx512vl_vec_dup_gprv8sf */ |
| 15761 | case 4184: /* avx512f_vec_dup_gprv16sf_mask */ |
| 15762 | case 4183: /* *avx512f_vec_dup_gprv16sf */ |
| 15763 | case 4180: /* avx512vl_vec_dup_gprv4di_mask */ |
| 15764 | case 4179: /* *avx512vl_vec_dup_gprv4di */ |
| 15765 | case 4178: /* avx512f_vec_dup_gprv8di_mask */ |
| 15766 | case 4177: /* *avx512f_vec_dup_gprv8di */ |
| 15767 | case 4174: /* avx512vl_vec_dup_gprv8si_mask */ |
| 15768 | case 4173: /* *avx512vl_vec_dup_gprv8si */ |
| 15769 | case 4172: /* avx512f_vec_dup_gprv16si_mask */ |
| 15770 | case 4171: /* *avx512f_vec_dup_gprv16si */ |
| 15771 | case 4168: /* avx512vl_vec_dup_gprv16hi_mask */ |
| 15772 | case 4167: /* *avx512vl_vec_dup_gprv16hi */ |
| 15773 | case 4166: /* avx512bw_vec_dup_gprv32hi_mask */ |
| 15774 | case 4165: /* *avx512bw_vec_dup_gprv32hi */ |
| 15775 | case 4164: /* avx512vl_vec_dup_gprv32qi_mask */ |
| 15776 | case 4163: /* *avx512vl_vec_dup_gprv32qi */ |
| 15777 | case 4160: /* avx512bw_vec_dup_gprv64qi_mask */ |
| 15778 | case 4159: /* *avx512bw_vec_dup_gprv64qi */ |
| 15779 | case 4158: /* avx512f_broadcastv8di_mask */ |
| 15780 | case 4157: /* *avx512f_broadcastv8di */ |
| 15781 | case 4156: /* avx512f_broadcastv8df_mask */ |
| 15782 | case 4155: /* *avx512f_broadcastv8df */ |
| 15783 | case 4154: /* avx512f_broadcastv16si_mask */ |
| 15784 | case 4153: /* *avx512f_broadcastv16si */ |
| 15785 | case 4152: /* avx512f_broadcastv16sf_mask */ |
| 15786 | case 4151: /* *avx512f_broadcastv16sf */ |
| 15787 | case 4148: /* avx512vl_vec_dupv16hi_mask */ |
| 15788 | case 4147: /* avx512vl_vec_dupv16hi */ |
| 15789 | case 4146: /* avx512bw_vec_dupv32hi_mask */ |
| 15790 | case 4145: /* avx512bw_vec_dupv32hi */ |
| 15791 | case 4144: /* avx512vl_vec_dupv32qi_mask */ |
| 15792 | case 4143: /* avx512vl_vec_dupv32qi */ |
| 15793 | case 4140: /* avx512bw_vec_dupv64qi_mask */ |
| 15794 | case 4139: /* avx512bw_vec_dupv64qi */ |
| 15795 | case 4136: /* avx512vl_vec_dupv4df_mask */ |
| 15796 | case 4135: /* avx512vl_vec_dupv4df */ |
| 15797 | case 4134: /* avx512f_vec_dupv8df_mask */ |
| 15798 | case 4133: /* avx512f_vec_dupv8df */ |
| 15799 | case 4130: /* avx512vl_vec_dupv8sf_mask */ |
| 15800 | case 4129: /* avx512vl_vec_dupv8sf */ |
| 15801 | case 4128: /* avx512f_vec_dupv16sf_mask */ |
| 15802 | case 4127: /* avx512f_vec_dupv16sf */ |
| 15803 | case 4124: /* avx512vl_vec_dupv4di_mask */ |
| 15804 | case 4123: /* avx512vl_vec_dupv4di */ |
| 15805 | case 4122: /* avx512f_vec_dupv8di_mask */ |
| 15806 | case 4121: /* avx512f_vec_dupv8di */ |
| 15807 | case 4118: /* avx512vl_vec_dupv8si_mask */ |
| 15808 | case 4117: /* avx512vl_vec_dupv8si */ |
| 15809 | case 4116: /* avx512f_vec_dupv16si_mask */ |
| 15810 | case 4115: /* avx512f_vec_dupv16si */ |
| 15811 | case 4114: /* avx512bw_vec_dupv64qi_1 */ |
| 15812 | case 4113: /* avx512bw_vec_dupv32hi_1 */ |
| 15813 | case 4112: /* avx512f_vec_dupv8di_1 */ |
| 15814 | case 4111: /* avx512f_vec_dupv16si_1 */ |
| 15815 | case 4072: /* avx2_pbroadcastv4di_1 */ |
| 15816 | case 4071: /* avx2_pbroadcastv8si_1 */ |
| 15817 | case 4070: /* avx2_pbroadcastv16hi_1 */ |
| 15818 | case 4069: /* avx2_pbroadcastv32qi_1 */ |
| 15819 | case 4067: /* avx2_pbroadcastv4di */ |
| 15820 | case 4065: /* avx2_pbroadcastv8si */ |
| 15821 | case 4063: /* avx2_pbroadcastv16hi */ |
| 15822 | case 4062: /* avx2_pbroadcastv32hi */ |
| 15823 | case 4060: /* avx2_pbroadcastv32qi */ |
| 15824 | case 4059: /* avx2_pbroadcastv64qi */ |
| 15825 | case 4058: /* avx2_pbroadcastv8di */ |
| 15826 | case 4057: /* avx2_pbroadcastv16si */ |
| 15827 | case 3869: /* avx2_zero_extendv4siv4di2_mask */ |
| 15828 | case 3868: /* avx2_zero_extendv4siv4di2 */ |
| 15829 | case 3867: /* avx2_sign_extendv4siv4di2_mask */ |
| 15830 | case 3866: /* avx2_sign_extendv4siv4di2 */ |
| 15831 | case 3865: /* avx512f_zero_extendv8siv8di2_mask */ |
| 15832 | case 3864: /* avx512f_zero_extendv8siv8di2 */ |
| 15833 | case 3863: /* avx512f_sign_extendv8siv8di2_mask */ |
| 15834 | case 3862: /* avx512f_sign_extendv8siv8di2 */ |
| 15835 | case 3857: /* avx2_zero_extendv4hiv4di2_mask */ |
| 15836 | case 3856: /* avx2_zero_extendv4hiv4di2 */ |
| 15837 | case 3855: /* avx2_sign_extendv4hiv4di2_mask */ |
| 15838 | case 3854: /* avx2_sign_extendv4hiv4di2 */ |
| 15839 | case 3853: /* avx512f_zero_extendv8hiv8di2_mask */ |
| 15840 | case 3852: /* avx512f_zero_extendv8hiv8di2 */ |
| 15841 | case 3851: /* avx512f_sign_extendv8hiv8di2_mask */ |
| 15842 | case 3850: /* avx512f_sign_extendv8hiv8di2 */ |
| 15843 | case 3845: /* avx2_zero_extendv4qiv4di2_mask */ |
| 15844 | case 3844: /* avx2_zero_extendv4qiv4di2 */ |
| 15845 | case 3843: /* avx2_sign_extendv4qiv4di2_mask */ |
| 15846 | case 3842: /* avx2_sign_extendv4qiv4di2 */ |
| 15847 | case 3841: /* avx512f_zero_extendv8qiv8di2_mask */ |
| 15848 | case 3840: /* avx512f_zero_extendv8qiv8di2 */ |
| 15849 | case 3839: /* avx512f_sign_extendv8qiv8di2_mask */ |
| 15850 | case 3838: /* avx512f_sign_extendv8qiv8di2 */ |
| 15851 | case 3833: /* avx2_zero_extendv8hiv8si2_mask */ |
| 15852 | case 3832: /* avx2_zero_extendv8hiv8si2 */ |
| 15853 | case 3831: /* avx2_sign_extendv8hiv8si2_mask */ |
| 15854 | case 3830: /* avx2_sign_extendv8hiv8si2 */ |
| 15855 | case 3829: /* avx512f_zero_extendv16hiv16si2_mask */ |
| 15856 | case 3828: /* avx512f_zero_extendv16hiv16si2 */ |
| 15857 | case 3827: /* avx512f_sign_extendv16hiv16si2_mask */ |
| 15858 | case 3826: /* avx512f_sign_extendv16hiv16si2 */ |
| 15859 | case 3821: /* avx2_zero_extendv8qiv8si2_mask */ |
| 15860 | case 3820: /* avx2_zero_extendv8qiv8si2 */ |
| 15861 | case 3819: /* avx2_sign_extendv8qiv8si2_mask */ |
| 15862 | case 3818: /* avx2_sign_extendv8qiv8si2 */ |
| 15863 | case 3817: /* avx512f_zero_extendv16qiv16si2_mask */ |
| 15864 | case 3816: /* *avx512f_zero_extendv16qiv16si2 */ |
| 15865 | case 3815: /* avx512f_sign_extendv16qiv16si2_mask */ |
| 15866 | case 3814: /* *avx512f_sign_extendv16qiv16si2 */ |
| 15867 | case 3809: /* avx512bw_zero_extendv32qiv32hi2_mask */ |
| 15868 | case 3808: /* avx512bw_zero_extendv32qiv32hi2 */ |
| 15869 | case 3807: /* avx512bw_sign_extendv32qiv32hi2_mask */ |
| 15870 | case 3806: /* avx512bw_sign_extendv32qiv32hi2 */ |
| 15871 | case 3805: /* avx2_zero_extendv16qiv16hi2_mask */ |
| 15872 | case 3804: /* avx2_zero_extendv16qiv16hi2 */ |
| 15873 | case 3803: /* avx2_sign_extendv16qiv16hi2_mask */ |
| 15874 | case 3802: /* avx2_sign_extendv16qiv16hi2 */ |
| 15875 | case 3799: /* avx2_pblenddv8si */ |
| 15876 | case 3798: /* *avx2_pblendw */ |
| 15877 | case 3795: /* avx2_pblendvb */ |
| 15878 | case 3785: /* avx2_movntdqa */ |
| 15879 | case 3784: /* avx512f_movntdqa */ |
| 15880 | case 3778: /* avx_blendvpd256 */ |
| 15881 | case 3776: /* avx_blendvps256 */ |
| 15882 | case 3774: /* avx_blendpd256 */ |
| 15883 | case 3772: /* avx_blendps256 */ |
| 15884 | case 3767: /* sse4a_vmmovntv2df */ |
| 15885 | case 3765: /* sse4a_movntdf */ |
| 15886 | case 3677: /* sse3_monitor_di */ |
| 15887 | case 3676: /* sse3_monitor_si */ |
| 15888 | case 3675: /* sse3_mwait */ |
| 15889 | case 3669: /* *sse2_pmovmskb_zext */ |
| 15890 | case 3668: /* *avx2_pmovmskb_zext */ |
| 15891 | case 3667: /* sse2_pmovmskb */ |
| 15892 | case 3666: /* avx2_pmovmskb */ |
| 15893 | case 3664: /* *avx_movmskpd256_zext */ |
| 15894 | case 3662: /* *avx_movmskps256_zext */ |
| 15895 | case 3660: /* avx_movmskpd256 */ |
| 15896 | case 3658: /* avx_movmskps256 */ |
| 15897 | case 3637: /* *vec_extractv4si_zext_mem */ |
| 15898 | case 3636: /* *vec_extractv4si_mem */ |
| 15899 | case 3633: /* *vec_extractv4si_0_zext */ |
| 15900 | case 3632: /* *vec_extractv4si_0_zext_sse4 */ |
| 15901 | case 3631: /* *vec_extractv2di_0_sse */ |
| 15902 | case 3630: /* *vec_extractv2di_0 */ |
| 15903 | case 3629: /* *vec_extractv4si_0 */ |
| 15904 | case 3628: /* *vec_extractv8hi_mem */ |
| 15905 | case 3627: /* *vec_extractv16qi_mem */ |
| 15906 | case 3503: /* avx512vl_testnmv2di3_mask */ |
| 15907 | case 3502: /* avx512vl_testnmv2di3 */ |
| 15908 | case 3501: /* avx512vl_testnmv4di3_mask */ |
| 15909 | case 3500: /* avx512vl_testnmv4di3 */ |
| 15910 | case 3499: /* avx512f_testnmv8di3_mask */ |
| 15911 | case 3498: /* avx512f_testnmv8di3 */ |
| 15912 | case 3497: /* avx512vl_testnmv4si3_mask */ |
| 15913 | case 3496: /* avx512vl_testnmv4si3 */ |
| 15914 | case 3495: /* avx512vl_testnmv8si3_mask */ |
| 15915 | case 3494: /* avx512vl_testnmv8si3 */ |
| 15916 | case 3493: /* avx512f_testnmv16si3_mask */ |
| 15917 | case 3492: /* avx512f_testnmv16si3 */ |
| 15918 | case 3491: /* avx512vl_testnmv8hi3_mask */ |
| 15919 | case 3490: /* avx512vl_testnmv8hi3 */ |
| 15920 | case 3489: /* avx512vl_testnmv16hi3_mask */ |
| 15921 | case 3488: /* avx512vl_testnmv16hi3 */ |
| 15922 | case 3487: /* avx512bw_testnmv32hi3_mask */ |
| 15923 | case 3486: /* avx512bw_testnmv32hi3 */ |
| 15924 | case 3485: /* avx512vl_testnmv32qi3_mask */ |
| 15925 | case 3484: /* avx512vl_testnmv32qi3 */ |
| 15926 | case 3483: /* avx512vl_testnmv16qi3_mask */ |
| 15927 | case 3482: /* avx512vl_testnmv16qi3 */ |
| 15928 | case 3481: /* avx512bw_testnmv64qi3_mask */ |
| 15929 | case 3480: /* avx512bw_testnmv64qi3 */ |
| 15930 | case 3479: /* avx512vl_testmv2di3_mask */ |
| 15931 | case 3478: /* avx512vl_testmv2di3 */ |
| 15932 | case 3477: /* avx512vl_testmv4di3_mask */ |
| 15933 | case 3476: /* avx512vl_testmv4di3 */ |
| 15934 | case 3475: /* avx512f_testmv8di3_mask */ |
| 15935 | case 3474: /* avx512f_testmv8di3 */ |
| 15936 | case 3473: /* avx512vl_testmv4si3_mask */ |
| 15937 | case 3472: /* avx512vl_testmv4si3 */ |
| 15938 | case 3471: /* avx512vl_testmv8si3_mask */ |
| 15939 | case 3470: /* avx512vl_testmv8si3 */ |
| 15940 | case 3469: /* avx512f_testmv16si3_mask */ |
| 15941 | case 3468: /* avx512f_testmv16si3 */ |
| 15942 | case 3467: /* avx512vl_testmv8hi3_mask */ |
| 15943 | case 3466: /* avx512vl_testmv8hi3 */ |
| 15944 | case 3465: /* avx512vl_testmv16hi3_mask */ |
| 15945 | case 3464: /* avx512vl_testmv16hi3 */ |
| 15946 | case 3463: /* avx512bw_testmv32hi3_mask */ |
| 15947 | case 3462: /* avx512bw_testmv32hi3 */ |
| 15948 | case 3461: /* avx512vl_testmv32qi3_mask */ |
| 15949 | case 3460: /* avx512vl_testmv32qi3 */ |
| 15950 | case 3459: /* avx512vl_testmv16qi3_mask */ |
| 15951 | case 3458: /* avx512vl_testmv16qi3 */ |
| 15952 | case 3457: /* avx512bw_testmv64qi3_mask */ |
| 15953 | case 3456: /* avx512bw_testmv64qi3 */ |
| 15954 | case 3191: /* avx512vl_rorv2di_mask */ |
| 15955 | case 3190: /* avx512vl_rorv2di */ |
| 15956 | case 3189: /* avx512vl_rolv2di_mask */ |
| 15957 | case 3188: /* avx512vl_rolv2di */ |
| 15958 | case 3187: /* avx512vl_rorv4di_mask */ |
| 15959 | case 3186: /* avx512vl_rorv4di */ |
| 15960 | case 3185: /* avx512vl_rolv4di_mask */ |
| 15961 | case 3184: /* avx512vl_rolv4di */ |
| 15962 | case 3183: /* avx512f_rorv8di_mask */ |
| 15963 | case 3182: /* avx512f_rorv8di */ |
| 15964 | case 3181: /* avx512f_rolv8di_mask */ |
| 15965 | case 3180: /* avx512f_rolv8di */ |
| 15966 | case 3179: /* avx512vl_rorv4si_mask */ |
| 15967 | case 3178: /* avx512vl_rorv4si */ |
| 15968 | case 3177: /* avx512vl_rolv4si_mask */ |
| 15969 | case 3176: /* avx512vl_rolv4si */ |
| 15970 | case 3175: /* avx512vl_rorv8si_mask */ |
| 15971 | case 3174: /* avx512vl_rorv8si */ |
| 15972 | case 3173: /* avx512vl_rolv8si_mask */ |
| 15973 | case 3172: /* avx512vl_rolv8si */ |
| 15974 | case 3171: /* avx512f_rorv16si_mask */ |
| 15975 | case 3170: /* avx512f_rorv16si */ |
| 15976 | case 3169: /* avx512f_rolv16si_mask */ |
| 15977 | case 3168: /* avx512f_rolv16si */ |
| 15978 | case 3167: /* avx512vl_rorvv2di_mask */ |
| 15979 | case 3166: /* avx512vl_rorvv2di */ |
| 15980 | case 3165: /* avx512vl_rolvv2di_mask */ |
| 15981 | case 3164: /* avx512vl_rolvv2di */ |
| 15982 | case 3163: /* avx512vl_rorvv4di_mask */ |
| 15983 | case 3162: /* avx512vl_rorvv4di */ |
| 15984 | case 3161: /* avx512vl_rolvv4di_mask */ |
| 15985 | case 3160: /* avx512vl_rolvv4di */ |
| 15986 | case 3159: /* avx512f_rorvv8di_mask */ |
| 15987 | case 3158: /* avx512f_rorvv8di */ |
| 15988 | case 3157: /* avx512f_rolvv8di_mask */ |
| 15989 | case 3156: /* avx512f_rolvv8di */ |
| 15990 | case 3155: /* avx512vl_rorvv4si_mask */ |
| 15991 | case 3154: /* avx512vl_rorvv4si */ |
| 15992 | case 3153: /* avx512vl_rolvv4si_mask */ |
| 15993 | case 3152: /* avx512vl_rolvv4si */ |
| 15994 | case 3151: /* avx512vl_rorvv8si_mask */ |
| 15995 | case 3150: /* avx512vl_rorvv8si */ |
| 15996 | case 3149: /* avx512vl_rolvv8si_mask */ |
| 15997 | case 3148: /* avx512vl_rolvv8si */ |
| 15998 | case 3147: /* avx512f_rorvv16si_mask */ |
| 15999 | case 3146: /* avx512f_rorvv16si */ |
| 16000 | case 3145: /* avx512f_rolvv16si_mask */ |
| 16001 | case 3144: /* avx512f_rolvv16si */ |
| 16002 | case 2765: /* avx512bw_us_truncatev32hiv32qi2_mask */ |
| 16003 | case 2764: /* avx512bw_truncatev32hiv32qi2_mask */ |
| 16004 | case 2763: /* avx512bw_ss_truncatev32hiv32qi2_mask */ |
| 16005 | case 2762: /* avx512bw_us_truncatev32hiv32qi2 */ |
| 16006 | case 2761: /* avx512bw_truncatev32hiv32qi2 */ |
| 16007 | case 2760: /* avx512bw_ss_truncatev32hiv32qi2 */ |
| 16008 | case 2756: /* avx512f_us_truncatev8div8si2_mask */ |
| 16009 | case 2755: /* avx512f_truncatev8div8si2_mask */ |
| 16010 | case 2754: /* avx512f_ss_truncatev8div8si2_mask */ |
| 16011 | case 2753: /* avx512f_us_truncatev16siv16hi2_mask */ |
| 16012 | case 2752: /* avx512f_truncatev16siv16hi2_mask */ |
| 16013 | case 2751: /* avx512f_ss_truncatev16siv16hi2_mask */ |
| 16014 | case 2744: /* *avx512f_us_truncatev8div8si2 */ |
| 16015 | case 2743: /* *avx512f_truncatev8div8si2 */ |
| 16016 | case 2742: /* *avx512f_ss_truncatev8div8si2 */ |
| 16017 | case 2741: /* *avx512f_us_truncatev16siv16hi2 */ |
| 16018 | case 2740: /* *avx512f_truncatev16siv16hi2 */ |
| 16019 | case 2739: /* *avx512f_ss_truncatev16siv16hi2 */ |
| 16020 | case 2704: /* avx512f_rndscalev2df_round */ |
| 16021 | case 2703: /* avx512f_rndscalev2df */ |
| 16022 | case 2702: /* avx512f_rndscalev4sf_round */ |
| 16023 | case 2701: /* avx512f_rndscalev4sf */ |
| 16024 | case 2700: /* avx512vl_rndscalev2df_mask_round */ |
| 16025 | case 2699: /* avx512vl_rndscalev2df_mask */ |
| 16026 | case 2698: /* avx512vl_rndscalev2df_round */ |
| 16027 | case 2697: /* avx512vl_rndscalev2df */ |
| 16028 | case 2696: /* avx512vl_rndscalev4df_mask_round */ |
| 16029 | case 2695: /* avx512vl_rndscalev4df_mask */ |
| 16030 | case 2694: /* avx512vl_rndscalev4df_round */ |
| 16031 | case 2693: /* avx512vl_rndscalev4df */ |
| 16032 | case 2692: /* avx512f_rndscalev8df_mask_round */ |
| 16033 | case 2691: /* avx512f_rndscalev8df_mask */ |
| 16034 | case 2690: /* avx512f_rndscalev8df_round */ |
| 16035 | case 2689: /* avx512f_rndscalev8df */ |
| 16036 | case 2688: /* avx512vl_rndscalev4sf_mask_round */ |
| 16037 | case 2687: /* avx512vl_rndscalev4sf_mask */ |
| 16038 | case 2686: /* avx512vl_rndscalev4sf_round */ |
| 16039 | case 2685: /* avx512vl_rndscalev4sf */ |
| 16040 | case 2684: /* avx512vl_rndscalev8sf_mask_round */ |
| 16041 | case 2683: /* avx512vl_rndscalev8sf_mask */ |
| 16042 | case 2682: /* avx512vl_rndscalev8sf_round */ |
| 16043 | case 2681: /* avx512vl_rndscalev8sf */ |
| 16044 | case 2680: /* avx512f_rndscalev16sf_mask_round */ |
| 16045 | case 2679: /* avx512f_rndscalev16sf_mask */ |
| 16046 | case 2678: /* avx512f_rndscalev16sf_round */ |
| 16047 | case 2677: /* avx512f_rndscalev16sf */ |
| 16048 | case 2676: /* avx512f_sfixupimmv2df_mask_round */ |
| 16049 | case 2675: /* avx512f_sfixupimmv2df_mask */ |
| 16050 | case 2674: /* avx512f_sfixupimmv4sf_mask_round */ |
| 16051 | case 2673: /* avx512f_sfixupimmv4sf_mask */ |
| 16052 | case 2672: /* avx512f_sfixupimmv2df_maskz_1_round */ |
| 16053 | case 2671: /* avx512f_sfixupimmv2df_maskz_1 */ |
| 16054 | case 2670: /* avx512f_sfixupimmv2df_round */ |
| 16055 | case 2669: /* avx512f_sfixupimmv2df */ |
| 16056 | case 2668: /* avx512f_sfixupimmv4sf_maskz_1_round */ |
| 16057 | case 2667: /* avx512f_sfixupimmv4sf_maskz_1 */ |
| 16058 | case 2666: /* avx512f_sfixupimmv4sf_round */ |
| 16059 | case 2665: /* avx512f_sfixupimmv4sf */ |
| 16060 | case 2664: /* avx512vl_fixupimmv2df_mask_round */ |
| 16061 | case 2663: /* avx512vl_fixupimmv2df_mask */ |
| 16062 | case 2662: /* avx512vl_fixupimmv4df_mask_round */ |
| 16063 | case 2661: /* avx512vl_fixupimmv4df_mask */ |
| 16064 | case 2660: /* avx512f_fixupimmv8df_mask_round */ |
| 16065 | case 2659: /* avx512f_fixupimmv8df_mask */ |
| 16066 | case 2658: /* avx512vl_fixupimmv4sf_mask_round */ |
| 16067 | case 2657: /* avx512vl_fixupimmv4sf_mask */ |
| 16068 | case 2656: /* avx512vl_fixupimmv8sf_mask_round */ |
| 16069 | case 2655: /* avx512vl_fixupimmv8sf_mask */ |
| 16070 | case 2654: /* avx512f_fixupimmv16sf_mask_round */ |
| 16071 | case 2653: /* avx512f_fixupimmv16sf_mask */ |
| 16072 | case 2652: /* avx512vl_fixupimmv2df_maskz_1_round */ |
| 16073 | case 2651: /* avx512vl_fixupimmv2df_maskz_1 */ |
| 16074 | case 2650: /* avx512vl_fixupimmv2df_round */ |
| 16075 | case 2649: /* avx512vl_fixupimmv2df */ |
| 16076 | case 2648: /* avx512vl_fixupimmv4df_maskz_1_round */ |
| 16077 | case 2647: /* avx512vl_fixupimmv4df_maskz_1 */ |
| 16078 | case 2646: /* avx512vl_fixupimmv4df_round */ |
| 16079 | case 2645: /* avx512vl_fixupimmv4df */ |
| 16080 | case 2644: /* avx512f_fixupimmv8df_maskz_1_round */ |
| 16081 | case 2643: /* avx512f_fixupimmv8df_maskz_1 */ |
| 16082 | case 2642: /* avx512f_fixupimmv8df_round */ |
| 16083 | case 2641: /* avx512f_fixupimmv8df */ |
| 16084 | case 2640: /* avx512vl_fixupimmv4sf_maskz_1_round */ |
| 16085 | case 2639: /* avx512vl_fixupimmv4sf_maskz_1 */ |
| 16086 | case 2638: /* avx512vl_fixupimmv4sf_round */ |
| 16087 | case 2637: /* avx512vl_fixupimmv4sf */ |
| 16088 | case 2636: /* avx512vl_fixupimmv8sf_maskz_1_round */ |
| 16089 | case 2635: /* avx512vl_fixupimmv8sf_maskz_1 */ |
| 16090 | case 2634: /* avx512vl_fixupimmv8sf_round */ |
| 16091 | case 2633: /* avx512vl_fixupimmv8sf */ |
| 16092 | case 2632: /* avx512f_fixupimmv16sf_maskz_1_round */ |
| 16093 | case 2631: /* avx512f_fixupimmv16sf_maskz_1 */ |
| 16094 | case 2630: /* avx512f_fixupimmv16sf_round */ |
| 16095 | case 2629: /* avx512f_fixupimmv16sf */ |
| 16096 | case 2628: /* avx512vl_alignv2di_mask */ |
| 16097 | case 2627: /* *avx512vl_alignv2di */ |
| 16098 | case 2626: /* avx512vl_alignv4di_mask */ |
| 16099 | case 2625: /* *avx512vl_alignv4di */ |
| 16100 | case 2624: /* avx512f_alignv8di_mask */ |
| 16101 | case 2623: /* *avx512f_alignv8di */ |
| 16102 | case 2622: /* avx512vl_alignv4si_mask */ |
| 16103 | case 2621: /* *avx512vl_alignv4si */ |
| 16104 | case 2620: /* avx512vl_alignv8si_mask */ |
| 16105 | case 2619: /* *avx512vl_alignv8si */ |
| 16106 | case 2618: /* avx512f_alignv16si_mask */ |
| 16107 | case 2617: /* *avx512f_alignv16si */ |
| 16108 | case 2616: /* avx512f_sgetexpv2df_round */ |
| 16109 | case 2615: /* avx512f_sgetexpv2df */ |
| 16110 | case 2614: /* avx512f_sgetexpv4sf_round */ |
| 16111 | case 2613: /* avx512f_sgetexpv4sf */ |
| 16112 | case 2612: /* avx512vl_getexpv2df_mask_round */ |
| 16113 | case 2611: /* avx512vl_getexpv2df_mask */ |
| 16114 | case 2610: /* avx512vl_getexpv2df_round */ |
| 16115 | case 2609: /* avx512vl_getexpv2df */ |
| 16116 | case 2608: /* avx512vl_getexpv4df_mask_round */ |
| 16117 | case 2607: /* avx512vl_getexpv4df_mask */ |
| 16118 | case 2606: /* avx512vl_getexpv4df_round */ |
| 16119 | case 2605: /* avx512vl_getexpv4df */ |
| 16120 | case 2604: /* avx512f_getexpv8df_mask_round */ |
| 16121 | case 2603: /* avx512f_getexpv8df_mask */ |
| 16122 | case 2602: /* avx512f_getexpv8df_round */ |
| 16123 | case 2601: /* avx512f_getexpv8df */ |
| 16124 | case 2600: /* avx512vl_getexpv4sf_mask_round */ |
| 16125 | case 2599: /* avx512vl_getexpv4sf_mask */ |
| 16126 | case 2598: /* avx512vl_getexpv4sf_round */ |
| 16127 | case 2597: /* avx512vl_getexpv4sf */ |
| 16128 | case 2596: /* avx512vl_getexpv8sf_mask_round */ |
| 16129 | case 2595: /* avx512vl_getexpv8sf_mask */ |
| 16130 | case 2594: /* avx512vl_getexpv8sf_round */ |
| 16131 | case 2593: /* avx512vl_getexpv8sf */ |
| 16132 | case 2592: /* avx512f_getexpv16sf_mask_round */ |
| 16133 | case 2591: /* avx512f_getexpv16sf_mask */ |
| 16134 | case 2590: /* avx512f_getexpv16sf_round */ |
| 16135 | case 2589: /* avx512f_getexpv16sf */ |
| 16136 | case 2570: /* avx512vl_scalefv2df_mask_round */ |
| 16137 | case 2569: /* avx512vl_scalefv2df_mask */ |
| 16138 | case 2568: /* avx512vl_scalefv2df_round */ |
| 16139 | case 2567: /* avx512vl_scalefv2df */ |
| 16140 | case 2566: /* avx512vl_scalefv4df_mask_round */ |
| 16141 | case 2565: /* avx512vl_scalefv4df_mask */ |
| 16142 | case 2564: /* avx512vl_scalefv4df_round */ |
| 16143 | case 2563: /* avx512vl_scalefv4df */ |
| 16144 | case 2562: /* avx512f_scalefv8df_mask_round */ |
| 16145 | case 2561: /* avx512f_scalefv8df_mask */ |
| 16146 | case 2560: /* avx512f_scalefv8df_round */ |
| 16147 | case 2559: /* avx512f_scalefv8df */ |
| 16148 | case 2558: /* avx512vl_scalefv4sf_mask_round */ |
| 16149 | case 2557: /* avx512vl_scalefv4sf_mask */ |
| 16150 | case 2556: /* avx512vl_scalefv4sf_round */ |
| 16151 | case 2555: /* avx512vl_scalefv4sf */ |
| 16152 | case 2554: /* avx512vl_scalefv8sf_mask_round */ |
| 16153 | case 2553: /* avx512vl_scalefv8sf_mask */ |
| 16154 | case 2552: /* avx512vl_scalefv8sf_round */ |
| 16155 | case 2551: /* avx512vl_scalefv8sf */ |
| 16156 | case 2550: /* avx512f_scalefv16sf_mask_round */ |
| 16157 | case 2549: /* avx512f_scalefv16sf_mask */ |
| 16158 | case 2548: /* avx512f_scalefv16sf_round */ |
| 16159 | case 2547: /* avx512f_scalefv16sf */ |
| 16160 | case 2546: /* avx512f_vmscalefv2df_round */ |
| 16161 | case 2545: /* avx512f_vmscalefv2df */ |
| 16162 | case 2544: /* avx512f_vmscalefv4sf_round */ |
| 16163 | case 2543: /* avx512f_vmscalefv4sf */ |
| 16164 | case 2529: /* vec_extract_lo_v32qi */ |
| 16165 | case 2527: /* vec_extract_lo_v64qi */ |
| 16166 | case 2525: /* vec_extract_lo_v16hi */ |
| 16167 | case 2523: /* vec_extract_lo_v32hi */ |
| 16168 | case 2502: /* vec_extract_lo_v16si_mask */ |
| 16169 | case 2501: /* vec_extract_lo_v16si */ |
| 16170 | case 2500: /* vec_extract_lo_v16sf_mask */ |
| 16171 | case 2499: /* vec_extract_lo_v16sf */ |
| 16172 | case 2468: /* *vec_extractv4sf_mem */ |
| 16173 | case 2466: /* *vec_extractv4sf_0 */ |
| 16174 | case 2415: /* *avx512vl_cvtmask2qv2di */ |
| 16175 | case 2414: /* *avx512vl_cvtmask2qv4di */ |
| 16176 | case 2413: /* *avx512f_cvtmask2qv8di */ |
| 16177 | case 2412: /* *avx512vl_cvtmask2dv4si */ |
| 16178 | case 2411: /* *avx512vl_cvtmask2dv8si */ |
| 16179 | case 2410: /* *avx512f_cvtmask2dv16si */ |
| 16180 | case 2409: /* *avx512vl_cvtmask2wv8hi */ |
| 16181 | case 2408: /* *avx512vl_cvtmask2wv16hi */ |
| 16182 | case 2407: /* *avx512bw_cvtmask2wv32hi */ |
| 16183 | case 2406: /* *avx512vl_cvtmask2bv32qi */ |
| 16184 | case 2405: /* *avx512vl_cvtmask2bv16qi */ |
| 16185 | case 2404: /* *avx512bw_cvtmask2bv64qi */ |
| 16186 | case 2403: /* avx512vl_cvtq2maskv2di */ |
| 16187 | case 2402: /* avx512vl_cvtq2maskv4di */ |
| 16188 | case 2401: /* avx512f_cvtq2maskv8di */ |
| 16189 | case 2400: /* avx512vl_cvtd2maskv4si */ |
| 16190 | case 2399: /* avx512vl_cvtd2maskv8si */ |
| 16191 | case 2398: /* avx512f_cvtd2maskv16si */ |
| 16192 | case 2397: /* avx512vl_cvtw2maskv8hi */ |
| 16193 | case 2396: /* avx512vl_cvtw2maskv16hi */ |
| 16194 | case 2395: /* avx512bw_cvtw2maskv32hi */ |
| 16195 | case 2394: /* avx512vl_cvtb2maskv32qi */ |
| 16196 | case 2393: /* avx512vl_cvtb2maskv16qi */ |
| 16197 | case 2392: /* avx512bw_cvtb2maskv64qi */ |
| 16198 | case 1360: /* *absnegv2df2 */ |
| 16199 | case 1359: /* *absnegv4df2 */ |
| 16200 | case 1358: /* *absnegv8df2 */ |
| 16201 | case 1357: /* *absnegv4sf2 */ |
| 16202 | case 1356: /* *absnegv8sf2 */ |
| 16203 | case 1355: /* *absnegv16sf2 */ |
| 16204 | case 1354: /* kunpckdi */ |
| 16205 | case 1353: /* kunpcksi */ |
| 16206 | case 1303: /* avx_movntv4df */ |
| 16207 | case 1302: /* avx512f_movntv8df */ |
| 16208 | case 1300: /* avx_movntv8sf */ |
| 16209 | case 1299: /* avx512f_movntv16sf */ |
| 16210 | case 1297: /* sse2_movntisi */ |
| 16211 | case 1295: /* avx_lddqu256 */ |
| 16212 | case 1294: /* movdi_to_sse */ |
| 16213 | case 1291: /* avx512vl_storev16hi_mask */ |
| 16214 | case 1290: /* avx512bw_storev32hi_mask */ |
| 16215 | case 1289: /* avx512vl_storev32qi_mask */ |
| 16216 | case 1287: /* avx512bw_storev64qi_mask */ |
| 16217 | case 1285: /* avx512vl_storev4df_mask */ |
| 16218 | case 1284: /* avx512f_storev8df_mask */ |
| 16219 | case 1282: /* avx512vl_storev8sf_mask */ |
| 16220 | case 1281: /* avx512f_storev16sf_mask */ |
| 16221 | case 1279: /* avx512vl_storev4di_mask */ |
| 16222 | case 1278: /* avx512f_storev8di_mask */ |
| 16223 | case 1276: /* avx512vl_storev8si_mask */ |
| 16224 | case 1275: /* avx512f_storev16si_mask */ |
| 16225 | case 1273: /* avx512vl_blendmv16hi */ |
| 16226 | case 1272: /* avx512bw_blendmv32hi */ |
| 16227 | case 1271: /* avx512vl_blendmv32qi */ |
| 16228 | case 1269: /* avx512bw_blendmv64qi */ |
| 16229 | case 1267: /* avx512vl_blendmv4df */ |
| 16230 | case 1266: /* avx512f_blendmv8df */ |
| 16231 | case 1264: /* avx512vl_blendmv8sf */ |
| 16232 | case 1263: /* avx512f_blendmv16sf */ |
| 16233 | case 1261: /* avx512vl_blendmv4di */ |
| 16234 | case 1260: /* avx512f_blendmv8di */ |
| 16235 | case 1258: /* avx512vl_blendmv8si */ |
| 16236 | case 1257: /* avx512f_blendmv16si */ |
| 16237 | case 1256: /* avx512vl_loadv8hi_mask */ |
| 16238 | case 1255: /* avx512vl_loadv16hi_mask */ |
| 16239 | case 1254: /* avx512bw_loadv32hi_mask */ |
| 16240 | case 1253: /* avx512vl_loadv32qi_mask */ |
| 16241 | case 1252: /* avx512vl_loadv16qi_mask */ |
| 16242 | case 1251: /* avx512bw_loadv64qi_mask */ |
| 16243 | case 1250: /* avx512vl_loadv2df_mask */ |
| 16244 | case 1249: /* avx512vl_loadv4df_mask */ |
| 16245 | case 1248: /* avx512f_loadv8df_mask */ |
| 16246 | case 1247: /* avx512vl_loadv4sf_mask */ |
| 16247 | case 1246: /* avx512vl_loadv8sf_mask */ |
| 16248 | case 1245: /* avx512f_loadv16sf_mask */ |
| 16249 | case 1244: /* avx512vl_loadv2di_mask */ |
| 16250 | case 1243: /* avx512vl_loadv4di_mask */ |
| 16251 | case 1242: /* avx512f_loadv8di_mask */ |
| 16252 | case 1241: /* avx512vl_loadv4si_mask */ |
| 16253 | case 1240: /* avx512vl_loadv8si_mask */ |
| 16254 | case 1239: /* avx512f_loadv16si_mask */ |
| 16255 | case 1217: /* *mmx_femms */ |
| 16256 | case 1216: /* *mmx_emms */ |
| 16257 | case 1209: /* *vec_extractv2si_zext_mem */ |
| 16258 | case 1207: /* *vec_extractv2si_0 */ |
| 16259 | case 1137: /* *vec_extractv2sf_0 */ |
| 16260 | case 1111: /* sse_movntq */ |
| 16261 | case 1105: /* rdpid */ |
| 16262 | case 1104: /* *wrpkru */ |
| 16263 | case 1103: /* *rdpkru */ |
| 16264 | case 1086: /* clzero_di */ |
| 16265 | case 1085: /* clzero_si */ |
| 16266 | case 1084: /* monitorx_di */ |
| 16267 | case 1083: /* monitorx_si */ |
| 16268 | case 1082: /* mwaitx */ |
| 16269 | case 1079: /* xtest_1 */ |
| 16270 | case 1078: /* xabort */ |
| 16271 | case 1077: /* xend */ |
| 16272 | case 1076: /* xbegin_1 */ |
| 16273 | case 1075: /* *pause */ |
| 16274 | case 1074: /* rdseeddi_1 */ |
| 16275 | case 1073: /* rdseedsi_1 */ |
| 16276 | case 1072: /* rdseedhi_1 */ |
| 16277 | case 1071: /* rdranddi_1 */ |
| 16278 | case 1070: /* rdrandsi_1 */ |
| 16279 | case 1069: /* rdrandhi_1 */ |
| 16280 | case 1068: /* wrgsbasedi */ |
| 16281 | case 1067: /* wrfsbasedi */ |
| 16282 | case 1066: /* wrgsbasesi */ |
| 16283 | case 1065: /* wrfsbasesi */ |
| 16284 | case 1064: /* rdgsbasedi */ |
| 16285 | case 1063: /* rdfsbasedi */ |
| 16286 | case 1062: /* rdgsbasesi */ |
| 16287 | case 1061: /* rdfsbasesi */ |
| 16288 | case 1052: /* fnclex */ |
| 16289 | case 1051: /* fnstsw */ |
| 16290 | case 1049: /* fnstenv */ |
| 16291 | case 1042: /* xsaves64 */ |
| 16292 | case 1041: /* xsavec64 */ |
| 16293 | case 1040: /* xsaveopt64 */ |
| 16294 | case 1039: /* xsave64 */ |
| 16295 | case 1038: /* xsaves_rex64 */ |
| 16296 | case 1037: /* xsavec_rex64 */ |
| 16297 | case 1036: /* xsaveopt_rex64 */ |
| 16298 | case 1035: /* xsave_rex64 */ |
| 16299 | case 1034: /* xsaves */ |
| 16300 | case 1033: /* xsavec */ |
| 16301 | case 1032: /* xsaveopt */ |
| 16302 | case 1031: /* xsave */ |
| 16303 | case 1028: /* fxsave64 */ |
| 16304 | case 1027: /* fxsave */ |
| 16305 | case 1026: /* rdtscp_rex64 */ |
| 16306 | case 1025: /* rdtscp */ |
| 16307 | case 1024: /* rdtsc_rex64 */ |
| 16308 | case 1023: /* rdtsc */ |
| 16309 | case 1022: /* rdpmc_rex64 */ |
| 16310 | case 1021: /* rdpmc */ |
| 16311 | case 1016: /* stack_tls_protect_test_di */ |
| 16312 | case 1015: /* stack_tls_protect_test_si */ |
| 16313 | case 1014: /* stack_protect_test_di */ |
| 16314 | case 1013: /* stack_protect_test_si */ |
| 16315 | case 1012: /* stack_tls_protect_set_di */ |
| 16316 | case 1011: /* stack_tls_protect_set_si */ |
| 16317 | case 1010: /* stack_protect_set_di */ |
| 16318 | case 1009: /* stack_protect_set_si */ |
| 16319 | case 1007: /* *prefetch_3dnow */ |
| 16320 | case 1005: /* trap */ |
| 16321 | case 1004: /* probe_stack_rangedi */ |
| 16322 | case 1003: /* probe_stack_rangesi */ |
| 16323 | case 1002: /* adjust_stack_and_probedi */ |
| 16324 | case 1001: /* adjust_stack_and_probesi */ |
| 16325 | case 998: /* allocate_stack_worker_probe_di */ |
| 16326 | case 997: /* allocate_stack_worker_probe_si */ |
| 16327 | case 968: /* *strlenqi_1 */ |
| 16328 | case 967: /* *strlenqi_1 */ |
| 16329 | case 966: /* *cmpstrnqi_1 */ |
| 16330 | case 965: /* *cmpstrnqi_1 */ |
| 16331 | case 964: /* *cmpstrnqi_nz_1 */ |
| 16332 | case 963: /* *cmpstrnqi_nz_1 */ |
| 16333 | case 934: /* cld */ |
| 16334 | case 933: /* movmsk_df */ |
| 16335 | case 841: /* truncxfdf2_i387_noop_unspec */ |
| 16336 | case 840: /* truncxfsf2_i387_noop_unspec */ |
| 16337 | case 811: /* *tls_dynamic_gnu2_combine_64 */ |
| 16338 | case 809: /* *tls_dynamic_gnu2_lea_64 */ |
| 16339 | case 808: /* *tls_dynamic_gnu2_combine_32 */ |
| 16340 | case 806: /* *tls_dynamic_gnu2_lea_32 */ |
| 16341 | case 797: /* *tls_local_dynamic_32_once */ |
| 16342 | case 796: /* *tls_local_dynamic_base_64_largepic */ |
| 16343 | case 795: /* *tls_local_dynamic_base_64_di */ |
| 16344 | case 794: /* *tls_local_dynamic_base_64_si */ |
| 16345 | case 793: /* *tls_local_dynamic_base_32_gnu */ |
| 16346 | case 792: /* *tls_global_dynamic_64_largepic */ |
| 16347 | case 791: /* *tls_global_dynamic_64_di */ |
| 16348 | case 790: /* *tls_global_dynamic_64_si */ |
| 16349 | case 789: /* *tls_global_dynamic_32_gnu */ |
| 16350 | case 788: /* *parityhi2_cmp */ |
| 16351 | case 787: /* paritysi2_cmp */ |
| 16352 | case 786: /* paritydi2_cmp */ |
| 16353 | case 785: /* bswaphi_lowpart */ |
| 16354 | case 784: /* *bswaphi_lowpart_1 */ |
| 16355 | case 778: /* *popcounthi2_1 */ |
| 16356 | case 706: /* ffssi2_no_cmove */ |
| 16357 | case 705: /* split_stack_return */ |
| 16358 | case 702: /* eh_return_internal */ |
| 16359 | case 700: /* set_rip_rex64 */ |
| 16360 | case 699: /* set_got_rex64 */ |
| 16361 | case 698: /* *set_got_labelled */ |
| 16362 | case 697: /* *set_got */ |
| 16363 | case 696: /* pad */ |
| 16364 | case 695: /* nops */ |
| 16365 | case 694: /* nop */ |
| 16366 | case 692: /* simple_return_pop_internal */ |
| 16367 | case 691: /* simple_return_internal_long */ |
| 16368 | case 690: /* interrupt_return */ |
| 16369 | case 689: /* simple_return_internal */ |
| 16370 | case 688: /* prologue_use */ |
| 16371 | case 687: /* *memory_blockage */ |
| 16372 | case 686: /* blockage */ |
| 16373 | case 658: /* *jccxf_si_r_i387 */ |
| 16374 | case 657: /* *jccdf_si_r_i387 */ |
| 16375 | case 656: /* *jccsf_si_r_i387 */ |
| 16376 | case 655: /* *jccxf_hi_r_i387 */ |
| 16377 | case 654: /* *jccdf_hi_r_i387 */ |
| 16378 | case 653: /* *jccsf_hi_r_i387 */ |
| 16379 | case 652: /* *jccxf_si_i387 */ |
| 16380 | case 651: /* *jccdf_si_i387 */ |
| 16381 | case 650: /* *jccsf_si_i387 */ |
| 16382 | case 649: /* *jccxf_hi_i387 */ |
| 16383 | case 648: /* *jccdf_hi_i387 */ |
| 16384 | case 647: /* *jccsf_hi_i387 */ |
| 16385 | case 646: /* *jccuxf_r_i387 */ |
| 16386 | case 645: /* *jccudf_r_i387 */ |
| 16387 | case 644: /* *jccusf_r_i387 */ |
| 16388 | case 643: /* *jccuxf_i387 */ |
| 16389 | case 642: /* *jccudf_i387 */ |
| 16390 | case 641: /* *jccusf_i387 */ |
| 16391 | case 640: /* *jccdf_r_i387 */ |
| 16392 | case 639: /* *jccsf_r_i387 */ |
| 16393 | case 638: /* *jccdf_i387 */ |
| 16394 | case 637: /* *jccsf_i387 */ |
| 16395 | case 636: /* *jccxf_r_i387 */ |
| 16396 | case 635: /* *jccxf_i387 */ |
| 16397 | case 634: /* *jccxf_0_r_i387 */ |
| 16398 | case 633: /* *jccdf_0_r_i387 */ |
| 16399 | case 632: /* *jccsf_0_r_i387 */ |
| 16400 | case 631: /* *jccxf_0_i387 */ |
| 16401 | case 630: /* *jccdf_0_i387 */ |
| 16402 | case 629: /* *jccsf_0_i387 */ |
| 16403 | case 622: /* *setcc_si_1_movzbl */ |
| 16404 | case 621: /* *setcc_si_1_and */ |
| 16405 | case 620: /* *setcc_di_1 */ |
| 16406 | case 619: /* *jcc_btdi_mask */ |
| 16407 | case 618: /* *jcc_btsi_mask */ |
| 16408 | case 617: /* *jcc_btdi_1 */ |
| 16409 | case 616: /* *jcc_btsi_1 */ |
| 16410 | case 615: /* *jcc_btdi */ |
| 16411 | case 614: /* *jcc_btsi */ |
| 16412 | case 593: /* ix86_rotrti3_doubleword */ |
| 16413 | case 592: /* ix86_rotrdi3_doubleword */ |
| 16414 | case 591: /* ix86_rotlti3_doubleword */ |
| 16415 | case 590: /* ix86_rotldi3_doubleword */ |
| 16416 | case 589: /* *rotrdi3_mask */ |
| 16417 | case 588: /* *rotldi3_mask */ |
| 16418 | case 587: /* *rotrsi3_mask */ |
| 16419 | case 586: /* *rotlsi3_mask */ |
| 16420 | case 544: /* *ashrti3_doubleword */ |
| 16421 | case 543: /* *lshrti3_doubleword */ |
| 16422 | case 542: /* *ashrdi3_doubleword */ |
| 16423 | case 541: /* *lshrdi3_doubleword */ |
| 16424 | case 540: /* *ashrdi3_mask */ |
| 16425 | case 539: /* *lshrdi3_mask */ |
| 16426 | case 538: /* *ashrsi3_mask */ |
| 16427 | case 537: /* *lshrsi3_mask */ |
| 16428 | case 518: /* *ashldi3_mask */ |
| 16429 | case 517: /* *ashlsi3_mask */ |
| 16430 | case 514: /* *ashlti3_doubleword */ |
| 16431 | case 513: /* *ashldi3_doubleword */ |
| 16432 | case 502: /* *one_cmpldi2_doubleword */ |
| 16433 | case 501: /* copysigntf3_var */ |
| 16434 | case 500: /* copysigndf3_var */ |
| 16435 | case 499: /* copysignsf3_var */ |
| 16436 | case 498: /* copysigntf3_const */ |
| 16437 | case 497: /* copysigndf3_const */ |
| 16438 | case 496: /* copysignsf3_const */ |
| 16439 | case 495: /* *negextenddfxf2 */ |
| 16440 | case 494: /* *absextenddfxf2 */ |
| 16441 | case 493: /* *negextendsfxf2 */ |
| 16442 | case 492: /* *absextendsfxf2 */ |
| 16443 | case 491: /* *negextendsfdf2 */ |
| 16444 | case 490: /* *absextendsfdf2 */ |
| 16445 | case 489: /* *negxf2_1 */ |
| 16446 | case 488: /* *absxf2_1 */ |
| 16447 | case 487: /* *negdf2_1 */ |
| 16448 | case 486: /* *absdf2_1 */ |
| 16449 | case 485: /* *negsf2_1 */ |
| 16450 | case 484: /* *abssf2_1 */ |
| 16451 | case 483: /* *absnegtf2_sse */ |
| 16452 | case 482: /* *absnegxf2_i387 */ |
| 16453 | case 481: /* *absnegdf2 */ |
| 16454 | case 480: /* *absnegsf2 */ |
| 16455 | case 465: /* *negti2_doubleword */ |
| 16456 | case 464: /* *negdi2_doubleword */ |
| 16457 | case 422: /* *xordi3_doubleword */ |
| 16458 | case 421: /* *iordi3_doubleword */ |
| 16459 | case 414: /* *andndi3_doubleword */ |
| 16460 | case 397: /* *anddi3_doubleword */ |
| 16461 | case 396: /* *testqi_ext_3 */ |
| 16462 | case 395: /* *testqi_ext_3 */ |
| 16463 | case 394: /* *testqi_ext_3 */ |
| 16464 | case 382: /* *udivmoddi4_pow2 */ |
| 16465 | case 381: /* *udivmodsi4_pow2 */ |
| 16466 | case 380: /* *udivmoddi4 */ |
| 16467 | case 379: /* *udivmodsi4 */ |
| 16468 | case 378: /* *udivmodhi4 */ |
| 16469 | case 377: /* udivmoddi4_1 */ |
| 16470 | case 376: /* udivmodsi4_1 */ |
| 16471 | case 371: /* *divmoddi4 */ |
| 16472 | case 370: /* *divmodsi4 */ |
| 16473 | case 369: /* *divmodhi4 */ |
| 16474 | case 368: /* divmoddi4_1 */ |
| 16475 | case 367: /* divmodsi4_1 */ |
| 16476 | case 270: /* *subti3_doubleword */ |
| 16477 | case 269: /* *subdi3_doubleword */ |
| 16478 | case 268: /* *leadi_general_4 */ |
| 16479 | case 267: /* *leadi_general_4 */ |
| 16480 | case 266: /* *leasi_general_4 */ |
| 16481 | case 265: /* *leasi_general_4 */ |
| 16482 | case 264: /* *leahi_general_4 */ |
| 16483 | case 263: /* *leahi_general_4 */ |
| 16484 | case 262: /* *leaqi_general_4 */ |
| 16485 | case 261: /* *leaqi_general_4 */ |
| 16486 | case 260: /* *leahi_general_3b */ |
| 16487 | case 259: /* *leaqi_general_3b */ |
| 16488 | case 258: /* *leahi_general_3 */ |
| 16489 | case 257: /* *leaqi_general_3 */ |
| 16490 | case 256: /* *leahi_general_2b */ |
| 16491 | case 255: /* *leaqi_general_2b */ |
| 16492 | case 254: /* *leahi_general_2 */ |
| 16493 | case 253: /* *leaqi_general_2 */ |
| 16494 | case 252: /* *leahi_general_1 */ |
| 16495 | case 251: /* *leaqi_general_1 */ |
| 16496 | case 216: /* *addti3_doubleword */ |
| 16497 | case 215: /* *adddi3_doubleword */ |
| 16498 | case 214: /* *leadi */ |
| 16499 | case 213: /* *leasi */ |
| 16500 | case 212: /* *floatunssixf2_i387_with_xmm */ |
| 16501 | case 211: /* *floatunssidf2_i387_with_xmm */ |
| 16502 | case 210: /* *floatunssisf2_i387_with_xmm */ |
| 16503 | case 206: /* *floatdidf2_i387 */ |
| 16504 | case 205: /* *floatdisf2_i387 */ |
| 16505 | case 204: /* *floatsidf2_i387 */ |
| 16506 | case 203: /* *floatsisf2_i387 */ |
| 16507 | case 195: /* floathidf2 */ |
| 16508 | case 194: /* floathisf2 */ |
| 16509 | case 169: /* *fixuns_truncdf_1 */ |
| 16510 | case 168: /* *fixuns_truncsf_1 */ |
| 16511 | case 167: /* *truncxfdf2_i387 */ |
| 16512 | case 166: /* *truncxfsf2_i387 */ |
| 16513 | case 165: /* truncxfdf2_i387_noop */ |
| 16514 | case 164: /* truncxfsf2_i387_noop */ |
| 16515 | case 161: /* *truncdfsf2_i387_1 */ |
| 16516 | case 158: /* *truncdfsf_fast_i387 */ |
| 16517 | case 146: /* extendsidi2_1 */ |
| 16518 | case 144: /* *zextsi_doubleword */ |
| 16519 | case 143: /* *zexthi_doubleword */ |
| 16520 | case 142: /* *zextqi_doubleword */ |
| 16521 | case 141: /* *zexthi_doubleword_and */ |
| 16522 | case 140: /* *zextqi_doubleword_and */ |
| 16523 | case 71: /* *pushfldi2 */ |
| 16524 | case 70: /* *pushflsi2 */ |
| 16525 | case 65: /* *pushdi2_prologue */ |
| 16526 | case 64: /* *pushsi2_prologue */ |
| 16527 | case 63: /* *pushhi2 */ |
| 16528 | case 62: /* *pushqi2 */ |
| 16529 | case 61: /* *pushsi2_rex64 */ |
| 16530 | case 60: /* *pushhi2_rex64 */ |
| 16531 | case 59: /* *pushqi2_rex64 */ |
| 16532 | case 58: /* *pushsi2 */ |
| 16533 | case 56: /* *pushti2 */ |
| 16534 | case 55: /* *pushdi2 */ |
| 16535 | case 48: /* x86_sahf_1 */ |
| 16536 | return 2; |
| 16537 | |
| 16538 | case 393: /* *testqi_ext_2 */ |
| 16539 | case 392: /* *testqi_ext_1 */ |
| 16540 | case 391: /* *testsi_1 */ |
| 16541 | case 390: /* *testhi_1 */ |
| 16542 | case 389: /* *testqi_1 */ |
| 16543 | case 388: /* *testqi_1_maybe_si */ |
| 16544 | case 387: /* *testdi_1 */ |
| 16545 | case 222: /* *addqi_1_slp */ |
| 16546 | case 16: /* *cmpqi_ext_4 */ |
| 16547 | case 15: /* *cmpqi_ext_3 */ |
| 16548 | case 14: /* *cmpqi_ext_2 */ |
| 16549 | case 13: /* *cmpqi_ext_1 */ |
| 16550 | case 12: /* *cmpdi_minus_1 */ |
| 16551 | case 11: /* *cmpsi_minus_1 */ |
| 16552 | case 10: /* *cmphi_minus_1 */ |
| 16553 | case 9: /* *cmpqi_minus_1 */ |
| 16554 | case 8: /* *cmpdi_1 */ |
| 16555 | case 7: /* *cmpsi_1 */ |
| 16556 | case 6: /* *cmphi_1 */ |
| 16557 | case 5: /* *cmpqi_1 */ |
| 16558 | case 4: /* *cmpdi_ccno_1 */ |
| 16559 | case 3: /* *cmpsi_ccno_1 */ |
| 16560 | case 2: /* *cmphi_ccno_1 */ |
| 16561 | case 1: /* *cmpqi_ccno_1 */ |
| 16562 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) |
| 16563 | { |
| 16564 | return 1; |
| 16565 | } |
| 16566 | else if (cached_memory == MEMORY_LOAD) |
| 16567 | { |
| 16568 | return 4; |
| 16569 | } |
| 16570 | else |
| 16571 | { |
| 16572 | return 0; |
| 16573 | } |
| 16574 | |
| 16575 | case -1: |
| 16576 | if (GET_CODE (PATTERN (insn)) != ASM_INPUT |
| 16577 | && asm_noperands (PATTERN (insn)) < 0) |
| 16578 | fatal_insn_not_found (insn); |
| 16579 | /* FALLTHRU */ |
| 16580 | case 49: /* *cmpisf */ |
| 16581 | case 50: /* *cmpidf */ |
| 16582 | case 51: /* *cmpiusf */ |
| 16583 | case 52: /* *cmpiudf */ |
| 16584 | case 57: /* *pushdi2_rex64 */ |
| 16585 | case 80: /* *movti_internal */ |
| 16586 | case 81: /* *movdi_internal */ |
| 16587 | case 82: /* *movsi_internal */ |
| 16588 | case 83: /* *movhi_internal */ |
| 16589 | case 84: /* *movqi_internal */ |
| 16590 | case 93: /* *swapsi */ |
| 16591 | case 94: /* *swapdi */ |
| 16592 | case 95: /* *swapqi */ |
| 16593 | case 96: /* *swaphi */ |
| 16594 | case 97: /* *movstrictqi_1 */ |
| 16595 | case 98: /* *movstricthi_1 */ |
| 16596 | case 101: /* *extvhi */ |
| 16597 | case 102: /* *extvsi */ |
| 16598 | case 103: /* *extzvhi */ |
| 16599 | case 104: /* *extzvsi */ |
| 16600 | case 105: /* *extzvdi */ |
| 16601 | case 106: /* *extzvqi_mem_rex64 */ |
| 16602 | case 107: /* *extzvqi */ |
| 16603 | case 108: /* insvhi_1 */ |
| 16604 | case 109: /* insvsi_1 */ |
| 16605 | case 110: /* insvdi_1 */ |
| 16606 | case 111: /* *insvqi_1_mem_rex64 */ |
| 16607 | case 112: /* *insvqi_1 */ |
| 16608 | case 113: /* *insvqi_2 */ |
| 16609 | case 114: /* *insvqi_2 */ |
| 16610 | case 115: /* *insvqi_3 */ |
| 16611 | case 116: /* *insvqi_3 */ |
| 16612 | case 122: /* *pushsf_rex64 */ |
| 16613 | case 123: /* *pushsf */ |
| 16614 | case 124: /* *movtf_internal */ |
| 16615 | case 125: /* *movxf_internal */ |
| 16616 | case 126: /* *movdf_internal */ |
| 16617 | case 127: /* *movsf_internal */ |
| 16618 | case 131: /* *zero_extendsidi2 */ |
| 16619 | case 132: /* zero_extendqidi2 */ |
| 16620 | case 133: /* zero_extendhidi2 */ |
| 16621 | case 136: /* *zero_extendqisi2 */ |
| 16622 | case 137: /* *zero_extendhisi2 */ |
| 16623 | case 139: /* *zero_extendqihi2 */ |
| 16624 | case 145: /* *extendsidi2_rex64 */ |
| 16625 | case 147: /* extendqidi2 */ |
| 16626 | case 148: /* extendhidi2 */ |
| 16627 | case 149: /* extendhisi2 */ |
| 16628 | case 150: /* *extendhisi2_zext */ |
| 16629 | case 151: /* extendqisi2 */ |
| 16630 | case 152: /* *extendqisi2_zext */ |
| 16631 | case 153: /* extendqihi2 */ |
| 16632 | case 154: /* *extendsfdf2 */ |
| 16633 | case 155: /* *extendsfxf2_i387 */ |
| 16634 | case 156: /* *extenddfxf2_i387 */ |
| 16635 | case 170: /* fix_truncsfsi_sse */ |
| 16636 | case 171: /* fix_truncsfdi_sse */ |
| 16637 | case 172: /* fix_truncdfsi_sse */ |
| 16638 | case 173: /* fix_truncdfdi_sse */ |
| 16639 | case 196: /* floathixf2 */ |
| 16640 | case 197: /* floatsixf2 */ |
| 16641 | case 198: /* floatdixf2 */ |
| 16642 | case 199: /* *floatsisf2_mixed */ |
| 16643 | case 200: /* *floatdisf2_mixed */ |
| 16644 | case 201: /* *floatsidf2_mixed */ |
| 16645 | case 202: /* *floatdidf2_mixed */ |
| 16646 | case 217: /* *addsi_1 */ |
| 16647 | case 218: /* *adddi_1 */ |
| 16648 | case 219: /* addsi_1_zext */ |
| 16649 | case 220: /* *addhi_1 */ |
| 16650 | case 221: /* *addqi_1 */ |
| 16651 | case 223: /* *addqi_2 */ |
| 16652 | case 224: /* *addhi_2 */ |
| 16653 | case 225: /* *addsi_2 */ |
| 16654 | case 226: /* *adddi_2 */ |
| 16655 | case 227: /* *addsi_2_zext */ |
| 16656 | case 228: /* *addqi_3 */ |
| 16657 | case 229: /* *addhi_3 */ |
| 16658 | case 230: /* *addsi_3 */ |
| 16659 | case 231: /* *adddi_3 */ |
| 16660 | case 232: /* *addsi_3_zext */ |
| 16661 | case 233: /* *adddi_4 */ |
| 16662 | case 234: /* *addqi_4 */ |
| 16663 | case 235: /* *addhi_4 */ |
| 16664 | case 236: /* *addsi_4 */ |
| 16665 | case 237: /* *addqi_5 */ |
| 16666 | case 238: /* *addhi_5 */ |
| 16667 | case 239: /* *addsi_5 */ |
| 16668 | case 240: /* *adddi_5 */ |
| 16669 | case 241: /* addqi_ext_1 */ |
| 16670 | case 242: /* *addqi_ext_2 */ |
| 16671 | case 243: /* *addvqi4 */ |
| 16672 | case 244: /* *addvhi4 */ |
| 16673 | case 245: /* *addvsi4 */ |
| 16674 | case 246: /* *addvdi4 */ |
| 16675 | case 247: /* *addvqi4_1 */ |
| 16676 | case 248: /* *addvhi4_1 */ |
| 16677 | case 249: /* *addvsi4_1 */ |
| 16678 | case 250: /* *addvdi4_1 */ |
| 16679 | case 271: /* *subqi_1 */ |
| 16680 | case 272: /* *subhi_1 */ |
| 16681 | case 273: /* *subsi_1 */ |
| 16682 | case 274: /* *subdi_1 */ |
| 16683 | case 275: /* *subsi_1_zext */ |
| 16684 | case 277: /* *subqi_2 */ |
| 16685 | case 278: /* *subhi_2 */ |
| 16686 | case 279: /* *subsi_2 */ |
| 16687 | case 280: /* *subdi_2 */ |
| 16688 | case 281: /* *subsi_2_zext */ |
| 16689 | case 282: /* *subvqi4 */ |
| 16690 | case 283: /* *subvhi4 */ |
| 16691 | case 284: /* *subvsi4 */ |
| 16692 | case 285: /* *subvdi4 */ |
| 16693 | case 286: /* *subvqi4_1 */ |
| 16694 | case 287: /* *subvhi4_1 */ |
| 16695 | case 288: /* *subvsi4_1 */ |
| 16696 | case 289: /* *subvdi4_1 */ |
| 16697 | case 290: /* *subqi_3 */ |
| 16698 | case 291: /* *subhi_3 */ |
| 16699 | case 292: /* *subsi_3 */ |
| 16700 | case 293: /* *subdi_3 */ |
| 16701 | case 294: /* *subsi_3_zext */ |
| 16702 | case 295: /* addqi3_carry */ |
| 16703 | case 296: /* addhi3_carry */ |
| 16704 | case 297: /* addsi3_carry */ |
| 16705 | case 298: /* adddi3_carry */ |
| 16706 | case 299: /* *addqi3_carry_0 */ |
| 16707 | case 300: /* *addhi3_carry_0 */ |
| 16708 | case 301: /* *addsi3_carry_0 */ |
| 16709 | case 302: /* *adddi3_carry_0 */ |
| 16710 | case 303: /* *addsi3_carry_zext */ |
| 16711 | case 304: /* *addsi3_carry_zext_0 */ |
| 16712 | case 305: /* addcarrysi */ |
| 16713 | case 306: /* addcarrydi */ |
| 16714 | case 307: /* subqi3_carry */ |
| 16715 | case 308: /* subhi3_carry */ |
| 16716 | case 309: /* subsi3_carry */ |
| 16717 | case 310: /* subdi3_carry */ |
| 16718 | case 311: /* *subqi3_carry_0 */ |
| 16719 | case 312: /* *subhi3_carry_0 */ |
| 16720 | case 313: /* *subsi3_carry_0 */ |
| 16721 | case 314: /* *subdi3_carry_0 */ |
| 16722 | case 315: /* *subsi3_carry_zext */ |
| 16723 | case 316: /* *subsi3_carry_zext_0 */ |
| 16724 | case 317: /* subborrowsi */ |
| 16725 | case 318: /* subborrowdi */ |
| 16726 | case 319: /* *addqi3_cconly_overflow_1 */ |
| 16727 | case 320: /* *addhi3_cconly_overflow_1 */ |
| 16728 | case 321: /* *addsi3_cconly_overflow_1 */ |
| 16729 | case 322: /* *adddi3_cconly_overflow_1 */ |
| 16730 | case 323: /* *addqi3_cc_overflow_1 */ |
| 16731 | case 324: /* *addhi3_cc_overflow_1 */ |
| 16732 | case 325: /* *addsi3_cc_overflow_1 */ |
| 16733 | case 326: /* *adddi3_cc_overflow_1 */ |
| 16734 | case 327: /* *addsi3_zext_cc_overflow_1 */ |
| 16735 | case 328: /* *addqi3_cconly_overflow_2 */ |
| 16736 | case 329: /* *addhi3_cconly_overflow_2 */ |
| 16737 | case 330: /* *addsi3_cconly_overflow_2 */ |
| 16738 | case 331: /* *adddi3_cconly_overflow_2 */ |
| 16739 | case 332: /* *addqi3_cc_overflow_2 */ |
| 16740 | case 333: /* *addhi3_cc_overflow_2 */ |
| 16741 | case 334: /* *addsi3_cc_overflow_2 */ |
| 16742 | case 335: /* *adddi3_cc_overflow_2 */ |
| 16743 | case 336: /* *addsi3_zext_cc_overflow_2 */ |
| 16744 | case 337: /* *mulhi3_1 */ |
| 16745 | case 338: /* *mulsi3_1 */ |
| 16746 | case 339: /* *muldi3_1 */ |
| 16747 | case 340: /* *mulsi3_1_zext */ |
| 16748 | case 341: /* *mulqi3_1 */ |
| 16749 | case 342: /* *mulvsi4 */ |
| 16750 | case 343: /* *mulvdi4 */ |
| 16751 | case 344: /* *mulvhi4 */ |
| 16752 | case 345: /* *mulvhi4_1 */ |
| 16753 | case 346: /* *mulvsi4_1 */ |
| 16754 | case 347: /* *mulvdi4_1 */ |
| 16755 | case 348: /* *umulvhi4 */ |
| 16756 | case 349: /* *umulvsi4 */ |
| 16757 | case 350: /* *umulvdi4 */ |
| 16758 | case 351: /* *mulvqi4 */ |
| 16759 | case 352: /* *umulvqi4 */ |
| 16760 | case 353: /* *bmi2_umulsidi3_1 */ |
| 16761 | case 354: /* *bmi2_umulditi3_1 */ |
| 16762 | case 355: /* *umulsidi3_1 */ |
| 16763 | case 356: /* *umulditi3_1 */ |
| 16764 | case 357: /* *mulsidi3_1 */ |
| 16765 | case 358: /* *mulditi3_1 */ |
| 16766 | case 359: /* *mulqihi3_1 */ |
| 16767 | case 360: /* *umulqihi3_1 */ |
| 16768 | case 361: /* *smuldi3_highpart_1 */ |
| 16769 | case 362: /* *umuldi3_highpart_1 */ |
| 16770 | case 363: /* *smulsi3_highpart_zext */ |
| 16771 | case 364: /* *umulsi3_highpart_zext */ |
| 16772 | case 365: /* *smulsi3_highpart_1 */ |
| 16773 | case 366: /* *umulsi3_highpart_1 */ |
| 16774 | case 372: /* *divmodhi4_noext */ |
| 16775 | case 373: /* *divmodsi4_noext */ |
| 16776 | case 374: /* *divmoddi4_noext */ |
| 16777 | case 375: /* divmodhiqi3 */ |
| 16778 | case 383: /* *udivmodhi4_noext */ |
| 16779 | case 384: /* *udivmodsi4_noext */ |
| 16780 | case 385: /* *udivmoddi4_noext */ |
| 16781 | case 386: /* udivmodhiqi3 */ |
| 16782 | case 398: /* *anddi_1 */ |
| 16783 | case 399: /* *andsi_1_zext */ |
| 16784 | case 400: /* *andhi_1 */ |
| 16785 | case 401: /* *andsi_1 */ |
| 16786 | case 402: /* *andqi_1 */ |
| 16787 | case 404: /* *anddi_2 */ |
| 16788 | case 405: /* *andsi_2_zext */ |
| 16789 | case 406: /* *andqi_2_maybe_si */ |
| 16790 | case 407: /* *andqi_2 */ |
| 16791 | case 408: /* *andhi_2 */ |
| 16792 | case 409: /* *andsi_2 */ |
| 16793 | case 411: /* andqi_ext_1 */ |
| 16794 | case 412: /* *andqi_ext_1_cc */ |
| 16795 | case 413: /* *andqi_ext_2 */ |
| 16796 | case 415: /* *andnsi_1 */ |
| 16797 | case 416: /* *andndi_1 */ |
| 16798 | case 417: /* *andnqi_1 */ |
| 16799 | case 418: /* *andnhi_1 */ |
| 16800 | case 419: /* *andn_si_ccno */ |
| 16801 | case 420: /* *andn_di_ccno */ |
| 16802 | case 423: /* *iorhi_1 */ |
| 16803 | case 424: /* *xorhi_1 */ |
| 16804 | case 425: /* *iorsi_1 */ |
| 16805 | case 426: /* *xorsi_1 */ |
| 16806 | case 427: /* *iordi_1 */ |
| 16807 | case 428: /* *xordi_1 */ |
| 16808 | case 429: /* *iorsi_1_zext */ |
| 16809 | case 430: /* *xorsi_1_zext */ |
| 16810 | case 431: /* *iorsi_1_zext_imm */ |
| 16811 | case 432: /* *xorsi_1_zext_imm */ |
| 16812 | case 433: /* *iorqi_1 */ |
| 16813 | case 434: /* *xorqi_1 */ |
| 16814 | case 437: /* *iorqi_2 */ |
| 16815 | case 438: /* *xorqi_2 */ |
| 16816 | case 439: /* *iorhi_2 */ |
| 16817 | case 440: /* *xorhi_2 */ |
| 16818 | case 441: /* *iorsi_2 */ |
| 16819 | case 442: /* *xorsi_2 */ |
| 16820 | case 443: /* *iordi_2 */ |
| 16821 | case 444: /* *xordi_2 */ |
| 16822 | case 445: /* *iorsi_2_zext */ |
| 16823 | case 446: /* *xorsi_2_zext */ |
| 16824 | case 447: /* *iorsi_2_zext_imm */ |
| 16825 | case 448: /* *xorsi_2_zext_imm */ |
| 16826 | case 451: /* *iorqi_3 */ |
| 16827 | case 452: /* *xorqi_3 */ |
| 16828 | case 453: /* *iorhi_3 */ |
| 16829 | case 454: /* *xorhi_3 */ |
| 16830 | case 455: /* *iorsi_3 */ |
| 16831 | case 456: /* *xorsi_3 */ |
| 16832 | case 457: /* *iordi_3 */ |
| 16833 | case 458: /* *xordi_3 */ |
| 16834 | case 459: /* *iorqi_ext_1 */ |
| 16835 | case 460: /* *xorqi_ext_1 */ |
| 16836 | case 461: /* *iorqi_ext_2 */ |
| 16837 | case 462: /* *xorqi_ext_2 */ |
| 16838 | case 463: /* *xorqi_ext_1_cc */ |
| 16839 | case 515: /* x86_64_shld */ |
| 16840 | case 516: /* x86_shld */ |
| 16841 | case 519: /* *bmi2_ashlsi3_1 */ |
| 16842 | case 520: /* *bmi2_ashldi3_1 */ |
| 16843 | case 521: /* *ashlsi3_1 */ |
| 16844 | case 522: /* *ashldi3_1 */ |
| 16845 | case 523: /* *bmi2_ashlsi3_1_zext */ |
| 16846 | case 524: /* *ashlsi3_1_zext */ |
| 16847 | case 525: /* *ashlhi3_1 */ |
| 16848 | case 526: /* *ashlqi3_1 */ |
| 16849 | case 527: /* *ashlqi3_1_slp */ |
| 16850 | case 528: /* *ashlqi3_cmp */ |
| 16851 | case 529: /* *ashlhi3_cmp */ |
| 16852 | case 530: /* *ashlsi3_cmp */ |
| 16853 | case 531: /* *ashldi3_cmp */ |
| 16854 | case 532: /* *ashlsi3_cmp_zext */ |
| 16855 | case 533: /* *ashlqi3_cconly */ |
| 16856 | case 534: /* *ashlhi3_cconly */ |
| 16857 | case 535: /* *ashlsi3_cconly */ |
| 16858 | case 536: /* *ashldi3_cconly */ |
| 16859 | case 545: /* x86_64_shrd */ |
| 16860 | case 546: /* x86_shrd */ |
| 16861 | case 547: /* ashrdi3_cvt */ |
| 16862 | case 548: /* *ashrsi3_cvt_zext */ |
| 16863 | case 549: /* ashrsi3_cvt */ |
| 16864 | case 550: /* *bmi2_lshrsi3_1 */ |
| 16865 | case 551: /* *bmi2_ashrsi3_1 */ |
| 16866 | case 552: /* *bmi2_lshrdi3_1 */ |
| 16867 | case 553: /* *bmi2_ashrdi3_1 */ |
| 16868 | case 554: /* *lshrsi3_1 */ |
| 16869 | case 555: /* *ashrsi3_1 */ |
| 16870 | case 556: /* *lshrdi3_1 */ |
| 16871 | case 557: /* *ashrdi3_1 */ |
| 16872 | case 558: /* *bmi2_lshrsi3_1_zext */ |
| 16873 | case 559: /* *bmi2_ashrsi3_1_zext */ |
| 16874 | case 560: /* *lshrsi3_1_zext */ |
| 16875 | case 561: /* *ashrsi3_1_zext */ |
| 16876 | case 562: /* *lshrqi3_1 */ |
| 16877 | case 563: /* *ashrqi3_1 */ |
| 16878 | case 564: /* *lshrhi3_1 */ |
| 16879 | case 565: /* *ashrhi3_1 */ |
| 16880 | case 568: /* *lshrqi3_cmp */ |
| 16881 | case 569: /* *ashrqi3_cmp */ |
| 16882 | case 570: /* *lshrhi3_cmp */ |
| 16883 | case 571: /* *ashrhi3_cmp */ |
| 16884 | case 572: /* *lshrsi3_cmp */ |
| 16885 | case 573: /* *ashrsi3_cmp */ |
| 16886 | case 574: /* *lshrdi3_cmp */ |
| 16887 | case 575: /* *ashrdi3_cmp */ |
| 16888 | case 576: /* *lshrsi3_cmp_zext */ |
| 16889 | case 577: /* *ashrsi3_cmp_zext */ |
| 16890 | case 578: /* *lshrqi3_cconly */ |
| 16891 | case 579: /* *ashrqi3_cconly */ |
| 16892 | case 580: /* *lshrhi3_cconly */ |
| 16893 | case 581: /* *ashrhi3_cconly */ |
| 16894 | case 582: /* *lshrsi3_cconly */ |
| 16895 | case 583: /* *ashrsi3_cconly */ |
| 16896 | case 584: /* *lshrdi3_cconly */ |
| 16897 | case 585: /* *ashrdi3_cconly */ |
| 16898 | case 594: /* *bmi2_rorxsi3_1 */ |
| 16899 | case 595: /* *bmi2_rorxdi3_1 */ |
| 16900 | case 596: /* *rotlsi3_1 */ |
| 16901 | case 597: /* *rotrsi3_1 */ |
| 16902 | case 598: /* *rotldi3_1 */ |
| 16903 | case 599: /* *rotrdi3_1 */ |
| 16904 | case 600: /* *bmi2_rorxsi3_1_zext */ |
| 16905 | case 601: /* *rotlsi3_1_zext */ |
| 16906 | case 602: /* *rotrsi3_1_zext */ |
| 16907 | case 603: /* *rotlqi3_1 */ |
| 16908 | case 604: /* *rotrqi3_1 */ |
| 16909 | case 605: /* *rotlhi3_1 */ |
| 16910 | case 606: /* *rotrhi3_1 */ |
| 16911 | case 660: /* *indirect_jump */ |
| 16912 | case 661: /* *indirect_jump */ |
| 16913 | case 662: /* *tablejump_1 */ |
| 16914 | case 663: /* *tablejump_1 */ |
| 16915 | case 693: /* simple_return_indirect_internal */ |
| 16916 | case 701: /* set_got_offset_rex64 */ |
| 16917 | case 720: /* clzsi2_lzcnt */ |
| 16918 | case 721: /* clzdi2_lzcnt */ |
| 16919 | case 722: /* *clzsi2_lzcnt_falsedep */ |
| 16920 | case 723: /* *clzdi2_lzcnt_falsedep */ |
| 16921 | case 725: /* lzcnt_si */ |
| 16922 | case 727: /* lzcnt_di */ |
| 16923 | case 729: /* *lzcnt_si_falsedep */ |
| 16924 | case 731: /* *lzcnt_di_falsedep */ |
| 16925 | case 733: /* lzcnt_hi */ |
| 16926 | case 734: /* bmi_bextr_si */ |
| 16927 | case 735: /* bmi_bextr_di */ |
| 16928 | case 736: /* *bmi_bextr_si_ccz */ |
| 16929 | case 737: /* *bmi_bextr_di_ccz */ |
| 16930 | case 738: /* *bmi_blsi_si */ |
| 16931 | case 739: /* *bmi_blsi_di */ |
| 16932 | case 740: /* *bmi_blsmsk_si */ |
| 16933 | case 741: /* *bmi_blsmsk_di */ |
| 16934 | case 742: /* *bmi_blsr_si */ |
| 16935 | case 743: /* *bmi_blsr_di */ |
| 16936 | case 744: /* *bmi2_bzhi_si3 */ |
| 16937 | case 745: /* *bmi2_bzhi_di3 */ |
| 16938 | case 746: /* *bmi2_bzhi_si3_1 */ |
| 16939 | case 747: /* *bmi2_bzhi_di3_1 */ |
| 16940 | case 748: /* *bmi2_bzhi_si3_1_ccz */ |
| 16941 | case 749: /* *bmi2_bzhi_di3_1_ccz */ |
| 16942 | case 750: /* bmi2_pdep_si3 */ |
| 16943 | case 751: /* bmi2_pdep_di3 */ |
| 16944 | case 752: /* bmi2_pext_si3 */ |
| 16945 | case 753: /* bmi2_pext_di3 */ |
| 16946 | case 754: /* tbm_bextri_si */ |
| 16947 | case 755: /* tbm_bextri_di */ |
| 16948 | case 756: /* *tbm_blcfill_si */ |
| 16949 | case 757: /* *tbm_blcfill_di */ |
| 16950 | case 758: /* *tbm_blci_si */ |
| 16951 | case 759: /* *tbm_blci_di */ |
| 16952 | case 760: /* *tbm_blcic_si */ |
| 16953 | case 761: /* *tbm_blcic_di */ |
| 16954 | case 762: /* *tbm_blcmsk_si */ |
| 16955 | case 763: /* *tbm_blcmsk_di */ |
| 16956 | case 764: /* *tbm_blcs_si */ |
| 16957 | case 765: /* *tbm_blcs_di */ |
| 16958 | case 766: /* *tbm_blsfill_si */ |
| 16959 | case 767: /* *tbm_blsfill_di */ |
| 16960 | case 768: /* *tbm_blsic_si */ |
| 16961 | case 769: /* *tbm_blsic_di */ |
| 16962 | case 770: /* *tbm_t1mskc_si */ |
| 16963 | case 771: /* *tbm_t1mskc_di */ |
| 16964 | case 772: /* *tbm_tzmsk_si */ |
| 16965 | case 773: /* *tbm_tzmsk_di */ |
| 16966 | case 774: /* popcountsi2 */ |
| 16967 | case 775: /* popcountdi2 */ |
| 16968 | case 776: /* *popcountsi2_falsedep */ |
| 16969 | case 777: /* *popcountdi2_falsedep */ |
| 16970 | case 779: /* popcounthi2 */ |
| 16971 | case 780: /* *bswapsi2_movbe */ |
| 16972 | case 781: /* *bswapdi2_movbe */ |
| 16973 | case 782: /* *bswapsi2 */ |
| 16974 | case 783: /* *bswapdi2 */ |
| 16975 | case 812: /* *fop_sf_comm */ |
| 16976 | case 813: /* *fop_df_comm */ |
| 16977 | case 815: /* *fop_sf_1 */ |
| 16978 | case 816: /* *fop_df_1 */ |
| 16979 | case 817: /* *fop_sf_2_i387 */ |
| 16980 | case 818: /* *fop_df_2_i387 */ |
| 16981 | case 819: /* *fop_sf_2_i387 */ |
| 16982 | case 820: /* *fop_df_2_i387 */ |
| 16983 | case 821: /* *fop_sf_3_i387 */ |
| 16984 | case 822: /* *fop_df_3_i387 */ |
| 16985 | case 823: /* *fop_sf_3_i387 */ |
| 16986 | case 824: /* *fop_df_3_i387 */ |
| 16987 | case 825: /* *fop_df_4_i387 */ |
| 16988 | case 826: /* *fop_df_5_i387 */ |
| 16989 | case 827: /* *fop_df_6_i387 */ |
| 16990 | case 828: /* *fop_xf_comm_i387 */ |
| 16991 | case 829: /* *fop_xf_1_i387 */ |
| 16992 | case 830: /* *fop_xf_2_i387 */ |
| 16993 | case 831: /* *fop_xf_2_i387 */ |
| 16994 | case 832: /* *fop_xf_3_i387 */ |
| 16995 | case 833: /* *fop_xf_3_i387 */ |
| 16996 | case 834: /* *fop_xf_4_i387 */ |
| 16997 | case 835: /* *fop_xf_4_i387 */ |
| 16998 | case 836: /* *fop_xf_5_i387 */ |
| 16999 | case 837: /* *fop_xf_5_i387 */ |
| 17000 | case 838: /* *fop_xf_6_i387 */ |
| 17001 | case 839: /* *fop_xf_6_i387 */ |
| 17002 | case 975: /* *movhicc_noc */ |
| 17003 | case 976: /* *movsicc_noc */ |
| 17004 | case 977: /* *movdicc_noc */ |
| 17005 | case 978: /* *movsicc_noc_zext */ |
| 17006 | case 979: /* *movqicc_noc */ |
| 17007 | case 981: /* *movdfcc_1 */ |
| 17008 | case 982: /* *movsfcc_1_387 */ |
| 17009 | case 993: /* pro_epilogue_adjust_stack_si_add */ |
| 17010 | case 994: /* pro_epilogue_adjust_stack_di_add */ |
| 17011 | case 995: /* pro_epilogue_adjust_stack_si_sub */ |
| 17012 | case 996: /* pro_epilogue_adjust_stack_di_sub */ |
| 17013 | case 1089: /* *movbnd32_internal_mpx */ |
| 17014 | case 1090: /* *movbnd64_internal_mpx */ |
| 17015 | case 1101: /* move_size_reloc_si */ |
| 17016 | case 1102: /* move_size_reloc_di */ |
| 17017 | case 1106: /* *movv8qi_internal */ |
| 17018 | case 1107: /* *movv4hi_internal */ |
| 17019 | case 1108: /* *movv2si_internal */ |
| 17020 | case 1109: /* *movv1di_internal */ |
| 17021 | case 1110: /* *movv2sf_internal */ |
| 17022 | case 1136: /* *mmx_concatv2sf */ |
| 17023 | case 1138: /* *vec_extractv2sf_1 */ |
| 17024 | case 1206: /* *mmx_concatv2si */ |
| 17025 | case 1208: /* *vec_extractv2si_1 */ |
| 17026 | case 1218: /* movv64qi_internal */ |
| 17027 | case 1219: /* movv32qi_internal */ |
| 17028 | case 1220: /* movv16qi_internal */ |
| 17029 | case 1221: /* movv32hi_internal */ |
| 17030 | case 1222: /* movv16hi_internal */ |
| 17031 | case 1223: /* movv8hi_internal */ |
| 17032 | case 1224: /* movv16si_internal */ |
| 17033 | case 1225: /* movv8si_internal */ |
| 17034 | case 1226: /* movv4si_internal */ |
| 17035 | case 1227: /* movv8di_internal */ |
| 17036 | case 1228: /* movv4di_internal */ |
| 17037 | case 1229: /* movv2di_internal */ |
| 17038 | case 1230: /* movv4ti_internal */ |
| 17039 | case 1231: /* movv2ti_internal */ |
| 17040 | case 1232: /* movv1ti_internal */ |
| 17041 | case 1233: /* movv16sf_internal */ |
| 17042 | case 1234: /* movv8sf_internal */ |
| 17043 | case 1235: /* movv4sf_internal */ |
| 17044 | case 1236: /* movv8df_internal */ |
| 17045 | case 1237: /* movv4df_internal */ |
| 17046 | case 1238: /* movv2df_internal */ |
| 17047 | case 1259: /* avx512vl_blendmv4si */ |
| 17048 | case 1262: /* avx512vl_blendmv2di */ |
| 17049 | case 1265: /* avx512vl_blendmv4sf */ |
| 17050 | case 1268: /* avx512vl_blendmv2df */ |
| 17051 | case 1270: /* avx512vl_blendmv16qi */ |
| 17052 | case 1274: /* avx512vl_blendmv8hi */ |
| 17053 | case 1293: /* sse2_movq128 */ |
| 17054 | case 1296: /* sse3_lddqu */ |
| 17055 | case 1301: /* sse_movntv4sf */ |
| 17056 | case 1304: /* sse2_movntv2df */ |
| 17057 | case 1308: /* kandqi */ |
| 17058 | case 1309: /* kiorqi */ |
| 17059 | case 1310: /* kxorqi */ |
| 17060 | case 1311: /* kandhi */ |
| 17061 | case 1312: /* kiorhi */ |
| 17062 | case 1313: /* kxorhi */ |
| 17063 | case 1314: /* kandsi */ |
| 17064 | case 1315: /* kiorsi */ |
| 17065 | case 1316: /* kxorsi */ |
| 17066 | case 1317: /* kanddi */ |
| 17067 | case 1318: /* kiordi */ |
| 17068 | case 1319: /* kxordi */ |
| 17069 | case 1320: /* kandnqi */ |
| 17070 | case 1321: /* kandnhi */ |
| 17071 | case 1322: /* kandnsi */ |
| 17072 | case 1323: /* kandndi */ |
| 17073 | case 1324: /* kxnorqi */ |
| 17074 | case 1325: /* kxnorhi */ |
| 17075 | case 1326: /* kxnorsi */ |
| 17076 | case 1327: /* kxnordi */ |
| 17077 | case 1328: /* knotqi */ |
| 17078 | case 1329: /* knothi */ |
| 17079 | case 1330: /* knotsi */ |
| 17080 | case 1331: /* knotdi */ |
| 17081 | case 1332: /* kaddqi */ |
| 17082 | case 1333: /* kaddhi */ |
| 17083 | case 1334: /* kaddsi */ |
| 17084 | case 1335: /* kadddi */ |
| 17085 | case 1336: /* kashiftqi */ |
| 17086 | case 1337: /* klshiftrtqi */ |
| 17087 | case 1338: /* kashifthi */ |
| 17088 | case 1339: /* klshiftrthi */ |
| 17089 | case 1340: /* kashiftsi */ |
| 17090 | case 1341: /* klshiftrtsi */ |
| 17091 | case 1342: /* kashiftdi */ |
| 17092 | case 1343: /* klshiftrtdi */ |
| 17093 | case 1344: /* ktestqi */ |
| 17094 | case 1345: /* ktesthi */ |
| 17095 | case 1346: /* ktestsi */ |
| 17096 | case 1347: /* ktestdi */ |
| 17097 | case 1348: /* kortestqi */ |
| 17098 | case 1349: /* kortesthi */ |
| 17099 | case 1350: /* kortestsi */ |
| 17100 | case 1351: /* kortestdi */ |
| 17101 | case 1352: /* kunpckhi */ |
| 17102 | case 2106: /* sse_cvtsi2ss */ |
| 17103 | case 2107: /* sse_cvtsi2ss_round */ |
| 17104 | case 2108: /* sse_cvtsi2ssq */ |
| 17105 | case 2109: /* sse_cvtsi2ssq_round */ |
| 17106 | case 2198: /* sse2_cvtsi2sd */ |
| 17107 | case 2199: /* sse2_cvtsi2sdq */ |
| 17108 | case 2200: /* sse2_cvtsi2sdq_round */ |
| 17109 | case 2418: /* sse_movhlps */ |
| 17110 | case 2419: /* sse_movlhps */ |
| 17111 | case 2449: /* sse_storehps */ |
| 17112 | case 2450: /* sse_loadhps */ |
| 17113 | case 2451: /* sse_storelps */ |
| 17114 | case 2459: /* *vec_concatv2sf_sse4_1 */ |
| 17115 | case 2460: /* *vec_concatv2sf_sse */ |
| 17116 | case 2461: /* *vec_concatv4sf */ |
| 17117 | case 2462: /* vec_setv4si_0 */ |
| 17118 | case 2463: /* vec_setv4sf_0 */ |
| 17119 | case 2467: /* *sse4_1_extractps */ |
| 17120 | case 2726: /* sse2_storehpd */ |
| 17121 | case 2727: /* *vec_extractv2df_1_sse */ |
| 17122 | case 2728: /* sse2_storelpd */ |
| 17123 | case 2729: /* *vec_extractv2df_0_sse */ |
| 17124 | case 2730: /* sse2_loadhpd */ |
| 17125 | case 2731: /* sse2_loadlpd */ |
| 17126 | case 2735: /* vec_concatv2df */ |
| 17127 | case 2784: /* *avx512vl_ss_truncatev4div4qi2 */ |
| 17128 | case 2785: /* *avx512vl_truncatev4div4qi2 */ |
| 17129 | case 2786: /* *avx512vl_us_truncatev4div4qi2 */ |
| 17130 | case 2787: /* *avx512vl_ss_truncatev2div2qi2 */ |
| 17131 | case 2788: /* *avx512vl_truncatev2div2qi2 */ |
| 17132 | case 2789: /* *avx512vl_us_truncatev2div2qi2 */ |
| 17133 | case 2790: /* *avx512vl_ss_truncatev8siv8qi2 */ |
| 17134 | case 2791: /* *avx512vl_truncatev8siv8qi2 */ |
| 17135 | case 2792: /* *avx512vl_us_truncatev8siv8qi2 */ |
| 17136 | case 2793: /* *avx512vl_ss_truncatev4siv4qi2 */ |
| 17137 | case 2794: /* *avx512vl_truncatev4siv4qi2 */ |
| 17138 | case 2795: /* *avx512vl_us_truncatev4siv4qi2 */ |
| 17139 | case 2796: /* *avx512vl_ss_truncatev8hiv8qi2 */ |
| 17140 | case 2797: /* *avx512vl_truncatev8hiv8qi2 */ |
| 17141 | case 2798: /* *avx512vl_us_truncatev8hiv8qi2 */ |
| 17142 | case 2802: /* avx512vl_ss_truncatev2div2qi2_mask */ |
| 17143 | case 2803: /* avx512vl_truncatev2div2qi2_mask */ |
| 17144 | case 2804: /* avx512vl_us_truncatev2div2qi2_mask */ |
| 17145 | case 2805: /* *avx512vl_ss_truncatev2div2qi2_mask_1 */ |
| 17146 | case 2806: /* *avx512vl_truncatev2div2qi2_mask_1 */ |
| 17147 | case 2807: /* *avx512vl_us_truncatev2div2qi2_mask_1 */ |
| 17148 | case 2817: /* avx512vl_ss_truncatev4siv4qi2_mask */ |
| 17149 | case 2818: /* avx512vl_truncatev4siv4qi2_mask */ |
| 17150 | case 2819: /* avx512vl_us_truncatev4siv4qi2_mask */ |
| 17151 | case 2820: /* avx512vl_ss_truncatev4div4qi2_mask */ |
| 17152 | case 2821: /* avx512vl_truncatev4div4qi2_mask */ |
| 17153 | case 2822: /* avx512vl_us_truncatev4div4qi2_mask */ |
| 17154 | case 2823: /* *avx512vl_ss_truncatev4siv4qi2_mask_1 */ |
| 17155 | case 2824: /* *avx512vl_truncatev4siv4qi2_mask_1 */ |
| 17156 | case 2825: /* *avx512vl_us_truncatev4siv4qi2_mask_1 */ |
| 17157 | case 2826: /* *avx512vl_ss_truncatev4div4qi2_mask_1 */ |
| 17158 | case 2827: /* *avx512vl_truncatev4div4qi2_mask_1 */ |
| 17159 | case 2828: /* *avx512vl_us_truncatev4div4qi2_mask_1 */ |
| 17160 | case 2841: /* avx512vl_ss_truncatev8hiv8qi2_mask */ |
| 17161 | case 2842: /* avx512vl_truncatev8hiv8qi2_mask */ |
| 17162 | case 2843: /* avx512vl_us_truncatev8hiv8qi2_mask */ |
| 17163 | case 2844: /* avx512vl_ss_truncatev8siv8qi2_mask */ |
| 17164 | case 2845: /* avx512vl_truncatev8siv8qi2_mask */ |
| 17165 | case 2846: /* avx512vl_us_truncatev8siv8qi2_mask */ |
| 17166 | case 2847: /* *avx512vl_ss_truncatev8hiv8qi2_mask_1 */ |
| 17167 | case 2848: /* *avx512vl_truncatev8hiv8qi2_mask_1 */ |
| 17168 | case 2849: /* *avx512vl_us_truncatev8hiv8qi2_mask_1 */ |
| 17169 | case 2850: /* *avx512vl_ss_truncatev8siv8qi2_mask_1 */ |
| 17170 | case 2851: /* *avx512vl_truncatev8siv8qi2_mask_1 */ |
| 17171 | case 2852: /* *avx512vl_us_truncatev8siv8qi2_mask_1 */ |
| 17172 | case 2859: /* *avx512vl_ss_truncatev4div4hi2 */ |
| 17173 | case 2860: /* *avx512vl_truncatev4div4hi2 */ |
| 17174 | case 2861: /* *avx512vl_us_truncatev4div4hi2 */ |
| 17175 | case 2862: /* *avx512vl_ss_truncatev2div2hi2 */ |
| 17176 | case 2863: /* *avx512vl_truncatev2div2hi2 */ |
| 17177 | case 2864: /* *avx512vl_us_truncatev2div2hi2 */ |
| 17178 | case 2865: /* *avx512vl_ss_truncatev4siv4hi2 */ |
| 17179 | case 2866: /* *avx512vl_truncatev4siv4hi2 */ |
| 17180 | case 2867: /* *avx512vl_us_truncatev4siv4hi2 */ |
| 17181 | case 2874: /* avx512vl_ss_truncatev4siv4hi2_mask */ |
| 17182 | case 2875: /* avx512vl_truncatev4siv4hi2_mask */ |
| 17183 | case 2876: /* avx512vl_us_truncatev4siv4hi2_mask */ |
| 17184 | case 2877: /* avx512vl_ss_truncatev4div4hi2_mask */ |
| 17185 | case 2878: /* avx512vl_truncatev4div4hi2_mask */ |
| 17186 | case 2879: /* avx512vl_us_truncatev4div4hi2_mask */ |
| 17187 | case 2880: /* *avx512vl_ss_truncatev4siv4hi2_mask_1 */ |
| 17188 | case 2881: /* *avx512vl_truncatev4siv4hi2_mask_1 */ |
| 17189 | case 2882: /* *avx512vl_us_truncatev4siv4hi2_mask_1 */ |
| 17190 | case 2883: /* *avx512vl_ss_truncatev4div4hi2_mask_1 */ |
| 17191 | case 2884: /* *avx512vl_truncatev4div4hi2_mask_1 */ |
| 17192 | case 2885: /* *avx512vl_us_truncatev4div4hi2_mask_1 */ |
| 17193 | case 2895: /* avx512vl_ss_truncatev2div2hi2_mask */ |
| 17194 | case 2896: /* avx512vl_truncatev2div2hi2_mask */ |
| 17195 | case 2897: /* avx512vl_us_truncatev2div2hi2_mask */ |
| 17196 | case 2898: /* *avx512vl_ss_truncatev2div2hi2_mask_1 */ |
| 17197 | case 2899: /* *avx512vl_truncatev2div2hi2_mask_1 */ |
| 17198 | case 2900: /* *avx512vl_us_truncatev2div2hi2_mask_1 */ |
| 17199 | case 2904: /* *avx512vl_ss_truncatev2div2si2 */ |
| 17200 | case 2905: /* *avx512vl_truncatev2div2si2 */ |
| 17201 | case 2906: /* *avx512vl_us_truncatev2div2si2 */ |
| 17202 | case 2910: /* avx512vl_ss_truncatev2div2si2_mask */ |
| 17203 | case 2911: /* avx512vl_truncatev2div2si2_mask */ |
| 17204 | case 2912: /* avx512vl_us_truncatev2div2si2_mask */ |
| 17205 | case 2913: /* *avx512vl_ss_truncatev2div2si2_mask_1 */ |
| 17206 | case 2914: /* *avx512vl_truncatev2div2si2_mask_1 */ |
| 17207 | case 2915: /* *avx512vl_us_truncatev2div2si2_mask_1 */ |
| 17208 | case 2919: /* *avx512f_ss_truncatev8div16qi2 */ |
| 17209 | case 2920: /* *avx512f_truncatev8div16qi2 */ |
| 17210 | case 2921: /* *avx512f_us_truncatev8div16qi2 */ |
| 17211 | case 2925: /* avx512f_ss_truncatev8div16qi2_mask */ |
| 17212 | case 2926: /* avx512f_truncatev8div16qi2_mask */ |
| 17213 | case 2927: /* avx512f_us_truncatev8div16qi2_mask */ |
| 17214 | case 2928: /* *avx512f_ss_truncatev8div16qi2_mask_1 */ |
| 17215 | case 2929: /* *avx512f_truncatev8div16qi2_mask_1 */ |
| 17216 | case 2930: /* *avx512f_us_truncatev8div16qi2_mask_1 */ |
| 17217 | case 3620: /* sse2_loadld */ |
| 17218 | case 3638: /* *vec_extractv2di_1 */ |
| 17219 | case 3639: /* *vec_concatv2si_sse4_1 */ |
| 17220 | case 3640: /* *vec_concatv2si */ |
| 17221 | case 3641: /* *vec_concatv4si */ |
| 17222 | case 3642: /* vec_concatv2di */ |
| 17223 | case 3659: /* sse_movmskps */ |
| 17224 | case 3661: /* sse2_movmskpd */ |
| 17225 | case 3663: /* *sse_movmskps_zext */ |
| 17226 | case 3665: /* *sse2_movmskpd_zext */ |
| 17227 | case 3670: /* *sse2_maskmovdqu */ |
| 17228 | case 3671: /* *sse2_maskmovdqu */ |
| 17229 | case 3773: /* sse4_1_blendps */ |
| 17230 | case 3775: /* sse4_1_blendpd */ |
| 17231 | case 3777: /* sse4_1_blendvps */ |
| 17232 | case 3779: /* sse4_1_blendvpd */ |
| 17233 | case 3786: /* sse4_1_movntdqa */ |
| 17234 | case 3796: /* sse4_1_pblendvb */ |
| 17235 | case 3797: /* sse4_1_pblendw */ |
| 17236 | case 3800: /* avx2_pblenddv4si */ |
| 17237 | case 3810: /* sse4_1_sign_extendv8qiv8hi2 */ |
| 17238 | case 3811: /* sse4_1_sign_extendv8qiv8hi2_mask */ |
| 17239 | case 3812: /* sse4_1_zero_extendv8qiv8hi2 */ |
| 17240 | case 3813: /* sse4_1_zero_extendv8qiv8hi2_mask */ |
| 17241 | case 3822: /* sse4_1_sign_extendv4qiv4si2 */ |
| 17242 | case 3823: /* sse4_1_sign_extendv4qiv4si2_mask */ |
| 17243 | case 3824: /* sse4_1_zero_extendv4qiv4si2 */ |
| 17244 | case 3825: /* sse4_1_zero_extendv4qiv4si2_mask */ |
| 17245 | case 3834: /* sse4_1_sign_extendv4hiv4si2 */ |
| 17246 | case 3835: /* sse4_1_sign_extendv4hiv4si2_mask */ |
| 17247 | case 3836: /* sse4_1_zero_extendv4hiv4si2 */ |
| 17248 | case 3837: /* sse4_1_zero_extendv4hiv4si2_mask */ |
| 17249 | case 3846: /* sse4_1_sign_extendv2qiv2di2 */ |
| 17250 | case 3847: /* sse4_1_sign_extendv2qiv2di2_mask */ |
| 17251 | case 3848: /* sse4_1_zero_extendv2qiv2di2 */ |
| 17252 | case 3849: /* sse4_1_zero_extendv2qiv2di2_mask */ |
| 17253 | case 3858: /* sse4_1_sign_extendv2hiv2di2 */ |
| 17254 | case 3859: /* sse4_1_sign_extendv2hiv2di2_mask */ |
| 17255 | case 3860: /* sse4_1_zero_extendv2hiv2di2 */ |
| 17256 | case 3861: /* sse4_1_zero_extendv2hiv2di2_mask */ |
| 17257 | case 3870: /* sse4_1_sign_extendv2siv2di2 */ |
| 17258 | case 3871: /* sse4_1_sign_extendv2siv2di2_mask */ |
| 17259 | case 3872: /* sse4_1_zero_extendv2siv2di2 */ |
| 17260 | case 3873: /* sse4_1_zero_extendv2siv2di2_mask */ |
| 17261 | case 4061: /* avx2_pbroadcastv16qi */ |
| 17262 | case 4064: /* avx2_pbroadcastv8hi */ |
| 17263 | case 4066: /* avx2_pbroadcastv4si */ |
| 17264 | case 4068: /* avx2_pbroadcastv2di */ |
| 17265 | case 4119: /* avx512vl_vec_dupv4si */ |
| 17266 | case 4120: /* avx512vl_vec_dupv4si_mask */ |
| 17267 | case 4125: /* avx512vl_vec_dupv2di */ |
| 17268 | case 4126: /* avx512vl_vec_dupv2di_mask */ |
| 17269 | case 4131: /* avx512vl_vec_dupv4sf */ |
| 17270 | case 4132: /* avx512vl_vec_dupv4sf_mask */ |
| 17271 | case 4137: /* avx512vl_vec_dupv2df */ |
| 17272 | case 4138: /* avx512vl_vec_dupv2df_mask */ |
| 17273 | case 4141: /* avx512vl_vec_dupv16qi */ |
| 17274 | case 4142: /* avx512vl_vec_dupv16qi_mask */ |
| 17275 | case 4149: /* avx512vl_vec_dupv8hi */ |
| 17276 | case 4150: /* avx512vl_vec_dupv8hi_mask */ |
| 17277 | case 4161: /* *avx512vl_vec_dup_gprv16qi */ |
| 17278 | case 4162: /* avx512vl_vec_dup_gprv16qi_mask */ |
| 17279 | case 4169: /* *avx512vl_vec_dup_gprv8hi */ |
| 17280 | case 4170: /* avx512vl_vec_dup_gprv8hi_mask */ |
| 17281 | case 4175: /* *avx512vl_vec_dup_gprv4si */ |
| 17282 | case 4176: /* avx512vl_vec_dup_gprv4si_mask */ |
| 17283 | case 4181: /* *avx512vl_vec_dup_gprv2di */ |
| 17284 | case 4182: /* avx512vl_vec_dup_gprv2di_mask */ |
| 17285 | case 4187: /* *avx512vl_vec_dup_gprv4sf */ |
| 17286 | case 4188: /* avx512vl_vec_dup_gprv4sf_mask */ |
| 17287 | case 4193: /* *avx512vl_vec_dup_gprv2df */ |
| 17288 | case 4194: /* avx512vl_vec_dup_gprv2df_mask */ |
| 17289 | case 4195: /* vec_dupv4sf */ |
| 17290 | case 4196: /* *vec_dupv4si */ |
| 17291 | case 4197: /* *vec_dupv2di */ |
| 17292 | case 4203: /* *vec_dupv16qi */ |
| 17293 | case 4205: /* *vec_dupv8hi */ |
| 17294 | case 4207: /* *vec_dupv4si */ |
| 17295 | case 4222: /* *avx512dq_broadcastv4si */ |
| 17296 | case 4223: /* avx512dq_broadcastv4si_mask */ |
| 17297 | case 4250: /* *avx_vperm_broadcast_v4sf */ |
| 17298 | case 4519: /* *avx2_gathersiv2di */ |
| 17299 | case 4520: /* *avx2_gathersiv2di */ |
| 17300 | case 4521: /* *avx2_gathersiv2df */ |
| 17301 | case 4522: /* *avx2_gathersiv2df */ |
| 17302 | case 4527: /* *avx2_gathersiv4si */ |
| 17303 | case 4528: /* *avx2_gathersiv4si */ |
| 17304 | case 4529: /* *avx2_gathersiv4sf */ |
| 17305 | case 4530: /* *avx2_gathersiv4sf */ |
| 17306 | case 4535: /* *avx2_gathersiv2di_2 */ |
| 17307 | case 4536: /* *avx2_gathersiv2di_2 */ |
| 17308 | case 4537: /* *avx2_gathersiv2df_2 */ |
| 17309 | case 4538: /* *avx2_gathersiv2df_2 */ |
| 17310 | case 4543: /* *avx2_gathersiv4si_2 */ |
| 17311 | case 4544: /* *avx2_gathersiv4si_2 */ |
| 17312 | case 4545: /* *avx2_gathersiv4sf_2 */ |
| 17313 | case 4546: /* *avx2_gathersiv4sf_2 */ |
| 17314 | case 4551: /* *avx2_gatherdiv2di */ |
| 17315 | case 4552: /* *avx2_gatherdiv2di */ |
| 17316 | case 4553: /* *avx2_gatherdiv2df */ |
| 17317 | case 4554: /* *avx2_gatherdiv2df */ |
| 17318 | case 4559: /* *avx2_gatherdiv4si */ |
| 17319 | case 4560: /* *avx2_gatherdiv4si */ |
| 17320 | case 4561: /* *avx2_gatherdiv4sf */ |
| 17321 | case 4562: /* *avx2_gatherdiv4sf */ |
| 17322 | case 4567: /* *avx2_gatherdiv2di_2 */ |
| 17323 | case 4568: /* *avx2_gatherdiv2di_2 */ |
| 17324 | case 4569: /* *avx2_gatherdiv2df_2 */ |
| 17325 | case 4570: /* *avx2_gatherdiv2df_2 */ |
| 17326 | case 4575: /* *avx2_gatherdiv4si_2 */ |
| 17327 | case 4576: /* *avx2_gatherdiv4si_2 */ |
| 17328 | case 4577: /* *avx2_gatherdiv4sf_2 */ |
| 17329 | case 4578: /* *avx2_gatherdiv4sf_2 */ |
| 17330 | case 4607: /* *avx512f_gathersiv4si */ |
| 17331 | case 4608: /* *avx512f_gathersiv4si */ |
| 17332 | case 4609: /* *avx512f_gathersiv4sf */ |
| 17333 | case 4610: /* *avx512f_gathersiv4sf */ |
| 17334 | case 4611: /* *avx512f_gathersiv2di */ |
| 17335 | case 4612: /* *avx512f_gathersiv2di */ |
| 17336 | case 4613: /* *avx512f_gathersiv2df */ |
| 17337 | case 4614: /* *avx512f_gathersiv2df */ |
| 17338 | case 4631: /* *avx512f_gathersiv4si_2 */ |
| 17339 | case 4632: /* *avx512f_gathersiv4si_2 */ |
| 17340 | case 4633: /* *avx512f_gathersiv4sf_2 */ |
| 17341 | case 4634: /* *avx512f_gathersiv4sf_2 */ |
| 17342 | case 4635: /* *avx512f_gathersiv2di_2 */ |
| 17343 | case 4636: /* *avx512f_gathersiv2di_2 */ |
| 17344 | case 4637: /* *avx512f_gathersiv2df_2 */ |
| 17345 | case 4638: /* *avx512f_gathersiv2df_2 */ |
| 17346 | case 4655: /* *avx512f_gatherdiv4si */ |
| 17347 | case 4656: /* *avx512f_gatherdiv4si */ |
| 17348 | case 4657: /* *avx512f_gatherdiv4sf */ |
| 17349 | case 4658: /* *avx512f_gatherdiv4sf */ |
| 17350 | case 4659: /* *avx512f_gatherdiv2di */ |
| 17351 | case 4660: /* *avx512f_gatherdiv2di */ |
| 17352 | case 4661: /* *avx512f_gatherdiv2df */ |
| 17353 | case 4662: /* *avx512f_gatherdiv2df */ |
| 17354 | case 4679: /* *avx512f_gatherdiv4si_2 */ |
| 17355 | case 4680: /* *avx512f_gatherdiv4si_2 */ |
| 17356 | case 4681: /* *avx512f_gatherdiv4sf_2 */ |
| 17357 | case 4682: /* *avx512f_gatherdiv4sf_2 */ |
| 17358 | case 4683: /* *avx512f_gatherdiv2di_2 */ |
| 17359 | case 4684: /* *avx512f_gatherdiv2di_2 */ |
| 17360 | case 4685: /* *avx512f_gatherdiv2df_2 */ |
| 17361 | case 4686: /* *avx512f_gatherdiv2df_2 */ |
| 17362 | case 4703: /* *avx512f_scattersiv4si */ |
| 17363 | case 4704: /* *avx512f_scattersiv4si */ |
| 17364 | case 4705: /* *avx512f_scattersiv4sf */ |
| 17365 | case 4706: /* *avx512f_scattersiv4sf */ |
| 17366 | case 4707: /* *avx512f_scattersiv2di */ |
| 17367 | case 4708: /* *avx512f_scattersiv2di */ |
| 17368 | case 4709: /* *avx512f_scattersiv2df */ |
| 17369 | case 4710: /* *avx512f_scattersiv2df */ |
| 17370 | case 4727: /* *avx512f_scatterdiv4si */ |
| 17371 | case 4728: /* *avx512f_scatterdiv4si */ |
| 17372 | case 4729: /* *avx512f_scatterdiv4sf */ |
| 17373 | case 4730: /* *avx512f_scatterdiv4sf */ |
| 17374 | case 4731: /* *avx512f_scatterdiv2di */ |
| 17375 | case 4732: /* *avx512f_scatterdiv2di */ |
| 17376 | case 4733: /* *avx512f_scatterdiv2df */ |
| 17377 | case 4734: /* *avx512f_scatterdiv2df */ |
| 17378 | case 4743: /* avx512vl_compressv4si_mask */ |
| 17379 | case 4744: /* avx512vl_compressv4sf_mask */ |
| 17380 | case 4745: /* avx512vl_compressv2di_mask */ |
| 17381 | case 4746: /* avx512vl_compressv2df_mask */ |
| 17382 | extract_insn_cached (insn); |
| 17383 | if ((cached_type = get_attr_type (insn)) == TYPE_IBR) |
| 17384 | { |
| 17385 | return 0; |
| 17386 | } |
| 17387 | else if ((cached_type == TYPE_CALL) || (cached_type == TYPE_CALLV)) |
| 17388 | { |
| 17389 | return 0; |
| 17390 | } |
| 17391 | else if (cached_type == TYPE_PUSH) |
| 17392 | { |
| 17393 | return 2; |
| 17394 | } |
| 17395 | else if (cached_type == TYPE_POP) |
| 17396 | { |
| 17397 | return 4; |
| 17398 | } |
| 17399 | else if (cached_type == TYPE_LEAVE) |
| 17400 | { |
| 17401 | return 3; |
| 17402 | } |
| 17403 | else if (cached_type == TYPE_LEA) |
| 17404 | { |
| 17405 | return 2; |
| 17406 | } |
| 17407 | else if ((cached_type == TYPE_IMUL) && ((cached_mode = get_attr_mode (insn)) == MODE_DI) && (((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) || (cached_memory == MEMORY_UNKNOWN))) |
| 17408 | { |
| 17409 | return 4; |
| 17410 | } |
| 17411 | else if ((cached_type == TYPE_IMUL) && (((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) || (cached_memory == MEMORY_UNKNOWN))) |
| 17412 | { |
| 17413 | return 3; |
| 17414 | } |
| 17415 | else if ((cached_type == TYPE_IMUL) && ((cached_mode = get_attr_mode (insn)) == MODE_DI) && (((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) || (cached_memory == MEMORY_BOTH))) |
| 17416 | { |
| 17417 | return 7; |
| 17418 | } |
| 17419 | else if ((cached_type == TYPE_IMUL) && (((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) || (cached_memory == MEMORY_BOTH))) |
| 17420 | { |
| 17421 | return 6; |
| 17422 | } |
| 17423 | else if ((cached_type == TYPE_IDIV) && (((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) || (cached_memory == MEMORY_UNKNOWN))) |
| 17424 | { |
| 17425 | return 6; |
| 17426 | } |
| 17427 | else if ((cached_type == TYPE_IDIV) && (((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) || (cached_memory == MEMORY_BOTH))) |
| 17428 | { |
| 17429 | return 9; |
| 17430 | } |
| 17431 | else if ((cached_type == TYPE_STR) && (((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) || (cached_memory == MEMORY_BOTH) || (cached_memory == MEMORY_STORE))) |
| 17432 | { |
| 17433 | return 6; |
| 17434 | } |
| 17435 | else if (((cached_athlon_decode = get_attr_athlon_decode (insn)) == ATHLON_DECODE_DIRECT) && (((cached_unit = get_attr_unit (insn)) == UNIT_INTEGER) || (cached_unit == UNIT_UNKNOWN)) && (((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) || (cached_memory == MEMORY_UNKNOWN))) |
| 17436 | { |
| 17437 | return 1; |
| 17438 | } |
| 17439 | else if ((cached_athlon_decode == ATHLON_DECODE_VECTOR) && (((cached_unit = get_attr_unit (insn)) == UNIT_INTEGER) || (cached_unit == UNIT_UNKNOWN)) && (((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) || (cached_memory == MEMORY_UNKNOWN))) |
| 17440 | { |
| 17441 | return 2; |
| 17442 | } |
| 17443 | else if ((cached_type == TYPE_IMOV) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 17444 | { |
| 17445 | return 3; |
| 17446 | } |
| 17447 | else if ((cached_athlon_decode == ATHLON_DECODE_DIRECT) && (((cached_unit = get_attr_unit (insn)) == UNIT_INTEGER) || (cached_unit == UNIT_UNKNOWN)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 17448 | { |
| 17449 | return 4; |
| 17450 | } |
| 17451 | else if ((cached_athlon_decode == ATHLON_DECODE_VECTOR) && (((cached_unit = get_attr_unit (insn)) == UNIT_INTEGER) || (cached_unit == UNIT_UNKNOWN)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 17452 | { |
| 17453 | return 6; |
| 17454 | } |
| 17455 | else if ((cached_type == TYPE_IMOV) && ((cached_memory = get_attr_memory (insn)) == MEMORY_STORE)) |
| 17456 | { |
| 17457 | return 1; |
| 17458 | } |
| 17459 | else if ((cached_athlon_decode == ATHLON_DECODE_DIRECT) && (((cached_unit = get_attr_unit (insn)) == UNIT_INTEGER) || (cached_unit == UNIT_UNKNOWN)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_BOTH)) |
| 17460 | { |
| 17461 | return 4; |
| 17462 | } |
| 17463 | else if ((cached_athlon_decode == ATHLON_DECODE_VECTOR) && (((cached_unit = get_attr_unit (insn)) == UNIT_INTEGER) || (cached_unit == UNIT_UNKNOWN)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_BOTH)) |
| 17464 | { |
| 17465 | return 6; |
| 17466 | } |
| 17467 | else if ((cached_athlon_decode == ATHLON_DECODE_DIRECT) && (((cached_unit = get_attr_unit (insn)) == UNIT_INTEGER) || (cached_unit == UNIT_UNKNOWN)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_STORE)) |
| 17468 | { |
| 17469 | return 1; |
| 17470 | } |
| 17471 | else if ((cached_athlon_decode == ATHLON_DECODE_VECTOR) && (((cached_unit = get_attr_unit (insn)) == UNIT_INTEGER) || (cached_unit == UNIT_UNKNOWN)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_STORE)) |
| 17472 | { |
| 17473 | return 2; |
| 17474 | } |
| 17475 | else if ((cached_type == TYPE_FMOV) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) && ((cached_mode = get_attr_mode (insn)) == MODE_XF)) |
| 17476 | { |
| 17477 | return 13 /* 0xd */; |
| 17478 | } |
| 17479 | else if ((cached_type == TYPE_FMOV) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 17480 | { |
| 17481 | return 2; |
| 17482 | } |
| 17483 | else if ((cached_type == TYPE_FMOV) && (((cached_memory = get_attr_memory (insn)) == MEMORY_STORE) || (cached_memory == MEMORY_BOTH)) && ((cached_mode = get_attr_mode (insn)) == MODE_XF)) |
| 17484 | { |
| 17485 | return 8; |
| 17486 | } |
| 17487 | else if ((cached_type == TYPE_FMOV) && (((cached_memory = get_attr_memory (insn)) == MEMORY_STORE) || (cached_memory == MEMORY_BOTH))) |
| 17488 | { |
| 17489 | return 2; |
| 17490 | } |
| 17491 | else if ((cached_type == TYPE_FISTP) || (cached_type == TYPE_FISTTP)) |
| 17492 | { |
| 17493 | return 4; |
| 17494 | } |
| 17495 | else if (cached_type == TYPE_FMOV) |
| 17496 | { |
| 17497 | return 2; |
| 17498 | } |
| 17499 | else if ((cached_type == TYPE_FOP) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 17500 | { |
| 17501 | return 6; |
| 17502 | } |
| 17503 | else if (cached_type == TYPE_FOP) |
| 17504 | { |
| 17505 | return 4; |
| 17506 | } |
| 17507 | else if ((cached_type == TYPE_FMUL) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 17508 | { |
| 17509 | return 6; |
| 17510 | } |
| 17511 | else if (cached_type == TYPE_FMUL) |
| 17512 | { |
| 17513 | return 4; |
| 17514 | } |
| 17515 | else if (cached_type == TYPE_FSGN) |
| 17516 | { |
| 17517 | return 2; |
| 17518 | } |
| 17519 | else if ((cached_type == TYPE_FDIV) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 17520 | { |
| 17521 | return 13 /* 0xd */; |
| 17522 | } |
| 17523 | else if (cached_type == TYPE_FDIV) |
| 17524 | { |
| 17525 | return 11 /* 0xb */; |
| 17526 | } |
| 17527 | else if ((cached_type == TYPE_FPSPC) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 17528 | { |
| 17529 | return 103 /* 0x67 */; |
| 17530 | } |
| 17531 | else if (cached_type == TYPE_FPSPC) |
| 17532 | { |
| 17533 | return 100 /* 0x64 */; |
| 17534 | } |
| 17535 | else if ((cached_type == TYPE_FCMOV) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 17536 | { |
| 17537 | return 17 /* 0x11 */; |
| 17538 | } |
| 17539 | else if (cached_type == TYPE_FCMOV) |
| 17540 | { |
| 17541 | return 15 /* 0xf */; |
| 17542 | } |
| 17543 | else if ((cached_type == TYPE_FCMP) && (cached_athlon_decode == ATHLON_DECODE_VECTOR) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 17544 | { |
| 17545 | return 5; |
| 17546 | } |
| 17547 | else if ((cached_athlon_decode == ATHLON_DECODE_VECTOR) && (cached_type == TYPE_FCMP)) |
| 17548 | { |
| 17549 | return 3; |
| 17550 | } |
| 17551 | else if ((cached_type == TYPE_FCMP) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 17552 | { |
| 17553 | return 4; |
| 17554 | } |
| 17555 | else if (cached_type == TYPE_FCMP) |
| 17556 | { |
| 17557 | return 2; |
| 17558 | } |
| 17559 | else if ((cached_type == TYPE_SSEMOV) && (memory_operand (operands[1], DFmode))) |
| 17560 | { |
| 17561 | return 2; |
| 17562 | } |
| 17563 | else if ((cached_type == TYPE_SSEMOV) && (((cached_mode = get_attr_mode (insn)) == MODE_V4SF) || (cached_mode == MODE_V2DF) || (cached_mode == MODE_TI)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 17564 | { |
| 17565 | return 2; |
| 17566 | } |
| 17567 | else if ((cached_type == TYPE_SSEMOV) && (((cached_mode = get_attr_mode (insn)) == MODE_SF) || (cached_mode == MODE_DI)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 17568 | { |
| 17569 | return 1; |
| 17570 | } |
| 17571 | else if (((cached_type == TYPE_MMXMOV) || (cached_type == TYPE_SSEMOV)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 17572 | { |
| 17573 | return 2; |
| 17574 | } |
| 17575 | else if (((cached_type == TYPE_MMXMOV) || (cached_type == TYPE_SSEMOV)) && (((cached_mode = get_attr_mode (insn)) == MODE_V4SF) || (cached_mode == MODE_V2DF) || (cached_mode == MODE_TI)) && (((cached_memory = get_attr_memory (insn)) == MEMORY_STORE) || (cached_memory == MEMORY_BOTH))) |
| 17576 | { |
| 17577 | return 3; |
| 17578 | } |
| 17579 | else if (((cached_type == TYPE_MMXMOV) || (cached_type == TYPE_SSEMOV)) && (((cached_mode = get_attr_mode (insn)) == MODE_V4SF) || (cached_mode == MODE_V2DF) || (cached_mode == MODE_TI)) && (((cached_memory = get_attr_memory (insn)) == MEMORY_STORE) || (cached_memory == MEMORY_BOTH))) |
| 17580 | { |
| 17581 | return 3; |
| 17582 | } |
| 17583 | else if (((cached_type == TYPE_MMXMOV) || (cached_type == TYPE_SSEMOV)) && (((cached_memory = get_attr_memory (insn)) == MEMORY_STORE) || (cached_memory == MEMORY_BOTH))) |
| 17584 | { |
| 17585 | return 2; |
| 17586 | } |
| 17587 | else if ((cached_type == TYPE_SSEMOV) && (((cached_mode = get_attr_mode (insn)) == MODE_V4SF) || (cached_mode == MODE_V2DF) || (cached_mode == MODE_TI))) |
| 17588 | { |
| 17589 | return 2; |
| 17590 | } |
| 17591 | else if ((cached_type == TYPE_MMXMOV) || (cached_type == TYPE_SSEMOV)) |
| 17592 | { |
| 17593 | return 2; |
| 17594 | } |
| 17595 | else if ((cached_type == TYPE_MMXMUL) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 17596 | { |
| 17597 | return 4; |
| 17598 | } |
| 17599 | else if (cached_type == TYPE_MMXMUL) |
| 17600 | { |
| 17601 | return 3; |
| 17602 | } |
| 17603 | else if (((cached_unit = get_attr_unit (insn)) == UNIT_MMX) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 17604 | { |
| 17605 | return 3; |
| 17606 | } |
| 17607 | else if (cached_unit == UNIT_MMX) |
| 17608 | { |
| 17609 | return 2; |
| 17610 | } |
| 17611 | else if (((cached_type == TYPE_SSELOG) || (cached_type == TYPE_SSELOG1) || (cached_type == TYPE_SSESHUF) || (cached_type == TYPE_SSESHUF1)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 17612 | { |
| 17613 | return 5; |
| 17614 | } |
| 17615 | else if ((cached_type == TYPE_SSELOG) || (cached_type == TYPE_SSELOG1) || (cached_type == TYPE_SSESHUF) || (cached_type == TYPE_SSESHUF1)) |
| 17616 | { |
| 17617 | return 3; |
| 17618 | } |
| 17619 | else if ((cached_type == TYPE_SSECMP) && (((cached_mode = get_attr_mode (insn)) == MODE_SF) || (cached_mode == MODE_DF) || (cached_mode == MODE_DI) || (cached_mode == MODE_TI)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 17620 | { |
| 17621 | return 4; |
| 17622 | } |
| 17623 | else if ((cached_type == TYPE_SSECMP) && (((cached_mode = get_attr_mode (insn)) == MODE_SF) || (cached_mode == MODE_DF) || (cached_mode == MODE_DI) || (cached_mode == MODE_TI))) |
| 17624 | { |
| 17625 | return 2; |
| 17626 | } |
| 17627 | else if ((cached_type == TYPE_SSECMP) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 17628 | { |
| 17629 | return 5; |
| 17630 | } |
| 17631 | else if (cached_type == TYPE_SSECMP) |
| 17632 | { |
| 17633 | return 3; |
| 17634 | } |
| 17635 | else if ((cached_type == TYPE_SSECOMI) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 17636 | { |
| 17637 | return 6; |
| 17638 | } |
| 17639 | else if (cached_type == TYPE_SSECOMI) |
| 17640 | { |
| 17641 | return 4; |
| 17642 | } |
| 17643 | else if (((cached_type == TYPE_SSEADD) || (cached_type == TYPE_SSEADD1)) && (((cached_mode = get_attr_mode (insn)) == MODE_SF) || (cached_mode == MODE_DF) || (cached_mode == MODE_DI)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 17644 | { |
| 17645 | return 6; |
| 17646 | } |
| 17647 | else if (((cached_type == TYPE_SSEADD) || (cached_type == TYPE_SSEADD1)) && (((cached_mode = get_attr_mode (insn)) == MODE_SF) || (cached_mode == MODE_DF) || (cached_mode == MODE_DI))) |
| 17648 | { |
| 17649 | return 4; |
| 17650 | } |
| 17651 | else if (((cached_type == TYPE_SSEADD) || (cached_type == TYPE_SSEADD1)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 17652 | { |
| 17653 | return 7; |
| 17654 | } |
| 17655 | else if ((cached_type == TYPE_SSEADD) || (cached_type == TYPE_SSEADD1)) |
| 17656 | { |
| 17657 | return 5; |
| 17658 | } |
| 17659 | else if ((cached_type == TYPE_SSECVT) && (cached_athlon_decode == ATHLON_DECODE_DIRECT) && ((cached_mode = get_attr_mode (insn)) == MODE_DF) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 17660 | { |
| 17661 | return 4; |
| 17662 | } |
| 17663 | else if ((cached_type == TYPE_SSECVT) && (cached_athlon_decode == ATHLON_DECODE_DIRECT) && ((cached_mode = get_attr_mode (insn)) == MODE_DF)) |
| 17664 | { |
| 17665 | return 2; |
| 17666 | } |
| 17667 | else if ((cached_type == TYPE_SSECVT) && (cached_athlon_decode == ATHLON_DECODE_DOUBLE) && (((cached_mode = get_attr_mode (insn)) == MODE_V2DF) || (cached_mode == MODE_V4SF) || (cached_mode == MODE_TI)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 17668 | { |
| 17669 | return 5; |
| 17670 | } |
| 17671 | else if ((cached_type == TYPE_SSECVT) && (cached_athlon_decode == ATHLON_DECODE_DOUBLE) && (((cached_mode = get_attr_mode (insn)) == MODE_V2DF) || (cached_mode == MODE_V4SF) || (cached_mode == MODE_TI))) |
| 17672 | { |
| 17673 | return 3; |
| 17674 | } |
| 17675 | else if ((cached_type == TYPE_SSEICVT) && (cached_athlon_decode == ATHLON_DECODE_DIRECT) && (((cached_mode = get_attr_mode (insn)) == MODE_SF) || (cached_mode == MODE_DF)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 17676 | { |
| 17677 | return 6; |
| 17678 | } |
| 17679 | else if ((cached_type == TYPE_SSEICVT) && (cached_athlon_decode == ATHLON_DECODE_DOUBLE) && (((cached_mode = get_attr_mode (insn)) == MODE_SF) || (cached_mode == MODE_DF)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 17680 | { |
| 17681 | return 9; |
| 17682 | } |
| 17683 | else if ((cached_type == TYPE_SSEICVT) && (cached_athlon_decode == ATHLON_DECODE_DOUBLE) && (((cached_mode = get_attr_mode (insn)) == MODE_SF) || (cached_mode == MODE_DF)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 17684 | { |
| 17685 | return 11 /* 0xb */; |
| 17686 | } |
| 17687 | else if ((cached_type == TYPE_SSEICVT) && (cached_athlon_decode == ATHLON_DECODE_VECTOR) && (((cached_mode = get_attr_mode (insn)) == MODE_SF) || (cached_mode == MODE_DF)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 17688 | { |
| 17689 | return 14 /* 0xe */; |
| 17690 | } |
| 17691 | else if ((cached_type == TYPE_SSECVT) && (cached_athlon_decode == ATHLON_DECODE_DOUBLE) && ((cached_mode = get_attr_mode (insn)) == MODE_SF) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 17692 | { |
| 17693 | return 9; |
| 17694 | } |
| 17695 | else if ((cached_type == TYPE_SSECVT) && (cached_athlon_decode == ATHLON_DECODE_VECTOR) && ((cached_mode = get_attr_mode (insn)) == MODE_SF) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 17696 | { |
| 17697 | return 12 /* 0xc */; |
| 17698 | } |
| 17699 | else if ((cached_type == TYPE_SSECVT) && (cached_athlon_decode == ATHLON_DECODE_VECTOR) && (((cached_mode = get_attr_mode (insn)) == MODE_V4SF) || (cached_mode == MODE_V2DF) || (cached_mode == MODE_TI)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 17700 | { |
| 17701 | return 8; |
| 17702 | } |
| 17703 | else if ((cached_type == TYPE_SSECVT) && (cached_athlon_decode == ATHLON_DECODE_VECTOR) && (((cached_mode = get_attr_mode (insn)) == MODE_V4SF) || (cached_mode == MODE_V2DF) || (cached_mode == MODE_TI)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 17704 | { |
| 17705 | return 8; |
| 17706 | } |
| 17707 | else if ((cached_type == TYPE_SSEICVT) && (cached_athlon_decode == ATHLON_DECODE_VECTOR) && (((cached_mode = get_attr_mode (insn)) == MODE_SI) || (cached_mode == MODE_DI)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 17708 | { |
| 17709 | return 9; |
| 17710 | } |
| 17711 | else if ((cached_type == TYPE_SSEICVT) && (cached_athlon_decode == ATHLON_DECODE_DOUBLE) && (((cached_mode = get_attr_mode (insn)) == MODE_SI) || (cached_mode == MODE_DI)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 17712 | { |
| 17713 | return 9; |
| 17714 | } |
| 17715 | else if ((cached_type == TYPE_SSEMUL) && (((cached_mode = get_attr_mode (insn)) == MODE_SF) || (cached_mode == MODE_DF)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 17716 | { |
| 17717 | return 6; |
| 17718 | } |
| 17719 | else if ((cached_type == TYPE_SSEMUL) && (((cached_mode = get_attr_mode (insn)) == MODE_SF) || (cached_mode == MODE_DF))) |
| 17720 | { |
| 17721 | return 4; |
| 17722 | } |
| 17723 | else if ((cached_type == TYPE_SSEMUL) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 17724 | { |
| 17725 | return 7; |
| 17726 | } |
| 17727 | else if (cached_type == TYPE_SSEMUL) |
| 17728 | { |
| 17729 | return 5; |
| 17730 | } |
| 17731 | else if ((cached_type == TYPE_SSEDIV) && (((cached_mode = get_attr_mode (insn)) == MODE_SF) || (cached_mode == MODE_DF)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 17732 | { |
| 17733 | return 22 /* 0x16 */; |
| 17734 | } |
| 17735 | else if ((cached_type == TYPE_SSEDIV) && (((cached_mode = get_attr_mode (insn)) == MODE_SF) || (cached_mode == MODE_DF))) |
| 17736 | { |
| 17737 | return 20 /* 0x14 */; |
| 17738 | } |
| 17739 | else if ((cached_type == TYPE_SSEDIV) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 17740 | { |
| 17741 | return 35 /* 0x23 */; |
| 17742 | } |
| 17743 | else if (cached_type == TYPE_SSEDIV) |
| 17744 | { |
| 17745 | return 39 /* 0x27 */; |
| 17746 | } |
| 17747 | else |
| 17748 | { |
| 17749 | return 0; |
| 17750 | } |
| 17751 | |
| 17752 | default: |
| 17753 | return 0; |
| 17754 | |
| 17755 | } |
| 17756 | } |
| 17757 | |
| 17758 | int |
| 17759 | insn_default_latency_core2 (rtx_insn *insn ATTRIBUTE_UNUSED) |
| 17760 | { |
| 17761 | enum attr_memory cached_memory ATTRIBUTE_UNUSED; |
| 17762 | enum attr_type cached_type ATTRIBUTE_UNUSED; |
| 17763 | enum attr_mode cached_mode ATTRIBUTE_UNUSED; |
| 17764 | int cached_length_immediate ATTRIBUTE_UNUSED; |
| 17765 | |
| 17766 | switch (recog_memoized (insn)) |
| 17767 | { |
| 17768 | case 4489: /* avx512bw_lshrvv32hi_mask */ |
| 17769 | case 4488: /* avx512bw_lshrvv32hi */ |
| 17770 | case 4487: /* avx512bw_ashlvv32hi_mask */ |
| 17771 | case 4486: /* avx512bw_ashlvv32hi */ |
| 17772 | case 4485: /* avx512vl_lshrvv16hi_mask */ |
| 17773 | case 4484: /* avx512vl_lshrvv16hi */ |
| 17774 | case 4483: /* avx512vl_ashlvv16hi_mask */ |
| 17775 | case 4482: /* avx512vl_ashlvv16hi */ |
| 17776 | case 4481: /* avx512vl_lshrvv8hi_mask */ |
| 17777 | case 4480: /* avx512vl_lshrvv8hi */ |
| 17778 | case 4479: /* avx512vl_ashlvv8hi_mask */ |
| 17779 | case 4478: /* avx512vl_ashlvv8hi */ |
| 17780 | case 4477: /* avx2_lshrvv2di_mask */ |
| 17781 | case 4476: /* avx2_lshrvv2di */ |
| 17782 | case 4475: /* avx2_ashlvv2di_mask */ |
| 17783 | case 4474: /* avx2_ashlvv2di */ |
| 17784 | case 4473: /* avx2_lshrvv4di_mask */ |
| 17785 | case 4472: /* avx2_lshrvv4di */ |
| 17786 | case 4471: /* avx2_ashlvv4di_mask */ |
| 17787 | case 4470: /* avx2_ashlvv4di */ |
| 17788 | case 4469: /* avx512f_lshrvv8di_mask */ |
| 17789 | case 4468: /* avx512f_lshrvv8di */ |
| 17790 | case 4467: /* avx512f_ashlvv8di_mask */ |
| 17791 | case 4466: /* avx512f_ashlvv8di */ |
| 17792 | case 4465: /* avx2_lshrvv4si_mask */ |
| 17793 | case 4464: /* avx2_lshrvv4si */ |
| 17794 | case 4463: /* avx2_ashlvv4si_mask */ |
| 17795 | case 4462: /* avx2_ashlvv4si */ |
| 17796 | case 4461: /* avx2_lshrvv8si_mask */ |
| 17797 | case 4460: /* avx2_lshrvv8si */ |
| 17798 | case 4459: /* avx2_ashlvv8si_mask */ |
| 17799 | case 4458: /* avx2_ashlvv8si */ |
| 17800 | case 4457: /* avx512f_lshrvv16si_mask */ |
| 17801 | case 4456: /* avx512f_lshrvv16si */ |
| 17802 | case 4455: /* avx512f_ashlvv16si_mask */ |
| 17803 | case 4454: /* avx512f_ashlvv16si */ |
| 17804 | case 4453: /* avx512bw_ashrvv32hi_mask */ |
| 17805 | case 4452: /* avx512bw_ashrvv32hi */ |
| 17806 | case 4451: /* avx512vl_ashrvv16hi_mask */ |
| 17807 | case 4450: /* avx512vl_ashrvv16hi */ |
| 17808 | case 4449: /* avx512vl_ashrvv8hi_mask */ |
| 17809 | case 4448: /* avx512vl_ashrvv8hi */ |
| 17810 | case 4447: /* avx512f_ashrvv8di_mask */ |
| 17811 | case 4446: /* avx512f_ashrvv8di */ |
| 17812 | case 4445: /* avx2_ashrvv4di_mask */ |
| 17813 | case 4444: /* avx2_ashrvv4di */ |
| 17814 | case 4443: /* avx2_ashrvv2di_mask */ |
| 17815 | case 4442: /* avx2_ashrvv2di */ |
| 17816 | case 4441: /* avx512f_ashrvv16si_mask */ |
| 17817 | case 4440: /* avx512f_ashrvv16si */ |
| 17818 | case 4439: /* avx2_ashrvv8si_mask */ |
| 17819 | case 4438: /* avx2_ashrvv8si */ |
| 17820 | case 4437: /* avx2_ashrvv4si_mask */ |
| 17821 | case 4436: /* avx2_ashrvv4si */ |
| 17822 | case 4019: /* xop_shlv2di3 */ |
| 17823 | case 4018: /* xop_shlv4si3 */ |
| 17824 | case 4017: /* xop_shlv8hi3 */ |
| 17825 | case 4016: /* xop_shlv16qi3 */ |
| 17826 | case 4015: /* xop_shav2di3 */ |
| 17827 | case 4014: /* xop_shav4si3 */ |
| 17828 | case 4013: /* xop_shav8hi3 */ |
| 17829 | case 4012: /* xop_shav16qi3 */ |
| 17830 | case 4011: /* xop_vrotlv2di3 */ |
| 17831 | case 4010: /* xop_vrotlv4si3 */ |
| 17832 | case 4009: /* xop_vrotlv8hi3 */ |
| 17833 | case 4008: /* xop_vrotlv16qi3 */ |
| 17834 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) |
| 17835 | { |
| 17836 | return 2; |
| 17837 | } |
| 17838 | else if (cached_memory == MEMORY_LOAD) |
| 17839 | { |
| 17840 | return 3; |
| 17841 | } |
| 17842 | else |
| 17843 | { |
| 17844 | return 0; |
| 17845 | } |
| 17846 | |
| 17847 | case 2467: /* *sse4_1_extractps */ |
| 17848 | extract_constrain_insn_cached (insn); |
| 17849 | if (!((1 << which_alternative) & 0x7)) |
| 17850 | { |
| 17851 | return 6; |
| 17852 | } |
| 17853 | else |
| 17854 | { |
| 17855 | return 0; |
| 17856 | } |
| 17857 | |
| 17858 | case 1464: /* sse2_divv2df3_mask */ |
| 17859 | case 1463: /* sse2_divv2df3 */ |
| 17860 | case 1448: /* sse2_vmdivv2df3_round */ |
| 17861 | case 1447: /* sse2_vmdivv2df3 */ |
| 17862 | if (get_attr_memory (insn) == MEMORY_NONE) |
| 17863 | { |
| 17864 | return 32 /* 0x20 */; |
| 17865 | } |
| 17866 | else |
| 17867 | { |
| 17868 | return 0; |
| 17869 | } |
| 17870 | |
| 17871 | case 1456: /* sse_divv4sf3_mask */ |
| 17872 | case 1455: /* sse_divv4sf3 */ |
| 17873 | case 1444: /* sse_vmdivv4sf3_round */ |
| 17874 | case 1443: /* sse_vmdivv4sf3 */ |
| 17875 | if (get_attr_memory (insn) == MEMORY_NONE) |
| 17876 | { |
| 17877 | return 18 /* 0x12 */; |
| 17878 | } |
| 17879 | else |
| 17880 | { |
| 17881 | return 0; |
| 17882 | } |
| 17883 | |
| 17884 | case 3783: /* sse4_1_dppd */ |
| 17885 | case 1446: /* sse2_vmmulv2df3_round */ |
| 17886 | case 1445: /* sse2_vmmulv2df3 */ |
| 17887 | case 1440: /* *mulv2df3_mask_round */ |
| 17888 | case 1439: /* *mulv2df3_mask */ |
| 17889 | case 1438: /* *mulv2df3_round */ |
| 17890 | case 1437: /* *mulv2df3 */ |
| 17891 | if (((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) || (cached_memory == MEMORY_LOAD)) |
| 17892 | { |
| 17893 | return 5; |
| 17894 | } |
| 17895 | else |
| 17896 | { |
| 17897 | return 0; |
| 17898 | } |
| 17899 | |
| 17900 | case 3781: /* sse4_1_dpps */ |
| 17901 | case 1442: /* sse_vmmulv4sf3_round */ |
| 17902 | case 1441: /* sse_vmmulv4sf3 */ |
| 17903 | case 1428: /* *mulv4sf3_mask_round */ |
| 17904 | case 1427: /* *mulv4sf3_mask */ |
| 17905 | case 1426: /* *mulv4sf3_round */ |
| 17906 | case 1425: /* *mulv4sf3 */ |
| 17907 | if (((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) || (cached_memory == MEMORY_LOAD)) |
| 17908 | { |
| 17909 | return 4; |
| 17910 | } |
| 17911 | else |
| 17912 | { |
| 17913 | return 0; |
| 17914 | } |
| 17915 | |
| 17916 | case 4770: /* avx512vl_expandv2df_mask */ |
| 17917 | case 4769: /* avx512vl_expandv2di_mask */ |
| 17918 | case 4768: /* avx512vl_expandv4sf_mask */ |
| 17919 | case 4767: /* avx512vl_expandv4si_mask */ |
| 17920 | case 4766: /* avx512vl_expandv4df_mask */ |
| 17921 | case 4765: /* avx512vl_expandv4di_mask */ |
| 17922 | case 4764: /* avx512vl_expandv8sf_mask */ |
| 17923 | case 4763: /* avx512vl_expandv8si_mask */ |
| 17924 | case 4762: /* avx512f_expandv8df_mask */ |
| 17925 | case 4761: /* avx512f_expandv8di_mask */ |
| 17926 | case 4760: /* avx512f_expandv16sf_mask */ |
| 17927 | case 4759: /* avx512f_expandv16si_mask */ |
| 17928 | case 1256: /* avx512vl_loadv8hi_mask */ |
| 17929 | case 1255: /* avx512vl_loadv16hi_mask */ |
| 17930 | case 1254: /* avx512bw_loadv32hi_mask */ |
| 17931 | case 1253: /* avx512vl_loadv32qi_mask */ |
| 17932 | case 1252: /* avx512vl_loadv16qi_mask */ |
| 17933 | case 1251: /* avx512bw_loadv64qi_mask */ |
| 17934 | case 1250: /* avx512vl_loadv2df_mask */ |
| 17935 | case 1249: /* avx512vl_loadv4df_mask */ |
| 17936 | case 1248: /* avx512f_loadv8df_mask */ |
| 17937 | case 1247: /* avx512vl_loadv4sf_mask */ |
| 17938 | case 1246: /* avx512vl_loadv8sf_mask */ |
| 17939 | case 1245: /* avx512f_loadv16sf_mask */ |
| 17940 | case 1244: /* avx512vl_loadv2di_mask */ |
| 17941 | case 1243: /* avx512vl_loadv4di_mask */ |
| 17942 | case 1242: /* avx512f_loadv8di_mask */ |
| 17943 | case 1241: /* avx512vl_loadv4si_mask */ |
| 17944 | case 1240: /* avx512vl_loadv8si_mask */ |
| 17945 | case 1239: /* avx512f_loadv16si_mask */ |
| 17946 | extract_constrain_insn_cached (insn); |
| 17947 | if (which_alternative == 0) |
| 17948 | { |
| 17949 | return 1; |
| 17950 | } |
| 17951 | else |
| 17952 | { |
| 17953 | return 2; |
| 17954 | } |
| 17955 | |
| 17956 | case 1206: /* *mmx_concatv2si */ |
| 17957 | case 1136: /* *mmx_concatv2sf */ |
| 17958 | extract_constrain_insn_cached (insn); |
| 17959 | if (which_alternative == 0) |
| 17960 | { |
| 17961 | return 4; |
| 17962 | } |
| 17963 | else |
| 17964 | { |
| 17965 | return 0; |
| 17966 | } |
| 17967 | |
| 17968 | case 3713: /* *ssse3_pmulhrswv4hi3 */ |
| 17969 | case 3712: /* *ssse3_pmulhrswv8hi3_mask */ |
| 17970 | case 3711: /* *ssse3_pmulhrswv8hi3 */ |
| 17971 | case 3710: /* *avx2_pmulhrswv16hi3_mask */ |
| 17972 | case 3709: /* *avx2_pmulhrswv16hi3 */ |
| 17973 | case 3708: /* *avx512bw_pmulhrswv32hi3_mask */ |
| 17974 | case 3707: /* *avx512bw_pmulhrswv32hi3 */ |
| 17975 | case 3704: /* avx512bw_umulhrswv32hi3_mask */ |
| 17976 | case 3703: /* avx512bw_umulhrswv32hi3 */ |
| 17977 | case 3079: /* *sse4_1_mulv4si3_mask */ |
| 17978 | case 3078: /* *sse4_1_mulv4si3 */ |
| 17979 | case 3077: /* *avx2_mulv8si3_mask */ |
| 17980 | case 3076: /* *avx2_mulv8si3 */ |
| 17981 | case 3075: /* *avx512f_mulv16si3_mask */ |
| 17982 | case 3074: /* *avx512f_mulv16si3 */ |
| 17983 | case 3073: /* avx512dq_mulv2di3_mask */ |
| 17984 | case 3072: /* avx512dq_mulv2di3 */ |
| 17985 | case 3071: /* avx512dq_mulv4di3_mask */ |
| 17986 | case 3070: /* avx512dq_mulv4di3 */ |
| 17987 | case 3069: /* avx512dq_mulv8di3_mask */ |
| 17988 | case 3068: /* avx512dq_mulv8di3 */ |
| 17989 | case 3059: /* *sse4_1_mulv2siv2di3_mask */ |
| 17990 | case 3058: /* *sse4_1_mulv2siv2di3 */ |
| 17991 | case 3057: /* *vec_widen_smult_even_v8si_mask */ |
| 17992 | case 3056: /* *vec_widen_smult_even_v8si */ |
| 17993 | case 3055: /* *vec_widen_smult_even_v16si_mask */ |
| 17994 | case 3054: /* *vec_widen_smult_even_v16si */ |
| 17995 | case 3053: /* *vec_widen_umult_even_v4si_mask */ |
| 17996 | case 3052: /* *vec_widen_umult_even_v4si */ |
| 17997 | case 3051: /* *vec_widen_umult_even_v8si_mask */ |
| 17998 | case 3050: /* *vec_widen_umult_even_v8si */ |
| 17999 | case 3049: /* *vec_widen_umult_even_v16si_mask */ |
| 18000 | case 3048: /* *vec_widen_umult_even_v16si */ |
| 18001 | case 3047: /* *umulv8hi3_highpart_mask */ |
| 18002 | case 3046: /* *umulv8hi3_highpart */ |
| 18003 | case 3045: /* *smulv8hi3_highpart_mask */ |
| 18004 | case 3044: /* *smulv8hi3_highpart */ |
| 18005 | case 3043: /* *umulv16hi3_highpart_mask */ |
| 18006 | case 3042: /* *umulv16hi3_highpart */ |
| 18007 | case 3041: /* *smulv16hi3_highpart_mask */ |
| 18008 | case 3040: /* *smulv16hi3_highpart */ |
| 18009 | case 3039: /* *umulv32hi3_highpart_mask */ |
| 18010 | case 3038: /* *umulv32hi3_highpart */ |
| 18011 | case 3037: /* *smulv32hi3_highpart_mask */ |
| 18012 | case 3036: /* *smulv32hi3_highpart */ |
| 18013 | case 3035: /* *mulv8hi3_mask */ |
| 18014 | case 3034: /* *mulv8hi3 */ |
| 18015 | case 3033: /* *mulv16hi3_mask */ |
| 18016 | case 3032: /* *mulv16hi3 */ |
| 18017 | case 3031: /* *mulv32hi3_mask */ |
| 18018 | case 3030: /* *mulv32hi3 */ |
| 18019 | case 1160: /* *sse2_umulv1siv1di3 */ |
| 18020 | case 1159: /* *mmx_pmulhrwv4hi3 */ |
| 18021 | case 1158: /* *mmx_pmaddwd */ |
| 18022 | case 1157: /* *mmx_umulv4hi3_highpart */ |
| 18023 | case 1156: /* *mmx_smulv4hi3_highpart */ |
| 18024 | case 1155: /* *mmx_mulv4hi3 */ |
| 18025 | case 1114: /* *mmx_mulv2sf3 */ |
| 18026 | if (get_attr_memory (insn) == MEMORY_NONE) |
| 18027 | { |
| 18028 | return 3; |
| 18029 | } |
| 18030 | else |
| 18031 | { |
| 18032 | return 0; |
| 18033 | } |
| 18034 | |
| 18035 | case 4396: /* *ssse3_palignrv2df_perm */ |
| 18036 | case 4395: /* *ssse3_palignrv4sf_perm */ |
| 18037 | case 4394: /* *ssse3_palignrv2di_perm */ |
| 18038 | case 4393: /* *ssse3_palignrv4si_perm */ |
| 18039 | case 4392: /* *ssse3_palignrv8hi_perm */ |
| 18040 | case 4391: /* *ssse3_palignrv16qi_perm */ |
| 18041 | case 4007: /* xop_rotrv2di3 */ |
| 18042 | case 4006: /* xop_rotrv4si3 */ |
| 18043 | case 4005: /* xop_rotrv8hi3 */ |
| 18044 | case 4004: /* xop_rotrv16qi3 */ |
| 18045 | case 4003: /* xop_rotlv2di3 */ |
| 18046 | case 4002: /* xop_rotlv4si3 */ |
| 18047 | case 4001: /* xop_rotlv8hi3 */ |
| 18048 | case 4000: /* xop_rotlv16qi3 */ |
| 18049 | case 3736: /* ssse3_palignrdi */ |
| 18050 | case 3735: /* ssse3_palignrti */ |
| 18051 | case 3734: /* avx2_palignrv2ti */ |
| 18052 | case 3733: /* avx512bw_palignrv4ti */ |
| 18053 | case 3732: /* ssse3_palignrv16qi_mask */ |
| 18054 | case 3731: /* avx2_palignrv32qi_mask */ |
| 18055 | case 3730: /* avx512bw_palignrv64qi_mask */ |
| 18056 | case 3706: /* ssse3_pmaddubsw */ |
| 18057 | case 3705: /* ssse3_pmaddubsw128 */ |
| 18058 | case 3702: /* avx512bw_pmaddubsw512v32hi_mask */ |
| 18059 | case 3701: /* avx512bw_pmaddubsw512v32hi */ |
| 18060 | case 3700: /* avx512bw_pmaddubsw512v16hi_mask */ |
| 18061 | case 3699: /* avx512bw_pmaddubsw512v16hi */ |
| 18062 | case 3698: /* avx512bw_pmaddubsw512v8hi_mask */ |
| 18063 | case 3697: /* avx512bw_pmaddubsw512v8hi */ |
| 18064 | case 3696: /* avx2_pmaddubsw256 */ |
| 18065 | case 3695: /* ssse3_phsubdv2si3 */ |
| 18066 | case 3694: /* ssse3_phadddv2si3 */ |
| 18067 | case 3693: /* ssse3_phsubdv4si3 */ |
| 18068 | case 3692: /* ssse3_phadddv4si3 */ |
| 18069 | case 3691: /* avx2_phsubdv8si3 */ |
| 18070 | case 3690: /* avx2_phadddv8si3 */ |
| 18071 | case 3689: /* ssse3_phsubswv4hi3 */ |
| 18072 | case 3688: /* ssse3_phsubwv4hi3 */ |
| 18073 | case 3687: /* ssse3_phaddswv4hi3 */ |
| 18074 | case 3686: /* ssse3_phaddwv4hi3 */ |
| 18075 | case 3685: /* ssse3_phsubswv8hi3 */ |
| 18076 | case 3684: /* ssse3_phsubwv8hi3 */ |
| 18077 | case 3683: /* ssse3_phaddswv8hi3 */ |
| 18078 | case 3682: /* ssse3_phaddwv8hi3 */ |
| 18079 | case 3681: /* avx2_phsubswv16hi3 */ |
| 18080 | case 3680: /* avx2_phsubwv16hi3 */ |
| 18081 | case 3679: /* avx2_phaddswv16hi3 */ |
| 18082 | case 3678: /* avx2_phaddwv16hi3 */ |
| 18083 | case 3657: /* sse2_psadbw */ |
| 18084 | case 3656: /* avx2_psadbw */ |
| 18085 | case 3655: /* avx512f_psadbw */ |
| 18086 | case 3654: /* *sse2_uavgv8hi3_mask */ |
| 18087 | case 3653: /* *sse2_uavgv8hi3 */ |
| 18088 | case 3652: /* *avx2_uavgv16hi3_mask */ |
| 18089 | case 3651: /* *avx2_uavgv16hi3 */ |
| 18090 | case 3650: /* *avx512bw_uavgv32hi3_mask */ |
| 18091 | case 3649: /* *avx512bw_uavgv32hi3 */ |
| 18092 | case 3648: /* *sse2_uavgv16qi3_mask */ |
| 18093 | case 3647: /* *sse2_uavgv16qi3 */ |
| 18094 | case 3646: /* *avx2_uavgv32qi3_mask */ |
| 18095 | case 3645: /* *avx2_uavgv32qi3 */ |
| 18096 | case 3644: /* *avx512bw_uavgv64qi3_mask */ |
| 18097 | case 3643: /* *avx512bw_uavgv64qi3 */ |
| 18098 | case 3319: /* *uminv16qi3 */ |
| 18099 | case 3318: /* *umaxv16qi3 */ |
| 18100 | case 3317: /* *sse4_1_uminv4si3_mask */ |
| 18101 | case 3316: /* *sse4_1_uminv4si3 */ |
| 18102 | case 3315: /* *sse4_1_umaxv4si3_mask */ |
| 18103 | case 3314: /* *sse4_1_umaxv4si3 */ |
| 18104 | case 3313: /* *sse4_1_uminv8hi3_mask */ |
| 18105 | case 3312: /* *sse4_1_uminv8hi3 */ |
| 18106 | case 3311: /* *sse4_1_umaxv8hi3_mask */ |
| 18107 | case 3310: /* *sse4_1_umaxv8hi3 */ |
| 18108 | case 3309: /* *sminv8hi3 */ |
| 18109 | case 3308: /* *smaxv8hi3 */ |
| 18110 | case 3307: /* *sse4_1_sminv4si3_mask */ |
| 18111 | case 3306: /* *sse4_1_sminv4si3 */ |
| 18112 | case 3305: /* *sse4_1_smaxv4si3_mask */ |
| 18113 | case 3304: /* *sse4_1_smaxv4si3 */ |
| 18114 | case 3303: /* *sse4_1_sminv16qi3_mask */ |
| 18115 | case 3302: /* *sse4_1_sminv16qi3 */ |
| 18116 | case 3301: /* *sse4_1_smaxv16qi3_mask */ |
| 18117 | case 3300: /* *sse4_1_smaxv16qi3 */ |
| 18118 | case 3299: /* uminv8hi3_mask */ |
| 18119 | case 3298: /* *uminv8hi3 */ |
| 18120 | case 3297: /* umaxv8hi3_mask */ |
| 18121 | case 3296: /* *umaxv8hi3 */ |
| 18122 | case 3295: /* sminv8hi3_mask */ |
| 18123 | case 3294: /* *sminv8hi3 */ |
| 18124 | case 3293: /* smaxv8hi3_mask */ |
| 18125 | case 3292: /* *smaxv8hi3 */ |
| 18126 | case 3291: /* uminv16hi3_mask */ |
| 18127 | case 3290: /* *uminv16hi3 */ |
| 18128 | case 3289: /* umaxv16hi3_mask */ |
| 18129 | case 3288: /* *umaxv16hi3 */ |
| 18130 | case 3287: /* sminv16hi3_mask */ |
| 18131 | case 3286: /* *sminv16hi3 */ |
| 18132 | case 3285: /* smaxv16hi3_mask */ |
| 18133 | case 3284: /* *smaxv16hi3 */ |
| 18134 | case 3283: /* uminv32hi3_mask */ |
| 18135 | case 3282: /* *uminv32hi3 */ |
| 18136 | case 3281: /* umaxv32hi3_mask */ |
| 18137 | case 3280: /* *umaxv32hi3 */ |
| 18138 | case 3279: /* sminv32hi3_mask */ |
| 18139 | case 3278: /* *sminv32hi3 */ |
| 18140 | case 3277: /* smaxv32hi3_mask */ |
| 18141 | case 3276: /* *smaxv32hi3 */ |
| 18142 | case 3275: /* uminv32qi3_mask */ |
| 18143 | case 3274: /* *uminv32qi3 */ |
| 18144 | case 3273: /* umaxv32qi3_mask */ |
| 18145 | case 3272: /* *umaxv32qi3 */ |
| 18146 | case 3271: /* sminv32qi3_mask */ |
| 18147 | case 3270: /* *sminv32qi3 */ |
| 18148 | case 3269: /* smaxv32qi3_mask */ |
| 18149 | case 3268: /* *smaxv32qi3 */ |
| 18150 | case 3267: /* uminv16qi3_mask */ |
| 18151 | case 3266: /* *uminv16qi3 */ |
| 18152 | case 3265: /* umaxv16qi3_mask */ |
| 18153 | case 3264: /* *umaxv16qi3 */ |
| 18154 | case 3263: /* sminv16qi3_mask */ |
| 18155 | case 3262: /* *sminv16qi3 */ |
| 18156 | case 3261: /* smaxv16qi3_mask */ |
| 18157 | case 3260: /* *smaxv16qi3 */ |
| 18158 | case 3259: /* uminv64qi3_mask */ |
| 18159 | case 3258: /* *uminv64qi3 */ |
| 18160 | case 3257: /* umaxv64qi3_mask */ |
| 18161 | case 3256: /* *umaxv64qi3 */ |
| 18162 | case 3255: /* sminv64qi3_mask */ |
| 18163 | case 3254: /* *sminv64qi3 */ |
| 18164 | case 3253: /* smaxv64qi3_mask */ |
| 18165 | case 3252: /* *smaxv64qi3 */ |
| 18166 | case 3251: /* *avx512f_uminv2di3_mask */ |
| 18167 | case 3250: /* *avx512f_uminv2di3 */ |
| 18168 | case 3249: /* *avx512f_umaxv2di3_mask */ |
| 18169 | case 3248: /* *avx512f_umaxv2di3 */ |
| 18170 | case 3247: /* *avx512f_sminv2di3_mask */ |
| 18171 | case 3246: /* *avx512f_sminv2di3 */ |
| 18172 | case 3245: /* *avx512f_smaxv2di3_mask */ |
| 18173 | case 3244: /* *avx512f_smaxv2di3 */ |
| 18174 | case 3243: /* *avx512f_uminv4di3_mask */ |
| 18175 | case 3242: /* *avx512f_uminv4di3 */ |
| 18176 | case 3241: /* *avx512f_umaxv4di3_mask */ |
| 18177 | case 3240: /* *avx512f_umaxv4di3 */ |
| 18178 | case 3239: /* *avx512f_sminv4di3_mask */ |
| 18179 | case 3238: /* *avx512f_sminv4di3 */ |
| 18180 | case 3237: /* *avx512f_smaxv4di3_mask */ |
| 18181 | case 3236: /* *avx512f_smaxv4di3 */ |
| 18182 | case 3235: /* *avx512f_uminv8di3_mask */ |
| 18183 | case 3234: /* *avx512f_uminv8di3 */ |
| 18184 | case 3233: /* *avx512f_umaxv8di3_mask */ |
| 18185 | case 3232: /* *avx512f_umaxv8di3 */ |
| 18186 | case 3231: /* *avx512f_sminv8di3_mask */ |
| 18187 | case 3230: /* *avx512f_sminv8di3 */ |
| 18188 | case 3229: /* *avx512f_smaxv8di3_mask */ |
| 18189 | case 3228: /* *avx512f_smaxv8di3 */ |
| 18190 | case 3227: /* *avx512f_uminv4si3_mask */ |
| 18191 | case 3226: /* *avx512f_uminv4si3 */ |
| 18192 | case 3225: /* *avx512f_umaxv4si3_mask */ |
| 18193 | case 3224: /* *avx512f_umaxv4si3 */ |
| 18194 | case 3223: /* *avx512f_sminv4si3_mask */ |
| 18195 | case 3222: /* *avx512f_sminv4si3 */ |
| 18196 | case 3221: /* *avx512f_smaxv4si3_mask */ |
| 18197 | case 3220: /* *avx512f_smaxv4si3 */ |
| 18198 | case 3219: /* *avx512f_uminv8si3_mask */ |
| 18199 | case 3218: /* *avx512f_uminv8si3 */ |
| 18200 | case 3217: /* *avx512f_umaxv8si3_mask */ |
| 18201 | case 3216: /* *avx512f_umaxv8si3 */ |
| 18202 | case 3215: /* *avx512f_sminv8si3_mask */ |
| 18203 | case 3214: /* *avx512f_sminv8si3 */ |
| 18204 | case 3213: /* *avx512f_smaxv8si3_mask */ |
| 18205 | case 3212: /* *avx512f_smaxv8si3 */ |
| 18206 | case 3211: /* *avx512f_uminv16si3_mask */ |
| 18207 | case 3210: /* *avx512f_uminv16si3 */ |
| 18208 | case 3209: /* *avx512f_umaxv16si3_mask */ |
| 18209 | case 3208: /* *avx512f_umaxv16si3 */ |
| 18210 | case 3207: /* *avx512f_sminv16si3_mask */ |
| 18211 | case 3206: /* *avx512f_sminv16si3 */ |
| 18212 | case 3205: /* *avx512f_smaxv16si3_mask */ |
| 18213 | case 3204: /* *avx512f_smaxv16si3 */ |
| 18214 | case 3203: /* *avx2_uminv8si3 */ |
| 18215 | case 3202: /* *avx2_umaxv8si3 */ |
| 18216 | case 3201: /* *avx2_sminv8si3 */ |
| 18217 | case 3200: /* *avx2_smaxv8si3 */ |
| 18218 | case 3199: /* *avx2_uminv16hi3 */ |
| 18219 | case 3198: /* *avx2_umaxv16hi3 */ |
| 18220 | case 3197: /* *avx2_sminv16hi3 */ |
| 18221 | case 3196: /* *avx2_smaxv16hi3 */ |
| 18222 | case 3195: /* *avx2_uminv32qi3 */ |
| 18223 | case 3194: /* *avx2_umaxv32qi3 */ |
| 18224 | case 3193: /* *avx2_sminv32qi3 */ |
| 18225 | case 3192: /* *avx2_smaxv32qi3 */ |
| 18226 | case 3143: /* sse2_lshrv1ti3 */ |
| 18227 | case 3142: /* avx2_lshrv2ti3 */ |
| 18228 | case 3141: /* avx512bw_lshrv4ti3 */ |
| 18229 | case 3140: /* sse2_ashlv1ti3 */ |
| 18230 | case 3139: /* avx2_ashlv2ti3 */ |
| 18231 | case 3138: /* avx512bw_ashlv4ti3 */ |
| 18232 | case 3067: /* *sse2_pmaddwd */ |
| 18233 | case 3066: /* *avx2_pmaddwd */ |
| 18234 | case 3065: /* avx512bw_pmaddwd512v8hi_mask */ |
| 18235 | case 3064: /* avx512bw_pmaddwd512v8hi */ |
| 18236 | case 3063: /* avx512bw_pmaddwd512v16hi_mask */ |
| 18237 | case 3062: /* avx512bw_pmaddwd512v16hi */ |
| 18238 | case 3061: /* avx512bw_pmaddwd512v32hi_mask */ |
| 18239 | case 3060: /* avx512bw_pmaddwd512v32hi */ |
| 18240 | case 3029: /* *sse2_ussubv8hi3_mask */ |
| 18241 | case 3028: /* *sse2_ussubv8hi3 */ |
| 18242 | case 3027: /* *sse2_sssubv8hi3_mask */ |
| 18243 | case 3026: /* *sse2_sssubv8hi3 */ |
| 18244 | case 3025: /* *sse2_usaddv8hi3_mask */ |
| 18245 | case 3024: /* *sse2_usaddv8hi3 */ |
| 18246 | case 3023: /* *sse2_ssaddv8hi3_mask */ |
| 18247 | case 3022: /* *sse2_ssaddv8hi3 */ |
| 18248 | case 3021: /* *avx2_ussubv16hi3_mask */ |
| 18249 | case 3020: /* *avx2_ussubv16hi3 */ |
| 18250 | case 3019: /* *avx2_sssubv16hi3_mask */ |
| 18251 | case 3018: /* *avx2_sssubv16hi3 */ |
| 18252 | case 3017: /* *avx2_usaddv16hi3_mask */ |
| 18253 | case 3016: /* *avx2_usaddv16hi3 */ |
| 18254 | case 3015: /* *avx2_ssaddv16hi3_mask */ |
| 18255 | case 3014: /* *avx2_ssaddv16hi3 */ |
| 18256 | case 3013: /* *avx512bw_ussubv32hi3_mask */ |
| 18257 | case 3012: /* *avx512bw_ussubv32hi3 */ |
| 18258 | case 3011: /* *avx512bw_sssubv32hi3_mask */ |
| 18259 | case 3010: /* *avx512bw_sssubv32hi3 */ |
| 18260 | case 3009: /* *avx512bw_usaddv32hi3_mask */ |
| 18261 | case 3008: /* *avx512bw_usaddv32hi3 */ |
| 18262 | case 3007: /* *avx512bw_ssaddv32hi3_mask */ |
| 18263 | case 3006: /* *avx512bw_ssaddv32hi3 */ |
| 18264 | case 3005: /* *sse2_ussubv16qi3_mask */ |
| 18265 | case 3004: /* *sse2_ussubv16qi3 */ |
| 18266 | case 3003: /* *sse2_sssubv16qi3_mask */ |
| 18267 | case 3002: /* *sse2_sssubv16qi3 */ |
| 18268 | case 3001: /* *sse2_usaddv16qi3_mask */ |
| 18269 | case 3000: /* *sse2_usaddv16qi3 */ |
| 18270 | case 2999: /* *sse2_ssaddv16qi3_mask */ |
| 18271 | case 2998: /* *sse2_ssaddv16qi3 */ |
| 18272 | case 2997: /* *avx2_ussubv32qi3_mask */ |
| 18273 | case 2996: /* *avx2_ussubv32qi3 */ |
| 18274 | case 2995: /* *avx2_sssubv32qi3_mask */ |
| 18275 | case 2994: /* *avx2_sssubv32qi3 */ |
| 18276 | case 2993: /* *avx2_usaddv32qi3_mask */ |
| 18277 | case 2992: /* *avx2_usaddv32qi3 */ |
| 18278 | case 2991: /* *avx2_ssaddv32qi3_mask */ |
| 18279 | case 2990: /* *avx2_ssaddv32qi3 */ |
| 18280 | case 2989: /* *avx512bw_ussubv64qi3_mask */ |
| 18281 | case 2988: /* *avx512bw_ussubv64qi3 */ |
| 18282 | case 2987: /* *avx512bw_sssubv64qi3_mask */ |
| 18283 | case 2986: /* *avx512bw_sssubv64qi3 */ |
| 18284 | case 2985: /* *avx512bw_usaddv64qi3_mask */ |
| 18285 | case 2984: /* *avx512bw_usaddv64qi3 */ |
| 18286 | case 2983: /* *avx512bw_ssaddv64qi3_mask */ |
| 18287 | case 2982: /* *avx512bw_ssaddv64qi3 */ |
| 18288 | case 2981: /* *subv8hi3_mask */ |
| 18289 | case 2980: /* *addv8hi3_mask */ |
| 18290 | case 2979: /* *subv16hi3_mask */ |
| 18291 | case 2978: /* *addv16hi3_mask */ |
| 18292 | case 2977: /* *subv32hi3_mask */ |
| 18293 | case 2976: /* *addv32hi3_mask */ |
| 18294 | case 2975: /* *subv32qi3_mask */ |
| 18295 | case 2974: /* *addv32qi3_mask */ |
| 18296 | case 2973: /* *subv16qi3_mask */ |
| 18297 | case 2972: /* *addv16qi3_mask */ |
| 18298 | case 2971: /* *subv64qi3_mask */ |
| 18299 | case 2970: /* *addv64qi3_mask */ |
| 18300 | case 2969: /* *subv2di3_mask */ |
| 18301 | case 2968: /* *addv2di3_mask */ |
| 18302 | case 2967: /* *subv4di3_mask */ |
| 18303 | case 2966: /* *addv4di3_mask */ |
| 18304 | case 2965: /* *subv8di3_mask */ |
| 18305 | case 2964: /* *addv8di3_mask */ |
| 18306 | case 2963: /* *subv4si3_mask */ |
| 18307 | case 2962: /* *addv4si3_mask */ |
| 18308 | case 2961: /* *subv8si3_mask */ |
| 18309 | case 2960: /* *addv8si3_mask */ |
| 18310 | case 2959: /* *subv16si3_mask */ |
| 18311 | case 2958: /* *addv16si3_mask */ |
| 18312 | case 2957: /* *subv2di3 */ |
| 18313 | case 2956: /* *addv2di3 */ |
| 18314 | case 2955: /* *subv4di3 */ |
| 18315 | case 2954: /* *addv4di3 */ |
| 18316 | case 2953: /* *subv8di3 */ |
| 18317 | case 2952: /* *addv8di3 */ |
| 18318 | case 2951: /* *subv4si3 */ |
| 18319 | case 2950: /* *addv4si3 */ |
| 18320 | case 2949: /* *subv8si3 */ |
| 18321 | case 2948: /* *addv8si3 */ |
| 18322 | case 2947: /* *subv16si3 */ |
| 18323 | case 2946: /* *addv16si3 */ |
| 18324 | case 2945: /* *subv8hi3 */ |
| 18325 | case 2944: /* *addv8hi3 */ |
| 18326 | case 2943: /* *subv16hi3 */ |
| 18327 | case 2942: /* *addv16hi3 */ |
| 18328 | case 2941: /* *subv32hi3 */ |
| 18329 | case 2940: /* *addv32hi3 */ |
| 18330 | case 2939: /* *subv16qi3 */ |
| 18331 | case 2938: /* *addv16qi3 */ |
| 18332 | case 2937: /* *subv32qi3 */ |
| 18333 | case 2936: /* *addv32qi3 */ |
| 18334 | case 2935: /* *subv64qi3 */ |
| 18335 | case 2934: /* *addv64qi3 */ |
| 18336 | case 1212: /* mmx_psadbw */ |
| 18337 | case 1211: /* *mmx_uavgv4hi3 */ |
| 18338 | case 1210: /* *mmx_uavgv8qi3 */ |
| 18339 | case 1193: /* mmx_packuswb */ |
| 18340 | case 1192: /* mmx_packssdw */ |
| 18341 | case 1191: /* mmx_packsswb */ |
| 18342 | case 1190: /* *mmx_xorv2si3 */ |
| 18343 | case 1189: /* *mmx_iorv2si3 */ |
| 18344 | case 1188: /* *mmx_andv2si3 */ |
| 18345 | case 1187: /* *mmx_xorv4hi3 */ |
| 18346 | case 1186: /* *mmx_iorv4hi3 */ |
| 18347 | case 1185: /* *mmx_andv4hi3 */ |
| 18348 | case 1184: /* *mmx_xorv8qi3 */ |
| 18349 | case 1183: /* *mmx_iorv8qi3 */ |
| 18350 | case 1182: /* *mmx_andv8qi3 */ |
| 18351 | case 1181: /* mmx_andnotv2si3 */ |
| 18352 | case 1180: /* mmx_andnotv4hi3 */ |
| 18353 | case 1179: /* mmx_andnotv8qi3 */ |
| 18354 | case 1172: /* mmx_lshrv1di3 */ |
| 18355 | case 1171: /* mmx_ashlv1di3 */ |
| 18356 | case 1170: /* mmx_lshrv2si3 */ |
| 18357 | case 1169: /* mmx_ashlv2si3 */ |
| 18358 | case 1168: /* mmx_lshrv4hi3 */ |
| 18359 | case 1167: /* mmx_ashlv4hi3 */ |
| 18360 | case 1166: /* mmx_ashrv2si3 */ |
| 18361 | case 1165: /* mmx_ashrv4hi3 */ |
| 18362 | case 1164: /* *mmx_uminv8qi3 */ |
| 18363 | case 1163: /* *mmx_umaxv8qi3 */ |
| 18364 | case 1162: /* *mmx_sminv4hi3 */ |
| 18365 | case 1161: /* *mmx_smaxv4hi3 */ |
| 18366 | case 1154: /* *mmx_ussubv4hi3 */ |
| 18367 | case 1153: /* *mmx_sssubv4hi3 */ |
| 18368 | case 1152: /* *mmx_usaddv4hi3 */ |
| 18369 | case 1151: /* *mmx_ssaddv4hi3 */ |
| 18370 | case 1150: /* *mmx_ussubv8qi3 */ |
| 18371 | case 1149: /* *mmx_sssubv8qi3 */ |
| 18372 | case 1148: /* *mmx_usaddv8qi3 */ |
| 18373 | case 1147: /* *mmx_ssaddv8qi3 */ |
| 18374 | case 1146: /* *mmx_subv1di3 */ |
| 18375 | case 1145: /* *mmx_addv1di3 */ |
| 18376 | case 1144: /* *mmx_subv2si3 */ |
| 18377 | case 1143: /* *mmx_addv2si3 */ |
| 18378 | case 1142: /* *mmx_subv4hi3 */ |
| 18379 | case 1141: /* *mmx_addv4hi3 */ |
| 18380 | case 1140: /* *mmx_subv8qi3 */ |
| 18381 | case 1139: /* *mmx_addv8qi3 */ |
| 18382 | case 1126: /* mmx_addsubv2sf3 */ |
| 18383 | case 1125: /* mmx_hsubv2sf3 */ |
| 18384 | case 1124: /* mmx_haddv2sf3 */ |
| 18385 | case 1118: /* mmx_ieee_minv2sf3 */ |
| 18386 | case 1117: /* mmx_ieee_maxv2sf3 */ |
| 18387 | case 1116: /* *mmx_sminv2sf3 */ |
| 18388 | case 1115: /* *mmx_smaxv2sf3 */ |
| 18389 | case 1113: /* *mmx_subv2sf3 */ |
| 18390 | case 1112: /* *mmx_addv2sf3 */ |
| 18391 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) |
| 18392 | { |
| 18393 | return 1; |
| 18394 | } |
| 18395 | else if (cached_memory == MEMORY_LOAD) |
| 18396 | { |
| 18397 | return 2; |
| 18398 | } |
| 18399 | else |
| 18400 | { |
| 18401 | return 0; |
| 18402 | } |
| 18403 | |
| 18404 | case 982: /* *movsfcc_1_387 */ |
| 18405 | extract_constrain_insn_cached (insn); |
| 18406 | if (((((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) || (cached_memory == MEMORY_LOAD)) && (!((1 << which_alternative) & 0x3))) || (((1 << which_alternative) & 0x3))) |
| 18407 | { |
| 18408 | return 2; |
| 18409 | } |
| 18410 | else |
| 18411 | { |
| 18412 | return 0; |
| 18413 | } |
| 18414 | |
| 18415 | case 981: /* *movdfcc_1 */ |
| 18416 | extract_constrain_insn_cached (insn); |
| 18417 | if (((1 << which_alternative) & 0xc)) |
| 18418 | { |
| 18419 | return 6; |
| 18420 | } |
| 18421 | else if (((((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) || (cached_memory == MEMORY_LOAD)) && (!((1 << which_alternative) & 0xf))) || (((1 << which_alternative) & 0x3))) |
| 18422 | { |
| 18423 | return 2; |
| 18424 | } |
| 18425 | else |
| 18426 | { |
| 18427 | return 0; |
| 18428 | } |
| 18429 | |
| 18430 | case 980: /* *movxfcc_1 */ |
| 18431 | return 2; |
| 18432 | |
| 18433 | case 979: /* *movqicc_noc */ |
| 18434 | case 978: /* *movsicc_noc_zext */ |
| 18435 | case 977: /* *movdicc_noc */ |
| 18436 | case 976: /* *movsicc_noc */ |
| 18437 | case 975: /* *movhicc_noc */ |
| 18438 | if (((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) || (cached_memory == MEMORY_LOAD)) |
| 18439 | { |
| 18440 | return 2; |
| 18441 | } |
| 18442 | else |
| 18443 | { |
| 18444 | return 0; |
| 18445 | } |
| 18446 | |
| 18447 | case 4937: /* storedi_via_sse */ |
| 18448 | case 4936: /* loaddi_via_sse */ |
| 18449 | case 4746: /* avx512vl_compressv2df_mask */ |
| 18450 | case 4745: /* avx512vl_compressv2di_mask */ |
| 18451 | case 4744: /* avx512vl_compressv4sf_mask */ |
| 18452 | case 4743: /* avx512vl_compressv4si_mask */ |
| 18453 | case 4742: /* avx512vl_compressv4df_mask */ |
| 18454 | case 4741: /* avx512vl_compressv4di_mask */ |
| 18455 | case 4740: /* avx512vl_compressv8sf_mask */ |
| 18456 | case 4739: /* avx512vl_compressv8si_mask */ |
| 18457 | case 4738: /* avx512f_compressv8df_mask */ |
| 18458 | case 4737: /* avx512f_compressv8di_mask */ |
| 18459 | case 4736: /* avx512f_compressv16sf_mask */ |
| 18460 | case 4735: /* avx512f_compressv16si_mask */ |
| 18461 | case 4734: /* *avx512f_scatterdiv2df */ |
| 18462 | case 4733: /* *avx512f_scatterdiv2df */ |
| 18463 | case 4732: /* *avx512f_scatterdiv2di */ |
| 18464 | case 4731: /* *avx512f_scatterdiv2di */ |
| 18465 | case 4730: /* *avx512f_scatterdiv4sf */ |
| 18466 | case 4729: /* *avx512f_scatterdiv4sf */ |
| 18467 | case 4728: /* *avx512f_scatterdiv4si */ |
| 18468 | case 4727: /* *avx512f_scatterdiv4si */ |
| 18469 | case 4726: /* *avx512f_scatterdiv4df */ |
| 18470 | case 4725: /* *avx512f_scatterdiv4df */ |
| 18471 | case 4724: /* *avx512f_scatterdiv4di */ |
| 18472 | case 4723: /* *avx512f_scatterdiv4di */ |
| 18473 | case 4722: /* *avx512f_scatterdiv8sf */ |
| 18474 | case 4721: /* *avx512f_scatterdiv8sf */ |
| 18475 | case 4720: /* *avx512f_scatterdiv8si */ |
| 18476 | case 4719: /* *avx512f_scatterdiv8si */ |
| 18477 | case 4718: /* *avx512f_scatterdiv8df */ |
| 18478 | case 4717: /* *avx512f_scatterdiv8df */ |
| 18479 | case 4716: /* *avx512f_scatterdiv8di */ |
| 18480 | case 4715: /* *avx512f_scatterdiv8di */ |
| 18481 | case 4714: /* *avx512f_scatterdiv16sf */ |
| 18482 | case 4713: /* *avx512f_scatterdiv16sf */ |
| 18483 | case 4712: /* *avx512f_scatterdiv16si */ |
| 18484 | case 4711: /* *avx512f_scatterdiv16si */ |
| 18485 | case 4710: /* *avx512f_scattersiv2df */ |
| 18486 | case 4709: /* *avx512f_scattersiv2df */ |
| 18487 | case 4708: /* *avx512f_scattersiv2di */ |
| 18488 | case 4707: /* *avx512f_scattersiv2di */ |
| 18489 | case 4706: /* *avx512f_scattersiv4sf */ |
| 18490 | case 4705: /* *avx512f_scattersiv4sf */ |
| 18491 | case 4704: /* *avx512f_scattersiv4si */ |
| 18492 | case 4703: /* *avx512f_scattersiv4si */ |
| 18493 | case 4702: /* *avx512f_scattersiv4df */ |
| 18494 | case 4701: /* *avx512f_scattersiv4df */ |
| 18495 | case 4700: /* *avx512f_scattersiv4di */ |
| 18496 | case 4699: /* *avx512f_scattersiv4di */ |
| 18497 | case 4698: /* *avx512f_scattersiv8sf */ |
| 18498 | case 4697: /* *avx512f_scattersiv8sf */ |
| 18499 | case 4696: /* *avx512f_scattersiv8si */ |
| 18500 | case 4695: /* *avx512f_scattersiv8si */ |
| 18501 | case 4694: /* *avx512f_scattersiv8df */ |
| 18502 | case 4693: /* *avx512f_scattersiv8df */ |
| 18503 | case 4692: /* *avx512f_scattersiv8di */ |
| 18504 | case 4691: /* *avx512f_scattersiv8di */ |
| 18505 | case 4690: /* *avx512f_scattersiv16sf */ |
| 18506 | case 4689: /* *avx512f_scattersiv16sf */ |
| 18507 | case 4688: /* *avx512f_scattersiv16si */ |
| 18508 | case 4687: /* *avx512f_scattersiv16si */ |
| 18509 | case 4686: /* *avx512f_gatherdiv2df_2 */ |
| 18510 | case 4685: /* *avx512f_gatherdiv2df_2 */ |
| 18511 | case 4684: /* *avx512f_gatherdiv2di_2 */ |
| 18512 | case 4683: /* *avx512f_gatherdiv2di_2 */ |
| 18513 | case 4682: /* *avx512f_gatherdiv4sf_2 */ |
| 18514 | case 4681: /* *avx512f_gatherdiv4sf_2 */ |
| 18515 | case 4680: /* *avx512f_gatherdiv4si_2 */ |
| 18516 | case 4679: /* *avx512f_gatherdiv4si_2 */ |
| 18517 | case 4678: /* *avx512f_gatherdiv4df_2 */ |
| 18518 | case 4677: /* *avx512f_gatherdiv4df_2 */ |
| 18519 | case 4676: /* *avx512f_gatherdiv4di_2 */ |
| 18520 | case 4675: /* *avx512f_gatherdiv4di_2 */ |
| 18521 | case 4674: /* *avx512f_gatherdiv8sf_2 */ |
| 18522 | case 4673: /* *avx512f_gatherdiv8sf_2 */ |
| 18523 | case 4672: /* *avx512f_gatherdiv8si_2 */ |
| 18524 | case 4671: /* *avx512f_gatherdiv8si_2 */ |
| 18525 | case 4670: /* *avx512f_gatherdiv8df_2 */ |
| 18526 | case 4669: /* *avx512f_gatherdiv8df_2 */ |
| 18527 | case 4668: /* *avx512f_gatherdiv8di_2 */ |
| 18528 | case 4667: /* *avx512f_gatherdiv8di_2 */ |
| 18529 | case 4666: /* *avx512f_gatherdiv16sf_2 */ |
| 18530 | case 4665: /* *avx512f_gatherdiv16sf_2 */ |
| 18531 | case 4664: /* *avx512f_gatherdiv16si_2 */ |
| 18532 | case 4663: /* *avx512f_gatherdiv16si_2 */ |
| 18533 | case 4662: /* *avx512f_gatherdiv2df */ |
| 18534 | case 4661: /* *avx512f_gatherdiv2df */ |
| 18535 | case 4660: /* *avx512f_gatherdiv2di */ |
| 18536 | case 4659: /* *avx512f_gatherdiv2di */ |
| 18537 | case 4658: /* *avx512f_gatherdiv4sf */ |
| 18538 | case 4657: /* *avx512f_gatherdiv4sf */ |
| 18539 | case 4656: /* *avx512f_gatherdiv4si */ |
| 18540 | case 4655: /* *avx512f_gatherdiv4si */ |
| 18541 | case 4654: /* *avx512f_gatherdiv4df */ |
| 18542 | case 4653: /* *avx512f_gatherdiv4df */ |
| 18543 | case 4652: /* *avx512f_gatherdiv4di */ |
| 18544 | case 4651: /* *avx512f_gatherdiv4di */ |
| 18545 | case 4650: /* *avx512f_gatherdiv8sf */ |
| 18546 | case 4649: /* *avx512f_gatherdiv8sf */ |
| 18547 | case 4648: /* *avx512f_gatherdiv8si */ |
| 18548 | case 4647: /* *avx512f_gatherdiv8si */ |
| 18549 | case 4646: /* *avx512f_gatherdiv8df */ |
| 18550 | case 4645: /* *avx512f_gatherdiv8df */ |
| 18551 | case 4644: /* *avx512f_gatherdiv8di */ |
| 18552 | case 4643: /* *avx512f_gatherdiv8di */ |
| 18553 | case 4642: /* *avx512f_gatherdiv16sf */ |
| 18554 | case 4641: /* *avx512f_gatherdiv16sf */ |
| 18555 | case 4640: /* *avx512f_gatherdiv16si */ |
| 18556 | case 4639: /* *avx512f_gatherdiv16si */ |
| 18557 | case 4638: /* *avx512f_gathersiv2df_2 */ |
| 18558 | case 4637: /* *avx512f_gathersiv2df_2 */ |
| 18559 | case 4636: /* *avx512f_gathersiv2di_2 */ |
| 18560 | case 4635: /* *avx512f_gathersiv2di_2 */ |
| 18561 | case 4634: /* *avx512f_gathersiv4sf_2 */ |
| 18562 | case 4633: /* *avx512f_gathersiv4sf_2 */ |
| 18563 | case 4632: /* *avx512f_gathersiv4si_2 */ |
| 18564 | case 4631: /* *avx512f_gathersiv4si_2 */ |
| 18565 | case 4630: /* *avx512f_gathersiv4df_2 */ |
| 18566 | case 4629: /* *avx512f_gathersiv4df_2 */ |
| 18567 | case 4628: /* *avx512f_gathersiv4di_2 */ |
| 18568 | case 4627: /* *avx512f_gathersiv4di_2 */ |
| 18569 | case 4626: /* *avx512f_gathersiv8sf_2 */ |
| 18570 | case 4625: /* *avx512f_gathersiv8sf_2 */ |
| 18571 | case 4624: /* *avx512f_gathersiv8si_2 */ |
| 18572 | case 4623: /* *avx512f_gathersiv8si_2 */ |
| 18573 | case 4622: /* *avx512f_gathersiv8df_2 */ |
| 18574 | case 4621: /* *avx512f_gathersiv8df_2 */ |
| 18575 | case 4620: /* *avx512f_gathersiv8di_2 */ |
| 18576 | case 4619: /* *avx512f_gathersiv8di_2 */ |
| 18577 | case 4618: /* *avx512f_gathersiv16sf_2 */ |
| 18578 | case 4617: /* *avx512f_gathersiv16sf_2 */ |
| 18579 | case 4616: /* *avx512f_gathersiv16si_2 */ |
| 18580 | case 4615: /* *avx512f_gathersiv16si_2 */ |
| 18581 | case 4614: /* *avx512f_gathersiv2df */ |
| 18582 | case 4613: /* *avx512f_gathersiv2df */ |
| 18583 | case 4612: /* *avx512f_gathersiv2di */ |
| 18584 | case 4611: /* *avx512f_gathersiv2di */ |
| 18585 | case 4610: /* *avx512f_gathersiv4sf */ |
| 18586 | case 4609: /* *avx512f_gathersiv4sf */ |
| 18587 | case 4608: /* *avx512f_gathersiv4si */ |
| 18588 | case 4607: /* *avx512f_gathersiv4si */ |
| 18589 | case 4606: /* *avx512f_gathersiv4df */ |
| 18590 | case 4605: /* *avx512f_gathersiv4df */ |
| 18591 | case 4604: /* *avx512f_gathersiv4di */ |
| 18592 | case 4603: /* *avx512f_gathersiv4di */ |
| 18593 | case 4602: /* *avx512f_gathersiv8sf */ |
| 18594 | case 4601: /* *avx512f_gathersiv8sf */ |
| 18595 | case 4600: /* *avx512f_gathersiv8si */ |
| 18596 | case 4599: /* *avx512f_gathersiv8si */ |
| 18597 | case 4598: /* *avx512f_gathersiv8df */ |
| 18598 | case 4597: /* *avx512f_gathersiv8df */ |
| 18599 | case 4596: /* *avx512f_gathersiv8di */ |
| 18600 | case 4595: /* *avx512f_gathersiv8di */ |
| 18601 | case 4594: /* *avx512f_gathersiv16sf */ |
| 18602 | case 4593: /* *avx512f_gathersiv16sf */ |
| 18603 | case 4592: /* *avx512f_gathersiv16si */ |
| 18604 | case 4591: /* *avx512f_gathersiv16si */ |
| 18605 | case 4590: /* *avx2_gatherdiv8sf_4 */ |
| 18606 | case 4589: /* *avx2_gatherdiv8sf_4 */ |
| 18607 | case 4588: /* *avx2_gatherdiv8si_4 */ |
| 18608 | case 4587: /* *avx2_gatherdiv8si_4 */ |
| 18609 | case 4586: /* *avx2_gatherdiv8sf_3 */ |
| 18610 | case 4585: /* *avx2_gatherdiv8sf_3 */ |
| 18611 | case 4584: /* *avx2_gatherdiv8si_3 */ |
| 18612 | case 4583: /* *avx2_gatherdiv8si_3 */ |
| 18613 | case 4582: /* *avx2_gatherdiv8sf_2 */ |
| 18614 | case 4581: /* *avx2_gatherdiv8sf_2 */ |
| 18615 | case 4580: /* *avx2_gatherdiv8si_2 */ |
| 18616 | case 4579: /* *avx2_gatherdiv8si_2 */ |
| 18617 | case 4578: /* *avx2_gatherdiv4sf_2 */ |
| 18618 | case 4577: /* *avx2_gatherdiv4sf_2 */ |
| 18619 | case 4576: /* *avx2_gatherdiv4si_2 */ |
| 18620 | case 4575: /* *avx2_gatherdiv4si_2 */ |
| 18621 | case 4574: /* *avx2_gatherdiv4df_2 */ |
| 18622 | case 4573: /* *avx2_gatherdiv4df_2 */ |
| 18623 | case 4572: /* *avx2_gatherdiv4di_2 */ |
| 18624 | case 4571: /* *avx2_gatherdiv4di_2 */ |
| 18625 | case 4570: /* *avx2_gatherdiv2df_2 */ |
| 18626 | case 4569: /* *avx2_gatherdiv2df_2 */ |
| 18627 | case 4568: /* *avx2_gatherdiv2di_2 */ |
| 18628 | case 4567: /* *avx2_gatherdiv2di_2 */ |
| 18629 | case 4566: /* *avx2_gatherdiv8sf */ |
| 18630 | case 4565: /* *avx2_gatherdiv8sf */ |
| 18631 | case 4564: /* *avx2_gatherdiv8si */ |
| 18632 | case 4563: /* *avx2_gatherdiv8si */ |
| 18633 | case 4562: /* *avx2_gatherdiv4sf */ |
| 18634 | case 4561: /* *avx2_gatherdiv4sf */ |
| 18635 | case 4560: /* *avx2_gatherdiv4si */ |
| 18636 | case 4559: /* *avx2_gatherdiv4si */ |
| 18637 | case 4558: /* *avx2_gatherdiv4df */ |
| 18638 | case 4557: /* *avx2_gatherdiv4df */ |
| 18639 | case 4556: /* *avx2_gatherdiv4di */ |
| 18640 | case 4555: /* *avx2_gatherdiv4di */ |
| 18641 | case 4554: /* *avx2_gatherdiv2df */ |
| 18642 | case 4553: /* *avx2_gatherdiv2df */ |
| 18643 | case 4552: /* *avx2_gatherdiv2di */ |
| 18644 | case 4551: /* *avx2_gatherdiv2di */ |
| 18645 | case 4550: /* *avx2_gathersiv8sf_2 */ |
| 18646 | case 4549: /* *avx2_gathersiv8sf_2 */ |
| 18647 | case 4548: /* *avx2_gathersiv8si_2 */ |
| 18648 | case 4547: /* *avx2_gathersiv8si_2 */ |
| 18649 | case 4546: /* *avx2_gathersiv4sf_2 */ |
| 18650 | case 4545: /* *avx2_gathersiv4sf_2 */ |
| 18651 | case 4544: /* *avx2_gathersiv4si_2 */ |
| 18652 | case 4543: /* *avx2_gathersiv4si_2 */ |
| 18653 | case 4542: /* *avx2_gathersiv4df_2 */ |
| 18654 | case 4541: /* *avx2_gathersiv4df_2 */ |
| 18655 | case 4540: /* *avx2_gathersiv4di_2 */ |
| 18656 | case 4539: /* *avx2_gathersiv4di_2 */ |
| 18657 | case 4538: /* *avx2_gathersiv2df_2 */ |
| 18658 | case 4537: /* *avx2_gathersiv2df_2 */ |
| 18659 | case 4536: /* *avx2_gathersiv2di_2 */ |
| 18660 | case 4535: /* *avx2_gathersiv2di_2 */ |
| 18661 | case 4534: /* *avx2_gathersiv8sf */ |
| 18662 | case 4533: /* *avx2_gathersiv8sf */ |
| 18663 | case 4532: /* *avx2_gathersiv8si */ |
| 18664 | case 4531: /* *avx2_gathersiv8si */ |
| 18665 | case 4530: /* *avx2_gathersiv4sf */ |
| 18666 | case 4529: /* *avx2_gathersiv4sf */ |
| 18667 | case 4528: /* *avx2_gathersiv4si */ |
| 18668 | case 4527: /* *avx2_gathersiv4si */ |
| 18669 | case 4526: /* *avx2_gathersiv4df */ |
| 18670 | case 4525: /* *avx2_gathersiv4df */ |
| 18671 | case 4524: /* *avx2_gathersiv4di */ |
| 18672 | case 4523: /* *avx2_gathersiv4di */ |
| 18673 | case 4522: /* *avx2_gathersiv2df */ |
| 18674 | case 4521: /* *avx2_gathersiv2df */ |
| 18675 | case 4520: /* *avx2_gathersiv2di */ |
| 18676 | case 4519: /* *avx2_gathersiv2di */ |
| 18677 | case 4243: /* avx512dq_broadcastv4df_mask_1 */ |
| 18678 | case 4242: /* *avx512dq_broadcastv4df_1 */ |
| 18679 | case 4241: /* avx512dq_broadcastv4di_mask_1 */ |
| 18680 | case 4240: /* *avx512dq_broadcastv4di_1 */ |
| 18681 | case 4239: /* avx512dq_broadcastv8df_mask_1 */ |
| 18682 | case 4238: /* *avx512dq_broadcastv8df_1 */ |
| 18683 | case 4237: /* avx512dq_broadcastv8di_mask_1 */ |
| 18684 | case 4236: /* *avx512dq_broadcastv8di_1 */ |
| 18685 | case 4235: /* avx512dq_broadcastv16si_mask_1 */ |
| 18686 | case 4234: /* *avx512dq_broadcastv16si_1 */ |
| 18687 | case 4233: /* avx512dq_broadcastv16sf_mask_1 */ |
| 18688 | case 4232: /* *avx512dq_broadcastv16sf_1 */ |
| 18689 | case 4231: /* avx512vl_broadcastv8sf_mask_1 */ |
| 18690 | case 4230: /* *avx512vl_broadcastv8sf_1 */ |
| 18691 | case 4229: /* avx512vl_broadcastv8si_mask_1 */ |
| 18692 | case 4228: /* *avx512vl_broadcastv8si_1 */ |
| 18693 | case 4227: /* avx512dq_broadcastv8sf_mask */ |
| 18694 | case 4226: /* *avx512dq_broadcastv8sf */ |
| 18695 | case 4225: /* avx512dq_broadcastv16sf_mask */ |
| 18696 | case 4224: /* *avx512dq_broadcastv16sf */ |
| 18697 | case 4223: /* avx512dq_broadcastv4si_mask */ |
| 18698 | case 4222: /* *avx512dq_broadcastv4si */ |
| 18699 | case 4221: /* avx512dq_broadcastv8si_mask */ |
| 18700 | case 4220: /* *avx512dq_broadcastv8si */ |
| 18701 | case 4219: /* avx512dq_broadcastv16si_mask */ |
| 18702 | case 4218: /* *avx512dq_broadcastv16si */ |
| 18703 | case 4211: /* vec_dupv4df */ |
| 18704 | case 4210: /* vec_dupv4di */ |
| 18705 | case 4209: /* vec_dupv8sf */ |
| 18706 | case 4208: /* vec_dupv8si */ |
| 18707 | case 4207: /* *vec_dupv4si */ |
| 18708 | case 4206: /* *vec_dupv8si */ |
| 18709 | case 4205: /* *vec_dupv8hi */ |
| 18710 | case 4204: /* *vec_dupv16hi */ |
| 18711 | case 4203: /* *vec_dupv16qi */ |
| 18712 | case 4202: /* *vec_dupv32qi */ |
| 18713 | case 4201: /* avx2_vbroadcasti128_v4di */ |
| 18714 | case 4200: /* avx2_vbroadcasti128_v8si */ |
| 18715 | case 4199: /* avx2_vbroadcasti128_v16hi */ |
| 18716 | case 4198: /* avx2_vbroadcasti128_v32qi */ |
| 18717 | case 4194: /* avx512vl_vec_dup_gprv2df_mask */ |
| 18718 | case 4193: /* *avx512vl_vec_dup_gprv2df */ |
| 18719 | case 4192: /* avx512vl_vec_dup_gprv4df_mask */ |
| 18720 | case 4191: /* *avx512vl_vec_dup_gprv4df */ |
| 18721 | case 4190: /* avx512f_vec_dup_gprv8df_mask */ |
| 18722 | case 4189: /* *avx512f_vec_dup_gprv8df */ |
| 18723 | case 4188: /* avx512vl_vec_dup_gprv4sf_mask */ |
| 18724 | case 4187: /* *avx512vl_vec_dup_gprv4sf */ |
| 18725 | case 4186: /* avx512vl_vec_dup_gprv8sf_mask */ |
| 18726 | case 4185: /* *avx512vl_vec_dup_gprv8sf */ |
| 18727 | case 4184: /* avx512f_vec_dup_gprv16sf_mask */ |
| 18728 | case 4183: /* *avx512f_vec_dup_gprv16sf */ |
| 18729 | case 4182: /* avx512vl_vec_dup_gprv2di_mask */ |
| 18730 | case 4181: /* *avx512vl_vec_dup_gprv2di */ |
| 18731 | case 4180: /* avx512vl_vec_dup_gprv4di_mask */ |
| 18732 | case 4179: /* *avx512vl_vec_dup_gprv4di */ |
| 18733 | case 4178: /* avx512f_vec_dup_gprv8di_mask */ |
| 18734 | case 4177: /* *avx512f_vec_dup_gprv8di */ |
| 18735 | case 4176: /* avx512vl_vec_dup_gprv4si_mask */ |
| 18736 | case 4175: /* *avx512vl_vec_dup_gprv4si */ |
| 18737 | case 4174: /* avx512vl_vec_dup_gprv8si_mask */ |
| 18738 | case 4173: /* *avx512vl_vec_dup_gprv8si */ |
| 18739 | case 4172: /* avx512f_vec_dup_gprv16si_mask */ |
| 18740 | case 4171: /* *avx512f_vec_dup_gprv16si */ |
| 18741 | case 4170: /* avx512vl_vec_dup_gprv8hi_mask */ |
| 18742 | case 4169: /* *avx512vl_vec_dup_gprv8hi */ |
| 18743 | case 4168: /* avx512vl_vec_dup_gprv16hi_mask */ |
| 18744 | case 4167: /* *avx512vl_vec_dup_gprv16hi */ |
| 18745 | case 4166: /* avx512bw_vec_dup_gprv32hi_mask */ |
| 18746 | case 4165: /* *avx512bw_vec_dup_gprv32hi */ |
| 18747 | case 4164: /* avx512vl_vec_dup_gprv32qi_mask */ |
| 18748 | case 4163: /* *avx512vl_vec_dup_gprv32qi */ |
| 18749 | case 4162: /* avx512vl_vec_dup_gprv16qi_mask */ |
| 18750 | case 4161: /* *avx512vl_vec_dup_gprv16qi */ |
| 18751 | case 4160: /* avx512bw_vec_dup_gprv64qi_mask */ |
| 18752 | case 4159: /* *avx512bw_vec_dup_gprv64qi */ |
| 18753 | case 4158: /* avx512f_broadcastv8di_mask */ |
| 18754 | case 4157: /* *avx512f_broadcastv8di */ |
| 18755 | case 4156: /* avx512f_broadcastv8df_mask */ |
| 18756 | case 4155: /* *avx512f_broadcastv8df */ |
| 18757 | case 4154: /* avx512f_broadcastv16si_mask */ |
| 18758 | case 4153: /* *avx512f_broadcastv16si */ |
| 18759 | case 4152: /* avx512f_broadcastv16sf_mask */ |
| 18760 | case 4151: /* *avx512f_broadcastv16sf */ |
| 18761 | case 4150: /* avx512vl_vec_dupv8hi_mask */ |
| 18762 | case 4149: /* avx512vl_vec_dupv8hi */ |
| 18763 | case 4148: /* avx512vl_vec_dupv16hi_mask */ |
| 18764 | case 4147: /* avx512vl_vec_dupv16hi */ |
| 18765 | case 4146: /* avx512bw_vec_dupv32hi_mask */ |
| 18766 | case 4145: /* avx512bw_vec_dupv32hi */ |
| 18767 | case 4144: /* avx512vl_vec_dupv32qi_mask */ |
| 18768 | case 4143: /* avx512vl_vec_dupv32qi */ |
| 18769 | case 4142: /* avx512vl_vec_dupv16qi_mask */ |
| 18770 | case 4141: /* avx512vl_vec_dupv16qi */ |
| 18771 | case 4140: /* avx512bw_vec_dupv64qi_mask */ |
| 18772 | case 4139: /* avx512bw_vec_dupv64qi */ |
| 18773 | case 4138: /* avx512vl_vec_dupv2df_mask */ |
| 18774 | case 4137: /* avx512vl_vec_dupv2df */ |
| 18775 | case 4136: /* avx512vl_vec_dupv4df_mask */ |
| 18776 | case 4135: /* avx512vl_vec_dupv4df */ |
| 18777 | case 4134: /* avx512f_vec_dupv8df_mask */ |
| 18778 | case 4133: /* avx512f_vec_dupv8df */ |
| 18779 | case 4132: /* avx512vl_vec_dupv4sf_mask */ |
| 18780 | case 4131: /* avx512vl_vec_dupv4sf */ |
| 18781 | case 4130: /* avx512vl_vec_dupv8sf_mask */ |
| 18782 | case 4129: /* avx512vl_vec_dupv8sf */ |
| 18783 | case 4128: /* avx512f_vec_dupv16sf_mask */ |
| 18784 | case 4127: /* avx512f_vec_dupv16sf */ |
| 18785 | case 4126: /* avx512vl_vec_dupv2di_mask */ |
| 18786 | case 4125: /* avx512vl_vec_dupv2di */ |
| 18787 | case 4124: /* avx512vl_vec_dupv4di_mask */ |
| 18788 | case 4123: /* avx512vl_vec_dupv4di */ |
| 18789 | case 4122: /* avx512f_vec_dupv8di_mask */ |
| 18790 | case 4121: /* avx512f_vec_dupv8di */ |
| 18791 | case 4120: /* avx512vl_vec_dupv4si_mask */ |
| 18792 | case 4119: /* avx512vl_vec_dupv4si */ |
| 18793 | case 4118: /* avx512vl_vec_dupv8si_mask */ |
| 18794 | case 4117: /* avx512vl_vec_dupv8si */ |
| 18795 | case 4116: /* avx512f_vec_dupv16si_mask */ |
| 18796 | case 4115: /* avx512f_vec_dupv16si */ |
| 18797 | case 4114: /* avx512bw_vec_dupv64qi_1 */ |
| 18798 | case 4113: /* avx512bw_vec_dupv32hi_1 */ |
| 18799 | case 4112: /* avx512f_vec_dupv8di_1 */ |
| 18800 | case 4111: /* avx512f_vec_dupv16si_1 */ |
| 18801 | case 4072: /* avx2_pbroadcastv4di_1 */ |
| 18802 | case 4071: /* avx2_pbroadcastv8si_1 */ |
| 18803 | case 4070: /* avx2_pbroadcastv16hi_1 */ |
| 18804 | case 4069: /* avx2_pbroadcastv32qi_1 */ |
| 18805 | case 4068: /* avx2_pbroadcastv2di */ |
| 18806 | case 4067: /* avx2_pbroadcastv4di */ |
| 18807 | case 4066: /* avx2_pbroadcastv4si */ |
| 18808 | case 4065: /* avx2_pbroadcastv8si */ |
| 18809 | case 4064: /* avx2_pbroadcastv8hi */ |
| 18810 | case 4063: /* avx2_pbroadcastv16hi */ |
| 18811 | case 4062: /* avx2_pbroadcastv32hi */ |
| 18812 | case 4061: /* avx2_pbroadcastv16qi */ |
| 18813 | case 4060: /* avx2_pbroadcastv32qi */ |
| 18814 | case 4059: /* avx2_pbroadcastv64qi */ |
| 18815 | case 4058: /* avx2_pbroadcastv8di */ |
| 18816 | case 4057: /* avx2_pbroadcastv16si */ |
| 18817 | case 3873: /* sse4_1_zero_extendv2siv2di2_mask */ |
| 18818 | case 3872: /* sse4_1_zero_extendv2siv2di2 */ |
| 18819 | case 3871: /* sse4_1_sign_extendv2siv2di2_mask */ |
| 18820 | case 3870: /* sse4_1_sign_extendv2siv2di2 */ |
| 18821 | case 3869: /* avx2_zero_extendv4siv4di2_mask */ |
| 18822 | case 3868: /* avx2_zero_extendv4siv4di2 */ |
| 18823 | case 3867: /* avx2_sign_extendv4siv4di2_mask */ |
| 18824 | case 3866: /* avx2_sign_extendv4siv4di2 */ |
| 18825 | case 3865: /* avx512f_zero_extendv8siv8di2_mask */ |
| 18826 | case 3864: /* avx512f_zero_extendv8siv8di2 */ |
| 18827 | case 3863: /* avx512f_sign_extendv8siv8di2_mask */ |
| 18828 | case 3862: /* avx512f_sign_extendv8siv8di2 */ |
| 18829 | case 3861: /* sse4_1_zero_extendv2hiv2di2_mask */ |
| 18830 | case 3860: /* sse4_1_zero_extendv2hiv2di2 */ |
| 18831 | case 3859: /* sse4_1_sign_extendv2hiv2di2_mask */ |
| 18832 | case 3858: /* sse4_1_sign_extendv2hiv2di2 */ |
| 18833 | case 3857: /* avx2_zero_extendv4hiv4di2_mask */ |
| 18834 | case 3856: /* avx2_zero_extendv4hiv4di2 */ |
| 18835 | case 3855: /* avx2_sign_extendv4hiv4di2_mask */ |
| 18836 | case 3854: /* avx2_sign_extendv4hiv4di2 */ |
| 18837 | case 3853: /* avx512f_zero_extendv8hiv8di2_mask */ |
| 18838 | case 3852: /* avx512f_zero_extendv8hiv8di2 */ |
| 18839 | case 3851: /* avx512f_sign_extendv8hiv8di2_mask */ |
| 18840 | case 3850: /* avx512f_sign_extendv8hiv8di2 */ |
| 18841 | case 3849: /* sse4_1_zero_extendv2qiv2di2_mask */ |
| 18842 | case 3848: /* sse4_1_zero_extendv2qiv2di2 */ |
| 18843 | case 3847: /* sse4_1_sign_extendv2qiv2di2_mask */ |
| 18844 | case 3846: /* sse4_1_sign_extendv2qiv2di2 */ |
| 18845 | case 3845: /* avx2_zero_extendv4qiv4di2_mask */ |
| 18846 | case 3844: /* avx2_zero_extendv4qiv4di2 */ |
| 18847 | case 3843: /* avx2_sign_extendv4qiv4di2_mask */ |
| 18848 | case 3842: /* avx2_sign_extendv4qiv4di2 */ |
| 18849 | case 3841: /* avx512f_zero_extendv8qiv8di2_mask */ |
| 18850 | case 3840: /* avx512f_zero_extendv8qiv8di2 */ |
| 18851 | case 3839: /* avx512f_sign_extendv8qiv8di2_mask */ |
| 18852 | case 3838: /* avx512f_sign_extendv8qiv8di2 */ |
| 18853 | case 3837: /* sse4_1_zero_extendv4hiv4si2_mask */ |
| 18854 | case 3836: /* sse4_1_zero_extendv4hiv4si2 */ |
| 18855 | case 3835: /* sse4_1_sign_extendv4hiv4si2_mask */ |
| 18856 | case 3834: /* sse4_1_sign_extendv4hiv4si2 */ |
| 18857 | case 3833: /* avx2_zero_extendv8hiv8si2_mask */ |
| 18858 | case 3832: /* avx2_zero_extendv8hiv8si2 */ |
| 18859 | case 3831: /* avx2_sign_extendv8hiv8si2_mask */ |
| 18860 | case 3830: /* avx2_sign_extendv8hiv8si2 */ |
| 18861 | case 3829: /* avx512f_zero_extendv16hiv16si2_mask */ |
| 18862 | case 3828: /* avx512f_zero_extendv16hiv16si2 */ |
| 18863 | case 3827: /* avx512f_sign_extendv16hiv16si2_mask */ |
| 18864 | case 3826: /* avx512f_sign_extendv16hiv16si2 */ |
| 18865 | case 3825: /* sse4_1_zero_extendv4qiv4si2_mask */ |
| 18866 | case 3824: /* sse4_1_zero_extendv4qiv4si2 */ |
| 18867 | case 3823: /* sse4_1_sign_extendv4qiv4si2_mask */ |
| 18868 | case 3822: /* sse4_1_sign_extendv4qiv4si2 */ |
| 18869 | case 3821: /* avx2_zero_extendv8qiv8si2_mask */ |
| 18870 | case 3820: /* avx2_zero_extendv8qiv8si2 */ |
| 18871 | case 3819: /* avx2_sign_extendv8qiv8si2_mask */ |
| 18872 | case 3818: /* avx2_sign_extendv8qiv8si2 */ |
| 18873 | case 3817: /* avx512f_zero_extendv16qiv16si2_mask */ |
| 18874 | case 3816: /* *avx512f_zero_extendv16qiv16si2 */ |
| 18875 | case 3815: /* avx512f_sign_extendv16qiv16si2_mask */ |
| 18876 | case 3814: /* *avx512f_sign_extendv16qiv16si2 */ |
| 18877 | case 3813: /* sse4_1_zero_extendv8qiv8hi2_mask */ |
| 18878 | case 3812: /* sse4_1_zero_extendv8qiv8hi2 */ |
| 18879 | case 3811: /* sse4_1_sign_extendv8qiv8hi2_mask */ |
| 18880 | case 3810: /* sse4_1_sign_extendv8qiv8hi2 */ |
| 18881 | case 3809: /* avx512bw_zero_extendv32qiv32hi2_mask */ |
| 18882 | case 3808: /* avx512bw_zero_extendv32qiv32hi2 */ |
| 18883 | case 3807: /* avx512bw_sign_extendv32qiv32hi2_mask */ |
| 18884 | case 3806: /* avx512bw_sign_extendv32qiv32hi2 */ |
| 18885 | case 3805: /* avx2_zero_extendv16qiv16hi2_mask */ |
| 18886 | case 3804: /* avx2_zero_extendv16qiv16hi2 */ |
| 18887 | case 3803: /* avx2_sign_extendv16qiv16hi2_mask */ |
| 18888 | case 3802: /* avx2_sign_extendv16qiv16hi2 */ |
| 18889 | case 3800: /* avx2_pblenddv4si */ |
| 18890 | case 3799: /* avx2_pblenddv8si */ |
| 18891 | case 3798: /* *avx2_pblendw */ |
| 18892 | case 3797: /* sse4_1_pblendw */ |
| 18893 | case 3796: /* sse4_1_pblendvb */ |
| 18894 | case 3795: /* avx2_pblendvb */ |
| 18895 | case 3786: /* sse4_1_movntdqa */ |
| 18896 | case 3785: /* avx2_movntdqa */ |
| 18897 | case 3784: /* avx512f_movntdqa */ |
| 18898 | case 3779: /* sse4_1_blendvpd */ |
| 18899 | case 3778: /* avx_blendvpd256 */ |
| 18900 | case 3777: /* sse4_1_blendvps */ |
| 18901 | case 3776: /* avx_blendvps256 */ |
| 18902 | case 3775: /* sse4_1_blendpd */ |
| 18903 | case 3774: /* avx_blendpd256 */ |
| 18904 | case 3773: /* sse4_1_blendps */ |
| 18905 | case 3772: /* avx_blendps256 */ |
| 18906 | case 3767: /* sse4a_vmmovntv2df */ |
| 18907 | case 3766: /* sse4a_vmmovntv4sf */ |
| 18908 | case 3765: /* sse4a_movntdf */ |
| 18909 | case 3764: /* sse4a_movntsf */ |
| 18910 | case 3671: /* *sse2_maskmovdqu */ |
| 18911 | case 3670: /* *sse2_maskmovdqu */ |
| 18912 | case 3669: /* *sse2_pmovmskb_zext */ |
| 18913 | case 3668: /* *avx2_pmovmskb_zext */ |
| 18914 | case 3667: /* sse2_pmovmskb */ |
| 18915 | case 3666: /* avx2_pmovmskb */ |
| 18916 | case 3665: /* *sse2_movmskpd_zext */ |
| 18917 | case 3664: /* *avx_movmskpd256_zext */ |
| 18918 | case 3663: /* *sse_movmskps_zext */ |
| 18919 | case 3662: /* *avx_movmskps256_zext */ |
| 18920 | case 3661: /* sse2_movmskpd */ |
| 18921 | case 3660: /* avx_movmskpd256 */ |
| 18922 | case 3659: /* sse_movmskps */ |
| 18923 | case 3658: /* avx_movmskps256 */ |
| 18924 | case 3620: /* sse2_loadld */ |
| 18925 | case 2930: /* *avx512f_us_truncatev8div16qi2_mask_1 */ |
| 18926 | case 2929: /* *avx512f_truncatev8div16qi2_mask_1 */ |
| 18927 | case 2928: /* *avx512f_ss_truncatev8div16qi2_mask_1 */ |
| 18928 | case 2927: /* avx512f_us_truncatev8div16qi2_mask */ |
| 18929 | case 2926: /* avx512f_truncatev8div16qi2_mask */ |
| 18930 | case 2925: /* avx512f_ss_truncatev8div16qi2_mask */ |
| 18931 | case 2921: /* *avx512f_us_truncatev8div16qi2 */ |
| 18932 | case 2920: /* *avx512f_truncatev8div16qi2 */ |
| 18933 | case 2919: /* *avx512f_ss_truncatev8div16qi2 */ |
| 18934 | case 2915: /* *avx512vl_us_truncatev2div2si2_mask_1 */ |
| 18935 | case 2914: /* *avx512vl_truncatev2div2si2_mask_1 */ |
| 18936 | case 2913: /* *avx512vl_ss_truncatev2div2si2_mask_1 */ |
| 18937 | case 2912: /* avx512vl_us_truncatev2div2si2_mask */ |
| 18938 | case 2911: /* avx512vl_truncatev2div2si2_mask */ |
| 18939 | case 2910: /* avx512vl_ss_truncatev2div2si2_mask */ |
| 18940 | case 2906: /* *avx512vl_us_truncatev2div2si2 */ |
| 18941 | case 2905: /* *avx512vl_truncatev2div2si2 */ |
| 18942 | case 2904: /* *avx512vl_ss_truncatev2div2si2 */ |
| 18943 | case 2900: /* *avx512vl_us_truncatev2div2hi2_mask_1 */ |
| 18944 | case 2899: /* *avx512vl_truncatev2div2hi2_mask_1 */ |
| 18945 | case 2898: /* *avx512vl_ss_truncatev2div2hi2_mask_1 */ |
| 18946 | case 2897: /* avx512vl_us_truncatev2div2hi2_mask */ |
| 18947 | case 2896: /* avx512vl_truncatev2div2hi2_mask */ |
| 18948 | case 2895: /* avx512vl_ss_truncatev2div2hi2_mask */ |
| 18949 | case 2885: /* *avx512vl_us_truncatev4div4hi2_mask_1 */ |
| 18950 | case 2884: /* *avx512vl_truncatev4div4hi2_mask_1 */ |
| 18951 | case 2883: /* *avx512vl_ss_truncatev4div4hi2_mask_1 */ |
| 18952 | case 2882: /* *avx512vl_us_truncatev4siv4hi2_mask_1 */ |
| 18953 | case 2881: /* *avx512vl_truncatev4siv4hi2_mask_1 */ |
| 18954 | case 2880: /* *avx512vl_ss_truncatev4siv4hi2_mask_1 */ |
| 18955 | case 2879: /* avx512vl_us_truncatev4div4hi2_mask */ |
| 18956 | case 2878: /* avx512vl_truncatev4div4hi2_mask */ |
| 18957 | case 2877: /* avx512vl_ss_truncatev4div4hi2_mask */ |
| 18958 | case 2876: /* avx512vl_us_truncatev4siv4hi2_mask */ |
| 18959 | case 2875: /* avx512vl_truncatev4siv4hi2_mask */ |
| 18960 | case 2874: /* avx512vl_ss_truncatev4siv4hi2_mask */ |
| 18961 | case 2867: /* *avx512vl_us_truncatev4siv4hi2 */ |
| 18962 | case 2866: /* *avx512vl_truncatev4siv4hi2 */ |
| 18963 | case 2865: /* *avx512vl_ss_truncatev4siv4hi2 */ |
| 18964 | case 2864: /* *avx512vl_us_truncatev2div2hi2 */ |
| 18965 | case 2863: /* *avx512vl_truncatev2div2hi2 */ |
| 18966 | case 2862: /* *avx512vl_ss_truncatev2div2hi2 */ |
| 18967 | case 2861: /* *avx512vl_us_truncatev4div4hi2 */ |
| 18968 | case 2860: /* *avx512vl_truncatev4div4hi2 */ |
| 18969 | case 2859: /* *avx512vl_ss_truncatev4div4hi2 */ |
| 18970 | case 2852: /* *avx512vl_us_truncatev8siv8qi2_mask_1 */ |
| 18971 | case 2851: /* *avx512vl_truncatev8siv8qi2_mask_1 */ |
| 18972 | case 2850: /* *avx512vl_ss_truncatev8siv8qi2_mask_1 */ |
| 18973 | case 2849: /* *avx512vl_us_truncatev8hiv8qi2_mask_1 */ |
| 18974 | case 2848: /* *avx512vl_truncatev8hiv8qi2_mask_1 */ |
| 18975 | case 2847: /* *avx512vl_ss_truncatev8hiv8qi2_mask_1 */ |
| 18976 | case 2846: /* avx512vl_us_truncatev8siv8qi2_mask */ |
| 18977 | case 2845: /* avx512vl_truncatev8siv8qi2_mask */ |
| 18978 | case 2844: /* avx512vl_ss_truncatev8siv8qi2_mask */ |
| 18979 | case 2843: /* avx512vl_us_truncatev8hiv8qi2_mask */ |
| 18980 | case 2842: /* avx512vl_truncatev8hiv8qi2_mask */ |
| 18981 | case 2841: /* avx512vl_ss_truncatev8hiv8qi2_mask */ |
| 18982 | case 2828: /* *avx512vl_us_truncatev4div4qi2_mask_1 */ |
| 18983 | case 2827: /* *avx512vl_truncatev4div4qi2_mask_1 */ |
| 18984 | case 2826: /* *avx512vl_ss_truncatev4div4qi2_mask_1 */ |
| 18985 | case 2825: /* *avx512vl_us_truncatev4siv4qi2_mask_1 */ |
| 18986 | case 2824: /* *avx512vl_truncatev4siv4qi2_mask_1 */ |
| 18987 | case 2823: /* *avx512vl_ss_truncatev4siv4qi2_mask_1 */ |
| 18988 | case 2822: /* avx512vl_us_truncatev4div4qi2_mask */ |
| 18989 | case 2821: /* avx512vl_truncatev4div4qi2_mask */ |
| 18990 | case 2820: /* avx512vl_ss_truncatev4div4qi2_mask */ |
| 18991 | case 2819: /* avx512vl_us_truncatev4siv4qi2_mask */ |
| 18992 | case 2818: /* avx512vl_truncatev4siv4qi2_mask */ |
| 18993 | case 2817: /* avx512vl_ss_truncatev4siv4qi2_mask */ |
| 18994 | case 2807: /* *avx512vl_us_truncatev2div2qi2_mask_1 */ |
| 18995 | case 2806: /* *avx512vl_truncatev2div2qi2_mask_1 */ |
| 18996 | case 2805: /* *avx512vl_ss_truncatev2div2qi2_mask_1 */ |
| 18997 | case 2804: /* avx512vl_us_truncatev2div2qi2_mask */ |
| 18998 | case 2803: /* avx512vl_truncatev2div2qi2_mask */ |
| 18999 | case 2802: /* avx512vl_ss_truncatev2div2qi2_mask */ |
| 19000 | case 2798: /* *avx512vl_us_truncatev8hiv8qi2 */ |
| 19001 | case 2797: /* *avx512vl_truncatev8hiv8qi2 */ |
| 19002 | case 2796: /* *avx512vl_ss_truncatev8hiv8qi2 */ |
| 19003 | case 2795: /* *avx512vl_us_truncatev4siv4qi2 */ |
| 19004 | case 2794: /* *avx512vl_truncatev4siv4qi2 */ |
| 19005 | case 2793: /* *avx512vl_ss_truncatev4siv4qi2 */ |
| 19006 | case 2792: /* *avx512vl_us_truncatev8siv8qi2 */ |
| 19007 | case 2791: /* *avx512vl_truncatev8siv8qi2 */ |
| 19008 | case 2790: /* *avx512vl_ss_truncatev8siv8qi2 */ |
| 19009 | case 2789: /* *avx512vl_us_truncatev2div2qi2 */ |
| 19010 | case 2788: /* *avx512vl_truncatev2div2qi2 */ |
| 19011 | case 2787: /* *avx512vl_ss_truncatev2div2qi2 */ |
| 19012 | case 2786: /* *avx512vl_us_truncatev4div4qi2 */ |
| 19013 | case 2785: /* *avx512vl_truncatev4div4qi2 */ |
| 19014 | case 2784: /* *avx512vl_ss_truncatev4div4qi2 */ |
| 19015 | case 2729: /* *vec_extractv2df_0_sse */ |
| 19016 | case 2727: /* *vec_extractv2df_1_sse */ |
| 19017 | case 2461: /* *vec_concatv4sf */ |
| 19018 | case 2453: /* sse_movss */ |
| 19019 | case 2451: /* sse_storelps */ |
| 19020 | case 2450: /* sse_loadhps */ |
| 19021 | case 2449: /* sse_storehps */ |
| 19022 | case 2419: /* sse_movlhps */ |
| 19023 | case 2418: /* sse_movhlps */ |
| 19024 | case 1304: /* sse2_movntv2df */ |
| 19025 | case 1303: /* avx_movntv4df */ |
| 19026 | case 1302: /* avx512f_movntv8df */ |
| 19027 | case 1301: /* sse_movntv4sf */ |
| 19028 | case 1300: /* avx_movntv8sf */ |
| 19029 | case 1299: /* avx512f_movntv16sf */ |
| 19030 | case 1298: /* sse2_movntidi */ |
| 19031 | case 1297: /* sse2_movntisi */ |
| 19032 | case 1296: /* sse3_lddqu */ |
| 19033 | case 1295: /* avx_lddqu256 */ |
| 19034 | case 1293: /* sse2_movq128 */ |
| 19035 | case 1274: /* avx512vl_blendmv8hi */ |
| 19036 | case 1273: /* avx512vl_blendmv16hi */ |
| 19037 | case 1272: /* avx512bw_blendmv32hi */ |
| 19038 | case 1271: /* avx512vl_blendmv32qi */ |
| 19039 | case 1270: /* avx512vl_blendmv16qi */ |
| 19040 | case 1269: /* avx512bw_blendmv64qi */ |
| 19041 | case 1268: /* avx512vl_blendmv2df */ |
| 19042 | case 1267: /* avx512vl_blendmv4df */ |
| 19043 | case 1266: /* avx512f_blendmv8df */ |
| 19044 | case 1265: /* avx512vl_blendmv4sf */ |
| 19045 | case 1264: /* avx512vl_blendmv8sf */ |
| 19046 | case 1263: /* avx512f_blendmv16sf */ |
| 19047 | case 1262: /* avx512vl_blendmv2di */ |
| 19048 | case 1261: /* avx512vl_blendmv4di */ |
| 19049 | case 1260: /* avx512f_blendmv8di */ |
| 19050 | case 1259: /* avx512vl_blendmv4si */ |
| 19051 | case 1258: /* avx512vl_blendmv8si */ |
| 19052 | case 1257: /* avx512f_blendmv16si */ |
| 19053 | case 933: /* movmsk_df */ |
| 19054 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) |
| 19055 | { |
| 19056 | return 1; |
| 19057 | } |
| 19058 | else if (cached_memory == MEMORY_LOAD) |
| 19059 | { |
| 19060 | return 2; |
| 19061 | } |
| 19062 | else if (cached_memory == MEMORY_STORE) |
| 19063 | { |
| 19064 | return 1; |
| 19065 | } |
| 19066 | else |
| 19067 | { |
| 19068 | return 0; |
| 19069 | } |
| 19070 | |
| 19071 | case 880: /* rintdf2_frndint */ |
| 19072 | return 32 /* 0x20 */; |
| 19073 | |
| 19074 | case 879: /* rintsf2_frndint */ |
| 19075 | return 18 /* 0x12 */; |
| 19076 | |
| 19077 | case 878: /* rintxf2 */ |
| 19078 | case 875: /* fscalexf4_i387 */ |
| 19079 | case 874: /* *f2xm1xf2_i387 */ |
| 19080 | case 873: /* fxtract_extenddfxf3_i387 */ |
| 19081 | case 872: /* fxtract_extendsfxf3_i387 */ |
| 19082 | case 871: /* fxtractxf3_i387 */ |
| 19083 | case 870: /* fyl2xp1_extenddfxf3_i387 */ |
| 19084 | case 869: /* fyl2xp1_extendsfxf3_i387 */ |
| 19085 | case 868: /* fyl2xp1xf3_i387 */ |
| 19086 | case 867: /* fyl2x_extenddfxf3_i387 */ |
| 19087 | case 866: /* fyl2x_extendsfxf3_i387 */ |
| 19088 | case 865: /* fyl2xxf3_i387 */ |
| 19089 | case 864: /* fpatan_extenddfxf3_i387 */ |
| 19090 | case 863: /* fpatan_extendsfxf3_i387 */ |
| 19091 | case 862: /* *fpatanxf3_i387 */ |
| 19092 | case 861: /* fptan_extenddfxf4_i387 */ |
| 19093 | case 860: /* fptan_extendsfxf4_i387 */ |
| 19094 | case 859: /* fptanxf4_i387 */ |
| 19095 | case 858: /* sincos_extenddfxf3_i387 */ |
| 19096 | case 857: /* sincos_extendsfxf3_i387 */ |
| 19097 | case 856: /* sincosxf3 */ |
| 19098 | case 855: /* *cos_extenddfxf2_i387 */ |
| 19099 | case 854: /* *sin_extenddfxf2_i387 */ |
| 19100 | case 853: /* *cos_extendsfxf2_i387 */ |
| 19101 | case 852: /* *sin_extendsfxf2_i387 */ |
| 19102 | case 851: /* *cosxf2_i387 */ |
| 19103 | case 850: /* *sinxf2_i387 */ |
| 19104 | case 849: /* fprem1xf4_i387 */ |
| 19105 | case 848: /* fpremxf4_i387 */ |
| 19106 | case 844: /* sqrt_extenddfxf2_i387 */ |
| 19107 | case 843: /* sqrt_extendsfxf2_i387 */ |
| 19108 | case 842: /* sqrtxf2 */ |
| 19109 | return 38 /* 0x26 */; |
| 19110 | |
| 19111 | case 693: /* simple_return_indirect_internal */ |
| 19112 | case 663: /* *tablejump_1 */ |
| 19113 | case 662: /* *tablejump_1 */ |
| 19114 | case 661: /* *indirect_jump */ |
| 19115 | case 660: /* *indirect_jump */ |
| 19116 | extract_constrain_insn_cached (insn); |
| 19117 | if ( |
| 19118 | #line 12442 "/___NETBSD_SRC___/tools/gcc/../../external/gpl3/gcc/dist/gcc/config/i386/i386.md" |
| 19119 | ((cfun->machine->indirect_branch_type |
| 19120 | != indirect_branch_keep))) |
| 19121 | { |
| 19122 | return 6; |
| 19123 | } |
| 19124 | else if ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) |
| 19125 | { |
| 19126 | return 1; |
| 19127 | } |
| 19128 | else |
| 19129 | { |
| 19130 | return 6; |
| 19131 | } |
| 19132 | |
| 19133 | case 659: /* jump */ |
| 19134 | case 628: /* *jcc_2 */ |
| 19135 | case 627: /* *jcc_1 */ |
| 19136 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) |
| 19137 | { |
| 19138 | return 1; |
| 19139 | } |
| 19140 | else |
| 19141 | { |
| 19142 | return 6; |
| 19143 | } |
| 19144 | |
| 19145 | case 4043: /* xop_pcom_tfv2di3 */ |
| 19146 | case 4042: /* xop_pcom_tfv4si3 */ |
| 19147 | case 4041: /* xop_pcom_tfv8hi3 */ |
| 19148 | case 4040: /* xop_pcom_tfv16qi3 */ |
| 19149 | case 4039: /* xop_maskcmp_uns2v2di3 */ |
| 19150 | case 4038: /* xop_maskcmp_uns2v4si3 */ |
| 19151 | case 4037: /* xop_maskcmp_uns2v8hi3 */ |
| 19152 | case 4036: /* xop_maskcmp_uns2v16qi3 */ |
| 19153 | case 4035: /* xop_maskcmp_unsv2di3 */ |
| 19154 | case 4034: /* xop_maskcmp_unsv4si3 */ |
| 19155 | case 4033: /* xop_maskcmp_unsv8hi3 */ |
| 19156 | case 4032: /* xop_maskcmp_unsv16qi3 */ |
| 19157 | case 3890: /* ptesttf2 */ |
| 19158 | case 3889: /* avx_ptestv4df */ |
| 19159 | case 3888: /* avx_ptestv8sf */ |
| 19160 | case 3887: /* avx_ptestv4di */ |
| 19161 | case 3886: /* avx_ptestv8si */ |
| 19162 | case 3885: /* avx_ptestv16hi */ |
| 19163 | case 3884: /* avx_ptestv32qi */ |
| 19164 | case 3883: /* sse4_1_ptestv2df */ |
| 19165 | case 3882: /* sse4_1_ptestv4sf */ |
| 19166 | case 3881: /* sse4_1_ptestv2di */ |
| 19167 | case 3880: /* sse4_1_ptestv4si */ |
| 19168 | case 3879: /* sse4_1_ptestv8hi */ |
| 19169 | case 3878: /* sse4_1_ptestv16qi */ |
| 19170 | case 3877: /* avx_vtestpd */ |
| 19171 | case 3876: /* avx_vtestpd256 */ |
| 19172 | case 3875: /* avx_vtestps */ |
| 19173 | case 3874: /* avx_vtestps256 */ |
| 19174 | case 3383: /* sse2_gtv4si3 */ |
| 19175 | case 3382: /* sse2_gtv8hi3 */ |
| 19176 | case 3381: /* sse2_gtv16qi3 */ |
| 19177 | case 3380: /* avx512vl_gtv8hi3_mask */ |
| 19178 | case 3379: /* avx512vl_gtv8hi3 */ |
| 19179 | case 3378: /* avx512vl_gtv16hi3_mask */ |
| 19180 | case 3377: /* avx512vl_gtv16hi3 */ |
| 19181 | case 3376: /* avx512bw_gtv32hi3_mask */ |
| 19182 | case 3375: /* avx512bw_gtv32hi3 */ |
| 19183 | case 3374: /* avx512vl_gtv32qi3_mask */ |
| 19184 | case 3373: /* avx512vl_gtv32qi3 */ |
| 19185 | case 3372: /* avx512vl_gtv16qi3_mask */ |
| 19186 | case 3371: /* avx512vl_gtv16qi3 */ |
| 19187 | case 3370: /* avx512bw_gtv64qi3_mask */ |
| 19188 | case 3369: /* avx512bw_gtv64qi3 */ |
| 19189 | case 3368: /* avx512vl_gtv2di3_mask */ |
| 19190 | case 3367: /* avx512vl_gtv2di3 */ |
| 19191 | case 3366: /* avx512vl_gtv4di3_mask */ |
| 19192 | case 3365: /* avx512vl_gtv4di3 */ |
| 19193 | case 3364: /* avx512f_gtv8di3_mask */ |
| 19194 | case 3363: /* avx512f_gtv8di3 */ |
| 19195 | case 3362: /* avx512vl_gtv4si3_mask */ |
| 19196 | case 3361: /* avx512vl_gtv4si3 */ |
| 19197 | case 3360: /* avx512vl_gtv8si3_mask */ |
| 19198 | case 3359: /* avx512vl_gtv8si3 */ |
| 19199 | case 3358: /* avx512f_gtv16si3_mask */ |
| 19200 | case 3357: /* avx512f_gtv16si3 */ |
| 19201 | case 3356: /* avx2_gtv4di3 */ |
| 19202 | case 3355: /* avx2_gtv8si3 */ |
| 19203 | case 3354: /* avx2_gtv16hi3 */ |
| 19204 | case 3353: /* avx2_gtv32qi3 */ |
| 19205 | case 3352: /* sse4_2_gtv2di3 */ |
| 19206 | case 3351: /* *sse2_eqv4si3 */ |
| 19207 | case 3350: /* *sse2_eqv8hi3 */ |
| 19208 | case 3349: /* *sse2_eqv16qi3 */ |
| 19209 | case 3348: /* *sse4_1_eqv2di3 */ |
| 19210 | case 3347: /* avx512vl_eqv2di3_mask_1 */ |
| 19211 | case 3346: /* avx512vl_eqv2di3_1 */ |
| 19212 | case 3345: /* avx512vl_eqv4di3_mask_1 */ |
| 19213 | case 3344: /* avx512vl_eqv4di3_1 */ |
| 19214 | case 3343: /* avx512f_eqv8di3_mask_1 */ |
| 19215 | case 3342: /* avx512f_eqv8di3_1 */ |
| 19216 | case 3341: /* avx512vl_eqv4si3_mask_1 */ |
| 19217 | case 3340: /* avx512vl_eqv4si3_1 */ |
| 19218 | case 3339: /* avx512vl_eqv8si3_mask_1 */ |
| 19219 | case 3338: /* avx512vl_eqv8si3_1 */ |
| 19220 | case 3337: /* avx512f_eqv16si3_mask_1 */ |
| 19221 | case 3336: /* avx512f_eqv16si3_1 */ |
| 19222 | case 3335: /* avx512vl_eqv8hi3_mask_1 */ |
| 19223 | case 3334: /* avx512vl_eqv8hi3_1 */ |
| 19224 | case 3333: /* avx512vl_eqv16hi3_mask_1 */ |
| 19225 | case 3332: /* avx512vl_eqv16hi3_1 */ |
| 19226 | case 3331: /* avx512bw_eqv32hi3_mask_1 */ |
| 19227 | case 3330: /* avx512bw_eqv32hi3_1 */ |
| 19228 | case 3329: /* avx512vl_eqv32qi3_mask_1 */ |
| 19229 | case 3328: /* avx512vl_eqv32qi3_1 */ |
| 19230 | case 3327: /* avx512vl_eqv16qi3_mask_1 */ |
| 19231 | case 3326: /* avx512vl_eqv16qi3_1 */ |
| 19232 | case 3325: /* avx512bw_eqv64qi3_mask_1 */ |
| 19233 | case 3324: /* avx512bw_eqv64qi3_1 */ |
| 19234 | case 3323: /* *avx2_eqv4di3 */ |
| 19235 | case 3322: /* *avx2_eqv8si3 */ |
| 19236 | case 3321: /* *avx2_eqv16hi3 */ |
| 19237 | case 3320: /* *avx2_eqv32qi3 */ |
| 19238 | case 1740: /* sse2_ucomi_round */ |
| 19239 | case 1739: /* sse2_ucomi */ |
| 19240 | case 1738: /* sse_ucomi_round */ |
| 19241 | case 1737: /* sse_ucomi */ |
| 19242 | case 1736: /* sse2_comi_round */ |
| 19243 | case 1735: /* sse2_comi */ |
| 19244 | case 1734: /* sse_comi_round */ |
| 19245 | case 1733: /* sse_comi */ |
| 19246 | case 1732: /* avx512f_maskcmpv2df3 */ |
| 19247 | case 1731: /* avx512f_maskcmpv4df3 */ |
| 19248 | case 1730: /* avx512f_maskcmpv8df3 */ |
| 19249 | case 1729: /* avx512f_maskcmpv4sf3 */ |
| 19250 | case 1728: /* avx512f_maskcmpv8sf3 */ |
| 19251 | case 1727: /* avx512f_maskcmpv16sf3 */ |
| 19252 | case 1726: /* avx512f_vmcmpv2df3_mask_round */ |
| 19253 | case 1725: /* avx512f_vmcmpv2df3_mask */ |
| 19254 | case 1724: /* avx512f_vmcmpv4sf3_mask_round */ |
| 19255 | case 1723: /* avx512f_vmcmpv4sf3_mask */ |
| 19256 | case 1722: /* avx512f_vmcmpv2df3_round */ |
| 19257 | case 1721: /* avx512f_vmcmpv2df3 */ |
| 19258 | case 1720: /* avx512f_vmcmpv4sf3_round */ |
| 19259 | case 1719: /* avx512f_vmcmpv4sf3 */ |
| 19260 | case 1718: /* avx512vl_ucmpv2di3_mask */ |
| 19261 | case 1717: /* avx512vl_ucmpv2di3 */ |
| 19262 | case 1716: /* avx512vl_ucmpv4di3_mask */ |
| 19263 | case 1715: /* avx512vl_ucmpv4di3 */ |
| 19264 | case 1714: /* avx512f_ucmpv8di3_mask */ |
| 19265 | case 1713: /* avx512f_ucmpv8di3 */ |
| 19266 | case 1712: /* avx512vl_ucmpv4si3_mask */ |
| 19267 | case 1711: /* avx512vl_ucmpv4si3 */ |
| 19268 | case 1710: /* avx512vl_ucmpv8si3_mask */ |
| 19269 | case 1709: /* avx512vl_ucmpv8si3 */ |
| 19270 | case 1708: /* avx512f_ucmpv16si3_mask */ |
| 19271 | case 1707: /* avx512f_ucmpv16si3 */ |
| 19272 | case 1706: /* avx512vl_ucmpv8hi3_mask */ |
| 19273 | case 1705: /* avx512vl_ucmpv8hi3 */ |
| 19274 | case 1704: /* avx512vl_ucmpv16hi3_mask */ |
| 19275 | case 1703: /* avx512vl_ucmpv16hi3 */ |
| 19276 | case 1702: /* avx512bw_ucmpv32hi3_mask */ |
| 19277 | case 1701: /* avx512bw_ucmpv32hi3 */ |
| 19278 | case 1700: /* avx512vl_ucmpv32qi3_mask */ |
| 19279 | case 1699: /* avx512vl_ucmpv32qi3 */ |
| 19280 | case 1698: /* avx512vl_ucmpv16qi3_mask */ |
| 19281 | case 1697: /* avx512vl_ucmpv16qi3 */ |
| 19282 | case 1696: /* avx512bw_ucmpv64qi3_mask */ |
| 19283 | case 1695: /* avx512bw_ucmpv64qi3 */ |
| 19284 | case 1694: /* avx512vl_cmpv8hi3_mask */ |
| 19285 | case 1693: /* avx512vl_cmpv8hi3 */ |
| 19286 | case 1692: /* avx512vl_cmpv16hi3_mask */ |
| 19287 | case 1691: /* avx512vl_cmpv16hi3 */ |
| 19288 | case 1690: /* avx512bw_cmpv32hi3_mask */ |
| 19289 | case 1689: /* avx512bw_cmpv32hi3 */ |
| 19290 | case 1688: /* avx512vl_cmpv32qi3_mask */ |
| 19291 | case 1687: /* avx512vl_cmpv32qi3 */ |
| 19292 | case 1686: /* avx512vl_cmpv16qi3_mask */ |
| 19293 | case 1685: /* avx512vl_cmpv16qi3 */ |
| 19294 | case 1684: /* avx512bw_cmpv64qi3_mask */ |
| 19295 | case 1683: /* avx512bw_cmpv64qi3 */ |
| 19296 | case 1682: /* avx512vl_cmpv2df3_mask */ |
| 19297 | case 1681: /* avx512vl_cmpv2df3 */ |
| 19298 | case 1680: /* avx512vl_cmpv4df3_mask */ |
| 19299 | case 1679: /* avx512vl_cmpv4df3 */ |
| 19300 | case 1678: /* avx512f_cmpv8df3_mask_round */ |
| 19301 | case 1677: /* avx512f_cmpv8df3_round */ |
| 19302 | case 1676: /* avx512f_cmpv8df3_mask */ |
| 19303 | case 1675: /* avx512f_cmpv8df3 */ |
| 19304 | case 1674: /* avx512vl_cmpv4sf3_mask */ |
| 19305 | case 1673: /* avx512vl_cmpv4sf3 */ |
| 19306 | case 1672: /* avx512vl_cmpv8sf3_mask */ |
| 19307 | case 1671: /* avx512vl_cmpv8sf3 */ |
| 19308 | case 1670: /* avx512f_cmpv16sf3_mask_round */ |
| 19309 | case 1669: /* avx512f_cmpv16sf3_round */ |
| 19310 | case 1668: /* avx512f_cmpv16sf3_mask */ |
| 19311 | case 1667: /* avx512f_cmpv16sf3 */ |
| 19312 | case 1666: /* avx512vl_cmpv2di3_mask */ |
| 19313 | case 1665: /* avx512vl_cmpv2di3 */ |
| 19314 | case 1664: /* avx512vl_cmpv4di3_mask */ |
| 19315 | case 1663: /* avx512vl_cmpv4di3 */ |
| 19316 | case 1662: /* avx512f_cmpv8di3_mask_round */ |
| 19317 | case 1661: /* avx512f_cmpv8di3_round */ |
| 19318 | case 1660: /* avx512f_cmpv8di3_mask */ |
| 19319 | case 1659: /* avx512f_cmpv8di3 */ |
| 19320 | case 1658: /* avx512vl_cmpv4si3_mask */ |
| 19321 | case 1657: /* avx512vl_cmpv4si3 */ |
| 19322 | case 1656: /* avx512vl_cmpv8si3_mask */ |
| 19323 | case 1655: /* avx512vl_cmpv8si3 */ |
| 19324 | case 1654: /* avx512f_cmpv16si3_mask_round */ |
| 19325 | case 1653: /* avx512f_cmpv16si3_round */ |
| 19326 | case 1652: /* avx512f_cmpv16si3_mask */ |
| 19327 | case 1651: /* avx512f_cmpv16si3 */ |
| 19328 | case 1650: /* sse2_vmmaskcmpv2df3 */ |
| 19329 | case 1649: /* sse_vmmaskcmpv4sf3 */ |
| 19330 | case 1648: /* sse2_maskcmpv2df3 */ |
| 19331 | case 1647: /* avx_maskcmpv4df3 */ |
| 19332 | case 1646: /* sse_maskcmpv4sf3 */ |
| 19333 | case 1645: /* avx_maskcmpv8sf3 */ |
| 19334 | case 1644: /* *sse2_maskcmpv2df3_comm */ |
| 19335 | case 1643: /* *avx_maskcmpv4df3_comm */ |
| 19336 | case 1642: /* *sse_maskcmpv4sf3_comm */ |
| 19337 | case 1641: /* *avx_maskcmpv8sf3_comm */ |
| 19338 | case 1640: /* avx_vmcmpv2df3 */ |
| 19339 | case 1639: /* avx_vmcmpv4sf3 */ |
| 19340 | case 1638: /* avx_cmpv2df3 */ |
| 19341 | case 1637: /* avx_cmpv4df3 */ |
| 19342 | case 1636: /* avx_cmpv4sf3 */ |
| 19343 | case 1635: /* avx_cmpv8sf3 */ |
| 19344 | case 1620: /* sse3_hsubv4sf3 */ |
| 19345 | case 1619: /* sse3_haddv4sf3 */ |
| 19346 | case 1618: /* avx_hsubv8sf3 */ |
| 19347 | case 1617: /* avx_haddv8sf3 */ |
| 19348 | case 1616: /* *sse3_hsubv2df3_low */ |
| 19349 | case 1615: /* *sse3_haddv2df3_low */ |
| 19350 | case 1614: /* sse3_hsubv2df3 */ |
| 19351 | case 1613: /* *sse3_haddv2df3 */ |
| 19352 | case 1612: /* avx_hsubv4df3 */ |
| 19353 | case 1611: /* avx_haddv4df3 */ |
| 19354 | case 1610: /* sse3_addsubv4sf3 */ |
| 19355 | case 1609: /* avx_addsubv8sf3 */ |
| 19356 | case 1608: /* sse3_addsubv2df3 */ |
| 19357 | case 1607: /* avx_addsubv4df3 */ |
| 19358 | case 1598: /* ieee_minv2df3_mask */ |
| 19359 | case 1597: /* ieee_minv2df3 */ |
| 19360 | case 1596: /* ieee_maxv2df3_mask */ |
| 19361 | case 1595: /* ieee_maxv2df3 */ |
| 19362 | case 1594: /* ieee_minv4df3_mask */ |
| 19363 | case 1593: /* ieee_minv4df3 */ |
| 19364 | case 1592: /* ieee_maxv4df3_mask */ |
| 19365 | case 1591: /* ieee_maxv4df3 */ |
| 19366 | case 1590: /* ieee_minv8df3_mask_round */ |
| 19367 | case 1589: /* ieee_minv8df3_mask */ |
| 19368 | case 1588: /* ieee_minv8df3_round */ |
| 19369 | case 1587: /* ieee_minv8df3 */ |
| 19370 | case 1586: /* ieee_maxv8df3_mask_round */ |
| 19371 | case 1585: /* ieee_maxv8df3_mask */ |
| 19372 | case 1584: /* ieee_maxv8df3_round */ |
| 19373 | case 1583: /* ieee_maxv8df3 */ |
| 19374 | case 1582: /* ieee_minv4sf3_mask */ |
| 19375 | case 1581: /* ieee_minv4sf3 */ |
| 19376 | case 1580: /* ieee_maxv4sf3_mask */ |
| 19377 | case 1579: /* ieee_maxv4sf3 */ |
| 19378 | case 1578: /* ieee_minv8sf3_mask */ |
| 19379 | case 1577: /* ieee_minv8sf3 */ |
| 19380 | case 1576: /* ieee_maxv8sf3_mask */ |
| 19381 | case 1575: /* ieee_maxv8sf3 */ |
| 19382 | case 1574: /* ieee_minv16sf3_mask_round */ |
| 19383 | case 1573: /* ieee_minv16sf3_mask */ |
| 19384 | case 1572: /* ieee_minv16sf3_round */ |
| 19385 | case 1571: /* ieee_minv16sf3 */ |
| 19386 | case 1570: /* ieee_maxv16sf3_mask_round */ |
| 19387 | case 1569: /* ieee_maxv16sf3_mask */ |
| 19388 | case 1568: /* ieee_maxv16sf3_round */ |
| 19389 | case 1567: /* ieee_maxv16sf3 */ |
| 19390 | case 1566: /* *sminv2df3_mask_round */ |
| 19391 | case 1565: /* *sminv2df3_mask */ |
| 19392 | case 1564: /* *sminv2df3_round */ |
| 19393 | case 1563: /* *sminv2df3 */ |
| 19394 | case 1562: /* *smaxv2df3_mask_round */ |
| 19395 | case 1561: /* *smaxv2df3_mask */ |
| 19396 | case 1560: /* *smaxv2df3_round */ |
| 19397 | case 1559: /* *smaxv2df3 */ |
| 19398 | case 1558: /* *sminv4df3_mask_round */ |
| 19399 | case 1557: /* *sminv4df3_mask */ |
| 19400 | case 1556: /* *sminv4df3_round */ |
| 19401 | case 1555: /* *sminv4df3 */ |
| 19402 | case 1554: /* *smaxv4df3_mask_round */ |
| 19403 | case 1553: /* *smaxv4df3_mask */ |
| 19404 | case 1552: /* *smaxv4df3_round */ |
| 19405 | case 1551: /* *smaxv4df3 */ |
| 19406 | case 1550: /* *sminv8df3_mask_round */ |
| 19407 | case 1549: /* *sminv8df3_mask */ |
| 19408 | case 1548: /* *sminv8df3_round */ |
| 19409 | case 1547: /* *sminv8df3 */ |
| 19410 | case 1546: /* *smaxv8df3_mask_round */ |
| 19411 | case 1545: /* *smaxv8df3_mask */ |
| 19412 | case 1544: /* *smaxv8df3_round */ |
| 19413 | case 1543: /* *smaxv8df3 */ |
| 19414 | case 1542: /* *sminv4sf3_mask_round */ |
| 19415 | case 1541: /* *sminv4sf3_mask */ |
| 19416 | case 1540: /* *sminv4sf3_round */ |
| 19417 | case 1539: /* *sminv4sf3 */ |
| 19418 | case 1538: /* *smaxv4sf3_mask_round */ |
| 19419 | case 1537: /* *smaxv4sf3_mask */ |
| 19420 | case 1536: /* *smaxv4sf3_round */ |
| 19421 | case 1535: /* *smaxv4sf3 */ |
| 19422 | case 1534: /* *sminv8sf3_mask_round */ |
| 19423 | case 1533: /* *sminv8sf3_mask */ |
| 19424 | case 1532: /* *sminv8sf3_round */ |
| 19425 | case 1531: /* *sminv8sf3 */ |
| 19426 | case 1530: /* *smaxv8sf3_mask_round */ |
| 19427 | case 1529: /* *smaxv8sf3_mask */ |
| 19428 | case 1528: /* *smaxv8sf3_round */ |
| 19429 | case 1527: /* *smaxv8sf3 */ |
| 19430 | case 1526: /* *sminv16sf3_mask_round */ |
| 19431 | case 1525: /* *sminv16sf3_mask */ |
| 19432 | case 1524: /* *sminv16sf3_round */ |
| 19433 | case 1523: /* *sminv16sf3 */ |
| 19434 | case 1522: /* *smaxv16sf3_mask_round */ |
| 19435 | case 1521: /* *smaxv16sf3_mask */ |
| 19436 | case 1520: /* *smaxv16sf3_round */ |
| 19437 | case 1519: /* *smaxv16sf3 */ |
| 19438 | case 1416: /* sse2_vmsubv2df3_round */ |
| 19439 | case 1415: /* sse2_vmsubv2df3 */ |
| 19440 | case 1414: /* sse2_vmaddv2df3_round */ |
| 19441 | case 1413: /* sse2_vmaddv2df3 */ |
| 19442 | case 1412: /* sse_vmsubv4sf3_round */ |
| 19443 | case 1411: /* sse_vmsubv4sf3 */ |
| 19444 | case 1410: /* sse_vmaddv4sf3_round */ |
| 19445 | case 1409: /* sse_vmaddv4sf3 */ |
| 19446 | case 1408: /* *subv2df3_mask_round */ |
| 19447 | case 1407: /* *subv2df3_mask */ |
| 19448 | case 1406: /* *subv2df3_round */ |
| 19449 | case 1405: /* *subv2df3 */ |
| 19450 | case 1404: /* *addv2df3_mask_round */ |
| 19451 | case 1403: /* *addv2df3_mask */ |
| 19452 | case 1402: /* *addv2df3_round */ |
| 19453 | case 1401: /* *addv2df3 */ |
| 19454 | case 1400: /* *subv4df3_mask_round */ |
| 19455 | case 1399: /* *subv4df3_mask */ |
| 19456 | case 1398: /* *subv4df3_round */ |
| 19457 | case 1397: /* *subv4df3 */ |
| 19458 | case 1396: /* *addv4df3_mask_round */ |
| 19459 | case 1395: /* *addv4df3_mask */ |
| 19460 | case 1394: /* *addv4df3_round */ |
| 19461 | case 1393: /* *addv4df3 */ |
| 19462 | case 1392: /* *subv8df3_mask_round */ |
| 19463 | case 1391: /* *subv8df3_mask */ |
| 19464 | case 1390: /* *subv8df3_round */ |
| 19465 | case 1389: /* *subv8df3 */ |
| 19466 | case 1388: /* *addv8df3_mask_round */ |
| 19467 | case 1387: /* *addv8df3_mask */ |
| 19468 | case 1386: /* *addv8df3_round */ |
| 19469 | case 1385: /* *addv8df3 */ |
| 19470 | case 1384: /* *subv4sf3_mask_round */ |
| 19471 | case 1383: /* *subv4sf3_mask */ |
| 19472 | case 1382: /* *subv4sf3_round */ |
| 19473 | case 1381: /* *subv4sf3 */ |
| 19474 | case 1380: /* *addv4sf3_mask_round */ |
| 19475 | case 1379: /* *addv4sf3_mask */ |
| 19476 | case 1378: /* *addv4sf3_round */ |
| 19477 | case 1377: /* *addv4sf3 */ |
| 19478 | case 1376: /* *subv8sf3_mask_round */ |
| 19479 | case 1375: /* *subv8sf3_mask */ |
| 19480 | case 1374: /* *subv8sf3_round */ |
| 19481 | case 1373: /* *subv8sf3 */ |
| 19482 | case 1372: /* *addv8sf3_mask_round */ |
| 19483 | case 1371: /* *addv8sf3_mask */ |
| 19484 | case 1370: /* *addv8sf3_round */ |
| 19485 | case 1369: /* *addv8sf3 */ |
| 19486 | case 1368: /* *subv16sf3_mask_round */ |
| 19487 | case 1367: /* *subv16sf3_mask */ |
| 19488 | case 1366: /* *subv16sf3_round */ |
| 19489 | case 1365: /* *subv16sf3 */ |
| 19490 | case 1364: /* *addv16sf3_mask_round */ |
| 19491 | case 1363: /* *addv16sf3_mask */ |
| 19492 | case 1362: /* *addv16sf3_round */ |
| 19493 | case 1361: /* *addv16sf3 */ |
| 19494 | case 992: /* *ieee_smindf3 */ |
| 19495 | case 991: /* *ieee_smaxdf3 */ |
| 19496 | case 990: /* *ieee_sminsf3 */ |
| 19497 | case 989: /* *ieee_smaxsf3 */ |
| 19498 | case 988: /* smindf3 */ |
| 19499 | case 987: /* smaxdf3 */ |
| 19500 | case 986: /* sminsf3 */ |
| 19501 | case 985: /* smaxsf3 */ |
| 19502 | case 626: /* setcc_df_sse */ |
| 19503 | case 625: /* setcc_sf_sse */ |
| 19504 | if (((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) || (cached_memory == MEMORY_LOAD)) |
| 19505 | { |
| 19506 | return 3; |
| 19507 | } |
| 19508 | else |
| 19509 | { |
| 19510 | return 0; |
| 19511 | } |
| 19512 | |
| 19513 | case 624: /* *setcc_qi_slp */ |
| 19514 | case 623: /* *setcc_qi */ |
| 19515 | if (((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) || (cached_memory == MEMORY_STORE)) |
| 19516 | { |
| 19517 | return 1; |
| 19518 | } |
| 19519 | else |
| 19520 | { |
| 19521 | return 0; |
| 19522 | } |
| 19523 | |
| 19524 | case 602: /* *rotrsi3_1_zext */ |
| 19525 | case 601: /* *rotlsi3_1_zext */ |
| 19526 | case 599: /* *rotrdi3_1 */ |
| 19527 | case 598: /* *rotldi3_1 */ |
| 19528 | case 597: /* *rotrsi3_1 */ |
| 19529 | case 596: /* *rotlsi3_1 */ |
| 19530 | case 561: /* *ashrsi3_1_zext */ |
| 19531 | case 560: /* *lshrsi3_1_zext */ |
| 19532 | case 557: /* *ashrdi3_1 */ |
| 19533 | case 556: /* *lshrdi3_1 */ |
| 19534 | case 555: /* *ashrsi3_1 */ |
| 19535 | case 554: /* *lshrsi3_1 */ |
| 19536 | extract_constrain_insn_cached (insn); |
| 19537 | if (((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) && (which_alternative == 0)) |
| 19538 | { |
| 19539 | return 1; |
| 19540 | } |
| 19541 | else if ((! (cached_memory == MEMORY_NONE)) && (which_alternative == 0)) |
| 19542 | { |
| 19543 | return 4; |
| 19544 | } |
| 19545 | else |
| 19546 | { |
| 19547 | return 0; |
| 19548 | } |
| 19549 | |
| 19550 | case 608: /* *rotrqi3_1_slp */ |
| 19551 | case 607: /* *rotlqi3_1_slp */ |
| 19552 | case 606: /* *rotrhi3_1 */ |
| 19553 | case 605: /* *rotlhi3_1 */ |
| 19554 | case 604: /* *rotrqi3_1 */ |
| 19555 | case 603: /* *rotlqi3_1 */ |
| 19556 | case 585: /* *ashrdi3_cconly */ |
| 19557 | case 584: /* *lshrdi3_cconly */ |
| 19558 | case 583: /* *ashrsi3_cconly */ |
| 19559 | case 582: /* *lshrsi3_cconly */ |
| 19560 | case 581: /* *ashrhi3_cconly */ |
| 19561 | case 580: /* *lshrhi3_cconly */ |
| 19562 | case 579: /* *ashrqi3_cconly */ |
| 19563 | case 578: /* *lshrqi3_cconly */ |
| 19564 | case 577: /* *ashrsi3_cmp_zext */ |
| 19565 | case 576: /* *lshrsi3_cmp_zext */ |
| 19566 | case 575: /* *ashrdi3_cmp */ |
| 19567 | case 574: /* *lshrdi3_cmp */ |
| 19568 | case 573: /* *ashrsi3_cmp */ |
| 19569 | case 572: /* *lshrsi3_cmp */ |
| 19570 | case 571: /* *ashrhi3_cmp */ |
| 19571 | case 570: /* *lshrhi3_cmp */ |
| 19572 | case 569: /* *ashrqi3_cmp */ |
| 19573 | case 568: /* *lshrqi3_cmp */ |
| 19574 | case 567: /* *ashrqi3_1_slp */ |
| 19575 | case 566: /* *lshrqi3_1_slp */ |
| 19576 | case 565: /* *ashrhi3_1 */ |
| 19577 | case 564: /* *lshrhi3_1 */ |
| 19578 | case 563: /* *ashrqi3_1 */ |
| 19579 | case 562: /* *lshrqi3_1 */ |
| 19580 | case 546: /* x86_shrd */ |
| 19581 | case 545: /* x86_64_shrd */ |
| 19582 | case 516: /* x86_shld */ |
| 19583 | case 515: /* x86_64_shld */ |
| 19584 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) |
| 19585 | { |
| 19586 | return 1; |
| 19587 | } |
| 19588 | else |
| 19589 | { |
| 19590 | return 4; |
| 19591 | } |
| 19592 | |
| 19593 | case 386: /* udivmodhiqi3 */ |
| 19594 | case 375: /* divmodhiqi3 */ |
| 19595 | if (((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) || (cached_memory == MEMORY_LOAD)) |
| 19596 | { |
| 19597 | return 19 /* 0x13 */; |
| 19598 | } |
| 19599 | else |
| 19600 | { |
| 19601 | return 0; |
| 19602 | } |
| 19603 | |
| 19604 | case 384: /* *udivmodsi4_noext */ |
| 19605 | case 373: /* *divmodsi4_noext */ |
| 19606 | if (((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) || (cached_memory == MEMORY_LOAD)) |
| 19607 | { |
| 19608 | return 39 /* 0x27 */; |
| 19609 | } |
| 19610 | else |
| 19611 | { |
| 19612 | return 0; |
| 19613 | } |
| 19614 | |
| 19615 | case 383: /* *udivmodhi4_noext */ |
| 19616 | case 372: /* *divmodhi4_noext */ |
| 19617 | if (((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) || (cached_memory == MEMORY_LOAD)) |
| 19618 | { |
| 19619 | return 23 /* 0x17 */; |
| 19620 | } |
| 19621 | else |
| 19622 | { |
| 19623 | return 0; |
| 19624 | } |
| 19625 | |
| 19626 | case 356: /* *umulditi3_1 */ |
| 19627 | extract_constrain_insn_cached (insn); |
| 19628 | if (which_alternative == 1) |
| 19629 | { |
| 19630 | return 5; |
| 19631 | } |
| 19632 | else |
| 19633 | { |
| 19634 | return 0; |
| 19635 | } |
| 19636 | |
| 19637 | case 355: /* *umulsidi3_1 */ |
| 19638 | extract_constrain_insn_cached (insn); |
| 19639 | if (which_alternative == 1) |
| 19640 | { |
| 19641 | return 3; |
| 19642 | } |
| 19643 | else |
| 19644 | { |
| 19645 | return 0; |
| 19646 | } |
| 19647 | |
| 19648 | case 4926: /* mfence_sse2 */ |
| 19649 | case 4925: /* *sse_sfence */ |
| 19650 | case 4924: /* *sse2_lfence */ |
| 19651 | case 3674: /* sse2_clflush */ |
| 19652 | case 2224: /* sse2_cvttsd2si_round */ |
| 19653 | case 2223: /* sse2_cvttsd2si */ |
| 19654 | case 2219: /* sse2_cvtsd2si_2 */ |
| 19655 | case 2218: /* sse2_cvtsd2si_round */ |
| 19656 | case 2217: /* sse2_cvtsd2si */ |
| 19657 | case 2214: /* avx512f_vcvttsd2usi_round */ |
| 19658 | case 2213: /* avx512f_vcvttsd2usi */ |
| 19659 | case 2210: /* avx512f_vcvtsd2usi_round */ |
| 19660 | case 2209: /* avx512f_vcvtsd2usi */ |
| 19661 | case 2206: /* avx512f_vcvttss2usi_round */ |
| 19662 | case 2205: /* avx512f_vcvttss2usi */ |
| 19663 | case 2202: /* avx512f_vcvtss2usi_round */ |
| 19664 | case 2201: /* avx512f_vcvtss2usi */ |
| 19665 | case 2117: /* sse_cvttss2si_round */ |
| 19666 | case 2116: /* sse_cvttss2si */ |
| 19667 | case 2112: /* sse_cvtss2si_2 */ |
| 19668 | case 2111: /* sse_cvtss2si_round */ |
| 19669 | case 2110: /* sse_cvtss2si */ |
| 19670 | case 1606: /* sse2_vmsminv2df3_round */ |
| 19671 | case 1605: /* sse2_vmsminv2df3 */ |
| 19672 | case 1604: /* sse2_vmsmaxv2df3_round */ |
| 19673 | case 1603: /* sse2_vmsmaxv2df3 */ |
| 19674 | case 1602: /* sse_vmsminv4sf3_round */ |
| 19675 | case 1601: /* sse_vmsminv4sf3 */ |
| 19676 | case 1600: /* sse_vmsmaxv4sf3_round */ |
| 19677 | case 1599: /* sse_vmsmaxv4sf3 */ |
| 19678 | case 1518: /* sse_vmrsqrtv4sf2 */ |
| 19679 | case 1501: /* sse2_vmsqrtv2df2_round */ |
| 19680 | case 1500: /* sse2_vmsqrtv2df2 */ |
| 19681 | case 1499: /* sse_vmsqrtv4sf2_round */ |
| 19682 | case 1498: /* sse_vmsqrtv4sf2 */ |
| 19683 | case 1467: /* sse_vmrcpv4sf2 */ |
| 19684 | case 1081: /* clflushopt */ |
| 19685 | case 1080: /* clwb */ |
| 19686 | case 847: /* *sqrtdf2_sse */ |
| 19687 | case 846: /* *sqrtsf2_sse */ |
| 19688 | case 845: /* *rsqrtsf2_sse */ |
| 19689 | case 814: /* *rcpsf2_sse */ |
| 19690 | case 366: /* *umulsi3_highpart_1 */ |
| 19691 | case 365: /* *smulsi3_highpart_1 */ |
| 19692 | case 364: /* *umulsi3_highpart_zext */ |
| 19693 | case 363: /* *smulsi3_highpart_zext */ |
| 19694 | case 357: /* *mulsidi3_1 */ |
| 19695 | case 349: /* *umulvsi4 */ |
| 19696 | case 348: /* *umulvhi4 */ |
| 19697 | case 346: /* *mulvsi4_1 */ |
| 19698 | case 345: /* *mulvhi4_1 */ |
| 19699 | case 344: /* *mulvhi4 */ |
| 19700 | case 342: /* *mulvsi4 */ |
| 19701 | case 340: /* *mulsi3_1_zext */ |
| 19702 | case 338: /* *mulsi3_1 */ |
| 19703 | case 337: /* *mulhi3_1 */ |
| 19704 | return 3; |
| 19705 | |
| 19706 | case 202: /* *floatdidf2_mixed */ |
| 19707 | case 201: /* *floatsidf2_mixed */ |
| 19708 | case 200: /* *floatdisf2_mixed */ |
| 19709 | case 199: /* *floatsisf2_mixed */ |
| 19710 | extract_constrain_insn_cached (insn); |
| 19711 | if (((((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) || (cached_memory == MEMORY_LOAD)) || (cached_memory == MEMORY_STORE)) && (which_alternative == 0)) |
| 19712 | { |
| 19713 | return 1; |
| 19714 | } |
| 19715 | else if (which_alternative != 0) |
| 19716 | { |
| 19717 | return 4; |
| 19718 | } |
| 19719 | else |
| 19720 | { |
| 19721 | return 0; |
| 19722 | } |
| 19723 | |
| 19724 | case 198: /* floatdixf2 */ |
| 19725 | case 197: /* floatsixf2 */ |
| 19726 | case 196: /* floathixf2 */ |
| 19727 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) |
| 19728 | { |
| 19729 | return 1; |
| 19730 | } |
| 19731 | else if ((cached_memory == MEMORY_LOAD) || (cached_memory == MEMORY_STORE)) |
| 19732 | { |
| 19733 | return 3; |
| 19734 | } |
| 19735 | else |
| 19736 | { |
| 19737 | return 0; |
| 19738 | } |
| 19739 | |
| 19740 | case 927: /* fistsi2_ceil_with_temp */ |
| 19741 | case 926: /* fistsi2_floor_with_temp */ |
| 19742 | case 925: /* fisthi2_ceil_with_temp */ |
| 19743 | case 924: /* fisthi2_floor_with_temp */ |
| 19744 | case 923: /* fistsi2_ceil */ |
| 19745 | case 922: /* fistsi2_floor */ |
| 19746 | case 921: /* fisthi2_ceil */ |
| 19747 | case 920: /* fisthi2_floor */ |
| 19748 | case 919: /* fistdi2_ceil_with_temp */ |
| 19749 | case 918: /* fistdi2_floor_with_temp */ |
| 19750 | case 917: /* fistdi2_ceil */ |
| 19751 | case 916: /* fistdi2_floor */ |
| 19752 | case 915: /* *fistdi2_ceil_1 */ |
| 19753 | case 914: /* *fistdi2_floor_1 */ |
| 19754 | case 913: /* *fistsi2_ceil_1 */ |
| 19755 | case 912: /* *fistsi2_floor_1 */ |
| 19756 | case 911: /* *fisthi2_ceil_1 */ |
| 19757 | case 910: /* *fisthi2_floor_1 */ |
| 19758 | case 362: /* *umuldi3_highpart_1 */ |
| 19759 | case 361: /* *smuldi3_highpart_1 */ |
| 19760 | case 358: /* *mulditi3_1 */ |
| 19761 | case 350: /* *umulvdi4 */ |
| 19762 | case 347: /* *mulvdi4_1 */ |
| 19763 | case 343: /* *mulvdi4 */ |
| 19764 | case 339: /* *muldi3_1 */ |
| 19765 | case 191: /* fix_truncsi_i387_with_temp */ |
| 19766 | case 190: /* fix_trunchi_i387_with_temp */ |
| 19767 | case 189: /* fix_truncsi_i387 */ |
| 19768 | case 188: /* fix_trunchi_i387 */ |
| 19769 | case 187: /* fix_truncdi_i387_with_temp */ |
| 19770 | case 186: /* fix_truncdi_i387 */ |
| 19771 | case 185: /* *fix_truncdi_i387_1 */ |
| 19772 | case 184: /* *fix_truncsi_i387_1 */ |
| 19773 | case 183: /* *fix_trunchi_i387_1 */ |
| 19774 | return 5; |
| 19775 | |
| 19776 | case 163: /* *truncxfdf2_mixed */ |
| 19777 | case 162: /* *truncxfsf2_mixed */ |
| 19778 | case 160: /* *truncdfsf_i387 */ |
| 19779 | extract_constrain_insn_cached (insn); |
| 19780 | if (which_alternative != 0) |
| 19781 | { |
| 19782 | return 6; |
| 19783 | } |
| 19784 | else if ((((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) || (cached_memory == MEMORY_LOAD)) || (cached_memory == MEMORY_STORE)) |
| 19785 | { |
| 19786 | return 1; |
| 19787 | } |
| 19788 | else |
| 19789 | { |
| 19790 | return 0; |
| 19791 | } |
| 19792 | |
| 19793 | case 159: /* *truncdfsf_mixed */ |
| 19794 | extract_constrain_insn_cached (insn); |
| 19795 | if (!((1 << which_alternative) & 0x3)) |
| 19796 | { |
| 19797 | return 6; |
| 19798 | } |
| 19799 | else if (((((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) || (cached_memory == MEMORY_LOAD)) || (cached_memory == MEMORY_STORE)) && (which_alternative == 0)) |
| 19800 | { |
| 19801 | return 1; |
| 19802 | } |
| 19803 | else |
| 19804 | { |
| 19805 | return 0; |
| 19806 | } |
| 19807 | |
| 19808 | case 4935: /* storedi_via_fpu */ |
| 19809 | case 4934: /* loaddi_via_fpu */ |
| 19810 | case 841: /* truncxfdf2_i387_noop_unspec */ |
| 19811 | case 840: /* truncxfsf2_i387_noop_unspec */ |
| 19812 | case 206: /* *floatdidf2_i387 */ |
| 19813 | case 205: /* *floatdisf2_i387 */ |
| 19814 | case 204: /* *floatsidf2_i387 */ |
| 19815 | case 203: /* *floatsisf2_i387 */ |
| 19816 | case 195: /* floathidf2 */ |
| 19817 | case 194: /* floathisf2 */ |
| 19818 | case 167: /* *truncxfdf2_i387 */ |
| 19819 | case 166: /* *truncxfsf2_i387 */ |
| 19820 | case 165: /* truncxfdf2_i387_noop */ |
| 19821 | case 164: /* truncxfsf2_i387_noop */ |
| 19822 | case 161: /* *truncdfsf2_i387_1 */ |
| 19823 | case 158: /* *truncdfsf_fast_i387 */ |
| 19824 | if (((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) || (cached_memory == MEMORY_LOAD) || (cached_memory == MEMORY_STORE)) |
| 19825 | { |
| 19826 | return 1; |
| 19827 | } |
| 19828 | else |
| 19829 | { |
| 19830 | return 0; |
| 19831 | } |
| 19832 | |
| 19833 | case 157: /* *truncdfsf_fast_mixed */ |
| 19834 | extract_constrain_insn_cached (insn); |
| 19835 | if (((((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) || (cached_memory == MEMORY_LOAD)) || (cached_memory == MEMORY_STORE)) && (which_alternative == 0)) |
| 19836 | { |
| 19837 | return 1; |
| 19838 | } |
| 19839 | else |
| 19840 | { |
| 19841 | return 0; |
| 19842 | } |
| 19843 | |
| 19844 | case 139: /* *zero_extendqihi2 */ |
| 19845 | case 137: /* *zero_extendhisi2 */ |
| 19846 | case 136: /* *zero_extendqisi2 */ |
| 19847 | case 133: /* zero_extendhidi2 */ |
| 19848 | case 132: /* zero_extendqidi2 */ |
| 19849 | extract_constrain_insn_cached (insn); |
| 19850 | if (((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) && (which_alternative == 0)) |
| 19851 | { |
| 19852 | return 1; |
| 19853 | } |
| 19854 | else if ((cached_memory == MEMORY_LOAD) && (which_alternative == 0)) |
| 19855 | { |
| 19856 | return 4; |
| 19857 | } |
| 19858 | else |
| 19859 | { |
| 19860 | return 0; |
| 19861 | } |
| 19862 | |
| 19863 | case 123: /* *pushsf */ |
| 19864 | case 122: /* *pushsf_rex64 */ |
| 19865 | extract_constrain_insn_cached (insn); |
| 19866 | if (which_alternative != 1) |
| 19867 | { |
| 19868 | return 6; |
| 19869 | } |
| 19870 | else if (((cached_memory = get_attr_memory (insn)) == MEMORY_STORE) || (cached_memory == MEMORY_BOTH)) |
| 19871 | { |
| 19872 | return 1; |
| 19873 | } |
| 19874 | else |
| 19875 | { |
| 19876 | return 0; |
| 19877 | } |
| 19878 | |
| 19879 | case 1102: /* move_size_reloc_di */ |
| 19880 | case 1101: /* move_size_reloc_si */ |
| 19881 | case 701: /* set_got_offset_rex64 */ |
| 19882 | case 116: /* *insvqi_3 */ |
| 19883 | case 115: /* *insvqi_3 */ |
| 19884 | case 114: /* *insvqi_2 */ |
| 19885 | case 113: /* *insvqi_2 */ |
| 19886 | case 112: /* *insvqi_1 */ |
| 19887 | case 111: /* *insvqi_1_mem_rex64 */ |
| 19888 | case 110: /* insvdi_1 */ |
| 19889 | case 109: /* insvsi_1 */ |
| 19890 | case 108: /* insvhi_1 */ |
| 19891 | case 106: /* *extzvqi_mem_rex64 */ |
| 19892 | case 98: /* *movstricthi_1 */ |
| 19893 | case 97: /* *movstrictqi_1 */ |
| 19894 | case 96: /* *swaphi */ |
| 19895 | case 95: /* *swapqi */ |
| 19896 | case 94: /* *swapdi */ |
| 19897 | case 93: /* *swapsi */ |
| 19898 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) |
| 19899 | { |
| 19900 | return 1; |
| 19901 | } |
| 19902 | else if (cached_memory == MEMORY_LOAD) |
| 19903 | { |
| 19904 | return 4; |
| 19905 | } |
| 19906 | else if (cached_memory == MEMORY_STORE) |
| 19907 | { |
| 19908 | return 1; |
| 19909 | } |
| 19910 | else |
| 19911 | { |
| 19912 | return 0; |
| 19913 | } |
| 19914 | |
| 19915 | case 4803: /* avx512dq_vmfpclassv4sf */ |
| 19916 | case 4796: /* avx512dq_fpclassv4sf_mask */ |
| 19917 | case 4795: /* avx512dq_fpclassv4sf */ |
| 19918 | case 4788: /* avx512dq_rangesv4sf_round */ |
| 19919 | case 4787: /* avx512dq_rangesv4sf */ |
| 19920 | case 4778: /* avx512dq_rangepv4sf_mask */ |
| 19921 | case 4777: /* avx512dq_rangepv4sf */ |
| 19922 | case 3950: /* avx512er_vmrsqrt28v4sf_round */ |
| 19923 | case 3949: /* avx512er_vmrsqrt28v4sf */ |
| 19924 | case 3938: /* avx512er_vmrcp28v4sf_round */ |
| 19925 | case 3937: /* avx512er_vmrcp28v4sf */ |
| 19926 | case 2441: /* sse3_movsldup_mask */ |
| 19927 | case 2440: /* sse3_movsldup */ |
| 19928 | case 2435: /* sse3_movshdup_mask */ |
| 19929 | case 2434: /* sse3_movshdup */ |
| 19930 | case 2200: /* sse2_cvtsi2sdq_round */ |
| 19931 | case 2199: /* sse2_cvtsi2sdq */ |
| 19932 | case 2198: /* sse2_cvtsi2sd */ |
| 19933 | case 2126: /* cvtusi2sd64_round */ |
| 19934 | case 2125: /* cvtusi2sd64 */ |
| 19935 | case 2124: /* cvtusi2ss64_round */ |
| 19936 | case 2123: /* cvtusi2ss64 */ |
| 19937 | case 2122: /* cvtusi2sd32 */ |
| 19938 | case 2121: /* cvtusi2ss32_round */ |
| 19939 | case 2120: /* cvtusi2ss32 */ |
| 19940 | case 2109: /* sse_cvtsi2ssq_round */ |
| 19941 | case 2108: /* sse_cvtsi2ssq */ |
| 19942 | case 2107: /* sse_cvtsi2ss_round */ |
| 19943 | case 2106: /* sse_cvtsi2ss */ |
| 19944 | case 1633: /* reducesv4sf */ |
| 19945 | case 1626: /* reducepv4sf_mask */ |
| 19946 | case 1625: /* *reducepv4sf */ |
| 19947 | case 1516: /* rsqrt14v4sf */ |
| 19948 | case 1509: /* rsqrt14v4sf_mask */ |
| 19949 | case 1508: /* *rsqrt14v4sf */ |
| 19950 | case 1503: /* sse_rsqrtv4sf2 */ |
| 19951 | case 1489: /* sse_sqrtv4sf2_mask */ |
| 19952 | case 1488: /* sse_sqrtv4sf2 */ |
| 19953 | case 1480: /* srcp14v4sf */ |
| 19954 | case 1473: /* rcp14v4sf_mask */ |
| 19955 | case 1472: /* *rcp14v4sf */ |
| 19956 | case 1466: /* sse_rcpv4sf2 */ |
| 19957 | case 1215: /* *mmx_maskmovq */ |
| 19958 | case 1214: /* *mmx_maskmovq */ |
| 19959 | case 1213: /* mmx_pmovmskb */ |
| 19960 | case 1205: /* *vec_dupv2si */ |
| 19961 | case 1204: /* *vec_dupv4hi */ |
| 19962 | case 1203: /* mmx_pswapdv2si2 */ |
| 19963 | case 1202: /* mmx_pshufw_1 */ |
| 19964 | case 1201: /* mmx_pextrw */ |
| 19965 | case 1200: /* *mmx_pinsrw */ |
| 19966 | case 1199: /* mmx_punpckldq */ |
| 19967 | case 1198: /* mmx_punpckhdq */ |
| 19968 | case 1197: /* mmx_punpcklwd */ |
| 19969 | case 1196: /* mmx_punpckhwd */ |
| 19970 | case 1195: /* mmx_punpcklbw */ |
| 19971 | case 1194: /* mmx_punpckhbw */ |
| 19972 | case 1135: /* *vec_dupv2sf */ |
| 19973 | case 805: /* *add_tp_di */ |
| 19974 | case 804: /* *add_tp_si */ |
| 19975 | case 803: /* *add_tp_x32_zext */ |
| 19976 | case 802: /* *add_tp_x32 */ |
| 19977 | case 801: /* *load_tp_di */ |
| 19978 | case 800: /* *load_tp_si */ |
| 19979 | case 799: /* *load_tp_x32_zext */ |
| 19980 | case 798: /* *load_tp_x32 */ |
| 19981 | case 704: /* leave_rex64 */ |
| 19982 | case 703: /* leave */ |
| 19983 | case 173: /* fix_truncdfdi_sse */ |
| 19984 | case 172: /* fix_truncdfsi_sse */ |
| 19985 | case 171: /* fix_truncsfdi_sse */ |
| 19986 | case 170: /* fix_truncsfsi_sse */ |
| 19987 | case 92: /* *movabsdi_2 */ |
| 19988 | case 91: /* *movabssi_2 */ |
| 19989 | case 90: /* *movabshi_2 */ |
| 19990 | case 89: /* *movabsqi_2 */ |
| 19991 | return 4; |
| 19992 | |
| 19993 | case 4758: /* avx512vl_compressstorev2df_mask */ |
| 19994 | case 4757: /* avx512vl_compressstorev2di_mask */ |
| 19995 | case 4756: /* avx512vl_compressstorev4sf_mask */ |
| 19996 | case 4755: /* avx512vl_compressstorev4si_mask */ |
| 19997 | case 4754: /* avx512vl_compressstorev4df_mask */ |
| 19998 | case 4753: /* avx512vl_compressstorev4di_mask */ |
| 19999 | case 4752: /* avx512vl_compressstorev8sf_mask */ |
| 20000 | case 4751: /* avx512vl_compressstorev8si_mask */ |
| 20001 | case 4750: /* avx512f_compressstorev8df_mask */ |
| 20002 | case 4749: /* avx512f_compressstorev8di_mask */ |
| 20003 | case 4748: /* avx512f_compressstorev16sf_mask */ |
| 20004 | case 4747: /* avx512f_compressstorev16si_mask */ |
| 20005 | case 2933: /* avx512f_us_truncatev8div16qi2_mask_store */ |
| 20006 | case 2932: /* avx512f_truncatev8div16qi2_mask_store */ |
| 20007 | case 2931: /* avx512f_ss_truncatev8div16qi2_mask_store */ |
| 20008 | case 2924: /* *avx512f_us_truncatev8div16qi2_store */ |
| 20009 | case 2923: /* *avx512f_truncatev8div16qi2_store */ |
| 20010 | case 2922: /* *avx512f_ss_truncatev8div16qi2_store */ |
| 20011 | case 2918: /* avx512vl_us_truncatev2div2si2_mask_store */ |
| 20012 | case 2917: /* avx512vl_truncatev2div2si2_mask_store */ |
| 20013 | case 2916: /* avx512vl_ss_truncatev2div2si2_mask_store */ |
| 20014 | case 2909: /* *avx512vl_us_truncatev2div2si2_store */ |
| 20015 | case 2908: /* *avx512vl_truncatev2div2si2_store */ |
| 20016 | case 2907: /* *avx512vl_ss_truncatev2div2si2_store */ |
| 20017 | case 2903: /* avx512vl_us_truncatev2div2hi2_mask_store */ |
| 20018 | case 2902: /* avx512vl_truncatev2div2hi2_mask_store */ |
| 20019 | case 2901: /* avx512vl_ss_truncatev2div2hi2_mask_store */ |
| 20020 | case 2894: /* *avx512vl_us_truncatev2div2hi2_store */ |
| 20021 | case 2893: /* *avx512vl_truncatev2div2hi2_store */ |
| 20022 | case 2892: /* *avx512vl_ss_truncatev2div2hi2_store */ |
| 20023 | case 2891: /* avx512vl_us_truncatev4div4hi2_mask_store */ |
| 20024 | case 2890: /* avx512vl_truncatev4div4hi2_mask_store */ |
| 20025 | case 2889: /* avx512vl_ss_truncatev4div4hi2_mask_store */ |
| 20026 | case 2888: /* avx512vl_us_truncatev4siv4hi2_mask_store */ |
| 20027 | case 2887: /* avx512vl_truncatev4siv4hi2_mask_store */ |
| 20028 | case 2886: /* avx512vl_ss_truncatev4siv4hi2_mask_store */ |
| 20029 | case 2873: /* *avx512vl_us_truncatev4div4hi2_store */ |
| 20030 | case 2872: /* *avx512vl_truncatev4div4hi2_store */ |
| 20031 | case 2871: /* *avx512vl_ss_truncatev4div4hi2_store */ |
| 20032 | case 2870: /* *avx512vl_us_truncatev4siv4hi2_store */ |
| 20033 | case 2869: /* *avx512vl_truncatev4siv4hi2_store */ |
| 20034 | case 2868: /* *avx512vl_ss_truncatev4siv4hi2_store */ |
| 20035 | case 2858: /* avx512vl_us_truncatev8siv8qi2_mask_store */ |
| 20036 | case 2857: /* avx512vl_truncatev8siv8qi2_mask_store */ |
| 20037 | case 2856: /* avx512vl_ss_truncatev8siv8qi2_mask_store */ |
| 20038 | case 2855: /* avx512vl_us_truncatev8hiv8qi2_mask_store */ |
| 20039 | case 2854: /* avx512vl_truncatev8hiv8qi2_mask_store */ |
| 20040 | case 2853: /* avx512vl_ss_truncatev8hiv8qi2_mask_store */ |
| 20041 | case 2840: /* *avx512vl_us_truncatev8siv8qi2_store */ |
| 20042 | case 2839: /* *avx512vl_truncatev8siv8qi2_store */ |
| 20043 | case 2838: /* *avx512vl_ss_truncatev8siv8qi2_store */ |
| 20044 | case 2837: /* *avx512vl_us_truncatev8hiv8qi2_store */ |
| 20045 | case 2836: /* *avx512vl_truncatev8hiv8qi2_store */ |
| 20046 | case 2835: /* *avx512vl_ss_truncatev8hiv8qi2_store */ |
| 20047 | case 2834: /* avx512vl_us_truncatev4div4qi2_mask_store */ |
| 20048 | case 2833: /* avx512vl_truncatev4div4qi2_mask_store */ |
| 20049 | case 2832: /* avx512vl_ss_truncatev4div4qi2_mask_store */ |
| 20050 | case 2831: /* avx512vl_us_truncatev4siv4qi2_mask_store */ |
| 20051 | case 2830: /* avx512vl_truncatev4siv4qi2_mask_store */ |
| 20052 | case 2829: /* avx512vl_ss_truncatev4siv4qi2_mask_store */ |
| 20053 | case 2816: /* *avx512vl_us_truncatev4div4qi2_store */ |
| 20054 | case 2815: /* *avx512vl_truncatev4div4qi2_store */ |
| 20055 | case 2814: /* *avx512vl_ss_truncatev4div4qi2_store */ |
| 20056 | case 2813: /* *avx512vl_us_truncatev4siv4qi2_store */ |
| 20057 | case 2812: /* *avx512vl_truncatev4siv4qi2_store */ |
| 20058 | case 2811: /* *avx512vl_ss_truncatev4siv4qi2_store */ |
| 20059 | case 2810: /* avx512vl_us_truncatev2div2qi2_mask_store */ |
| 20060 | case 2809: /* avx512vl_truncatev2div2qi2_mask_store */ |
| 20061 | case 2808: /* avx512vl_ss_truncatev2div2qi2_mask_store */ |
| 20062 | case 2801: /* *avx512vl_us_truncatev2div2qi2_store */ |
| 20063 | case 2800: /* *avx512vl_truncatev2div2qi2_store */ |
| 20064 | case 2799: /* *avx512vl_ss_truncatev2div2qi2_store */ |
| 20065 | case 2783: /* avx512vl_us_truncatev16hiv16qi2_mask */ |
| 20066 | case 2782: /* avx512vl_truncatev16hiv16qi2_mask */ |
| 20067 | case 2781: /* avx512vl_ss_truncatev16hiv16qi2_mask */ |
| 20068 | case 2780: /* avx512vl_us_truncatev8siv8hi2_mask */ |
| 20069 | case 2779: /* avx512vl_truncatev8siv8hi2_mask */ |
| 20070 | case 2778: /* avx512vl_ss_truncatev8siv8hi2_mask */ |
| 20071 | case 2777: /* avx512vl_us_truncatev4div4si2_mask */ |
| 20072 | case 2776: /* avx512vl_truncatev4div4si2_mask */ |
| 20073 | case 2775: /* avx512vl_ss_truncatev4div4si2_mask */ |
| 20074 | case 2774: /* *avx512vl_us_truncatev16hiv16qi2 */ |
| 20075 | case 2773: /* *avx512vl_truncatev16hiv16qi2 */ |
| 20076 | case 2772: /* *avx512vl_ss_truncatev16hiv16qi2 */ |
| 20077 | case 2771: /* *avx512vl_us_truncatev8siv8hi2 */ |
| 20078 | case 2770: /* *avx512vl_truncatev8siv8hi2 */ |
| 20079 | case 2769: /* *avx512vl_ss_truncatev8siv8hi2 */ |
| 20080 | case 2768: /* *avx512vl_us_truncatev4div4si2 */ |
| 20081 | case 2767: /* *avx512vl_truncatev4div4si2 */ |
| 20082 | case 2766: /* *avx512vl_ss_truncatev4div4si2 */ |
| 20083 | case 2765: /* avx512bw_us_truncatev32hiv32qi2_mask */ |
| 20084 | case 2764: /* avx512bw_truncatev32hiv32qi2_mask */ |
| 20085 | case 2763: /* avx512bw_ss_truncatev32hiv32qi2_mask */ |
| 20086 | case 2762: /* avx512bw_us_truncatev32hiv32qi2 */ |
| 20087 | case 2761: /* avx512bw_truncatev32hiv32qi2 */ |
| 20088 | case 2760: /* avx512bw_ss_truncatev32hiv32qi2 */ |
| 20089 | case 2759: /* avx512f_us_truncatev8div8hi2_mask */ |
| 20090 | case 2758: /* avx512f_truncatev8div8hi2_mask */ |
| 20091 | case 2757: /* avx512f_ss_truncatev8div8hi2_mask */ |
| 20092 | case 2756: /* avx512f_us_truncatev8div8si2_mask */ |
| 20093 | case 2755: /* avx512f_truncatev8div8si2_mask */ |
| 20094 | case 2754: /* avx512f_ss_truncatev8div8si2_mask */ |
| 20095 | case 2753: /* avx512f_us_truncatev16siv16hi2_mask */ |
| 20096 | case 2752: /* avx512f_truncatev16siv16hi2_mask */ |
| 20097 | case 2751: /* avx512f_ss_truncatev16siv16hi2_mask */ |
| 20098 | case 2750: /* avx512f_us_truncatev16siv16qi2_mask */ |
| 20099 | case 2749: /* avx512f_truncatev16siv16qi2_mask */ |
| 20100 | case 2748: /* avx512f_ss_truncatev16siv16qi2_mask */ |
| 20101 | case 2747: /* *avx512f_us_truncatev8div8hi2 */ |
| 20102 | case 2746: /* *avx512f_truncatev8div8hi2 */ |
| 20103 | case 2745: /* *avx512f_ss_truncatev8div8hi2 */ |
| 20104 | case 2744: /* *avx512f_us_truncatev8div8si2 */ |
| 20105 | case 2743: /* *avx512f_truncatev8div8si2 */ |
| 20106 | case 2742: /* *avx512f_ss_truncatev8div8si2 */ |
| 20107 | case 2741: /* *avx512f_us_truncatev16siv16hi2 */ |
| 20108 | case 2740: /* *avx512f_truncatev16siv16hi2 */ |
| 20109 | case 2739: /* *avx512f_ss_truncatev16siv16hi2 */ |
| 20110 | case 2738: /* *avx512f_us_truncatev16siv16qi2 */ |
| 20111 | case 2737: /* *avx512f_truncatev16siv16qi2 */ |
| 20112 | case 2736: /* *avx512f_ss_truncatev16siv16qi2 */ |
| 20113 | case 1292: /* avx512vl_storev8hi_mask */ |
| 20114 | case 1291: /* avx512vl_storev16hi_mask */ |
| 20115 | case 1290: /* avx512bw_storev32hi_mask */ |
| 20116 | case 1289: /* avx512vl_storev32qi_mask */ |
| 20117 | case 1288: /* avx512vl_storev16qi_mask */ |
| 20118 | case 1287: /* avx512bw_storev64qi_mask */ |
| 20119 | case 1286: /* avx512vl_storev2df_mask */ |
| 20120 | case 1285: /* avx512vl_storev4df_mask */ |
| 20121 | case 1284: /* avx512f_storev8df_mask */ |
| 20122 | case 1283: /* avx512vl_storev4sf_mask */ |
| 20123 | case 1282: /* avx512vl_storev8sf_mask */ |
| 20124 | case 1281: /* avx512f_storev16sf_mask */ |
| 20125 | case 1280: /* avx512vl_storev2di_mask */ |
| 20126 | case 1279: /* avx512vl_storev4di_mask */ |
| 20127 | case 1278: /* avx512f_storev8di_mask */ |
| 20128 | case 1277: /* avx512vl_storev4si_mask */ |
| 20129 | case 1276: /* avx512vl_storev8si_mask */ |
| 20130 | case 1275: /* avx512f_storev16si_mask */ |
| 20131 | case 1217: /* *mmx_femms */ |
| 20132 | case 1216: /* *mmx_emms */ |
| 20133 | case 1007: /* *prefetch_3dnow */ |
| 20134 | case 974: /* *x86_movdicc_0_m1_neg */ |
| 20135 | case 973: /* *x86_movsicc_0_m1_neg */ |
| 20136 | case 972: /* *x86_movdicc_0_m1_se */ |
| 20137 | case 971: /* *x86_movsicc_0_m1_se */ |
| 20138 | case 970: /* *x86_movdicc_0_m1 */ |
| 20139 | case 969: /* *x86_movsicc_0_m1 */ |
| 20140 | case 810: /* *tls_dynamic_gnu2_call_64 */ |
| 20141 | case 809: /* *tls_dynamic_gnu2_lea_64 */ |
| 20142 | case 807: /* *tls_dynamic_gnu2_call_32 */ |
| 20143 | case 806: /* *tls_dynamic_gnu2_lea_32 */ |
| 20144 | case 700: /* set_rip_rex64 */ |
| 20145 | case 699: /* set_got_rex64 */ |
| 20146 | case 685: /* *sibcall_value_pop_memory */ |
| 20147 | case 684: /* *sibcall_value_pop */ |
| 20148 | case 683: /* *call_value_pop */ |
| 20149 | case 682: /* *sibcall_value_memory */ |
| 20150 | case 681: /* *sibcall_value_memory */ |
| 20151 | case 680: /* *sibcall_value */ |
| 20152 | case 679: /* *sibcall_value */ |
| 20153 | case 678: /* *sibcall_value_GOT_32 */ |
| 20154 | case 677: /* *call_value_got_x32 */ |
| 20155 | case 676: /* *call_value */ |
| 20156 | case 675: /* *call_value */ |
| 20157 | case 674: /* *sibcall_pop_memory */ |
| 20158 | case 673: /* *sibcall_pop */ |
| 20159 | case 672: /* *call_pop */ |
| 20160 | case 671: /* *sibcall_memory */ |
| 20161 | case 670: /* *sibcall_memory */ |
| 20162 | case 669: /* *sibcall */ |
| 20163 | case 668: /* *sibcall */ |
| 20164 | case 667: /* *sibcall_GOT_32 */ |
| 20165 | case 666: /* *call_got_x32 */ |
| 20166 | case 665: /* *call */ |
| 20167 | case 664: /* *call */ |
| 20168 | case 495: /* *negextenddfxf2 */ |
| 20169 | case 494: /* *absextenddfxf2 */ |
| 20170 | case 493: /* *negextendsfxf2 */ |
| 20171 | case 492: /* *absextendsfxf2 */ |
| 20172 | case 491: /* *negextendsfdf2 */ |
| 20173 | case 490: /* *absextendsfdf2 */ |
| 20174 | case 489: /* *negxf2_1 */ |
| 20175 | case 488: /* *absxf2_1 */ |
| 20176 | case 487: /* *negdf2_1 */ |
| 20177 | case 486: /* *absdf2_1 */ |
| 20178 | case 485: /* *negsf2_1 */ |
| 20179 | case 484: /* *abssf2_1 */ |
| 20180 | case 268: /* *leadi_general_4 */ |
| 20181 | case 267: /* *leadi_general_4 */ |
| 20182 | case 266: /* *leasi_general_4 */ |
| 20183 | case 265: /* *leasi_general_4 */ |
| 20184 | case 264: /* *leahi_general_4 */ |
| 20185 | case 263: /* *leahi_general_4 */ |
| 20186 | case 262: /* *leaqi_general_4 */ |
| 20187 | case 261: /* *leaqi_general_4 */ |
| 20188 | case 260: /* *leahi_general_3b */ |
| 20189 | case 259: /* *leaqi_general_3b */ |
| 20190 | case 258: /* *leahi_general_3 */ |
| 20191 | case 257: /* *leaqi_general_3 */ |
| 20192 | case 256: /* *leahi_general_2b */ |
| 20193 | case 255: /* *leaqi_general_2b */ |
| 20194 | case 254: /* *leahi_general_2 */ |
| 20195 | case 253: /* *leaqi_general_2 */ |
| 20196 | case 252: /* *leahi_general_1 */ |
| 20197 | case 251: /* *leaqi_general_1 */ |
| 20198 | case 214: /* *leadi */ |
| 20199 | case 213: /* *leasi */ |
| 20200 | case 88: /* *movabsdi_1 */ |
| 20201 | case 87: /* *movabssi_1 */ |
| 20202 | case 86: /* *movabshi_1 */ |
| 20203 | case 85: /* *movabsqi_1 */ |
| 20204 | return 1; |
| 20205 | |
| 20206 | case 1000: /* probe_stack_di */ |
| 20207 | case 999: /* probe_stack_si */ |
| 20208 | case 732: /* tzcnt_hi */ |
| 20209 | case 730: /* *tzcnt_di_falsedep */ |
| 20210 | case 728: /* *tzcnt_si_falsedep */ |
| 20211 | case 726: /* tzcnt_di */ |
| 20212 | case 724: /* tzcnt_si */ |
| 20213 | case 719: /* *bsrhi */ |
| 20214 | case 718: /* bsr */ |
| 20215 | case 717: /* bsr_rex64 */ |
| 20216 | case 716: /* *ctzdi2_falsedep */ |
| 20217 | case 715: /* *ctzsi2_falsedep */ |
| 20218 | case 714: /* ctzdi2 */ |
| 20219 | case 713: /* ctzsi2 */ |
| 20220 | case 712: /* *bsfdi_1 */ |
| 20221 | case 711: /* *bsfsi_1 */ |
| 20222 | case 710: /* *tzcntdi_1_falsedep */ |
| 20223 | case 709: /* *tzcntsi_1_falsedep */ |
| 20224 | case 708: /* *tzcntdi_1 */ |
| 20225 | case 707: /* *tzcntsi_1 */ |
| 20226 | case 613: /* *btdi */ |
| 20227 | case 612: /* *btsi */ |
| 20228 | case 611: /* *btcq */ |
| 20229 | case 610: /* *btrq */ |
| 20230 | case 609: /* *btsq */ |
| 20231 | case 512: /* *one_cmplsi2_2_zext */ |
| 20232 | case 511: /* *one_cmpldi2_2 */ |
| 20233 | case 510: /* *one_cmplsi2_2 */ |
| 20234 | case 509: /* *one_cmplhi2_2 */ |
| 20235 | case 508: /* *one_cmplqi2_2 */ |
| 20236 | case 507: /* *one_cmplqi2_1 */ |
| 20237 | case 506: /* *one_cmplsi2_1_zext */ |
| 20238 | case 505: /* *one_cmpldi2_1 */ |
| 20239 | case 504: /* *one_cmplsi2_1 */ |
| 20240 | case 503: /* *one_cmplhi2_1 */ |
| 20241 | case 479: /* *negvdi3 */ |
| 20242 | case 478: /* *negvsi3 */ |
| 20243 | case 477: /* *negvhi3 */ |
| 20244 | case 476: /* *negvqi3 */ |
| 20245 | case 475: /* *negsi2_cmpz_zext */ |
| 20246 | case 474: /* *negdi2_cmpz */ |
| 20247 | case 473: /* *negsi2_cmpz */ |
| 20248 | case 472: /* *neghi2_cmpz */ |
| 20249 | case 471: /* *negqi2_cmpz */ |
| 20250 | case 470: /* *negsi2_1_zext */ |
| 20251 | case 469: /* *negdi2_1 */ |
| 20252 | case 468: /* *negsi2_1 */ |
| 20253 | case 467: /* *neghi2_1 */ |
| 20254 | case 466: /* *negqi2_1 */ |
| 20255 | case 450: /* *xorqi_2_slp */ |
| 20256 | case 449: /* *iorqi_2_slp */ |
| 20257 | case 436: /* *xorqi_1_slp */ |
| 20258 | case 435: /* *iorqi_1_slp */ |
| 20259 | case 410: /* *andqi_2_slp */ |
| 20260 | case 403: /* *andqi_1_slp */ |
| 20261 | case 276: /* *subqi_1_slp */ |
| 20262 | case 138: /* zero_extendqihi2_and */ |
| 20263 | case 135: /* zero_extendhisi2_and */ |
| 20264 | case 134: /* zero_extendqisi2_and */ |
| 20265 | case 100: /* *movstricthi_xor */ |
| 20266 | case 99: /* *movstrictqi_xor */ |
| 20267 | case 77: /* *movdi_or */ |
| 20268 | case 76: /* *movsi_or */ |
| 20269 | case 75: /* *movdi_xor */ |
| 20270 | case 74: /* *movsi_xor */ |
| 20271 | if (((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) || (cached_memory == MEMORY_STORE)) |
| 20272 | { |
| 20273 | return 1; |
| 20274 | } |
| 20275 | else if (cached_memory == MEMORY_BOTH) |
| 20276 | { |
| 20277 | return 4; |
| 20278 | } |
| 20279 | else |
| 20280 | { |
| 20281 | return 0; |
| 20282 | } |
| 20283 | |
| 20284 | case 73: /* *popfldi1 */ |
| 20285 | case 72: /* *popflsi1 */ |
| 20286 | case 69: /* *popdi1_epilogue */ |
| 20287 | case 68: /* *popsi1_epilogue */ |
| 20288 | case 67: /* *popdi1 */ |
| 20289 | case 66: /* *popsi1 */ |
| 20290 | if (((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) || (cached_memory == MEMORY_BOTH)) |
| 20291 | { |
| 20292 | return 4; |
| 20293 | } |
| 20294 | else |
| 20295 | { |
| 20296 | return 0; |
| 20297 | } |
| 20298 | |
| 20299 | case 71: /* *pushfldi2 */ |
| 20300 | case 70: /* *pushflsi2 */ |
| 20301 | case 65: /* *pushdi2_prologue */ |
| 20302 | case 64: /* *pushsi2_prologue */ |
| 20303 | case 63: /* *pushhi2 */ |
| 20304 | case 62: /* *pushqi2 */ |
| 20305 | case 61: /* *pushsi2_rex64 */ |
| 20306 | case 60: /* *pushhi2_rex64 */ |
| 20307 | case 59: /* *pushqi2_rex64 */ |
| 20308 | case 58: /* *pushsi2 */ |
| 20309 | if (((cached_memory = get_attr_memory (insn)) == MEMORY_STORE) || (cached_memory == MEMORY_BOTH)) |
| 20310 | { |
| 20311 | return 1; |
| 20312 | } |
| 20313 | else |
| 20314 | { |
| 20315 | return 0; |
| 20316 | } |
| 20317 | |
| 20318 | case 57: /* *pushdi2_rex64 */ |
| 20319 | extract_constrain_insn_cached (insn); |
| 20320 | if (which_alternative != 0) |
| 20321 | { |
| 20322 | return 6; |
| 20323 | } |
| 20324 | else if (((cached_memory = get_attr_memory (insn)) == MEMORY_STORE) || (cached_memory == MEMORY_BOTH)) |
| 20325 | { |
| 20326 | return 1; |
| 20327 | } |
| 20328 | else |
| 20329 | { |
| 20330 | return 0; |
| 20331 | } |
| 20332 | |
| 20333 | case 4984: /* atomic_bit_test_and_resetdi_1 */ |
| 20334 | case 4983: /* atomic_bit_test_and_resetsi_1 */ |
| 20335 | case 4982: /* atomic_bit_test_and_resethi_1 */ |
| 20336 | case 4981: /* atomic_bit_test_and_complementdi_1 */ |
| 20337 | case 4980: /* atomic_bit_test_and_complementsi_1 */ |
| 20338 | case 4979: /* atomic_bit_test_and_complementhi_1 */ |
| 20339 | case 4978: /* atomic_bit_test_and_setdi_1 */ |
| 20340 | case 4977: /* atomic_bit_test_and_setsi_1 */ |
| 20341 | case 4976: /* atomic_bit_test_and_sethi_1 */ |
| 20342 | case 4975: /* atomic_xordi */ |
| 20343 | case 4974: /* atomic_ordi */ |
| 20344 | case 4973: /* atomic_anddi */ |
| 20345 | case 4972: /* atomic_xorsi */ |
| 20346 | case 4971: /* atomic_orsi */ |
| 20347 | case 4970: /* atomic_andsi */ |
| 20348 | case 4969: /* atomic_xorhi */ |
| 20349 | case 4968: /* atomic_orhi */ |
| 20350 | case 4967: /* atomic_andhi */ |
| 20351 | case 4966: /* atomic_xorqi */ |
| 20352 | case 4965: /* atomic_orqi */ |
| 20353 | case 4964: /* atomic_andqi */ |
| 20354 | case 4963: /* atomic_subdi */ |
| 20355 | case 4962: /* atomic_subsi */ |
| 20356 | case 4961: /* atomic_subhi */ |
| 20357 | case 4960: /* atomic_subqi */ |
| 20358 | case 4959: /* atomic_adddi */ |
| 20359 | case 4958: /* atomic_addsi */ |
| 20360 | case 4957: /* atomic_addhi */ |
| 20361 | case 4956: /* atomic_addqi */ |
| 20362 | case 4955: /* atomic_exchangedi */ |
| 20363 | case 4954: /* atomic_exchangesi */ |
| 20364 | case 4953: /* atomic_exchangehi */ |
| 20365 | case 4952: /* atomic_exchangeqi */ |
| 20366 | case 4951: /* *atomic_fetch_add_cmpdi */ |
| 20367 | case 4950: /* *atomic_fetch_add_cmpsi */ |
| 20368 | case 4949: /* *atomic_fetch_add_cmphi */ |
| 20369 | case 4948: /* *atomic_fetch_add_cmpqi */ |
| 20370 | case 4947: /* atomic_fetch_adddi */ |
| 20371 | case 4946: /* atomic_fetch_addsi */ |
| 20372 | case 4945: /* atomic_fetch_addhi */ |
| 20373 | case 4944: /* atomic_fetch_addqi */ |
| 20374 | case 4943: /* atomic_compare_and_swapdi_1 */ |
| 20375 | case 4942: /* atomic_compare_and_swapsi_1 */ |
| 20376 | case 4941: /* atomic_compare_and_swaphi_1 */ |
| 20377 | case 4940: /* atomic_compare_and_swapqi_1 */ |
| 20378 | case 4939: /* atomic_compare_and_swapti_doubleword */ |
| 20379 | case 4938: /* atomic_compare_and_swapdi_doubleword */ |
| 20380 | case 4933: /* atomic_storedi_fpu */ |
| 20381 | case 4932: /* atomic_storedi_1 */ |
| 20382 | case 4931: /* atomic_storesi_1 */ |
| 20383 | case 4930: /* atomic_storehi_1 */ |
| 20384 | case 4929: /* atomic_storeqi_1 */ |
| 20385 | case 4928: /* atomic_loaddi_fpu */ |
| 20386 | case 4927: /* mfence_nosse */ |
| 20387 | case 4923: /* vpopcountv8di_mask */ |
| 20388 | case 4922: /* vpopcountv8di */ |
| 20389 | case 4921: /* vpopcountv16si_mask */ |
| 20390 | case 4920: /* vpopcountv16si */ |
| 20391 | case 4901: /* *movv64si_internal */ |
| 20392 | case 4900: /* *movv64sf_internal */ |
| 20393 | case 4875: /* avx512f_pd512_256pd */ |
| 20394 | case 4874: /* avx512f_ps512_256ps */ |
| 20395 | case 4873: /* avx512f_si512_256si */ |
| 20396 | case 4872: /* avx512f_pd512_pd */ |
| 20397 | case 4871: /* avx512f_ps512_ps */ |
| 20398 | case 4870: /* avx512f_si512_si */ |
| 20399 | case 4832: /* avx512f_vgetmantv2df_round */ |
| 20400 | case 4831: /* avx512f_vgetmantv2df */ |
| 20401 | case 4830: /* avx512f_vgetmantv4sf_round */ |
| 20402 | case 4829: /* avx512f_vgetmantv4sf */ |
| 20403 | case 4828: /* avx512vl_getmantv2df_mask_round */ |
| 20404 | case 4827: /* avx512vl_getmantv2df_mask */ |
| 20405 | case 4826: /* avx512vl_getmantv2df_round */ |
| 20406 | case 4825: /* avx512vl_getmantv2df */ |
| 20407 | case 4824: /* avx512vl_getmantv4df_mask_round */ |
| 20408 | case 4823: /* avx512vl_getmantv4df_mask */ |
| 20409 | case 4822: /* avx512vl_getmantv4df_round */ |
| 20410 | case 4821: /* avx512vl_getmantv4df */ |
| 20411 | case 4820: /* avx512f_getmantv8df_mask_round */ |
| 20412 | case 4819: /* avx512f_getmantv8df_mask */ |
| 20413 | case 4818: /* avx512f_getmantv8df_round */ |
| 20414 | case 4817: /* avx512f_getmantv8df */ |
| 20415 | case 4816: /* avx512vl_getmantv4sf_mask_round */ |
| 20416 | case 4815: /* avx512vl_getmantv4sf_mask */ |
| 20417 | case 4814: /* avx512vl_getmantv4sf_round */ |
| 20418 | case 4813: /* avx512vl_getmantv4sf */ |
| 20419 | case 4812: /* avx512vl_getmantv8sf_mask_round */ |
| 20420 | case 4811: /* avx512vl_getmantv8sf_mask */ |
| 20421 | case 4810: /* avx512vl_getmantv8sf_round */ |
| 20422 | case 4809: /* avx512vl_getmantv8sf */ |
| 20423 | case 4808: /* avx512f_getmantv16sf_mask_round */ |
| 20424 | case 4807: /* avx512f_getmantv16sf_mask */ |
| 20425 | case 4806: /* avx512f_getmantv16sf_round */ |
| 20426 | case 4805: /* avx512f_getmantv16sf */ |
| 20427 | case 4435: /* avx_pd256_pd */ |
| 20428 | case 4434: /* avx_ps256_ps */ |
| 20429 | case 4433: /* avx_si256_si */ |
| 20430 | case 4252: /* *avx_vperm_broadcast_v4df */ |
| 20431 | case 4251: /* *avx_vperm_broadcast_v8sf */ |
| 20432 | case 3677: /* sse3_monitor_di */ |
| 20433 | case 3676: /* sse3_monitor_si */ |
| 20434 | case 3675: /* sse3_mwait */ |
| 20435 | case 3637: /* *vec_extractv4si_zext_mem */ |
| 20436 | case 3636: /* *vec_extractv4si_mem */ |
| 20437 | case 3633: /* *vec_extractv4si_0_zext */ |
| 20438 | case 3632: /* *vec_extractv4si_0_zext_sse4 */ |
| 20439 | case 3631: /* *vec_extractv2di_0_sse */ |
| 20440 | case 3630: /* *vec_extractv2di_0 */ |
| 20441 | case 3629: /* *vec_extractv4si_0 */ |
| 20442 | case 3628: /* *vec_extractv8hi_mem */ |
| 20443 | case 3627: /* *vec_extractv16qi_mem */ |
| 20444 | case 3503: /* avx512vl_testnmv2di3_mask */ |
| 20445 | case 3502: /* avx512vl_testnmv2di3 */ |
| 20446 | case 3501: /* avx512vl_testnmv4di3_mask */ |
| 20447 | case 3500: /* avx512vl_testnmv4di3 */ |
| 20448 | case 3499: /* avx512f_testnmv8di3_mask */ |
| 20449 | case 3498: /* avx512f_testnmv8di3 */ |
| 20450 | case 3497: /* avx512vl_testnmv4si3_mask */ |
| 20451 | case 3496: /* avx512vl_testnmv4si3 */ |
| 20452 | case 3495: /* avx512vl_testnmv8si3_mask */ |
| 20453 | case 3494: /* avx512vl_testnmv8si3 */ |
| 20454 | case 3493: /* avx512f_testnmv16si3_mask */ |
| 20455 | case 3492: /* avx512f_testnmv16si3 */ |
| 20456 | case 3491: /* avx512vl_testnmv8hi3_mask */ |
| 20457 | case 3490: /* avx512vl_testnmv8hi3 */ |
| 20458 | case 3489: /* avx512vl_testnmv16hi3_mask */ |
| 20459 | case 3488: /* avx512vl_testnmv16hi3 */ |
| 20460 | case 3487: /* avx512bw_testnmv32hi3_mask */ |
| 20461 | case 3486: /* avx512bw_testnmv32hi3 */ |
| 20462 | case 3485: /* avx512vl_testnmv32qi3_mask */ |
| 20463 | case 3484: /* avx512vl_testnmv32qi3 */ |
| 20464 | case 3483: /* avx512vl_testnmv16qi3_mask */ |
| 20465 | case 3482: /* avx512vl_testnmv16qi3 */ |
| 20466 | case 3481: /* avx512bw_testnmv64qi3_mask */ |
| 20467 | case 3480: /* avx512bw_testnmv64qi3 */ |
| 20468 | case 3479: /* avx512vl_testmv2di3_mask */ |
| 20469 | case 3478: /* avx512vl_testmv2di3 */ |
| 20470 | case 3477: /* avx512vl_testmv4di3_mask */ |
| 20471 | case 3476: /* avx512vl_testmv4di3 */ |
| 20472 | case 3475: /* avx512f_testmv8di3_mask */ |
| 20473 | case 3474: /* avx512f_testmv8di3 */ |
| 20474 | case 3473: /* avx512vl_testmv4si3_mask */ |
| 20475 | case 3472: /* avx512vl_testmv4si3 */ |
| 20476 | case 3471: /* avx512vl_testmv8si3_mask */ |
| 20477 | case 3470: /* avx512vl_testmv8si3 */ |
| 20478 | case 3469: /* avx512f_testmv16si3_mask */ |
| 20479 | case 3468: /* avx512f_testmv16si3 */ |
| 20480 | case 3467: /* avx512vl_testmv8hi3_mask */ |
| 20481 | case 3466: /* avx512vl_testmv8hi3 */ |
| 20482 | case 3465: /* avx512vl_testmv16hi3_mask */ |
| 20483 | case 3464: /* avx512vl_testmv16hi3 */ |
| 20484 | case 3463: /* avx512bw_testmv32hi3_mask */ |
| 20485 | case 3462: /* avx512bw_testmv32hi3 */ |
| 20486 | case 3461: /* avx512vl_testmv32qi3_mask */ |
| 20487 | case 3460: /* avx512vl_testmv32qi3 */ |
| 20488 | case 3459: /* avx512vl_testmv16qi3_mask */ |
| 20489 | case 3458: /* avx512vl_testmv16qi3 */ |
| 20490 | case 3457: /* avx512bw_testmv64qi3_mask */ |
| 20491 | case 3456: /* avx512bw_testmv64qi3 */ |
| 20492 | case 3191: /* avx512vl_rorv2di_mask */ |
| 20493 | case 3190: /* avx512vl_rorv2di */ |
| 20494 | case 3189: /* avx512vl_rolv2di_mask */ |
| 20495 | case 3188: /* avx512vl_rolv2di */ |
| 20496 | case 3187: /* avx512vl_rorv4di_mask */ |
| 20497 | case 3186: /* avx512vl_rorv4di */ |
| 20498 | case 3185: /* avx512vl_rolv4di_mask */ |
| 20499 | case 3184: /* avx512vl_rolv4di */ |
| 20500 | case 3183: /* avx512f_rorv8di_mask */ |
| 20501 | case 3182: /* avx512f_rorv8di */ |
| 20502 | case 3181: /* avx512f_rolv8di_mask */ |
| 20503 | case 3180: /* avx512f_rolv8di */ |
| 20504 | case 3179: /* avx512vl_rorv4si_mask */ |
| 20505 | case 3178: /* avx512vl_rorv4si */ |
| 20506 | case 3177: /* avx512vl_rolv4si_mask */ |
| 20507 | case 3176: /* avx512vl_rolv4si */ |
| 20508 | case 3175: /* avx512vl_rorv8si_mask */ |
| 20509 | case 3174: /* avx512vl_rorv8si */ |
| 20510 | case 3173: /* avx512vl_rolv8si_mask */ |
| 20511 | case 3172: /* avx512vl_rolv8si */ |
| 20512 | case 3171: /* avx512f_rorv16si_mask */ |
| 20513 | case 3170: /* avx512f_rorv16si */ |
| 20514 | case 3169: /* avx512f_rolv16si_mask */ |
| 20515 | case 3168: /* avx512f_rolv16si */ |
| 20516 | case 3167: /* avx512vl_rorvv2di_mask */ |
| 20517 | case 3166: /* avx512vl_rorvv2di */ |
| 20518 | case 3165: /* avx512vl_rolvv2di_mask */ |
| 20519 | case 3164: /* avx512vl_rolvv2di */ |
| 20520 | case 3163: /* avx512vl_rorvv4di_mask */ |
| 20521 | case 3162: /* avx512vl_rorvv4di */ |
| 20522 | case 3161: /* avx512vl_rolvv4di_mask */ |
| 20523 | case 3160: /* avx512vl_rolvv4di */ |
| 20524 | case 3159: /* avx512f_rorvv8di_mask */ |
| 20525 | case 3158: /* avx512f_rorvv8di */ |
| 20526 | case 3157: /* avx512f_rolvv8di_mask */ |
| 20527 | case 3156: /* avx512f_rolvv8di */ |
| 20528 | case 3155: /* avx512vl_rorvv4si_mask */ |
| 20529 | case 3154: /* avx512vl_rorvv4si */ |
| 20530 | case 3153: /* avx512vl_rolvv4si_mask */ |
| 20531 | case 3152: /* avx512vl_rolvv4si */ |
| 20532 | case 3151: /* avx512vl_rorvv8si_mask */ |
| 20533 | case 3150: /* avx512vl_rorvv8si */ |
| 20534 | case 3149: /* avx512vl_rolvv8si_mask */ |
| 20535 | case 3148: /* avx512vl_rolvv8si */ |
| 20536 | case 3147: /* avx512f_rorvv16si_mask */ |
| 20537 | case 3146: /* avx512f_rorvv16si */ |
| 20538 | case 3145: /* avx512f_rolvv16si_mask */ |
| 20539 | case 3144: /* avx512f_rolvv16si */ |
| 20540 | case 2704: /* avx512f_rndscalev2df_round */ |
| 20541 | case 2703: /* avx512f_rndscalev2df */ |
| 20542 | case 2702: /* avx512f_rndscalev4sf_round */ |
| 20543 | case 2701: /* avx512f_rndscalev4sf */ |
| 20544 | case 2700: /* avx512vl_rndscalev2df_mask_round */ |
| 20545 | case 2699: /* avx512vl_rndscalev2df_mask */ |
| 20546 | case 2698: /* avx512vl_rndscalev2df_round */ |
| 20547 | case 2697: /* avx512vl_rndscalev2df */ |
| 20548 | case 2696: /* avx512vl_rndscalev4df_mask_round */ |
| 20549 | case 2695: /* avx512vl_rndscalev4df_mask */ |
| 20550 | case 2694: /* avx512vl_rndscalev4df_round */ |
| 20551 | case 2693: /* avx512vl_rndscalev4df */ |
| 20552 | case 2692: /* avx512f_rndscalev8df_mask_round */ |
| 20553 | case 2691: /* avx512f_rndscalev8df_mask */ |
| 20554 | case 2690: /* avx512f_rndscalev8df_round */ |
| 20555 | case 2689: /* avx512f_rndscalev8df */ |
| 20556 | case 2688: /* avx512vl_rndscalev4sf_mask_round */ |
| 20557 | case 2687: /* avx512vl_rndscalev4sf_mask */ |
| 20558 | case 2686: /* avx512vl_rndscalev4sf_round */ |
| 20559 | case 2685: /* avx512vl_rndscalev4sf */ |
| 20560 | case 2684: /* avx512vl_rndscalev8sf_mask_round */ |
| 20561 | case 2683: /* avx512vl_rndscalev8sf_mask */ |
| 20562 | case 2682: /* avx512vl_rndscalev8sf_round */ |
| 20563 | case 2681: /* avx512vl_rndscalev8sf */ |
| 20564 | case 2680: /* avx512f_rndscalev16sf_mask_round */ |
| 20565 | case 2679: /* avx512f_rndscalev16sf_mask */ |
| 20566 | case 2678: /* avx512f_rndscalev16sf_round */ |
| 20567 | case 2677: /* avx512f_rndscalev16sf */ |
| 20568 | case 2676: /* avx512f_sfixupimmv2df_mask_round */ |
| 20569 | case 2675: /* avx512f_sfixupimmv2df_mask */ |
| 20570 | case 2674: /* avx512f_sfixupimmv4sf_mask_round */ |
| 20571 | case 2673: /* avx512f_sfixupimmv4sf_mask */ |
| 20572 | case 2672: /* avx512f_sfixupimmv2df_maskz_1_round */ |
| 20573 | case 2671: /* avx512f_sfixupimmv2df_maskz_1 */ |
| 20574 | case 2670: /* avx512f_sfixupimmv2df_round */ |
| 20575 | case 2669: /* avx512f_sfixupimmv2df */ |
| 20576 | case 2668: /* avx512f_sfixupimmv4sf_maskz_1_round */ |
| 20577 | case 2667: /* avx512f_sfixupimmv4sf_maskz_1 */ |
| 20578 | case 2666: /* avx512f_sfixupimmv4sf_round */ |
| 20579 | case 2665: /* avx512f_sfixupimmv4sf */ |
| 20580 | case 2664: /* avx512vl_fixupimmv2df_mask_round */ |
| 20581 | case 2663: /* avx512vl_fixupimmv2df_mask */ |
| 20582 | case 2662: /* avx512vl_fixupimmv4df_mask_round */ |
| 20583 | case 2661: /* avx512vl_fixupimmv4df_mask */ |
| 20584 | case 2660: /* avx512f_fixupimmv8df_mask_round */ |
| 20585 | case 2659: /* avx512f_fixupimmv8df_mask */ |
| 20586 | case 2658: /* avx512vl_fixupimmv4sf_mask_round */ |
| 20587 | case 2657: /* avx512vl_fixupimmv4sf_mask */ |
| 20588 | case 2656: /* avx512vl_fixupimmv8sf_mask_round */ |
| 20589 | case 2655: /* avx512vl_fixupimmv8sf_mask */ |
| 20590 | case 2654: /* avx512f_fixupimmv16sf_mask_round */ |
| 20591 | case 2653: /* avx512f_fixupimmv16sf_mask */ |
| 20592 | case 2652: /* avx512vl_fixupimmv2df_maskz_1_round */ |
| 20593 | case 2651: /* avx512vl_fixupimmv2df_maskz_1 */ |
| 20594 | case 2650: /* avx512vl_fixupimmv2df_round */ |
| 20595 | case 2649: /* avx512vl_fixupimmv2df */ |
| 20596 | case 2648: /* avx512vl_fixupimmv4df_maskz_1_round */ |
| 20597 | case 2647: /* avx512vl_fixupimmv4df_maskz_1 */ |
| 20598 | case 2646: /* avx512vl_fixupimmv4df_round */ |
| 20599 | case 2645: /* avx512vl_fixupimmv4df */ |
| 20600 | case 2644: /* avx512f_fixupimmv8df_maskz_1_round */ |
| 20601 | case 2643: /* avx512f_fixupimmv8df_maskz_1 */ |
| 20602 | case 2642: /* avx512f_fixupimmv8df_round */ |
| 20603 | case 2641: /* avx512f_fixupimmv8df */ |
| 20604 | case 2640: /* avx512vl_fixupimmv4sf_maskz_1_round */ |
| 20605 | case 2639: /* avx512vl_fixupimmv4sf_maskz_1 */ |
| 20606 | case 2638: /* avx512vl_fixupimmv4sf_round */ |
| 20607 | case 2637: /* avx512vl_fixupimmv4sf */ |
| 20608 | case 2636: /* avx512vl_fixupimmv8sf_maskz_1_round */ |
| 20609 | case 2635: /* avx512vl_fixupimmv8sf_maskz_1 */ |
| 20610 | case 2634: /* avx512vl_fixupimmv8sf_round */ |
| 20611 | case 2633: /* avx512vl_fixupimmv8sf */ |
| 20612 | case 2632: /* avx512f_fixupimmv16sf_maskz_1_round */ |
| 20613 | case 2631: /* avx512f_fixupimmv16sf_maskz_1 */ |
| 20614 | case 2630: /* avx512f_fixupimmv16sf_round */ |
| 20615 | case 2629: /* avx512f_fixupimmv16sf */ |
| 20616 | case 2628: /* avx512vl_alignv2di_mask */ |
| 20617 | case 2627: /* *avx512vl_alignv2di */ |
| 20618 | case 2626: /* avx512vl_alignv4di_mask */ |
| 20619 | case 2625: /* *avx512vl_alignv4di */ |
| 20620 | case 2624: /* avx512f_alignv8di_mask */ |
| 20621 | case 2623: /* *avx512f_alignv8di */ |
| 20622 | case 2622: /* avx512vl_alignv4si_mask */ |
| 20623 | case 2621: /* *avx512vl_alignv4si */ |
| 20624 | case 2620: /* avx512vl_alignv8si_mask */ |
| 20625 | case 2619: /* *avx512vl_alignv8si */ |
| 20626 | case 2618: /* avx512f_alignv16si_mask */ |
| 20627 | case 2617: /* *avx512f_alignv16si */ |
| 20628 | case 2616: /* avx512f_sgetexpv2df_round */ |
| 20629 | case 2615: /* avx512f_sgetexpv2df */ |
| 20630 | case 2614: /* avx512f_sgetexpv4sf_round */ |
| 20631 | case 2613: /* avx512f_sgetexpv4sf */ |
| 20632 | case 2612: /* avx512vl_getexpv2df_mask_round */ |
| 20633 | case 2611: /* avx512vl_getexpv2df_mask */ |
| 20634 | case 2610: /* avx512vl_getexpv2df_round */ |
| 20635 | case 2609: /* avx512vl_getexpv2df */ |
| 20636 | case 2608: /* avx512vl_getexpv4df_mask_round */ |
| 20637 | case 2607: /* avx512vl_getexpv4df_mask */ |
| 20638 | case 2606: /* avx512vl_getexpv4df_round */ |
| 20639 | case 2605: /* avx512vl_getexpv4df */ |
| 20640 | case 2604: /* avx512f_getexpv8df_mask_round */ |
| 20641 | case 2603: /* avx512f_getexpv8df_mask */ |
| 20642 | case 2602: /* avx512f_getexpv8df_round */ |
| 20643 | case 2601: /* avx512f_getexpv8df */ |
| 20644 | case 2600: /* avx512vl_getexpv4sf_mask_round */ |
| 20645 | case 2599: /* avx512vl_getexpv4sf_mask */ |
| 20646 | case 2598: /* avx512vl_getexpv4sf_round */ |
| 20647 | case 2597: /* avx512vl_getexpv4sf */ |
| 20648 | case 2596: /* avx512vl_getexpv8sf_mask_round */ |
| 20649 | case 2595: /* avx512vl_getexpv8sf_mask */ |
| 20650 | case 2594: /* avx512vl_getexpv8sf_round */ |
| 20651 | case 2593: /* avx512vl_getexpv8sf */ |
| 20652 | case 2592: /* avx512f_getexpv16sf_mask_round */ |
| 20653 | case 2591: /* avx512f_getexpv16sf_mask */ |
| 20654 | case 2590: /* avx512f_getexpv16sf_round */ |
| 20655 | case 2589: /* avx512f_getexpv16sf */ |
| 20656 | case 2570: /* avx512vl_scalefv2df_mask_round */ |
| 20657 | case 2569: /* avx512vl_scalefv2df_mask */ |
| 20658 | case 2568: /* avx512vl_scalefv2df_round */ |
| 20659 | case 2567: /* avx512vl_scalefv2df */ |
| 20660 | case 2566: /* avx512vl_scalefv4df_mask_round */ |
| 20661 | case 2565: /* avx512vl_scalefv4df_mask */ |
| 20662 | case 2564: /* avx512vl_scalefv4df_round */ |
| 20663 | case 2563: /* avx512vl_scalefv4df */ |
| 20664 | case 2562: /* avx512f_scalefv8df_mask_round */ |
| 20665 | case 2561: /* avx512f_scalefv8df_mask */ |
| 20666 | case 2560: /* avx512f_scalefv8df_round */ |
| 20667 | case 2559: /* avx512f_scalefv8df */ |
| 20668 | case 2558: /* avx512vl_scalefv4sf_mask_round */ |
| 20669 | case 2557: /* avx512vl_scalefv4sf_mask */ |
| 20670 | case 2556: /* avx512vl_scalefv4sf_round */ |
| 20671 | case 2555: /* avx512vl_scalefv4sf */ |
| 20672 | case 2554: /* avx512vl_scalefv8sf_mask_round */ |
| 20673 | case 2553: /* avx512vl_scalefv8sf_mask */ |
| 20674 | case 2552: /* avx512vl_scalefv8sf_round */ |
| 20675 | case 2551: /* avx512vl_scalefv8sf */ |
| 20676 | case 2550: /* avx512f_scalefv16sf_mask_round */ |
| 20677 | case 2549: /* avx512f_scalefv16sf_mask */ |
| 20678 | case 2548: /* avx512f_scalefv16sf_round */ |
| 20679 | case 2547: /* avx512f_scalefv16sf */ |
| 20680 | case 2546: /* avx512f_vmscalefv2df_round */ |
| 20681 | case 2545: /* avx512f_vmscalefv2df */ |
| 20682 | case 2544: /* avx512f_vmscalefv4sf_round */ |
| 20683 | case 2543: /* avx512f_vmscalefv4sf */ |
| 20684 | case 2529: /* vec_extract_lo_v32qi */ |
| 20685 | case 2527: /* vec_extract_lo_v64qi */ |
| 20686 | case 2525: /* vec_extract_lo_v16hi */ |
| 20687 | case 2523: /* vec_extract_lo_v32hi */ |
| 20688 | case 2502: /* vec_extract_lo_v16si_mask */ |
| 20689 | case 2501: /* vec_extract_lo_v16si */ |
| 20690 | case 2500: /* vec_extract_lo_v16sf_mask */ |
| 20691 | case 2499: /* vec_extract_lo_v16sf */ |
| 20692 | case 2468: /* *vec_extractv4sf_mem */ |
| 20693 | case 2466: /* *vec_extractv4sf_0 */ |
| 20694 | case 2415: /* *avx512vl_cvtmask2qv2di */ |
| 20695 | case 2414: /* *avx512vl_cvtmask2qv4di */ |
| 20696 | case 2413: /* *avx512f_cvtmask2qv8di */ |
| 20697 | case 2412: /* *avx512vl_cvtmask2dv4si */ |
| 20698 | case 2411: /* *avx512vl_cvtmask2dv8si */ |
| 20699 | case 2410: /* *avx512f_cvtmask2dv16si */ |
| 20700 | case 2409: /* *avx512vl_cvtmask2wv8hi */ |
| 20701 | case 2408: /* *avx512vl_cvtmask2wv16hi */ |
| 20702 | case 2407: /* *avx512bw_cvtmask2wv32hi */ |
| 20703 | case 2406: /* *avx512vl_cvtmask2bv32qi */ |
| 20704 | case 2405: /* *avx512vl_cvtmask2bv16qi */ |
| 20705 | case 2404: /* *avx512bw_cvtmask2bv64qi */ |
| 20706 | case 2403: /* avx512vl_cvtq2maskv2di */ |
| 20707 | case 2402: /* avx512vl_cvtq2maskv4di */ |
| 20708 | case 2401: /* avx512f_cvtq2maskv8di */ |
| 20709 | case 2400: /* avx512vl_cvtd2maskv4si */ |
| 20710 | case 2399: /* avx512vl_cvtd2maskv8si */ |
| 20711 | case 2398: /* avx512f_cvtd2maskv16si */ |
| 20712 | case 2397: /* avx512vl_cvtw2maskv8hi */ |
| 20713 | case 2396: /* avx512vl_cvtw2maskv16hi */ |
| 20714 | case 2395: /* avx512bw_cvtw2maskv32hi */ |
| 20715 | case 2394: /* avx512vl_cvtb2maskv32qi */ |
| 20716 | case 2393: /* avx512vl_cvtb2maskv16qi */ |
| 20717 | case 2392: /* avx512bw_cvtb2maskv64qi */ |
| 20718 | case 1360: /* *absnegv2df2 */ |
| 20719 | case 1359: /* *absnegv4df2 */ |
| 20720 | case 1358: /* *absnegv8df2 */ |
| 20721 | case 1357: /* *absnegv4sf2 */ |
| 20722 | case 1356: /* *absnegv8sf2 */ |
| 20723 | case 1355: /* *absnegv16sf2 */ |
| 20724 | case 1354: /* kunpckdi */ |
| 20725 | case 1353: /* kunpcksi */ |
| 20726 | case 1294: /* movdi_to_sse */ |
| 20727 | case 1209: /* *vec_extractv2si_zext_mem */ |
| 20728 | case 1207: /* *vec_extractv2si_0 */ |
| 20729 | case 1137: /* *vec_extractv2sf_0 */ |
| 20730 | case 1105: /* rdpid */ |
| 20731 | case 1104: /* *wrpkru */ |
| 20732 | case 1103: /* *rdpkru */ |
| 20733 | case 1086: /* clzero_di */ |
| 20734 | case 1085: /* clzero_si */ |
| 20735 | case 1084: /* monitorx_di */ |
| 20736 | case 1083: /* monitorx_si */ |
| 20737 | case 1082: /* mwaitx */ |
| 20738 | case 1079: /* xtest_1 */ |
| 20739 | case 1078: /* xabort */ |
| 20740 | case 1077: /* xend */ |
| 20741 | case 1076: /* xbegin_1 */ |
| 20742 | case 1075: /* *pause */ |
| 20743 | case 1074: /* rdseeddi_1 */ |
| 20744 | case 1073: /* rdseedsi_1 */ |
| 20745 | case 1072: /* rdseedhi_1 */ |
| 20746 | case 1071: /* rdranddi_1 */ |
| 20747 | case 1070: /* rdrandsi_1 */ |
| 20748 | case 1069: /* rdrandhi_1 */ |
| 20749 | case 1068: /* wrgsbasedi */ |
| 20750 | case 1067: /* wrfsbasedi */ |
| 20751 | case 1066: /* wrgsbasesi */ |
| 20752 | case 1065: /* wrfsbasesi */ |
| 20753 | case 1064: /* rdgsbasedi */ |
| 20754 | case 1063: /* rdfsbasedi */ |
| 20755 | case 1062: /* rdgsbasesi */ |
| 20756 | case 1061: /* rdfsbasesi */ |
| 20757 | case 1052: /* fnclex */ |
| 20758 | case 1051: /* fnstsw */ |
| 20759 | case 1050: /* fldenv */ |
| 20760 | case 1049: /* fnstenv */ |
| 20761 | case 1048: /* xrstors64 */ |
| 20762 | case 1047: /* xrstor64 */ |
| 20763 | case 1046: /* xrstors_rex64 */ |
| 20764 | case 1045: /* xrstor_rex64 */ |
| 20765 | case 1044: /* xrstors */ |
| 20766 | case 1043: /* xrstor */ |
| 20767 | case 1042: /* xsaves64 */ |
| 20768 | case 1041: /* xsavec64 */ |
| 20769 | case 1040: /* xsaveopt64 */ |
| 20770 | case 1039: /* xsave64 */ |
| 20771 | case 1038: /* xsaves_rex64 */ |
| 20772 | case 1037: /* xsavec_rex64 */ |
| 20773 | case 1036: /* xsaveopt_rex64 */ |
| 20774 | case 1035: /* xsave_rex64 */ |
| 20775 | case 1034: /* xsaves */ |
| 20776 | case 1033: /* xsavec */ |
| 20777 | case 1032: /* xsaveopt */ |
| 20778 | case 1031: /* xsave */ |
| 20779 | case 1030: /* fxrstor64 */ |
| 20780 | case 1029: /* fxrstor */ |
| 20781 | case 1028: /* fxsave64 */ |
| 20782 | case 1027: /* fxsave */ |
| 20783 | case 1026: /* rdtscp_rex64 */ |
| 20784 | case 1025: /* rdtscp */ |
| 20785 | case 1024: /* rdtsc_rex64 */ |
| 20786 | case 1023: /* rdtsc */ |
| 20787 | case 1022: /* rdpmc_rex64 */ |
| 20788 | case 1021: /* rdpmc */ |
| 20789 | case 1016: /* stack_tls_protect_test_di */ |
| 20790 | case 1015: /* stack_tls_protect_test_si */ |
| 20791 | case 1014: /* stack_protect_test_di */ |
| 20792 | case 1013: /* stack_protect_test_si */ |
| 20793 | case 1012: /* stack_tls_protect_set_di */ |
| 20794 | case 1011: /* stack_tls_protect_set_si */ |
| 20795 | case 1010: /* stack_protect_set_di */ |
| 20796 | case 1009: /* stack_protect_set_si */ |
| 20797 | case 1005: /* trap */ |
| 20798 | case 1004: /* probe_stack_rangedi */ |
| 20799 | case 1003: /* probe_stack_rangesi */ |
| 20800 | case 1002: /* adjust_stack_and_probedi */ |
| 20801 | case 1001: /* adjust_stack_and_probesi */ |
| 20802 | case 998: /* allocate_stack_worker_probe_di */ |
| 20803 | case 997: /* allocate_stack_worker_probe_si */ |
| 20804 | case 968: /* *strlenqi_1 */ |
| 20805 | case 967: /* *strlenqi_1 */ |
| 20806 | case 966: /* *cmpstrnqi_1 */ |
| 20807 | case 965: /* *cmpstrnqi_1 */ |
| 20808 | case 964: /* *cmpstrnqi_nz_1 */ |
| 20809 | case 963: /* *cmpstrnqi_nz_1 */ |
| 20810 | case 962: /* *rep_stosqi */ |
| 20811 | case 961: /* *rep_stosqi */ |
| 20812 | case 960: /* *rep_stossi */ |
| 20813 | case 959: /* *rep_stossi */ |
| 20814 | case 958: /* *rep_stosdi_rex64 */ |
| 20815 | case 957: /* *rep_stosdi_rex64 */ |
| 20816 | case 956: /* *strsetqi_1 */ |
| 20817 | case 955: /* *strsetqi_1 */ |
| 20818 | case 954: /* *strsethi_1 */ |
| 20819 | case 953: /* *strsethi_1 */ |
| 20820 | case 952: /* *strsetsi_1 */ |
| 20821 | case 951: /* *strsetsi_1 */ |
| 20822 | case 950: /* *strsetdi_rex_1 */ |
| 20823 | case 949: /* *strsetdi_rex_1 */ |
| 20824 | case 948: /* *rep_movqi */ |
| 20825 | case 947: /* *rep_movqi */ |
| 20826 | case 946: /* *rep_movsi */ |
| 20827 | case 945: /* *rep_movsi */ |
| 20828 | case 944: /* *rep_movdi_rex64 */ |
| 20829 | case 943: /* *rep_movdi_rex64 */ |
| 20830 | case 942: /* *strmovqi_1 */ |
| 20831 | case 941: /* *strmovqi_1 */ |
| 20832 | case 940: /* *strmovhi_1 */ |
| 20833 | case 939: /* *strmovhi_1 */ |
| 20834 | case 938: /* *strmovsi_1 */ |
| 20835 | case 937: /* *strmovsi_1 */ |
| 20836 | case 936: /* *strmovdi_rex_1 */ |
| 20837 | case 935: /* *strmovdi_rex_1 */ |
| 20838 | case 934: /* cld */ |
| 20839 | case 932: /* fxamdf2_i387_with_temp */ |
| 20840 | case 931: /* fxamsf2_i387_with_temp */ |
| 20841 | case 930: /* fxamxf2_i387 */ |
| 20842 | case 929: /* fxamdf2_i387 */ |
| 20843 | case 928: /* fxamsf2_i387 */ |
| 20844 | case 811: /* *tls_dynamic_gnu2_combine_64 */ |
| 20845 | case 808: /* *tls_dynamic_gnu2_combine_32 */ |
| 20846 | case 797: /* *tls_local_dynamic_32_once */ |
| 20847 | case 796: /* *tls_local_dynamic_base_64_largepic */ |
| 20848 | case 795: /* *tls_local_dynamic_base_64_di */ |
| 20849 | case 794: /* *tls_local_dynamic_base_64_si */ |
| 20850 | case 793: /* *tls_local_dynamic_base_32_gnu */ |
| 20851 | case 792: /* *tls_global_dynamic_64_largepic */ |
| 20852 | case 791: /* *tls_global_dynamic_64_di */ |
| 20853 | case 790: /* *tls_global_dynamic_64_si */ |
| 20854 | case 789: /* *tls_global_dynamic_32_gnu */ |
| 20855 | case 788: /* *parityhi2_cmp */ |
| 20856 | case 787: /* paritysi2_cmp */ |
| 20857 | case 786: /* paritydi2_cmp */ |
| 20858 | case 785: /* bswaphi_lowpart */ |
| 20859 | case 784: /* *bswaphi_lowpart_1 */ |
| 20860 | case 778: /* *popcounthi2_1 */ |
| 20861 | case 706: /* ffssi2_no_cmove */ |
| 20862 | case 705: /* split_stack_return */ |
| 20863 | case 702: /* eh_return_internal */ |
| 20864 | case 698: /* *set_got_labelled */ |
| 20865 | case 697: /* *set_got */ |
| 20866 | case 696: /* pad */ |
| 20867 | case 695: /* nops */ |
| 20868 | case 694: /* nop */ |
| 20869 | case 692: /* simple_return_pop_internal */ |
| 20870 | case 691: /* simple_return_internal_long */ |
| 20871 | case 690: /* interrupt_return */ |
| 20872 | case 689: /* simple_return_internal */ |
| 20873 | case 688: /* prologue_use */ |
| 20874 | case 687: /* *memory_blockage */ |
| 20875 | case 686: /* blockage */ |
| 20876 | case 658: /* *jccxf_si_r_i387 */ |
| 20877 | case 657: /* *jccdf_si_r_i387 */ |
| 20878 | case 656: /* *jccsf_si_r_i387 */ |
| 20879 | case 655: /* *jccxf_hi_r_i387 */ |
| 20880 | case 654: /* *jccdf_hi_r_i387 */ |
| 20881 | case 653: /* *jccsf_hi_r_i387 */ |
| 20882 | case 652: /* *jccxf_si_i387 */ |
| 20883 | case 651: /* *jccdf_si_i387 */ |
| 20884 | case 650: /* *jccsf_si_i387 */ |
| 20885 | case 649: /* *jccxf_hi_i387 */ |
| 20886 | case 648: /* *jccdf_hi_i387 */ |
| 20887 | case 647: /* *jccsf_hi_i387 */ |
| 20888 | case 646: /* *jccuxf_r_i387 */ |
| 20889 | case 645: /* *jccudf_r_i387 */ |
| 20890 | case 644: /* *jccusf_r_i387 */ |
| 20891 | case 643: /* *jccuxf_i387 */ |
| 20892 | case 642: /* *jccudf_i387 */ |
| 20893 | case 641: /* *jccusf_i387 */ |
| 20894 | case 640: /* *jccdf_r_i387 */ |
| 20895 | case 639: /* *jccsf_r_i387 */ |
| 20896 | case 638: /* *jccdf_i387 */ |
| 20897 | case 637: /* *jccsf_i387 */ |
| 20898 | case 636: /* *jccxf_r_i387 */ |
| 20899 | case 635: /* *jccxf_i387 */ |
| 20900 | case 634: /* *jccxf_0_r_i387 */ |
| 20901 | case 633: /* *jccdf_0_r_i387 */ |
| 20902 | case 632: /* *jccsf_0_r_i387 */ |
| 20903 | case 631: /* *jccxf_0_i387 */ |
| 20904 | case 630: /* *jccdf_0_i387 */ |
| 20905 | case 629: /* *jccsf_0_i387 */ |
| 20906 | case 622: /* *setcc_si_1_movzbl */ |
| 20907 | case 621: /* *setcc_si_1_and */ |
| 20908 | case 620: /* *setcc_di_1 */ |
| 20909 | case 619: /* *jcc_btdi_mask */ |
| 20910 | case 618: /* *jcc_btsi_mask */ |
| 20911 | case 617: /* *jcc_btdi_1 */ |
| 20912 | case 616: /* *jcc_btsi_1 */ |
| 20913 | case 615: /* *jcc_btdi */ |
| 20914 | case 614: /* *jcc_btsi */ |
| 20915 | case 593: /* ix86_rotrti3_doubleword */ |
| 20916 | case 592: /* ix86_rotrdi3_doubleword */ |
| 20917 | case 591: /* ix86_rotlti3_doubleword */ |
| 20918 | case 590: /* ix86_rotldi3_doubleword */ |
| 20919 | case 589: /* *rotrdi3_mask */ |
| 20920 | case 588: /* *rotldi3_mask */ |
| 20921 | case 587: /* *rotrsi3_mask */ |
| 20922 | case 586: /* *rotlsi3_mask */ |
| 20923 | case 544: /* *ashrti3_doubleword */ |
| 20924 | case 543: /* *lshrti3_doubleword */ |
| 20925 | case 542: /* *ashrdi3_doubleword */ |
| 20926 | case 541: /* *lshrdi3_doubleword */ |
| 20927 | case 540: /* *ashrdi3_mask */ |
| 20928 | case 539: /* *lshrdi3_mask */ |
| 20929 | case 538: /* *ashrsi3_mask */ |
| 20930 | case 537: /* *lshrsi3_mask */ |
| 20931 | case 518: /* *ashldi3_mask */ |
| 20932 | case 517: /* *ashlsi3_mask */ |
| 20933 | case 514: /* *ashlti3_doubleword */ |
| 20934 | case 513: /* *ashldi3_doubleword */ |
| 20935 | case 502: /* *one_cmpldi2_doubleword */ |
| 20936 | case 501: /* copysigntf3_var */ |
| 20937 | case 500: /* copysigndf3_var */ |
| 20938 | case 499: /* copysignsf3_var */ |
| 20939 | case 498: /* copysigntf3_const */ |
| 20940 | case 497: /* copysigndf3_const */ |
| 20941 | case 496: /* copysignsf3_const */ |
| 20942 | case 483: /* *absnegtf2_sse */ |
| 20943 | case 482: /* *absnegxf2_i387 */ |
| 20944 | case 481: /* *absnegdf2 */ |
| 20945 | case 480: /* *absnegsf2 */ |
| 20946 | case 465: /* *negti2_doubleword */ |
| 20947 | case 464: /* *negdi2_doubleword */ |
| 20948 | case 422: /* *xordi3_doubleword */ |
| 20949 | case 421: /* *iordi3_doubleword */ |
| 20950 | case 414: /* *andndi3_doubleword */ |
| 20951 | case 397: /* *anddi3_doubleword */ |
| 20952 | case 396: /* *testqi_ext_3 */ |
| 20953 | case 395: /* *testqi_ext_3 */ |
| 20954 | case 394: /* *testqi_ext_3 */ |
| 20955 | case 382: /* *udivmoddi4_pow2 */ |
| 20956 | case 381: /* *udivmodsi4_pow2 */ |
| 20957 | case 380: /* *udivmoddi4 */ |
| 20958 | case 379: /* *udivmodsi4 */ |
| 20959 | case 378: /* *udivmodhi4 */ |
| 20960 | case 377: /* udivmoddi4_1 */ |
| 20961 | case 376: /* udivmodsi4_1 */ |
| 20962 | case 371: /* *divmoddi4 */ |
| 20963 | case 370: /* *divmodsi4 */ |
| 20964 | case 369: /* *divmodhi4 */ |
| 20965 | case 368: /* divmoddi4_1 */ |
| 20966 | case 367: /* divmodsi4_1 */ |
| 20967 | case 270: /* *subti3_doubleword */ |
| 20968 | case 269: /* *subdi3_doubleword */ |
| 20969 | case 216: /* *addti3_doubleword */ |
| 20970 | case 215: /* *adddi3_doubleword */ |
| 20971 | case 212: /* *floatunssixf2_i387_with_xmm */ |
| 20972 | case 211: /* *floatunssidf2_i387_with_xmm */ |
| 20973 | case 210: /* *floatunssisf2_i387_with_xmm */ |
| 20974 | case 209: /* floatdixf2_i387_with_xmm */ |
| 20975 | case 208: /* floatdidf2_i387_with_xmm */ |
| 20976 | case 207: /* floatdisf2_i387_with_xmm */ |
| 20977 | case 193: /* x86_fldcw_1 */ |
| 20978 | case 192: /* x86_fnstcw_1 */ |
| 20979 | case 169: /* *fixuns_truncdf_1 */ |
| 20980 | case 168: /* *fixuns_truncsf_1 */ |
| 20981 | case 146: /* extendsidi2_1 */ |
| 20982 | case 144: /* *zextsi_doubleword */ |
| 20983 | case 143: /* *zexthi_doubleword */ |
| 20984 | case 142: /* *zextqi_doubleword */ |
| 20985 | case 141: /* *zexthi_doubleword_and */ |
| 20986 | case 140: /* *zextqi_doubleword_and */ |
| 20987 | case 121: /* *pushdf */ |
| 20988 | case 120: /* *pushxf */ |
| 20989 | case 119: /* *pushxf_rounded */ |
| 20990 | case 118: /* *pushxf_rounded */ |
| 20991 | case 117: /* *pushtf */ |
| 20992 | case 56: /* *pushti2 */ |
| 20993 | case 55: /* *pushdi2 */ |
| 20994 | case 48: /* x86_sahf_1 */ |
| 20995 | case 47: /* x86_fnstsw_1 */ |
| 20996 | case 46: /* *cmpxf_si_cc_i387 */ |
| 20997 | case 45: /* *cmpdf_si_cc_i387 */ |
| 20998 | case 44: /* *cmpsf_si_cc_i387 */ |
| 20999 | case 43: /* *cmpxf_hi_cc_i387 */ |
| 21000 | case 42: /* *cmpdf_hi_cc_i387 */ |
| 21001 | case 41: /* *cmpsf_hi_cc_i387 */ |
| 21002 | case 40: /* *cmpxf_si_i387 */ |
| 21003 | case 39: /* *cmpdf_si_i387 */ |
| 21004 | case 38: /* *cmpsf_si_i387 */ |
| 21005 | case 37: /* *cmpxf_hi_i387 */ |
| 21006 | case 36: /* *cmpdf_hi_i387 */ |
| 21007 | case 35: /* *cmpsf_hi_i387 */ |
| 21008 | case 34: /* *cmpuxf_cc_i387 */ |
| 21009 | case 33: /* *cmpudf_cc_i387 */ |
| 21010 | case 32: /* *cmpusf_cc_i387 */ |
| 21011 | case 31: /* *cmpuxf_i387 */ |
| 21012 | case 30: /* *cmpudf_i387 */ |
| 21013 | case 29: /* *cmpusf_i387 */ |
| 21014 | case 28: /* *cmpdf_cc_i387 */ |
| 21015 | case 27: /* *cmpsf_cc_i387 */ |
| 21016 | case 26: /* *cmpdf_i387 */ |
| 21017 | case 25: /* *cmpsf_i387 */ |
| 21018 | case 24: /* *cmpxf_cc_i387 */ |
| 21019 | case 23: /* *cmpxf_i387 */ |
| 21020 | case 22: /* *cmpxf_0_cc_i387 */ |
| 21021 | case 21: /* *cmpdf_0_cc_i387 */ |
| 21022 | case 20: /* *cmpsf_0_cc_i387 */ |
| 21023 | case 19: /* *cmpxf_0_i387 */ |
| 21024 | case 18: /* *cmpdf_0_i387 */ |
| 21025 | case 17: /* *cmpsf_0_i387 */ |
| 21026 | return 6; |
| 21027 | |
| 21028 | case 1178: /* mmx_gtv2si3 */ |
| 21029 | case 1177: /* mmx_gtv4hi3 */ |
| 21030 | case 1176: /* mmx_gtv8qi3 */ |
| 21031 | case 1175: /* *mmx_eqv2si3 */ |
| 21032 | case 1174: /* *mmx_eqv4hi3 */ |
| 21033 | case 1173: /* *mmx_eqv8qi3 */ |
| 21034 | case 1129: /* mmx_gev2sf3 */ |
| 21035 | case 1128: /* mmx_gtv2sf3 */ |
| 21036 | case 1127: /* *mmx_eqv2sf3 */ |
| 21037 | case 393: /* *testqi_ext_2 */ |
| 21038 | case 392: /* *testqi_ext_1 */ |
| 21039 | case 391: /* *testsi_1 */ |
| 21040 | case 390: /* *testhi_1 */ |
| 21041 | case 389: /* *testqi_1 */ |
| 21042 | case 388: /* *testqi_1_maybe_si */ |
| 21043 | case 387: /* *testdi_1 */ |
| 21044 | case 153: /* extendqihi2 */ |
| 21045 | case 152: /* *extendqisi2_zext */ |
| 21046 | case 151: /* extendqisi2 */ |
| 21047 | case 150: /* *extendhisi2_zext */ |
| 21048 | case 149: /* extendhisi2 */ |
| 21049 | case 148: /* extendhidi2 */ |
| 21050 | case 147: /* extendqidi2 */ |
| 21051 | case 145: /* *extendsidi2_rex64 */ |
| 21052 | case 105: /* *extzvdi */ |
| 21053 | case 104: /* *extzvsi */ |
| 21054 | case 103: /* *extzvhi */ |
| 21055 | case 102: /* *extvsi */ |
| 21056 | case 101: /* *extvhi */ |
| 21057 | case 54: /* *cmpiuxf_i387 */ |
| 21058 | case 53: /* *cmpixf_i387 */ |
| 21059 | case 16: /* *cmpqi_ext_4 */ |
| 21060 | case 15: /* *cmpqi_ext_3 */ |
| 21061 | case 14: /* *cmpqi_ext_2 */ |
| 21062 | case 13: /* *cmpqi_ext_1 */ |
| 21063 | case 12: /* *cmpdi_minus_1 */ |
| 21064 | case 11: /* *cmpsi_minus_1 */ |
| 21065 | case 10: /* *cmphi_minus_1 */ |
| 21066 | case 9: /* *cmpqi_minus_1 */ |
| 21067 | case 8: /* *cmpdi_1 */ |
| 21068 | case 7: /* *cmpsi_1 */ |
| 21069 | case 6: /* *cmphi_1 */ |
| 21070 | case 5: /* *cmpqi_1 */ |
| 21071 | case 4: /* *cmpdi_ccno_1 */ |
| 21072 | case 3: /* *cmpsi_ccno_1 */ |
| 21073 | case 2: /* *cmphi_ccno_1 */ |
| 21074 | case 1: /* *cmpqi_ccno_1 */ |
| 21075 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) |
| 21076 | { |
| 21077 | return 1; |
| 21078 | } |
| 21079 | else if (cached_memory == MEMORY_LOAD) |
| 21080 | { |
| 21081 | return 4; |
| 21082 | } |
| 21083 | else |
| 21084 | { |
| 21085 | return 0; |
| 21086 | } |
| 21087 | |
| 21088 | case -1: |
| 21089 | if (GET_CODE (PATTERN (insn)) != ASM_INPUT |
| 21090 | && asm_noperands (PATTERN (insn)) < 0) |
| 21091 | fatal_insn_not_found (insn); |
| 21092 | /* FALLTHRU */ |
| 21093 | case 49: /* *cmpisf */ |
| 21094 | case 50: /* *cmpidf */ |
| 21095 | case 51: /* *cmpiusf */ |
| 21096 | case 52: /* *cmpiudf */ |
| 21097 | case 78: /* *movxi_internal_avx512f */ |
| 21098 | case 79: /* *movoi_internal_avx */ |
| 21099 | case 80: /* *movti_internal */ |
| 21100 | case 81: /* *movdi_internal */ |
| 21101 | case 82: /* *movsi_internal */ |
| 21102 | case 83: /* *movhi_internal */ |
| 21103 | case 84: /* *movqi_internal */ |
| 21104 | case 107: /* *extzvqi */ |
| 21105 | case 124: /* *movtf_internal */ |
| 21106 | case 125: /* *movxf_internal */ |
| 21107 | case 126: /* *movdf_internal */ |
| 21108 | case 127: /* *movsf_internal */ |
| 21109 | case 131: /* *zero_extendsidi2 */ |
| 21110 | case 154: /* *extendsfdf2 */ |
| 21111 | case 155: /* *extendsfxf2_i387 */ |
| 21112 | case 156: /* *extenddfxf2_i387 */ |
| 21113 | case 217: /* *addsi_1 */ |
| 21114 | case 218: /* *adddi_1 */ |
| 21115 | case 219: /* addsi_1_zext */ |
| 21116 | case 220: /* *addhi_1 */ |
| 21117 | case 221: /* *addqi_1 */ |
| 21118 | case 222: /* *addqi_1_slp */ |
| 21119 | case 223: /* *addqi_2 */ |
| 21120 | case 224: /* *addhi_2 */ |
| 21121 | case 225: /* *addsi_2 */ |
| 21122 | case 226: /* *adddi_2 */ |
| 21123 | case 227: /* *addsi_2_zext */ |
| 21124 | case 228: /* *addqi_3 */ |
| 21125 | case 229: /* *addhi_3 */ |
| 21126 | case 230: /* *addsi_3 */ |
| 21127 | case 231: /* *adddi_3 */ |
| 21128 | case 232: /* *addsi_3_zext */ |
| 21129 | case 233: /* *adddi_4 */ |
| 21130 | case 234: /* *addqi_4 */ |
| 21131 | case 235: /* *addhi_4 */ |
| 21132 | case 236: /* *addsi_4 */ |
| 21133 | case 237: /* *addqi_5 */ |
| 21134 | case 238: /* *addhi_5 */ |
| 21135 | case 239: /* *addsi_5 */ |
| 21136 | case 240: /* *adddi_5 */ |
| 21137 | case 241: /* addqi_ext_1 */ |
| 21138 | case 242: /* *addqi_ext_2 */ |
| 21139 | case 243: /* *addvqi4 */ |
| 21140 | case 244: /* *addvhi4 */ |
| 21141 | case 245: /* *addvsi4 */ |
| 21142 | case 246: /* *addvdi4 */ |
| 21143 | case 247: /* *addvqi4_1 */ |
| 21144 | case 248: /* *addvhi4_1 */ |
| 21145 | case 249: /* *addvsi4_1 */ |
| 21146 | case 250: /* *addvdi4_1 */ |
| 21147 | case 271: /* *subqi_1 */ |
| 21148 | case 272: /* *subhi_1 */ |
| 21149 | case 273: /* *subsi_1 */ |
| 21150 | case 274: /* *subdi_1 */ |
| 21151 | case 275: /* *subsi_1_zext */ |
| 21152 | case 277: /* *subqi_2 */ |
| 21153 | case 278: /* *subhi_2 */ |
| 21154 | case 279: /* *subsi_2 */ |
| 21155 | case 280: /* *subdi_2 */ |
| 21156 | case 281: /* *subsi_2_zext */ |
| 21157 | case 282: /* *subvqi4 */ |
| 21158 | case 283: /* *subvhi4 */ |
| 21159 | case 284: /* *subvsi4 */ |
| 21160 | case 285: /* *subvdi4 */ |
| 21161 | case 286: /* *subvqi4_1 */ |
| 21162 | case 287: /* *subvhi4_1 */ |
| 21163 | case 288: /* *subvsi4_1 */ |
| 21164 | case 289: /* *subvdi4_1 */ |
| 21165 | case 290: /* *subqi_3 */ |
| 21166 | case 291: /* *subhi_3 */ |
| 21167 | case 292: /* *subsi_3 */ |
| 21168 | case 293: /* *subdi_3 */ |
| 21169 | case 294: /* *subsi_3_zext */ |
| 21170 | case 295: /* addqi3_carry */ |
| 21171 | case 296: /* addhi3_carry */ |
| 21172 | case 297: /* addsi3_carry */ |
| 21173 | case 298: /* adddi3_carry */ |
| 21174 | case 299: /* *addqi3_carry_0 */ |
| 21175 | case 300: /* *addhi3_carry_0 */ |
| 21176 | case 301: /* *addsi3_carry_0 */ |
| 21177 | case 302: /* *adddi3_carry_0 */ |
| 21178 | case 303: /* *addsi3_carry_zext */ |
| 21179 | case 304: /* *addsi3_carry_zext_0 */ |
| 21180 | case 305: /* addcarrysi */ |
| 21181 | case 306: /* addcarrydi */ |
| 21182 | case 307: /* subqi3_carry */ |
| 21183 | case 308: /* subhi3_carry */ |
| 21184 | case 309: /* subsi3_carry */ |
| 21185 | case 310: /* subdi3_carry */ |
| 21186 | case 311: /* *subqi3_carry_0 */ |
| 21187 | case 312: /* *subhi3_carry_0 */ |
| 21188 | case 313: /* *subsi3_carry_0 */ |
| 21189 | case 314: /* *subdi3_carry_0 */ |
| 21190 | case 315: /* *subsi3_carry_zext */ |
| 21191 | case 316: /* *subsi3_carry_zext_0 */ |
| 21192 | case 317: /* subborrowsi */ |
| 21193 | case 318: /* subborrowdi */ |
| 21194 | case 319: /* *addqi3_cconly_overflow_1 */ |
| 21195 | case 320: /* *addhi3_cconly_overflow_1 */ |
| 21196 | case 321: /* *addsi3_cconly_overflow_1 */ |
| 21197 | case 322: /* *adddi3_cconly_overflow_1 */ |
| 21198 | case 323: /* *addqi3_cc_overflow_1 */ |
| 21199 | case 324: /* *addhi3_cc_overflow_1 */ |
| 21200 | case 325: /* *addsi3_cc_overflow_1 */ |
| 21201 | case 326: /* *adddi3_cc_overflow_1 */ |
| 21202 | case 327: /* *addsi3_zext_cc_overflow_1 */ |
| 21203 | case 328: /* *addqi3_cconly_overflow_2 */ |
| 21204 | case 329: /* *addhi3_cconly_overflow_2 */ |
| 21205 | case 330: /* *addsi3_cconly_overflow_2 */ |
| 21206 | case 331: /* *adddi3_cconly_overflow_2 */ |
| 21207 | case 332: /* *addqi3_cc_overflow_2 */ |
| 21208 | case 333: /* *addhi3_cc_overflow_2 */ |
| 21209 | case 334: /* *addsi3_cc_overflow_2 */ |
| 21210 | case 335: /* *adddi3_cc_overflow_2 */ |
| 21211 | case 336: /* *addsi3_zext_cc_overflow_2 */ |
| 21212 | case 398: /* *anddi_1 */ |
| 21213 | case 399: /* *andsi_1_zext */ |
| 21214 | case 400: /* *andhi_1 */ |
| 21215 | case 401: /* *andsi_1 */ |
| 21216 | case 402: /* *andqi_1 */ |
| 21217 | case 404: /* *anddi_2 */ |
| 21218 | case 405: /* *andsi_2_zext */ |
| 21219 | case 406: /* *andqi_2_maybe_si */ |
| 21220 | case 407: /* *andqi_2 */ |
| 21221 | case 408: /* *andhi_2 */ |
| 21222 | case 409: /* *andsi_2 */ |
| 21223 | case 411: /* andqi_ext_1 */ |
| 21224 | case 412: /* *andqi_ext_1_cc */ |
| 21225 | case 413: /* *andqi_ext_2 */ |
| 21226 | case 423: /* *iorhi_1 */ |
| 21227 | case 424: /* *xorhi_1 */ |
| 21228 | case 425: /* *iorsi_1 */ |
| 21229 | case 426: /* *xorsi_1 */ |
| 21230 | case 427: /* *iordi_1 */ |
| 21231 | case 428: /* *xordi_1 */ |
| 21232 | case 429: /* *iorsi_1_zext */ |
| 21233 | case 430: /* *xorsi_1_zext */ |
| 21234 | case 431: /* *iorsi_1_zext_imm */ |
| 21235 | case 432: /* *xorsi_1_zext_imm */ |
| 21236 | case 433: /* *iorqi_1 */ |
| 21237 | case 434: /* *xorqi_1 */ |
| 21238 | case 437: /* *iorqi_2 */ |
| 21239 | case 438: /* *xorqi_2 */ |
| 21240 | case 439: /* *iorhi_2 */ |
| 21241 | case 440: /* *xorhi_2 */ |
| 21242 | case 441: /* *iorsi_2 */ |
| 21243 | case 442: /* *xorsi_2 */ |
| 21244 | case 443: /* *iordi_2 */ |
| 21245 | case 444: /* *xordi_2 */ |
| 21246 | case 445: /* *iorsi_2_zext */ |
| 21247 | case 446: /* *xorsi_2_zext */ |
| 21248 | case 447: /* *iorsi_2_zext_imm */ |
| 21249 | case 448: /* *xorsi_2_zext_imm */ |
| 21250 | case 451: /* *iorqi_3 */ |
| 21251 | case 452: /* *xorqi_3 */ |
| 21252 | case 453: /* *iorhi_3 */ |
| 21253 | case 454: /* *xorhi_3 */ |
| 21254 | case 455: /* *iorsi_3 */ |
| 21255 | case 456: /* *xorsi_3 */ |
| 21256 | case 457: /* *iordi_3 */ |
| 21257 | case 458: /* *xordi_3 */ |
| 21258 | case 459: /* *iorqi_ext_1 */ |
| 21259 | case 460: /* *xorqi_ext_1 */ |
| 21260 | case 461: /* *iorqi_ext_2 */ |
| 21261 | case 462: /* *xorqi_ext_2 */ |
| 21262 | case 463: /* *xorqi_ext_1_cc */ |
| 21263 | case 521: /* *ashlsi3_1 */ |
| 21264 | case 522: /* *ashldi3_1 */ |
| 21265 | case 524: /* *ashlsi3_1_zext */ |
| 21266 | case 525: /* *ashlhi3_1 */ |
| 21267 | case 526: /* *ashlqi3_1 */ |
| 21268 | case 527: /* *ashlqi3_1_slp */ |
| 21269 | case 528: /* *ashlqi3_cmp */ |
| 21270 | case 529: /* *ashlhi3_cmp */ |
| 21271 | case 530: /* *ashlsi3_cmp */ |
| 21272 | case 531: /* *ashldi3_cmp */ |
| 21273 | case 532: /* *ashlsi3_cmp_zext */ |
| 21274 | case 533: /* *ashlqi3_cconly */ |
| 21275 | case 534: /* *ashlhi3_cconly */ |
| 21276 | case 535: /* *ashlsi3_cconly */ |
| 21277 | case 536: /* *ashldi3_cconly */ |
| 21278 | case 547: /* ashrdi3_cvt */ |
| 21279 | case 548: /* *ashrsi3_cvt_zext */ |
| 21280 | case 549: /* ashrsi3_cvt */ |
| 21281 | case 780: /* *bswapsi2_movbe */ |
| 21282 | case 781: /* *bswapdi2_movbe */ |
| 21283 | case 812: /* *fop_sf_comm */ |
| 21284 | case 813: /* *fop_df_comm */ |
| 21285 | case 815: /* *fop_sf_1 */ |
| 21286 | case 816: /* *fop_df_1 */ |
| 21287 | case 817: /* *fop_sf_2_i387 */ |
| 21288 | case 818: /* *fop_df_2_i387 */ |
| 21289 | case 819: /* *fop_sf_2_i387 */ |
| 21290 | case 820: /* *fop_df_2_i387 */ |
| 21291 | case 821: /* *fop_sf_3_i387 */ |
| 21292 | case 822: /* *fop_df_3_i387 */ |
| 21293 | case 823: /* *fop_sf_3_i387 */ |
| 21294 | case 824: /* *fop_df_3_i387 */ |
| 21295 | case 825: /* *fop_df_4_i387 */ |
| 21296 | case 826: /* *fop_df_5_i387 */ |
| 21297 | case 827: /* *fop_df_6_i387 */ |
| 21298 | case 828: /* *fop_xf_comm_i387 */ |
| 21299 | case 829: /* *fop_xf_1_i387 */ |
| 21300 | case 830: /* *fop_xf_2_i387 */ |
| 21301 | case 831: /* *fop_xf_2_i387 */ |
| 21302 | case 832: /* *fop_xf_3_i387 */ |
| 21303 | case 833: /* *fop_xf_3_i387 */ |
| 21304 | case 834: /* *fop_xf_4_i387 */ |
| 21305 | case 835: /* *fop_xf_4_i387 */ |
| 21306 | case 836: /* *fop_xf_5_i387 */ |
| 21307 | case 837: /* *fop_xf_5_i387 */ |
| 21308 | case 838: /* *fop_xf_6_i387 */ |
| 21309 | case 839: /* *fop_xf_6_i387 */ |
| 21310 | case 993: /* pro_epilogue_adjust_stack_si_add */ |
| 21311 | case 994: /* pro_epilogue_adjust_stack_di_add */ |
| 21312 | case 995: /* pro_epilogue_adjust_stack_si_sub */ |
| 21313 | case 996: /* pro_epilogue_adjust_stack_di_sub */ |
| 21314 | case 1106: /* *movv8qi_internal */ |
| 21315 | case 1107: /* *movv4hi_internal */ |
| 21316 | case 1108: /* *movv2si_internal */ |
| 21317 | case 1109: /* *movv1di_internal */ |
| 21318 | case 1110: /* *movv2sf_internal */ |
| 21319 | case 1119: /* mmx_rcpv2sf2 */ |
| 21320 | case 1120: /* mmx_rcpit1v2sf3 */ |
| 21321 | case 1121: /* mmx_rcpit2v2sf3 */ |
| 21322 | case 1122: /* mmx_rsqrtv2sf2 */ |
| 21323 | case 1123: /* mmx_rsqit1v2sf3 */ |
| 21324 | case 1138: /* *vec_extractv2sf_1 */ |
| 21325 | case 1208: /* *vec_extractv2si_1 */ |
| 21326 | case 1218: /* movv64qi_internal */ |
| 21327 | case 1219: /* movv32qi_internal */ |
| 21328 | case 1220: /* movv16qi_internal */ |
| 21329 | case 1221: /* movv32hi_internal */ |
| 21330 | case 1222: /* movv16hi_internal */ |
| 21331 | case 1223: /* movv8hi_internal */ |
| 21332 | case 1224: /* movv16si_internal */ |
| 21333 | case 1225: /* movv8si_internal */ |
| 21334 | case 1226: /* movv4si_internal */ |
| 21335 | case 1227: /* movv8di_internal */ |
| 21336 | case 1228: /* movv4di_internal */ |
| 21337 | case 1229: /* movv2di_internal */ |
| 21338 | case 1230: /* movv4ti_internal */ |
| 21339 | case 1231: /* movv2ti_internal */ |
| 21340 | case 1232: /* movv1ti_internal */ |
| 21341 | case 1233: /* movv16sf_internal */ |
| 21342 | case 1234: /* movv8sf_internal */ |
| 21343 | case 1235: /* movv4sf_internal */ |
| 21344 | case 1236: /* movv8df_internal */ |
| 21345 | case 1237: /* movv4df_internal */ |
| 21346 | case 1238: /* movv2df_internal */ |
| 21347 | case 2452: /* sse_loadlps */ |
| 21348 | case 2459: /* *vec_concatv2sf_sse4_1 */ |
| 21349 | case 2460: /* *vec_concatv2sf_sse */ |
| 21350 | case 2462: /* vec_setv4si_0 */ |
| 21351 | case 2463: /* vec_setv4sf_0 */ |
| 21352 | case 2536: /* *vec_interleave_highv2df */ |
| 21353 | case 2542: /* *vec_interleave_lowv2df */ |
| 21354 | case 2726: /* sse2_storehpd */ |
| 21355 | case 2728: /* sse2_storelpd */ |
| 21356 | case 2730: /* sse2_loadhpd */ |
| 21357 | case 2731: /* sse2_loadlpd */ |
| 21358 | case 2732: /* sse2_movsd */ |
| 21359 | case 2735: /* vec_concatv2df */ |
| 21360 | case 3080: /* *ashrv16hi3 */ |
| 21361 | case 3081: /* ashrv16hi3_mask */ |
| 21362 | case 3082: /* *ashrv8hi3 */ |
| 21363 | case 3083: /* ashrv8hi3_mask */ |
| 21364 | case 3084: /* *ashrv8si3 */ |
| 21365 | case 3085: /* ashrv8si3_mask */ |
| 21366 | case 3086: /* *ashrv4si3 */ |
| 21367 | case 3087: /* ashrv4si3_mask */ |
| 21368 | case 3088: /* ashrv16hi3 */ |
| 21369 | case 3089: /* ashrv8hi3 */ |
| 21370 | case 3090: /* ashrv8si3 */ |
| 21371 | case 3091: /* ashrv4si3 */ |
| 21372 | case 3092: /* *ashrv2di3 */ |
| 21373 | case 3093: /* ashrv2di3_mask */ |
| 21374 | case 3094: /* ashrv32hi3 */ |
| 21375 | case 3095: /* ashrv32hi3_mask */ |
| 21376 | case 3096: /* ashrv4di3 */ |
| 21377 | case 3097: /* ashrv4di3_mask */ |
| 21378 | case 3098: /* ashrv16si3 */ |
| 21379 | case 3099: /* ashrv16si3_mask */ |
| 21380 | case 3100: /* ashrv8di3 */ |
| 21381 | case 3101: /* ashrv8di3_mask */ |
| 21382 | case 3102: /* ashlv32hi3 */ |
| 21383 | case 3103: /* ashlv32hi3_mask */ |
| 21384 | case 3104: /* lshrv32hi3 */ |
| 21385 | case 3105: /* lshrv32hi3_mask */ |
| 21386 | case 3106: /* ashlv16hi3 */ |
| 21387 | case 3107: /* ashlv16hi3_mask */ |
| 21388 | case 3108: /* lshrv16hi3 */ |
| 21389 | case 3109: /* lshrv16hi3_mask */ |
| 21390 | case 3110: /* ashlv8hi3 */ |
| 21391 | case 3111: /* ashlv8hi3_mask */ |
| 21392 | case 3112: /* lshrv8hi3 */ |
| 21393 | case 3113: /* lshrv8hi3_mask */ |
| 21394 | case 3114: /* ashlv8si3 */ |
| 21395 | case 3115: /* ashlv8si3_mask */ |
| 21396 | case 3116: /* lshrv8si3 */ |
| 21397 | case 3117: /* lshrv8si3_mask */ |
| 21398 | case 3118: /* ashlv4si3 */ |
| 21399 | case 3119: /* ashlv4si3_mask */ |
| 21400 | case 3120: /* lshrv4si3 */ |
| 21401 | case 3121: /* lshrv4si3_mask */ |
| 21402 | case 3122: /* ashlv4di3 */ |
| 21403 | case 3123: /* ashlv4di3_mask */ |
| 21404 | case 3124: /* lshrv4di3 */ |
| 21405 | case 3125: /* lshrv4di3_mask */ |
| 21406 | case 3126: /* ashlv2di3 */ |
| 21407 | case 3127: /* ashlv2di3_mask */ |
| 21408 | case 3128: /* lshrv2di3 */ |
| 21409 | case 3129: /* lshrv2di3_mask */ |
| 21410 | case 3130: /* ashlv16si3 */ |
| 21411 | case 3131: /* ashlv16si3_mask */ |
| 21412 | case 3132: /* lshrv16si3 */ |
| 21413 | case 3133: /* lshrv16si3_mask */ |
| 21414 | case 3134: /* ashlv8di3 */ |
| 21415 | case 3135: /* ashlv8di3_mask */ |
| 21416 | case 3136: /* lshrv8di3 */ |
| 21417 | case 3137: /* lshrv8di3_mask */ |
| 21418 | case 3634: /* *vec_extractv4si */ |
| 21419 | case 3638: /* *vec_extractv2di_1 */ |
| 21420 | case 3639: /* *vec_concatv2si_sse4_1 */ |
| 21421 | case 3640: /* *vec_concatv2si */ |
| 21422 | case 3641: /* *vec_concatv4si */ |
| 21423 | case 3642: /* vec_concatv2di */ |
| 21424 | case 4195: /* vec_dupv4sf */ |
| 21425 | case 4196: /* *vec_dupv4si */ |
| 21426 | case 4197: /* *vec_dupv2di */ |
| 21427 | case 4212: /* avx_vbroadcastf128_v32qi */ |
| 21428 | case 4213: /* avx_vbroadcastf128_v16hi */ |
| 21429 | case 4214: /* avx_vbroadcastf128_v8si */ |
| 21430 | case 4215: /* avx_vbroadcastf128_v4di */ |
| 21431 | case 4216: /* avx_vbroadcastf128_v8sf */ |
| 21432 | case 4217: /* avx_vbroadcastf128_v4df */ |
| 21433 | case 4250: /* *avx_vperm_broadcast_v4sf */ |
| 21434 | case 4490: /* avx_vec_concatv32qi */ |
| 21435 | case 4491: /* avx_vec_concatv16hi */ |
| 21436 | case 4492: /* avx_vec_concatv8si */ |
| 21437 | case 4493: /* avx_vec_concatv4di */ |
| 21438 | case 4494: /* avx_vec_concatv8sf */ |
| 21439 | case 4495: /* avx_vec_concatv4df */ |
| 21440 | case 4496: /* avx_vec_concatv64qi */ |
| 21441 | case 4497: /* avx_vec_concatv32hi */ |
| 21442 | case 4498: /* avx_vec_concatv16si */ |
| 21443 | case 4499: /* avx_vec_concatv8di */ |
| 21444 | case 4500: /* avx_vec_concatv16sf */ |
| 21445 | case 4501: /* avx_vec_concatv8df */ |
| 21446 | if (((cached_type = get_attr_type (insn)) == TYPE_OTHER) || (cached_type == TYPE_MULTI) || (cached_type == TYPE_STR)) |
| 21447 | { |
| 21448 | return 6; |
| 21449 | } |
| 21450 | else if ((cached_type == TYPE_CALL) || (cached_type == TYPE_CALLV)) |
| 21451 | { |
| 21452 | return 1; |
| 21453 | } |
| 21454 | else if (((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) && ((cached_type == TYPE_IMOV) || (cached_type == TYPE_IMOVX))) |
| 21455 | { |
| 21456 | return 1; |
| 21457 | } |
| 21458 | else if ((cached_memory == MEMORY_LOAD) && ((cached_type == TYPE_IMOV) || (cached_type == TYPE_IMOVX))) |
| 21459 | { |
| 21460 | return 4; |
| 21461 | } |
| 21462 | else if ((cached_memory == MEMORY_STORE) && (cached_type == TYPE_IMOV)) |
| 21463 | { |
| 21464 | return 1; |
| 21465 | } |
| 21466 | else if ((cached_memory == MEMORY_NONE) && (cached_type == TYPE_ICMOV)) |
| 21467 | { |
| 21468 | return 2; |
| 21469 | } |
| 21470 | else if ((cached_memory == MEMORY_LOAD) && (cached_type == TYPE_ICMOV)) |
| 21471 | { |
| 21472 | return 2; |
| 21473 | } |
| 21474 | else if ((cached_memory == MEMORY_STORE) && (cached_type == TYPE_PUSH)) |
| 21475 | { |
| 21476 | return 1; |
| 21477 | } |
| 21478 | else if ((cached_memory == MEMORY_BOTH) && (cached_type == TYPE_PUSH)) |
| 21479 | { |
| 21480 | return 1; |
| 21481 | } |
| 21482 | else if ((cached_memory == MEMORY_NONE) && (cached_type == TYPE_LEA)) |
| 21483 | { |
| 21484 | return 1; |
| 21485 | } |
| 21486 | else if ((cached_memory == MEMORY_NONE) && ((cached_type == TYPE_ISHIFT) || (cached_type == TYPE_ISHIFT1) || (cached_type == TYPE_ROTATE) || (cached_type == TYPE_ROTATE1))) |
| 21487 | { |
| 21488 | return 1; |
| 21489 | } |
| 21490 | else if ((! (cached_memory == MEMORY_NONE)) && ((cached_type == TYPE_ISHIFT) || (cached_type == TYPE_ISHIFT1) || (cached_type == TYPE_ROTATE) || (cached_type == TYPE_ROTATE1))) |
| 21491 | { |
| 21492 | return 4; |
| 21493 | } |
| 21494 | else if ((cached_memory == MEMORY_NONE) && (cached_type == TYPE_IBR)) |
| 21495 | { |
| 21496 | return 1; |
| 21497 | } |
| 21498 | else if ((! (cached_memory == MEMORY_NONE)) && (cached_type == TYPE_IBR)) |
| 21499 | { |
| 21500 | return 6; |
| 21501 | } |
| 21502 | else if (cached_type == TYPE_LEAVE) |
| 21503 | { |
| 21504 | return 4; |
| 21505 | } |
| 21506 | else if ((cached_memory == MEMORY_NONE) && (((cached_mode = get_attr_mode (insn)) == MODE_HI) || (cached_mode == MODE_SI)) && (cached_type == TYPE_IMUL)) |
| 21507 | { |
| 21508 | return 3; |
| 21509 | } |
| 21510 | else if ((! (cached_memory == MEMORY_NONE)) && (((cached_mode = get_attr_mode (insn)) == MODE_HI) || (cached_mode == MODE_SI)) && (cached_type == TYPE_IMUL)) |
| 21511 | { |
| 21512 | return 3; |
| 21513 | } |
| 21514 | else if ((cached_memory == MEMORY_NONE) && ((cached_mode = get_attr_mode (insn)) == MODE_DI) && (cached_type == TYPE_IMUL)) |
| 21515 | { |
| 21516 | return 5; |
| 21517 | } |
| 21518 | else if ((! (cached_memory == MEMORY_NONE)) && ((cached_mode = get_attr_mode (insn)) == MODE_DI) && (cached_type == TYPE_IMUL)) |
| 21519 | { |
| 21520 | return 5; |
| 21521 | } |
| 21522 | else if ((cached_memory == MEMORY_NONE) && ((cached_mode = get_attr_mode (insn)) == MODE_QI) && (cached_type == TYPE_IDIV)) |
| 21523 | { |
| 21524 | return 19 /* 0x13 */; |
| 21525 | } |
| 21526 | else if ((cached_memory == MEMORY_LOAD) && ((cached_mode = get_attr_mode (insn)) == MODE_QI) && (cached_type == TYPE_IDIV)) |
| 21527 | { |
| 21528 | return 19 /* 0x13 */; |
| 21529 | } |
| 21530 | else if ((cached_memory == MEMORY_NONE) && ((cached_mode = get_attr_mode (insn)) == MODE_HI) && (cached_type == TYPE_IDIV)) |
| 21531 | { |
| 21532 | return 23 /* 0x17 */; |
| 21533 | } |
| 21534 | else if ((cached_memory == MEMORY_LOAD) && ((cached_mode = get_attr_mode (insn)) == MODE_HI) && (cached_type == TYPE_IDIV)) |
| 21535 | { |
| 21536 | return 23 /* 0x17 */; |
| 21537 | } |
| 21538 | else if ((cached_memory == MEMORY_NONE) && ((cached_mode = get_attr_mode (insn)) == MODE_SI) && (cached_type == TYPE_IDIV)) |
| 21539 | { |
| 21540 | return 39 /* 0x27 */; |
| 21541 | } |
| 21542 | else if ((cached_memory == MEMORY_LOAD) && ((cached_mode = get_attr_mode (insn)) == MODE_SI) && (cached_type == TYPE_IDIV)) |
| 21543 | { |
| 21544 | return 39 /* 0x27 */; |
| 21545 | } |
| 21546 | else if (cached_type == TYPE_FXCH) |
| 21547 | { |
| 21548 | return 0; |
| 21549 | } |
| 21550 | else if (((cached_memory == MEMORY_NONE) || (cached_memory == MEMORY_UNKNOWN)) && (cached_type == TYPE_FOP)) |
| 21551 | { |
| 21552 | return 3; |
| 21553 | } |
| 21554 | else if ((cached_memory == MEMORY_LOAD) && (cached_type == TYPE_FOP)) |
| 21555 | { |
| 21556 | return 5; |
| 21557 | } |
| 21558 | else if ((cached_memory == MEMORY_STORE) && (cached_type == TYPE_FOP)) |
| 21559 | { |
| 21560 | return 3; |
| 21561 | } |
| 21562 | else if ((cached_memory == MEMORY_BOTH) && (cached_type == TYPE_FOP)) |
| 21563 | { |
| 21564 | return 5; |
| 21565 | } |
| 21566 | else if (cached_type == TYPE_FSGN) |
| 21567 | { |
| 21568 | return 1; |
| 21569 | } |
| 21570 | else if (cached_type == TYPE_FISTP) |
| 21571 | { |
| 21572 | return 5; |
| 21573 | } |
| 21574 | else if (cached_type == TYPE_FCMOV) |
| 21575 | { |
| 21576 | return 2; |
| 21577 | } |
| 21578 | else if ((cached_memory == MEMORY_NONE) && (cached_type == TYPE_FCMP)) |
| 21579 | { |
| 21580 | return 1; |
| 21581 | } |
| 21582 | else if ((cached_memory == MEMORY_LOAD) && (cached_type == TYPE_FCMP)) |
| 21583 | { |
| 21584 | return 4; |
| 21585 | } |
| 21586 | else if ((cached_memory == MEMORY_NONE) && (cached_type == TYPE_FMOV)) |
| 21587 | { |
| 21588 | return 1; |
| 21589 | } |
| 21590 | else if ((cached_memory == MEMORY_LOAD) && (! ((cached_mode = get_attr_mode (insn)) == MODE_XF)) && (cached_type == TYPE_FMOV)) |
| 21591 | { |
| 21592 | return 1; |
| 21593 | } |
| 21594 | else if ((cached_memory == MEMORY_LOAD) && ((cached_mode = get_attr_mode (insn)) == MODE_XF) && (cached_type == TYPE_FMOV)) |
| 21595 | { |
| 21596 | return 3; |
| 21597 | } |
| 21598 | else if ((cached_memory == MEMORY_STORE) && (! ((cached_mode = get_attr_mode (insn)) == MODE_XF)) && (cached_type == TYPE_FMOV)) |
| 21599 | { |
| 21600 | return 1; |
| 21601 | } |
| 21602 | else if ((cached_memory == MEMORY_STORE) && ((cached_mode = get_attr_mode (insn)) == MODE_XF) && (cached_type == TYPE_FMOV)) |
| 21603 | { |
| 21604 | return 3; |
| 21605 | } |
| 21606 | else if ((cached_memory == MEMORY_NONE) && (cached_type == TYPE_FMUL)) |
| 21607 | { |
| 21608 | return 5; |
| 21609 | } |
| 21610 | else if ((cached_memory == MEMORY_LOAD) && (cached_type == TYPE_FMUL)) |
| 21611 | { |
| 21612 | return 6; |
| 21613 | } |
| 21614 | else if ((cached_memory == MEMORY_NONE) && ((cached_mode = get_attr_mode (insn)) == MODE_SF) && ((cached_type == TYPE_FDIV) || (cached_type == TYPE_FPSPC))) |
| 21615 | { |
| 21616 | return 18 /* 0x12 */; |
| 21617 | } |
| 21618 | else if ((cached_memory == MEMORY_LOAD) && ((cached_mode = get_attr_mode (insn)) == MODE_SF) && ((cached_type == TYPE_FDIV) || (cached_type == TYPE_FPSPC))) |
| 21619 | { |
| 21620 | return 19 /* 0x13 */; |
| 21621 | } |
| 21622 | else if ((cached_memory == MEMORY_NONE) && ((cached_mode = get_attr_mode (insn)) == MODE_DF) && ((cached_type == TYPE_FDIV) || (cached_type == TYPE_FPSPC))) |
| 21623 | { |
| 21624 | return 32 /* 0x20 */; |
| 21625 | } |
| 21626 | else if ((cached_memory == MEMORY_LOAD) && ((cached_mode = get_attr_mode (insn)) == MODE_DF) && ((cached_type == TYPE_FDIV) || (cached_type == TYPE_FPSPC))) |
| 21627 | { |
| 21628 | return 33 /* 0x21 */; |
| 21629 | } |
| 21630 | else if ((cached_memory == MEMORY_NONE) && ((cached_mode = get_attr_mode (insn)) == MODE_XF) && ((cached_type == TYPE_FDIV) || (cached_type == TYPE_FPSPC))) |
| 21631 | { |
| 21632 | return 38 /* 0x26 */; |
| 21633 | } |
| 21634 | else if ((cached_memory == MEMORY_LOAD) && ((cached_mode = get_attr_mode (insn)) == MODE_XF) && ((cached_type == TYPE_FDIV) || (cached_type == TYPE_FPSPC))) |
| 21635 | { |
| 21636 | return 39 /* 0x27 */; |
| 21637 | } |
| 21638 | else if ((cached_memory == MEMORY_NONE) && ((cached_type == TYPE_MMXADD) || (cached_type == TYPE_SSEIADD))) |
| 21639 | { |
| 21640 | return 1; |
| 21641 | } |
| 21642 | else if ((cached_memory == MEMORY_LOAD) && ((cached_type == TYPE_MMXADD) || (cached_type == TYPE_SSEIADD))) |
| 21643 | { |
| 21644 | return 2; |
| 21645 | } |
| 21646 | else if ((cached_memory == MEMORY_NONE) && (cached_type == TYPE_MMXSHFT)) |
| 21647 | { |
| 21648 | return 1; |
| 21649 | } |
| 21650 | else if ((cached_memory == MEMORY_LOAD) && (cached_type == TYPE_MMXSHFT)) |
| 21651 | { |
| 21652 | return 2; |
| 21653 | } |
| 21654 | else if ((cached_memory == MEMORY_NONE) && (cached_type == TYPE_SSEISHFT) && (! ((cached_length_immediate = get_attr_length_immediate (insn)) == 0))) |
| 21655 | { |
| 21656 | return 1; |
| 21657 | } |
| 21658 | else if ((cached_memory == MEMORY_LOAD) && (cached_type == TYPE_SSEISHFT) && (! ((cached_length_immediate = get_attr_length_immediate (insn)) == 0))) |
| 21659 | { |
| 21660 | return 2; |
| 21661 | } |
| 21662 | else if ((cached_memory == MEMORY_NONE) && (cached_type == TYPE_SSEISHFT) && ((cached_length_immediate = get_attr_length_immediate (insn)) == 0)) |
| 21663 | { |
| 21664 | return 2; |
| 21665 | } |
| 21666 | else if ((cached_memory == MEMORY_LOAD) && (cached_type == TYPE_SSEISHFT) && ((cached_length_immediate = get_attr_length_immediate (insn)) == 0)) |
| 21667 | { |
| 21668 | return 3; |
| 21669 | } |
| 21670 | else if ((cached_memory == MEMORY_NONE) && ((cached_type == TYPE_MMXMUL) || (cached_type == TYPE_SSEIMUL))) |
| 21671 | { |
| 21672 | return 3; |
| 21673 | } |
| 21674 | else if ((cached_memory == MEMORY_NONE) && ((cached_type == TYPE_MMXMUL) || (cached_type == TYPE_SSEIMUL))) |
| 21675 | { |
| 21676 | return 3; |
| 21677 | } |
| 21678 | else if (((cached_mode = get_attr_mode (insn)) == MODE_DI) && (cached_type == TYPE_MMXCVT)) |
| 21679 | { |
| 21680 | return 4; |
| 21681 | } |
| 21682 | else if ((cached_memory == MEMORY_UNKNOWN) && (cached_type == TYPE_SSE)) |
| 21683 | { |
| 21684 | return 3; |
| 21685 | } |
| 21686 | else if (((cached_mode == MODE_SF) || (cached_mode == MODE_DF)) && (cached_type == TYPE_SSE)) |
| 21687 | { |
| 21688 | return 3; |
| 21689 | } |
| 21690 | else if ((cached_mode == MODE_V4SF) && (cached_type == TYPE_SSE)) |
| 21691 | { |
| 21692 | return 4; |
| 21693 | } |
| 21694 | else if ((cached_memory == MEMORY_NONE) && ((cached_type == TYPE_SSEADD) || (cached_type == TYPE_SSEADD1) || (cached_type == TYPE_SSECMP) || (cached_type == TYPE_SSECOMI))) |
| 21695 | { |
| 21696 | return 3; |
| 21697 | } |
| 21698 | else if ((cached_memory == MEMORY_LOAD) && ((cached_type == TYPE_SSEADD) || (cached_type == TYPE_SSEADD1) || (cached_type == TYPE_SSECMP) || (cached_type == TYPE_SSECOMI))) |
| 21699 | { |
| 21700 | return 3; |
| 21701 | } |
| 21702 | else if ((cached_memory == MEMORY_NONE) && ((cached_mode == MODE_SF) || (cached_mode == MODE_V4SF)) && (cached_type == TYPE_SSEMUL)) |
| 21703 | { |
| 21704 | return 4; |
| 21705 | } |
| 21706 | else if ((cached_memory == MEMORY_LOAD) && ((cached_mode == MODE_SF) || (cached_mode == MODE_V4SF)) && (cached_type == TYPE_SSEMUL)) |
| 21707 | { |
| 21708 | return 4; |
| 21709 | } |
| 21710 | else if ((cached_memory == MEMORY_NONE) && ((cached_mode == MODE_DF) || (cached_mode == MODE_V2DF)) && (cached_type == TYPE_SSEMUL)) |
| 21711 | { |
| 21712 | return 5; |
| 21713 | } |
| 21714 | else if ((cached_memory == MEMORY_LOAD) && ((cached_mode == MODE_DF) || (cached_mode == MODE_V2DF)) && (cached_type == TYPE_SSEMUL)) |
| 21715 | { |
| 21716 | return 5; |
| 21717 | } |
| 21718 | else if ((cached_memory == MEMORY_NONE) && ((cached_mode == MODE_SF) || (cached_mode == MODE_V4SF)) && (cached_type == TYPE_SSEDIV)) |
| 21719 | { |
| 21720 | return 18 /* 0x12 */; |
| 21721 | } |
| 21722 | else if ((cached_memory == MEMORY_NONE) && ((cached_mode == MODE_SF) || (cached_mode == MODE_V4SF)) && (cached_type == TYPE_SSEDIV)) |
| 21723 | { |
| 21724 | return 18 /* 0x12 */; |
| 21725 | } |
| 21726 | else if ((cached_memory == MEMORY_NONE) && ((cached_mode == MODE_DF) || (cached_mode == MODE_V2DF)) && (cached_type == TYPE_SSEDIV)) |
| 21727 | { |
| 21728 | return 32 /* 0x20 */; |
| 21729 | } |
| 21730 | else if ((cached_memory == MEMORY_NONE) && ((cached_mode == MODE_DF) || (cached_mode == MODE_V2DF)) && (cached_type == TYPE_SSEDIV)) |
| 21731 | { |
| 21732 | return 32 /* 0x20 */; |
| 21733 | } |
| 21734 | else if ((cached_memory == MEMORY_NONE) && (cached_mode == MODE_SF) && (cached_type == TYPE_SSEICVT)) |
| 21735 | { |
| 21736 | return 4; |
| 21737 | } |
| 21738 | else if ((! (cached_memory == MEMORY_NONE)) && (cached_mode == MODE_SF) && (cached_type == TYPE_SSEICVT)) |
| 21739 | { |
| 21740 | return 4; |
| 21741 | } |
| 21742 | else if ((cached_memory == MEMORY_NONE) && (cached_mode == MODE_DF) && (cached_type == TYPE_SSEICVT)) |
| 21743 | { |
| 21744 | return 4; |
| 21745 | } |
| 21746 | else if ((! (cached_memory == MEMORY_NONE)) && (cached_mode == MODE_DF) && (cached_type == TYPE_SSEICVT)) |
| 21747 | { |
| 21748 | return 4; |
| 21749 | } |
| 21750 | else if ((cached_memory == MEMORY_NONE) && (cached_mode == MODE_SI) && (cached_type == TYPE_SSEICVT)) |
| 21751 | { |
| 21752 | return 3; |
| 21753 | } |
| 21754 | else if ((! (cached_memory == MEMORY_NONE)) && (cached_mode == MODE_SI) && (cached_type == TYPE_SSEICVT)) |
| 21755 | { |
| 21756 | return 3; |
| 21757 | } |
| 21758 | else if ((cached_memory == MEMORY_NONE) && (cached_type == TYPE_SSEMOV)) |
| 21759 | { |
| 21760 | return 1; |
| 21761 | } |
| 21762 | else if ((cached_memory == MEMORY_LOAD) && (cached_type == TYPE_SSEMOV)) |
| 21763 | { |
| 21764 | return 2; |
| 21765 | } |
| 21766 | else if ((cached_memory == MEMORY_STORE) && (cached_type == TYPE_SSEMOV)) |
| 21767 | { |
| 21768 | return 1; |
| 21769 | } |
| 21770 | else if (((cached_memory == MEMORY_NONE) || (cached_memory == MEMORY_UNKNOWN)) && ((cached_type == TYPE_ALU) || (cached_type == TYPE_ALU1) || (cached_type == TYPE_NEGNOT) || (cached_type == TYPE_INCDEC) || (cached_type == TYPE_ICMP) || (cached_type == TYPE_TEST) || (cached_type == TYPE_SETCC) || (cached_type == TYPE_SSEISHFT1) || (cached_type == TYPE_MMX) || (cached_type == TYPE_MMXCMP))) |
| 21771 | { |
| 21772 | return 1; |
| 21773 | } |
| 21774 | else if ((cached_memory == MEMORY_LOAD) && ((cached_type == TYPE_ALU) || (cached_type == TYPE_ALU1) || (cached_type == TYPE_NEGNOT) || (cached_type == TYPE_INCDEC) || (cached_type == TYPE_ICMP) || (cached_type == TYPE_TEST) || (cached_type == TYPE_SETCC) || (cached_type == TYPE_POP) || (cached_type == TYPE_SSEISHFT1) || (cached_type == TYPE_MMX) || (cached_type == TYPE_MMXCMP))) |
| 21775 | { |
| 21776 | return 4; |
| 21777 | } |
| 21778 | else if ((cached_memory == MEMORY_STORE) && ((cached_type == TYPE_ALU) || (cached_type == TYPE_ALU1) || (cached_type == TYPE_NEGNOT) || (cached_type == TYPE_INCDEC) || (cached_type == TYPE_ICMP) || (cached_type == TYPE_TEST) || (cached_type == TYPE_SETCC) || (cached_type == TYPE_SSEISHFT1) || (cached_type == TYPE_MMX) || (cached_type == TYPE_MMXCMP))) |
| 21779 | { |
| 21780 | return 1; |
| 21781 | } |
| 21782 | else if ((cached_memory == MEMORY_BOTH) && ((cached_type == TYPE_ALU) || (cached_type == TYPE_ALU1) || (cached_type == TYPE_NEGNOT) || (cached_type == TYPE_INCDEC) || (cached_type == TYPE_ICMP) || (cached_type == TYPE_TEST) || (cached_type == TYPE_SETCC) || (cached_type == TYPE_POP) || (cached_type == TYPE_SSEISHFT1) || (cached_type == TYPE_MMX) || (cached_type == TYPE_MMXCMP))) |
| 21783 | { |
| 21784 | return 4; |
| 21785 | } |
| 21786 | else |
| 21787 | { |
| 21788 | return 0; |
| 21789 | } |
| 21790 | |
| 21791 | default: |
| 21792 | return 0; |
| 21793 | |
| 21794 | } |
| 21795 | } |
| 21796 | |
| 21797 | int |
| 21798 | insn_default_latency_nehalem (rtx_insn *insn ATTRIBUTE_UNUSED) |
| 21799 | { |
| 21800 | enum attr_memory cached_memory ATTRIBUTE_UNUSED; |
| 21801 | enum attr_type cached_type ATTRIBUTE_UNUSED; |
| 21802 | enum attr_mode cached_mode ATTRIBUTE_UNUSED; |
| 21803 | int cached_length_immediate ATTRIBUTE_UNUSED; |
| 21804 | |
| 21805 | switch (recog_memoized (insn)) |
| 21806 | { |
| 21807 | case 4489: /* avx512bw_lshrvv32hi_mask */ |
| 21808 | case 4488: /* avx512bw_lshrvv32hi */ |
| 21809 | case 4487: /* avx512bw_ashlvv32hi_mask */ |
| 21810 | case 4486: /* avx512bw_ashlvv32hi */ |
| 21811 | case 4485: /* avx512vl_lshrvv16hi_mask */ |
| 21812 | case 4484: /* avx512vl_lshrvv16hi */ |
| 21813 | case 4483: /* avx512vl_ashlvv16hi_mask */ |
| 21814 | case 4482: /* avx512vl_ashlvv16hi */ |
| 21815 | case 4481: /* avx512vl_lshrvv8hi_mask */ |
| 21816 | case 4480: /* avx512vl_lshrvv8hi */ |
| 21817 | case 4479: /* avx512vl_ashlvv8hi_mask */ |
| 21818 | case 4478: /* avx512vl_ashlvv8hi */ |
| 21819 | case 4477: /* avx2_lshrvv2di_mask */ |
| 21820 | case 4476: /* avx2_lshrvv2di */ |
| 21821 | case 4475: /* avx2_ashlvv2di_mask */ |
| 21822 | case 4474: /* avx2_ashlvv2di */ |
| 21823 | case 4473: /* avx2_lshrvv4di_mask */ |
| 21824 | case 4472: /* avx2_lshrvv4di */ |
| 21825 | case 4471: /* avx2_ashlvv4di_mask */ |
| 21826 | case 4470: /* avx2_ashlvv4di */ |
| 21827 | case 4469: /* avx512f_lshrvv8di_mask */ |
| 21828 | case 4468: /* avx512f_lshrvv8di */ |
| 21829 | case 4467: /* avx512f_ashlvv8di_mask */ |
| 21830 | case 4466: /* avx512f_ashlvv8di */ |
| 21831 | case 4465: /* avx2_lshrvv4si_mask */ |
| 21832 | case 4464: /* avx2_lshrvv4si */ |
| 21833 | case 4463: /* avx2_ashlvv4si_mask */ |
| 21834 | case 4462: /* avx2_ashlvv4si */ |
| 21835 | case 4461: /* avx2_lshrvv8si_mask */ |
| 21836 | case 4460: /* avx2_lshrvv8si */ |
| 21837 | case 4459: /* avx2_ashlvv8si_mask */ |
| 21838 | case 4458: /* avx2_ashlvv8si */ |
| 21839 | case 4457: /* avx512f_lshrvv16si_mask */ |
| 21840 | case 4456: /* avx512f_lshrvv16si */ |
| 21841 | case 4455: /* avx512f_ashlvv16si_mask */ |
| 21842 | case 4454: /* avx512f_ashlvv16si */ |
| 21843 | case 4453: /* avx512bw_ashrvv32hi_mask */ |
| 21844 | case 4452: /* avx512bw_ashrvv32hi */ |
| 21845 | case 4451: /* avx512vl_ashrvv16hi_mask */ |
| 21846 | case 4450: /* avx512vl_ashrvv16hi */ |
| 21847 | case 4449: /* avx512vl_ashrvv8hi_mask */ |
| 21848 | case 4448: /* avx512vl_ashrvv8hi */ |
| 21849 | case 4447: /* avx512f_ashrvv8di_mask */ |
| 21850 | case 4446: /* avx512f_ashrvv8di */ |
| 21851 | case 4445: /* avx2_ashrvv4di_mask */ |
| 21852 | case 4444: /* avx2_ashrvv4di */ |
| 21853 | case 4443: /* avx2_ashrvv2di_mask */ |
| 21854 | case 4442: /* avx2_ashrvv2di */ |
| 21855 | case 4441: /* avx512f_ashrvv16si_mask */ |
| 21856 | case 4440: /* avx512f_ashrvv16si */ |
| 21857 | case 4439: /* avx2_ashrvv8si_mask */ |
| 21858 | case 4438: /* avx2_ashrvv8si */ |
| 21859 | case 4437: /* avx2_ashrvv4si_mask */ |
| 21860 | case 4436: /* avx2_ashrvv4si */ |
| 21861 | case 4019: /* xop_shlv2di3 */ |
| 21862 | case 4018: /* xop_shlv4si3 */ |
| 21863 | case 4017: /* xop_shlv8hi3 */ |
| 21864 | case 4016: /* xop_shlv16qi3 */ |
| 21865 | case 4015: /* xop_shav2di3 */ |
| 21866 | case 4014: /* xop_shav4si3 */ |
| 21867 | case 4013: /* xop_shav8hi3 */ |
| 21868 | case 4012: /* xop_shav16qi3 */ |
| 21869 | case 4011: /* xop_vrotlv2di3 */ |
| 21870 | case 4010: /* xop_vrotlv4si3 */ |
| 21871 | case 4009: /* xop_vrotlv8hi3 */ |
| 21872 | case 4008: /* xop_vrotlv16qi3 */ |
| 21873 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) |
| 21874 | { |
| 21875 | return 2; |
| 21876 | } |
| 21877 | else if (cached_memory == MEMORY_LOAD) |
| 21878 | { |
| 21879 | return 3; |
| 21880 | } |
| 21881 | else |
| 21882 | { |
| 21883 | return 0; |
| 21884 | } |
| 21885 | |
| 21886 | case 2467: /* *sse4_1_extractps */ |
| 21887 | extract_constrain_insn_cached (insn); |
| 21888 | if (!((1 << which_alternative) & 0x7)) |
| 21889 | { |
| 21890 | return 6; |
| 21891 | } |
| 21892 | else |
| 21893 | { |
| 21894 | return 0; |
| 21895 | } |
| 21896 | |
| 21897 | case 1464: /* sse2_divv2df3_mask */ |
| 21898 | case 1463: /* sse2_divv2df3 */ |
| 21899 | case 1448: /* sse2_vmdivv2df3_round */ |
| 21900 | case 1447: /* sse2_vmdivv2df3 */ |
| 21901 | if (get_attr_memory (insn) == MEMORY_NONE) |
| 21902 | { |
| 21903 | return 32 /* 0x20 */; |
| 21904 | } |
| 21905 | else |
| 21906 | { |
| 21907 | return 0; |
| 21908 | } |
| 21909 | |
| 21910 | case 1456: /* sse_divv4sf3_mask */ |
| 21911 | case 1455: /* sse_divv4sf3 */ |
| 21912 | case 1444: /* sse_vmdivv4sf3_round */ |
| 21913 | case 1443: /* sse_vmdivv4sf3 */ |
| 21914 | if (get_attr_memory (insn) == MEMORY_NONE) |
| 21915 | { |
| 21916 | return 18 /* 0x12 */; |
| 21917 | } |
| 21918 | else |
| 21919 | { |
| 21920 | return 0; |
| 21921 | } |
| 21922 | |
| 21923 | case 3783: /* sse4_1_dppd */ |
| 21924 | case 1446: /* sse2_vmmulv2df3_round */ |
| 21925 | case 1445: /* sse2_vmmulv2df3 */ |
| 21926 | case 1440: /* *mulv2df3_mask_round */ |
| 21927 | case 1439: /* *mulv2df3_mask */ |
| 21928 | case 1438: /* *mulv2df3_round */ |
| 21929 | case 1437: /* *mulv2df3 */ |
| 21930 | if (((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) || (cached_memory == MEMORY_LOAD)) |
| 21931 | { |
| 21932 | return 5; |
| 21933 | } |
| 21934 | else |
| 21935 | { |
| 21936 | return 0; |
| 21937 | } |
| 21938 | |
| 21939 | case 3781: /* sse4_1_dpps */ |
| 21940 | case 1442: /* sse_vmmulv4sf3_round */ |
| 21941 | case 1441: /* sse_vmmulv4sf3 */ |
| 21942 | case 1428: /* *mulv4sf3_mask_round */ |
| 21943 | case 1427: /* *mulv4sf3_mask */ |
| 21944 | case 1426: /* *mulv4sf3_round */ |
| 21945 | case 1425: /* *mulv4sf3 */ |
| 21946 | if (((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) || (cached_memory == MEMORY_LOAD)) |
| 21947 | { |
| 21948 | return 4; |
| 21949 | } |
| 21950 | else |
| 21951 | { |
| 21952 | return 0; |
| 21953 | } |
| 21954 | |
| 21955 | case 4770: /* avx512vl_expandv2df_mask */ |
| 21956 | case 4769: /* avx512vl_expandv2di_mask */ |
| 21957 | case 4768: /* avx512vl_expandv4sf_mask */ |
| 21958 | case 4767: /* avx512vl_expandv4si_mask */ |
| 21959 | case 4766: /* avx512vl_expandv4df_mask */ |
| 21960 | case 4765: /* avx512vl_expandv4di_mask */ |
| 21961 | case 4764: /* avx512vl_expandv8sf_mask */ |
| 21962 | case 4763: /* avx512vl_expandv8si_mask */ |
| 21963 | case 4762: /* avx512f_expandv8df_mask */ |
| 21964 | case 4761: /* avx512f_expandv8di_mask */ |
| 21965 | case 4760: /* avx512f_expandv16sf_mask */ |
| 21966 | case 4759: /* avx512f_expandv16si_mask */ |
| 21967 | case 1256: /* avx512vl_loadv8hi_mask */ |
| 21968 | case 1255: /* avx512vl_loadv16hi_mask */ |
| 21969 | case 1254: /* avx512bw_loadv32hi_mask */ |
| 21970 | case 1253: /* avx512vl_loadv32qi_mask */ |
| 21971 | case 1252: /* avx512vl_loadv16qi_mask */ |
| 21972 | case 1251: /* avx512bw_loadv64qi_mask */ |
| 21973 | case 1250: /* avx512vl_loadv2df_mask */ |
| 21974 | case 1249: /* avx512vl_loadv4df_mask */ |
| 21975 | case 1248: /* avx512f_loadv8df_mask */ |
| 21976 | case 1247: /* avx512vl_loadv4sf_mask */ |
| 21977 | case 1246: /* avx512vl_loadv8sf_mask */ |
| 21978 | case 1245: /* avx512f_loadv16sf_mask */ |
| 21979 | case 1244: /* avx512vl_loadv2di_mask */ |
| 21980 | case 1243: /* avx512vl_loadv4di_mask */ |
| 21981 | case 1242: /* avx512f_loadv8di_mask */ |
| 21982 | case 1241: /* avx512vl_loadv4si_mask */ |
| 21983 | case 1240: /* avx512vl_loadv8si_mask */ |
| 21984 | case 1239: /* avx512f_loadv16si_mask */ |
| 21985 | extract_constrain_insn_cached (insn); |
| 21986 | if (which_alternative == 0) |
| 21987 | { |
| 21988 | return 1; |
| 21989 | } |
| 21990 | else |
| 21991 | { |
| 21992 | return 2; |
| 21993 | } |
| 21994 | |
| 21995 | case 1206: /* *mmx_concatv2si */ |
| 21996 | case 1136: /* *mmx_concatv2sf */ |
| 21997 | extract_constrain_insn_cached (insn); |
| 21998 | if (which_alternative == 0) |
| 21999 | { |
| 22000 | return 4; |
| 22001 | } |
| 22002 | else |
| 22003 | { |
| 22004 | return 0; |
| 22005 | } |
| 22006 | |
| 22007 | case 3713: /* *ssse3_pmulhrswv4hi3 */ |
| 22008 | case 3712: /* *ssse3_pmulhrswv8hi3_mask */ |
| 22009 | case 3711: /* *ssse3_pmulhrswv8hi3 */ |
| 22010 | case 3710: /* *avx2_pmulhrswv16hi3_mask */ |
| 22011 | case 3709: /* *avx2_pmulhrswv16hi3 */ |
| 22012 | case 3708: /* *avx512bw_pmulhrswv32hi3_mask */ |
| 22013 | case 3707: /* *avx512bw_pmulhrswv32hi3 */ |
| 22014 | case 3704: /* avx512bw_umulhrswv32hi3_mask */ |
| 22015 | case 3703: /* avx512bw_umulhrswv32hi3 */ |
| 22016 | case 3079: /* *sse4_1_mulv4si3_mask */ |
| 22017 | case 3078: /* *sse4_1_mulv4si3 */ |
| 22018 | case 3077: /* *avx2_mulv8si3_mask */ |
| 22019 | case 3076: /* *avx2_mulv8si3 */ |
| 22020 | case 3075: /* *avx512f_mulv16si3_mask */ |
| 22021 | case 3074: /* *avx512f_mulv16si3 */ |
| 22022 | case 3073: /* avx512dq_mulv2di3_mask */ |
| 22023 | case 3072: /* avx512dq_mulv2di3 */ |
| 22024 | case 3071: /* avx512dq_mulv4di3_mask */ |
| 22025 | case 3070: /* avx512dq_mulv4di3 */ |
| 22026 | case 3069: /* avx512dq_mulv8di3_mask */ |
| 22027 | case 3068: /* avx512dq_mulv8di3 */ |
| 22028 | case 3059: /* *sse4_1_mulv2siv2di3_mask */ |
| 22029 | case 3058: /* *sse4_1_mulv2siv2di3 */ |
| 22030 | case 3057: /* *vec_widen_smult_even_v8si_mask */ |
| 22031 | case 3056: /* *vec_widen_smult_even_v8si */ |
| 22032 | case 3055: /* *vec_widen_smult_even_v16si_mask */ |
| 22033 | case 3054: /* *vec_widen_smult_even_v16si */ |
| 22034 | case 3053: /* *vec_widen_umult_even_v4si_mask */ |
| 22035 | case 3052: /* *vec_widen_umult_even_v4si */ |
| 22036 | case 3051: /* *vec_widen_umult_even_v8si_mask */ |
| 22037 | case 3050: /* *vec_widen_umult_even_v8si */ |
| 22038 | case 3049: /* *vec_widen_umult_even_v16si_mask */ |
| 22039 | case 3048: /* *vec_widen_umult_even_v16si */ |
| 22040 | case 3047: /* *umulv8hi3_highpart_mask */ |
| 22041 | case 3046: /* *umulv8hi3_highpart */ |
| 22042 | case 3045: /* *smulv8hi3_highpart_mask */ |
| 22043 | case 3044: /* *smulv8hi3_highpart */ |
| 22044 | case 3043: /* *umulv16hi3_highpart_mask */ |
| 22045 | case 3042: /* *umulv16hi3_highpart */ |
| 22046 | case 3041: /* *smulv16hi3_highpart_mask */ |
| 22047 | case 3040: /* *smulv16hi3_highpart */ |
| 22048 | case 3039: /* *umulv32hi3_highpart_mask */ |
| 22049 | case 3038: /* *umulv32hi3_highpart */ |
| 22050 | case 3037: /* *smulv32hi3_highpart_mask */ |
| 22051 | case 3036: /* *smulv32hi3_highpart */ |
| 22052 | case 3035: /* *mulv8hi3_mask */ |
| 22053 | case 3034: /* *mulv8hi3 */ |
| 22054 | case 3033: /* *mulv16hi3_mask */ |
| 22055 | case 3032: /* *mulv16hi3 */ |
| 22056 | case 3031: /* *mulv32hi3_mask */ |
| 22057 | case 3030: /* *mulv32hi3 */ |
| 22058 | case 1160: /* *sse2_umulv1siv1di3 */ |
| 22059 | case 1159: /* *mmx_pmulhrwv4hi3 */ |
| 22060 | case 1158: /* *mmx_pmaddwd */ |
| 22061 | case 1157: /* *mmx_umulv4hi3_highpart */ |
| 22062 | case 1156: /* *mmx_smulv4hi3_highpart */ |
| 22063 | case 1155: /* *mmx_mulv4hi3 */ |
| 22064 | case 1114: /* *mmx_mulv2sf3 */ |
| 22065 | if (get_attr_memory (insn) == MEMORY_NONE) |
| 22066 | { |
| 22067 | return 3; |
| 22068 | } |
| 22069 | else |
| 22070 | { |
| 22071 | return 0; |
| 22072 | } |
| 22073 | |
| 22074 | case 4396: /* *ssse3_palignrv2df_perm */ |
| 22075 | case 4395: /* *ssse3_palignrv4sf_perm */ |
| 22076 | case 4394: /* *ssse3_palignrv2di_perm */ |
| 22077 | case 4393: /* *ssse3_palignrv4si_perm */ |
| 22078 | case 4392: /* *ssse3_palignrv8hi_perm */ |
| 22079 | case 4391: /* *ssse3_palignrv16qi_perm */ |
| 22080 | case 4007: /* xop_rotrv2di3 */ |
| 22081 | case 4006: /* xop_rotrv4si3 */ |
| 22082 | case 4005: /* xop_rotrv8hi3 */ |
| 22083 | case 4004: /* xop_rotrv16qi3 */ |
| 22084 | case 4003: /* xop_rotlv2di3 */ |
| 22085 | case 4002: /* xop_rotlv4si3 */ |
| 22086 | case 4001: /* xop_rotlv8hi3 */ |
| 22087 | case 4000: /* xop_rotlv16qi3 */ |
| 22088 | case 3736: /* ssse3_palignrdi */ |
| 22089 | case 3735: /* ssse3_palignrti */ |
| 22090 | case 3734: /* avx2_palignrv2ti */ |
| 22091 | case 3733: /* avx512bw_palignrv4ti */ |
| 22092 | case 3732: /* ssse3_palignrv16qi_mask */ |
| 22093 | case 3731: /* avx2_palignrv32qi_mask */ |
| 22094 | case 3730: /* avx512bw_palignrv64qi_mask */ |
| 22095 | case 3706: /* ssse3_pmaddubsw */ |
| 22096 | case 3705: /* ssse3_pmaddubsw128 */ |
| 22097 | case 3702: /* avx512bw_pmaddubsw512v32hi_mask */ |
| 22098 | case 3701: /* avx512bw_pmaddubsw512v32hi */ |
| 22099 | case 3700: /* avx512bw_pmaddubsw512v16hi_mask */ |
| 22100 | case 3699: /* avx512bw_pmaddubsw512v16hi */ |
| 22101 | case 3698: /* avx512bw_pmaddubsw512v8hi_mask */ |
| 22102 | case 3697: /* avx512bw_pmaddubsw512v8hi */ |
| 22103 | case 3696: /* avx2_pmaddubsw256 */ |
| 22104 | case 3695: /* ssse3_phsubdv2si3 */ |
| 22105 | case 3694: /* ssse3_phadddv2si3 */ |
| 22106 | case 3693: /* ssse3_phsubdv4si3 */ |
| 22107 | case 3692: /* ssse3_phadddv4si3 */ |
| 22108 | case 3691: /* avx2_phsubdv8si3 */ |
| 22109 | case 3690: /* avx2_phadddv8si3 */ |
| 22110 | case 3689: /* ssse3_phsubswv4hi3 */ |
| 22111 | case 3688: /* ssse3_phsubwv4hi3 */ |
| 22112 | case 3687: /* ssse3_phaddswv4hi3 */ |
| 22113 | case 3686: /* ssse3_phaddwv4hi3 */ |
| 22114 | case 3685: /* ssse3_phsubswv8hi3 */ |
| 22115 | case 3684: /* ssse3_phsubwv8hi3 */ |
| 22116 | case 3683: /* ssse3_phaddswv8hi3 */ |
| 22117 | case 3682: /* ssse3_phaddwv8hi3 */ |
| 22118 | case 3681: /* avx2_phsubswv16hi3 */ |
| 22119 | case 3680: /* avx2_phsubwv16hi3 */ |
| 22120 | case 3679: /* avx2_phaddswv16hi3 */ |
| 22121 | case 3678: /* avx2_phaddwv16hi3 */ |
| 22122 | case 3657: /* sse2_psadbw */ |
| 22123 | case 3656: /* avx2_psadbw */ |
| 22124 | case 3655: /* avx512f_psadbw */ |
| 22125 | case 3654: /* *sse2_uavgv8hi3_mask */ |
| 22126 | case 3653: /* *sse2_uavgv8hi3 */ |
| 22127 | case 3652: /* *avx2_uavgv16hi3_mask */ |
| 22128 | case 3651: /* *avx2_uavgv16hi3 */ |
| 22129 | case 3650: /* *avx512bw_uavgv32hi3_mask */ |
| 22130 | case 3649: /* *avx512bw_uavgv32hi3 */ |
| 22131 | case 3648: /* *sse2_uavgv16qi3_mask */ |
| 22132 | case 3647: /* *sse2_uavgv16qi3 */ |
| 22133 | case 3646: /* *avx2_uavgv32qi3_mask */ |
| 22134 | case 3645: /* *avx2_uavgv32qi3 */ |
| 22135 | case 3644: /* *avx512bw_uavgv64qi3_mask */ |
| 22136 | case 3643: /* *avx512bw_uavgv64qi3 */ |
| 22137 | case 3319: /* *uminv16qi3 */ |
| 22138 | case 3318: /* *umaxv16qi3 */ |
| 22139 | case 3317: /* *sse4_1_uminv4si3_mask */ |
| 22140 | case 3316: /* *sse4_1_uminv4si3 */ |
| 22141 | case 3315: /* *sse4_1_umaxv4si3_mask */ |
| 22142 | case 3314: /* *sse4_1_umaxv4si3 */ |
| 22143 | case 3313: /* *sse4_1_uminv8hi3_mask */ |
| 22144 | case 3312: /* *sse4_1_uminv8hi3 */ |
| 22145 | case 3311: /* *sse4_1_umaxv8hi3_mask */ |
| 22146 | case 3310: /* *sse4_1_umaxv8hi3 */ |
| 22147 | case 3309: /* *sminv8hi3 */ |
| 22148 | case 3308: /* *smaxv8hi3 */ |
| 22149 | case 3307: /* *sse4_1_sminv4si3_mask */ |
| 22150 | case 3306: /* *sse4_1_sminv4si3 */ |
| 22151 | case 3305: /* *sse4_1_smaxv4si3_mask */ |
| 22152 | case 3304: /* *sse4_1_smaxv4si3 */ |
| 22153 | case 3303: /* *sse4_1_sminv16qi3_mask */ |
| 22154 | case 3302: /* *sse4_1_sminv16qi3 */ |
| 22155 | case 3301: /* *sse4_1_smaxv16qi3_mask */ |
| 22156 | case 3300: /* *sse4_1_smaxv16qi3 */ |
| 22157 | case 3299: /* uminv8hi3_mask */ |
| 22158 | case 3298: /* *uminv8hi3 */ |
| 22159 | case 3297: /* umaxv8hi3_mask */ |
| 22160 | case 3296: /* *umaxv8hi3 */ |
| 22161 | case 3295: /* sminv8hi3_mask */ |
| 22162 | case 3294: /* *sminv8hi3 */ |
| 22163 | case 3293: /* smaxv8hi3_mask */ |
| 22164 | case 3292: /* *smaxv8hi3 */ |
| 22165 | case 3291: /* uminv16hi3_mask */ |
| 22166 | case 3290: /* *uminv16hi3 */ |
| 22167 | case 3289: /* umaxv16hi3_mask */ |
| 22168 | case 3288: /* *umaxv16hi3 */ |
| 22169 | case 3287: /* sminv16hi3_mask */ |
| 22170 | case 3286: /* *sminv16hi3 */ |
| 22171 | case 3285: /* smaxv16hi3_mask */ |
| 22172 | case 3284: /* *smaxv16hi3 */ |
| 22173 | case 3283: /* uminv32hi3_mask */ |
| 22174 | case 3282: /* *uminv32hi3 */ |
| 22175 | case 3281: /* umaxv32hi3_mask */ |
| 22176 | case 3280: /* *umaxv32hi3 */ |
| 22177 | case 3279: /* sminv32hi3_mask */ |
| 22178 | case 3278: /* *sminv32hi3 */ |
| 22179 | case 3277: /* smaxv32hi3_mask */ |
| 22180 | case 3276: /* *smaxv32hi3 */ |
| 22181 | case 3275: /* uminv32qi3_mask */ |
| 22182 | case 3274: /* *uminv32qi3 */ |
| 22183 | case 3273: /* umaxv32qi3_mask */ |
| 22184 | case 3272: /* *umaxv32qi3 */ |
| 22185 | case 3271: /* sminv32qi3_mask */ |
| 22186 | case 3270: /* *sminv32qi3 */ |
| 22187 | case 3269: /* smaxv32qi3_mask */ |
| 22188 | case 3268: /* *smaxv32qi3 */ |
| 22189 | case 3267: /* uminv16qi3_mask */ |
| 22190 | case 3266: /* *uminv16qi3 */ |
| 22191 | case 3265: /* umaxv16qi3_mask */ |
| 22192 | case 3264: /* *umaxv16qi3 */ |
| 22193 | case 3263: /* sminv16qi3_mask */ |
| 22194 | case 3262: /* *sminv16qi3 */ |
| 22195 | case 3261: /* smaxv16qi3_mask */ |
| 22196 | case 3260: /* *smaxv16qi3 */ |
| 22197 | case 3259: /* uminv64qi3_mask */ |
| 22198 | case 3258: /* *uminv64qi3 */ |
| 22199 | case 3257: /* umaxv64qi3_mask */ |
| 22200 | case 3256: /* *umaxv64qi3 */ |
| 22201 | case 3255: /* sminv64qi3_mask */ |
| 22202 | case 3254: /* *sminv64qi3 */ |
| 22203 | case 3253: /* smaxv64qi3_mask */ |
| 22204 | case 3252: /* *smaxv64qi3 */ |
| 22205 | case 3251: /* *avx512f_uminv2di3_mask */ |
| 22206 | case 3250: /* *avx512f_uminv2di3 */ |
| 22207 | case 3249: /* *avx512f_umaxv2di3_mask */ |
| 22208 | case 3248: /* *avx512f_umaxv2di3 */ |
| 22209 | case 3247: /* *avx512f_sminv2di3_mask */ |
| 22210 | case 3246: /* *avx512f_sminv2di3 */ |
| 22211 | case 3245: /* *avx512f_smaxv2di3_mask */ |
| 22212 | case 3244: /* *avx512f_smaxv2di3 */ |
| 22213 | case 3243: /* *avx512f_uminv4di3_mask */ |
| 22214 | case 3242: /* *avx512f_uminv4di3 */ |
| 22215 | case 3241: /* *avx512f_umaxv4di3_mask */ |
| 22216 | case 3240: /* *avx512f_umaxv4di3 */ |
| 22217 | case 3239: /* *avx512f_sminv4di3_mask */ |
| 22218 | case 3238: /* *avx512f_sminv4di3 */ |
| 22219 | case 3237: /* *avx512f_smaxv4di3_mask */ |
| 22220 | case 3236: /* *avx512f_smaxv4di3 */ |
| 22221 | case 3235: /* *avx512f_uminv8di3_mask */ |
| 22222 | case 3234: /* *avx512f_uminv8di3 */ |
| 22223 | case 3233: /* *avx512f_umaxv8di3_mask */ |
| 22224 | case 3232: /* *avx512f_umaxv8di3 */ |
| 22225 | case 3231: /* *avx512f_sminv8di3_mask */ |
| 22226 | case 3230: /* *avx512f_sminv8di3 */ |
| 22227 | case 3229: /* *avx512f_smaxv8di3_mask */ |
| 22228 | case 3228: /* *avx512f_smaxv8di3 */ |
| 22229 | case 3227: /* *avx512f_uminv4si3_mask */ |
| 22230 | case 3226: /* *avx512f_uminv4si3 */ |
| 22231 | case 3225: /* *avx512f_umaxv4si3_mask */ |
| 22232 | case 3224: /* *avx512f_umaxv4si3 */ |
| 22233 | case 3223: /* *avx512f_sminv4si3_mask */ |
| 22234 | case 3222: /* *avx512f_sminv4si3 */ |
| 22235 | case 3221: /* *avx512f_smaxv4si3_mask */ |
| 22236 | case 3220: /* *avx512f_smaxv4si3 */ |
| 22237 | case 3219: /* *avx512f_uminv8si3_mask */ |
| 22238 | case 3218: /* *avx512f_uminv8si3 */ |
| 22239 | case 3217: /* *avx512f_umaxv8si3_mask */ |
| 22240 | case 3216: /* *avx512f_umaxv8si3 */ |
| 22241 | case 3215: /* *avx512f_sminv8si3_mask */ |
| 22242 | case 3214: /* *avx512f_sminv8si3 */ |
| 22243 | case 3213: /* *avx512f_smaxv8si3_mask */ |
| 22244 | case 3212: /* *avx512f_smaxv8si3 */ |
| 22245 | case 3211: /* *avx512f_uminv16si3_mask */ |
| 22246 | case 3210: /* *avx512f_uminv16si3 */ |
| 22247 | case 3209: /* *avx512f_umaxv16si3_mask */ |
| 22248 | case 3208: /* *avx512f_umaxv16si3 */ |
| 22249 | case 3207: /* *avx512f_sminv16si3_mask */ |
| 22250 | case 3206: /* *avx512f_sminv16si3 */ |
| 22251 | case 3205: /* *avx512f_smaxv16si3_mask */ |
| 22252 | case 3204: /* *avx512f_smaxv16si3 */ |
| 22253 | case 3203: /* *avx2_uminv8si3 */ |
| 22254 | case 3202: /* *avx2_umaxv8si3 */ |
| 22255 | case 3201: /* *avx2_sminv8si3 */ |
| 22256 | case 3200: /* *avx2_smaxv8si3 */ |
| 22257 | case 3199: /* *avx2_uminv16hi3 */ |
| 22258 | case 3198: /* *avx2_umaxv16hi3 */ |
| 22259 | case 3197: /* *avx2_sminv16hi3 */ |
| 22260 | case 3196: /* *avx2_smaxv16hi3 */ |
| 22261 | case 3195: /* *avx2_uminv32qi3 */ |
| 22262 | case 3194: /* *avx2_umaxv32qi3 */ |
| 22263 | case 3193: /* *avx2_sminv32qi3 */ |
| 22264 | case 3192: /* *avx2_smaxv32qi3 */ |
| 22265 | case 3143: /* sse2_lshrv1ti3 */ |
| 22266 | case 3142: /* avx2_lshrv2ti3 */ |
| 22267 | case 3141: /* avx512bw_lshrv4ti3 */ |
| 22268 | case 3140: /* sse2_ashlv1ti3 */ |
| 22269 | case 3139: /* avx2_ashlv2ti3 */ |
| 22270 | case 3138: /* avx512bw_ashlv4ti3 */ |
| 22271 | case 3067: /* *sse2_pmaddwd */ |
| 22272 | case 3066: /* *avx2_pmaddwd */ |
| 22273 | case 3065: /* avx512bw_pmaddwd512v8hi_mask */ |
| 22274 | case 3064: /* avx512bw_pmaddwd512v8hi */ |
| 22275 | case 3063: /* avx512bw_pmaddwd512v16hi_mask */ |
| 22276 | case 3062: /* avx512bw_pmaddwd512v16hi */ |
| 22277 | case 3061: /* avx512bw_pmaddwd512v32hi_mask */ |
| 22278 | case 3060: /* avx512bw_pmaddwd512v32hi */ |
| 22279 | case 3029: /* *sse2_ussubv8hi3_mask */ |
| 22280 | case 3028: /* *sse2_ussubv8hi3 */ |
| 22281 | case 3027: /* *sse2_sssubv8hi3_mask */ |
| 22282 | case 3026: /* *sse2_sssubv8hi3 */ |
| 22283 | case 3025: /* *sse2_usaddv8hi3_mask */ |
| 22284 | case 3024: /* *sse2_usaddv8hi3 */ |
| 22285 | case 3023: /* *sse2_ssaddv8hi3_mask */ |
| 22286 | case 3022: /* *sse2_ssaddv8hi3 */ |
| 22287 | case 3021: /* *avx2_ussubv16hi3_mask */ |
| 22288 | case 3020: /* *avx2_ussubv16hi3 */ |
| 22289 | case 3019: /* *avx2_sssubv16hi3_mask */ |
| 22290 | case 3018: /* *avx2_sssubv16hi3 */ |
| 22291 | case 3017: /* *avx2_usaddv16hi3_mask */ |
| 22292 | case 3016: /* *avx2_usaddv16hi3 */ |
| 22293 | case 3015: /* *avx2_ssaddv16hi3_mask */ |
| 22294 | case 3014: /* *avx2_ssaddv16hi3 */ |
| 22295 | case 3013: /* *avx512bw_ussubv32hi3_mask */ |
| 22296 | case 3012: /* *avx512bw_ussubv32hi3 */ |
| 22297 | case 3011: /* *avx512bw_sssubv32hi3_mask */ |
| 22298 | case 3010: /* *avx512bw_sssubv32hi3 */ |
| 22299 | case 3009: /* *avx512bw_usaddv32hi3_mask */ |
| 22300 | case 3008: /* *avx512bw_usaddv32hi3 */ |
| 22301 | case 3007: /* *avx512bw_ssaddv32hi3_mask */ |
| 22302 | case 3006: /* *avx512bw_ssaddv32hi3 */ |
| 22303 | case 3005: /* *sse2_ussubv16qi3_mask */ |
| 22304 | case 3004: /* *sse2_ussubv16qi3 */ |
| 22305 | case 3003: /* *sse2_sssubv16qi3_mask */ |
| 22306 | case 3002: /* *sse2_sssubv16qi3 */ |
| 22307 | case 3001: /* *sse2_usaddv16qi3_mask */ |
| 22308 | case 3000: /* *sse2_usaddv16qi3 */ |
| 22309 | case 2999: /* *sse2_ssaddv16qi3_mask */ |
| 22310 | case 2998: /* *sse2_ssaddv16qi3 */ |
| 22311 | case 2997: /* *avx2_ussubv32qi3_mask */ |
| 22312 | case 2996: /* *avx2_ussubv32qi3 */ |
| 22313 | case 2995: /* *avx2_sssubv32qi3_mask */ |
| 22314 | case 2994: /* *avx2_sssubv32qi3 */ |
| 22315 | case 2993: /* *avx2_usaddv32qi3_mask */ |
| 22316 | case 2992: /* *avx2_usaddv32qi3 */ |
| 22317 | case 2991: /* *avx2_ssaddv32qi3_mask */ |
| 22318 | case 2990: /* *avx2_ssaddv32qi3 */ |
| 22319 | case 2989: /* *avx512bw_ussubv64qi3_mask */ |
| 22320 | case 2988: /* *avx512bw_ussubv64qi3 */ |
| 22321 | case 2987: /* *avx512bw_sssubv64qi3_mask */ |
| 22322 | case 2986: /* *avx512bw_sssubv64qi3 */ |
| 22323 | case 2985: /* *avx512bw_usaddv64qi3_mask */ |
| 22324 | case 2984: /* *avx512bw_usaddv64qi3 */ |
| 22325 | case 2983: /* *avx512bw_ssaddv64qi3_mask */ |
| 22326 | case 2982: /* *avx512bw_ssaddv64qi3 */ |
| 22327 | case 2981: /* *subv8hi3_mask */ |
| 22328 | case 2980: /* *addv8hi3_mask */ |
| 22329 | case 2979: /* *subv16hi3_mask */ |
| 22330 | case 2978: /* *addv16hi3_mask */ |
| 22331 | case 2977: /* *subv32hi3_mask */ |
| 22332 | case 2976: /* *addv32hi3_mask */ |
| 22333 | case 2975: /* *subv32qi3_mask */ |
| 22334 | case 2974: /* *addv32qi3_mask */ |
| 22335 | case 2973: /* *subv16qi3_mask */ |
| 22336 | case 2972: /* *addv16qi3_mask */ |
| 22337 | case 2971: /* *subv64qi3_mask */ |
| 22338 | case 2970: /* *addv64qi3_mask */ |
| 22339 | case 2969: /* *subv2di3_mask */ |
| 22340 | case 2968: /* *addv2di3_mask */ |
| 22341 | case 2967: /* *subv4di3_mask */ |
| 22342 | case 2966: /* *addv4di3_mask */ |
| 22343 | case 2965: /* *subv8di3_mask */ |
| 22344 | case 2964: /* *addv8di3_mask */ |
| 22345 | case 2963: /* *subv4si3_mask */ |
| 22346 | case 2962: /* *addv4si3_mask */ |
| 22347 | case 2961: /* *subv8si3_mask */ |
| 22348 | case 2960: /* *addv8si3_mask */ |
| 22349 | case 2959: /* *subv16si3_mask */ |
| 22350 | case 2958: /* *addv16si3_mask */ |
| 22351 | case 2957: /* *subv2di3 */ |
| 22352 | case 2956: /* *addv2di3 */ |
| 22353 | case 2955: /* *subv4di3 */ |
| 22354 | case 2954: /* *addv4di3 */ |
| 22355 | case 2953: /* *subv8di3 */ |
| 22356 | case 2952: /* *addv8di3 */ |
| 22357 | case 2951: /* *subv4si3 */ |
| 22358 | case 2950: /* *addv4si3 */ |
| 22359 | case 2949: /* *subv8si3 */ |
| 22360 | case 2948: /* *addv8si3 */ |
| 22361 | case 2947: /* *subv16si3 */ |
| 22362 | case 2946: /* *addv16si3 */ |
| 22363 | case 2945: /* *subv8hi3 */ |
| 22364 | case 2944: /* *addv8hi3 */ |
| 22365 | case 2943: /* *subv16hi3 */ |
| 22366 | case 2942: /* *addv16hi3 */ |
| 22367 | case 2941: /* *subv32hi3 */ |
| 22368 | case 2940: /* *addv32hi3 */ |
| 22369 | case 2939: /* *subv16qi3 */ |
| 22370 | case 2938: /* *addv16qi3 */ |
| 22371 | case 2937: /* *subv32qi3 */ |
| 22372 | case 2936: /* *addv32qi3 */ |
| 22373 | case 2935: /* *subv64qi3 */ |
| 22374 | case 2934: /* *addv64qi3 */ |
| 22375 | case 1212: /* mmx_psadbw */ |
| 22376 | case 1211: /* *mmx_uavgv4hi3 */ |
| 22377 | case 1210: /* *mmx_uavgv8qi3 */ |
| 22378 | case 1193: /* mmx_packuswb */ |
| 22379 | case 1192: /* mmx_packssdw */ |
| 22380 | case 1191: /* mmx_packsswb */ |
| 22381 | case 1190: /* *mmx_xorv2si3 */ |
| 22382 | case 1189: /* *mmx_iorv2si3 */ |
| 22383 | case 1188: /* *mmx_andv2si3 */ |
| 22384 | case 1187: /* *mmx_xorv4hi3 */ |
| 22385 | case 1186: /* *mmx_iorv4hi3 */ |
| 22386 | case 1185: /* *mmx_andv4hi3 */ |
| 22387 | case 1184: /* *mmx_xorv8qi3 */ |
| 22388 | case 1183: /* *mmx_iorv8qi3 */ |
| 22389 | case 1182: /* *mmx_andv8qi3 */ |
| 22390 | case 1181: /* mmx_andnotv2si3 */ |
| 22391 | case 1180: /* mmx_andnotv4hi3 */ |
| 22392 | case 1179: /* mmx_andnotv8qi3 */ |
| 22393 | case 1172: /* mmx_lshrv1di3 */ |
| 22394 | case 1171: /* mmx_ashlv1di3 */ |
| 22395 | case 1170: /* mmx_lshrv2si3 */ |
| 22396 | case 1169: /* mmx_ashlv2si3 */ |
| 22397 | case 1168: /* mmx_lshrv4hi3 */ |
| 22398 | case 1167: /* mmx_ashlv4hi3 */ |
| 22399 | case 1166: /* mmx_ashrv2si3 */ |
| 22400 | case 1165: /* mmx_ashrv4hi3 */ |
| 22401 | case 1164: /* *mmx_uminv8qi3 */ |
| 22402 | case 1163: /* *mmx_umaxv8qi3 */ |
| 22403 | case 1162: /* *mmx_sminv4hi3 */ |
| 22404 | case 1161: /* *mmx_smaxv4hi3 */ |
| 22405 | case 1154: /* *mmx_ussubv4hi3 */ |
| 22406 | case 1153: /* *mmx_sssubv4hi3 */ |
| 22407 | case 1152: /* *mmx_usaddv4hi3 */ |
| 22408 | case 1151: /* *mmx_ssaddv4hi3 */ |
| 22409 | case 1150: /* *mmx_ussubv8qi3 */ |
| 22410 | case 1149: /* *mmx_sssubv8qi3 */ |
| 22411 | case 1148: /* *mmx_usaddv8qi3 */ |
| 22412 | case 1147: /* *mmx_ssaddv8qi3 */ |
| 22413 | case 1146: /* *mmx_subv1di3 */ |
| 22414 | case 1145: /* *mmx_addv1di3 */ |
| 22415 | case 1144: /* *mmx_subv2si3 */ |
| 22416 | case 1143: /* *mmx_addv2si3 */ |
| 22417 | case 1142: /* *mmx_subv4hi3 */ |
| 22418 | case 1141: /* *mmx_addv4hi3 */ |
| 22419 | case 1140: /* *mmx_subv8qi3 */ |
| 22420 | case 1139: /* *mmx_addv8qi3 */ |
| 22421 | case 1126: /* mmx_addsubv2sf3 */ |
| 22422 | case 1125: /* mmx_hsubv2sf3 */ |
| 22423 | case 1124: /* mmx_haddv2sf3 */ |
| 22424 | case 1118: /* mmx_ieee_minv2sf3 */ |
| 22425 | case 1117: /* mmx_ieee_maxv2sf3 */ |
| 22426 | case 1116: /* *mmx_sminv2sf3 */ |
| 22427 | case 1115: /* *mmx_smaxv2sf3 */ |
| 22428 | case 1113: /* *mmx_subv2sf3 */ |
| 22429 | case 1112: /* *mmx_addv2sf3 */ |
| 22430 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) |
| 22431 | { |
| 22432 | return 1; |
| 22433 | } |
| 22434 | else if (cached_memory == MEMORY_LOAD) |
| 22435 | { |
| 22436 | return 2; |
| 22437 | } |
| 22438 | else |
| 22439 | { |
| 22440 | return 0; |
| 22441 | } |
| 22442 | |
| 22443 | case 982: /* *movsfcc_1_387 */ |
| 22444 | extract_constrain_insn_cached (insn); |
| 22445 | if (((((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) || (cached_memory == MEMORY_LOAD)) && (!((1 << which_alternative) & 0x3))) || (((1 << which_alternative) & 0x3))) |
| 22446 | { |
| 22447 | return 2; |
| 22448 | } |
| 22449 | else |
| 22450 | { |
| 22451 | return 0; |
| 22452 | } |
| 22453 | |
| 22454 | case 981: /* *movdfcc_1 */ |
| 22455 | extract_constrain_insn_cached (insn); |
| 22456 | if (((1 << which_alternative) & 0xc)) |
| 22457 | { |
| 22458 | return 6; |
| 22459 | } |
| 22460 | else if (((((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) || (cached_memory == MEMORY_LOAD)) && (!((1 << which_alternative) & 0xf))) || (((1 << which_alternative) & 0x3))) |
| 22461 | { |
| 22462 | return 2; |
| 22463 | } |
| 22464 | else |
| 22465 | { |
| 22466 | return 0; |
| 22467 | } |
| 22468 | |
| 22469 | case 980: /* *movxfcc_1 */ |
| 22470 | return 2; |
| 22471 | |
| 22472 | case 979: /* *movqicc_noc */ |
| 22473 | case 978: /* *movsicc_noc_zext */ |
| 22474 | case 977: /* *movdicc_noc */ |
| 22475 | case 976: /* *movsicc_noc */ |
| 22476 | case 975: /* *movhicc_noc */ |
| 22477 | if (((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) || (cached_memory == MEMORY_LOAD)) |
| 22478 | { |
| 22479 | return 2; |
| 22480 | } |
| 22481 | else |
| 22482 | { |
| 22483 | return 0; |
| 22484 | } |
| 22485 | |
| 22486 | case 4937: /* storedi_via_sse */ |
| 22487 | case 4936: /* loaddi_via_sse */ |
| 22488 | case 4746: /* avx512vl_compressv2df_mask */ |
| 22489 | case 4745: /* avx512vl_compressv2di_mask */ |
| 22490 | case 4744: /* avx512vl_compressv4sf_mask */ |
| 22491 | case 4743: /* avx512vl_compressv4si_mask */ |
| 22492 | case 4742: /* avx512vl_compressv4df_mask */ |
| 22493 | case 4741: /* avx512vl_compressv4di_mask */ |
| 22494 | case 4740: /* avx512vl_compressv8sf_mask */ |
| 22495 | case 4739: /* avx512vl_compressv8si_mask */ |
| 22496 | case 4738: /* avx512f_compressv8df_mask */ |
| 22497 | case 4737: /* avx512f_compressv8di_mask */ |
| 22498 | case 4736: /* avx512f_compressv16sf_mask */ |
| 22499 | case 4735: /* avx512f_compressv16si_mask */ |
| 22500 | case 4734: /* *avx512f_scatterdiv2df */ |
| 22501 | case 4733: /* *avx512f_scatterdiv2df */ |
| 22502 | case 4732: /* *avx512f_scatterdiv2di */ |
| 22503 | case 4731: /* *avx512f_scatterdiv2di */ |
| 22504 | case 4730: /* *avx512f_scatterdiv4sf */ |
| 22505 | case 4729: /* *avx512f_scatterdiv4sf */ |
| 22506 | case 4728: /* *avx512f_scatterdiv4si */ |
| 22507 | case 4727: /* *avx512f_scatterdiv4si */ |
| 22508 | case 4726: /* *avx512f_scatterdiv4df */ |
| 22509 | case 4725: /* *avx512f_scatterdiv4df */ |
| 22510 | case 4724: /* *avx512f_scatterdiv4di */ |
| 22511 | case 4723: /* *avx512f_scatterdiv4di */ |
| 22512 | case 4722: /* *avx512f_scatterdiv8sf */ |
| 22513 | case 4721: /* *avx512f_scatterdiv8sf */ |
| 22514 | case 4720: /* *avx512f_scatterdiv8si */ |
| 22515 | case 4719: /* *avx512f_scatterdiv8si */ |
| 22516 | case 4718: /* *avx512f_scatterdiv8df */ |
| 22517 | case 4717: /* *avx512f_scatterdiv8df */ |
| 22518 | case 4716: /* *avx512f_scatterdiv8di */ |
| 22519 | case 4715: /* *avx512f_scatterdiv8di */ |
| 22520 | case 4714: /* *avx512f_scatterdiv16sf */ |
| 22521 | case 4713: /* *avx512f_scatterdiv16sf */ |
| 22522 | case 4712: /* *avx512f_scatterdiv16si */ |
| 22523 | case 4711: /* *avx512f_scatterdiv16si */ |
| 22524 | case 4710: /* *avx512f_scattersiv2df */ |
| 22525 | case 4709: /* *avx512f_scattersiv2df */ |
| 22526 | case 4708: /* *avx512f_scattersiv2di */ |
| 22527 | case 4707: /* *avx512f_scattersiv2di */ |
| 22528 | case 4706: /* *avx512f_scattersiv4sf */ |
| 22529 | case 4705: /* *avx512f_scattersiv4sf */ |
| 22530 | case 4704: /* *avx512f_scattersiv4si */ |
| 22531 | case 4703: /* *avx512f_scattersiv4si */ |
| 22532 | case 4702: /* *avx512f_scattersiv4df */ |
| 22533 | case 4701: /* *avx512f_scattersiv4df */ |
| 22534 | case 4700: /* *avx512f_scattersiv4di */ |
| 22535 | case 4699: /* *avx512f_scattersiv4di */ |
| 22536 | case 4698: /* *avx512f_scattersiv8sf */ |
| 22537 | case 4697: /* *avx512f_scattersiv8sf */ |
| 22538 | case 4696: /* *avx512f_scattersiv8si */ |
| 22539 | case 4695: /* *avx512f_scattersiv8si */ |
| 22540 | case 4694: /* *avx512f_scattersiv8df */ |
| 22541 | case 4693: /* *avx512f_scattersiv8df */ |
| 22542 | case 4692: /* *avx512f_scattersiv8di */ |
| 22543 | case 4691: /* *avx512f_scattersiv8di */ |
| 22544 | case 4690: /* *avx512f_scattersiv16sf */ |
| 22545 | case 4689: /* *avx512f_scattersiv16sf */ |
| 22546 | case 4688: /* *avx512f_scattersiv16si */ |
| 22547 | case 4687: /* *avx512f_scattersiv16si */ |
| 22548 | case 4686: /* *avx512f_gatherdiv2df_2 */ |
| 22549 | case 4685: /* *avx512f_gatherdiv2df_2 */ |
| 22550 | case 4684: /* *avx512f_gatherdiv2di_2 */ |
| 22551 | case 4683: /* *avx512f_gatherdiv2di_2 */ |
| 22552 | case 4682: /* *avx512f_gatherdiv4sf_2 */ |
| 22553 | case 4681: /* *avx512f_gatherdiv4sf_2 */ |
| 22554 | case 4680: /* *avx512f_gatherdiv4si_2 */ |
| 22555 | case 4679: /* *avx512f_gatherdiv4si_2 */ |
| 22556 | case 4678: /* *avx512f_gatherdiv4df_2 */ |
| 22557 | case 4677: /* *avx512f_gatherdiv4df_2 */ |
| 22558 | case 4676: /* *avx512f_gatherdiv4di_2 */ |
| 22559 | case 4675: /* *avx512f_gatherdiv4di_2 */ |
| 22560 | case 4674: /* *avx512f_gatherdiv8sf_2 */ |
| 22561 | case 4673: /* *avx512f_gatherdiv8sf_2 */ |
| 22562 | case 4672: /* *avx512f_gatherdiv8si_2 */ |
| 22563 | case 4671: /* *avx512f_gatherdiv8si_2 */ |
| 22564 | case 4670: /* *avx512f_gatherdiv8df_2 */ |
| 22565 | case 4669: /* *avx512f_gatherdiv8df_2 */ |
| 22566 | case 4668: /* *avx512f_gatherdiv8di_2 */ |
| 22567 | case 4667: /* *avx512f_gatherdiv8di_2 */ |
| 22568 | case 4666: /* *avx512f_gatherdiv16sf_2 */ |
| 22569 | case 4665: /* *avx512f_gatherdiv16sf_2 */ |
| 22570 | case 4664: /* *avx512f_gatherdiv16si_2 */ |
| 22571 | case 4663: /* *avx512f_gatherdiv16si_2 */ |
| 22572 | case 4662: /* *avx512f_gatherdiv2df */ |
| 22573 | case 4661: /* *avx512f_gatherdiv2df */ |
| 22574 | case 4660: /* *avx512f_gatherdiv2di */ |
| 22575 | case 4659: /* *avx512f_gatherdiv2di */ |
| 22576 | case 4658: /* *avx512f_gatherdiv4sf */ |
| 22577 | case 4657: /* *avx512f_gatherdiv4sf */ |
| 22578 | case 4656: /* *avx512f_gatherdiv4si */ |
| 22579 | case 4655: /* *avx512f_gatherdiv4si */ |
| 22580 | case 4654: /* *avx512f_gatherdiv4df */ |
| 22581 | case 4653: /* *avx512f_gatherdiv4df */ |
| 22582 | case 4652: /* *avx512f_gatherdiv4di */ |
| 22583 | case 4651: /* *avx512f_gatherdiv4di */ |
| 22584 | case 4650: /* *avx512f_gatherdiv8sf */ |
| 22585 | case 4649: /* *avx512f_gatherdiv8sf */ |
| 22586 | case 4648: /* *avx512f_gatherdiv8si */ |
| 22587 | case 4647: /* *avx512f_gatherdiv8si */ |
| 22588 | case 4646: /* *avx512f_gatherdiv8df */ |
| 22589 | case 4645: /* *avx512f_gatherdiv8df */ |
| 22590 | case 4644: /* *avx512f_gatherdiv8di */ |
| 22591 | case 4643: /* *avx512f_gatherdiv8di */ |
| 22592 | case 4642: /* *avx512f_gatherdiv16sf */ |
| 22593 | case 4641: /* *avx512f_gatherdiv16sf */ |
| 22594 | case 4640: /* *avx512f_gatherdiv16si */ |
| 22595 | case 4639: /* *avx512f_gatherdiv16si */ |
| 22596 | case 4638: /* *avx512f_gathersiv2df_2 */ |
| 22597 | case 4637: /* *avx512f_gathersiv2df_2 */ |
| 22598 | case 4636: /* *avx512f_gathersiv2di_2 */ |
| 22599 | case 4635: /* *avx512f_gathersiv2di_2 */ |
| 22600 | case 4634: /* *avx512f_gathersiv4sf_2 */ |
| 22601 | case 4633: /* *avx512f_gathersiv4sf_2 */ |
| 22602 | case 4632: /* *avx512f_gathersiv4si_2 */ |
| 22603 | case 4631: /* *avx512f_gathersiv4si_2 */ |
| 22604 | case 4630: /* *avx512f_gathersiv4df_2 */ |
| 22605 | case 4629: /* *avx512f_gathersiv4df_2 */ |
| 22606 | case 4628: /* *avx512f_gathersiv4di_2 */ |
| 22607 | case 4627: /* *avx512f_gathersiv4di_2 */ |
| 22608 | case 4626: /* *avx512f_gathersiv8sf_2 */ |
| 22609 | case 4625: /* *avx512f_gathersiv8sf_2 */ |
| 22610 | case 4624: /* *avx512f_gathersiv8si_2 */ |
| 22611 | case 4623: /* *avx512f_gathersiv8si_2 */ |
| 22612 | case 4622: /* *avx512f_gathersiv8df_2 */ |
| 22613 | case 4621: /* *avx512f_gathersiv8df_2 */ |
| 22614 | case 4620: /* *avx512f_gathersiv8di_2 */ |
| 22615 | case 4619: /* *avx512f_gathersiv8di_2 */ |
| 22616 | case 4618: /* *avx512f_gathersiv16sf_2 */ |
| 22617 | case 4617: /* *avx512f_gathersiv16sf_2 */ |
| 22618 | case 4616: /* *avx512f_gathersiv16si_2 */ |
| 22619 | case 4615: /* *avx512f_gathersiv16si_2 */ |
| 22620 | case 4614: /* *avx512f_gathersiv2df */ |
| 22621 | case 4613: /* *avx512f_gathersiv2df */ |
| 22622 | case 4612: /* *avx512f_gathersiv2di */ |
| 22623 | case 4611: /* *avx512f_gathersiv2di */ |
| 22624 | case 4610: /* *avx512f_gathersiv4sf */ |
| 22625 | case 4609: /* *avx512f_gathersiv4sf */ |
| 22626 | case 4608: /* *avx512f_gathersiv4si */ |
| 22627 | case 4607: /* *avx512f_gathersiv4si */ |
| 22628 | case 4606: /* *avx512f_gathersiv4df */ |
| 22629 | case 4605: /* *avx512f_gathersiv4df */ |
| 22630 | case 4604: /* *avx512f_gathersiv4di */ |
| 22631 | case 4603: /* *avx512f_gathersiv4di */ |
| 22632 | case 4602: /* *avx512f_gathersiv8sf */ |
| 22633 | case 4601: /* *avx512f_gathersiv8sf */ |
| 22634 | case 4600: /* *avx512f_gathersiv8si */ |
| 22635 | case 4599: /* *avx512f_gathersiv8si */ |
| 22636 | case 4598: /* *avx512f_gathersiv8df */ |
| 22637 | case 4597: /* *avx512f_gathersiv8df */ |
| 22638 | case 4596: /* *avx512f_gathersiv8di */ |
| 22639 | case 4595: /* *avx512f_gathersiv8di */ |
| 22640 | case 4594: /* *avx512f_gathersiv16sf */ |
| 22641 | case 4593: /* *avx512f_gathersiv16sf */ |
| 22642 | case 4592: /* *avx512f_gathersiv16si */ |
| 22643 | case 4591: /* *avx512f_gathersiv16si */ |
| 22644 | case 4590: /* *avx2_gatherdiv8sf_4 */ |
| 22645 | case 4589: /* *avx2_gatherdiv8sf_4 */ |
| 22646 | case 4588: /* *avx2_gatherdiv8si_4 */ |
| 22647 | case 4587: /* *avx2_gatherdiv8si_4 */ |
| 22648 | case 4586: /* *avx2_gatherdiv8sf_3 */ |
| 22649 | case 4585: /* *avx2_gatherdiv8sf_3 */ |
| 22650 | case 4584: /* *avx2_gatherdiv8si_3 */ |
| 22651 | case 4583: /* *avx2_gatherdiv8si_3 */ |
| 22652 | case 4582: /* *avx2_gatherdiv8sf_2 */ |
| 22653 | case 4581: /* *avx2_gatherdiv8sf_2 */ |
| 22654 | case 4580: /* *avx2_gatherdiv8si_2 */ |
| 22655 | case 4579: /* *avx2_gatherdiv8si_2 */ |
| 22656 | case 4578: /* *avx2_gatherdiv4sf_2 */ |
| 22657 | case 4577: /* *avx2_gatherdiv4sf_2 */ |
| 22658 | case 4576: /* *avx2_gatherdiv4si_2 */ |
| 22659 | case 4575: /* *avx2_gatherdiv4si_2 */ |
| 22660 | case 4574: /* *avx2_gatherdiv4df_2 */ |
| 22661 | case 4573: /* *avx2_gatherdiv4df_2 */ |
| 22662 | case 4572: /* *avx2_gatherdiv4di_2 */ |
| 22663 | case 4571: /* *avx2_gatherdiv4di_2 */ |
| 22664 | case 4570: /* *avx2_gatherdiv2df_2 */ |
| 22665 | case 4569: /* *avx2_gatherdiv2df_2 */ |
| 22666 | case 4568: /* *avx2_gatherdiv2di_2 */ |
| 22667 | case 4567: /* *avx2_gatherdiv2di_2 */ |
| 22668 | case 4566: /* *avx2_gatherdiv8sf */ |
| 22669 | case 4565: /* *avx2_gatherdiv8sf */ |
| 22670 | case 4564: /* *avx2_gatherdiv8si */ |
| 22671 | case 4563: /* *avx2_gatherdiv8si */ |
| 22672 | case 4562: /* *avx2_gatherdiv4sf */ |
| 22673 | case 4561: /* *avx2_gatherdiv4sf */ |
| 22674 | case 4560: /* *avx2_gatherdiv4si */ |
| 22675 | case 4559: /* *avx2_gatherdiv4si */ |
| 22676 | case 4558: /* *avx2_gatherdiv4df */ |
| 22677 | case 4557: /* *avx2_gatherdiv4df */ |
| 22678 | case 4556: /* *avx2_gatherdiv4di */ |
| 22679 | case 4555: /* *avx2_gatherdiv4di */ |
| 22680 | case 4554: /* *avx2_gatherdiv2df */ |
| 22681 | case 4553: /* *avx2_gatherdiv2df */ |
| 22682 | case 4552: /* *avx2_gatherdiv2di */ |
| 22683 | case 4551: /* *avx2_gatherdiv2di */ |
| 22684 | case 4550: /* *avx2_gathersiv8sf_2 */ |
| 22685 | case 4549: /* *avx2_gathersiv8sf_2 */ |
| 22686 | case 4548: /* *avx2_gathersiv8si_2 */ |
| 22687 | case 4547: /* *avx2_gathersiv8si_2 */ |
| 22688 | case 4546: /* *avx2_gathersiv4sf_2 */ |
| 22689 | case 4545: /* *avx2_gathersiv4sf_2 */ |
| 22690 | case 4544: /* *avx2_gathersiv4si_2 */ |
| 22691 | case 4543: /* *avx2_gathersiv4si_2 */ |
| 22692 | case 4542: /* *avx2_gathersiv4df_2 */ |
| 22693 | case 4541: /* *avx2_gathersiv4df_2 */ |
| 22694 | case 4540: /* *avx2_gathersiv4di_2 */ |
| 22695 | case 4539: /* *avx2_gathersiv4di_2 */ |
| 22696 | case 4538: /* *avx2_gathersiv2df_2 */ |
| 22697 | case 4537: /* *avx2_gathersiv2df_2 */ |
| 22698 | case 4536: /* *avx2_gathersiv2di_2 */ |
| 22699 | case 4535: /* *avx2_gathersiv2di_2 */ |
| 22700 | case 4534: /* *avx2_gathersiv8sf */ |
| 22701 | case 4533: /* *avx2_gathersiv8sf */ |
| 22702 | case 4532: /* *avx2_gathersiv8si */ |
| 22703 | case 4531: /* *avx2_gathersiv8si */ |
| 22704 | case 4530: /* *avx2_gathersiv4sf */ |
| 22705 | case 4529: /* *avx2_gathersiv4sf */ |
| 22706 | case 4528: /* *avx2_gathersiv4si */ |
| 22707 | case 4527: /* *avx2_gathersiv4si */ |
| 22708 | case 4526: /* *avx2_gathersiv4df */ |
| 22709 | case 4525: /* *avx2_gathersiv4df */ |
| 22710 | case 4524: /* *avx2_gathersiv4di */ |
| 22711 | case 4523: /* *avx2_gathersiv4di */ |
| 22712 | case 4522: /* *avx2_gathersiv2df */ |
| 22713 | case 4521: /* *avx2_gathersiv2df */ |
| 22714 | case 4520: /* *avx2_gathersiv2di */ |
| 22715 | case 4519: /* *avx2_gathersiv2di */ |
| 22716 | case 4243: /* avx512dq_broadcastv4df_mask_1 */ |
| 22717 | case 4242: /* *avx512dq_broadcastv4df_1 */ |
| 22718 | case 4241: /* avx512dq_broadcastv4di_mask_1 */ |
| 22719 | case 4240: /* *avx512dq_broadcastv4di_1 */ |
| 22720 | case 4239: /* avx512dq_broadcastv8df_mask_1 */ |
| 22721 | case 4238: /* *avx512dq_broadcastv8df_1 */ |
| 22722 | case 4237: /* avx512dq_broadcastv8di_mask_1 */ |
| 22723 | case 4236: /* *avx512dq_broadcastv8di_1 */ |
| 22724 | case 4235: /* avx512dq_broadcastv16si_mask_1 */ |
| 22725 | case 4234: /* *avx512dq_broadcastv16si_1 */ |
| 22726 | case 4233: /* avx512dq_broadcastv16sf_mask_1 */ |
| 22727 | case 4232: /* *avx512dq_broadcastv16sf_1 */ |
| 22728 | case 4231: /* avx512vl_broadcastv8sf_mask_1 */ |
| 22729 | case 4230: /* *avx512vl_broadcastv8sf_1 */ |
| 22730 | case 4229: /* avx512vl_broadcastv8si_mask_1 */ |
| 22731 | case 4228: /* *avx512vl_broadcastv8si_1 */ |
| 22732 | case 4227: /* avx512dq_broadcastv8sf_mask */ |
| 22733 | case 4226: /* *avx512dq_broadcastv8sf */ |
| 22734 | case 4225: /* avx512dq_broadcastv16sf_mask */ |
| 22735 | case 4224: /* *avx512dq_broadcastv16sf */ |
| 22736 | case 4223: /* avx512dq_broadcastv4si_mask */ |
| 22737 | case 4222: /* *avx512dq_broadcastv4si */ |
| 22738 | case 4221: /* avx512dq_broadcastv8si_mask */ |
| 22739 | case 4220: /* *avx512dq_broadcastv8si */ |
| 22740 | case 4219: /* avx512dq_broadcastv16si_mask */ |
| 22741 | case 4218: /* *avx512dq_broadcastv16si */ |
| 22742 | case 4211: /* vec_dupv4df */ |
| 22743 | case 4210: /* vec_dupv4di */ |
| 22744 | case 4209: /* vec_dupv8sf */ |
| 22745 | case 4208: /* vec_dupv8si */ |
| 22746 | case 4207: /* *vec_dupv4si */ |
| 22747 | case 4206: /* *vec_dupv8si */ |
| 22748 | case 4205: /* *vec_dupv8hi */ |
| 22749 | case 4204: /* *vec_dupv16hi */ |
| 22750 | case 4203: /* *vec_dupv16qi */ |
| 22751 | case 4202: /* *vec_dupv32qi */ |
| 22752 | case 4201: /* avx2_vbroadcasti128_v4di */ |
| 22753 | case 4200: /* avx2_vbroadcasti128_v8si */ |
| 22754 | case 4199: /* avx2_vbroadcasti128_v16hi */ |
| 22755 | case 4198: /* avx2_vbroadcasti128_v32qi */ |
| 22756 | case 4194: /* avx512vl_vec_dup_gprv2df_mask */ |
| 22757 | case 4193: /* *avx512vl_vec_dup_gprv2df */ |
| 22758 | case 4192: /* avx512vl_vec_dup_gprv4df_mask */ |
| 22759 | case 4191: /* *avx512vl_vec_dup_gprv4df */ |
| 22760 | case 4190: /* avx512f_vec_dup_gprv8df_mask */ |
| 22761 | case 4189: /* *avx512f_vec_dup_gprv8df */ |
| 22762 | case 4188: /* avx512vl_vec_dup_gprv4sf_mask */ |
| 22763 | case 4187: /* *avx512vl_vec_dup_gprv4sf */ |
| 22764 | case 4186: /* avx512vl_vec_dup_gprv8sf_mask */ |
| 22765 | case 4185: /* *avx512vl_vec_dup_gprv8sf */ |
| 22766 | case 4184: /* avx512f_vec_dup_gprv16sf_mask */ |
| 22767 | case 4183: /* *avx512f_vec_dup_gprv16sf */ |
| 22768 | case 4182: /* avx512vl_vec_dup_gprv2di_mask */ |
| 22769 | case 4181: /* *avx512vl_vec_dup_gprv2di */ |
| 22770 | case 4180: /* avx512vl_vec_dup_gprv4di_mask */ |
| 22771 | case 4179: /* *avx512vl_vec_dup_gprv4di */ |
| 22772 | case 4178: /* avx512f_vec_dup_gprv8di_mask */ |
| 22773 | case 4177: /* *avx512f_vec_dup_gprv8di */ |
| 22774 | case 4176: /* avx512vl_vec_dup_gprv4si_mask */ |
| 22775 | case 4175: /* *avx512vl_vec_dup_gprv4si */ |
| 22776 | case 4174: /* avx512vl_vec_dup_gprv8si_mask */ |
| 22777 | case 4173: /* *avx512vl_vec_dup_gprv8si */ |
| 22778 | case 4172: /* avx512f_vec_dup_gprv16si_mask */ |
| 22779 | case 4171: /* *avx512f_vec_dup_gprv16si */ |
| 22780 | case 4170: /* avx512vl_vec_dup_gprv8hi_mask */ |
| 22781 | case 4169: /* *avx512vl_vec_dup_gprv8hi */ |
| 22782 | case 4168: /* avx512vl_vec_dup_gprv16hi_mask */ |
| 22783 | case 4167: /* *avx512vl_vec_dup_gprv16hi */ |
| 22784 | case 4166: /* avx512bw_vec_dup_gprv32hi_mask */ |
| 22785 | case 4165: /* *avx512bw_vec_dup_gprv32hi */ |
| 22786 | case 4164: /* avx512vl_vec_dup_gprv32qi_mask */ |
| 22787 | case 4163: /* *avx512vl_vec_dup_gprv32qi */ |
| 22788 | case 4162: /* avx512vl_vec_dup_gprv16qi_mask */ |
| 22789 | case 4161: /* *avx512vl_vec_dup_gprv16qi */ |
| 22790 | case 4160: /* avx512bw_vec_dup_gprv64qi_mask */ |
| 22791 | case 4159: /* *avx512bw_vec_dup_gprv64qi */ |
| 22792 | case 4158: /* avx512f_broadcastv8di_mask */ |
| 22793 | case 4157: /* *avx512f_broadcastv8di */ |
| 22794 | case 4156: /* avx512f_broadcastv8df_mask */ |
| 22795 | case 4155: /* *avx512f_broadcastv8df */ |
| 22796 | case 4154: /* avx512f_broadcastv16si_mask */ |
| 22797 | case 4153: /* *avx512f_broadcastv16si */ |
| 22798 | case 4152: /* avx512f_broadcastv16sf_mask */ |
| 22799 | case 4151: /* *avx512f_broadcastv16sf */ |
| 22800 | case 4150: /* avx512vl_vec_dupv8hi_mask */ |
| 22801 | case 4149: /* avx512vl_vec_dupv8hi */ |
| 22802 | case 4148: /* avx512vl_vec_dupv16hi_mask */ |
| 22803 | case 4147: /* avx512vl_vec_dupv16hi */ |
| 22804 | case 4146: /* avx512bw_vec_dupv32hi_mask */ |
| 22805 | case 4145: /* avx512bw_vec_dupv32hi */ |
| 22806 | case 4144: /* avx512vl_vec_dupv32qi_mask */ |
| 22807 | case 4143: /* avx512vl_vec_dupv32qi */ |
| 22808 | case 4142: /* avx512vl_vec_dupv16qi_mask */ |
| 22809 | case 4141: /* avx512vl_vec_dupv16qi */ |
| 22810 | case 4140: /* avx512bw_vec_dupv64qi_mask */ |
| 22811 | case 4139: /* avx512bw_vec_dupv64qi */ |
| 22812 | case 4138: /* avx512vl_vec_dupv2df_mask */ |
| 22813 | case 4137: /* avx512vl_vec_dupv2df */ |
| 22814 | case 4136: /* avx512vl_vec_dupv4df_mask */ |
| 22815 | case 4135: /* avx512vl_vec_dupv4df */ |
| 22816 | case 4134: /* avx512f_vec_dupv8df_mask */ |
| 22817 | case 4133: /* avx512f_vec_dupv8df */ |
| 22818 | case 4132: /* avx512vl_vec_dupv4sf_mask */ |
| 22819 | case 4131: /* avx512vl_vec_dupv4sf */ |
| 22820 | case 4130: /* avx512vl_vec_dupv8sf_mask */ |
| 22821 | case 4129: /* avx512vl_vec_dupv8sf */ |
| 22822 | case 4128: /* avx512f_vec_dupv16sf_mask */ |
| 22823 | case 4127: /* avx512f_vec_dupv16sf */ |
| 22824 | case 4126: /* avx512vl_vec_dupv2di_mask */ |
| 22825 | case 4125: /* avx512vl_vec_dupv2di */ |
| 22826 | case 4124: /* avx512vl_vec_dupv4di_mask */ |
| 22827 | case 4123: /* avx512vl_vec_dupv4di */ |
| 22828 | case 4122: /* avx512f_vec_dupv8di_mask */ |
| 22829 | case 4121: /* avx512f_vec_dupv8di */ |
| 22830 | case 4120: /* avx512vl_vec_dupv4si_mask */ |
| 22831 | case 4119: /* avx512vl_vec_dupv4si */ |
| 22832 | case 4118: /* avx512vl_vec_dupv8si_mask */ |
| 22833 | case 4117: /* avx512vl_vec_dupv8si */ |
| 22834 | case 4116: /* avx512f_vec_dupv16si_mask */ |
| 22835 | case 4115: /* avx512f_vec_dupv16si */ |
| 22836 | case 4114: /* avx512bw_vec_dupv64qi_1 */ |
| 22837 | case 4113: /* avx512bw_vec_dupv32hi_1 */ |
| 22838 | case 4112: /* avx512f_vec_dupv8di_1 */ |
| 22839 | case 4111: /* avx512f_vec_dupv16si_1 */ |
| 22840 | case 4072: /* avx2_pbroadcastv4di_1 */ |
| 22841 | case 4071: /* avx2_pbroadcastv8si_1 */ |
| 22842 | case 4070: /* avx2_pbroadcastv16hi_1 */ |
| 22843 | case 4069: /* avx2_pbroadcastv32qi_1 */ |
| 22844 | case 4068: /* avx2_pbroadcastv2di */ |
| 22845 | case 4067: /* avx2_pbroadcastv4di */ |
| 22846 | case 4066: /* avx2_pbroadcastv4si */ |
| 22847 | case 4065: /* avx2_pbroadcastv8si */ |
| 22848 | case 4064: /* avx2_pbroadcastv8hi */ |
| 22849 | case 4063: /* avx2_pbroadcastv16hi */ |
| 22850 | case 4062: /* avx2_pbroadcastv32hi */ |
| 22851 | case 4061: /* avx2_pbroadcastv16qi */ |
| 22852 | case 4060: /* avx2_pbroadcastv32qi */ |
| 22853 | case 4059: /* avx2_pbroadcastv64qi */ |
| 22854 | case 4058: /* avx2_pbroadcastv8di */ |
| 22855 | case 4057: /* avx2_pbroadcastv16si */ |
| 22856 | case 3873: /* sse4_1_zero_extendv2siv2di2_mask */ |
| 22857 | case 3872: /* sse4_1_zero_extendv2siv2di2 */ |
| 22858 | case 3871: /* sse4_1_sign_extendv2siv2di2_mask */ |
| 22859 | case 3870: /* sse4_1_sign_extendv2siv2di2 */ |
| 22860 | case 3869: /* avx2_zero_extendv4siv4di2_mask */ |
| 22861 | case 3868: /* avx2_zero_extendv4siv4di2 */ |
| 22862 | case 3867: /* avx2_sign_extendv4siv4di2_mask */ |
| 22863 | case 3866: /* avx2_sign_extendv4siv4di2 */ |
| 22864 | case 3865: /* avx512f_zero_extendv8siv8di2_mask */ |
| 22865 | case 3864: /* avx512f_zero_extendv8siv8di2 */ |
| 22866 | case 3863: /* avx512f_sign_extendv8siv8di2_mask */ |
| 22867 | case 3862: /* avx512f_sign_extendv8siv8di2 */ |
| 22868 | case 3861: /* sse4_1_zero_extendv2hiv2di2_mask */ |
| 22869 | case 3860: /* sse4_1_zero_extendv2hiv2di2 */ |
| 22870 | case 3859: /* sse4_1_sign_extendv2hiv2di2_mask */ |
| 22871 | case 3858: /* sse4_1_sign_extendv2hiv2di2 */ |
| 22872 | case 3857: /* avx2_zero_extendv4hiv4di2_mask */ |
| 22873 | case 3856: /* avx2_zero_extendv4hiv4di2 */ |
| 22874 | case 3855: /* avx2_sign_extendv4hiv4di2_mask */ |
| 22875 | case 3854: /* avx2_sign_extendv4hiv4di2 */ |
| 22876 | case 3853: /* avx512f_zero_extendv8hiv8di2_mask */ |
| 22877 | case 3852: /* avx512f_zero_extendv8hiv8di2 */ |
| 22878 | case 3851: /* avx512f_sign_extendv8hiv8di2_mask */ |
| 22879 | case 3850: /* avx512f_sign_extendv8hiv8di2 */ |
| 22880 | case 3849: /* sse4_1_zero_extendv2qiv2di2_mask */ |
| 22881 | case 3848: /* sse4_1_zero_extendv2qiv2di2 */ |
| 22882 | case 3847: /* sse4_1_sign_extendv2qiv2di2_mask */ |
| 22883 | case 3846: /* sse4_1_sign_extendv2qiv2di2 */ |
| 22884 | case 3845: /* avx2_zero_extendv4qiv4di2_mask */ |
| 22885 | case 3844: /* avx2_zero_extendv4qiv4di2 */ |
| 22886 | case 3843: /* avx2_sign_extendv4qiv4di2_mask */ |
| 22887 | case 3842: /* avx2_sign_extendv4qiv4di2 */ |
| 22888 | case 3841: /* avx512f_zero_extendv8qiv8di2_mask */ |
| 22889 | case 3840: /* avx512f_zero_extendv8qiv8di2 */ |
| 22890 | case 3839: /* avx512f_sign_extendv8qiv8di2_mask */ |
| 22891 | case 3838: /* avx512f_sign_extendv8qiv8di2 */ |
| 22892 | case 3837: /* sse4_1_zero_extendv4hiv4si2_mask */ |
| 22893 | case 3836: /* sse4_1_zero_extendv4hiv4si2 */ |
| 22894 | case 3835: /* sse4_1_sign_extendv4hiv4si2_mask */ |
| 22895 | case 3834: /* sse4_1_sign_extendv4hiv4si2 */ |
| 22896 | case 3833: /* avx2_zero_extendv8hiv8si2_mask */ |
| 22897 | case 3832: /* avx2_zero_extendv8hiv8si2 */ |
| 22898 | case 3831: /* avx2_sign_extendv8hiv8si2_mask */ |
| 22899 | case 3830: /* avx2_sign_extendv8hiv8si2 */ |
| 22900 | case 3829: /* avx512f_zero_extendv16hiv16si2_mask */ |
| 22901 | case 3828: /* avx512f_zero_extendv16hiv16si2 */ |
| 22902 | case 3827: /* avx512f_sign_extendv16hiv16si2_mask */ |
| 22903 | case 3826: /* avx512f_sign_extendv16hiv16si2 */ |
| 22904 | case 3825: /* sse4_1_zero_extendv4qiv4si2_mask */ |
| 22905 | case 3824: /* sse4_1_zero_extendv4qiv4si2 */ |
| 22906 | case 3823: /* sse4_1_sign_extendv4qiv4si2_mask */ |
| 22907 | case 3822: /* sse4_1_sign_extendv4qiv4si2 */ |
| 22908 | case 3821: /* avx2_zero_extendv8qiv8si2_mask */ |
| 22909 | case 3820: /* avx2_zero_extendv8qiv8si2 */ |
| 22910 | case 3819: /* avx2_sign_extendv8qiv8si2_mask */ |
| 22911 | case 3818: /* avx2_sign_extendv8qiv8si2 */ |
| 22912 | case 3817: /* avx512f_zero_extendv16qiv16si2_mask */ |
| 22913 | case 3816: /* *avx512f_zero_extendv16qiv16si2 */ |
| 22914 | case 3815: /* avx512f_sign_extendv16qiv16si2_mask */ |
| 22915 | case 3814: /* *avx512f_sign_extendv16qiv16si2 */ |
| 22916 | case 3813: /* sse4_1_zero_extendv8qiv8hi2_mask */ |
| 22917 | case 3812: /* sse4_1_zero_extendv8qiv8hi2 */ |
| 22918 | case 3811: /* sse4_1_sign_extendv8qiv8hi2_mask */ |
| 22919 | case 3810: /* sse4_1_sign_extendv8qiv8hi2 */ |
| 22920 | case 3809: /* avx512bw_zero_extendv32qiv32hi2_mask */ |
| 22921 | case 3808: /* avx512bw_zero_extendv32qiv32hi2 */ |
| 22922 | case 3807: /* avx512bw_sign_extendv32qiv32hi2_mask */ |
| 22923 | case 3806: /* avx512bw_sign_extendv32qiv32hi2 */ |
| 22924 | case 3805: /* avx2_zero_extendv16qiv16hi2_mask */ |
| 22925 | case 3804: /* avx2_zero_extendv16qiv16hi2 */ |
| 22926 | case 3803: /* avx2_sign_extendv16qiv16hi2_mask */ |
| 22927 | case 3802: /* avx2_sign_extendv16qiv16hi2 */ |
| 22928 | case 3800: /* avx2_pblenddv4si */ |
| 22929 | case 3799: /* avx2_pblenddv8si */ |
| 22930 | case 3798: /* *avx2_pblendw */ |
| 22931 | case 3797: /* sse4_1_pblendw */ |
| 22932 | case 3796: /* sse4_1_pblendvb */ |
| 22933 | case 3795: /* avx2_pblendvb */ |
| 22934 | case 3786: /* sse4_1_movntdqa */ |
| 22935 | case 3785: /* avx2_movntdqa */ |
| 22936 | case 3784: /* avx512f_movntdqa */ |
| 22937 | case 3779: /* sse4_1_blendvpd */ |
| 22938 | case 3778: /* avx_blendvpd256 */ |
| 22939 | case 3777: /* sse4_1_blendvps */ |
| 22940 | case 3776: /* avx_blendvps256 */ |
| 22941 | case 3775: /* sse4_1_blendpd */ |
| 22942 | case 3774: /* avx_blendpd256 */ |
| 22943 | case 3773: /* sse4_1_blendps */ |
| 22944 | case 3772: /* avx_blendps256 */ |
| 22945 | case 3767: /* sse4a_vmmovntv2df */ |
| 22946 | case 3766: /* sse4a_vmmovntv4sf */ |
| 22947 | case 3765: /* sse4a_movntdf */ |
| 22948 | case 3764: /* sse4a_movntsf */ |
| 22949 | case 3671: /* *sse2_maskmovdqu */ |
| 22950 | case 3670: /* *sse2_maskmovdqu */ |
| 22951 | case 3669: /* *sse2_pmovmskb_zext */ |
| 22952 | case 3668: /* *avx2_pmovmskb_zext */ |
| 22953 | case 3667: /* sse2_pmovmskb */ |
| 22954 | case 3666: /* avx2_pmovmskb */ |
| 22955 | case 3665: /* *sse2_movmskpd_zext */ |
| 22956 | case 3664: /* *avx_movmskpd256_zext */ |
| 22957 | case 3663: /* *sse_movmskps_zext */ |
| 22958 | case 3662: /* *avx_movmskps256_zext */ |
| 22959 | case 3661: /* sse2_movmskpd */ |
| 22960 | case 3660: /* avx_movmskpd256 */ |
| 22961 | case 3659: /* sse_movmskps */ |
| 22962 | case 3658: /* avx_movmskps256 */ |
| 22963 | case 3620: /* sse2_loadld */ |
| 22964 | case 2930: /* *avx512f_us_truncatev8div16qi2_mask_1 */ |
| 22965 | case 2929: /* *avx512f_truncatev8div16qi2_mask_1 */ |
| 22966 | case 2928: /* *avx512f_ss_truncatev8div16qi2_mask_1 */ |
| 22967 | case 2927: /* avx512f_us_truncatev8div16qi2_mask */ |
| 22968 | case 2926: /* avx512f_truncatev8div16qi2_mask */ |
| 22969 | case 2925: /* avx512f_ss_truncatev8div16qi2_mask */ |
| 22970 | case 2921: /* *avx512f_us_truncatev8div16qi2 */ |
| 22971 | case 2920: /* *avx512f_truncatev8div16qi2 */ |
| 22972 | case 2919: /* *avx512f_ss_truncatev8div16qi2 */ |
| 22973 | case 2915: /* *avx512vl_us_truncatev2div2si2_mask_1 */ |
| 22974 | case 2914: /* *avx512vl_truncatev2div2si2_mask_1 */ |
| 22975 | case 2913: /* *avx512vl_ss_truncatev2div2si2_mask_1 */ |
| 22976 | case 2912: /* avx512vl_us_truncatev2div2si2_mask */ |
| 22977 | case 2911: /* avx512vl_truncatev2div2si2_mask */ |
| 22978 | case 2910: /* avx512vl_ss_truncatev2div2si2_mask */ |
| 22979 | case 2906: /* *avx512vl_us_truncatev2div2si2 */ |
| 22980 | case 2905: /* *avx512vl_truncatev2div2si2 */ |
| 22981 | case 2904: /* *avx512vl_ss_truncatev2div2si2 */ |
| 22982 | case 2900: /* *avx512vl_us_truncatev2div2hi2_mask_1 */ |
| 22983 | case 2899: /* *avx512vl_truncatev2div2hi2_mask_1 */ |
| 22984 | case 2898: /* *avx512vl_ss_truncatev2div2hi2_mask_1 */ |
| 22985 | case 2897: /* avx512vl_us_truncatev2div2hi2_mask */ |
| 22986 | case 2896: /* avx512vl_truncatev2div2hi2_mask */ |
| 22987 | case 2895: /* avx512vl_ss_truncatev2div2hi2_mask */ |
| 22988 | case 2885: /* *avx512vl_us_truncatev4div4hi2_mask_1 */ |
| 22989 | case 2884: /* *avx512vl_truncatev4div4hi2_mask_1 */ |
| 22990 | case 2883: /* *avx512vl_ss_truncatev4div4hi2_mask_1 */ |
| 22991 | case 2882: /* *avx512vl_us_truncatev4siv4hi2_mask_1 */ |
| 22992 | case 2881: /* *avx512vl_truncatev4siv4hi2_mask_1 */ |
| 22993 | case 2880: /* *avx512vl_ss_truncatev4siv4hi2_mask_1 */ |
| 22994 | case 2879: /* avx512vl_us_truncatev4div4hi2_mask */ |
| 22995 | case 2878: /* avx512vl_truncatev4div4hi2_mask */ |
| 22996 | case 2877: /* avx512vl_ss_truncatev4div4hi2_mask */ |
| 22997 | case 2876: /* avx512vl_us_truncatev4siv4hi2_mask */ |
| 22998 | case 2875: /* avx512vl_truncatev4siv4hi2_mask */ |
| 22999 | case 2874: /* avx512vl_ss_truncatev4siv4hi2_mask */ |
| 23000 | case 2867: /* *avx512vl_us_truncatev4siv4hi2 */ |
| 23001 | case 2866: /* *avx512vl_truncatev4siv4hi2 */ |
| 23002 | case 2865: /* *avx512vl_ss_truncatev4siv4hi2 */ |
| 23003 | case 2864: /* *avx512vl_us_truncatev2div2hi2 */ |
| 23004 | case 2863: /* *avx512vl_truncatev2div2hi2 */ |
| 23005 | case 2862: /* *avx512vl_ss_truncatev2div2hi2 */ |
| 23006 | case 2861: /* *avx512vl_us_truncatev4div4hi2 */ |
| 23007 | case 2860: /* *avx512vl_truncatev4div4hi2 */ |
| 23008 | case 2859: /* *avx512vl_ss_truncatev4div4hi2 */ |
| 23009 | case 2852: /* *avx512vl_us_truncatev8siv8qi2_mask_1 */ |
| 23010 | case 2851: /* *avx512vl_truncatev8siv8qi2_mask_1 */ |
| 23011 | case 2850: /* *avx512vl_ss_truncatev8siv8qi2_mask_1 */ |
| 23012 | case 2849: /* *avx512vl_us_truncatev8hiv8qi2_mask_1 */ |
| 23013 | case 2848: /* *avx512vl_truncatev8hiv8qi2_mask_1 */ |
| 23014 | case 2847: /* *avx512vl_ss_truncatev8hiv8qi2_mask_1 */ |
| 23015 | case 2846: /* avx512vl_us_truncatev8siv8qi2_mask */ |
| 23016 | case 2845: /* avx512vl_truncatev8siv8qi2_mask */ |
| 23017 | case 2844: /* avx512vl_ss_truncatev8siv8qi2_mask */ |
| 23018 | case 2843: /* avx512vl_us_truncatev8hiv8qi2_mask */ |
| 23019 | case 2842: /* avx512vl_truncatev8hiv8qi2_mask */ |
| 23020 | case 2841: /* avx512vl_ss_truncatev8hiv8qi2_mask */ |
| 23021 | case 2828: /* *avx512vl_us_truncatev4div4qi2_mask_1 */ |
| 23022 | case 2827: /* *avx512vl_truncatev4div4qi2_mask_1 */ |
| 23023 | case 2826: /* *avx512vl_ss_truncatev4div4qi2_mask_1 */ |
| 23024 | case 2825: /* *avx512vl_us_truncatev4siv4qi2_mask_1 */ |
| 23025 | case 2824: /* *avx512vl_truncatev4siv4qi2_mask_1 */ |
| 23026 | case 2823: /* *avx512vl_ss_truncatev4siv4qi2_mask_1 */ |
| 23027 | case 2822: /* avx512vl_us_truncatev4div4qi2_mask */ |
| 23028 | case 2821: /* avx512vl_truncatev4div4qi2_mask */ |
| 23029 | case 2820: /* avx512vl_ss_truncatev4div4qi2_mask */ |
| 23030 | case 2819: /* avx512vl_us_truncatev4siv4qi2_mask */ |
| 23031 | case 2818: /* avx512vl_truncatev4siv4qi2_mask */ |
| 23032 | case 2817: /* avx512vl_ss_truncatev4siv4qi2_mask */ |
| 23033 | case 2807: /* *avx512vl_us_truncatev2div2qi2_mask_1 */ |
| 23034 | case 2806: /* *avx512vl_truncatev2div2qi2_mask_1 */ |
| 23035 | case 2805: /* *avx512vl_ss_truncatev2div2qi2_mask_1 */ |
| 23036 | case 2804: /* avx512vl_us_truncatev2div2qi2_mask */ |
| 23037 | case 2803: /* avx512vl_truncatev2div2qi2_mask */ |
| 23038 | case 2802: /* avx512vl_ss_truncatev2div2qi2_mask */ |
| 23039 | case 2798: /* *avx512vl_us_truncatev8hiv8qi2 */ |
| 23040 | case 2797: /* *avx512vl_truncatev8hiv8qi2 */ |
| 23041 | case 2796: /* *avx512vl_ss_truncatev8hiv8qi2 */ |
| 23042 | case 2795: /* *avx512vl_us_truncatev4siv4qi2 */ |
| 23043 | case 2794: /* *avx512vl_truncatev4siv4qi2 */ |
| 23044 | case 2793: /* *avx512vl_ss_truncatev4siv4qi2 */ |
| 23045 | case 2792: /* *avx512vl_us_truncatev8siv8qi2 */ |
| 23046 | case 2791: /* *avx512vl_truncatev8siv8qi2 */ |
| 23047 | case 2790: /* *avx512vl_ss_truncatev8siv8qi2 */ |
| 23048 | case 2789: /* *avx512vl_us_truncatev2div2qi2 */ |
| 23049 | case 2788: /* *avx512vl_truncatev2div2qi2 */ |
| 23050 | case 2787: /* *avx512vl_ss_truncatev2div2qi2 */ |
| 23051 | case 2786: /* *avx512vl_us_truncatev4div4qi2 */ |
| 23052 | case 2785: /* *avx512vl_truncatev4div4qi2 */ |
| 23053 | case 2784: /* *avx512vl_ss_truncatev4div4qi2 */ |
| 23054 | case 2729: /* *vec_extractv2df_0_sse */ |
| 23055 | case 2727: /* *vec_extractv2df_1_sse */ |
| 23056 | case 2461: /* *vec_concatv4sf */ |
| 23057 | case 2453: /* sse_movss */ |
| 23058 | case 2451: /* sse_storelps */ |
| 23059 | case 2450: /* sse_loadhps */ |
| 23060 | case 2449: /* sse_storehps */ |
| 23061 | case 2419: /* sse_movlhps */ |
| 23062 | case 2418: /* sse_movhlps */ |
| 23063 | case 1304: /* sse2_movntv2df */ |
| 23064 | case 1303: /* avx_movntv4df */ |
| 23065 | case 1302: /* avx512f_movntv8df */ |
| 23066 | case 1301: /* sse_movntv4sf */ |
| 23067 | case 1300: /* avx_movntv8sf */ |
| 23068 | case 1299: /* avx512f_movntv16sf */ |
| 23069 | case 1298: /* sse2_movntidi */ |
| 23070 | case 1297: /* sse2_movntisi */ |
| 23071 | case 1296: /* sse3_lddqu */ |
| 23072 | case 1295: /* avx_lddqu256 */ |
| 23073 | case 1293: /* sse2_movq128 */ |
| 23074 | case 1274: /* avx512vl_blendmv8hi */ |
| 23075 | case 1273: /* avx512vl_blendmv16hi */ |
| 23076 | case 1272: /* avx512bw_blendmv32hi */ |
| 23077 | case 1271: /* avx512vl_blendmv32qi */ |
| 23078 | case 1270: /* avx512vl_blendmv16qi */ |
| 23079 | case 1269: /* avx512bw_blendmv64qi */ |
| 23080 | case 1268: /* avx512vl_blendmv2df */ |
| 23081 | case 1267: /* avx512vl_blendmv4df */ |
| 23082 | case 1266: /* avx512f_blendmv8df */ |
| 23083 | case 1265: /* avx512vl_blendmv4sf */ |
| 23084 | case 1264: /* avx512vl_blendmv8sf */ |
| 23085 | case 1263: /* avx512f_blendmv16sf */ |
| 23086 | case 1262: /* avx512vl_blendmv2di */ |
| 23087 | case 1261: /* avx512vl_blendmv4di */ |
| 23088 | case 1260: /* avx512f_blendmv8di */ |
| 23089 | case 1259: /* avx512vl_blendmv4si */ |
| 23090 | case 1258: /* avx512vl_blendmv8si */ |
| 23091 | case 1257: /* avx512f_blendmv16si */ |
| 23092 | case 933: /* movmsk_df */ |
| 23093 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) |
| 23094 | { |
| 23095 | return 1; |
| 23096 | } |
| 23097 | else if (cached_memory == MEMORY_LOAD) |
| 23098 | { |
| 23099 | return 2; |
| 23100 | } |
| 23101 | else if (cached_memory == MEMORY_STORE) |
| 23102 | { |
| 23103 | return 1; |
| 23104 | } |
| 23105 | else |
| 23106 | { |
| 23107 | return 0; |
| 23108 | } |
| 23109 | |
| 23110 | case 880: /* rintdf2_frndint */ |
| 23111 | return 32 /* 0x20 */; |
| 23112 | |
| 23113 | case 879: /* rintsf2_frndint */ |
| 23114 | return 18 /* 0x12 */; |
| 23115 | |
| 23116 | case 878: /* rintxf2 */ |
| 23117 | case 875: /* fscalexf4_i387 */ |
| 23118 | case 874: /* *f2xm1xf2_i387 */ |
| 23119 | case 873: /* fxtract_extenddfxf3_i387 */ |
| 23120 | case 872: /* fxtract_extendsfxf3_i387 */ |
| 23121 | case 871: /* fxtractxf3_i387 */ |
| 23122 | case 870: /* fyl2xp1_extenddfxf3_i387 */ |
| 23123 | case 869: /* fyl2xp1_extendsfxf3_i387 */ |
| 23124 | case 868: /* fyl2xp1xf3_i387 */ |
| 23125 | case 867: /* fyl2x_extenddfxf3_i387 */ |
| 23126 | case 866: /* fyl2x_extendsfxf3_i387 */ |
| 23127 | case 865: /* fyl2xxf3_i387 */ |
| 23128 | case 864: /* fpatan_extenddfxf3_i387 */ |
| 23129 | case 863: /* fpatan_extendsfxf3_i387 */ |
| 23130 | case 862: /* *fpatanxf3_i387 */ |
| 23131 | case 861: /* fptan_extenddfxf4_i387 */ |
| 23132 | case 860: /* fptan_extendsfxf4_i387 */ |
| 23133 | case 859: /* fptanxf4_i387 */ |
| 23134 | case 858: /* sincos_extenddfxf3_i387 */ |
| 23135 | case 857: /* sincos_extendsfxf3_i387 */ |
| 23136 | case 856: /* sincosxf3 */ |
| 23137 | case 855: /* *cos_extenddfxf2_i387 */ |
| 23138 | case 854: /* *sin_extenddfxf2_i387 */ |
| 23139 | case 853: /* *cos_extendsfxf2_i387 */ |
| 23140 | case 852: /* *sin_extendsfxf2_i387 */ |
| 23141 | case 851: /* *cosxf2_i387 */ |
| 23142 | case 850: /* *sinxf2_i387 */ |
| 23143 | case 849: /* fprem1xf4_i387 */ |
| 23144 | case 848: /* fpremxf4_i387 */ |
| 23145 | case 844: /* sqrt_extenddfxf2_i387 */ |
| 23146 | case 843: /* sqrt_extendsfxf2_i387 */ |
| 23147 | case 842: /* sqrtxf2 */ |
| 23148 | return 38 /* 0x26 */; |
| 23149 | |
| 23150 | case 693: /* simple_return_indirect_internal */ |
| 23151 | case 663: /* *tablejump_1 */ |
| 23152 | case 662: /* *tablejump_1 */ |
| 23153 | case 661: /* *indirect_jump */ |
| 23154 | case 660: /* *indirect_jump */ |
| 23155 | extract_constrain_insn_cached (insn); |
| 23156 | if ( |
| 23157 | #line 12442 "/___NETBSD_SRC___/tools/gcc/../../external/gpl3/gcc/dist/gcc/config/i386/i386.md" |
| 23158 | ((cfun->machine->indirect_branch_type |
| 23159 | != indirect_branch_keep))) |
| 23160 | { |
| 23161 | return 6; |
| 23162 | } |
| 23163 | else if ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) |
| 23164 | { |
| 23165 | return 1; |
| 23166 | } |
| 23167 | else |
| 23168 | { |
| 23169 | return 6; |
| 23170 | } |
| 23171 | |
| 23172 | case 659: /* jump */ |
| 23173 | case 628: /* *jcc_2 */ |
| 23174 | case 627: /* *jcc_1 */ |
| 23175 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) |
| 23176 | { |
| 23177 | return 1; |
| 23178 | } |
| 23179 | else |
| 23180 | { |
| 23181 | return 6; |
| 23182 | } |
| 23183 | |
| 23184 | case 4043: /* xop_pcom_tfv2di3 */ |
| 23185 | case 4042: /* xop_pcom_tfv4si3 */ |
| 23186 | case 4041: /* xop_pcom_tfv8hi3 */ |
| 23187 | case 4040: /* xop_pcom_tfv16qi3 */ |
| 23188 | case 4039: /* xop_maskcmp_uns2v2di3 */ |
| 23189 | case 4038: /* xop_maskcmp_uns2v4si3 */ |
| 23190 | case 4037: /* xop_maskcmp_uns2v8hi3 */ |
| 23191 | case 4036: /* xop_maskcmp_uns2v16qi3 */ |
| 23192 | case 4035: /* xop_maskcmp_unsv2di3 */ |
| 23193 | case 4034: /* xop_maskcmp_unsv4si3 */ |
| 23194 | case 4033: /* xop_maskcmp_unsv8hi3 */ |
| 23195 | case 4032: /* xop_maskcmp_unsv16qi3 */ |
| 23196 | case 3890: /* ptesttf2 */ |
| 23197 | case 3889: /* avx_ptestv4df */ |
| 23198 | case 3888: /* avx_ptestv8sf */ |
| 23199 | case 3887: /* avx_ptestv4di */ |
| 23200 | case 3886: /* avx_ptestv8si */ |
| 23201 | case 3885: /* avx_ptestv16hi */ |
| 23202 | case 3884: /* avx_ptestv32qi */ |
| 23203 | case 3883: /* sse4_1_ptestv2df */ |
| 23204 | case 3882: /* sse4_1_ptestv4sf */ |
| 23205 | case 3881: /* sse4_1_ptestv2di */ |
| 23206 | case 3880: /* sse4_1_ptestv4si */ |
| 23207 | case 3879: /* sse4_1_ptestv8hi */ |
| 23208 | case 3878: /* sse4_1_ptestv16qi */ |
| 23209 | case 3877: /* avx_vtestpd */ |
| 23210 | case 3876: /* avx_vtestpd256 */ |
| 23211 | case 3875: /* avx_vtestps */ |
| 23212 | case 3874: /* avx_vtestps256 */ |
| 23213 | case 3383: /* sse2_gtv4si3 */ |
| 23214 | case 3382: /* sse2_gtv8hi3 */ |
| 23215 | case 3381: /* sse2_gtv16qi3 */ |
| 23216 | case 3380: /* avx512vl_gtv8hi3_mask */ |
| 23217 | case 3379: /* avx512vl_gtv8hi3 */ |
| 23218 | case 3378: /* avx512vl_gtv16hi3_mask */ |
| 23219 | case 3377: /* avx512vl_gtv16hi3 */ |
| 23220 | case 3376: /* avx512bw_gtv32hi3_mask */ |
| 23221 | case 3375: /* avx512bw_gtv32hi3 */ |
| 23222 | case 3374: /* avx512vl_gtv32qi3_mask */ |
| 23223 | case 3373: /* avx512vl_gtv32qi3 */ |
| 23224 | case 3372: /* avx512vl_gtv16qi3_mask */ |
| 23225 | case 3371: /* avx512vl_gtv16qi3 */ |
| 23226 | case 3370: /* avx512bw_gtv64qi3_mask */ |
| 23227 | case 3369: /* avx512bw_gtv64qi3 */ |
| 23228 | case 3368: /* avx512vl_gtv2di3_mask */ |
| 23229 | case 3367: /* avx512vl_gtv2di3 */ |
| 23230 | case 3366: /* avx512vl_gtv4di3_mask */ |
| 23231 | case 3365: /* avx512vl_gtv4di3 */ |
| 23232 | case 3364: /* avx512f_gtv8di3_mask */ |
| 23233 | case 3363: /* avx512f_gtv8di3 */ |
| 23234 | case 3362: /* avx512vl_gtv4si3_mask */ |
| 23235 | case 3361: /* avx512vl_gtv4si3 */ |
| 23236 | case 3360: /* avx512vl_gtv8si3_mask */ |
| 23237 | case 3359: /* avx512vl_gtv8si3 */ |
| 23238 | case 3358: /* avx512f_gtv16si3_mask */ |
| 23239 | case 3357: /* avx512f_gtv16si3 */ |
| 23240 | case 3356: /* avx2_gtv4di3 */ |
| 23241 | case 3355: /* avx2_gtv8si3 */ |
| 23242 | case 3354: /* avx2_gtv16hi3 */ |
| 23243 | case 3353: /* avx2_gtv32qi3 */ |
| 23244 | case 3352: /* sse4_2_gtv2di3 */ |
| 23245 | case 3351: /* *sse2_eqv4si3 */ |
| 23246 | case 3350: /* *sse2_eqv8hi3 */ |
| 23247 | case 3349: /* *sse2_eqv16qi3 */ |
| 23248 | case 3348: /* *sse4_1_eqv2di3 */ |
| 23249 | case 3347: /* avx512vl_eqv2di3_mask_1 */ |
| 23250 | case 3346: /* avx512vl_eqv2di3_1 */ |
| 23251 | case 3345: /* avx512vl_eqv4di3_mask_1 */ |
| 23252 | case 3344: /* avx512vl_eqv4di3_1 */ |
| 23253 | case 3343: /* avx512f_eqv8di3_mask_1 */ |
| 23254 | case 3342: /* avx512f_eqv8di3_1 */ |
| 23255 | case 3341: /* avx512vl_eqv4si3_mask_1 */ |
| 23256 | case 3340: /* avx512vl_eqv4si3_1 */ |
| 23257 | case 3339: /* avx512vl_eqv8si3_mask_1 */ |
| 23258 | case 3338: /* avx512vl_eqv8si3_1 */ |
| 23259 | case 3337: /* avx512f_eqv16si3_mask_1 */ |
| 23260 | case 3336: /* avx512f_eqv16si3_1 */ |
| 23261 | case 3335: /* avx512vl_eqv8hi3_mask_1 */ |
| 23262 | case 3334: /* avx512vl_eqv8hi3_1 */ |
| 23263 | case 3333: /* avx512vl_eqv16hi3_mask_1 */ |
| 23264 | case 3332: /* avx512vl_eqv16hi3_1 */ |
| 23265 | case 3331: /* avx512bw_eqv32hi3_mask_1 */ |
| 23266 | case 3330: /* avx512bw_eqv32hi3_1 */ |
| 23267 | case 3329: /* avx512vl_eqv32qi3_mask_1 */ |
| 23268 | case 3328: /* avx512vl_eqv32qi3_1 */ |
| 23269 | case 3327: /* avx512vl_eqv16qi3_mask_1 */ |
| 23270 | case 3326: /* avx512vl_eqv16qi3_1 */ |
| 23271 | case 3325: /* avx512bw_eqv64qi3_mask_1 */ |
| 23272 | case 3324: /* avx512bw_eqv64qi3_1 */ |
| 23273 | case 3323: /* *avx2_eqv4di3 */ |
| 23274 | case 3322: /* *avx2_eqv8si3 */ |
| 23275 | case 3321: /* *avx2_eqv16hi3 */ |
| 23276 | case 3320: /* *avx2_eqv32qi3 */ |
| 23277 | case 1740: /* sse2_ucomi_round */ |
| 23278 | case 1739: /* sse2_ucomi */ |
| 23279 | case 1738: /* sse_ucomi_round */ |
| 23280 | case 1737: /* sse_ucomi */ |
| 23281 | case 1736: /* sse2_comi_round */ |
| 23282 | case 1735: /* sse2_comi */ |
| 23283 | case 1734: /* sse_comi_round */ |
| 23284 | case 1733: /* sse_comi */ |
| 23285 | case 1732: /* avx512f_maskcmpv2df3 */ |
| 23286 | case 1731: /* avx512f_maskcmpv4df3 */ |
| 23287 | case 1730: /* avx512f_maskcmpv8df3 */ |
| 23288 | case 1729: /* avx512f_maskcmpv4sf3 */ |
| 23289 | case 1728: /* avx512f_maskcmpv8sf3 */ |
| 23290 | case 1727: /* avx512f_maskcmpv16sf3 */ |
| 23291 | case 1726: /* avx512f_vmcmpv2df3_mask_round */ |
| 23292 | case 1725: /* avx512f_vmcmpv2df3_mask */ |
| 23293 | case 1724: /* avx512f_vmcmpv4sf3_mask_round */ |
| 23294 | case 1723: /* avx512f_vmcmpv4sf3_mask */ |
| 23295 | case 1722: /* avx512f_vmcmpv2df3_round */ |
| 23296 | case 1721: /* avx512f_vmcmpv2df3 */ |
| 23297 | case 1720: /* avx512f_vmcmpv4sf3_round */ |
| 23298 | case 1719: /* avx512f_vmcmpv4sf3 */ |
| 23299 | case 1718: /* avx512vl_ucmpv2di3_mask */ |
| 23300 | case 1717: /* avx512vl_ucmpv2di3 */ |
| 23301 | case 1716: /* avx512vl_ucmpv4di3_mask */ |
| 23302 | case 1715: /* avx512vl_ucmpv4di3 */ |
| 23303 | case 1714: /* avx512f_ucmpv8di3_mask */ |
| 23304 | case 1713: /* avx512f_ucmpv8di3 */ |
| 23305 | case 1712: /* avx512vl_ucmpv4si3_mask */ |
| 23306 | case 1711: /* avx512vl_ucmpv4si3 */ |
| 23307 | case 1710: /* avx512vl_ucmpv8si3_mask */ |
| 23308 | case 1709: /* avx512vl_ucmpv8si3 */ |
| 23309 | case 1708: /* avx512f_ucmpv16si3_mask */ |
| 23310 | case 1707: /* avx512f_ucmpv16si3 */ |
| 23311 | case 1706: /* avx512vl_ucmpv8hi3_mask */ |
| 23312 | case 1705: /* avx512vl_ucmpv8hi3 */ |
| 23313 | case 1704: /* avx512vl_ucmpv16hi3_mask */ |
| 23314 | case 1703: /* avx512vl_ucmpv16hi3 */ |
| 23315 | case 1702: /* avx512bw_ucmpv32hi3_mask */ |
| 23316 | case 1701: /* avx512bw_ucmpv32hi3 */ |
| 23317 | case 1700: /* avx512vl_ucmpv32qi3_mask */ |
| 23318 | case 1699: /* avx512vl_ucmpv32qi3 */ |
| 23319 | case 1698: /* avx512vl_ucmpv16qi3_mask */ |
| 23320 | case 1697: /* avx512vl_ucmpv16qi3 */ |
| 23321 | case 1696: /* avx512bw_ucmpv64qi3_mask */ |
| 23322 | case 1695: /* avx512bw_ucmpv64qi3 */ |
| 23323 | case 1694: /* avx512vl_cmpv8hi3_mask */ |
| 23324 | case 1693: /* avx512vl_cmpv8hi3 */ |
| 23325 | case 1692: /* avx512vl_cmpv16hi3_mask */ |
| 23326 | case 1691: /* avx512vl_cmpv16hi3 */ |
| 23327 | case 1690: /* avx512bw_cmpv32hi3_mask */ |
| 23328 | case 1689: /* avx512bw_cmpv32hi3 */ |
| 23329 | case 1688: /* avx512vl_cmpv32qi3_mask */ |
| 23330 | case 1687: /* avx512vl_cmpv32qi3 */ |
| 23331 | case 1686: /* avx512vl_cmpv16qi3_mask */ |
| 23332 | case 1685: /* avx512vl_cmpv16qi3 */ |
| 23333 | case 1684: /* avx512bw_cmpv64qi3_mask */ |
| 23334 | case 1683: /* avx512bw_cmpv64qi3 */ |
| 23335 | case 1682: /* avx512vl_cmpv2df3_mask */ |
| 23336 | case 1681: /* avx512vl_cmpv2df3 */ |
| 23337 | case 1680: /* avx512vl_cmpv4df3_mask */ |
| 23338 | case 1679: /* avx512vl_cmpv4df3 */ |
| 23339 | case 1678: /* avx512f_cmpv8df3_mask_round */ |
| 23340 | case 1677: /* avx512f_cmpv8df3_round */ |
| 23341 | case 1676: /* avx512f_cmpv8df3_mask */ |
| 23342 | case 1675: /* avx512f_cmpv8df3 */ |
| 23343 | case 1674: /* avx512vl_cmpv4sf3_mask */ |
| 23344 | case 1673: /* avx512vl_cmpv4sf3 */ |
| 23345 | case 1672: /* avx512vl_cmpv8sf3_mask */ |
| 23346 | case 1671: /* avx512vl_cmpv8sf3 */ |
| 23347 | case 1670: /* avx512f_cmpv16sf3_mask_round */ |
| 23348 | case 1669: /* avx512f_cmpv16sf3_round */ |
| 23349 | case 1668: /* avx512f_cmpv16sf3_mask */ |
| 23350 | case 1667: /* avx512f_cmpv16sf3 */ |
| 23351 | case 1666: /* avx512vl_cmpv2di3_mask */ |
| 23352 | case 1665: /* avx512vl_cmpv2di3 */ |
| 23353 | case 1664: /* avx512vl_cmpv4di3_mask */ |
| 23354 | case 1663: /* avx512vl_cmpv4di3 */ |
| 23355 | case 1662: /* avx512f_cmpv8di3_mask_round */ |
| 23356 | case 1661: /* avx512f_cmpv8di3_round */ |
| 23357 | case 1660: /* avx512f_cmpv8di3_mask */ |
| 23358 | case 1659: /* avx512f_cmpv8di3 */ |
| 23359 | case 1658: /* avx512vl_cmpv4si3_mask */ |
| 23360 | case 1657: /* avx512vl_cmpv4si3 */ |
| 23361 | case 1656: /* avx512vl_cmpv8si3_mask */ |
| 23362 | case 1655: /* avx512vl_cmpv8si3 */ |
| 23363 | case 1654: /* avx512f_cmpv16si3_mask_round */ |
| 23364 | case 1653: /* avx512f_cmpv16si3_round */ |
| 23365 | case 1652: /* avx512f_cmpv16si3_mask */ |
| 23366 | case 1651: /* avx512f_cmpv16si3 */ |
| 23367 | case 1650: /* sse2_vmmaskcmpv2df3 */ |
| 23368 | case 1649: /* sse_vmmaskcmpv4sf3 */ |
| 23369 | case 1648: /* sse2_maskcmpv2df3 */ |
| 23370 | case 1647: /* avx_maskcmpv4df3 */ |
| 23371 | case 1646: /* sse_maskcmpv4sf3 */ |
| 23372 | case 1645: /* avx_maskcmpv8sf3 */ |
| 23373 | case 1644: /* *sse2_maskcmpv2df3_comm */ |
| 23374 | case 1643: /* *avx_maskcmpv4df3_comm */ |
| 23375 | case 1642: /* *sse_maskcmpv4sf3_comm */ |
| 23376 | case 1641: /* *avx_maskcmpv8sf3_comm */ |
| 23377 | case 1640: /* avx_vmcmpv2df3 */ |
| 23378 | case 1639: /* avx_vmcmpv4sf3 */ |
| 23379 | case 1638: /* avx_cmpv2df3 */ |
| 23380 | case 1637: /* avx_cmpv4df3 */ |
| 23381 | case 1636: /* avx_cmpv4sf3 */ |
| 23382 | case 1635: /* avx_cmpv8sf3 */ |
| 23383 | case 1620: /* sse3_hsubv4sf3 */ |
| 23384 | case 1619: /* sse3_haddv4sf3 */ |
| 23385 | case 1618: /* avx_hsubv8sf3 */ |
| 23386 | case 1617: /* avx_haddv8sf3 */ |
| 23387 | case 1616: /* *sse3_hsubv2df3_low */ |
| 23388 | case 1615: /* *sse3_haddv2df3_low */ |
| 23389 | case 1614: /* sse3_hsubv2df3 */ |
| 23390 | case 1613: /* *sse3_haddv2df3 */ |
| 23391 | case 1612: /* avx_hsubv4df3 */ |
| 23392 | case 1611: /* avx_haddv4df3 */ |
| 23393 | case 1610: /* sse3_addsubv4sf3 */ |
| 23394 | case 1609: /* avx_addsubv8sf3 */ |
| 23395 | case 1608: /* sse3_addsubv2df3 */ |
| 23396 | case 1607: /* avx_addsubv4df3 */ |
| 23397 | case 1598: /* ieee_minv2df3_mask */ |
| 23398 | case 1597: /* ieee_minv2df3 */ |
| 23399 | case 1596: /* ieee_maxv2df3_mask */ |
| 23400 | case 1595: /* ieee_maxv2df3 */ |
| 23401 | case 1594: /* ieee_minv4df3_mask */ |
| 23402 | case 1593: /* ieee_minv4df3 */ |
| 23403 | case 1592: /* ieee_maxv4df3_mask */ |
| 23404 | case 1591: /* ieee_maxv4df3 */ |
| 23405 | case 1590: /* ieee_minv8df3_mask_round */ |
| 23406 | case 1589: /* ieee_minv8df3_mask */ |
| 23407 | case 1588: /* ieee_minv8df3_round */ |
| 23408 | case 1587: /* ieee_minv8df3 */ |
| 23409 | case 1586: /* ieee_maxv8df3_mask_round */ |
| 23410 | case 1585: /* ieee_maxv8df3_mask */ |
| 23411 | case 1584: /* ieee_maxv8df3_round */ |
| 23412 | case 1583: /* ieee_maxv8df3 */ |
| 23413 | case 1582: /* ieee_minv4sf3_mask */ |
| 23414 | case 1581: /* ieee_minv4sf3 */ |
| 23415 | case 1580: /* ieee_maxv4sf3_mask */ |
| 23416 | case 1579: /* ieee_maxv4sf3 */ |
| 23417 | case 1578: /* ieee_minv8sf3_mask */ |
| 23418 | case 1577: /* ieee_minv8sf3 */ |
| 23419 | case 1576: /* ieee_maxv8sf3_mask */ |
| 23420 | case 1575: /* ieee_maxv8sf3 */ |
| 23421 | case 1574: /* ieee_minv16sf3_mask_round */ |
| 23422 | case 1573: /* ieee_minv16sf3_mask */ |
| 23423 | case 1572: /* ieee_minv16sf3_round */ |
| 23424 | case 1571: /* ieee_minv16sf3 */ |
| 23425 | case 1570: /* ieee_maxv16sf3_mask_round */ |
| 23426 | case 1569: /* ieee_maxv16sf3_mask */ |
| 23427 | case 1568: /* ieee_maxv16sf3_round */ |
| 23428 | case 1567: /* ieee_maxv16sf3 */ |
| 23429 | case 1566: /* *sminv2df3_mask_round */ |
| 23430 | case 1565: /* *sminv2df3_mask */ |
| 23431 | case 1564: /* *sminv2df3_round */ |
| 23432 | case 1563: /* *sminv2df3 */ |
| 23433 | case 1562: /* *smaxv2df3_mask_round */ |
| 23434 | case 1561: /* *smaxv2df3_mask */ |
| 23435 | case 1560: /* *smaxv2df3_round */ |
| 23436 | case 1559: /* *smaxv2df3 */ |
| 23437 | case 1558: /* *sminv4df3_mask_round */ |
| 23438 | case 1557: /* *sminv4df3_mask */ |
| 23439 | case 1556: /* *sminv4df3_round */ |
| 23440 | case 1555: /* *sminv4df3 */ |
| 23441 | case 1554: /* *smaxv4df3_mask_round */ |
| 23442 | case 1553: /* *smaxv4df3_mask */ |
| 23443 | case 1552: /* *smaxv4df3_round */ |
| 23444 | case 1551: /* *smaxv4df3 */ |
| 23445 | case 1550: /* *sminv8df3_mask_round */ |
| 23446 | case 1549: /* *sminv8df3_mask */ |
| 23447 | case 1548: /* *sminv8df3_round */ |
| 23448 | case 1547: /* *sminv8df3 */ |
| 23449 | case 1546: /* *smaxv8df3_mask_round */ |
| 23450 | case 1545: /* *smaxv8df3_mask */ |
| 23451 | case 1544: /* *smaxv8df3_round */ |
| 23452 | case 1543: /* *smaxv8df3 */ |
| 23453 | case 1542: /* *sminv4sf3_mask_round */ |
| 23454 | case 1541: /* *sminv4sf3_mask */ |
| 23455 | case 1540: /* *sminv4sf3_round */ |
| 23456 | case 1539: /* *sminv4sf3 */ |
| 23457 | case 1538: /* *smaxv4sf3_mask_round */ |
| 23458 | case 1537: /* *smaxv4sf3_mask */ |
| 23459 | case 1536: /* *smaxv4sf3_round */ |
| 23460 | case 1535: /* *smaxv4sf3 */ |
| 23461 | case 1534: /* *sminv8sf3_mask_round */ |
| 23462 | case 1533: /* *sminv8sf3_mask */ |
| 23463 | case 1532: /* *sminv8sf3_round */ |
| 23464 | case 1531: /* *sminv8sf3 */ |
| 23465 | case 1530: /* *smaxv8sf3_mask_round */ |
| 23466 | case 1529: /* *smaxv8sf3_mask */ |
| 23467 | case 1528: /* *smaxv8sf3_round */ |
| 23468 | case 1527: /* *smaxv8sf3 */ |
| 23469 | case 1526: /* *sminv16sf3_mask_round */ |
| 23470 | case 1525: /* *sminv16sf3_mask */ |
| 23471 | case 1524: /* *sminv16sf3_round */ |
| 23472 | case 1523: /* *sminv16sf3 */ |
| 23473 | case 1522: /* *smaxv16sf3_mask_round */ |
| 23474 | case 1521: /* *smaxv16sf3_mask */ |
| 23475 | case 1520: /* *smaxv16sf3_round */ |
| 23476 | case 1519: /* *smaxv16sf3 */ |
| 23477 | case 1416: /* sse2_vmsubv2df3_round */ |
| 23478 | case 1415: /* sse2_vmsubv2df3 */ |
| 23479 | case 1414: /* sse2_vmaddv2df3_round */ |
| 23480 | case 1413: /* sse2_vmaddv2df3 */ |
| 23481 | case 1412: /* sse_vmsubv4sf3_round */ |
| 23482 | case 1411: /* sse_vmsubv4sf3 */ |
| 23483 | case 1410: /* sse_vmaddv4sf3_round */ |
| 23484 | case 1409: /* sse_vmaddv4sf3 */ |
| 23485 | case 1408: /* *subv2df3_mask_round */ |
| 23486 | case 1407: /* *subv2df3_mask */ |
| 23487 | case 1406: /* *subv2df3_round */ |
| 23488 | case 1405: /* *subv2df3 */ |
| 23489 | case 1404: /* *addv2df3_mask_round */ |
| 23490 | case 1403: /* *addv2df3_mask */ |
| 23491 | case 1402: /* *addv2df3_round */ |
| 23492 | case 1401: /* *addv2df3 */ |
| 23493 | case 1400: /* *subv4df3_mask_round */ |
| 23494 | case 1399: /* *subv4df3_mask */ |
| 23495 | case 1398: /* *subv4df3_round */ |
| 23496 | case 1397: /* *subv4df3 */ |
| 23497 | case 1396: /* *addv4df3_mask_round */ |
| 23498 | case 1395: /* *addv4df3_mask */ |
| 23499 | case 1394: /* *addv4df3_round */ |
| 23500 | case 1393: /* *addv4df3 */ |
| 23501 | case 1392: /* *subv8df3_mask_round */ |
| 23502 | case 1391: /* *subv8df3_mask */ |
| 23503 | case 1390: /* *subv8df3_round */ |
| 23504 | case 1389: /* *subv8df3 */ |
| 23505 | case 1388: /* *addv8df3_mask_round */ |
| 23506 | case 1387: /* *addv8df3_mask */ |
| 23507 | case 1386: /* *addv8df3_round */ |
| 23508 | case 1385: /* *addv8df3 */ |
| 23509 | case 1384: /* *subv4sf3_mask_round */ |
| 23510 | case 1383: /* *subv4sf3_mask */ |
| 23511 | case 1382: /* *subv4sf3_round */ |
| 23512 | case 1381: /* *subv4sf3 */ |
| 23513 | case 1380: /* *addv4sf3_mask_round */ |
| 23514 | case 1379: /* *addv4sf3_mask */ |
| 23515 | case 1378: /* *addv4sf3_round */ |
| 23516 | case 1377: /* *addv4sf3 */ |
| 23517 | case 1376: /* *subv8sf3_mask_round */ |
| 23518 | case 1375: /* *subv8sf3_mask */ |
| 23519 | case 1374: /* *subv8sf3_round */ |
| 23520 | case 1373: /* *subv8sf3 */ |
| 23521 | case 1372: /* *addv8sf3_mask_round */ |
| 23522 | case 1371: /* *addv8sf3_mask */ |
| 23523 | case 1370: /* *addv8sf3_round */ |
| 23524 | case 1369: /* *addv8sf3 */ |
| 23525 | case 1368: /* *subv16sf3_mask_round */ |
| 23526 | case 1367: /* *subv16sf3_mask */ |
| 23527 | case 1366: /* *subv16sf3_round */ |
| 23528 | case 1365: /* *subv16sf3 */ |
| 23529 | case 1364: /* *addv16sf3_mask_round */ |
| 23530 | case 1363: /* *addv16sf3_mask */ |
| 23531 | case 1362: /* *addv16sf3_round */ |
| 23532 | case 1361: /* *addv16sf3 */ |
| 23533 | case 992: /* *ieee_smindf3 */ |
| 23534 | case 991: /* *ieee_smaxdf3 */ |
| 23535 | case 990: /* *ieee_sminsf3 */ |
| 23536 | case 989: /* *ieee_smaxsf3 */ |
| 23537 | case 988: /* smindf3 */ |
| 23538 | case 987: /* smaxdf3 */ |
| 23539 | case 986: /* sminsf3 */ |
| 23540 | case 985: /* smaxsf3 */ |
| 23541 | case 626: /* setcc_df_sse */ |
| 23542 | case 625: /* setcc_sf_sse */ |
| 23543 | if (((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) || (cached_memory == MEMORY_LOAD)) |
| 23544 | { |
| 23545 | return 3; |
| 23546 | } |
| 23547 | else |
| 23548 | { |
| 23549 | return 0; |
| 23550 | } |
| 23551 | |
| 23552 | case 624: /* *setcc_qi_slp */ |
| 23553 | case 623: /* *setcc_qi */ |
| 23554 | if (((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) || (cached_memory == MEMORY_STORE)) |
| 23555 | { |
| 23556 | return 1; |
| 23557 | } |
| 23558 | else |
| 23559 | { |
| 23560 | return 0; |
| 23561 | } |
| 23562 | |
| 23563 | case 602: /* *rotrsi3_1_zext */ |
| 23564 | case 601: /* *rotlsi3_1_zext */ |
| 23565 | case 599: /* *rotrdi3_1 */ |
| 23566 | case 598: /* *rotldi3_1 */ |
| 23567 | case 597: /* *rotrsi3_1 */ |
| 23568 | case 596: /* *rotlsi3_1 */ |
| 23569 | case 561: /* *ashrsi3_1_zext */ |
| 23570 | case 560: /* *lshrsi3_1_zext */ |
| 23571 | case 557: /* *ashrdi3_1 */ |
| 23572 | case 556: /* *lshrdi3_1 */ |
| 23573 | case 555: /* *ashrsi3_1 */ |
| 23574 | case 554: /* *lshrsi3_1 */ |
| 23575 | extract_constrain_insn_cached (insn); |
| 23576 | if (((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) && (which_alternative == 0)) |
| 23577 | { |
| 23578 | return 1; |
| 23579 | } |
| 23580 | else if ((! (cached_memory == MEMORY_NONE)) && (which_alternative == 0)) |
| 23581 | { |
| 23582 | return 4; |
| 23583 | } |
| 23584 | else |
| 23585 | { |
| 23586 | return 0; |
| 23587 | } |
| 23588 | |
| 23589 | case 608: /* *rotrqi3_1_slp */ |
| 23590 | case 607: /* *rotlqi3_1_slp */ |
| 23591 | case 606: /* *rotrhi3_1 */ |
| 23592 | case 605: /* *rotlhi3_1 */ |
| 23593 | case 604: /* *rotrqi3_1 */ |
| 23594 | case 603: /* *rotlqi3_1 */ |
| 23595 | case 585: /* *ashrdi3_cconly */ |
| 23596 | case 584: /* *lshrdi3_cconly */ |
| 23597 | case 583: /* *ashrsi3_cconly */ |
| 23598 | case 582: /* *lshrsi3_cconly */ |
| 23599 | case 581: /* *ashrhi3_cconly */ |
| 23600 | case 580: /* *lshrhi3_cconly */ |
| 23601 | case 579: /* *ashrqi3_cconly */ |
| 23602 | case 578: /* *lshrqi3_cconly */ |
| 23603 | case 577: /* *ashrsi3_cmp_zext */ |
| 23604 | case 576: /* *lshrsi3_cmp_zext */ |
| 23605 | case 575: /* *ashrdi3_cmp */ |
| 23606 | case 574: /* *lshrdi3_cmp */ |
| 23607 | case 573: /* *ashrsi3_cmp */ |
| 23608 | case 572: /* *lshrsi3_cmp */ |
| 23609 | case 571: /* *ashrhi3_cmp */ |
| 23610 | case 570: /* *lshrhi3_cmp */ |
| 23611 | case 569: /* *ashrqi3_cmp */ |
| 23612 | case 568: /* *lshrqi3_cmp */ |
| 23613 | case 567: /* *ashrqi3_1_slp */ |
| 23614 | case 566: /* *lshrqi3_1_slp */ |
| 23615 | case 565: /* *ashrhi3_1 */ |
| 23616 | case 564: /* *lshrhi3_1 */ |
| 23617 | case 563: /* *ashrqi3_1 */ |
| 23618 | case 562: /* *lshrqi3_1 */ |
| 23619 | case 546: /* x86_shrd */ |
| 23620 | case 545: /* x86_64_shrd */ |
| 23621 | case 516: /* x86_shld */ |
| 23622 | case 515: /* x86_64_shld */ |
| 23623 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) |
| 23624 | { |
| 23625 | return 1; |
| 23626 | } |
| 23627 | else |
| 23628 | { |
| 23629 | return 4; |
| 23630 | } |
| 23631 | |
| 23632 | case 386: /* udivmodhiqi3 */ |
| 23633 | case 375: /* divmodhiqi3 */ |
| 23634 | if (((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) || (cached_memory == MEMORY_LOAD)) |
| 23635 | { |
| 23636 | return 19 /* 0x13 */; |
| 23637 | } |
| 23638 | else |
| 23639 | { |
| 23640 | return 0; |
| 23641 | } |
| 23642 | |
| 23643 | case 384: /* *udivmodsi4_noext */ |
| 23644 | case 373: /* *divmodsi4_noext */ |
| 23645 | if (((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) || (cached_memory == MEMORY_LOAD)) |
| 23646 | { |
| 23647 | return 39 /* 0x27 */; |
| 23648 | } |
| 23649 | else |
| 23650 | { |
| 23651 | return 0; |
| 23652 | } |
| 23653 | |
| 23654 | case 383: /* *udivmodhi4_noext */ |
| 23655 | case 372: /* *divmodhi4_noext */ |
| 23656 | if (((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) || (cached_memory == MEMORY_LOAD)) |
| 23657 | { |
| 23658 | return 23 /* 0x17 */; |
| 23659 | } |
| 23660 | else |
| 23661 | { |
| 23662 | return 0; |
| 23663 | } |
| 23664 | |
| 23665 | case 356: /* *umulditi3_1 */ |
| 23666 | extract_constrain_insn_cached (insn); |
| 23667 | if (which_alternative == 1) |
| 23668 | { |
| 23669 | return 5; |
| 23670 | } |
| 23671 | else |
| 23672 | { |
| 23673 | return 0; |
| 23674 | } |
| 23675 | |
| 23676 | case 355: /* *umulsidi3_1 */ |
| 23677 | extract_constrain_insn_cached (insn); |
| 23678 | if (which_alternative == 1) |
| 23679 | { |
| 23680 | return 3; |
| 23681 | } |
| 23682 | else |
| 23683 | { |
| 23684 | return 0; |
| 23685 | } |
| 23686 | |
| 23687 | case 4926: /* mfence_sse2 */ |
| 23688 | case 4925: /* *sse_sfence */ |
| 23689 | case 4924: /* *sse2_lfence */ |
| 23690 | case 3674: /* sse2_clflush */ |
| 23691 | case 2224: /* sse2_cvttsd2si_round */ |
| 23692 | case 2223: /* sse2_cvttsd2si */ |
| 23693 | case 2219: /* sse2_cvtsd2si_2 */ |
| 23694 | case 2218: /* sse2_cvtsd2si_round */ |
| 23695 | case 2217: /* sse2_cvtsd2si */ |
| 23696 | case 2214: /* avx512f_vcvttsd2usi_round */ |
| 23697 | case 2213: /* avx512f_vcvttsd2usi */ |
| 23698 | case 2210: /* avx512f_vcvtsd2usi_round */ |
| 23699 | case 2209: /* avx512f_vcvtsd2usi */ |
| 23700 | case 2206: /* avx512f_vcvttss2usi_round */ |
| 23701 | case 2205: /* avx512f_vcvttss2usi */ |
| 23702 | case 2202: /* avx512f_vcvtss2usi_round */ |
| 23703 | case 2201: /* avx512f_vcvtss2usi */ |
| 23704 | case 2117: /* sse_cvttss2si_round */ |
| 23705 | case 2116: /* sse_cvttss2si */ |
| 23706 | case 2112: /* sse_cvtss2si_2 */ |
| 23707 | case 2111: /* sse_cvtss2si_round */ |
| 23708 | case 2110: /* sse_cvtss2si */ |
| 23709 | case 1606: /* sse2_vmsminv2df3_round */ |
| 23710 | case 1605: /* sse2_vmsminv2df3 */ |
| 23711 | case 1604: /* sse2_vmsmaxv2df3_round */ |
| 23712 | case 1603: /* sse2_vmsmaxv2df3 */ |
| 23713 | case 1602: /* sse_vmsminv4sf3_round */ |
| 23714 | case 1601: /* sse_vmsminv4sf3 */ |
| 23715 | case 1600: /* sse_vmsmaxv4sf3_round */ |
| 23716 | case 1599: /* sse_vmsmaxv4sf3 */ |
| 23717 | case 1518: /* sse_vmrsqrtv4sf2 */ |
| 23718 | case 1501: /* sse2_vmsqrtv2df2_round */ |
| 23719 | case 1500: /* sse2_vmsqrtv2df2 */ |
| 23720 | case 1499: /* sse_vmsqrtv4sf2_round */ |
| 23721 | case 1498: /* sse_vmsqrtv4sf2 */ |
| 23722 | case 1467: /* sse_vmrcpv4sf2 */ |
| 23723 | case 1081: /* clflushopt */ |
| 23724 | case 1080: /* clwb */ |
| 23725 | case 847: /* *sqrtdf2_sse */ |
| 23726 | case 846: /* *sqrtsf2_sse */ |
| 23727 | case 845: /* *rsqrtsf2_sse */ |
| 23728 | case 814: /* *rcpsf2_sse */ |
| 23729 | case 366: /* *umulsi3_highpart_1 */ |
| 23730 | case 365: /* *smulsi3_highpart_1 */ |
| 23731 | case 364: /* *umulsi3_highpart_zext */ |
| 23732 | case 363: /* *smulsi3_highpart_zext */ |
| 23733 | case 357: /* *mulsidi3_1 */ |
| 23734 | case 349: /* *umulvsi4 */ |
| 23735 | case 348: /* *umulvhi4 */ |
| 23736 | case 346: /* *mulvsi4_1 */ |
| 23737 | case 345: /* *mulvhi4_1 */ |
| 23738 | case 344: /* *mulvhi4 */ |
| 23739 | case 342: /* *mulvsi4 */ |
| 23740 | case 340: /* *mulsi3_1_zext */ |
| 23741 | case 338: /* *mulsi3_1 */ |
| 23742 | case 337: /* *mulhi3_1 */ |
| 23743 | return 3; |
| 23744 | |
| 23745 | case 202: /* *floatdidf2_mixed */ |
| 23746 | case 201: /* *floatsidf2_mixed */ |
| 23747 | case 200: /* *floatdisf2_mixed */ |
| 23748 | case 199: /* *floatsisf2_mixed */ |
| 23749 | extract_constrain_insn_cached (insn); |
| 23750 | if (((((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) || (cached_memory == MEMORY_LOAD)) || (cached_memory == MEMORY_STORE)) && (which_alternative == 0)) |
| 23751 | { |
| 23752 | return 1; |
| 23753 | } |
| 23754 | else if (which_alternative != 0) |
| 23755 | { |
| 23756 | return 4; |
| 23757 | } |
| 23758 | else |
| 23759 | { |
| 23760 | return 0; |
| 23761 | } |
| 23762 | |
| 23763 | case 198: /* floatdixf2 */ |
| 23764 | case 197: /* floatsixf2 */ |
| 23765 | case 196: /* floathixf2 */ |
| 23766 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) |
| 23767 | { |
| 23768 | return 1; |
| 23769 | } |
| 23770 | else if ((cached_memory == MEMORY_LOAD) || (cached_memory == MEMORY_STORE)) |
| 23771 | { |
| 23772 | return 3; |
| 23773 | } |
| 23774 | else |
| 23775 | { |
| 23776 | return 0; |
| 23777 | } |
| 23778 | |
| 23779 | case 927: /* fistsi2_ceil_with_temp */ |
| 23780 | case 926: /* fistsi2_floor_with_temp */ |
| 23781 | case 925: /* fisthi2_ceil_with_temp */ |
| 23782 | case 924: /* fisthi2_floor_with_temp */ |
| 23783 | case 923: /* fistsi2_ceil */ |
| 23784 | case 922: /* fistsi2_floor */ |
| 23785 | case 921: /* fisthi2_ceil */ |
| 23786 | case 920: /* fisthi2_floor */ |
| 23787 | case 919: /* fistdi2_ceil_with_temp */ |
| 23788 | case 918: /* fistdi2_floor_with_temp */ |
| 23789 | case 917: /* fistdi2_ceil */ |
| 23790 | case 916: /* fistdi2_floor */ |
| 23791 | case 915: /* *fistdi2_ceil_1 */ |
| 23792 | case 914: /* *fistdi2_floor_1 */ |
| 23793 | case 913: /* *fistsi2_ceil_1 */ |
| 23794 | case 912: /* *fistsi2_floor_1 */ |
| 23795 | case 911: /* *fisthi2_ceil_1 */ |
| 23796 | case 910: /* *fisthi2_floor_1 */ |
| 23797 | case 362: /* *umuldi3_highpart_1 */ |
| 23798 | case 361: /* *smuldi3_highpart_1 */ |
| 23799 | case 358: /* *mulditi3_1 */ |
| 23800 | case 350: /* *umulvdi4 */ |
| 23801 | case 347: /* *mulvdi4_1 */ |
| 23802 | case 343: /* *mulvdi4 */ |
| 23803 | case 339: /* *muldi3_1 */ |
| 23804 | case 191: /* fix_truncsi_i387_with_temp */ |
| 23805 | case 190: /* fix_trunchi_i387_with_temp */ |
| 23806 | case 189: /* fix_truncsi_i387 */ |
| 23807 | case 188: /* fix_trunchi_i387 */ |
| 23808 | case 187: /* fix_truncdi_i387_with_temp */ |
| 23809 | case 186: /* fix_truncdi_i387 */ |
| 23810 | case 185: /* *fix_truncdi_i387_1 */ |
| 23811 | case 184: /* *fix_truncsi_i387_1 */ |
| 23812 | case 183: /* *fix_trunchi_i387_1 */ |
| 23813 | return 5; |
| 23814 | |
| 23815 | case 163: /* *truncxfdf2_mixed */ |
| 23816 | case 162: /* *truncxfsf2_mixed */ |
| 23817 | case 160: /* *truncdfsf_i387 */ |
| 23818 | extract_constrain_insn_cached (insn); |
| 23819 | if (which_alternative != 0) |
| 23820 | { |
| 23821 | return 6; |
| 23822 | } |
| 23823 | else if ((((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) || (cached_memory == MEMORY_LOAD)) || (cached_memory == MEMORY_STORE)) |
| 23824 | { |
| 23825 | return 1; |
| 23826 | } |
| 23827 | else |
| 23828 | { |
| 23829 | return 0; |
| 23830 | } |
| 23831 | |
| 23832 | case 159: /* *truncdfsf_mixed */ |
| 23833 | extract_constrain_insn_cached (insn); |
| 23834 | if (!((1 << which_alternative) & 0x3)) |
| 23835 | { |
| 23836 | return 6; |
| 23837 | } |
| 23838 | else if (((((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) || (cached_memory == MEMORY_LOAD)) || (cached_memory == MEMORY_STORE)) && (which_alternative == 0)) |
| 23839 | { |
| 23840 | return 1; |
| 23841 | } |
| 23842 | else |
| 23843 | { |
| 23844 | return 0; |
| 23845 | } |
| 23846 | |
| 23847 | case 4935: /* storedi_via_fpu */ |
| 23848 | case 4934: /* loaddi_via_fpu */ |
| 23849 | case 841: /* truncxfdf2_i387_noop_unspec */ |
| 23850 | case 840: /* truncxfsf2_i387_noop_unspec */ |
| 23851 | case 206: /* *floatdidf2_i387 */ |
| 23852 | case 205: /* *floatdisf2_i387 */ |
| 23853 | case 204: /* *floatsidf2_i387 */ |
| 23854 | case 203: /* *floatsisf2_i387 */ |
| 23855 | case 195: /* floathidf2 */ |
| 23856 | case 194: /* floathisf2 */ |
| 23857 | case 167: /* *truncxfdf2_i387 */ |
| 23858 | case 166: /* *truncxfsf2_i387 */ |
| 23859 | case 165: /* truncxfdf2_i387_noop */ |
| 23860 | case 164: /* truncxfsf2_i387_noop */ |
| 23861 | case 161: /* *truncdfsf2_i387_1 */ |
| 23862 | case 158: /* *truncdfsf_fast_i387 */ |
| 23863 | if (((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) || (cached_memory == MEMORY_LOAD) || (cached_memory == MEMORY_STORE)) |
| 23864 | { |
| 23865 | return 1; |
| 23866 | } |
| 23867 | else |
| 23868 | { |
| 23869 | return 0; |
| 23870 | } |
| 23871 | |
| 23872 | case 157: /* *truncdfsf_fast_mixed */ |
| 23873 | extract_constrain_insn_cached (insn); |
| 23874 | if (((((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) || (cached_memory == MEMORY_LOAD)) || (cached_memory == MEMORY_STORE)) && (which_alternative == 0)) |
| 23875 | { |
| 23876 | return 1; |
| 23877 | } |
| 23878 | else |
| 23879 | { |
| 23880 | return 0; |
| 23881 | } |
| 23882 | |
| 23883 | case 139: /* *zero_extendqihi2 */ |
| 23884 | case 137: /* *zero_extendhisi2 */ |
| 23885 | case 136: /* *zero_extendqisi2 */ |
| 23886 | case 133: /* zero_extendhidi2 */ |
| 23887 | case 132: /* zero_extendqidi2 */ |
| 23888 | extract_constrain_insn_cached (insn); |
| 23889 | if (((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) && (which_alternative == 0)) |
| 23890 | { |
| 23891 | return 1; |
| 23892 | } |
| 23893 | else if ((cached_memory == MEMORY_LOAD) && (which_alternative == 0)) |
| 23894 | { |
| 23895 | return 4; |
| 23896 | } |
| 23897 | else |
| 23898 | { |
| 23899 | return 0; |
| 23900 | } |
| 23901 | |
| 23902 | case 123: /* *pushsf */ |
| 23903 | case 122: /* *pushsf_rex64 */ |
| 23904 | extract_constrain_insn_cached (insn); |
| 23905 | if (which_alternative != 1) |
| 23906 | { |
| 23907 | return 6; |
| 23908 | } |
| 23909 | else if (((cached_memory = get_attr_memory (insn)) == MEMORY_STORE) || (cached_memory == MEMORY_BOTH)) |
| 23910 | { |
| 23911 | return 1; |
| 23912 | } |
| 23913 | else |
| 23914 | { |
| 23915 | return 0; |
| 23916 | } |
| 23917 | |
| 23918 | case 1102: /* move_size_reloc_di */ |
| 23919 | case 1101: /* move_size_reloc_si */ |
| 23920 | case 701: /* set_got_offset_rex64 */ |
| 23921 | case 116: /* *insvqi_3 */ |
| 23922 | case 115: /* *insvqi_3 */ |
| 23923 | case 114: /* *insvqi_2 */ |
| 23924 | case 113: /* *insvqi_2 */ |
| 23925 | case 112: /* *insvqi_1 */ |
| 23926 | case 111: /* *insvqi_1_mem_rex64 */ |
| 23927 | case 110: /* insvdi_1 */ |
| 23928 | case 109: /* insvsi_1 */ |
| 23929 | case 108: /* insvhi_1 */ |
| 23930 | case 106: /* *extzvqi_mem_rex64 */ |
| 23931 | case 98: /* *movstricthi_1 */ |
| 23932 | case 97: /* *movstrictqi_1 */ |
| 23933 | case 96: /* *swaphi */ |
| 23934 | case 95: /* *swapqi */ |
| 23935 | case 94: /* *swapdi */ |
| 23936 | case 93: /* *swapsi */ |
| 23937 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) |
| 23938 | { |
| 23939 | return 1; |
| 23940 | } |
| 23941 | else if (cached_memory == MEMORY_LOAD) |
| 23942 | { |
| 23943 | return 4; |
| 23944 | } |
| 23945 | else if (cached_memory == MEMORY_STORE) |
| 23946 | { |
| 23947 | return 1; |
| 23948 | } |
| 23949 | else |
| 23950 | { |
| 23951 | return 0; |
| 23952 | } |
| 23953 | |
| 23954 | case 4803: /* avx512dq_vmfpclassv4sf */ |
| 23955 | case 4796: /* avx512dq_fpclassv4sf_mask */ |
| 23956 | case 4795: /* avx512dq_fpclassv4sf */ |
| 23957 | case 4788: /* avx512dq_rangesv4sf_round */ |
| 23958 | case 4787: /* avx512dq_rangesv4sf */ |
| 23959 | case 4778: /* avx512dq_rangepv4sf_mask */ |
| 23960 | case 4777: /* avx512dq_rangepv4sf */ |
| 23961 | case 3950: /* avx512er_vmrsqrt28v4sf_round */ |
| 23962 | case 3949: /* avx512er_vmrsqrt28v4sf */ |
| 23963 | case 3938: /* avx512er_vmrcp28v4sf_round */ |
| 23964 | case 3937: /* avx512er_vmrcp28v4sf */ |
| 23965 | case 2441: /* sse3_movsldup_mask */ |
| 23966 | case 2440: /* sse3_movsldup */ |
| 23967 | case 2435: /* sse3_movshdup_mask */ |
| 23968 | case 2434: /* sse3_movshdup */ |
| 23969 | case 2200: /* sse2_cvtsi2sdq_round */ |
| 23970 | case 2199: /* sse2_cvtsi2sdq */ |
| 23971 | case 2198: /* sse2_cvtsi2sd */ |
| 23972 | case 2126: /* cvtusi2sd64_round */ |
| 23973 | case 2125: /* cvtusi2sd64 */ |
| 23974 | case 2124: /* cvtusi2ss64_round */ |
| 23975 | case 2123: /* cvtusi2ss64 */ |
| 23976 | case 2122: /* cvtusi2sd32 */ |
| 23977 | case 2121: /* cvtusi2ss32_round */ |
| 23978 | case 2120: /* cvtusi2ss32 */ |
| 23979 | case 2109: /* sse_cvtsi2ssq_round */ |
| 23980 | case 2108: /* sse_cvtsi2ssq */ |
| 23981 | case 2107: /* sse_cvtsi2ss_round */ |
| 23982 | case 2106: /* sse_cvtsi2ss */ |
| 23983 | case 1633: /* reducesv4sf */ |
| 23984 | case 1626: /* reducepv4sf_mask */ |
| 23985 | case 1625: /* *reducepv4sf */ |
| 23986 | case 1516: /* rsqrt14v4sf */ |
| 23987 | case 1509: /* rsqrt14v4sf_mask */ |
| 23988 | case 1508: /* *rsqrt14v4sf */ |
| 23989 | case 1503: /* sse_rsqrtv4sf2 */ |
| 23990 | case 1489: /* sse_sqrtv4sf2_mask */ |
| 23991 | case 1488: /* sse_sqrtv4sf2 */ |
| 23992 | case 1480: /* srcp14v4sf */ |
| 23993 | case 1473: /* rcp14v4sf_mask */ |
| 23994 | case 1472: /* *rcp14v4sf */ |
| 23995 | case 1466: /* sse_rcpv4sf2 */ |
| 23996 | case 1215: /* *mmx_maskmovq */ |
| 23997 | case 1214: /* *mmx_maskmovq */ |
| 23998 | case 1213: /* mmx_pmovmskb */ |
| 23999 | case 1205: /* *vec_dupv2si */ |
| 24000 | case 1204: /* *vec_dupv4hi */ |
| 24001 | case 1203: /* mmx_pswapdv2si2 */ |
| 24002 | case 1202: /* mmx_pshufw_1 */ |
| 24003 | case 1201: /* mmx_pextrw */ |
| 24004 | case 1200: /* *mmx_pinsrw */ |
| 24005 | case 1199: /* mmx_punpckldq */ |
| 24006 | case 1198: /* mmx_punpckhdq */ |
| 24007 | case 1197: /* mmx_punpcklwd */ |
| 24008 | case 1196: /* mmx_punpckhwd */ |
| 24009 | case 1195: /* mmx_punpcklbw */ |
| 24010 | case 1194: /* mmx_punpckhbw */ |
| 24011 | case 1135: /* *vec_dupv2sf */ |
| 24012 | case 805: /* *add_tp_di */ |
| 24013 | case 804: /* *add_tp_si */ |
| 24014 | case 803: /* *add_tp_x32_zext */ |
| 24015 | case 802: /* *add_tp_x32 */ |
| 24016 | case 801: /* *load_tp_di */ |
| 24017 | case 800: /* *load_tp_si */ |
| 24018 | case 799: /* *load_tp_x32_zext */ |
| 24019 | case 798: /* *load_tp_x32 */ |
| 24020 | case 704: /* leave_rex64 */ |
| 24021 | case 703: /* leave */ |
| 24022 | case 173: /* fix_truncdfdi_sse */ |
| 24023 | case 172: /* fix_truncdfsi_sse */ |
| 24024 | case 171: /* fix_truncsfdi_sse */ |
| 24025 | case 170: /* fix_truncsfsi_sse */ |
| 24026 | case 92: /* *movabsdi_2 */ |
| 24027 | case 91: /* *movabssi_2 */ |
| 24028 | case 90: /* *movabshi_2 */ |
| 24029 | case 89: /* *movabsqi_2 */ |
| 24030 | return 4; |
| 24031 | |
| 24032 | case 4758: /* avx512vl_compressstorev2df_mask */ |
| 24033 | case 4757: /* avx512vl_compressstorev2di_mask */ |
| 24034 | case 4756: /* avx512vl_compressstorev4sf_mask */ |
| 24035 | case 4755: /* avx512vl_compressstorev4si_mask */ |
| 24036 | case 4754: /* avx512vl_compressstorev4df_mask */ |
| 24037 | case 4753: /* avx512vl_compressstorev4di_mask */ |
| 24038 | case 4752: /* avx512vl_compressstorev8sf_mask */ |
| 24039 | case 4751: /* avx512vl_compressstorev8si_mask */ |
| 24040 | case 4750: /* avx512f_compressstorev8df_mask */ |
| 24041 | case 4749: /* avx512f_compressstorev8di_mask */ |
| 24042 | case 4748: /* avx512f_compressstorev16sf_mask */ |
| 24043 | case 4747: /* avx512f_compressstorev16si_mask */ |
| 24044 | case 2933: /* avx512f_us_truncatev8div16qi2_mask_store */ |
| 24045 | case 2932: /* avx512f_truncatev8div16qi2_mask_store */ |
| 24046 | case 2931: /* avx512f_ss_truncatev8div16qi2_mask_store */ |
| 24047 | case 2924: /* *avx512f_us_truncatev8div16qi2_store */ |
| 24048 | case 2923: /* *avx512f_truncatev8div16qi2_store */ |
| 24049 | case 2922: /* *avx512f_ss_truncatev8div16qi2_store */ |
| 24050 | case 2918: /* avx512vl_us_truncatev2div2si2_mask_store */ |
| 24051 | case 2917: /* avx512vl_truncatev2div2si2_mask_store */ |
| 24052 | case 2916: /* avx512vl_ss_truncatev2div2si2_mask_store */ |
| 24053 | case 2909: /* *avx512vl_us_truncatev2div2si2_store */ |
| 24054 | case 2908: /* *avx512vl_truncatev2div2si2_store */ |
| 24055 | case 2907: /* *avx512vl_ss_truncatev2div2si2_store */ |
| 24056 | case 2903: /* avx512vl_us_truncatev2div2hi2_mask_store */ |
| 24057 | case 2902: /* avx512vl_truncatev2div2hi2_mask_store */ |
| 24058 | case 2901: /* avx512vl_ss_truncatev2div2hi2_mask_store */ |
| 24059 | case 2894: /* *avx512vl_us_truncatev2div2hi2_store */ |
| 24060 | case 2893: /* *avx512vl_truncatev2div2hi2_store */ |
| 24061 | case 2892: /* *avx512vl_ss_truncatev2div2hi2_store */ |
| 24062 | case 2891: /* avx512vl_us_truncatev4div4hi2_mask_store */ |
| 24063 | case 2890: /* avx512vl_truncatev4div4hi2_mask_store */ |
| 24064 | case 2889: /* avx512vl_ss_truncatev4div4hi2_mask_store */ |
| 24065 | case 2888: /* avx512vl_us_truncatev4siv4hi2_mask_store */ |
| 24066 | case 2887: /* avx512vl_truncatev4siv4hi2_mask_store */ |
| 24067 | case 2886: /* avx512vl_ss_truncatev4siv4hi2_mask_store */ |
| 24068 | case 2873: /* *avx512vl_us_truncatev4div4hi2_store */ |
| 24069 | case 2872: /* *avx512vl_truncatev4div4hi2_store */ |
| 24070 | case 2871: /* *avx512vl_ss_truncatev4div4hi2_store */ |
| 24071 | case 2870: /* *avx512vl_us_truncatev4siv4hi2_store */ |
| 24072 | case 2869: /* *avx512vl_truncatev4siv4hi2_store */ |
| 24073 | case 2868: /* *avx512vl_ss_truncatev4siv4hi2_store */ |
| 24074 | case 2858: /* avx512vl_us_truncatev8siv8qi2_mask_store */ |
| 24075 | case 2857: /* avx512vl_truncatev8siv8qi2_mask_store */ |
| 24076 | case 2856: /* avx512vl_ss_truncatev8siv8qi2_mask_store */ |
| 24077 | case 2855: /* avx512vl_us_truncatev8hiv8qi2_mask_store */ |
| 24078 | case 2854: /* avx512vl_truncatev8hiv8qi2_mask_store */ |
| 24079 | case 2853: /* avx512vl_ss_truncatev8hiv8qi2_mask_store */ |
| 24080 | case 2840: /* *avx512vl_us_truncatev8siv8qi2_store */ |
| 24081 | case 2839: /* *avx512vl_truncatev8siv8qi2_store */ |
| 24082 | case 2838: /* *avx512vl_ss_truncatev8siv8qi2_store */ |
| 24083 | case 2837: /* *avx512vl_us_truncatev8hiv8qi2_store */ |
| 24084 | case 2836: /* *avx512vl_truncatev8hiv8qi2_store */ |
| 24085 | case 2835: /* *avx512vl_ss_truncatev8hiv8qi2_store */ |
| 24086 | case 2834: /* avx512vl_us_truncatev4div4qi2_mask_store */ |
| 24087 | case 2833: /* avx512vl_truncatev4div4qi2_mask_store */ |
| 24088 | case 2832: /* avx512vl_ss_truncatev4div4qi2_mask_store */ |
| 24089 | case 2831: /* avx512vl_us_truncatev4siv4qi2_mask_store */ |
| 24090 | case 2830: /* avx512vl_truncatev4siv4qi2_mask_store */ |
| 24091 | case 2829: /* avx512vl_ss_truncatev4siv4qi2_mask_store */ |
| 24092 | case 2816: /* *avx512vl_us_truncatev4div4qi2_store */ |
| 24093 | case 2815: /* *avx512vl_truncatev4div4qi2_store */ |
| 24094 | case 2814: /* *avx512vl_ss_truncatev4div4qi2_store */ |
| 24095 | case 2813: /* *avx512vl_us_truncatev4siv4qi2_store */ |
| 24096 | case 2812: /* *avx512vl_truncatev4siv4qi2_store */ |
| 24097 | case 2811: /* *avx512vl_ss_truncatev4siv4qi2_store */ |
| 24098 | case 2810: /* avx512vl_us_truncatev2div2qi2_mask_store */ |
| 24099 | case 2809: /* avx512vl_truncatev2div2qi2_mask_store */ |
| 24100 | case 2808: /* avx512vl_ss_truncatev2div2qi2_mask_store */ |
| 24101 | case 2801: /* *avx512vl_us_truncatev2div2qi2_store */ |
| 24102 | case 2800: /* *avx512vl_truncatev2div2qi2_store */ |
| 24103 | case 2799: /* *avx512vl_ss_truncatev2div2qi2_store */ |
| 24104 | case 2783: /* avx512vl_us_truncatev16hiv16qi2_mask */ |
| 24105 | case 2782: /* avx512vl_truncatev16hiv16qi2_mask */ |
| 24106 | case 2781: /* avx512vl_ss_truncatev16hiv16qi2_mask */ |
| 24107 | case 2780: /* avx512vl_us_truncatev8siv8hi2_mask */ |
| 24108 | case 2779: /* avx512vl_truncatev8siv8hi2_mask */ |
| 24109 | case 2778: /* avx512vl_ss_truncatev8siv8hi2_mask */ |
| 24110 | case 2777: /* avx512vl_us_truncatev4div4si2_mask */ |
| 24111 | case 2776: /* avx512vl_truncatev4div4si2_mask */ |
| 24112 | case 2775: /* avx512vl_ss_truncatev4div4si2_mask */ |
| 24113 | case 2774: /* *avx512vl_us_truncatev16hiv16qi2 */ |
| 24114 | case 2773: /* *avx512vl_truncatev16hiv16qi2 */ |
| 24115 | case 2772: /* *avx512vl_ss_truncatev16hiv16qi2 */ |
| 24116 | case 2771: /* *avx512vl_us_truncatev8siv8hi2 */ |
| 24117 | case 2770: /* *avx512vl_truncatev8siv8hi2 */ |
| 24118 | case 2769: /* *avx512vl_ss_truncatev8siv8hi2 */ |
| 24119 | case 2768: /* *avx512vl_us_truncatev4div4si2 */ |
| 24120 | case 2767: /* *avx512vl_truncatev4div4si2 */ |
| 24121 | case 2766: /* *avx512vl_ss_truncatev4div4si2 */ |
| 24122 | case 2765: /* avx512bw_us_truncatev32hiv32qi2_mask */ |
| 24123 | case 2764: /* avx512bw_truncatev32hiv32qi2_mask */ |
| 24124 | case 2763: /* avx512bw_ss_truncatev32hiv32qi2_mask */ |
| 24125 | case 2762: /* avx512bw_us_truncatev32hiv32qi2 */ |
| 24126 | case 2761: /* avx512bw_truncatev32hiv32qi2 */ |
| 24127 | case 2760: /* avx512bw_ss_truncatev32hiv32qi2 */ |
| 24128 | case 2759: /* avx512f_us_truncatev8div8hi2_mask */ |
| 24129 | case 2758: /* avx512f_truncatev8div8hi2_mask */ |
| 24130 | case 2757: /* avx512f_ss_truncatev8div8hi2_mask */ |
| 24131 | case 2756: /* avx512f_us_truncatev8div8si2_mask */ |
| 24132 | case 2755: /* avx512f_truncatev8div8si2_mask */ |
| 24133 | case 2754: /* avx512f_ss_truncatev8div8si2_mask */ |
| 24134 | case 2753: /* avx512f_us_truncatev16siv16hi2_mask */ |
| 24135 | case 2752: /* avx512f_truncatev16siv16hi2_mask */ |
| 24136 | case 2751: /* avx512f_ss_truncatev16siv16hi2_mask */ |
| 24137 | case 2750: /* avx512f_us_truncatev16siv16qi2_mask */ |
| 24138 | case 2749: /* avx512f_truncatev16siv16qi2_mask */ |
| 24139 | case 2748: /* avx512f_ss_truncatev16siv16qi2_mask */ |
| 24140 | case 2747: /* *avx512f_us_truncatev8div8hi2 */ |
| 24141 | case 2746: /* *avx512f_truncatev8div8hi2 */ |
| 24142 | case 2745: /* *avx512f_ss_truncatev8div8hi2 */ |
| 24143 | case 2744: /* *avx512f_us_truncatev8div8si2 */ |
| 24144 | case 2743: /* *avx512f_truncatev8div8si2 */ |
| 24145 | case 2742: /* *avx512f_ss_truncatev8div8si2 */ |
| 24146 | case 2741: /* *avx512f_us_truncatev16siv16hi2 */ |
| 24147 | case 2740: /* *avx512f_truncatev16siv16hi2 */ |
| 24148 | case 2739: /* *avx512f_ss_truncatev16siv16hi2 */ |
| 24149 | case 2738: /* *avx512f_us_truncatev16siv16qi2 */ |
| 24150 | case 2737: /* *avx512f_truncatev16siv16qi2 */ |
| 24151 | case 2736: /* *avx512f_ss_truncatev16siv16qi2 */ |
| 24152 | case 1292: /* avx512vl_storev8hi_mask */ |
| 24153 | case 1291: /* avx512vl_storev16hi_mask */ |
| 24154 | case 1290: /* avx512bw_storev32hi_mask */ |
| 24155 | case 1289: /* avx512vl_storev32qi_mask */ |
| 24156 | case 1288: /* avx512vl_storev16qi_mask */ |
| 24157 | case 1287: /* avx512bw_storev64qi_mask */ |
| 24158 | case 1286: /* avx512vl_storev2df_mask */ |
| 24159 | case 1285: /* avx512vl_storev4df_mask */ |
| 24160 | case 1284: /* avx512f_storev8df_mask */ |
| 24161 | case 1283: /* avx512vl_storev4sf_mask */ |
| 24162 | case 1282: /* avx512vl_storev8sf_mask */ |
| 24163 | case 1281: /* avx512f_storev16sf_mask */ |
| 24164 | case 1280: /* avx512vl_storev2di_mask */ |
| 24165 | case 1279: /* avx512vl_storev4di_mask */ |
| 24166 | case 1278: /* avx512f_storev8di_mask */ |
| 24167 | case 1277: /* avx512vl_storev4si_mask */ |
| 24168 | case 1276: /* avx512vl_storev8si_mask */ |
| 24169 | case 1275: /* avx512f_storev16si_mask */ |
| 24170 | case 1217: /* *mmx_femms */ |
| 24171 | case 1216: /* *mmx_emms */ |
| 24172 | case 1007: /* *prefetch_3dnow */ |
| 24173 | case 974: /* *x86_movdicc_0_m1_neg */ |
| 24174 | case 973: /* *x86_movsicc_0_m1_neg */ |
| 24175 | case 972: /* *x86_movdicc_0_m1_se */ |
| 24176 | case 971: /* *x86_movsicc_0_m1_se */ |
| 24177 | case 970: /* *x86_movdicc_0_m1 */ |
| 24178 | case 969: /* *x86_movsicc_0_m1 */ |
| 24179 | case 810: /* *tls_dynamic_gnu2_call_64 */ |
| 24180 | case 809: /* *tls_dynamic_gnu2_lea_64 */ |
| 24181 | case 807: /* *tls_dynamic_gnu2_call_32 */ |
| 24182 | case 806: /* *tls_dynamic_gnu2_lea_32 */ |
| 24183 | case 700: /* set_rip_rex64 */ |
| 24184 | case 699: /* set_got_rex64 */ |
| 24185 | case 685: /* *sibcall_value_pop_memory */ |
| 24186 | case 684: /* *sibcall_value_pop */ |
| 24187 | case 683: /* *call_value_pop */ |
| 24188 | case 682: /* *sibcall_value_memory */ |
| 24189 | case 681: /* *sibcall_value_memory */ |
| 24190 | case 680: /* *sibcall_value */ |
| 24191 | case 679: /* *sibcall_value */ |
| 24192 | case 678: /* *sibcall_value_GOT_32 */ |
| 24193 | case 677: /* *call_value_got_x32 */ |
| 24194 | case 676: /* *call_value */ |
| 24195 | case 675: /* *call_value */ |
| 24196 | case 674: /* *sibcall_pop_memory */ |
| 24197 | case 673: /* *sibcall_pop */ |
| 24198 | case 672: /* *call_pop */ |
| 24199 | case 671: /* *sibcall_memory */ |
| 24200 | case 670: /* *sibcall_memory */ |
| 24201 | case 669: /* *sibcall */ |
| 24202 | case 668: /* *sibcall */ |
| 24203 | case 667: /* *sibcall_GOT_32 */ |
| 24204 | case 666: /* *call_got_x32 */ |
| 24205 | case 665: /* *call */ |
| 24206 | case 664: /* *call */ |
| 24207 | case 495: /* *negextenddfxf2 */ |
| 24208 | case 494: /* *absextenddfxf2 */ |
| 24209 | case 493: /* *negextendsfxf2 */ |
| 24210 | case 492: /* *absextendsfxf2 */ |
| 24211 | case 491: /* *negextendsfdf2 */ |
| 24212 | case 490: /* *absextendsfdf2 */ |
| 24213 | case 489: /* *negxf2_1 */ |
| 24214 | case 488: /* *absxf2_1 */ |
| 24215 | case 487: /* *negdf2_1 */ |
| 24216 | case 486: /* *absdf2_1 */ |
| 24217 | case 485: /* *negsf2_1 */ |
| 24218 | case 484: /* *abssf2_1 */ |
| 24219 | case 268: /* *leadi_general_4 */ |
| 24220 | case 267: /* *leadi_general_4 */ |
| 24221 | case 266: /* *leasi_general_4 */ |
| 24222 | case 265: /* *leasi_general_4 */ |
| 24223 | case 264: /* *leahi_general_4 */ |
| 24224 | case 263: /* *leahi_general_4 */ |
| 24225 | case 262: /* *leaqi_general_4 */ |
| 24226 | case 261: /* *leaqi_general_4 */ |
| 24227 | case 260: /* *leahi_general_3b */ |
| 24228 | case 259: /* *leaqi_general_3b */ |
| 24229 | case 258: /* *leahi_general_3 */ |
| 24230 | case 257: /* *leaqi_general_3 */ |
| 24231 | case 256: /* *leahi_general_2b */ |
| 24232 | case 255: /* *leaqi_general_2b */ |
| 24233 | case 254: /* *leahi_general_2 */ |
| 24234 | case 253: /* *leaqi_general_2 */ |
| 24235 | case 252: /* *leahi_general_1 */ |
| 24236 | case 251: /* *leaqi_general_1 */ |
| 24237 | case 214: /* *leadi */ |
| 24238 | case 213: /* *leasi */ |
| 24239 | case 88: /* *movabsdi_1 */ |
| 24240 | case 87: /* *movabssi_1 */ |
| 24241 | case 86: /* *movabshi_1 */ |
| 24242 | case 85: /* *movabsqi_1 */ |
| 24243 | return 1; |
| 24244 | |
| 24245 | case 1000: /* probe_stack_di */ |
| 24246 | case 999: /* probe_stack_si */ |
| 24247 | case 732: /* tzcnt_hi */ |
| 24248 | case 730: /* *tzcnt_di_falsedep */ |
| 24249 | case 728: /* *tzcnt_si_falsedep */ |
| 24250 | case 726: /* tzcnt_di */ |
| 24251 | case 724: /* tzcnt_si */ |
| 24252 | case 719: /* *bsrhi */ |
| 24253 | case 718: /* bsr */ |
| 24254 | case 717: /* bsr_rex64 */ |
| 24255 | case 716: /* *ctzdi2_falsedep */ |
| 24256 | case 715: /* *ctzsi2_falsedep */ |
| 24257 | case 714: /* ctzdi2 */ |
| 24258 | case 713: /* ctzsi2 */ |
| 24259 | case 712: /* *bsfdi_1 */ |
| 24260 | case 711: /* *bsfsi_1 */ |
| 24261 | case 710: /* *tzcntdi_1_falsedep */ |
| 24262 | case 709: /* *tzcntsi_1_falsedep */ |
| 24263 | case 708: /* *tzcntdi_1 */ |
| 24264 | case 707: /* *tzcntsi_1 */ |
| 24265 | case 613: /* *btdi */ |
| 24266 | case 612: /* *btsi */ |
| 24267 | case 611: /* *btcq */ |
| 24268 | case 610: /* *btrq */ |
| 24269 | case 609: /* *btsq */ |
| 24270 | case 512: /* *one_cmplsi2_2_zext */ |
| 24271 | case 511: /* *one_cmpldi2_2 */ |
| 24272 | case 510: /* *one_cmplsi2_2 */ |
| 24273 | case 509: /* *one_cmplhi2_2 */ |
| 24274 | case 508: /* *one_cmplqi2_2 */ |
| 24275 | case 507: /* *one_cmplqi2_1 */ |
| 24276 | case 506: /* *one_cmplsi2_1_zext */ |
| 24277 | case 505: /* *one_cmpldi2_1 */ |
| 24278 | case 504: /* *one_cmplsi2_1 */ |
| 24279 | case 503: /* *one_cmplhi2_1 */ |
| 24280 | case 479: /* *negvdi3 */ |
| 24281 | case 478: /* *negvsi3 */ |
| 24282 | case 477: /* *negvhi3 */ |
| 24283 | case 476: /* *negvqi3 */ |
| 24284 | case 475: /* *negsi2_cmpz_zext */ |
| 24285 | case 474: /* *negdi2_cmpz */ |
| 24286 | case 473: /* *negsi2_cmpz */ |
| 24287 | case 472: /* *neghi2_cmpz */ |
| 24288 | case 471: /* *negqi2_cmpz */ |
| 24289 | case 470: /* *negsi2_1_zext */ |
| 24290 | case 469: /* *negdi2_1 */ |
| 24291 | case 468: /* *negsi2_1 */ |
| 24292 | case 467: /* *neghi2_1 */ |
| 24293 | case 466: /* *negqi2_1 */ |
| 24294 | case 450: /* *xorqi_2_slp */ |
| 24295 | case 449: /* *iorqi_2_slp */ |
| 24296 | case 436: /* *xorqi_1_slp */ |
| 24297 | case 435: /* *iorqi_1_slp */ |
| 24298 | case 410: /* *andqi_2_slp */ |
| 24299 | case 403: /* *andqi_1_slp */ |
| 24300 | case 276: /* *subqi_1_slp */ |
| 24301 | case 138: /* zero_extendqihi2_and */ |
| 24302 | case 135: /* zero_extendhisi2_and */ |
| 24303 | case 134: /* zero_extendqisi2_and */ |
| 24304 | case 100: /* *movstricthi_xor */ |
| 24305 | case 99: /* *movstrictqi_xor */ |
| 24306 | case 77: /* *movdi_or */ |
| 24307 | case 76: /* *movsi_or */ |
| 24308 | case 75: /* *movdi_xor */ |
| 24309 | case 74: /* *movsi_xor */ |
| 24310 | if (((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) || (cached_memory == MEMORY_STORE)) |
| 24311 | { |
| 24312 | return 1; |
| 24313 | } |
| 24314 | else if (cached_memory == MEMORY_BOTH) |
| 24315 | { |
| 24316 | return 4; |
| 24317 | } |
| 24318 | else |
| 24319 | { |
| 24320 | return 0; |
| 24321 | } |
| 24322 | |
| 24323 | case 73: /* *popfldi1 */ |
| 24324 | case 72: /* *popflsi1 */ |
| 24325 | case 69: /* *popdi1_epilogue */ |
| 24326 | case 68: /* *popsi1_epilogue */ |
| 24327 | case 67: /* *popdi1 */ |
| 24328 | case 66: /* *popsi1 */ |
| 24329 | if (((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) || (cached_memory == MEMORY_BOTH)) |
| 24330 | { |
| 24331 | return 4; |
| 24332 | } |
| 24333 | else |
| 24334 | { |
| 24335 | return 0; |
| 24336 | } |
| 24337 | |
| 24338 | case 71: /* *pushfldi2 */ |
| 24339 | case 70: /* *pushflsi2 */ |
| 24340 | case 65: /* *pushdi2_prologue */ |
| 24341 | case 64: /* *pushsi2_prologue */ |
| 24342 | case 63: /* *pushhi2 */ |
| 24343 | case 62: /* *pushqi2 */ |
| 24344 | case 61: /* *pushsi2_rex64 */ |
| 24345 | case 60: /* *pushhi2_rex64 */ |
| 24346 | case 59: /* *pushqi2_rex64 */ |
| 24347 | case 58: /* *pushsi2 */ |
| 24348 | if (((cached_memory = get_attr_memory (insn)) == MEMORY_STORE) || (cached_memory == MEMORY_BOTH)) |
| 24349 | { |
| 24350 | return 1; |
| 24351 | } |
| 24352 | else |
| 24353 | { |
| 24354 | return 0; |
| 24355 | } |
| 24356 | |
| 24357 | case 57: /* *pushdi2_rex64 */ |
| 24358 | extract_constrain_insn_cached (insn); |
| 24359 | if (which_alternative != 0) |
| 24360 | { |
| 24361 | return 6; |
| 24362 | } |
| 24363 | else if (((cached_memory = get_attr_memory (insn)) == MEMORY_STORE) || (cached_memory == MEMORY_BOTH)) |
| 24364 | { |
| 24365 | return 1; |
| 24366 | } |
| 24367 | else |
| 24368 | { |
| 24369 | return 0; |
| 24370 | } |
| 24371 | |
| 24372 | case 4984: /* atomic_bit_test_and_resetdi_1 */ |
| 24373 | case 4983: /* atomic_bit_test_and_resetsi_1 */ |
| 24374 | case 4982: /* atomic_bit_test_and_resethi_1 */ |
| 24375 | case 4981: /* atomic_bit_test_and_complementdi_1 */ |
| 24376 | case 4980: /* atomic_bit_test_and_complementsi_1 */ |
| 24377 | case 4979: /* atomic_bit_test_and_complementhi_1 */ |
| 24378 | case 4978: /* atomic_bit_test_and_setdi_1 */ |
| 24379 | case 4977: /* atomic_bit_test_and_setsi_1 */ |
| 24380 | case 4976: /* atomic_bit_test_and_sethi_1 */ |
| 24381 | case 4975: /* atomic_xordi */ |
| 24382 | case 4974: /* atomic_ordi */ |
| 24383 | case 4973: /* atomic_anddi */ |
| 24384 | case 4972: /* atomic_xorsi */ |
| 24385 | case 4971: /* atomic_orsi */ |
| 24386 | case 4970: /* atomic_andsi */ |
| 24387 | case 4969: /* atomic_xorhi */ |
| 24388 | case 4968: /* atomic_orhi */ |
| 24389 | case 4967: /* atomic_andhi */ |
| 24390 | case 4966: /* atomic_xorqi */ |
| 24391 | case 4965: /* atomic_orqi */ |
| 24392 | case 4964: /* atomic_andqi */ |
| 24393 | case 4963: /* atomic_subdi */ |
| 24394 | case 4962: /* atomic_subsi */ |
| 24395 | case 4961: /* atomic_subhi */ |
| 24396 | case 4960: /* atomic_subqi */ |
| 24397 | case 4959: /* atomic_adddi */ |
| 24398 | case 4958: /* atomic_addsi */ |
| 24399 | case 4957: /* atomic_addhi */ |
| 24400 | case 4956: /* atomic_addqi */ |
| 24401 | case 4955: /* atomic_exchangedi */ |
| 24402 | case 4954: /* atomic_exchangesi */ |
| 24403 | case 4953: /* atomic_exchangehi */ |
| 24404 | case 4952: /* atomic_exchangeqi */ |
| 24405 | case 4951: /* *atomic_fetch_add_cmpdi */ |
| 24406 | case 4950: /* *atomic_fetch_add_cmpsi */ |
| 24407 | case 4949: /* *atomic_fetch_add_cmphi */ |
| 24408 | case 4948: /* *atomic_fetch_add_cmpqi */ |
| 24409 | case 4947: /* atomic_fetch_adddi */ |
| 24410 | case 4946: /* atomic_fetch_addsi */ |
| 24411 | case 4945: /* atomic_fetch_addhi */ |
| 24412 | case 4944: /* atomic_fetch_addqi */ |
| 24413 | case 4943: /* atomic_compare_and_swapdi_1 */ |
| 24414 | case 4942: /* atomic_compare_and_swapsi_1 */ |
| 24415 | case 4941: /* atomic_compare_and_swaphi_1 */ |
| 24416 | case 4940: /* atomic_compare_and_swapqi_1 */ |
| 24417 | case 4939: /* atomic_compare_and_swapti_doubleword */ |
| 24418 | case 4938: /* atomic_compare_and_swapdi_doubleword */ |
| 24419 | case 4933: /* atomic_storedi_fpu */ |
| 24420 | case 4932: /* atomic_storedi_1 */ |
| 24421 | case 4931: /* atomic_storesi_1 */ |
| 24422 | case 4930: /* atomic_storehi_1 */ |
| 24423 | case 4929: /* atomic_storeqi_1 */ |
| 24424 | case 4928: /* atomic_loaddi_fpu */ |
| 24425 | case 4927: /* mfence_nosse */ |
| 24426 | case 4923: /* vpopcountv8di_mask */ |
| 24427 | case 4922: /* vpopcountv8di */ |
| 24428 | case 4921: /* vpopcountv16si_mask */ |
| 24429 | case 4920: /* vpopcountv16si */ |
| 24430 | case 4901: /* *movv64si_internal */ |
| 24431 | case 4900: /* *movv64sf_internal */ |
| 24432 | case 4875: /* avx512f_pd512_256pd */ |
| 24433 | case 4874: /* avx512f_ps512_256ps */ |
| 24434 | case 4873: /* avx512f_si512_256si */ |
| 24435 | case 4872: /* avx512f_pd512_pd */ |
| 24436 | case 4871: /* avx512f_ps512_ps */ |
| 24437 | case 4870: /* avx512f_si512_si */ |
| 24438 | case 4832: /* avx512f_vgetmantv2df_round */ |
| 24439 | case 4831: /* avx512f_vgetmantv2df */ |
| 24440 | case 4830: /* avx512f_vgetmantv4sf_round */ |
| 24441 | case 4829: /* avx512f_vgetmantv4sf */ |
| 24442 | case 4828: /* avx512vl_getmantv2df_mask_round */ |
| 24443 | case 4827: /* avx512vl_getmantv2df_mask */ |
| 24444 | case 4826: /* avx512vl_getmantv2df_round */ |
| 24445 | case 4825: /* avx512vl_getmantv2df */ |
| 24446 | case 4824: /* avx512vl_getmantv4df_mask_round */ |
| 24447 | case 4823: /* avx512vl_getmantv4df_mask */ |
| 24448 | case 4822: /* avx512vl_getmantv4df_round */ |
| 24449 | case 4821: /* avx512vl_getmantv4df */ |
| 24450 | case 4820: /* avx512f_getmantv8df_mask_round */ |
| 24451 | case 4819: /* avx512f_getmantv8df_mask */ |
| 24452 | case 4818: /* avx512f_getmantv8df_round */ |
| 24453 | case 4817: /* avx512f_getmantv8df */ |
| 24454 | case 4816: /* avx512vl_getmantv4sf_mask_round */ |
| 24455 | case 4815: /* avx512vl_getmantv4sf_mask */ |
| 24456 | case 4814: /* avx512vl_getmantv4sf_round */ |
| 24457 | case 4813: /* avx512vl_getmantv4sf */ |
| 24458 | case 4812: /* avx512vl_getmantv8sf_mask_round */ |
| 24459 | case 4811: /* avx512vl_getmantv8sf_mask */ |
| 24460 | case 4810: /* avx512vl_getmantv8sf_round */ |
| 24461 | case 4809: /* avx512vl_getmantv8sf */ |
| 24462 | case 4808: /* avx512f_getmantv16sf_mask_round */ |
| 24463 | case 4807: /* avx512f_getmantv16sf_mask */ |
| 24464 | case 4806: /* avx512f_getmantv16sf_round */ |
| 24465 | case 4805: /* avx512f_getmantv16sf */ |
| 24466 | case 4435: /* avx_pd256_pd */ |
| 24467 | case 4434: /* avx_ps256_ps */ |
| 24468 | case 4433: /* avx_si256_si */ |
| 24469 | case 4252: /* *avx_vperm_broadcast_v4df */ |
| 24470 | case 4251: /* *avx_vperm_broadcast_v8sf */ |
| 24471 | case 3677: /* sse3_monitor_di */ |
| 24472 | case 3676: /* sse3_monitor_si */ |
| 24473 | case 3675: /* sse3_mwait */ |
| 24474 | case 3637: /* *vec_extractv4si_zext_mem */ |
| 24475 | case 3636: /* *vec_extractv4si_mem */ |
| 24476 | case 3633: /* *vec_extractv4si_0_zext */ |
| 24477 | case 3632: /* *vec_extractv4si_0_zext_sse4 */ |
| 24478 | case 3631: /* *vec_extractv2di_0_sse */ |
| 24479 | case 3630: /* *vec_extractv2di_0 */ |
| 24480 | case 3629: /* *vec_extractv4si_0 */ |
| 24481 | case 3628: /* *vec_extractv8hi_mem */ |
| 24482 | case 3627: /* *vec_extractv16qi_mem */ |
| 24483 | case 3503: /* avx512vl_testnmv2di3_mask */ |
| 24484 | case 3502: /* avx512vl_testnmv2di3 */ |
| 24485 | case 3501: /* avx512vl_testnmv4di3_mask */ |
| 24486 | case 3500: /* avx512vl_testnmv4di3 */ |
| 24487 | case 3499: /* avx512f_testnmv8di3_mask */ |
| 24488 | case 3498: /* avx512f_testnmv8di3 */ |
| 24489 | case 3497: /* avx512vl_testnmv4si3_mask */ |
| 24490 | case 3496: /* avx512vl_testnmv4si3 */ |
| 24491 | case 3495: /* avx512vl_testnmv8si3_mask */ |
| 24492 | case 3494: /* avx512vl_testnmv8si3 */ |
| 24493 | case 3493: /* avx512f_testnmv16si3_mask */ |
| 24494 | case 3492: /* avx512f_testnmv16si3 */ |
| 24495 | case 3491: /* avx512vl_testnmv8hi3_mask */ |
| 24496 | case 3490: /* avx512vl_testnmv8hi3 */ |
| 24497 | case 3489: /* avx512vl_testnmv16hi3_mask */ |
| 24498 | case 3488: /* avx512vl_testnmv16hi3 */ |
| 24499 | case 3487: /* avx512bw_testnmv32hi3_mask */ |
| 24500 | case 3486: /* avx512bw_testnmv32hi3 */ |
| 24501 | case 3485: /* avx512vl_testnmv32qi3_mask */ |
| 24502 | case 3484: /* avx512vl_testnmv32qi3 */ |
| 24503 | case 3483: /* avx512vl_testnmv16qi3_mask */ |
| 24504 | case 3482: /* avx512vl_testnmv16qi3 */ |
| 24505 | case 3481: /* avx512bw_testnmv64qi3_mask */ |
| 24506 | case 3480: /* avx512bw_testnmv64qi3 */ |
| 24507 | case 3479: /* avx512vl_testmv2di3_mask */ |
| 24508 | case 3478: /* avx512vl_testmv2di3 */ |
| 24509 | case 3477: /* avx512vl_testmv4di3_mask */ |
| 24510 | case 3476: /* avx512vl_testmv4di3 */ |
| 24511 | case 3475: /* avx512f_testmv8di3_mask */ |
| 24512 | case 3474: /* avx512f_testmv8di3 */ |
| 24513 | case 3473: /* avx512vl_testmv4si3_mask */ |
| 24514 | case 3472: /* avx512vl_testmv4si3 */ |
| 24515 | case 3471: /* avx512vl_testmv8si3_mask */ |
| 24516 | case 3470: /* avx512vl_testmv8si3 */ |
| 24517 | case 3469: /* avx512f_testmv16si3_mask */ |
| 24518 | case 3468: /* avx512f_testmv16si3 */ |
| 24519 | case 3467: /* avx512vl_testmv8hi3_mask */ |
| 24520 | case 3466: /* avx512vl_testmv8hi3 */ |
| 24521 | case 3465: /* avx512vl_testmv16hi3_mask */ |
| 24522 | case 3464: /* avx512vl_testmv16hi3 */ |
| 24523 | case 3463: /* avx512bw_testmv32hi3_mask */ |
| 24524 | case 3462: /* avx512bw_testmv32hi3 */ |
| 24525 | case 3461: /* avx512vl_testmv32qi3_mask */ |
| 24526 | case 3460: /* avx512vl_testmv32qi3 */ |
| 24527 | case 3459: /* avx512vl_testmv16qi3_mask */ |
| 24528 | case 3458: /* avx512vl_testmv16qi3 */ |
| 24529 | case 3457: /* avx512bw_testmv64qi3_mask */ |
| 24530 | case 3456: /* avx512bw_testmv64qi3 */ |
| 24531 | case 3191: /* avx512vl_rorv2di_mask */ |
| 24532 | case 3190: /* avx512vl_rorv2di */ |
| 24533 | case 3189: /* avx512vl_rolv2di_mask */ |
| 24534 | case 3188: /* avx512vl_rolv2di */ |
| 24535 | case 3187: /* avx512vl_rorv4di_mask */ |
| 24536 | case 3186: /* avx512vl_rorv4di */ |
| 24537 | case 3185: /* avx512vl_rolv4di_mask */ |
| 24538 | case 3184: /* avx512vl_rolv4di */ |
| 24539 | case 3183: /* avx512f_rorv8di_mask */ |
| 24540 | case 3182: /* avx512f_rorv8di */ |
| 24541 | case 3181: /* avx512f_rolv8di_mask */ |
| 24542 | case 3180: /* avx512f_rolv8di */ |
| 24543 | case 3179: /* avx512vl_rorv4si_mask */ |
| 24544 | case 3178: /* avx512vl_rorv4si */ |
| 24545 | case 3177: /* avx512vl_rolv4si_mask */ |
| 24546 | case 3176: /* avx512vl_rolv4si */ |
| 24547 | case 3175: /* avx512vl_rorv8si_mask */ |
| 24548 | case 3174: /* avx512vl_rorv8si */ |
| 24549 | case 3173: /* avx512vl_rolv8si_mask */ |
| 24550 | case 3172: /* avx512vl_rolv8si */ |
| 24551 | case 3171: /* avx512f_rorv16si_mask */ |
| 24552 | case 3170: /* avx512f_rorv16si */ |
| 24553 | case 3169: /* avx512f_rolv16si_mask */ |
| 24554 | case 3168: /* avx512f_rolv16si */ |
| 24555 | case 3167: /* avx512vl_rorvv2di_mask */ |
| 24556 | case 3166: /* avx512vl_rorvv2di */ |
| 24557 | case 3165: /* avx512vl_rolvv2di_mask */ |
| 24558 | case 3164: /* avx512vl_rolvv2di */ |
| 24559 | case 3163: /* avx512vl_rorvv4di_mask */ |
| 24560 | case 3162: /* avx512vl_rorvv4di */ |
| 24561 | case 3161: /* avx512vl_rolvv4di_mask */ |
| 24562 | case 3160: /* avx512vl_rolvv4di */ |
| 24563 | case 3159: /* avx512f_rorvv8di_mask */ |
| 24564 | case 3158: /* avx512f_rorvv8di */ |
| 24565 | case 3157: /* avx512f_rolvv8di_mask */ |
| 24566 | case 3156: /* avx512f_rolvv8di */ |
| 24567 | case 3155: /* avx512vl_rorvv4si_mask */ |
| 24568 | case 3154: /* avx512vl_rorvv4si */ |
| 24569 | case 3153: /* avx512vl_rolvv4si_mask */ |
| 24570 | case 3152: /* avx512vl_rolvv4si */ |
| 24571 | case 3151: /* avx512vl_rorvv8si_mask */ |
| 24572 | case 3150: /* avx512vl_rorvv8si */ |
| 24573 | case 3149: /* avx512vl_rolvv8si_mask */ |
| 24574 | case 3148: /* avx512vl_rolvv8si */ |
| 24575 | case 3147: /* avx512f_rorvv16si_mask */ |
| 24576 | case 3146: /* avx512f_rorvv16si */ |
| 24577 | case 3145: /* avx512f_rolvv16si_mask */ |
| 24578 | case 3144: /* avx512f_rolvv16si */ |
| 24579 | case 2704: /* avx512f_rndscalev2df_round */ |
| 24580 | case 2703: /* avx512f_rndscalev2df */ |
| 24581 | case 2702: /* avx512f_rndscalev4sf_round */ |
| 24582 | case 2701: /* avx512f_rndscalev4sf */ |
| 24583 | case 2700: /* avx512vl_rndscalev2df_mask_round */ |
| 24584 | case 2699: /* avx512vl_rndscalev2df_mask */ |
| 24585 | case 2698: /* avx512vl_rndscalev2df_round */ |
| 24586 | case 2697: /* avx512vl_rndscalev2df */ |
| 24587 | case 2696: /* avx512vl_rndscalev4df_mask_round */ |
| 24588 | case 2695: /* avx512vl_rndscalev4df_mask */ |
| 24589 | case 2694: /* avx512vl_rndscalev4df_round */ |
| 24590 | case 2693: /* avx512vl_rndscalev4df */ |
| 24591 | case 2692: /* avx512f_rndscalev8df_mask_round */ |
| 24592 | case 2691: /* avx512f_rndscalev8df_mask */ |
| 24593 | case 2690: /* avx512f_rndscalev8df_round */ |
| 24594 | case 2689: /* avx512f_rndscalev8df */ |
| 24595 | case 2688: /* avx512vl_rndscalev4sf_mask_round */ |
| 24596 | case 2687: /* avx512vl_rndscalev4sf_mask */ |
| 24597 | case 2686: /* avx512vl_rndscalev4sf_round */ |
| 24598 | case 2685: /* avx512vl_rndscalev4sf */ |
| 24599 | case 2684: /* avx512vl_rndscalev8sf_mask_round */ |
| 24600 | case 2683: /* avx512vl_rndscalev8sf_mask */ |
| 24601 | case 2682: /* avx512vl_rndscalev8sf_round */ |
| 24602 | case 2681: /* avx512vl_rndscalev8sf */ |
| 24603 | case 2680: /* avx512f_rndscalev16sf_mask_round */ |
| 24604 | case 2679: /* avx512f_rndscalev16sf_mask */ |
| 24605 | case 2678: /* avx512f_rndscalev16sf_round */ |
| 24606 | case 2677: /* avx512f_rndscalev16sf */ |
| 24607 | case 2676: /* avx512f_sfixupimmv2df_mask_round */ |
| 24608 | case 2675: /* avx512f_sfixupimmv2df_mask */ |
| 24609 | case 2674: /* avx512f_sfixupimmv4sf_mask_round */ |
| 24610 | case 2673: /* avx512f_sfixupimmv4sf_mask */ |
| 24611 | case 2672: /* avx512f_sfixupimmv2df_maskz_1_round */ |
| 24612 | case 2671: /* avx512f_sfixupimmv2df_maskz_1 */ |
| 24613 | case 2670: /* avx512f_sfixupimmv2df_round */ |
| 24614 | case 2669: /* avx512f_sfixupimmv2df */ |
| 24615 | case 2668: /* avx512f_sfixupimmv4sf_maskz_1_round */ |
| 24616 | case 2667: /* avx512f_sfixupimmv4sf_maskz_1 */ |
| 24617 | case 2666: /* avx512f_sfixupimmv4sf_round */ |
| 24618 | case 2665: /* avx512f_sfixupimmv4sf */ |
| 24619 | case 2664: /* avx512vl_fixupimmv2df_mask_round */ |
| 24620 | case 2663: /* avx512vl_fixupimmv2df_mask */ |
| 24621 | case 2662: /* avx512vl_fixupimmv4df_mask_round */ |
| 24622 | case 2661: /* avx512vl_fixupimmv4df_mask */ |
| 24623 | case 2660: /* avx512f_fixupimmv8df_mask_round */ |
| 24624 | case 2659: /* avx512f_fixupimmv8df_mask */ |
| 24625 | case 2658: /* avx512vl_fixupimmv4sf_mask_round */ |
| 24626 | case 2657: /* avx512vl_fixupimmv4sf_mask */ |
| 24627 | case 2656: /* avx512vl_fixupimmv8sf_mask_round */ |
| 24628 | case 2655: /* avx512vl_fixupimmv8sf_mask */ |
| 24629 | case 2654: /* avx512f_fixupimmv16sf_mask_round */ |
| 24630 | case 2653: /* avx512f_fixupimmv16sf_mask */ |
| 24631 | case 2652: /* avx512vl_fixupimmv2df_maskz_1_round */ |
| 24632 | case 2651: /* avx512vl_fixupimmv2df_maskz_1 */ |
| 24633 | case 2650: /* avx512vl_fixupimmv2df_round */ |
| 24634 | case 2649: /* avx512vl_fixupimmv2df */ |
| 24635 | case 2648: /* avx512vl_fixupimmv4df_maskz_1_round */ |
| 24636 | case 2647: /* avx512vl_fixupimmv4df_maskz_1 */ |
| 24637 | case 2646: /* avx512vl_fixupimmv4df_round */ |
| 24638 | case 2645: /* avx512vl_fixupimmv4df */ |
| 24639 | case 2644: /* avx512f_fixupimmv8df_maskz_1_round */ |
| 24640 | case 2643: /* avx512f_fixupimmv8df_maskz_1 */ |
| 24641 | case 2642: /* avx512f_fixupimmv8df_round */ |
| 24642 | case 2641: /* avx512f_fixupimmv8df */ |
| 24643 | case 2640: /* avx512vl_fixupimmv4sf_maskz_1_round */ |
| 24644 | case 2639: /* avx512vl_fixupimmv4sf_maskz_1 */ |
| 24645 | case 2638: /* avx512vl_fixupimmv4sf_round */ |
| 24646 | case 2637: /* avx512vl_fixupimmv4sf */ |
| 24647 | case 2636: /* avx512vl_fixupimmv8sf_maskz_1_round */ |
| 24648 | case 2635: /* avx512vl_fixupimmv8sf_maskz_1 */ |
| 24649 | case 2634: /* avx512vl_fixupimmv8sf_round */ |
| 24650 | case 2633: /* avx512vl_fixupimmv8sf */ |
| 24651 | case 2632: /* avx512f_fixupimmv16sf_maskz_1_round */ |
| 24652 | case 2631: /* avx512f_fixupimmv16sf_maskz_1 */ |
| 24653 | case 2630: /* avx512f_fixupimmv16sf_round */ |
| 24654 | case 2629: /* avx512f_fixupimmv16sf */ |
| 24655 | case 2628: /* avx512vl_alignv2di_mask */ |
| 24656 | case 2627: /* *avx512vl_alignv2di */ |
| 24657 | case 2626: /* avx512vl_alignv4di_mask */ |
| 24658 | case 2625: /* *avx512vl_alignv4di */ |
| 24659 | case 2624: /* avx512f_alignv8di_mask */ |
| 24660 | case 2623: /* *avx512f_alignv8di */ |
| 24661 | case 2622: /* avx512vl_alignv4si_mask */ |
| 24662 | case 2621: /* *avx512vl_alignv4si */ |
| 24663 | case 2620: /* avx512vl_alignv8si_mask */ |
| 24664 | case 2619: /* *avx512vl_alignv8si */ |
| 24665 | case 2618: /* avx512f_alignv16si_mask */ |
| 24666 | case 2617: /* *avx512f_alignv16si */ |
| 24667 | case 2616: /* avx512f_sgetexpv2df_round */ |
| 24668 | case 2615: /* avx512f_sgetexpv2df */ |
| 24669 | case 2614: /* avx512f_sgetexpv4sf_round */ |
| 24670 | case 2613: /* avx512f_sgetexpv4sf */ |
| 24671 | case 2612: /* avx512vl_getexpv2df_mask_round */ |
| 24672 | case 2611: /* avx512vl_getexpv2df_mask */ |
| 24673 | case 2610: /* avx512vl_getexpv2df_round */ |
| 24674 | case 2609: /* avx512vl_getexpv2df */ |
| 24675 | case 2608: /* avx512vl_getexpv4df_mask_round */ |
| 24676 | case 2607: /* avx512vl_getexpv4df_mask */ |
| 24677 | case 2606: /* avx512vl_getexpv4df_round */ |
| 24678 | case 2605: /* avx512vl_getexpv4df */ |
| 24679 | case 2604: /* avx512f_getexpv8df_mask_round */ |
| 24680 | case 2603: /* avx512f_getexpv8df_mask */ |
| 24681 | case 2602: /* avx512f_getexpv8df_round */ |
| 24682 | case 2601: /* avx512f_getexpv8df */ |
| 24683 | case 2600: /* avx512vl_getexpv4sf_mask_round */ |
| 24684 | case 2599: /* avx512vl_getexpv4sf_mask */ |
| 24685 | case 2598: /* avx512vl_getexpv4sf_round */ |
| 24686 | case 2597: /* avx512vl_getexpv4sf */ |
| 24687 | case 2596: /* avx512vl_getexpv8sf_mask_round */ |
| 24688 | case 2595: /* avx512vl_getexpv8sf_mask */ |
| 24689 | case 2594: /* avx512vl_getexpv8sf_round */ |
| 24690 | case 2593: /* avx512vl_getexpv8sf */ |
| 24691 | case 2592: /* avx512f_getexpv16sf_mask_round */ |
| 24692 | case 2591: /* avx512f_getexpv16sf_mask */ |
| 24693 | case 2590: /* avx512f_getexpv16sf_round */ |
| 24694 | case 2589: /* avx512f_getexpv16sf */ |
| 24695 | case 2570: /* avx512vl_scalefv2df_mask_round */ |
| 24696 | case 2569: /* avx512vl_scalefv2df_mask */ |
| 24697 | case 2568: /* avx512vl_scalefv2df_round */ |
| 24698 | case 2567: /* avx512vl_scalefv2df */ |
| 24699 | case 2566: /* avx512vl_scalefv4df_mask_round */ |
| 24700 | case 2565: /* avx512vl_scalefv4df_mask */ |
| 24701 | case 2564: /* avx512vl_scalefv4df_round */ |
| 24702 | case 2563: /* avx512vl_scalefv4df */ |
| 24703 | case 2562: /* avx512f_scalefv8df_mask_round */ |
| 24704 | case 2561: /* avx512f_scalefv8df_mask */ |
| 24705 | case 2560: /* avx512f_scalefv8df_round */ |
| 24706 | case 2559: /* avx512f_scalefv8df */ |
| 24707 | case 2558: /* avx512vl_scalefv4sf_mask_round */ |
| 24708 | case 2557: /* avx512vl_scalefv4sf_mask */ |
| 24709 | case 2556: /* avx512vl_scalefv4sf_round */ |
| 24710 | case 2555: /* avx512vl_scalefv4sf */ |
| 24711 | case 2554: /* avx512vl_scalefv8sf_mask_round */ |
| 24712 | case 2553: /* avx512vl_scalefv8sf_mask */ |
| 24713 | case 2552: /* avx512vl_scalefv8sf_round */ |
| 24714 | case 2551: /* avx512vl_scalefv8sf */ |
| 24715 | case 2550: /* avx512f_scalefv16sf_mask_round */ |
| 24716 | case 2549: /* avx512f_scalefv16sf_mask */ |
| 24717 | case 2548: /* avx512f_scalefv16sf_round */ |
| 24718 | case 2547: /* avx512f_scalefv16sf */ |
| 24719 | case 2546: /* avx512f_vmscalefv2df_round */ |
| 24720 | case 2545: /* avx512f_vmscalefv2df */ |
| 24721 | case 2544: /* avx512f_vmscalefv4sf_round */ |
| 24722 | case 2543: /* avx512f_vmscalefv4sf */ |
| 24723 | case 2529: /* vec_extract_lo_v32qi */ |
| 24724 | case 2527: /* vec_extract_lo_v64qi */ |
| 24725 | case 2525: /* vec_extract_lo_v16hi */ |
| 24726 | case 2523: /* vec_extract_lo_v32hi */ |
| 24727 | case 2502: /* vec_extract_lo_v16si_mask */ |
| 24728 | case 2501: /* vec_extract_lo_v16si */ |
| 24729 | case 2500: /* vec_extract_lo_v16sf_mask */ |
| 24730 | case 2499: /* vec_extract_lo_v16sf */ |
| 24731 | case 2468: /* *vec_extractv4sf_mem */ |
| 24732 | case 2466: /* *vec_extractv4sf_0 */ |
| 24733 | case 2415: /* *avx512vl_cvtmask2qv2di */ |
| 24734 | case 2414: /* *avx512vl_cvtmask2qv4di */ |
| 24735 | case 2413: /* *avx512f_cvtmask2qv8di */ |
| 24736 | case 2412: /* *avx512vl_cvtmask2dv4si */ |
| 24737 | case 2411: /* *avx512vl_cvtmask2dv8si */ |
| 24738 | case 2410: /* *avx512f_cvtmask2dv16si */ |
| 24739 | case 2409: /* *avx512vl_cvtmask2wv8hi */ |
| 24740 | case 2408: /* *avx512vl_cvtmask2wv16hi */ |
| 24741 | case 2407: /* *avx512bw_cvtmask2wv32hi */ |
| 24742 | case 2406: /* *avx512vl_cvtmask2bv32qi */ |
| 24743 | case 2405: /* *avx512vl_cvtmask2bv16qi */ |
| 24744 | case 2404: /* *avx512bw_cvtmask2bv64qi */ |
| 24745 | case 2403: /* avx512vl_cvtq2maskv2di */ |
| 24746 | case 2402: /* avx512vl_cvtq2maskv4di */ |
| 24747 | case 2401: /* avx512f_cvtq2maskv8di */ |
| 24748 | case 2400: /* avx512vl_cvtd2maskv4si */ |
| 24749 | case 2399: /* avx512vl_cvtd2maskv8si */ |
| 24750 | case 2398: /* avx512f_cvtd2maskv16si */ |
| 24751 | case 2397: /* avx512vl_cvtw2maskv8hi */ |
| 24752 | case 2396: /* avx512vl_cvtw2maskv16hi */ |
| 24753 | case 2395: /* avx512bw_cvtw2maskv32hi */ |
| 24754 | case 2394: /* avx512vl_cvtb2maskv32qi */ |
| 24755 | case 2393: /* avx512vl_cvtb2maskv16qi */ |
| 24756 | case 2392: /* avx512bw_cvtb2maskv64qi */ |
| 24757 | case 1360: /* *absnegv2df2 */ |
| 24758 | case 1359: /* *absnegv4df2 */ |
| 24759 | case 1358: /* *absnegv8df2 */ |
| 24760 | case 1357: /* *absnegv4sf2 */ |
| 24761 | case 1356: /* *absnegv8sf2 */ |
| 24762 | case 1355: /* *absnegv16sf2 */ |
| 24763 | case 1354: /* kunpckdi */ |
| 24764 | case 1353: /* kunpcksi */ |
| 24765 | case 1294: /* movdi_to_sse */ |
| 24766 | case 1209: /* *vec_extractv2si_zext_mem */ |
| 24767 | case 1207: /* *vec_extractv2si_0 */ |
| 24768 | case 1137: /* *vec_extractv2sf_0 */ |
| 24769 | case 1105: /* rdpid */ |
| 24770 | case 1104: /* *wrpkru */ |
| 24771 | case 1103: /* *rdpkru */ |
| 24772 | case 1086: /* clzero_di */ |
| 24773 | case 1085: /* clzero_si */ |
| 24774 | case 1084: /* monitorx_di */ |
| 24775 | case 1083: /* monitorx_si */ |
| 24776 | case 1082: /* mwaitx */ |
| 24777 | case 1079: /* xtest_1 */ |
| 24778 | case 1078: /* xabort */ |
| 24779 | case 1077: /* xend */ |
| 24780 | case 1076: /* xbegin_1 */ |
| 24781 | case 1075: /* *pause */ |
| 24782 | case 1074: /* rdseeddi_1 */ |
| 24783 | case 1073: /* rdseedsi_1 */ |
| 24784 | case 1072: /* rdseedhi_1 */ |
| 24785 | case 1071: /* rdranddi_1 */ |
| 24786 | case 1070: /* rdrandsi_1 */ |
| 24787 | case 1069: /* rdrandhi_1 */ |
| 24788 | case 1068: /* wrgsbasedi */ |
| 24789 | case 1067: /* wrfsbasedi */ |
| 24790 | case 1066: /* wrgsbasesi */ |
| 24791 | case 1065: /* wrfsbasesi */ |
| 24792 | case 1064: /* rdgsbasedi */ |
| 24793 | case 1063: /* rdfsbasedi */ |
| 24794 | case 1062: /* rdgsbasesi */ |
| 24795 | case 1061: /* rdfsbasesi */ |
| 24796 | case 1052: /* fnclex */ |
| 24797 | case 1051: /* fnstsw */ |
| 24798 | case 1050: /* fldenv */ |
| 24799 | case 1049: /* fnstenv */ |
| 24800 | case 1048: /* xrstors64 */ |
| 24801 | case 1047: /* xrstor64 */ |
| 24802 | case 1046: /* xrstors_rex64 */ |
| 24803 | case 1045: /* xrstor_rex64 */ |
| 24804 | case 1044: /* xrstors */ |
| 24805 | case 1043: /* xrstor */ |
| 24806 | case 1042: /* xsaves64 */ |
| 24807 | case 1041: /* xsavec64 */ |
| 24808 | case 1040: /* xsaveopt64 */ |
| 24809 | case 1039: /* xsave64 */ |
| 24810 | case 1038: /* xsaves_rex64 */ |
| 24811 | case 1037: /* xsavec_rex64 */ |
| 24812 | case 1036: /* xsaveopt_rex64 */ |
| 24813 | case 1035: /* xsave_rex64 */ |
| 24814 | case 1034: /* xsaves */ |
| 24815 | case 1033: /* xsavec */ |
| 24816 | case 1032: /* xsaveopt */ |
| 24817 | case 1031: /* xsave */ |
| 24818 | case 1030: /* fxrstor64 */ |
| 24819 | case 1029: /* fxrstor */ |
| 24820 | case 1028: /* fxsave64 */ |
| 24821 | case 1027: /* fxsave */ |
| 24822 | case 1026: /* rdtscp_rex64 */ |
| 24823 | case 1025: /* rdtscp */ |
| 24824 | case 1024: /* rdtsc_rex64 */ |
| 24825 | case 1023: /* rdtsc */ |
| 24826 | case 1022: /* rdpmc_rex64 */ |
| 24827 | case 1021: /* rdpmc */ |
| 24828 | case 1016: /* stack_tls_protect_test_di */ |
| 24829 | case 1015: /* stack_tls_protect_test_si */ |
| 24830 | case 1014: /* stack_protect_test_di */ |
| 24831 | case 1013: /* stack_protect_test_si */ |
| 24832 | case 1012: /* stack_tls_protect_set_di */ |
| 24833 | case 1011: /* stack_tls_protect_set_si */ |
| 24834 | case 1010: /* stack_protect_set_di */ |
| 24835 | case 1009: /* stack_protect_set_si */ |
| 24836 | case 1005: /* trap */ |
| 24837 | case 1004: /* probe_stack_rangedi */ |
| 24838 | case 1003: /* probe_stack_rangesi */ |
| 24839 | case 1002: /* adjust_stack_and_probedi */ |
| 24840 | case 1001: /* adjust_stack_and_probesi */ |
| 24841 | case 998: /* allocate_stack_worker_probe_di */ |
| 24842 | case 997: /* allocate_stack_worker_probe_si */ |
| 24843 | case 968: /* *strlenqi_1 */ |
| 24844 | case 967: /* *strlenqi_1 */ |
| 24845 | case 966: /* *cmpstrnqi_1 */ |
| 24846 | case 965: /* *cmpstrnqi_1 */ |
| 24847 | case 964: /* *cmpstrnqi_nz_1 */ |
| 24848 | case 963: /* *cmpstrnqi_nz_1 */ |
| 24849 | case 962: /* *rep_stosqi */ |
| 24850 | case 961: /* *rep_stosqi */ |
| 24851 | case 960: /* *rep_stossi */ |
| 24852 | case 959: /* *rep_stossi */ |
| 24853 | case 958: /* *rep_stosdi_rex64 */ |
| 24854 | case 957: /* *rep_stosdi_rex64 */ |
| 24855 | case 956: /* *strsetqi_1 */ |
| 24856 | case 955: /* *strsetqi_1 */ |
| 24857 | case 954: /* *strsethi_1 */ |
| 24858 | case 953: /* *strsethi_1 */ |
| 24859 | case 952: /* *strsetsi_1 */ |
| 24860 | case 951: /* *strsetsi_1 */ |
| 24861 | case 950: /* *strsetdi_rex_1 */ |
| 24862 | case 949: /* *strsetdi_rex_1 */ |
| 24863 | case 948: /* *rep_movqi */ |
| 24864 | case 947: /* *rep_movqi */ |
| 24865 | case 946: /* *rep_movsi */ |
| 24866 | case 945: /* *rep_movsi */ |
| 24867 | case 944: /* *rep_movdi_rex64 */ |
| 24868 | case 943: /* *rep_movdi_rex64 */ |
| 24869 | case 942: /* *strmovqi_1 */ |
| 24870 | case 941: /* *strmovqi_1 */ |
| 24871 | case 940: /* *strmovhi_1 */ |
| 24872 | case 939: /* *strmovhi_1 */ |
| 24873 | case 938: /* *strmovsi_1 */ |
| 24874 | case 937: /* *strmovsi_1 */ |
| 24875 | case 936: /* *strmovdi_rex_1 */ |
| 24876 | case 935: /* *strmovdi_rex_1 */ |
| 24877 | case 934: /* cld */ |
| 24878 | case 932: /* fxamdf2_i387_with_temp */ |
| 24879 | case 931: /* fxamsf2_i387_with_temp */ |
| 24880 | case 930: /* fxamxf2_i387 */ |
| 24881 | case 929: /* fxamdf2_i387 */ |
| 24882 | case 928: /* fxamsf2_i387 */ |
| 24883 | case 811: /* *tls_dynamic_gnu2_combine_64 */ |
| 24884 | case 808: /* *tls_dynamic_gnu2_combine_32 */ |
| 24885 | case 797: /* *tls_local_dynamic_32_once */ |
| 24886 | case 796: /* *tls_local_dynamic_base_64_largepic */ |
| 24887 | case 795: /* *tls_local_dynamic_base_64_di */ |
| 24888 | case 794: /* *tls_local_dynamic_base_64_si */ |
| 24889 | case 793: /* *tls_local_dynamic_base_32_gnu */ |
| 24890 | case 792: /* *tls_global_dynamic_64_largepic */ |
| 24891 | case 791: /* *tls_global_dynamic_64_di */ |
| 24892 | case 790: /* *tls_global_dynamic_64_si */ |
| 24893 | case 789: /* *tls_global_dynamic_32_gnu */ |
| 24894 | case 788: /* *parityhi2_cmp */ |
| 24895 | case 787: /* paritysi2_cmp */ |
| 24896 | case 786: /* paritydi2_cmp */ |
| 24897 | case 785: /* bswaphi_lowpart */ |
| 24898 | case 784: /* *bswaphi_lowpart_1 */ |
| 24899 | case 778: /* *popcounthi2_1 */ |
| 24900 | case 706: /* ffssi2_no_cmove */ |
| 24901 | case 705: /* split_stack_return */ |
| 24902 | case 702: /* eh_return_internal */ |
| 24903 | case 698: /* *set_got_labelled */ |
| 24904 | case 697: /* *set_got */ |
| 24905 | case 696: /* pad */ |
| 24906 | case 695: /* nops */ |
| 24907 | case 694: /* nop */ |
| 24908 | case 692: /* simple_return_pop_internal */ |
| 24909 | case 691: /* simple_return_internal_long */ |
| 24910 | case 690: /* interrupt_return */ |
| 24911 | case 689: /* simple_return_internal */ |
| 24912 | case 688: /* prologue_use */ |
| 24913 | case 687: /* *memory_blockage */ |
| 24914 | case 686: /* blockage */ |
| 24915 | case 658: /* *jccxf_si_r_i387 */ |
| 24916 | case 657: /* *jccdf_si_r_i387 */ |
| 24917 | case 656: /* *jccsf_si_r_i387 */ |
| 24918 | case 655: /* *jccxf_hi_r_i387 */ |
| 24919 | case 654: /* *jccdf_hi_r_i387 */ |
| 24920 | case 653: /* *jccsf_hi_r_i387 */ |
| 24921 | case 652: /* *jccxf_si_i387 */ |
| 24922 | case 651: /* *jccdf_si_i387 */ |
| 24923 | case 650: /* *jccsf_si_i387 */ |
| 24924 | case 649: /* *jccxf_hi_i387 */ |
| 24925 | case 648: /* *jccdf_hi_i387 */ |
| 24926 | case 647: /* *jccsf_hi_i387 */ |
| 24927 | case 646: /* *jccuxf_r_i387 */ |
| 24928 | case 645: /* *jccudf_r_i387 */ |
| 24929 | case 644: /* *jccusf_r_i387 */ |
| 24930 | case 643: /* *jccuxf_i387 */ |
| 24931 | case 642: /* *jccudf_i387 */ |
| 24932 | case 641: /* *jccusf_i387 */ |
| 24933 | case 640: /* *jccdf_r_i387 */ |
| 24934 | case 639: /* *jccsf_r_i387 */ |
| 24935 | case 638: /* *jccdf_i387 */ |
| 24936 | case 637: /* *jccsf_i387 */ |
| 24937 | case 636: /* *jccxf_r_i387 */ |
| 24938 | case 635: /* *jccxf_i387 */ |
| 24939 | case 634: /* *jccxf_0_r_i387 */ |
| 24940 | case 633: /* *jccdf_0_r_i387 */ |
| 24941 | case 632: /* *jccsf_0_r_i387 */ |
| 24942 | case 631: /* *jccxf_0_i387 */ |
| 24943 | case 630: /* *jccdf_0_i387 */ |
| 24944 | case 629: /* *jccsf_0_i387 */ |
| 24945 | case 622: /* *setcc_si_1_movzbl */ |
| 24946 | case 621: /* *setcc_si_1_and */ |
| 24947 | case 620: /* *setcc_di_1 */ |
| 24948 | case 619: /* *jcc_btdi_mask */ |
| 24949 | case 618: /* *jcc_btsi_mask */ |
| 24950 | case 617: /* *jcc_btdi_1 */ |
| 24951 | case 616: /* *jcc_btsi_1 */ |
| 24952 | case 615: /* *jcc_btdi */ |
| 24953 | case 614: /* *jcc_btsi */ |
| 24954 | case 593: /* ix86_rotrti3_doubleword */ |
| 24955 | case 592: /* ix86_rotrdi3_doubleword */ |
| 24956 | case 591: /* ix86_rotlti3_doubleword */ |
| 24957 | case 590: /* ix86_rotldi3_doubleword */ |
| 24958 | case 589: /* *rotrdi3_mask */ |
| 24959 | case 588: /* *rotldi3_mask */ |
| 24960 | case 587: /* *rotrsi3_mask */ |
| 24961 | case 586: /* *rotlsi3_mask */ |
| 24962 | case 544: /* *ashrti3_doubleword */ |
| 24963 | case 543: /* *lshrti3_doubleword */ |
| 24964 | case 542: /* *ashrdi3_doubleword */ |
| 24965 | case 541: /* *lshrdi3_doubleword */ |
| 24966 | case 540: /* *ashrdi3_mask */ |
| 24967 | case 539: /* *lshrdi3_mask */ |
| 24968 | case 538: /* *ashrsi3_mask */ |
| 24969 | case 537: /* *lshrsi3_mask */ |
| 24970 | case 518: /* *ashldi3_mask */ |
| 24971 | case 517: /* *ashlsi3_mask */ |
| 24972 | case 514: /* *ashlti3_doubleword */ |
| 24973 | case 513: /* *ashldi3_doubleword */ |
| 24974 | case 502: /* *one_cmpldi2_doubleword */ |
| 24975 | case 501: /* copysigntf3_var */ |
| 24976 | case 500: /* copysigndf3_var */ |
| 24977 | case 499: /* copysignsf3_var */ |
| 24978 | case 498: /* copysigntf3_const */ |
| 24979 | case 497: /* copysigndf3_const */ |
| 24980 | case 496: /* copysignsf3_const */ |
| 24981 | case 483: /* *absnegtf2_sse */ |
| 24982 | case 482: /* *absnegxf2_i387 */ |
| 24983 | case 481: /* *absnegdf2 */ |
| 24984 | case 480: /* *absnegsf2 */ |
| 24985 | case 465: /* *negti2_doubleword */ |
| 24986 | case 464: /* *negdi2_doubleword */ |
| 24987 | case 422: /* *xordi3_doubleword */ |
| 24988 | case 421: /* *iordi3_doubleword */ |
| 24989 | case 414: /* *andndi3_doubleword */ |
| 24990 | case 397: /* *anddi3_doubleword */ |
| 24991 | case 396: /* *testqi_ext_3 */ |
| 24992 | case 395: /* *testqi_ext_3 */ |
| 24993 | case 394: /* *testqi_ext_3 */ |
| 24994 | case 382: /* *udivmoddi4_pow2 */ |
| 24995 | case 381: /* *udivmodsi4_pow2 */ |
| 24996 | case 380: /* *udivmoddi4 */ |
| 24997 | case 379: /* *udivmodsi4 */ |
| 24998 | case 378: /* *udivmodhi4 */ |
| 24999 | case 377: /* udivmoddi4_1 */ |
| 25000 | case 376: /* udivmodsi4_1 */ |
| 25001 | case 371: /* *divmoddi4 */ |
| 25002 | case 370: /* *divmodsi4 */ |
| 25003 | case 369: /* *divmodhi4 */ |
| 25004 | case 368: /* divmoddi4_1 */ |
| 25005 | case 367: /* divmodsi4_1 */ |
| 25006 | case 270: /* *subti3_doubleword */ |
| 25007 | case 269: /* *subdi3_doubleword */ |
| 25008 | case 216: /* *addti3_doubleword */ |
| 25009 | case 215: /* *adddi3_doubleword */ |
| 25010 | case 212: /* *floatunssixf2_i387_with_xmm */ |
| 25011 | case 211: /* *floatunssidf2_i387_with_xmm */ |
| 25012 | case 210: /* *floatunssisf2_i387_with_xmm */ |
| 25013 | case 209: /* floatdixf2_i387_with_xmm */ |
| 25014 | case 208: /* floatdidf2_i387_with_xmm */ |
| 25015 | case 207: /* floatdisf2_i387_with_xmm */ |
| 25016 | case 193: /* x86_fldcw_1 */ |
| 25017 | case 192: /* x86_fnstcw_1 */ |
| 25018 | case 169: /* *fixuns_truncdf_1 */ |
| 25019 | case 168: /* *fixuns_truncsf_1 */ |
| 25020 | case 146: /* extendsidi2_1 */ |
| 25021 | case 144: /* *zextsi_doubleword */ |
| 25022 | case 143: /* *zexthi_doubleword */ |
| 25023 | case 142: /* *zextqi_doubleword */ |
| 25024 | case 141: /* *zexthi_doubleword_and */ |
| 25025 | case 140: /* *zextqi_doubleword_and */ |
| 25026 | case 121: /* *pushdf */ |
| 25027 | case 120: /* *pushxf */ |
| 25028 | case 119: /* *pushxf_rounded */ |
| 25029 | case 118: /* *pushxf_rounded */ |
| 25030 | case 117: /* *pushtf */ |
| 25031 | case 56: /* *pushti2 */ |
| 25032 | case 55: /* *pushdi2 */ |
| 25033 | case 48: /* x86_sahf_1 */ |
| 25034 | case 47: /* x86_fnstsw_1 */ |
| 25035 | case 46: /* *cmpxf_si_cc_i387 */ |
| 25036 | case 45: /* *cmpdf_si_cc_i387 */ |
| 25037 | case 44: /* *cmpsf_si_cc_i387 */ |
| 25038 | case 43: /* *cmpxf_hi_cc_i387 */ |
| 25039 | case 42: /* *cmpdf_hi_cc_i387 */ |
| 25040 | case 41: /* *cmpsf_hi_cc_i387 */ |
| 25041 | case 40: /* *cmpxf_si_i387 */ |
| 25042 | case 39: /* *cmpdf_si_i387 */ |
| 25043 | case 38: /* *cmpsf_si_i387 */ |
| 25044 | case 37: /* *cmpxf_hi_i387 */ |
| 25045 | case 36: /* *cmpdf_hi_i387 */ |
| 25046 | case 35: /* *cmpsf_hi_i387 */ |
| 25047 | case 34: /* *cmpuxf_cc_i387 */ |
| 25048 | case 33: /* *cmpudf_cc_i387 */ |
| 25049 | case 32: /* *cmpusf_cc_i387 */ |
| 25050 | case 31: /* *cmpuxf_i387 */ |
| 25051 | case 30: /* *cmpudf_i387 */ |
| 25052 | case 29: /* *cmpusf_i387 */ |
| 25053 | case 28: /* *cmpdf_cc_i387 */ |
| 25054 | case 27: /* *cmpsf_cc_i387 */ |
| 25055 | case 26: /* *cmpdf_i387 */ |
| 25056 | case 25: /* *cmpsf_i387 */ |
| 25057 | case 24: /* *cmpxf_cc_i387 */ |
| 25058 | case 23: /* *cmpxf_i387 */ |
| 25059 | case 22: /* *cmpxf_0_cc_i387 */ |
| 25060 | case 21: /* *cmpdf_0_cc_i387 */ |
| 25061 | case 20: /* *cmpsf_0_cc_i387 */ |
| 25062 | case 19: /* *cmpxf_0_i387 */ |
| 25063 | case 18: /* *cmpdf_0_i387 */ |
| 25064 | case 17: /* *cmpsf_0_i387 */ |
| 25065 | return 6; |
| 25066 | |
| 25067 | case 1178: /* mmx_gtv2si3 */ |
| 25068 | case 1177: /* mmx_gtv4hi3 */ |
| 25069 | case 1176: /* mmx_gtv8qi3 */ |
| 25070 | case 1175: /* *mmx_eqv2si3 */ |
| 25071 | case 1174: /* *mmx_eqv4hi3 */ |
| 25072 | case 1173: /* *mmx_eqv8qi3 */ |
| 25073 | case 1129: /* mmx_gev2sf3 */ |
| 25074 | case 1128: /* mmx_gtv2sf3 */ |
| 25075 | case 1127: /* *mmx_eqv2sf3 */ |
| 25076 | case 393: /* *testqi_ext_2 */ |
| 25077 | case 392: /* *testqi_ext_1 */ |
| 25078 | case 391: /* *testsi_1 */ |
| 25079 | case 390: /* *testhi_1 */ |
| 25080 | case 389: /* *testqi_1 */ |
| 25081 | case 388: /* *testqi_1_maybe_si */ |
| 25082 | case 387: /* *testdi_1 */ |
| 25083 | case 153: /* extendqihi2 */ |
| 25084 | case 152: /* *extendqisi2_zext */ |
| 25085 | case 151: /* extendqisi2 */ |
| 25086 | case 150: /* *extendhisi2_zext */ |
| 25087 | case 149: /* extendhisi2 */ |
| 25088 | case 148: /* extendhidi2 */ |
| 25089 | case 147: /* extendqidi2 */ |
| 25090 | case 145: /* *extendsidi2_rex64 */ |
| 25091 | case 105: /* *extzvdi */ |
| 25092 | case 104: /* *extzvsi */ |
| 25093 | case 103: /* *extzvhi */ |
| 25094 | case 102: /* *extvsi */ |
| 25095 | case 101: /* *extvhi */ |
| 25096 | case 54: /* *cmpiuxf_i387 */ |
| 25097 | case 53: /* *cmpixf_i387 */ |
| 25098 | case 16: /* *cmpqi_ext_4 */ |
| 25099 | case 15: /* *cmpqi_ext_3 */ |
| 25100 | case 14: /* *cmpqi_ext_2 */ |
| 25101 | case 13: /* *cmpqi_ext_1 */ |
| 25102 | case 12: /* *cmpdi_minus_1 */ |
| 25103 | case 11: /* *cmpsi_minus_1 */ |
| 25104 | case 10: /* *cmphi_minus_1 */ |
| 25105 | case 9: /* *cmpqi_minus_1 */ |
| 25106 | case 8: /* *cmpdi_1 */ |
| 25107 | case 7: /* *cmpsi_1 */ |
| 25108 | case 6: /* *cmphi_1 */ |
| 25109 | case 5: /* *cmpqi_1 */ |
| 25110 | case 4: /* *cmpdi_ccno_1 */ |
| 25111 | case 3: /* *cmpsi_ccno_1 */ |
| 25112 | case 2: /* *cmphi_ccno_1 */ |
| 25113 | case 1: /* *cmpqi_ccno_1 */ |
| 25114 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) |
| 25115 | { |
| 25116 | return 1; |
| 25117 | } |
| 25118 | else if (cached_memory == MEMORY_LOAD) |
| 25119 | { |
| 25120 | return 4; |
| 25121 | } |
| 25122 | else |
| 25123 | { |
| 25124 | return 0; |
| 25125 | } |
| 25126 | |
| 25127 | case -1: |
| 25128 | if (GET_CODE (PATTERN (insn)) != ASM_INPUT |
| 25129 | && asm_noperands (PATTERN (insn)) < 0) |
| 25130 | fatal_insn_not_found (insn); |
| 25131 | /* FALLTHRU */ |
| 25132 | case 49: /* *cmpisf */ |
| 25133 | case 50: /* *cmpidf */ |
| 25134 | case 51: /* *cmpiusf */ |
| 25135 | case 52: /* *cmpiudf */ |
| 25136 | case 78: /* *movxi_internal_avx512f */ |
| 25137 | case 79: /* *movoi_internal_avx */ |
| 25138 | case 80: /* *movti_internal */ |
| 25139 | case 81: /* *movdi_internal */ |
| 25140 | case 82: /* *movsi_internal */ |
| 25141 | case 83: /* *movhi_internal */ |
| 25142 | case 84: /* *movqi_internal */ |
| 25143 | case 107: /* *extzvqi */ |
| 25144 | case 124: /* *movtf_internal */ |
| 25145 | case 125: /* *movxf_internal */ |
| 25146 | case 126: /* *movdf_internal */ |
| 25147 | case 127: /* *movsf_internal */ |
| 25148 | case 131: /* *zero_extendsidi2 */ |
| 25149 | case 154: /* *extendsfdf2 */ |
| 25150 | case 155: /* *extendsfxf2_i387 */ |
| 25151 | case 156: /* *extenddfxf2_i387 */ |
| 25152 | case 217: /* *addsi_1 */ |
| 25153 | case 218: /* *adddi_1 */ |
| 25154 | case 219: /* addsi_1_zext */ |
| 25155 | case 220: /* *addhi_1 */ |
| 25156 | case 221: /* *addqi_1 */ |
| 25157 | case 222: /* *addqi_1_slp */ |
| 25158 | case 223: /* *addqi_2 */ |
| 25159 | case 224: /* *addhi_2 */ |
| 25160 | case 225: /* *addsi_2 */ |
| 25161 | case 226: /* *adddi_2 */ |
| 25162 | case 227: /* *addsi_2_zext */ |
| 25163 | case 228: /* *addqi_3 */ |
| 25164 | case 229: /* *addhi_3 */ |
| 25165 | case 230: /* *addsi_3 */ |
| 25166 | case 231: /* *adddi_3 */ |
| 25167 | case 232: /* *addsi_3_zext */ |
| 25168 | case 233: /* *adddi_4 */ |
| 25169 | case 234: /* *addqi_4 */ |
| 25170 | case 235: /* *addhi_4 */ |
| 25171 | case 236: /* *addsi_4 */ |
| 25172 | case 237: /* *addqi_5 */ |
| 25173 | case 238: /* *addhi_5 */ |
| 25174 | case 239: /* *addsi_5 */ |
| 25175 | case 240: /* *adddi_5 */ |
| 25176 | case 241: /* addqi_ext_1 */ |
| 25177 | case 242: /* *addqi_ext_2 */ |
| 25178 | case 243: /* *addvqi4 */ |
| 25179 | case 244: /* *addvhi4 */ |
| 25180 | case 245: /* *addvsi4 */ |
| 25181 | case 246: /* *addvdi4 */ |
| 25182 | case 247: /* *addvqi4_1 */ |
| 25183 | case 248: /* *addvhi4_1 */ |
| 25184 | case 249: /* *addvsi4_1 */ |
| 25185 | case 250: /* *addvdi4_1 */ |
| 25186 | case 271: /* *subqi_1 */ |
| 25187 | case 272: /* *subhi_1 */ |
| 25188 | case 273: /* *subsi_1 */ |
| 25189 | case 274: /* *subdi_1 */ |
| 25190 | case 275: /* *subsi_1_zext */ |
| 25191 | case 277: /* *subqi_2 */ |
| 25192 | case 278: /* *subhi_2 */ |
| 25193 | case 279: /* *subsi_2 */ |
| 25194 | case 280: /* *subdi_2 */ |
| 25195 | case 281: /* *subsi_2_zext */ |
| 25196 | case 282: /* *subvqi4 */ |
| 25197 | case 283: /* *subvhi4 */ |
| 25198 | case 284: /* *subvsi4 */ |
| 25199 | case 285: /* *subvdi4 */ |
| 25200 | case 286: /* *subvqi4_1 */ |
| 25201 | case 287: /* *subvhi4_1 */ |
| 25202 | case 288: /* *subvsi4_1 */ |
| 25203 | case 289: /* *subvdi4_1 */ |
| 25204 | case 290: /* *subqi_3 */ |
| 25205 | case 291: /* *subhi_3 */ |
| 25206 | case 292: /* *subsi_3 */ |
| 25207 | case 293: /* *subdi_3 */ |
| 25208 | case 294: /* *subsi_3_zext */ |
| 25209 | case 295: /* addqi3_carry */ |
| 25210 | case 296: /* addhi3_carry */ |
| 25211 | case 297: /* addsi3_carry */ |
| 25212 | case 298: /* adddi3_carry */ |
| 25213 | case 299: /* *addqi3_carry_0 */ |
| 25214 | case 300: /* *addhi3_carry_0 */ |
| 25215 | case 301: /* *addsi3_carry_0 */ |
| 25216 | case 302: /* *adddi3_carry_0 */ |
| 25217 | case 303: /* *addsi3_carry_zext */ |
| 25218 | case 304: /* *addsi3_carry_zext_0 */ |
| 25219 | case 305: /* addcarrysi */ |
| 25220 | case 306: /* addcarrydi */ |
| 25221 | case 307: /* subqi3_carry */ |
| 25222 | case 308: /* subhi3_carry */ |
| 25223 | case 309: /* subsi3_carry */ |
| 25224 | case 310: /* subdi3_carry */ |
| 25225 | case 311: /* *subqi3_carry_0 */ |
| 25226 | case 312: /* *subhi3_carry_0 */ |
| 25227 | case 313: /* *subsi3_carry_0 */ |
| 25228 | case 314: /* *subdi3_carry_0 */ |
| 25229 | case 315: /* *subsi3_carry_zext */ |
| 25230 | case 316: /* *subsi3_carry_zext_0 */ |
| 25231 | case 317: /* subborrowsi */ |
| 25232 | case 318: /* subborrowdi */ |
| 25233 | case 319: /* *addqi3_cconly_overflow_1 */ |
| 25234 | case 320: /* *addhi3_cconly_overflow_1 */ |
| 25235 | case 321: /* *addsi3_cconly_overflow_1 */ |
| 25236 | case 322: /* *adddi3_cconly_overflow_1 */ |
| 25237 | case 323: /* *addqi3_cc_overflow_1 */ |
| 25238 | case 324: /* *addhi3_cc_overflow_1 */ |
| 25239 | case 325: /* *addsi3_cc_overflow_1 */ |
| 25240 | case 326: /* *adddi3_cc_overflow_1 */ |
| 25241 | case 327: /* *addsi3_zext_cc_overflow_1 */ |
| 25242 | case 328: /* *addqi3_cconly_overflow_2 */ |
| 25243 | case 329: /* *addhi3_cconly_overflow_2 */ |
| 25244 | case 330: /* *addsi3_cconly_overflow_2 */ |
| 25245 | case 331: /* *adddi3_cconly_overflow_2 */ |
| 25246 | case 332: /* *addqi3_cc_overflow_2 */ |
| 25247 | case 333: /* *addhi3_cc_overflow_2 */ |
| 25248 | case 334: /* *addsi3_cc_overflow_2 */ |
| 25249 | case 335: /* *adddi3_cc_overflow_2 */ |
| 25250 | case 336: /* *addsi3_zext_cc_overflow_2 */ |
| 25251 | case 398: /* *anddi_1 */ |
| 25252 | case 399: /* *andsi_1_zext */ |
| 25253 | case 400: /* *andhi_1 */ |
| 25254 | case 401: /* *andsi_1 */ |
| 25255 | case 402: /* *andqi_1 */ |
| 25256 | case 404: /* *anddi_2 */ |
| 25257 | case 405: /* *andsi_2_zext */ |
| 25258 | case 406: /* *andqi_2_maybe_si */ |
| 25259 | case 407: /* *andqi_2 */ |
| 25260 | case 408: /* *andhi_2 */ |
| 25261 | case 409: /* *andsi_2 */ |
| 25262 | case 411: /* andqi_ext_1 */ |
| 25263 | case 412: /* *andqi_ext_1_cc */ |
| 25264 | case 413: /* *andqi_ext_2 */ |
| 25265 | case 423: /* *iorhi_1 */ |
| 25266 | case 424: /* *xorhi_1 */ |
| 25267 | case 425: /* *iorsi_1 */ |
| 25268 | case 426: /* *xorsi_1 */ |
| 25269 | case 427: /* *iordi_1 */ |
| 25270 | case 428: /* *xordi_1 */ |
| 25271 | case 429: /* *iorsi_1_zext */ |
| 25272 | case 430: /* *xorsi_1_zext */ |
| 25273 | case 431: /* *iorsi_1_zext_imm */ |
| 25274 | case 432: /* *xorsi_1_zext_imm */ |
| 25275 | case 433: /* *iorqi_1 */ |
| 25276 | case 434: /* *xorqi_1 */ |
| 25277 | case 437: /* *iorqi_2 */ |
| 25278 | case 438: /* *xorqi_2 */ |
| 25279 | case 439: /* *iorhi_2 */ |
| 25280 | case 440: /* *xorhi_2 */ |
| 25281 | case 441: /* *iorsi_2 */ |
| 25282 | case 442: /* *xorsi_2 */ |
| 25283 | case 443: /* *iordi_2 */ |
| 25284 | case 444: /* *xordi_2 */ |
| 25285 | case 445: /* *iorsi_2_zext */ |
| 25286 | case 446: /* *xorsi_2_zext */ |
| 25287 | case 447: /* *iorsi_2_zext_imm */ |
| 25288 | case 448: /* *xorsi_2_zext_imm */ |
| 25289 | case 451: /* *iorqi_3 */ |
| 25290 | case 452: /* *xorqi_3 */ |
| 25291 | case 453: /* *iorhi_3 */ |
| 25292 | case 454: /* *xorhi_3 */ |
| 25293 | case 455: /* *iorsi_3 */ |
| 25294 | case 456: /* *xorsi_3 */ |
| 25295 | case 457: /* *iordi_3 */ |
| 25296 | case 458: /* *xordi_3 */ |
| 25297 | case 459: /* *iorqi_ext_1 */ |
| 25298 | case 460: /* *xorqi_ext_1 */ |
| 25299 | case 461: /* *iorqi_ext_2 */ |
| 25300 | case 462: /* *xorqi_ext_2 */ |
| 25301 | case 463: /* *xorqi_ext_1_cc */ |
| 25302 | case 521: /* *ashlsi3_1 */ |
| 25303 | case 522: /* *ashldi3_1 */ |
| 25304 | case 524: /* *ashlsi3_1_zext */ |
| 25305 | case 525: /* *ashlhi3_1 */ |
| 25306 | case 526: /* *ashlqi3_1 */ |
| 25307 | case 527: /* *ashlqi3_1_slp */ |
| 25308 | case 528: /* *ashlqi3_cmp */ |
| 25309 | case 529: /* *ashlhi3_cmp */ |
| 25310 | case 530: /* *ashlsi3_cmp */ |
| 25311 | case 531: /* *ashldi3_cmp */ |
| 25312 | case 532: /* *ashlsi3_cmp_zext */ |
| 25313 | case 533: /* *ashlqi3_cconly */ |
| 25314 | case 534: /* *ashlhi3_cconly */ |
| 25315 | case 535: /* *ashlsi3_cconly */ |
| 25316 | case 536: /* *ashldi3_cconly */ |
| 25317 | case 547: /* ashrdi3_cvt */ |
| 25318 | case 548: /* *ashrsi3_cvt_zext */ |
| 25319 | case 549: /* ashrsi3_cvt */ |
| 25320 | case 780: /* *bswapsi2_movbe */ |
| 25321 | case 781: /* *bswapdi2_movbe */ |
| 25322 | case 812: /* *fop_sf_comm */ |
| 25323 | case 813: /* *fop_df_comm */ |
| 25324 | case 815: /* *fop_sf_1 */ |
| 25325 | case 816: /* *fop_df_1 */ |
| 25326 | case 817: /* *fop_sf_2_i387 */ |
| 25327 | case 818: /* *fop_df_2_i387 */ |
| 25328 | case 819: /* *fop_sf_2_i387 */ |
| 25329 | case 820: /* *fop_df_2_i387 */ |
| 25330 | case 821: /* *fop_sf_3_i387 */ |
| 25331 | case 822: /* *fop_df_3_i387 */ |
| 25332 | case 823: /* *fop_sf_3_i387 */ |
| 25333 | case 824: /* *fop_df_3_i387 */ |
| 25334 | case 825: /* *fop_df_4_i387 */ |
| 25335 | case 826: /* *fop_df_5_i387 */ |
| 25336 | case 827: /* *fop_df_6_i387 */ |
| 25337 | case 828: /* *fop_xf_comm_i387 */ |
| 25338 | case 829: /* *fop_xf_1_i387 */ |
| 25339 | case 830: /* *fop_xf_2_i387 */ |
| 25340 | case 831: /* *fop_xf_2_i387 */ |
| 25341 | case 832: /* *fop_xf_3_i387 */ |
| 25342 | case 833: /* *fop_xf_3_i387 */ |
| 25343 | case 834: /* *fop_xf_4_i387 */ |
| 25344 | case 835: /* *fop_xf_4_i387 */ |
| 25345 | case 836: /* *fop_xf_5_i387 */ |
| 25346 | case 837: /* *fop_xf_5_i387 */ |
| 25347 | case 838: /* *fop_xf_6_i387 */ |
| 25348 | case 839: /* *fop_xf_6_i387 */ |
| 25349 | case 993: /* pro_epilogue_adjust_stack_si_add */ |
| 25350 | case 994: /* pro_epilogue_adjust_stack_di_add */ |
| 25351 | case 995: /* pro_epilogue_adjust_stack_si_sub */ |
| 25352 | case 996: /* pro_epilogue_adjust_stack_di_sub */ |
| 25353 | case 1106: /* *movv8qi_internal */ |
| 25354 | case 1107: /* *movv4hi_internal */ |
| 25355 | case 1108: /* *movv2si_internal */ |
| 25356 | case 1109: /* *movv1di_internal */ |
| 25357 | case 1110: /* *movv2sf_internal */ |
| 25358 | case 1119: /* mmx_rcpv2sf2 */ |
| 25359 | case 1120: /* mmx_rcpit1v2sf3 */ |
| 25360 | case 1121: /* mmx_rcpit2v2sf3 */ |
| 25361 | case 1122: /* mmx_rsqrtv2sf2 */ |
| 25362 | case 1123: /* mmx_rsqit1v2sf3 */ |
| 25363 | case 1138: /* *vec_extractv2sf_1 */ |
| 25364 | case 1208: /* *vec_extractv2si_1 */ |
| 25365 | case 1218: /* movv64qi_internal */ |
| 25366 | case 1219: /* movv32qi_internal */ |
| 25367 | case 1220: /* movv16qi_internal */ |
| 25368 | case 1221: /* movv32hi_internal */ |
| 25369 | case 1222: /* movv16hi_internal */ |
| 25370 | case 1223: /* movv8hi_internal */ |
| 25371 | case 1224: /* movv16si_internal */ |
| 25372 | case 1225: /* movv8si_internal */ |
| 25373 | case 1226: /* movv4si_internal */ |
| 25374 | case 1227: /* movv8di_internal */ |
| 25375 | case 1228: /* movv4di_internal */ |
| 25376 | case 1229: /* movv2di_internal */ |
| 25377 | case 1230: /* movv4ti_internal */ |
| 25378 | case 1231: /* movv2ti_internal */ |
| 25379 | case 1232: /* movv1ti_internal */ |
| 25380 | case 1233: /* movv16sf_internal */ |
| 25381 | case 1234: /* movv8sf_internal */ |
| 25382 | case 1235: /* movv4sf_internal */ |
| 25383 | case 1236: /* movv8df_internal */ |
| 25384 | case 1237: /* movv4df_internal */ |
| 25385 | case 1238: /* movv2df_internal */ |
| 25386 | case 2452: /* sse_loadlps */ |
| 25387 | case 2459: /* *vec_concatv2sf_sse4_1 */ |
| 25388 | case 2460: /* *vec_concatv2sf_sse */ |
| 25389 | case 2462: /* vec_setv4si_0 */ |
| 25390 | case 2463: /* vec_setv4sf_0 */ |
| 25391 | case 2536: /* *vec_interleave_highv2df */ |
| 25392 | case 2542: /* *vec_interleave_lowv2df */ |
| 25393 | case 2726: /* sse2_storehpd */ |
| 25394 | case 2728: /* sse2_storelpd */ |
| 25395 | case 2730: /* sse2_loadhpd */ |
| 25396 | case 2731: /* sse2_loadlpd */ |
| 25397 | case 2732: /* sse2_movsd */ |
| 25398 | case 2735: /* vec_concatv2df */ |
| 25399 | case 3080: /* *ashrv16hi3 */ |
| 25400 | case 3081: /* ashrv16hi3_mask */ |
| 25401 | case 3082: /* *ashrv8hi3 */ |
| 25402 | case 3083: /* ashrv8hi3_mask */ |
| 25403 | case 3084: /* *ashrv8si3 */ |
| 25404 | case 3085: /* ashrv8si3_mask */ |
| 25405 | case 3086: /* *ashrv4si3 */ |
| 25406 | case 3087: /* ashrv4si3_mask */ |
| 25407 | case 3088: /* ashrv16hi3 */ |
| 25408 | case 3089: /* ashrv8hi3 */ |
| 25409 | case 3090: /* ashrv8si3 */ |
| 25410 | case 3091: /* ashrv4si3 */ |
| 25411 | case 3092: /* *ashrv2di3 */ |
| 25412 | case 3093: /* ashrv2di3_mask */ |
| 25413 | case 3094: /* ashrv32hi3 */ |
| 25414 | case 3095: /* ashrv32hi3_mask */ |
| 25415 | case 3096: /* ashrv4di3 */ |
| 25416 | case 3097: /* ashrv4di3_mask */ |
| 25417 | case 3098: /* ashrv16si3 */ |
| 25418 | case 3099: /* ashrv16si3_mask */ |
| 25419 | case 3100: /* ashrv8di3 */ |
| 25420 | case 3101: /* ashrv8di3_mask */ |
| 25421 | case 3102: /* ashlv32hi3 */ |
| 25422 | case 3103: /* ashlv32hi3_mask */ |
| 25423 | case 3104: /* lshrv32hi3 */ |
| 25424 | case 3105: /* lshrv32hi3_mask */ |
| 25425 | case 3106: /* ashlv16hi3 */ |
| 25426 | case 3107: /* ashlv16hi3_mask */ |
| 25427 | case 3108: /* lshrv16hi3 */ |
| 25428 | case 3109: /* lshrv16hi3_mask */ |
| 25429 | case 3110: /* ashlv8hi3 */ |
| 25430 | case 3111: /* ashlv8hi3_mask */ |
| 25431 | case 3112: /* lshrv8hi3 */ |
| 25432 | case 3113: /* lshrv8hi3_mask */ |
| 25433 | case 3114: /* ashlv8si3 */ |
| 25434 | case 3115: /* ashlv8si3_mask */ |
| 25435 | case 3116: /* lshrv8si3 */ |
| 25436 | case 3117: /* lshrv8si3_mask */ |
| 25437 | case 3118: /* ashlv4si3 */ |
| 25438 | case 3119: /* ashlv4si3_mask */ |
| 25439 | case 3120: /* lshrv4si3 */ |
| 25440 | case 3121: /* lshrv4si3_mask */ |
| 25441 | case 3122: /* ashlv4di3 */ |
| 25442 | case 3123: /* ashlv4di3_mask */ |
| 25443 | case 3124: /* lshrv4di3 */ |
| 25444 | case 3125: /* lshrv4di3_mask */ |
| 25445 | case 3126: /* ashlv2di3 */ |
| 25446 | case 3127: /* ashlv2di3_mask */ |
| 25447 | case 3128: /* lshrv2di3 */ |
| 25448 | case 3129: /* lshrv2di3_mask */ |
| 25449 | case 3130: /* ashlv16si3 */ |
| 25450 | case 3131: /* ashlv16si3_mask */ |
| 25451 | case 3132: /* lshrv16si3 */ |
| 25452 | case 3133: /* lshrv16si3_mask */ |
| 25453 | case 3134: /* ashlv8di3 */ |
| 25454 | case 3135: /* ashlv8di3_mask */ |
| 25455 | case 3136: /* lshrv8di3 */ |
| 25456 | case 3137: /* lshrv8di3_mask */ |
| 25457 | case 3634: /* *vec_extractv4si */ |
| 25458 | case 3638: /* *vec_extractv2di_1 */ |
| 25459 | case 3639: /* *vec_concatv2si_sse4_1 */ |
| 25460 | case 3640: /* *vec_concatv2si */ |
| 25461 | case 3641: /* *vec_concatv4si */ |
| 25462 | case 3642: /* vec_concatv2di */ |
| 25463 | case 4195: /* vec_dupv4sf */ |
| 25464 | case 4196: /* *vec_dupv4si */ |
| 25465 | case 4197: /* *vec_dupv2di */ |
| 25466 | case 4212: /* avx_vbroadcastf128_v32qi */ |
| 25467 | case 4213: /* avx_vbroadcastf128_v16hi */ |
| 25468 | case 4214: /* avx_vbroadcastf128_v8si */ |
| 25469 | case 4215: /* avx_vbroadcastf128_v4di */ |
| 25470 | case 4216: /* avx_vbroadcastf128_v8sf */ |
| 25471 | case 4217: /* avx_vbroadcastf128_v4df */ |
| 25472 | case 4250: /* *avx_vperm_broadcast_v4sf */ |
| 25473 | case 4490: /* avx_vec_concatv32qi */ |
| 25474 | case 4491: /* avx_vec_concatv16hi */ |
| 25475 | case 4492: /* avx_vec_concatv8si */ |
| 25476 | case 4493: /* avx_vec_concatv4di */ |
| 25477 | case 4494: /* avx_vec_concatv8sf */ |
| 25478 | case 4495: /* avx_vec_concatv4df */ |
| 25479 | case 4496: /* avx_vec_concatv64qi */ |
| 25480 | case 4497: /* avx_vec_concatv32hi */ |
| 25481 | case 4498: /* avx_vec_concatv16si */ |
| 25482 | case 4499: /* avx_vec_concatv8di */ |
| 25483 | case 4500: /* avx_vec_concatv16sf */ |
| 25484 | case 4501: /* avx_vec_concatv8df */ |
| 25485 | if (((cached_type = get_attr_type (insn)) == TYPE_OTHER) || (cached_type == TYPE_MULTI) || (cached_type == TYPE_STR)) |
| 25486 | { |
| 25487 | return 6; |
| 25488 | } |
| 25489 | else if ((cached_type == TYPE_CALL) || (cached_type == TYPE_CALLV)) |
| 25490 | { |
| 25491 | return 1; |
| 25492 | } |
| 25493 | else if (((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) && ((cached_type == TYPE_IMOV) || (cached_type == TYPE_IMOVX))) |
| 25494 | { |
| 25495 | return 1; |
| 25496 | } |
| 25497 | else if ((cached_memory == MEMORY_LOAD) && ((cached_type == TYPE_IMOV) || (cached_type == TYPE_IMOVX))) |
| 25498 | { |
| 25499 | return 4; |
| 25500 | } |
| 25501 | else if ((cached_memory == MEMORY_STORE) && (cached_type == TYPE_IMOV)) |
| 25502 | { |
| 25503 | return 1; |
| 25504 | } |
| 25505 | else if ((cached_memory == MEMORY_NONE) && (cached_type == TYPE_ICMOV)) |
| 25506 | { |
| 25507 | return 2; |
| 25508 | } |
| 25509 | else if ((cached_memory == MEMORY_LOAD) && (cached_type == TYPE_ICMOV)) |
| 25510 | { |
| 25511 | return 2; |
| 25512 | } |
| 25513 | else if ((cached_memory == MEMORY_STORE) && (cached_type == TYPE_PUSH)) |
| 25514 | { |
| 25515 | return 1; |
| 25516 | } |
| 25517 | else if ((cached_memory == MEMORY_BOTH) && (cached_type == TYPE_PUSH)) |
| 25518 | { |
| 25519 | return 1; |
| 25520 | } |
| 25521 | else if ((cached_memory == MEMORY_NONE) && (cached_type == TYPE_LEA)) |
| 25522 | { |
| 25523 | return 1; |
| 25524 | } |
| 25525 | else if ((cached_memory == MEMORY_NONE) && ((cached_type == TYPE_ISHIFT) || (cached_type == TYPE_ISHIFT1) || (cached_type == TYPE_ROTATE) || (cached_type == TYPE_ROTATE1))) |
| 25526 | { |
| 25527 | return 1; |
| 25528 | } |
| 25529 | else if ((! (cached_memory == MEMORY_NONE)) && ((cached_type == TYPE_ISHIFT) || (cached_type == TYPE_ISHIFT1) || (cached_type == TYPE_ROTATE) || (cached_type == TYPE_ROTATE1))) |
| 25530 | { |
| 25531 | return 4; |
| 25532 | } |
| 25533 | else if ((cached_memory == MEMORY_NONE) && (cached_type == TYPE_IBR)) |
| 25534 | { |
| 25535 | return 1; |
| 25536 | } |
| 25537 | else if ((! (cached_memory == MEMORY_NONE)) && (cached_type == TYPE_IBR)) |
| 25538 | { |
| 25539 | return 6; |
| 25540 | } |
| 25541 | else if (cached_type == TYPE_LEAVE) |
| 25542 | { |
| 25543 | return 4; |
| 25544 | } |
| 25545 | else if ((cached_memory == MEMORY_NONE) && (((cached_mode = get_attr_mode (insn)) == MODE_HI) || (cached_mode == MODE_SI)) && (cached_type == TYPE_IMUL)) |
| 25546 | { |
| 25547 | return 3; |
| 25548 | } |
| 25549 | else if ((! (cached_memory == MEMORY_NONE)) && (((cached_mode = get_attr_mode (insn)) == MODE_HI) || (cached_mode == MODE_SI)) && (cached_type == TYPE_IMUL)) |
| 25550 | { |
| 25551 | return 3; |
| 25552 | } |
| 25553 | else if ((cached_memory == MEMORY_NONE) && ((cached_mode = get_attr_mode (insn)) == MODE_DI) && (cached_type == TYPE_IMUL)) |
| 25554 | { |
| 25555 | return 5; |
| 25556 | } |
| 25557 | else if ((! (cached_memory == MEMORY_NONE)) && ((cached_mode = get_attr_mode (insn)) == MODE_DI) && (cached_type == TYPE_IMUL)) |
| 25558 | { |
| 25559 | return 5; |
| 25560 | } |
| 25561 | else if ((cached_memory == MEMORY_NONE) && ((cached_mode = get_attr_mode (insn)) == MODE_QI) && (cached_type == TYPE_IDIV)) |
| 25562 | { |
| 25563 | return 19 /* 0x13 */; |
| 25564 | } |
| 25565 | else if ((cached_memory == MEMORY_LOAD) && ((cached_mode = get_attr_mode (insn)) == MODE_QI) && (cached_type == TYPE_IDIV)) |
| 25566 | { |
| 25567 | return 19 /* 0x13 */; |
| 25568 | } |
| 25569 | else if ((cached_memory == MEMORY_NONE) && ((cached_mode = get_attr_mode (insn)) == MODE_HI) && (cached_type == TYPE_IDIV)) |
| 25570 | { |
| 25571 | return 23 /* 0x17 */; |
| 25572 | } |
| 25573 | else if ((cached_memory == MEMORY_LOAD) && ((cached_mode = get_attr_mode (insn)) == MODE_HI) && (cached_type == TYPE_IDIV)) |
| 25574 | { |
| 25575 | return 23 /* 0x17 */; |
| 25576 | } |
| 25577 | else if ((cached_memory == MEMORY_NONE) && ((cached_mode = get_attr_mode (insn)) == MODE_SI) && (cached_type == TYPE_IDIV)) |
| 25578 | { |
| 25579 | return 39 /* 0x27 */; |
| 25580 | } |
| 25581 | else if ((cached_memory == MEMORY_LOAD) && ((cached_mode = get_attr_mode (insn)) == MODE_SI) && (cached_type == TYPE_IDIV)) |
| 25582 | { |
| 25583 | return 39 /* 0x27 */; |
| 25584 | } |
| 25585 | else if (cached_type == TYPE_FXCH) |
| 25586 | { |
| 25587 | return 0; |
| 25588 | } |
| 25589 | else if (((cached_memory == MEMORY_NONE) || (cached_memory == MEMORY_UNKNOWN)) && (cached_type == TYPE_FOP)) |
| 25590 | { |
| 25591 | return 3; |
| 25592 | } |
| 25593 | else if ((cached_memory == MEMORY_LOAD) && (cached_type == TYPE_FOP)) |
| 25594 | { |
| 25595 | return 5; |
| 25596 | } |
| 25597 | else if ((cached_memory == MEMORY_STORE) && (cached_type == TYPE_FOP)) |
| 25598 | { |
| 25599 | return 3; |
| 25600 | } |
| 25601 | else if ((cached_memory == MEMORY_BOTH) && (cached_type == TYPE_FOP)) |
| 25602 | { |
| 25603 | return 5; |
| 25604 | } |
| 25605 | else if (cached_type == TYPE_FSGN) |
| 25606 | { |
| 25607 | return 1; |
| 25608 | } |
| 25609 | else if (cached_type == TYPE_FISTP) |
| 25610 | { |
| 25611 | return 5; |
| 25612 | } |
| 25613 | else if (cached_type == TYPE_FCMOV) |
| 25614 | { |
| 25615 | return 2; |
| 25616 | } |
| 25617 | else if ((cached_memory == MEMORY_NONE) && (cached_type == TYPE_FCMP)) |
| 25618 | { |
| 25619 | return 1; |
| 25620 | } |
| 25621 | else if ((cached_memory == MEMORY_LOAD) && (cached_type == TYPE_FCMP)) |
| 25622 | { |
| 25623 | return 4; |
| 25624 | } |
| 25625 | else if ((cached_memory == MEMORY_NONE) && (cached_type == TYPE_FMOV)) |
| 25626 | { |
| 25627 | return 1; |
| 25628 | } |
| 25629 | else if ((cached_memory == MEMORY_LOAD) && (! ((cached_mode = get_attr_mode (insn)) == MODE_XF)) && (cached_type == TYPE_FMOV)) |
| 25630 | { |
| 25631 | return 1; |
| 25632 | } |
| 25633 | else if ((cached_memory == MEMORY_LOAD) && ((cached_mode = get_attr_mode (insn)) == MODE_XF) && (cached_type == TYPE_FMOV)) |
| 25634 | { |
| 25635 | return 3; |
| 25636 | } |
| 25637 | else if ((cached_memory == MEMORY_STORE) && (! ((cached_mode = get_attr_mode (insn)) == MODE_XF)) && (cached_type == TYPE_FMOV)) |
| 25638 | { |
| 25639 | return 1; |
| 25640 | } |
| 25641 | else if ((cached_memory == MEMORY_STORE) && ((cached_mode = get_attr_mode (insn)) == MODE_XF) && (cached_type == TYPE_FMOV)) |
| 25642 | { |
| 25643 | return 3; |
| 25644 | } |
| 25645 | else if ((cached_memory == MEMORY_NONE) && (cached_type == TYPE_FMUL)) |
| 25646 | { |
| 25647 | return 5; |
| 25648 | } |
| 25649 | else if ((cached_memory == MEMORY_LOAD) && (cached_type == TYPE_FMUL)) |
| 25650 | { |
| 25651 | return 6; |
| 25652 | } |
| 25653 | else if ((cached_memory == MEMORY_NONE) && ((cached_mode = get_attr_mode (insn)) == MODE_SF) && ((cached_type == TYPE_FDIV) || (cached_type == TYPE_FPSPC))) |
| 25654 | { |
| 25655 | return 18 /* 0x12 */; |
| 25656 | } |
| 25657 | else if ((cached_memory == MEMORY_LOAD) && ((cached_mode = get_attr_mode (insn)) == MODE_SF) && ((cached_type == TYPE_FDIV) || (cached_type == TYPE_FPSPC))) |
| 25658 | { |
| 25659 | return 19 /* 0x13 */; |
| 25660 | } |
| 25661 | else if ((cached_memory == MEMORY_NONE) && ((cached_mode = get_attr_mode (insn)) == MODE_DF) && ((cached_type == TYPE_FDIV) || (cached_type == TYPE_FPSPC))) |
| 25662 | { |
| 25663 | return 32 /* 0x20 */; |
| 25664 | } |
| 25665 | else if ((cached_memory == MEMORY_LOAD) && ((cached_mode = get_attr_mode (insn)) == MODE_DF) && ((cached_type == TYPE_FDIV) || (cached_type == TYPE_FPSPC))) |
| 25666 | { |
| 25667 | return 33 /* 0x21 */; |
| 25668 | } |
| 25669 | else if ((cached_memory == MEMORY_NONE) && ((cached_mode = get_attr_mode (insn)) == MODE_XF) && ((cached_type == TYPE_FDIV) || (cached_type == TYPE_FPSPC))) |
| 25670 | { |
| 25671 | return 38 /* 0x26 */; |
| 25672 | } |
| 25673 | else if ((cached_memory == MEMORY_LOAD) && ((cached_mode = get_attr_mode (insn)) == MODE_XF) && ((cached_type == TYPE_FDIV) || (cached_type == TYPE_FPSPC))) |
| 25674 | { |
| 25675 | return 39 /* 0x27 */; |
| 25676 | } |
| 25677 | else if ((cached_memory == MEMORY_NONE) && ((cached_type == TYPE_MMXADD) || (cached_type == TYPE_SSEIADD))) |
| 25678 | { |
| 25679 | return 1; |
| 25680 | } |
| 25681 | else if ((cached_memory == MEMORY_LOAD) && ((cached_type == TYPE_MMXADD) || (cached_type == TYPE_SSEIADD))) |
| 25682 | { |
| 25683 | return 2; |
| 25684 | } |
| 25685 | else if ((cached_memory == MEMORY_NONE) && (cached_type == TYPE_MMXSHFT)) |
| 25686 | { |
| 25687 | return 1; |
| 25688 | } |
| 25689 | else if ((cached_memory == MEMORY_LOAD) && (cached_type == TYPE_MMXSHFT)) |
| 25690 | { |
| 25691 | return 2; |
| 25692 | } |
| 25693 | else if ((cached_memory == MEMORY_NONE) && (cached_type == TYPE_SSEISHFT) && (! ((cached_length_immediate = get_attr_length_immediate (insn)) == 0))) |
| 25694 | { |
| 25695 | return 1; |
| 25696 | } |
| 25697 | else if ((cached_memory == MEMORY_LOAD) && (cached_type == TYPE_SSEISHFT) && (! ((cached_length_immediate = get_attr_length_immediate (insn)) == 0))) |
| 25698 | { |
| 25699 | return 2; |
| 25700 | } |
| 25701 | else if ((cached_memory == MEMORY_NONE) && (cached_type == TYPE_SSEISHFT) && ((cached_length_immediate = get_attr_length_immediate (insn)) == 0)) |
| 25702 | { |
| 25703 | return 2; |
| 25704 | } |
| 25705 | else if ((cached_memory == MEMORY_LOAD) && (cached_type == TYPE_SSEISHFT) && ((cached_length_immediate = get_attr_length_immediate (insn)) == 0)) |
| 25706 | { |
| 25707 | return 3; |
| 25708 | } |
| 25709 | else if ((cached_memory == MEMORY_NONE) && ((cached_type == TYPE_MMXMUL) || (cached_type == TYPE_SSEIMUL))) |
| 25710 | { |
| 25711 | return 3; |
| 25712 | } |
| 25713 | else if ((cached_memory == MEMORY_NONE) && ((cached_type == TYPE_MMXMUL) || (cached_type == TYPE_SSEIMUL))) |
| 25714 | { |
| 25715 | return 3; |
| 25716 | } |
| 25717 | else if (((cached_mode = get_attr_mode (insn)) == MODE_DI) && (cached_type == TYPE_MMXCVT)) |
| 25718 | { |
| 25719 | return 4; |
| 25720 | } |
| 25721 | else if ((cached_memory == MEMORY_UNKNOWN) && (cached_type == TYPE_SSE)) |
| 25722 | { |
| 25723 | return 3; |
| 25724 | } |
| 25725 | else if (((cached_mode == MODE_SF) || (cached_mode == MODE_DF)) && (cached_type == TYPE_SSE)) |
| 25726 | { |
| 25727 | return 3; |
| 25728 | } |
| 25729 | else if ((cached_mode == MODE_V4SF) && (cached_type == TYPE_SSE)) |
| 25730 | { |
| 25731 | return 4; |
| 25732 | } |
| 25733 | else if ((cached_memory == MEMORY_NONE) && ((cached_type == TYPE_SSEADD) || (cached_type == TYPE_SSEADD1) || (cached_type == TYPE_SSECMP) || (cached_type == TYPE_SSECOMI))) |
| 25734 | { |
| 25735 | return 3; |
| 25736 | } |
| 25737 | else if ((cached_memory == MEMORY_LOAD) && ((cached_type == TYPE_SSEADD) || (cached_type == TYPE_SSEADD1) || (cached_type == TYPE_SSECMP) || (cached_type == TYPE_SSECOMI))) |
| 25738 | { |
| 25739 | return 3; |
| 25740 | } |
| 25741 | else if ((cached_memory == MEMORY_NONE) && ((cached_mode == MODE_SF) || (cached_mode == MODE_V4SF)) && (cached_type == TYPE_SSEMUL)) |
| 25742 | { |
| 25743 | return 4; |
| 25744 | } |
| 25745 | else if ((cached_memory == MEMORY_LOAD) && ((cached_mode == MODE_SF) || (cached_mode == MODE_V4SF)) && (cached_type == TYPE_SSEMUL)) |
| 25746 | { |
| 25747 | return 4; |
| 25748 | } |
| 25749 | else if ((cached_memory == MEMORY_NONE) && ((cached_mode == MODE_DF) || (cached_mode == MODE_V2DF)) && (cached_type == TYPE_SSEMUL)) |
| 25750 | { |
| 25751 | return 5; |
| 25752 | } |
| 25753 | else if ((cached_memory == MEMORY_LOAD) && ((cached_mode == MODE_DF) || (cached_mode == MODE_V2DF)) && (cached_type == TYPE_SSEMUL)) |
| 25754 | { |
| 25755 | return 5; |
| 25756 | } |
| 25757 | else if ((cached_memory == MEMORY_NONE) && ((cached_mode == MODE_SF) || (cached_mode == MODE_V4SF)) && (cached_type == TYPE_SSEDIV)) |
| 25758 | { |
| 25759 | return 18 /* 0x12 */; |
| 25760 | } |
| 25761 | else if ((cached_memory == MEMORY_NONE) && ((cached_mode == MODE_SF) || (cached_mode == MODE_V4SF)) && (cached_type == TYPE_SSEDIV)) |
| 25762 | { |
| 25763 | return 18 /* 0x12 */; |
| 25764 | } |
| 25765 | else if ((cached_memory == MEMORY_NONE) && ((cached_mode == MODE_DF) || (cached_mode == MODE_V2DF)) && (cached_type == TYPE_SSEDIV)) |
| 25766 | { |
| 25767 | return 32 /* 0x20 */; |
| 25768 | } |
| 25769 | else if ((cached_memory == MEMORY_NONE) && ((cached_mode == MODE_DF) || (cached_mode == MODE_V2DF)) && (cached_type == TYPE_SSEDIV)) |
| 25770 | { |
| 25771 | return 32 /* 0x20 */; |
| 25772 | } |
| 25773 | else if ((cached_memory == MEMORY_NONE) && (cached_mode == MODE_SF) && (cached_type == TYPE_SSEICVT)) |
| 25774 | { |
| 25775 | return 4; |
| 25776 | } |
| 25777 | else if ((! (cached_memory == MEMORY_NONE)) && (cached_mode == MODE_SF) && (cached_type == TYPE_SSEICVT)) |
| 25778 | { |
| 25779 | return 4; |
| 25780 | } |
| 25781 | else if ((cached_memory == MEMORY_NONE) && (cached_mode == MODE_DF) && (cached_type == TYPE_SSEICVT)) |
| 25782 | { |
| 25783 | return 4; |
| 25784 | } |
| 25785 | else if ((! (cached_memory == MEMORY_NONE)) && (cached_mode == MODE_DF) && (cached_type == TYPE_SSEICVT)) |
| 25786 | { |
| 25787 | return 4; |
| 25788 | } |
| 25789 | else if ((cached_memory == MEMORY_NONE) && (cached_mode == MODE_SI) && (cached_type == TYPE_SSEICVT)) |
| 25790 | { |
| 25791 | return 3; |
| 25792 | } |
| 25793 | else if ((! (cached_memory == MEMORY_NONE)) && (cached_mode == MODE_SI) && (cached_type == TYPE_SSEICVT)) |
| 25794 | { |
| 25795 | return 3; |
| 25796 | } |
| 25797 | else if ((cached_memory == MEMORY_NONE) && (cached_type == TYPE_SSEMOV)) |
| 25798 | { |
| 25799 | return 1; |
| 25800 | } |
| 25801 | else if ((cached_memory == MEMORY_LOAD) && (cached_type == TYPE_SSEMOV)) |
| 25802 | { |
| 25803 | return 2; |
| 25804 | } |
| 25805 | else if ((cached_memory == MEMORY_STORE) && (cached_type == TYPE_SSEMOV)) |
| 25806 | { |
| 25807 | return 1; |
| 25808 | } |
| 25809 | else if (((cached_memory == MEMORY_NONE) || (cached_memory == MEMORY_UNKNOWN)) && ((cached_type == TYPE_ALU) || (cached_type == TYPE_ALU1) || (cached_type == TYPE_NEGNOT) || (cached_type == TYPE_INCDEC) || (cached_type == TYPE_ICMP) || (cached_type == TYPE_TEST) || (cached_type == TYPE_SETCC) || (cached_type == TYPE_SSEISHFT1) || (cached_type == TYPE_MMX) || (cached_type == TYPE_MMXCMP))) |
| 25810 | { |
| 25811 | return 1; |
| 25812 | } |
| 25813 | else if ((cached_memory == MEMORY_LOAD) && ((cached_type == TYPE_ALU) || (cached_type == TYPE_ALU1) || (cached_type == TYPE_NEGNOT) || (cached_type == TYPE_INCDEC) || (cached_type == TYPE_ICMP) || (cached_type == TYPE_TEST) || (cached_type == TYPE_SETCC) || (cached_type == TYPE_POP) || (cached_type == TYPE_SSEISHFT1) || (cached_type == TYPE_MMX) || (cached_type == TYPE_MMXCMP))) |
| 25814 | { |
| 25815 | return 4; |
| 25816 | } |
| 25817 | else if ((cached_memory == MEMORY_STORE) && ((cached_type == TYPE_ALU) || (cached_type == TYPE_ALU1) || (cached_type == TYPE_NEGNOT) || (cached_type == TYPE_INCDEC) || (cached_type == TYPE_ICMP) || (cached_type == TYPE_TEST) || (cached_type == TYPE_SETCC) || (cached_type == TYPE_SSEISHFT1) || (cached_type == TYPE_MMX) || (cached_type == TYPE_MMXCMP))) |
| 25818 | { |
| 25819 | return 1; |
| 25820 | } |
| 25821 | else if ((cached_memory == MEMORY_BOTH) && ((cached_type == TYPE_ALU) || (cached_type == TYPE_ALU1) || (cached_type == TYPE_NEGNOT) || (cached_type == TYPE_INCDEC) || (cached_type == TYPE_ICMP) || (cached_type == TYPE_TEST) || (cached_type == TYPE_SETCC) || (cached_type == TYPE_POP) || (cached_type == TYPE_SSEISHFT1) || (cached_type == TYPE_MMX) || (cached_type == TYPE_MMXCMP))) |
| 25822 | { |
| 25823 | return 4; |
| 25824 | } |
| 25825 | else |
| 25826 | { |
| 25827 | return 0; |
| 25828 | } |
| 25829 | |
| 25830 | default: |
| 25831 | return 0; |
| 25832 | |
| 25833 | } |
| 25834 | } |
| 25835 | |
| 25836 | int |
| 25837 | insn_default_latency_atom (rtx_insn *insn ATTRIBUTE_UNUSED) |
| 25838 | { |
| 25839 | enum attr_type cached_type ATTRIBUTE_UNUSED; |
| 25840 | enum attr_memory cached_memory ATTRIBUTE_UNUSED; |
| 25841 | enum attr_atom_unit cached_atom_unit ATTRIBUTE_UNUSED; |
| 25842 | enum attr_use_carry cached_use_carry ATTRIBUTE_UNUSED; |
| 25843 | enum attr_mode cached_mode ATTRIBUTE_UNUSED; |
| 25844 | int cached_prefix_0f ATTRIBUTE_UNUSED; |
| 25845 | enum attr_atom_sse_attr cached_atom_sse_attr ATTRIBUTE_UNUSED; |
| 25846 | enum attr_movu cached_movu ATTRIBUTE_UNUSED; |
| 25847 | |
| 25848 | switch (recog_memoized (insn)) |
| 25849 | { |
| 25850 | case 3706: /* ssse3_pmaddubsw */ |
| 25851 | extract_insn_cached (insn); |
| 25852 | if (! (register_operand (operands[0], V2DImode))) |
| 25853 | { |
| 25854 | return 4; |
| 25855 | } |
| 25856 | else |
| 25857 | { |
| 25858 | return 6; |
| 25859 | } |
| 25860 | |
| 25861 | case 3695: /* ssse3_phsubdv2si3 */ |
| 25862 | case 3694: /* ssse3_phadddv2si3 */ |
| 25863 | case 3693: /* ssse3_phsubdv4si3 */ |
| 25864 | case 3692: /* ssse3_phadddv4si3 */ |
| 25865 | case 3689: /* ssse3_phsubswv4hi3 */ |
| 25866 | case 3688: /* ssse3_phsubwv4hi3 */ |
| 25867 | case 3687: /* ssse3_phaddswv4hi3 */ |
| 25868 | case 3686: /* ssse3_phaddwv4hi3 */ |
| 25869 | case 3685: /* ssse3_phsubswv8hi3 */ |
| 25870 | case 3684: /* ssse3_phsubwv8hi3 */ |
| 25871 | case 3683: /* ssse3_phaddswv8hi3 */ |
| 25872 | case 3682: /* ssse3_phaddwv8hi3 */ |
| 25873 | return 6; |
| 25874 | |
| 25875 | case 3656: /* avx2_psadbw */ |
| 25876 | case 3655: /* avx512f_psadbw */ |
| 25877 | extract_insn_cached (insn); |
| 25878 | if (register_operand (operands[0], V2DImode)) |
| 25879 | { |
| 25880 | return 6; |
| 25881 | } |
| 25882 | else |
| 25883 | { |
| 25884 | return 0; |
| 25885 | } |
| 25886 | |
| 25887 | case 4489: /* avx512bw_lshrvv32hi_mask */ |
| 25888 | case 4488: /* avx512bw_lshrvv32hi */ |
| 25889 | case 4487: /* avx512bw_ashlvv32hi_mask */ |
| 25890 | case 4486: /* avx512bw_ashlvv32hi */ |
| 25891 | case 4485: /* avx512vl_lshrvv16hi_mask */ |
| 25892 | case 4484: /* avx512vl_lshrvv16hi */ |
| 25893 | case 4483: /* avx512vl_ashlvv16hi_mask */ |
| 25894 | case 4482: /* avx512vl_ashlvv16hi */ |
| 25895 | case 4481: /* avx512vl_lshrvv8hi_mask */ |
| 25896 | case 4480: /* avx512vl_lshrvv8hi */ |
| 25897 | case 4479: /* avx512vl_ashlvv8hi_mask */ |
| 25898 | case 4478: /* avx512vl_ashlvv8hi */ |
| 25899 | case 4477: /* avx2_lshrvv2di_mask */ |
| 25900 | case 4476: /* avx2_lshrvv2di */ |
| 25901 | case 4475: /* avx2_ashlvv2di_mask */ |
| 25902 | case 4474: /* avx2_ashlvv2di */ |
| 25903 | case 4473: /* avx2_lshrvv4di_mask */ |
| 25904 | case 4472: /* avx2_lshrvv4di */ |
| 25905 | case 4471: /* avx2_ashlvv4di_mask */ |
| 25906 | case 4470: /* avx2_ashlvv4di */ |
| 25907 | case 4469: /* avx512f_lshrvv8di_mask */ |
| 25908 | case 4468: /* avx512f_lshrvv8di */ |
| 25909 | case 4467: /* avx512f_ashlvv8di_mask */ |
| 25910 | case 4466: /* avx512f_ashlvv8di */ |
| 25911 | case 4465: /* avx2_lshrvv4si_mask */ |
| 25912 | case 4464: /* avx2_lshrvv4si */ |
| 25913 | case 4463: /* avx2_ashlvv4si_mask */ |
| 25914 | case 4462: /* avx2_ashlvv4si */ |
| 25915 | case 4461: /* avx2_lshrvv8si_mask */ |
| 25916 | case 4460: /* avx2_lshrvv8si */ |
| 25917 | case 4459: /* avx2_ashlvv8si_mask */ |
| 25918 | case 4458: /* avx2_ashlvv8si */ |
| 25919 | case 4457: /* avx512f_lshrvv16si_mask */ |
| 25920 | case 4456: /* avx512f_lshrvv16si */ |
| 25921 | case 4455: /* avx512f_ashlvv16si_mask */ |
| 25922 | case 4454: /* avx512f_ashlvv16si */ |
| 25923 | case 4453: /* avx512bw_ashrvv32hi_mask */ |
| 25924 | case 4452: /* avx512bw_ashrvv32hi */ |
| 25925 | case 4451: /* avx512vl_ashrvv16hi_mask */ |
| 25926 | case 4450: /* avx512vl_ashrvv16hi */ |
| 25927 | case 4449: /* avx512vl_ashrvv8hi_mask */ |
| 25928 | case 4448: /* avx512vl_ashrvv8hi */ |
| 25929 | case 4447: /* avx512f_ashrvv8di_mask */ |
| 25930 | case 4446: /* avx512f_ashrvv8di */ |
| 25931 | case 4445: /* avx2_ashrvv4di_mask */ |
| 25932 | case 4444: /* avx2_ashrvv4di */ |
| 25933 | case 4443: /* avx2_ashrvv2di_mask */ |
| 25934 | case 4442: /* avx2_ashrvv2di */ |
| 25935 | case 4441: /* avx512f_ashrvv16si_mask */ |
| 25936 | case 4440: /* avx512f_ashrvv16si */ |
| 25937 | case 4439: /* avx2_ashrvv8si_mask */ |
| 25938 | case 4438: /* avx2_ashrvv8si */ |
| 25939 | case 4437: /* avx2_ashrvv4si_mask */ |
| 25940 | case 4436: /* avx2_ashrvv4si */ |
| 25941 | case 4396: /* *ssse3_palignrv2df_perm */ |
| 25942 | case 4395: /* *ssse3_palignrv4sf_perm */ |
| 25943 | case 4394: /* *ssse3_palignrv2di_perm */ |
| 25944 | case 4393: /* *ssse3_palignrv4si_perm */ |
| 25945 | case 4392: /* *ssse3_palignrv8hi_perm */ |
| 25946 | case 4391: /* *ssse3_palignrv16qi_perm */ |
| 25947 | case 4019: /* xop_shlv2di3 */ |
| 25948 | case 4018: /* xop_shlv4si3 */ |
| 25949 | case 4017: /* xop_shlv8hi3 */ |
| 25950 | case 4016: /* xop_shlv16qi3 */ |
| 25951 | case 4015: /* xop_shav2di3 */ |
| 25952 | case 4014: /* xop_shav4si3 */ |
| 25953 | case 4013: /* xop_shav8hi3 */ |
| 25954 | case 4012: /* xop_shav16qi3 */ |
| 25955 | case 4011: /* xop_vrotlv2di3 */ |
| 25956 | case 4010: /* xop_vrotlv4si3 */ |
| 25957 | case 4009: /* xop_vrotlv8hi3 */ |
| 25958 | case 4008: /* xop_vrotlv16qi3 */ |
| 25959 | case 4007: /* xop_rotrv2di3 */ |
| 25960 | case 4006: /* xop_rotrv4si3 */ |
| 25961 | case 4005: /* xop_rotrv8hi3 */ |
| 25962 | case 4004: /* xop_rotrv16qi3 */ |
| 25963 | case 4003: /* xop_rotlv2di3 */ |
| 25964 | case 4002: /* xop_rotlv4si3 */ |
| 25965 | case 4001: /* xop_rotlv8hi3 */ |
| 25966 | case 4000: /* xop_rotlv16qi3 */ |
| 25967 | case 3736: /* ssse3_palignrdi */ |
| 25968 | case 3735: /* ssse3_palignrti */ |
| 25969 | case 3734: /* avx2_palignrv2ti */ |
| 25970 | case 3733: /* avx512bw_palignrv4ti */ |
| 25971 | case 3732: /* ssse3_palignrv16qi_mask */ |
| 25972 | case 3731: /* avx2_palignrv32qi_mask */ |
| 25973 | case 3730: /* avx512bw_palignrv64qi_mask */ |
| 25974 | case 3143: /* sse2_lshrv1ti3 */ |
| 25975 | case 3142: /* avx2_lshrv2ti3 */ |
| 25976 | case 3141: /* avx512bw_lshrv4ti3 */ |
| 25977 | case 3140: /* sse2_ashlv1ti3 */ |
| 25978 | case 3139: /* avx2_ashlv2ti3 */ |
| 25979 | case 3138: /* avx512bw_ashlv4ti3 */ |
| 25980 | case 3137: /* lshrv8di3_mask */ |
| 25981 | case 3136: /* lshrv8di3 */ |
| 25982 | case 3135: /* ashlv8di3_mask */ |
| 25983 | case 3134: /* ashlv8di3 */ |
| 25984 | case 3133: /* lshrv16si3_mask */ |
| 25985 | case 3132: /* lshrv16si3 */ |
| 25986 | case 3131: /* ashlv16si3_mask */ |
| 25987 | case 3130: /* ashlv16si3 */ |
| 25988 | case 3129: /* lshrv2di3_mask */ |
| 25989 | case 3128: /* lshrv2di3 */ |
| 25990 | case 3127: /* ashlv2di3_mask */ |
| 25991 | case 3126: /* ashlv2di3 */ |
| 25992 | case 3125: /* lshrv4di3_mask */ |
| 25993 | case 3124: /* lshrv4di3 */ |
| 25994 | case 3123: /* ashlv4di3_mask */ |
| 25995 | case 3122: /* ashlv4di3 */ |
| 25996 | case 3121: /* lshrv4si3_mask */ |
| 25997 | case 3120: /* lshrv4si3 */ |
| 25998 | case 3119: /* ashlv4si3_mask */ |
| 25999 | case 3118: /* ashlv4si3 */ |
| 26000 | case 3117: /* lshrv8si3_mask */ |
| 26001 | case 3116: /* lshrv8si3 */ |
| 26002 | case 3115: /* ashlv8si3_mask */ |
| 26003 | case 3114: /* ashlv8si3 */ |
| 26004 | case 3113: /* lshrv8hi3_mask */ |
| 26005 | case 3112: /* lshrv8hi3 */ |
| 26006 | case 3111: /* ashlv8hi3_mask */ |
| 26007 | case 3110: /* ashlv8hi3 */ |
| 26008 | case 3109: /* lshrv16hi3_mask */ |
| 26009 | case 3108: /* lshrv16hi3 */ |
| 26010 | case 3107: /* ashlv16hi3_mask */ |
| 26011 | case 3106: /* ashlv16hi3 */ |
| 26012 | case 3105: /* lshrv32hi3_mask */ |
| 26013 | case 3104: /* lshrv32hi3 */ |
| 26014 | case 3103: /* ashlv32hi3_mask */ |
| 26015 | case 3102: /* ashlv32hi3 */ |
| 26016 | case 3101: /* ashrv8di3_mask */ |
| 26017 | case 3100: /* ashrv8di3 */ |
| 26018 | case 3099: /* ashrv16si3_mask */ |
| 26019 | case 3098: /* ashrv16si3 */ |
| 26020 | case 3097: /* ashrv4di3_mask */ |
| 26021 | case 3096: /* ashrv4di3 */ |
| 26022 | case 3095: /* ashrv32hi3_mask */ |
| 26023 | case 3094: /* ashrv32hi3 */ |
| 26024 | case 3093: /* ashrv2di3_mask */ |
| 26025 | case 3092: /* *ashrv2di3 */ |
| 26026 | case 3091: /* ashrv4si3 */ |
| 26027 | case 3090: /* ashrv8si3 */ |
| 26028 | case 3089: /* ashrv8hi3 */ |
| 26029 | case 3088: /* ashrv16hi3 */ |
| 26030 | case 3087: /* ashrv4si3_mask */ |
| 26031 | case 3086: /* *ashrv4si3 */ |
| 26032 | case 3085: /* ashrv8si3_mask */ |
| 26033 | case 3084: /* *ashrv8si3 */ |
| 26034 | case 3083: /* ashrv8hi3_mask */ |
| 26035 | case 3082: /* *ashrv8hi3 */ |
| 26036 | case 3081: /* ashrv16hi3_mask */ |
| 26037 | case 3080: /* *ashrv16hi3 */ |
| 26038 | extract_insn_cached (insn); |
| 26039 | if (immediate_operand (operands[2], VOIDmode)) |
| 26040 | { |
| 26041 | return 1; |
| 26042 | } |
| 26043 | else |
| 26044 | { |
| 26045 | return 2; |
| 26046 | } |
| 26047 | |
| 26048 | case 3705: /* ssse3_pmaddubsw128 */ |
| 26049 | case 3657: /* sse2_psadbw */ |
| 26050 | case 3067: /* *sse2_pmaddwd */ |
| 26051 | extract_insn_cached (insn); |
| 26052 | if (! (register_operand (operands[0], V2DImode))) |
| 26053 | { |
| 26054 | return 5; |
| 26055 | } |
| 26056 | else |
| 26057 | { |
| 26058 | return 6; |
| 26059 | } |
| 26060 | |
| 26061 | case 3702: /* avx512bw_pmaddubsw512v32hi_mask */ |
| 26062 | case 3701: /* avx512bw_pmaddubsw512v32hi */ |
| 26063 | case 3700: /* avx512bw_pmaddubsw512v16hi_mask */ |
| 26064 | case 3699: /* avx512bw_pmaddubsw512v16hi */ |
| 26065 | case 3698: /* avx512bw_pmaddubsw512v8hi_mask */ |
| 26066 | case 3697: /* avx512bw_pmaddubsw512v8hi */ |
| 26067 | case 3696: /* avx2_pmaddubsw256 */ |
| 26068 | case 3691: /* avx2_phsubdv8si3 */ |
| 26069 | case 3690: /* avx2_phadddv8si3 */ |
| 26070 | case 3681: /* avx2_phsubswv16hi3 */ |
| 26071 | case 3680: /* avx2_phsubwv16hi3 */ |
| 26072 | case 3679: /* avx2_phaddswv16hi3 */ |
| 26073 | case 3678: /* avx2_phaddwv16hi3 */ |
| 26074 | case 3654: /* *sse2_uavgv8hi3_mask */ |
| 26075 | case 3653: /* *sse2_uavgv8hi3 */ |
| 26076 | case 3652: /* *avx2_uavgv16hi3_mask */ |
| 26077 | case 3651: /* *avx2_uavgv16hi3 */ |
| 26078 | case 3650: /* *avx512bw_uavgv32hi3_mask */ |
| 26079 | case 3649: /* *avx512bw_uavgv32hi3 */ |
| 26080 | case 3648: /* *sse2_uavgv16qi3_mask */ |
| 26081 | case 3647: /* *sse2_uavgv16qi3 */ |
| 26082 | case 3646: /* *avx2_uavgv32qi3_mask */ |
| 26083 | case 3645: /* *avx2_uavgv32qi3 */ |
| 26084 | case 3644: /* *avx512bw_uavgv64qi3_mask */ |
| 26085 | case 3643: /* *avx512bw_uavgv64qi3 */ |
| 26086 | case 3319: /* *uminv16qi3 */ |
| 26087 | case 3318: /* *umaxv16qi3 */ |
| 26088 | case 3317: /* *sse4_1_uminv4si3_mask */ |
| 26089 | case 3316: /* *sse4_1_uminv4si3 */ |
| 26090 | case 3315: /* *sse4_1_umaxv4si3_mask */ |
| 26091 | case 3314: /* *sse4_1_umaxv4si3 */ |
| 26092 | case 3313: /* *sse4_1_uminv8hi3_mask */ |
| 26093 | case 3312: /* *sse4_1_uminv8hi3 */ |
| 26094 | case 3311: /* *sse4_1_umaxv8hi3_mask */ |
| 26095 | case 3310: /* *sse4_1_umaxv8hi3 */ |
| 26096 | case 3309: /* *sminv8hi3 */ |
| 26097 | case 3308: /* *smaxv8hi3 */ |
| 26098 | case 3307: /* *sse4_1_sminv4si3_mask */ |
| 26099 | case 3306: /* *sse4_1_sminv4si3 */ |
| 26100 | case 3305: /* *sse4_1_smaxv4si3_mask */ |
| 26101 | case 3304: /* *sse4_1_smaxv4si3 */ |
| 26102 | case 3303: /* *sse4_1_sminv16qi3_mask */ |
| 26103 | case 3302: /* *sse4_1_sminv16qi3 */ |
| 26104 | case 3301: /* *sse4_1_smaxv16qi3_mask */ |
| 26105 | case 3300: /* *sse4_1_smaxv16qi3 */ |
| 26106 | case 3299: /* uminv8hi3_mask */ |
| 26107 | case 3298: /* *uminv8hi3 */ |
| 26108 | case 3297: /* umaxv8hi3_mask */ |
| 26109 | case 3296: /* *umaxv8hi3 */ |
| 26110 | case 3295: /* sminv8hi3_mask */ |
| 26111 | case 3294: /* *sminv8hi3 */ |
| 26112 | case 3293: /* smaxv8hi3_mask */ |
| 26113 | case 3292: /* *smaxv8hi3 */ |
| 26114 | case 3291: /* uminv16hi3_mask */ |
| 26115 | case 3290: /* *uminv16hi3 */ |
| 26116 | case 3289: /* umaxv16hi3_mask */ |
| 26117 | case 3288: /* *umaxv16hi3 */ |
| 26118 | case 3287: /* sminv16hi3_mask */ |
| 26119 | case 3286: /* *sminv16hi3 */ |
| 26120 | case 3285: /* smaxv16hi3_mask */ |
| 26121 | case 3284: /* *smaxv16hi3 */ |
| 26122 | case 3283: /* uminv32hi3_mask */ |
| 26123 | case 3282: /* *uminv32hi3 */ |
| 26124 | case 3281: /* umaxv32hi3_mask */ |
| 26125 | case 3280: /* *umaxv32hi3 */ |
| 26126 | case 3279: /* sminv32hi3_mask */ |
| 26127 | case 3278: /* *sminv32hi3 */ |
| 26128 | case 3277: /* smaxv32hi3_mask */ |
| 26129 | case 3276: /* *smaxv32hi3 */ |
| 26130 | case 3275: /* uminv32qi3_mask */ |
| 26131 | case 3274: /* *uminv32qi3 */ |
| 26132 | case 3273: /* umaxv32qi3_mask */ |
| 26133 | case 3272: /* *umaxv32qi3 */ |
| 26134 | case 3271: /* sminv32qi3_mask */ |
| 26135 | case 3270: /* *sminv32qi3 */ |
| 26136 | case 3269: /* smaxv32qi3_mask */ |
| 26137 | case 3268: /* *smaxv32qi3 */ |
| 26138 | case 3267: /* uminv16qi3_mask */ |
| 26139 | case 3266: /* *uminv16qi3 */ |
| 26140 | case 3265: /* umaxv16qi3_mask */ |
| 26141 | case 3264: /* *umaxv16qi3 */ |
| 26142 | case 3263: /* sminv16qi3_mask */ |
| 26143 | case 3262: /* *sminv16qi3 */ |
| 26144 | case 3261: /* smaxv16qi3_mask */ |
| 26145 | case 3260: /* *smaxv16qi3 */ |
| 26146 | case 3259: /* uminv64qi3_mask */ |
| 26147 | case 3258: /* *uminv64qi3 */ |
| 26148 | case 3257: /* umaxv64qi3_mask */ |
| 26149 | case 3256: /* *umaxv64qi3 */ |
| 26150 | case 3255: /* sminv64qi3_mask */ |
| 26151 | case 3254: /* *sminv64qi3 */ |
| 26152 | case 3253: /* smaxv64qi3_mask */ |
| 26153 | case 3252: /* *smaxv64qi3 */ |
| 26154 | case 3251: /* *avx512f_uminv2di3_mask */ |
| 26155 | case 3250: /* *avx512f_uminv2di3 */ |
| 26156 | case 3249: /* *avx512f_umaxv2di3_mask */ |
| 26157 | case 3248: /* *avx512f_umaxv2di3 */ |
| 26158 | case 3247: /* *avx512f_sminv2di3_mask */ |
| 26159 | case 3246: /* *avx512f_sminv2di3 */ |
| 26160 | case 3245: /* *avx512f_smaxv2di3_mask */ |
| 26161 | case 3244: /* *avx512f_smaxv2di3 */ |
| 26162 | case 3243: /* *avx512f_uminv4di3_mask */ |
| 26163 | case 3242: /* *avx512f_uminv4di3 */ |
| 26164 | case 3241: /* *avx512f_umaxv4di3_mask */ |
| 26165 | case 3240: /* *avx512f_umaxv4di3 */ |
| 26166 | case 3239: /* *avx512f_sminv4di3_mask */ |
| 26167 | case 3238: /* *avx512f_sminv4di3 */ |
| 26168 | case 3237: /* *avx512f_smaxv4di3_mask */ |
| 26169 | case 3236: /* *avx512f_smaxv4di3 */ |
| 26170 | case 3235: /* *avx512f_uminv8di3_mask */ |
| 26171 | case 3234: /* *avx512f_uminv8di3 */ |
| 26172 | case 3233: /* *avx512f_umaxv8di3_mask */ |
| 26173 | case 3232: /* *avx512f_umaxv8di3 */ |
| 26174 | case 3231: /* *avx512f_sminv8di3_mask */ |
| 26175 | case 3230: /* *avx512f_sminv8di3 */ |
| 26176 | case 3229: /* *avx512f_smaxv8di3_mask */ |
| 26177 | case 3228: /* *avx512f_smaxv8di3 */ |
| 26178 | case 3227: /* *avx512f_uminv4si3_mask */ |
| 26179 | case 3226: /* *avx512f_uminv4si3 */ |
| 26180 | case 3225: /* *avx512f_umaxv4si3_mask */ |
| 26181 | case 3224: /* *avx512f_umaxv4si3 */ |
| 26182 | case 3223: /* *avx512f_sminv4si3_mask */ |
| 26183 | case 3222: /* *avx512f_sminv4si3 */ |
| 26184 | case 3221: /* *avx512f_smaxv4si3_mask */ |
| 26185 | case 3220: /* *avx512f_smaxv4si3 */ |
| 26186 | case 3219: /* *avx512f_uminv8si3_mask */ |
| 26187 | case 3218: /* *avx512f_uminv8si3 */ |
| 26188 | case 3217: /* *avx512f_umaxv8si3_mask */ |
| 26189 | case 3216: /* *avx512f_umaxv8si3 */ |
| 26190 | case 3215: /* *avx512f_sminv8si3_mask */ |
| 26191 | case 3214: /* *avx512f_sminv8si3 */ |
| 26192 | case 3213: /* *avx512f_smaxv8si3_mask */ |
| 26193 | case 3212: /* *avx512f_smaxv8si3 */ |
| 26194 | case 3211: /* *avx512f_uminv16si3_mask */ |
| 26195 | case 3210: /* *avx512f_uminv16si3 */ |
| 26196 | case 3209: /* *avx512f_umaxv16si3_mask */ |
| 26197 | case 3208: /* *avx512f_umaxv16si3 */ |
| 26198 | case 3207: /* *avx512f_sminv16si3_mask */ |
| 26199 | case 3206: /* *avx512f_sminv16si3 */ |
| 26200 | case 3205: /* *avx512f_smaxv16si3_mask */ |
| 26201 | case 3204: /* *avx512f_smaxv16si3 */ |
| 26202 | case 3203: /* *avx2_uminv8si3 */ |
| 26203 | case 3202: /* *avx2_umaxv8si3 */ |
| 26204 | case 3201: /* *avx2_sminv8si3 */ |
| 26205 | case 3200: /* *avx2_smaxv8si3 */ |
| 26206 | case 3199: /* *avx2_uminv16hi3 */ |
| 26207 | case 3198: /* *avx2_umaxv16hi3 */ |
| 26208 | case 3197: /* *avx2_sminv16hi3 */ |
| 26209 | case 3196: /* *avx2_smaxv16hi3 */ |
| 26210 | case 3195: /* *avx2_uminv32qi3 */ |
| 26211 | case 3194: /* *avx2_umaxv32qi3 */ |
| 26212 | case 3193: /* *avx2_sminv32qi3 */ |
| 26213 | case 3192: /* *avx2_smaxv32qi3 */ |
| 26214 | case 3066: /* *avx2_pmaddwd */ |
| 26215 | case 3065: /* avx512bw_pmaddwd512v8hi_mask */ |
| 26216 | case 3064: /* avx512bw_pmaddwd512v8hi */ |
| 26217 | case 3063: /* avx512bw_pmaddwd512v16hi_mask */ |
| 26218 | case 3062: /* avx512bw_pmaddwd512v16hi */ |
| 26219 | case 3061: /* avx512bw_pmaddwd512v32hi_mask */ |
| 26220 | case 3060: /* avx512bw_pmaddwd512v32hi */ |
| 26221 | case 3029: /* *sse2_ussubv8hi3_mask */ |
| 26222 | case 3028: /* *sse2_ussubv8hi3 */ |
| 26223 | case 3027: /* *sse2_sssubv8hi3_mask */ |
| 26224 | case 3026: /* *sse2_sssubv8hi3 */ |
| 26225 | case 3025: /* *sse2_usaddv8hi3_mask */ |
| 26226 | case 3024: /* *sse2_usaddv8hi3 */ |
| 26227 | case 3023: /* *sse2_ssaddv8hi3_mask */ |
| 26228 | case 3022: /* *sse2_ssaddv8hi3 */ |
| 26229 | case 3021: /* *avx2_ussubv16hi3_mask */ |
| 26230 | case 3020: /* *avx2_ussubv16hi3 */ |
| 26231 | case 3019: /* *avx2_sssubv16hi3_mask */ |
| 26232 | case 3018: /* *avx2_sssubv16hi3 */ |
| 26233 | case 3017: /* *avx2_usaddv16hi3_mask */ |
| 26234 | case 3016: /* *avx2_usaddv16hi3 */ |
| 26235 | case 3015: /* *avx2_ssaddv16hi3_mask */ |
| 26236 | case 3014: /* *avx2_ssaddv16hi3 */ |
| 26237 | case 3013: /* *avx512bw_ussubv32hi3_mask */ |
| 26238 | case 3012: /* *avx512bw_ussubv32hi3 */ |
| 26239 | case 3011: /* *avx512bw_sssubv32hi3_mask */ |
| 26240 | case 3010: /* *avx512bw_sssubv32hi3 */ |
| 26241 | case 3009: /* *avx512bw_usaddv32hi3_mask */ |
| 26242 | case 3008: /* *avx512bw_usaddv32hi3 */ |
| 26243 | case 3007: /* *avx512bw_ssaddv32hi3_mask */ |
| 26244 | case 3006: /* *avx512bw_ssaddv32hi3 */ |
| 26245 | case 3005: /* *sse2_ussubv16qi3_mask */ |
| 26246 | case 3004: /* *sse2_ussubv16qi3 */ |
| 26247 | case 3003: /* *sse2_sssubv16qi3_mask */ |
| 26248 | case 3002: /* *sse2_sssubv16qi3 */ |
| 26249 | case 3001: /* *sse2_usaddv16qi3_mask */ |
| 26250 | case 3000: /* *sse2_usaddv16qi3 */ |
| 26251 | case 2999: /* *sse2_ssaddv16qi3_mask */ |
| 26252 | case 2998: /* *sse2_ssaddv16qi3 */ |
| 26253 | case 2997: /* *avx2_ussubv32qi3_mask */ |
| 26254 | case 2996: /* *avx2_ussubv32qi3 */ |
| 26255 | case 2995: /* *avx2_sssubv32qi3_mask */ |
| 26256 | case 2994: /* *avx2_sssubv32qi3 */ |
| 26257 | case 2993: /* *avx2_usaddv32qi3_mask */ |
| 26258 | case 2992: /* *avx2_usaddv32qi3 */ |
| 26259 | case 2991: /* *avx2_ssaddv32qi3_mask */ |
| 26260 | case 2990: /* *avx2_ssaddv32qi3 */ |
| 26261 | case 2989: /* *avx512bw_ussubv64qi3_mask */ |
| 26262 | case 2988: /* *avx512bw_ussubv64qi3 */ |
| 26263 | case 2987: /* *avx512bw_sssubv64qi3_mask */ |
| 26264 | case 2986: /* *avx512bw_sssubv64qi3 */ |
| 26265 | case 2985: /* *avx512bw_usaddv64qi3_mask */ |
| 26266 | case 2984: /* *avx512bw_usaddv64qi3 */ |
| 26267 | case 2983: /* *avx512bw_ssaddv64qi3_mask */ |
| 26268 | case 2982: /* *avx512bw_ssaddv64qi3 */ |
| 26269 | case 2981: /* *subv8hi3_mask */ |
| 26270 | case 2980: /* *addv8hi3_mask */ |
| 26271 | case 2979: /* *subv16hi3_mask */ |
| 26272 | case 2978: /* *addv16hi3_mask */ |
| 26273 | case 2977: /* *subv32hi3_mask */ |
| 26274 | case 2976: /* *addv32hi3_mask */ |
| 26275 | case 2975: /* *subv32qi3_mask */ |
| 26276 | case 2974: /* *addv32qi3_mask */ |
| 26277 | case 2973: /* *subv16qi3_mask */ |
| 26278 | case 2972: /* *addv16qi3_mask */ |
| 26279 | case 2971: /* *subv64qi3_mask */ |
| 26280 | case 2970: /* *addv64qi3_mask */ |
| 26281 | case 2969: /* *subv2di3_mask */ |
| 26282 | case 2968: /* *addv2di3_mask */ |
| 26283 | case 2967: /* *subv4di3_mask */ |
| 26284 | case 2966: /* *addv4di3_mask */ |
| 26285 | case 2965: /* *subv8di3_mask */ |
| 26286 | case 2964: /* *addv8di3_mask */ |
| 26287 | case 2963: /* *subv4si3_mask */ |
| 26288 | case 2962: /* *addv4si3_mask */ |
| 26289 | case 2961: /* *subv8si3_mask */ |
| 26290 | case 2960: /* *addv8si3_mask */ |
| 26291 | case 2959: /* *subv16si3_mask */ |
| 26292 | case 2958: /* *addv16si3_mask */ |
| 26293 | case 2957: /* *subv2di3 */ |
| 26294 | case 2956: /* *addv2di3 */ |
| 26295 | case 2955: /* *subv4di3 */ |
| 26296 | case 2954: /* *addv4di3 */ |
| 26297 | case 2953: /* *subv8di3 */ |
| 26298 | case 2952: /* *addv8di3 */ |
| 26299 | case 2951: /* *subv4si3 */ |
| 26300 | case 2950: /* *addv4si3 */ |
| 26301 | case 2949: /* *subv8si3 */ |
| 26302 | case 2948: /* *addv8si3 */ |
| 26303 | case 2947: /* *subv16si3 */ |
| 26304 | case 2946: /* *addv16si3 */ |
| 26305 | case 2945: /* *subv8hi3 */ |
| 26306 | case 2944: /* *addv8hi3 */ |
| 26307 | case 2943: /* *subv16hi3 */ |
| 26308 | case 2942: /* *addv16hi3 */ |
| 26309 | case 2941: /* *subv32hi3 */ |
| 26310 | case 2940: /* *addv32hi3 */ |
| 26311 | case 2939: /* *subv16qi3 */ |
| 26312 | case 2938: /* *addv16qi3 */ |
| 26313 | case 2937: /* *subv32qi3 */ |
| 26314 | case 2936: /* *addv32qi3 */ |
| 26315 | case 2935: /* *subv64qi3 */ |
| 26316 | case 2934: /* *addv64qi3 */ |
| 26317 | extract_insn_cached (insn); |
| 26318 | if (! (register_operand (operands[0], V2DImode))) |
| 26319 | { |
| 26320 | return 1; |
| 26321 | } |
| 26322 | else |
| 26323 | { |
| 26324 | return 6; |
| 26325 | } |
| 26326 | |
| 26327 | case 2467: /* *sse4_1_extractps */ |
| 26328 | extract_constrain_insn_cached (insn); |
| 26329 | if (!((1 << which_alternative) & 0x7)) |
| 26330 | { |
| 26331 | return 9; |
| 26332 | } |
| 26333 | else |
| 26334 | { |
| 26335 | return 1; |
| 26336 | } |
| 26337 | |
| 26338 | case 1464: /* sse2_divv2df3_mask */ |
| 26339 | case 1463: /* sse2_divv2df3 */ |
| 26340 | case 1462: /* avx_divv4df3_mask */ |
| 26341 | case 1461: /* avx_divv4df3 */ |
| 26342 | case 1460: /* avx512f_divv8df3_mask_round */ |
| 26343 | case 1459: /* avx512f_divv8df3_mask */ |
| 26344 | case 1458: /* avx512f_divv8df3_round */ |
| 26345 | case 1457: /* avx512f_divv8df3 */ |
| 26346 | case 1456: /* sse_divv4sf3_mask */ |
| 26347 | case 1455: /* sse_divv4sf3 */ |
| 26348 | case 1454: /* avx_divv8sf3_mask */ |
| 26349 | case 1453: /* avx_divv8sf3 */ |
| 26350 | case 1452: /* avx512f_divv16sf3_mask_round */ |
| 26351 | case 1451: /* avx512f_divv16sf3_mask */ |
| 26352 | case 1450: /* avx512f_divv16sf3_round */ |
| 26353 | case 1449: /* avx512f_divv16sf3 */ |
| 26354 | case 1448: /* sse2_vmdivv2df3_round */ |
| 26355 | case 1447: /* sse2_vmdivv2df3 */ |
| 26356 | case 1444: /* sse_vmdivv4sf3_round */ |
| 26357 | case 1443: /* sse_vmdivv4sf3 */ |
| 26358 | return 62 /* 0x3e */; |
| 26359 | |
| 26360 | case 1620: /* sse3_hsubv4sf3 */ |
| 26361 | case 1619: /* sse3_haddv4sf3 */ |
| 26362 | case 1616: /* *sse3_hsubv2df3_low */ |
| 26363 | case 1615: /* *sse3_haddv2df3_low */ |
| 26364 | case 1614: /* sse3_hsubv2df3 */ |
| 26365 | case 1613: /* *sse3_haddv2df3 */ |
| 26366 | case 1608: /* sse3_addsubv2df3 */ |
| 26367 | case 1598: /* ieee_minv2df3_mask */ |
| 26368 | case 1597: /* ieee_minv2df3 */ |
| 26369 | case 1596: /* ieee_maxv2df3_mask */ |
| 26370 | case 1595: /* ieee_maxv2df3 */ |
| 26371 | case 1566: /* *sminv2df3_mask_round */ |
| 26372 | case 1565: /* *sminv2df3_mask */ |
| 26373 | case 1564: /* *sminv2df3_round */ |
| 26374 | case 1563: /* *sminv2df3 */ |
| 26375 | case 1562: /* *smaxv2df3_mask_round */ |
| 26376 | case 1561: /* *smaxv2df3_mask */ |
| 26377 | case 1560: /* *smaxv2df3_round */ |
| 26378 | case 1559: /* *smaxv2df3 */ |
| 26379 | case 1408: /* *subv2df3_mask_round */ |
| 26380 | case 1407: /* *subv2df3_mask */ |
| 26381 | case 1406: /* *subv2df3_round */ |
| 26382 | case 1405: /* *subv2df3 */ |
| 26383 | case 1404: /* *addv2df3_mask_round */ |
| 26384 | case 1403: /* *addv2df3_mask */ |
| 26385 | case 1402: /* *addv2df3_round */ |
| 26386 | case 1401: /* *addv2df3 */ |
| 26387 | return 8; |
| 26388 | |
| 26389 | case 994: /* pro_epilogue_adjust_stack_di_add */ |
| 26390 | case 993: /* pro_epilogue_adjust_stack_si_add */ |
| 26391 | extract_constrain_insn_cached (insn); |
| 26392 | if (((which_alternative == 0) && (! ( |
| 26393 | #line 17556 "/___NETBSD_SRC___/tools/gcc/../../external/gpl3/gcc/dist/gcc/config/i386/i386.md" |
| 26394 | (TARGET_OPT_AGU)))) || ((cached_type = get_attr_type (insn)) == TYPE_IMOV) || (cached_type == TYPE_LEA)) |
| 26395 | { |
| 26396 | return 1; |
| 26397 | } |
| 26398 | else |
| 26399 | { |
| 26400 | return 0; |
| 26401 | } |
| 26402 | |
| 26403 | case 982: /* *movsfcc_1_387 */ |
| 26404 | extract_constrain_insn_cached (insn); |
| 26405 | if (!((1 << which_alternative) & 0x3)) |
| 26406 | { |
| 26407 | return 1; |
| 26408 | } |
| 26409 | else |
| 26410 | { |
| 26411 | return 0; |
| 26412 | } |
| 26413 | |
| 26414 | case 981: /* *movdfcc_1 */ |
| 26415 | extract_constrain_insn_cached (insn); |
| 26416 | if (((1 << which_alternative) & 0xc)) |
| 26417 | { |
| 26418 | return 9; |
| 26419 | } |
| 26420 | else if (!((1 << which_alternative) & 0xf)) |
| 26421 | { |
| 26422 | return 1; |
| 26423 | } |
| 26424 | else |
| 26425 | { |
| 26426 | return 0; |
| 26427 | } |
| 26428 | |
| 26429 | case 816: /* *fop_df_1 */ |
| 26430 | case 815: /* *fop_sf_1 */ |
| 26431 | if ((cached_type = get_attr_type (insn)) == TYPE_SSEADD) |
| 26432 | { |
| 26433 | return 5; |
| 26434 | } |
| 26435 | else if (cached_type == TYPE_SSEDIV) |
| 26436 | { |
| 26437 | return 62 /* 0x3e */; |
| 26438 | } |
| 26439 | else |
| 26440 | { |
| 26441 | return 0; |
| 26442 | } |
| 26443 | |
| 26444 | case 1467: /* sse_vmrcpv4sf2 */ |
| 26445 | case 1442: /* sse_vmmulv4sf3_round */ |
| 26446 | case 1441: /* sse_vmmulv4sf3 */ |
| 26447 | case 845: /* *rsqrtsf2_sse */ |
| 26448 | case 814: /* *rcpsf2_sse */ |
| 26449 | return 4; |
| 26450 | |
| 26451 | case 813: /* *fop_df_comm */ |
| 26452 | if (((cached_type = get_attr_type (insn)) == TYPE_SSEADD) || (cached_type == TYPE_SSEMUL)) |
| 26453 | { |
| 26454 | return 5; |
| 26455 | } |
| 26456 | else |
| 26457 | { |
| 26458 | return 0; |
| 26459 | } |
| 26460 | |
| 26461 | case 812: /* *fop_sf_comm */ |
| 26462 | if ((cached_type = get_attr_type (insn)) == TYPE_SSEADD) |
| 26463 | { |
| 26464 | return 5; |
| 26465 | } |
| 26466 | else if (cached_type == TYPE_SSEMUL) |
| 26467 | { |
| 26468 | return 4; |
| 26469 | } |
| 26470 | else |
| 26471 | { |
| 26472 | return 0; |
| 26473 | } |
| 26474 | |
| 26475 | case 781: /* *bswapdi2_movbe */ |
| 26476 | case 780: /* *bswapsi2_movbe */ |
| 26477 | extract_constrain_insn_cached (insn); |
| 26478 | if (which_alternative != 0) |
| 26479 | { |
| 26480 | return 1; |
| 26481 | } |
| 26482 | else |
| 26483 | { |
| 26484 | return 0; |
| 26485 | } |
| 26486 | |
| 26487 | case 968: /* *strlenqi_1 */ |
| 26488 | case 967: /* *strlenqi_1 */ |
| 26489 | case 966: /* *cmpstrnqi_1 */ |
| 26490 | case 965: /* *cmpstrnqi_1 */ |
| 26491 | case 964: /* *cmpstrnqi_nz_1 */ |
| 26492 | case 963: /* *cmpstrnqi_nz_1 */ |
| 26493 | case 962: /* *rep_stosqi */ |
| 26494 | case 961: /* *rep_stosqi */ |
| 26495 | case 960: /* *rep_stossi */ |
| 26496 | case 959: /* *rep_stossi */ |
| 26497 | case 958: /* *rep_stosdi_rex64 */ |
| 26498 | case 957: /* *rep_stosdi_rex64 */ |
| 26499 | case 956: /* *strsetqi_1 */ |
| 26500 | case 955: /* *strsetqi_1 */ |
| 26501 | case 954: /* *strsethi_1 */ |
| 26502 | case 953: /* *strsethi_1 */ |
| 26503 | case 952: /* *strsetsi_1 */ |
| 26504 | case 951: /* *strsetsi_1 */ |
| 26505 | case 950: /* *strsetdi_rex_1 */ |
| 26506 | case 949: /* *strsetdi_rex_1 */ |
| 26507 | case 948: /* *rep_movqi */ |
| 26508 | case 947: /* *rep_movqi */ |
| 26509 | case 946: /* *rep_movsi */ |
| 26510 | case 945: /* *rep_movsi */ |
| 26511 | case 944: /* *rep_movdi_rex64 */ |
| 26512 | case 943: /* *rep_movdi_rex64 */ |
| 26513 | case 942: /* *strmovqi_1 */ |
| 26514 | case 941: /* *strmovqi_1 */ |
| 26515 | case 940: /* *strmovhi_1 */ |
| 26516 | case 939: /* *strmovhi_1 */ |
| 26517 | case 938: /* *strmovsi_1 */ |
| 26518 | case 937: /* *strmovsi_1 */ |
| 26519 | case 936: /* *strmovdi_rex_1 */ |
| 26520 | case 935: /* *strmovdi_rex_1 */ |
| 26521 | case 704: /* leave_rex64 */ |
| 26522 | case 703: /* leave */ |
| 26523 | return 3; |
| 26524 | |
| 26525 | case 693: /* simple_return_indirect_internal */ |
| 26526 | case 663: /* *tablejump_1 */ |
| 26527 | case 662: /* *tablejump_1 */ |
| 26528 | case 661: /* *indirect_jump */ |
| 26529 | case 660: /* *indirect_jump */ |
| 26530 | extract_constrain_insn_cached (insn); |
| 26531 | if ( |
| 26532 | #line 12442 "/___NETBSD_SRC___/tools/gcc/../../external/gpl3/gcc/dist/gcc/config/i386/i386.md" |
| 26533 | ((cfun->machine->indirect_branch_type |
| 26534 | != indirect_branch_keep))) |
| 26535 | { |
| 26536 | return 9; |
| 26537 | } |
| 26538 | else if (! ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 26539 | { |
| 26540 | return 1; |
| 26541 | } |
| 26542 | else |
| 26543 | { |
| 26544 | return 2; |
| 26545 | } |
| 26546 | |
| 26547 | case 659: /* jump */ |
| 26548 | case 628: /* *jcc_2 */ |
| 26549 | case 627: /* *jcc_1 */ |
| 26550 | if (! ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 26551 | { |
| 26552 | return 1; |
| 26553 | } |
| 26554 | else |
| 26555 | { |
| 26556 | return 2; |
| 26557 | } |
| 26558 | |
| 26559 | case 624: /* *setcc_qi_slp */ |
| 26560 | case 623: /* *setcc_qi */ |
| 26561 | if (! ((cached_memory = get_attr_memory (insn)) == MEMORY_STORE)) |
| 26562 | { |
| 26563 | return 1; |
| 26564 | } |
| 26565 | else |
| 26566 | { |
| 26567 | return 2; |
| 26568 | } |
| 26569 | |
| 26570 | case 602: /* *rotrsi3_1_zext */ |
| 26571 | case 601: /* *rotlsi3_1_zext */ |
| 26572 | case 599: /* *rotrdi3_1 */ |
| 26573 | case 598: /* *rotldi3_1 */ |
| 26574 | case 597: /* *rotrsi3_1 */ |
| 26575 | case 596: /* *rotlsi3_1 */ |
| 26576 | case 561: /* *ashrsi3_1_zext */ |
| 26577 | case 560: /* *lshrsi3_1_zext */ |
| 26578 | case 557: /* *ashrdi3_1 */ |
| 26579 | case 556: /* *lshrdi3_1 */ |
| 26580 | case 555: /* *ashrsi3_1 */ |
| 26581 | case 554: /* *lshrsi3_1 */ |
| 26582 | extract_constrain_insn_cached (insn); |
| 26583 | if (which_alternative == 0) |
| 26584 | { |
| 26585 | return 1; |
| 26586 | } |
| 26587 | else |
| 26588 | { |
| 26589 | return 0; |
| 26590 | } |
| 26591 | |
| 26592 | case 536: /* *ashldi3_cconly */ |
| 26593 | case 535: /* *ashlsi3_cconly */ |
| 26594 | case 534: /* *ashlhi3_cconly */ |
| 26595 | case 533: /* *ashlqi3_cconly */ |
| 26596 | case 532: /* *ashlsi3_cmp_zext */ |
| 26597 | case 531: /* *ashldi3_cmp */ |
| 26598 | case 530: /* *ashlsi3_cmp */ |
| 26599 | case 529: /* *ashlhi3_cmp */ |
| 26600 | case 528: /* *ashlqi3_cmp */ |
| 26601 | if (((cached_type = get_attr_type (insn)) == TYPE_ALU) || (cached_type == TYPE_ISHIFT)) |
| 26602 | { |
| 26603 | return 1; |
| 26604 | } |
| 26605 | else |
| 26606 | { |
| 26607 | return 0; |
| 26608 | } |
| 26609 | |
| 26610 | case 527: /* *ashlqi3_1_slp */ |
| 26611 | if (((cached_type = get_attr_type (insn)) == TYPE_ALU1) || (cached_type == TYPE_ISHIFT1)) |
| 26612 | { |
| 26613 | return 1; |
| 26614 | } |
| 26615 | else |
| 26616 | { |
| 26617 | return 0; |
| 26618 | } |
| 26619 | |
| 26620 | case 526: /* *ashlqi3_1 */ |
| 26621 | extract_constrain_insn_cached (insn); |
| 26622 | if (((cached_type = get_attr_type (insn)) == TYPE_ALU) || (which_alternative == 2) || (cached_type == TYPE_ISHIFT)) |
| 26623 | { |
| 26624 | return 1; |
| 26625 | } |
| 26626 | else |
| 26627 | { |
| 26628 | return 0; |
| 26629 | } |
| 26630 | |
| 26631 | case 525: /* *ashlhi3_1 */ |
| 26632 | extract_constrain_insn_cached (insn); |
| 26633 | if ((which_alternative != 0) || ((cached_type = get_attr_type (insn)) == TYPE_ALU) || (cached_type == TYPE_ISHIFT)) |
| 26634 | { |
| 26635 | return 1; |
| 26636 | } |
| 26637 | else |
| 26638 | { |
| 26639 | return 0; |
| 26640 | } |
| 26641 | |
| 26642 | case 524: /* *ashlsi3_1_zext */ |
| 26643 | case 522: /* *ashldi3_1 */ |
| 26644 | case 521: /* *ashlsi3_1 */ |
| 26645 | extract_constrain_insn_cached (insn); |
| 26646 | if (((cached_type = get_attr_type (insn)) == TYPE_ALU) || (which_alternative == 1) || (cached_type == TYPE_ISHIFT)) |
| 26647 | { |
| 26648 | return 1; |
| 26649 | } |
| 26650 | else |
| 26651 | { |
| 26652 | return 0; |
| 26653 | } |
| 26654 | |
| 26655 | case 3673: /* sse_stmxcsr */ |
| 26656 | case 3672: /* sse_ldmxcsr */ |
| 26657 | case 1501: /* sse2_vmsqrtv2df2_round */ |
| 26658 | case 1500: /* sse2_vmsqrtv2df2 */ |
| 26659 | case 1499: /* sse_vmsqrtv4sf2_round */ |
| 26660 | case 1498: /* sse_vmsqrtv4sf2 */ |
| 26661 | case 1497: /* sse2_sqrtv2df2_mask */ |
| 26662 | case 1496: /* sse2_sqrtv2df2 */ |
| 26663 | case 1495: /* avx_sqrtv4df2_mask */ |
| 26664 | case 1494: /* avx_sqrtv4df2 */ |
| 26665 | case 1493: /* avx512f_sqrtv8df2_mask_round */ |
| 26666 | case 1492: /* avx512f_sqrtv8df2_mask */ |
| 26667 | case 1491: /* avx512f_sqrtv8df2_round */ |
| 26668 | case 1490: /* avx512f_sqrtv8df2 */ |
| 26669 | case 1489: /* sse_sqrtv4sf2_mask */ |
| 26670 | case 1488: /* sse_sqrtv4sf2 */ |
| 26671 | case 1487: /* avx_sqrtv8sf2_mask */ |
| 26672 | case 1486: /* avx_sqrtv8sf2 */ |
| 26673 | case 1485: /* avx512f_sqrtv16sf2_mask_round */ |
| 26674 | case 1484: /* avx512f_sqrtv16sf2_mask */ |
| 26675 | case 1483: /* avx512f_sqrtv16sf2_round */ |
| 26676 | case 1482: /* avx512f_sqrtv16sf2 */ |
| 26677 | case 1466: /* sse_rcpv4sf2 */ |
| 26678 | case 847: /* *sqrtdf2_sse */ |
| 26679 | case 846: /* *sqrtsf2_sse */ |
| 26680 | case 546: /* x86_shrd */ |
| 26681 | case 545: /* x86_64_shrd */ |
| 26682 | case 516: /* x86_shld */ |
| 26683 | case 515: /* x86_64_shld */ |
| 26684 | return 7; |
| 26685 | |
| 26686 | case 386: /* udivmodhiqi3 */ |
| 26687 | case 385: /* *udivmoddi4_noext */ |
| 26688 | case 384: /* *udivmodsi4_noext */ |
| 26689 | case 383: /* *udivmodhi4_noext */ |
| 26690 | case 375: /* divmodhiqi3 */ |
| 26691 | case 374: /* *divmoddi4_noext */ |
| 26692 | case 373: /* *divmodsi4_noext */ |
| 26693 | case 372: /* *divmodhi4_noext */ |
| 26694 | return 65 /* 0x41 */; |
| 26695 | |
| 26696 | case 355: /* *umulsidi3_1 */ |
| 26697 | extract_constrain_insn_cached (insn); |
| 26698 | if (which_alternative == 1) |
| 26699 | { |
| 26700 | return 5; |
| 26701 | } |
| 26702 | else |
| 26703 | { |
| 26704 | return 0; |
| 26705 | } |
| 26706 | |
| 26707 | case 3783: /* sse4_1_dppd */ |
| 26708 | case 3782: /* avx_dppd256 */ |
| 26709 | case 3781: /* sse4_1_dpps */ |
| 26710 | case 3780: /* avx_dpps256 */ |
| 26711 | case 1618: /* avx_hsubv8sf3 */ |
| 26712 | case 1617: /* avx_haddv8sf3 */ |
| 26713 | case 1612: /* avx_hsubv4df3 */ |
| 26714 | case 1611: /* avx_haddv4df3 */ |
| 26715 | case 1610: /* sse3_addsubv4sf3 */ |
| 26716 | case 1609: /* avx_addsubv8sf3 */ |
| 26717 | case 1607: /* avx_addsubv4df3 */ |
| 26718 | case 1594: /* ieee_minv4df3_mask */ |
| 26719 | case 1593: /* ieee_minv4df3 */ |
| 26720 | case 1592: /* ieee_maxv4df3_mask */ |
| 26721 | case 1591: /* ieee_maxv4df3 */ |
| 26722 | case 1590: /* ieee_minv8df3_mask_round */ |
| 26723 | case 1589: /* ieee_minv8df3_mask */ |
| 26724 | case 1588: /* ieee_minv8df3_round */ |
| 26725 | case 1587: /* ieee_minv8df3 */ |
| 26726 | case 1586: /* ieee_maxv8df3_mask_round */ |
| 26727 | case 1585: /* ieee_maxv8df3_mask */ |
| 26728 | case 1584: /* ieee_maxv8df3_round */ |
| 26729 | case 1583: /* ieee_maxv8df3 */ |
| 26730 | case 1582: /* ieee_minv4sf3_mask */ |
| 26731 | case 1581: /* ieee_minv4sf3 */ |
| 26732 | case 1580: /* ieee_maxv4sf3_mask */ |
| 26733 | case 1579: /* ieee_maxv4sf3 */ |
| 26734 | case 1578: /* ieee_minv8sf3_mask */ |
| 26735 | case 1577: /* ieee_minv8sf3 */ |
| 26736 | case 1576: /* ieee_maxv8sf3_mask */ |
| 26737 | case 1575: /* ieee_maxv8sf3 */ |
| 26738 | case 1574: /* ieee_minv16sf3_mask_round */ |
| 26739 | case 1573: /* ieee_minv16sf3_mask */ |
| 26740 | case 1572: /* ieee_minv16sf3_round */ |
| 26741 | case 1571: /* ieee_minv16sf3 */ |
| 26742 | case 1570: /* ieee_maxv16sf3_mask_round */ |
| 26743 | case 1569: /* ieee_maxv16sf3_mask */ |
| 26744 | case 1568: /* ieee_maxv16sf3_round */ |
| 26745 | case 1567: /* ieee_maxv16sf3 */ |
| 26746 | case 1558: /* *sminv4df3_mask_round */ |
| 26747 | case 1557: /* *sminv4df3_mask */ |
| 26748 | case 1556: /* *sminv4df3_round */ |
| 26749 | case 1555: /* *sminv4df3 */ |
| 26750 | case 1554: /* *smaxv4df3_mask_round */ |
| 26751 | case 1553: /* *smaxv4df3_mask */ |
| 26752 | case 1552: /* *smaxv4df3_round */ |
| 26753 | case 1551: /* *smaxv4df3 */ |
| 26754 | case 1550: /* *sminv8df3_mask_round */ |
| 26755 | case 1549: /* *sminv8df3_mask */ |
| 26756 | case 1548: /* *sminv8df3_round */ |
| 26757 | case 1547: /* *sminv8df3 */ |
| 26758 | case 1546: /* *smaxv8df3_mask_round */ |
| 26759 | case 1545: /* *smaxv8df3_mask */ |
| 26760 | case 1544: /* *smaxv8df3_round */ |
| 26761 | case 1543: /* *smaxv8df3 */ |
| 26762 | case 1542: /* *sminv4sf3_mask_round */ |
| 26763 | case 1541: /* *sminv4sf3_mask */ |
| 26764 | case 1540: /* *sminv4sf3_round */ |
| 26765 | case 1539: /* *sminv4sf3 */ |
| 26766 | case 1538: /* *smaxv4sf3_mask_round */ |
| 26767 | case 1537: /* *smaxv4sf3_mask */ |
| 26768 | case 1536: /* *smaxv4sf3_round */ |
| 26769 | case 1535: /* *smaxv4sf3 */ |
| 26770 | case 1534: /* *sminv8sf3_mask_round */ |
| 26771 | case 1533: /* *sminv8sf3_mask */ |
| 26772 | case 1532: /* *sminv8sf3_round */ |
| 26773 | case 1531: /* *sminv8sf3 */ |
| 26774 | case 1530: /* *smaxv8sf3_mask_round */ |
| 26775 | case 1529: /* *smaxv8sf3_mask */ |
| 26776 | case 1528: /* *smaxv8sf3_round */ |
| 26777 | case 1527: /* *smaxv8sf3 */ |
| 26778 | case 1526: /* *sminv16sf3_mask_round */ |
| 26779 | case 1525: /* *sminv16sf3_mask */ |
| 26780 | case 1524: /* *sminv16sf3_round */ |
| 26781 | case 1523: /* *sminv16sf3 */ |
| 26782 | case 1522: /* *smaxv16sf3_mask_round */ |
| 26783 | case 1521: /* *smaxv16sf3_mask */ |
| 26784 | case 1520: /* *smaxv16sf3_round */ |
| 26785 | case 1519: /* *smaxv16sf3 */ |
| 26786 | case 1446: /* sse2_vmmulv2df3_round */ |
| 26787 | case 1445: /* sse2_vmmulv2df3 */ |
| 26788 | case 1440: /* *mulv2df3_mask_round */ |
| 26789 | case 1439: /* *mulv2df3_mask */ |
| 26790 | case 1438: /* *mulv2df3_round */ |
| 26791 | case 1437: /* *mulv2df3 */ |
| 26792 | case 1436: /* *mulv4df3_mask_round */ |
| 26793 | case 1435: /* *mulv4df3_mask */ |
| 26794 | case 1434: /* *mulv4df3_round */ |
| 26795 | case 1433: /* *mulv4df3 */ |
| 26796 | case 1432: /* *mulv8df3_mask_round */ |
| 26797 | case 1431: /* *mulv8df3_mask */ |
| 26798 | case 1430: /* *mulv8df3_round */ |
| 26799 | case 1429: /* *mulv8df3 */ |
| 26800 | case 1428: /* *mulv4sf3_mask_round */ |
| 26801 | case 1427: /* *mulv4sf3_mask */ |
| 26802 | case 1426: /* *mulv4sf3_round */ |
| 26803 | case 1425: /* *mulv4sf3 */ |
| 26804 | case 1424: /* *mulv8sf3_mask_round */ |
| 26805 | case 1423: /* *mulv8sf3_mask */ |
| 26806 | case 1422: /* *mulv8sf3_round */ |
| 26807 | case 1421: /* *mulv8sf3 */ |
| 26808 | case 1420: /* *mulv16sf3_mask_round */ |
| 26809 | case 1419: /* *mulv16sf3_mask */ |
| 26810 | case 1418: /* *mulv16sf3_round */ |
| 26811 | case 1417: /* *mulv16sf3 */ |
| 26812 | case 1416: /* sse2_vmsubv2df3_round */ |
| 26813 | case 1415: /* sse2_vmsubv2df3 */ |
| 26814 | case 1414: /* sse2_vmaddv2df3_round */ |
| 26815 | case 1413: /* sse2_vmaddv2df3 */ |
| 26816 | case 1412: /* sse_vmsubv4sf3_round */ |
| 26817 | case 1411: /* sse_vmsubv4sf3 */ |
| 26818 | case 1410: /* sse_vmaddv4sf3_round */ |
| 26819 | case 1409: /* sse_vmaddv4sf3 */ |
| 26820 | case 1400: /* *subv4df3_mask_round */ |
| 26821 | case 1399: /* *subv4df3_mask */ |
| 26822 | case 1398: /* *subv4df3_round */ |
| 26823 | case 1397: /* *subv4df3 */ |
| 26824 | case 1396: /* *addv4df3_mask_round */ |
| 26825 | case 1395: /* *addv4df3_mask */ |
| 26826 | case 1394: /* *addv4df3_round */ |
| 26827 | case 1393: /* *addv4df3 */ |
| 26828 | case 1392: /* *subv8df3_mask_round */ |
| 26829 | case 1391: /* *subv8df3_mask */ |
| 26830 | case 1390: /* *subv8df3_round */ |
| 26831 | case 1389: /* *subv8df3 */ |
| 26832 | case 1388: /* *addv8df3_mask_round */ |
| 26833 | case 1387: /* *addv8df3_mask */ |
| 26834 | case 1386: /* *addv8df3_round */ |
| 26835 | case 1385: /* *addv8df3 */ |
| 26836 | case 1384: /* *subv4sf3_mask_round */ |
| 26837 | case 1383: /* *subv4sf3_mask */ |
| 26838 | case 1382: /* *subv4sf3_round */ |
| 26839 | case 1381: /* *subv4sf3 */ |
| 26840 | case 1380: /* *addv4sf3_mask_round */ |
| 26841 | case 1379: /* *addv4sf3_mask */ |
| 26842 | case 1378: /* *addv4sf3_round */ |
| 26843 | case 1377: /* *addv4sf3 */ |
| 26844 | case 1376: /* *subv8sf3_mask_round */ |
| 26845 | case 1375: /* *subv8sf3_mask */ |
| 26846 | case 1374: /* *subv8sf3_round */ |
| 26847 | case 1373: /* *subv8sf3 */ |
| 26848 | case 1372: /* *addv8sf3_mask_round */ |
| 26849 | case 1371: /* *addv8sf3_mask */ |
| 26850 | case 1370: /* *addv8sf3_round */ |
| 26851 | case 1369: /* *addv8sf3 */ |
| 26852 | case 1368: /* *subv16sf3_mask_round */ |
| 26853 | case 1367: /* *subv16sf3_mask */ |
| 26854 | case 1366: /* *subv16sf3_round */ |
| 26855 | case 1365: /* *subv16sf3 */ |
| 26856 | case 1364: /* *addv16sf3_mask_round */ |
| 26857 | case 1363: /* *addv16sf3_mask */ |
| 26858 | case 1362: /* *addv16sf3_round */ |
| 26859 | case 1361: /* *addv16sf3 */ |
| 26860 | case 992: /* *ieee_smindf3 */ |
| 26861 | case 991: /* *ieee_smaxdf3 */ |
| 26862 | case 990: /* *ieee_sminsf3 */ |
| 26863 | case 989: /* *ieee_smaxsf3 */ |
| 26864 | case 988: /* smindf3 */ |
| 26865 | case 987: /* smaxdf3 */ |
| 26866 | case 986: /* sminsf3 */ |
| 26867 | case 985: /* smaxsf3 */ |
| 26868 | case 366: /* *umulsi3_highpart_1 */ |
| 26869 | case 365: /* *smulsi3_highpart_1 */ |
| 26870 | case 364: /* *umulsi3_highpart_zext */ |
| 26871 | case 363: /* *smulsi3_highpart_zext */ |
| 26872 | case 357: /* *mulsidi3_1 */ |
| 26873 | case 349: /* *umulvsi4 */ |
| 26874 | case 346: /* *mulvsi4_1 */ |
| 26875 | case 342: /* *mulvsi4 */ |
| 26876 | case 340: /* *mulsi3_1_zext */ |
| 26877 | case 338: /* *mulsi3_1 */ |
| 26878 | return 5; |
| 26879 | |
| 26880 | case 3890: /* ptesttf2 */ |
| 26881 | case 3889: /* avx_ptestv4df */ |
| 26882 | case 3888: /* avx_ptestv8sf */ |
| 26883 | case 3887: /* avx_ptestv4di */ |
| 26884 | case 3886: /* avx_ptestv8si */ |
| 26885 | case 3885: /* avx_ptestv16hi */ |
| 26886 | case 3884: /* avx_ptestv32qi */ |
| 26887 | case 3883: /* sse4_1_ptestv2df */ |
| 26888 | case 3882: /* sse4_1_ptestv4sf */ |
| 26889 | case 3881: /* sse4_1_ptestv2di */ |
| 26890 | case 3880: /* sse4_1_ptestv4si */ |
| 26891 | case 3879: /* sse4_1_ptestv8hi */ |
| 26892 | case 3878: /* sse4_1_ptestv16qi */ |
| 26893 | case 3877: /* avx_vtestpd */ |
| 26894 | case 3876: /* avx_vtestpd256 */ |
| 26895 | case 3875: /* avx_vtestps */ |
| 26896 | case 3874: /* avx_vtestps256 */ |
| 26897 | case 1740: /* sse2_ucomi_round */ |
| 26898 | case 1739: /* sse2_ucomi */ |
| 26899 | case 1738: /* sse_ucomi_round */ |
| 26900 | case 1737: /* sse_ucomi */ |
| 26901 | case 1736: /* sse2_comi_round */ |
| 26902 | case 1735: /* sse2_comi */ |
| 26903 | case 1734: /* sse_comi_round */ |
| 26904 | case 1733: /* sse_comi */ |
| 26905 | case 362: /* *umuldi3_highpart_1 */ |
| 26906 | case 361: /* *smuldi3_highpart_1 */ |
| 26907 | case 360: /* *umulqihi3_1 */ |
| 26908 | case 359: /* *mulqihi3_1 */ |
| 26909 | case 358: /* *mulditi3_1 */ |
| 26910 | case 352: /* *umulvqi4 */ |
| 26911 | case 351: /* *mulvqi4 */ |
| 26912 | case 350: /* *umulvdi4 */ |
| 26913 | case 348: /* *umulvhi4 */ |
| 26914 | case 347: /* *mulvdi4_1 */ |
| 26915 | case 345: /* *mulvhi4_1 */ |
| 26916 | case 344: /* *mulvhi4 */ |
| 26917 | case 343: /* *mulvdi4 */ |
| 26918 | case 341: /* *mulqi3_1 */ |
| 26919 | case 339: /* *muldi3_1 */ |
| 26920 | case 337: /* *mulhi3_1 */ |
| 26921 | return 10 /* 0xa */; |
| 26922 | |
| 26923 | case 241: /* addqi_ext_1 */ |
| 26924 | case 240: /* *adddi_5 */ |
| 26925 | case 239: /* *addsi_5 */ |
| 26926 | case 238: /* *addhi_5 */ |
| 26927 | case 237: /* *addqi_5 */ |
| 26928 | case 236: /* *addsi_4 */ |
| 26929 | case 235: /* *addhi_4 */ |
| 26930 | case 234: /* *addqi_4 */ |
| 26931 | case 233: /* *adddi_4 */ |
| 26932 | case 232: /* *addsi_3_zext */ |
| 26933 | case 231: /* *adddi_3 */ |
| 26934 | case 230: /* *addsi_3 */ |
| 26935 | case 229: /* *addhi_3 */ |
| 26936 | case 228: /* *addqi_3 */ |
| 26937 | case 227: /* *addsi_2_zext */ |
| 26938 | case 226: /* *adddi_2 */ |
| 26939 | case 225: /* *addsi_2 */ |
| 26940 | case 224: /* *addhi_2 */ |
| 26941 | case 223: /* *addqi_2 */ |
| 26942 | if (((cached_type = get_attr_type (insn)) == TYPE_ALU) || (cached_type == TYPE_INCDEC)) |
| 26943 | { |
| 26944 | return 1; |
| 26945 | } |
| 26946 | else |
| 26947 | { |
| 26948 | return 0; |
| 26949 | } |
| 26950 | |
| 26951 | case 222: /* *addqi_1_slp */ |
| 26952 | if (((cached_type = get_attr_type (insn)) == TYPE_ALU1) || (cached_type == TYPE_INCDEC)) |
| 26953 | { |
| 26954 | return 1; |
| 26955 | } |
| 26956 | else |
| 26957 | { |
| 26958 | return 0; |
| 26959 | } |
| 26960 | |
| 26961 | case 221: /* *addqi_1 */ |
| 26962 | extract_constrain_insn_cached (insn); |
| 26963 | if (((cached_type = get_attr_type (insn)) == TYPE_ALU) || (which_alternative == 5) || (cached_type == TYPE_INCDEC)) |
| 26964 | { |
| 26965 | return 1; |
| 26966 | } |
| 26967 | else |
| 26968 | { |
| 26969 | return 0; |
| 26970 | } |
| 26971 | |
| 26972 | case 219: /* addsi_1_zext */ |
| 26973 | extract_constrain_insn_cached (insn); |
| 26974 | if (((cached_type = get_attr_type (insn)) == TYPE_ALU) || (which_alternative == 2) || (cached_type == TYPE_INCDEC)) |
| 26975 | { |
| 26976 | return 1; |
| 26977 | } |
| 26978 | else |
| 26979 | { |
| 26980 | return 0; |
| 26981 | } |
| 26982 | |
| 26983 | case 220: /* *addhi_1 */ |
| 26984 | case 218: /* *adddi_1 */ |
| 26985 | case 217: /* *addsi_1 */ |
| 26986 | extract_constrain_insn_cached (insn); |
| 26987 | if (((cached_type = get_attr_type (insn)) == TYPE_ALU) || (which_alternative == 3) || (cached_type == TYPE_INCDEC)) |
| 26988 | { |
| 26989 | return 1; |
| 26990 | } |
| 26991 | else |
| 26992 | { |
| 26993 | return 0; |
| 26994 | } |
| 26995 | |
| 26996 | case 163: /* *truncxfdf2_mixed */ |
| 26997 | case 162: /* *truncxfsf2_mixed */ |
| 26998 | case 160: /* *truncdfsf_i387 */ |
| 26999 | extract_constrain_insn_cached (insn); |
| 27000 | if (which_alternative != 0) |
| 27001 | { |
| 27002 | return 9; |
| 27003 | } |
| 27004 | else |
| 27005 | { |
| 27006 | return 1; |
| 27007 | } |
| 27008 | |
| 27009 | case 125: /* *movxf_internal */ |
| 27010 | extract_constrain_insn_cached (insn); |
| 27011 | if (((1 << which_alternative) & 0xff8)) |
| 27012 | { |
| 27013 | return 9; |
| 27014 | } |
| 27015 | else |
| 27016 | { |
| 27017 | return 1; |
| 27018 | } |
| 27019 | |
| 27020 | case 123: /* *pushsf */ |
| 27021 | case 122: /* *pushsf_rex64 */ |
| 27022 | extract_constrain_insn_cached (insn); |
| 27023 | if (which_alternative != 1) |
| 27024 | { |
| 27025 | return 9; |
| 27026 | } |
| 27027 | else |
| 27028 | { |
| 27029 | return 2; |
| 27030 | } |
| 27031 | |
| 27032 | case 72: /* *popflsi1 */ |
| 27033 | case 71: /* *pushfldi2 */ |
| 27034 | case 70: /* *pushflsi2 */ |
| 27035 | case 68: /* *popsi1_epilogue */ |
| 27036 | case 66: /* *popsi1 */ |
| 27037 | case 65: /* *pushdi2_prologue */ |
| 27038 | case 64: /* *pushsi2_prologue */ |
| 27039 | case 63: /* *pushhi2 */ |
| 27040 | case 62: /* *pushqi2 */ |
| 27041 | case 61: /* *pushsi2_rex64 */ |
| 27042 | case 60: /* *pushhi2_rex64 */ |
| 27043 | case 59: /* *pushqi2_rex64 */ |
| 27044 | case 58: /* *pushsi2 */ |
| 27045 | return 2; |
| 27046 | |
| 27047 | case 57: /* *pushdi2_rex64 */ |
| 27048 | extract_constrain_insn_cached (insn); |
| 27049 | if (which_alternative != 0) |
| 27050 | { |
| 27051 | return 9; |
| 27052 | } |
| 27053 | else |
| 27054 | { |
| 27055 | return 2; |
| 27056 | } |
| 27057 | |
| 27058 | case 4919: /* avx5124vnniw_vp4dpwssds_maskz */ |
| 27059 | case 4918: /* avx5124vnniw_vp4dpwssds_mask */ |
| 27060 | case 4917: /* avx5124vnniw_vp4dpwssds */ |
| 27061 | case 4916: /* avx5124vnniw_vp4dpwssd_maskz */ |
| 27062 | case 4915: /* avx5124vnniw_vp4dpwssd_mask */ |
| 27063 | case 4914: /* avx5124vnniw_vp4dpwssd */ |
| 27064 | case 4913: /* avx5124fmaddps_4fnmaddss_maskz */ |
| 27065 | case 4912: /* avx5124fmaddps_4fnmaddss_mask */ |
| 27066 | case 4911: /* avx5124fmaddps_4fnmaddss */ |
| 27067 | case 4910: /* avx5124fmaddps_4fnmaddps_maskz */ |
| 27068 | case 4909: /* avx5124fmaddps_4fnmaddps_mask */ |
| 27069 | case 4908: /* avx5124fmaddps_4fnmaddps */ |
| 27070 | case 4907: /* avx5124fmaddps_4fmaddss_maskz */ |
| 27071 | case 4906: /* avx5124fmaddps_4fmaddss_mask */ |
| 27072 | case 4905: /* avx5124fmaddps_4fmaddss */ |
| 27073 | case 4904: /* avx5124fmaddps_4fmaddps_maskz */ |
| 27074 | case 4903: /* avx5124fmaddps_4fmaddps_mask */ |
| 27075 | case 4902: /* avx5124fmaddps_4fmaddps */ |
| 27076 | case 4893: /* vpamdd52huqv2di_mask */ |
| 27077 | case 4892: /* vpamdd52luqv2di_mask */ |
| 27078 | case 4891: /* vpamdd52huqv4di_mask */ |
| 27079 | case 4890: /* vpamdd52luqv4di_mask */ |
| 27080 | case 4889: /* vpamdd52huqv8di_mask */ |
| 27081 | case 4888: /* vpamdd52luqv8di_mask */ |
| 27082 | case 4887: /* vpamdd52huqv2di_maskz_1 */ |
| 27083 | case 4886: /* vpamdd52huqv2di */ |
| 27084 | case 4885: /* vpamdd52luqv2di_maskz_1 */ |
| 27085 | case 4884: /* vpamdd52luqv2di */ |
| 27086 | case 4883: /* vpamdd52huqv4di_maskz_1 */ |
| 27087 | case 4882: /* vpamdd52huqv4di */ |
| 27088 | case 4881: /* vpamdd52luqv4di_maskz_1 */ |
| 27089 | case 4880: /* vpamdd52luqv4di */ |
| 27090 | case 4879: /* vpamdd52huqv8di_maskz_1 */ |
| 27091 | case 4878: /* vpamdd52huqv8di */ |
| 27092 | case 4877: /* vpamdd52luqv8di_maskz_1 */ |
| 27093 | case 4876: /* vpamdd52luqv8di */ |
| 27094 | case 4862: /* conflictv2di_mask */ |
| 27095 | case 4861: /* *conflictv2di */ |
| 27096 | case 4860: /* conflictv4di_mask */ |
| 27097 | case 4859: /* *conflictv4di */ |
| 27098 | case 4858: /* conflictv8di_mask */ |
| 27099 | case 4857: /* *conflictv8di */ |
| 27100 | case 4856: /* conflictv4si_mask */ |
| 27101 | case 4855: /* *conflictv4si */ |
| 27102 | case 4854: /* conflictv8si_mask */ |
| 27103 | case 4853: /* *conflictv8si */ |
| 27104 | case 4852: /* conflictv16si_mask */ |
| 27105 | case 4851: /* *conflictv16si */ |
| 27106 | case 4850: /* clzv2di2_mask */ |
| 27107 | case 4849: /* clzv2di2 */ |
| 27108 | case 4848: /* clzv4di2_mask */ |
| 27109 | case 4847: /* clzv4di2 */ |
| 27110 | case 4846: /* clzv8di2_mask */ |
| 27111 | case 4845: /* clzv8di2 */ |
| 27112 | case 4844: /* clzv4si2_mask */ |
| 27113 | case 4843: /* clzv4si2 */ |
| 27114 | case 4842: /* clzv8si2_mask */ |
| 27115 | case 4841: /* clzv8si2 */ |
| 27116 | case 4840: /* clzv16si2_mask */ |
| 27117 | case 4839: /* clzv16si2 */ |
| 27118 | case 4804: /* avx512dq_vmfpclassv2df */ |
| 27119 | case 4803: /* avx512dq_vmfpclassv4sf */ |
| 27120 | case 4802: /* avx512dq_fpclassv2df_mask */ |
| 27121 | case 4801: /* avx512dq_fpclassv2df */ |
| 27122 | case 4800: /* avx512dq_fpclassv4df_mask */ |
| 27123 | case 4799: /* avx512dq_fpclassv4df */ |
| 27124 | case 4798: /* avx512dq_fpclassv8df_mask */ |
| 27125 | case 4797: /* avx512dq_fpclassv8df */ |
| 27126 | case 4796: /* avx512dq_fpclassv4sf_mask */ |
| 27127 | case 4795: /* avx512dq_fpclassv4sf */ |
| 27128 | case 4794: /* avx512dq_fpclassv8sf_mask */ |
| 27129 | case 4793: /* avx512dq_fpclassv8sf */ |
| 27130 | case 4792: /* avx512dq_fpclassv16sf_mask */ |
| 27131 | case 4791: /* avx512dq_fpclassv16sf */ |
| 27132 | case 4790: /* avx512dq_rangesv2df_round */ |
| 27133 | case 4789: /* avx512dq_rangesv2df */ |
| 27134 | case 4788: /* avx512dq_rangesv4sf_round */ |
| 27135 | case 4787: /* avx512dq_rangesv4sf */ |
| 27136 | case 4786: /* avx512dq_rangepv2df_mask */ |
| 27137 | case 4785: /* avx512dq_rangepv2df */ |
| 27138 | case 4784: /* avx512dq_rangepv4df_mask */ |
| 27139 | case 4783: /* avx512dq_rangepv4df */ |
| 27140 | case 4782: /* avx512dq_rangepv8df_mask_round */ |
| 27141 | case 4781: /* avx512dq_rangepv8df_mask */ |
| 27142 | case 4780: /* avx512dq_rangepv8df_round */ |
| 27143 | case 4779: /* avx512dq_rangepv8df */ |
| 27144 | case 4778: /* avx512dq_rangepv4sf_mask */ |
| 27145 | case 4777: /* avx512dq_rangepv4sf */ |
| 27146 | case 4776: /* avx512dq_rangepv8sf_mask */ |
| 27147 | case 4775: /* avx512dq_rangepv8sf */ |
| 27148 | case 4774: /* avx512dq_rangepv16sf_mask_round */ |
| 27149 | case 4773: /* avx512dq_rangepv16sf_mask */ |
| 27150 | case 4772: /* avx512dq_rangepv16sf_round */ |
| 27151 | case 4771: /* avx512dq_rangepv16sf */ |
| 27152 | case 4249: /* avx512cd_maskw_vec_dupv4si */ |
| 27153 | case 4248: /* avx512cd_maskw_vec_dupv8si */ |
| 27154 | case 4247: /* avx512cd_maskw_vec_dupv16si */ |
| 27155 | case 4246: /* avx512cd_maskb_vec_dupv2di */ |
| 27156 | case 4245: /* avx512cd_maskb_vec_dupv4di */ |
| 27157 | case 4244: /* avx512cd_maskb_vec_dupv8di */ |
| 27158 | case 4056: /* avx_vzeroupper */ |
| 27159 | case 4055: /* *avx_vzeroall */ |
| 27160 | case 4047: /* xop_vpermil2v2df3 */ |
| 27161 | case 4046: /* xop_vpermil2v4df3 */ |
| 27162 | case 4045: /* xop_vpermil2v4sf3 */ |
| 27163 | case 4044: /* xop_vpermil2v8sf3 */ |
| 27164 | case 4031: /* xop_maskcmpv2di3 */ |
| 27165 | case 4030: /* xop_maskcmpv4si3 */ |
| 27166 | case 4029: /* xop_maskcmpv8hi3 */ |
| 27167 | case 4028: /* xop_maskcmpv16qi3 */ |
| 27168 | case 4027: /* *xop_vmfrczv2df2 */ |
| 27169 | case 4026: /* *xop_vmfrczv4sf2 */ |
| 27170 | case 4025: /* xop_frczv4df2 */ |
| 27171 | case 4024: /* xop_frczv8sf2 */ |
| 27172 | case 4023: /* xop_frczv2df2 */ |
| 27173 | case 4022: /* xop_frczv4sf2 */ |
| 27174 | case 4021: /* xop_frczdf2 */ |
| 27175 | case 4020: /* xop_frczsf2 */ |
| 27176 | case 3999: /* xop_pperm_pack_v8hi_v16qi */ |
| 27177 | case 3998: /* xop_pperm_pack_v4si_v8hi */ |
| 27178 | case 3997: /* xop_pperm_pack_v2di_v4si */ |
| 27179 | case 3996: /* xop_pperm */ |
| 27180 | case 3995: /* xop_phsubdq */ |
| 27181 | case 3994: /* xop_phsubwd */ |
| 27182 | case 3993: /* xop_phsubbw */ |
| 27183 | case 3992: /* xop_phaddudq */ |
| 27184 | case 3991: /* xop_phadddq */ |
| 27185 | case 3990: /* xop_phadduwq */ |
| 27186 | case 3989: /* xop_phaddwq */ |
| 27187 | case 3988: /* xop_phadduwd */ |
| 27188 | case 3987: /* xop_phaddwd */ |
| 27189 | case 3986: /* xop_phaddubq */ |
| 27190 | case 3985: /* xop_phaddbq */ |
| 27191 | case 3984: /* xop_phaddubd */ |
| 27192 | case 3983: /* xop_phaddbd */ |
| 27193 | case 3982: /* xop_phaddubw */ |
| 27194 | case 3981: /* xop_phaddbw */ |
| 27195 | case 3980: /* xop_pcmov_v2df */ |
| 27196 | case 3979: /* xop_pcmov_v4df256 */ |
| 27197 | case 3978: /* xop_pcmov_v8df512 */ |
| 27198 | case 3977: /* xop_pcmov_v4sf */ |
| 27199 | case 3976: /* xop_pcmov_v8sf256 */ |
| 27200 | case 3975: /* xop_pcmov_v16sf512 */ |
| 27201 | case 3974: /* xop_pcmov_v2di */ |
| 27202 | case 3973: /* xop_pcmov_v4di256 */ |
| 27203 | case 3972: /* xop_pcmov_v8di512 */ |
| 27204 | case 3971: /* xop_pcmov_v4si */ |
| 27205 | case 3970: /* xop_pcmov_v8si256 */ |
| 27206 | case 3969: /* xop_pcmov_v16si512 */ |
| 27207 | case 3968: /* xop_pcmov_v8hi */ |
| 27208 | case 3967: /* xop_pcmov_v16hi256 */ |
| 27209 | case 3966: /* xop_pcmov_v16qi */ |
| 27210 | case 3965: /* xop_pcmov_v32qi256 */ |
| 27211 | case 3964: /* xop_pmadcsswd */ |
| 27212 | case 3963: /* xop_pmadcswd */ |
| 27213 | case 3962: /* xop_pmacsswd */ |
| 27214 | case 3961: /* xop_pmacswd */ |
| 27215 | case 3960: /* xop_pmacssdqh */ |
| 27216 | case 3959: /* xop_pmacsdqh */ |
| 27217 | case 3958: /* xop_pmacssdql */ |
| 27218 | case 3957: /* xop_pmacsdql */ |
| 27219 | case 3956: /* xop_pmacssdd */ |
| 27220 | case 3955: /* xop_pmacsdd */ |
| 27221 | case 3954: /* xop_pmacssww */ |
| 27222 | case 3953: /* xop_pmacsww */ |
| 27223 | case 3952: /* avx512er_vmrsqrt28v2df_round */ |
| 27224 | case 3951: /* avx512er_vmrsqrt28v2df */ |
| 27225 | case 3950: /* avx512er_vmrsqrt28v4sf_round */ |
| 27226 | case 3949: /* avx512er_vmrsqrt28v4sf */ |
| 27227 | case 3948: /* avx512er_rsqrt28v8df_mask_round */ |
| 27228 | case 3947: /* avx512er_rsqrt28v8df_mask */ |
| 27229 | case 3946: /* *avx512er_rsqrt28v8df_round */ |
| 27230 | case 3945: /* *avx512er_rsqrt28v8df */ |
| 27231 | case 3944: /* avx512er_rsqrt28v16sf_mask_round */ |
| 27232 | case 3943: /* avx512er_rsqrt28v16sf_mask */ |
| 27233 | case 3942: /* *avx512er_rsqrt28v16sf_round */ |
| 27234 | case 3941: /* *avx512er_rsqrt28v16sf */ |
| 27235 | case 3940: /* avx512er_vmrcp28v2df_round */ |
| 27236 | case 3939: /* avx512er_vmrcp28v2df */ |
| 27237 | case 3938: /* avx512er_vmrcp28v4sf_round */ |
| 27238 | case 3937: /* avx512er_vmrcp28v4sf */ |
| 27239 | case 3936: /* avx512er_rcp28v8df_mask_round */ |
| 27240 | case 3935: /* avx512er_rcp28v8df_mask */ |
| 27241 | case 3934: /* *avx512er_rcp28v8df_round */ |
| 27242 | case 3933: /* *avx512er_rcp28v8df */ |
| 27243 | case 3932: /* avx512er_rcp28v16sf_mask_round */ |
| 27244 | case 3931: /* avx512er_rcp28v16sf_mask */ |
| 27245 | case 3930: /* *avx512er_rcp28v16sf_round */ |
| 27246 | case 3929: /* *avx512er_rcp28v16sf */ |
| 27247 | case 3928: /* avx512er_exp2v8df_mask_round */ |
| 27248 | case 3927: /* avx512er_exp2v8df_mask */ |
| 27249 | case 3926: /* avx512er_exp2v8df_round */ |
| 27250 | case 3925: /* avx512er_exp2v8df */ |
| 27251 | case 3924: /* avx512er_exp2v16sf_mask_round */ |
| 27252 | case 3923: /* avx512er_exp2v16sf_mask */ |
| 27253 | case 3922: /* avx512er_exp2v16sf_round */ |
| 27254 | case 3921: /* avx512er_exp2v16sf */ |
| 27255 | case 3920: /* *avx512pf_scatterpfv8didf_mask */ |
| 27256 | case 3919: /* *avx512pf_scatterpfv8didf_mask */ |
| 27257 | case 3918: /* *avx512pf_scatterpfv8sidf_mask */ |
| 27258 | case 3917: /* *avx512pf_scatterpfv8sidf_mask */ |
| 27259 | case 3916: /* *avx512pf_scatterpfv8disf_mask */ |
| 27260 | case 3915: /* *avx512pf_scatterpfv8disf_mask */ |
| 27261 | case 3914: /* *avx512pf_scatterpfv16sisf_mask */ |
| 27262 | case 3913: /* *avx512pf_scatterpfv16sisf_mask */ |
| 27263 | case 3912: /* *avx512pf_gatherpfv8didf_mask */ |
| 27264 | case 3911: /* *avx512pf_gatherpfv8didf_mask */ |
| 27265 | case 3910: /* *avx512pf_gatherpfv8sidf_mask */ |
| 27266 | case 3909: /* *avx512pf_gatherpfv8sidf_mask */ |
| 27267 | case 3908: /* *avx512pf_gatherpfv8disf_mask */ |
| 27268 | case 3907: /* *avx512pf_gatherpfv8disf_mask */ |
| 27269 | case 3906: /* *avx512pf_gatherpfv16sisf_mask */ |
| 27270 | case 3905: /* *avx512pf_gatherpfv16sisf_mask */ |
| 27271 | case 3771: /* sse4a_insertq */ |
| 27272 | case 3770: /* sse4a_insertqi */ |
| 27273 | case 3769: /* sse4a_extrq */ |
| 27274 | case 3768: /* sse4a_extrqi */ |
| 27275 | case 2443: /* avx512f_movsldup512_mask */ |
| 27276 | case 2442: /* *avx512f_movsldup512 */ |
| 27277 | case 2441: /* sse3_movsldup_mask */ |
| 27278 | case 2440: /* sse3_movsldup */ |
| 27279 | case 2439: /* avx_movsldup256_mask */ |
| 27280 | case 2438: /* avx_movsldup256 */ |
| 27281 | case 2437: /* avx512f_movshdup512_mask */ |
| 27282 | case 2436: /* *avx512f_movshdup512 */ |
| 27283 | case 2435: /* sse3_movshdup_mask */ |
| 27284 | case 2434: /* sse3_movshdup */ |
| 27285 | case 2433: /* avx_movshdup256_mask */ |
| 27286 | case 2432: /* avx_movshdup256 */ |
| 27287 | case 2102: /* *fma4i_vmfnmsub_v2df */ |
| 27288 | case 2101: /* *fma4i_vmfnmsub_v4sf */ |
| 27289 | case 2100: /* *fma4i_vmfnmadd_v2df */ |
| 27290 | case 2099: /* *fma4i_vmfnmadd_v4sf */ |
| 27291 | case 2098: /* *fma4i_vmfmsub_v2df */ |
| 27292 | case 2097: /* *fma4i_vmfmsub_v4sf */ |
| 27293 | case 2096: /* *fma4i_vmfmadd_v2df */ |
| 27294 | case 2095: /* *fma4i_vmfmadd_v4sf */ |
| 27295 | case 2094: /* *fmai_fnmsub_v2df_round */ |
| 27296 | case 2093: /* *fmai_fnmsub_v2df */ |
| 27297 | case 2092: /* *fmai_fnmsub_v4sf_round */ |
| 27298 | case 2091: /* *fmai_fnmsub_v4sf */ |
| 27299 | case 2090: /* *fmai_fnmadd_v2df_round */ |
| 27300 | case 2089: /* *fmai_fnmadd_v2df */ |
| 27301 | case 2088: /* *fmai_fnmadd_v4sf_round */ |
| 27302 | case 2087: /* *fmai_fnmadd_v4sf */ |
| 27303 | case 2086: /* *fmai_fmsub_v2df */ |
| 27304 | case 2085: /* *fmai_fmsub_v2df */ |
| 27305 | case 2084: /* *fmai_fmsub_v4sf */ |
| 27306 | case 2083: /* *fmai_fmsub_v4sf */ |
| 27307 | case 2082: /* *fmai_fmadd_v2df */ |
| 27308 | case 2081: /* *fmai_fmadd_v2df */ |
| 27309 | case 2080: /* *fmai_fmadd_v4sf */ |
| 27310 | case 2079: /* *fmai_fmadd_v4sf */ |
| 27311 | case 2078: /* avx512vl_fmsubadd_v2df_mask3_round */ |
| 27312 | case 2077: /* avx512vl_fmsubadd_v2df_mask3 */ |
| 27313 | case 2076: /* avx512vl_fmsubadd_v4df_mask3_round */ |
| 27314 | case 2075: /* avx512vl_fmsubadd_v4df_mask3 */ |
| 27315 | case 2074: /* avx512f_fmsubadd_v8df_mask3_round */ |
| 27316 | case 2073: /* avx512f_fmsubadd_v8df_mask3 */ |
| 27317 | case 2072: /* avx512vl_fmsubadd_v4sf_mask3_round */ |
| 27318 | case 2071: /* avx512vl_fmsubadd_v4sf_mask3 */ |
| 27319 | case 2070: /* avx512vl_fmsubadd_v8sf_mask3_round */ |
| 27320 | case 2069: /* avx512vl_fmsubadd_v8sf_mask3 */ |
| 27321 | case 2068: /* avx512f_fmsubadd_v16sf_mask3_round */ |
| 27322 | case 2067: /* avx512f_fmsubadd_v16sf_mask3 */ |
| 27323 | case 2066: /* avx512vl_fmsubadd_v2df_mask_round */ |
| 27324 | case 2065: /* avx512vl_fmsubadd_v2df_mask */ |
| 27325 | case 2064: /* avx512vl_fmsubadd_v4df_mask_round */ |
| 27326 | case 2063: /* avx512vl_fmsubadd_v4df_mask */ |
| 27327 | case 2062: /* avx512f_fmsubadd_v8df_mask_round */ |
| 27328 | case 2061: /* avx512f_fmsubadd_v8df_mask */ |
| 27329 | case 2060: /* avx512vl_fmsubadd_v4sf_mask_round */ |
| 27330 | case 2059: /* avx512vl_fmsubadd_v4sf_mask */ |
| 27331 | case 2058: /* avx512vl_fmsubadd_v8sf_mask_round */ |
| 27332 | case 2057: /* avx512vl_fmsubadd_v8sf_mask */ |
| 27333 | case 2056: /* avx512f_fmsubadd_v16sf_mask_round */ |
| 27334 | case 2055: /* avx512f_fmsubadd_v16sf_mask */ |
| 27335 | case 2054: /* fma_fmsubadd_v2df_maskz_1 */ |
| 27336 | case 2053: /* *fma_fmsubadd_v2df */ |
| 27337 | case 2052: /* fma_fmsubadd_v4df_maskz_1 */ |
| 27338 | case 2051: /* *fma_fmsubadd_v4df */ |
| 27339 | case 2050: /* fma_fmsubadd_v8df_maskz_1_round */ |
| 27340 | case 2049: /* fma_fmsubadd_v8df_maskz_1 */ |
| 27341 | case 2048: /* *fma_fmsubadd_v8df_round */ |
| 27342 | case 2047: /* *fma_fmsubadd_v8df */ |
| 27343 | case 2046: /* *fma_fmsubadd_df */ |
| 27344 | case 2045: /* fma_fmsubadd_v4sf_maskz_1 */ |
| 27345 | case 2044: /* *fma_fmsubadd_v4sf */ |
| 27346 | case 2043: /* fma_fmsubadd_v8sf_maskz_1 */ |
| 27347 | case 2042: /* *fma_fmsubadd_v8sf */ |
| 27348 | case 2041: /* fma_fmsubadd_v16sf_maskz_1_round */ |
| 27349 | case 2040: /* fma_fmsubadd_v16sf_maskz_1 */ |
| 27350 | case 2039: /* *fma_fmsubadd_v16sf_round */ |
| 27351 | case 2038: /* *fma_fmsubadd_v16sf */ |
| 27352 | case 2037: /* *fma_fmsubadd_sf */ |
| 27353 | case 2036: /* *fma_fmsubadd_v2df */ |
| 27354 | case 2035: /* *fma_fmsubadd_v4df */ |
| 27355 | case 2034: /* *fma_fmsubadd_v4sf */ |
| 27356 | case 2033: /* *fma_fmsubadd_v8sf */ |
| 27357 | case 2032: /* avx512vl_fmaddsub_v2df_mask3_round */ |
| 27358 | case 2031: /* avx512vl_fmaddsub_v2df_mask3 */ |
| 27359 | case 2030: /* avx512vl_fmaddsub_v4df_mask3_round */ |
| 27360 | case 2029: /* avx512vl_fmaddsub_v4df_mask3 */ |
| 27361 | case 2028: /* avx512f_fmaddsub_v8df_mask3_round */ |
| 27362 | case 2027: /* avx512f_fmaddsub_v8df_mask3 */ |
| 27363 | case 2026: /* avx512vl_fmaddsub_v4sf_mask3_round */ |
| 27364 | case 2025: /* avx512vl_fmaddsub_v4sf_mask3 */ |
| 27365 | case 2024: /* avx512vl_fmaddsub_v8sf_mask3_round */ |
| 27366 | case 2023: /* avx512vl_fmaddsub_v8sf_mask3 */ |
| 27367 | case 2022: /* avx512f_fmaddsub_v16sf_mask3_round */ |
| 27368 | case 2021: /* avx512f_fmaddsub_v16sf_mask3 */ |
| 27369 | case 2020: /* avx512vl_fmaddsub_v2df_mask_round */ |
| 27370 | case 2019: /* avx512vl_fmaddsub_v2df_mask */ |
| 27371 | case 2018: /* avx512vl_fmaddsub_v4df_mask_round */ |
| 27372 | case 2017: /* avx512vl_fmaddsub_v4df_mask */ |
| 27373 | case 2016: /* avx512f_fmaddsub_v8df_mask_round */ |
| 27374 | case 2015: /* avx512f_fmaddsub_v8df_mask */ |
| 27375 | case 2014: /* avx512vl_fmaddsub_v4sf_mask_round */ |
| 27376 | case 2013: /* avx512vl_fmaddsub_v4sf_mask */ |
| 27377 | case 2012: /* avx512vl_fmaddsub_v8sf_mask_round */ |
| 27378 | case 2011: /* avx512vl_fmaddsub_v8sf_mask */ |
| 27379 | case 2010: /* avx512f_fmaddsub_v16sf_mask_round */ |
| 27380 | case 2009: /* avx512f_fmaddsub_v16sf_mask */ |
| 27381 | case 2008: /* fma_fmaddsub_v2df_maskz_1 */ |
| 27382 | case 2007: /* *fma_fmaddsub_v2df */ |
| 27383 | case 2006: /* fma_fmaddsub_v4df_maskz_1 */ |
| 27384 | case 2005: /* *fma_fmaddsub_v4df */ |
| 27385 | case 2004: /* fma_fmaddsub_v8df_maskz_1_round */ |
| 27386 | case 2003: /* fma_fmaddsub_v8df_maskz_1 */ |
| 27387 | case 2002: /* *fma_fmaddsub_v8df_round */ |
| 27388 | case 2001: /* *fma_fmaddsub_v8df */ |
| 27389 | case 2000: /* *fma_fmaddsub_df */ |
| 27390 | case 1999: /* fma_fmaddsub_v4sf_maskz_1 */ |
| 27391 | case 1998: /* *fma_fmaddsub_v4sf */ |
| 27392 | case 1997: /* fma_fmaddsub_v8sf_maskz_1 */ |
| 27393 | case 1996: /* *fma_fmaddsub_v8sf */ |
| 27394 | case 1995: /* fma_fmaddsub_v16sf_maskz_1_round */ |
| 27395 | case 1994: /* fma_fmaddsub_v16sf_maskz_1 */ |
| 27396 | case 1993: /* *fma_fmaddsub_v16sf_round */ |
| 27397 | case 1992: /* *fma_fmaddsub_v16sf */ |
| 27398 | case 1991: /* *fma_fmaddsub_sf */ |
| 27399 | case 1990: /* *fma_fmaddsub_v2df */ |
| 27400 | case 1989: /* *fma_fmaddsub_v4df */ |
| 27401 | case 1988: /* *fma_fmaddsub_v4sf */ |
| 27402 | case 1987: /* *fma_fmaddsub_v8sf */ |
| 27403 | case 1986: /* avx512vl_fnmsub_v2df_mask3_round */ |
| 27404 | case 1985: /* avx512vl_fnmsub_v2df_mask3 */ |
| 27405 | case 1984: /* avx512vl_fnmsub_v4df_mask3_round */ |
| 27406 | case 1983: /* avx512vl_fnmsub_v4df_mask3 */ |
| 27407 | case 1982: /* avx512f_fnmsub_v8df_mask3_round */ |
| 27408 | case 1981: /* avx512f_fnmsub_v8df_mask3 */ |
| 27409 | case 1980: /* avx512vl_fnmsub_v4sf_mask3_round */ |
| 27410 | case 1979: /* avx512vl_fnmsub_v4sf_mask3 */ |
| 27411 | case 1978: /* avx512vl_fnmsub_v8sf_mask3_round */ |
| 27412 | case 1977: /* avx512vl_fnmsub_v8sf_mask3 */ |
| 27413 | case 1976: /* avx512f_fnmsub_v16sf_mask3_round */ |
| 27414 | case 1975: /* avx512f_fnmsub_v16sf_mask3 */ |
| 27415 | case 1974: /* avx512vl_fnmsub_v2df_mask */ |
| 27416 | case 1973: /* avx512vl_fnmsub_v4df_mask */ |
| 27417 | case 1972: /* avx512f_fnmsub_v8df_mask_round */ |
| 27418 | case 1971: /* avx512f_fnmsub_v8df_mask */ |
| 27419 | case 1970: /* avx512vl_fnmsub_v4sf_mask */ |
| 27420 | case 1969: /* avx512vl_fnmsub_v8sf_mask */ |
| 27421 | case 1968: /* avx512f_fnmsub_v16sf_mask_round */ |
| 27422 | case 1967: /* avx512f_fnmsub_v16sf_mask */ |
| 27423 | case 1966: /* fma_fnmsub_v2df_maskz_1 */ |
| 27424 | case 1965: /* *fma_fnmsub_v2df */ |
| 27425 | case 1964: /* fma_fnmsub_v4df_maskz_1 */ |
| 27426 | case 1963: /* *fma_fnmsub_v4df */ |
| 27427 | case 1962: /* fma_fnmsub_v8df_maskz_1_round */ |
| 27428 | case 1961: /* fma_fnmsub_v8df_maskz_1 */ |
| 27429 | case 1960: /* *fma_fnmsub_v8df_round */ |
| 27430 | case 1959: /* *fma_fnmsub_v8df */ |
| 27431 | case 1958: /* *fma_fnmsub_df */ |
| 27432 | case 1957: /* fma_fnmsub_v4sf_maskz_1 */ |
| 27433 | case 1956: /* *fma_fnmsub_v4sf */ |
| 27434 | case 1955: /* fma_fnmsub_v8sf_maskz_1 */ |
| 27435 | case 1954: /* *fma_fnmsub_v8sf */ |
| 27436 | case 1953: /* fma_fnmsub_v16sf_maskz_1_round */ |
| 27437 | case 1952: /* fma_fnmsub_v16sf_maskz_1 */ |
| 27438 | case 1951: /* *fma_fnmsub_v16sf_round */ |
| 27439 | case 1950: /* *fma_fnmsub_v16sf */ |
| 27440 | case 1949: /* *fma_fnmsub_sf */ |
| 27441 | case 1948: /* *fma_fnmsub_v4df */ |
| 27442 | case 1947: /* *fma_fnmsub_v4df */ |
| 27443 | case 1946: /* *fma_fnmsub_v4df */ |
| 27444 | case 1945: /* *fma_fnmsub_v4df */ |
| 27445 | case 1944: /* *fma_fnmsub_v8sf */ |
| 27446 | case 1943: /* *fma_fnmsub_v8sf */ |
| 27447 | case 1942: /* *fma_fnmsub_v8sf */ |
| 27448 | case 1941: /* *fma_fnmsub_v8sf */ |
| 27449 | case 1940: /* *fma_fnmsub_v2df */ |
| 27450 | case 1939: /* *fma_fnmsub_v2df */ |
| 27451 | case 1938: /* *fma_fnmsub_v2df */ |
| 27452 | case 1937: /* *fma_fnmsub_v2df */ |
| 27453 | case 1936: /* *fma_fnmsub_v4sf */ |
| 27454 | case 1935: /* *fma_fnmsub_v4sf */ |
| 27455 | case 1934: /* *fma_fnmsub_v4sf */ |
| 27456 | case 1933: /* *fma_fnmsub_v4sf */ |
| 27457 | case 1932: /* *fma_fnmsub_df */ |
| 27458 | case 1931: /* *fma_fnmsub_df */ |
| 27459 | case 1930: /* *fma_fnmsub_sf */ |
| 27460 | case 1929: /* *fma_fnmsub_sf */ |
| 27461 | case 1928: /* avx512vl_fnmadd_v2df_mask3 */ |
| 27462 | case 1927: /* avx512vl_fnmadd_v4df_mask3 */ |
| 27463 | case 1926: /* avx512f_fnmadd_v8df_mask3_round */ |
| 27464 | case 1925: /* avx512f_fnmadd_v8df_mask3 */ |
| 27465 | case 1924: /* avx512vl_fnmadd_v4sf_mask3 */ |
| 27466 | case 1923: /* avx512vl_fnmadd_v8sf_mask3 */ |
| 27467 | case 1922: /* avx512f_fnmadd_v16sf_mask3_round */ |
| 27468 | case 1921: /* avx512f_fnmadd_v16sf_mask3 */ |
| 27469 | case 1920: /* avx512vl_fnmadd_v2df_mask */ |
| 27470 | case 1919: /* avx512vl_fnmadd_v4df_mask */ |
| 27471 | case 1918: /* avx512f_fnmadd_v8df_mask_round */ |
| 27472 | case 1917: /* avx512f_fnmadd_v8df_mask */ |
| 27473 | case 1916: /* avx512vl_fnmadd_v4sf_mask */ |
| 27474 | case 1915: /* avx512vl_fnmadd_v8sf_mask */ |
| 27475 | case 1914: /* avx512f_fnmadd_v16sf_mask_round */ |
| 27476 | case 1913: /* avx512f_fnmadd_v16sf_mask */ |
| 27477 | case 1912: /* fma_fnmadd_v2df_maskz_1 */ |
| 27478 | case 1911: /* *fma_fnmadd_v2df */ |
| 27479 | case 1910: /* fma_fnmadd_v4df_maskz_1 */ |
| 27480 | case 1909: /* *fma_fnmadd_v4df */ |
| 27481 | case 1908: /* fma_fnmadd_v8df_maskz_1_round */ |
| 27482 | case 1907: /* fma_fnmadd_v8df_maskz_1 */ |
| 27483 | case 1906: /* *fma_fnmadd_v8df_round */ |
| 27484 | case 1905: /* *fma_fnmadd_v8df */ |
| 27485 | case 1904: /* *fma_fnmadd_df */ |
| 27486 | case 1903: /* fma_fnmadd_v4sf_maskz_1 */ |
| 27487 | case 1902: /* *fma_fnmadd_v4sf */ |
| 27488 | case 1901: /* fma_fnmadd_v8sf_maskz_1 */ |
| 27489 | case 1900: /* *fma_fnmadd_v8sf */ |
| 27490 | case 1899: /* fma_fnmadd_v16sf_maskz_1_round */ |
| 27491 | case 1898: /* fma_fnmadd_v16sf_maskz_1 */ |
| 27492 | case 1897: /* *fma_fnmadd_v16sf_round */ |
| 27493 | case 1896: /* *fma_fnmadd_v16sf */ |
| 27494 | case 1895: /* *fma_fnmadd_sf */ |
| 27495 | case 1894: /* *fma_fnmadd_v4df */ |
| 27496 | case 1893: /* *fma_fnmadd_v8sf */ |
| 27497 | case 1892: /* *fma_fnmadd_v2df */ |
| 27498 | case 1891: /* *fma_fnmadd_v4sf */ |
| 27499 | case 1890: /* *fma_fnmadd_df */ |
| 27500 | case 1889: /* *fma_fnmadd_sf */ |
| 27501 | case 1888: /* avx512vl_fmsub_v2df_mask3 */ |
| 27502 | case 1887: /* avx512vl_fmsub_v4df_mask3 */ |
| 27503 | case 1886: /* avx512f_fmsub_v8df_mask3_round */ |
| 27504 | case 1885: /* avx512f_fmsub_v8df_mask3 */ |
| 27505 | case 1884: /* avx512vl_fmsub_v4sf_mask3 */ |
| 27506 | case 1883: /* avx512vl_fmsub_v8sf_mask3 */ |
| 27507 | case 1882: /* avx512f_fmsub_v16sf_mask3_round */ |
| 27508 | case 1881: /* avx512f_fmsub_v16sf_mask3 */ |
| 27509 | case 1880: /* avx512vl_fmsub_v2df_mask_round */ |
| 27510 | case 1879: /* avx512vl_fmsub_v2df_mask */ |
| 27511 | case 1878: /* avx512vl_fmsub_v4df_mask_round */ |
| 27512 | case 1877: /* avx512vl_fmsub_v4df_mask */ |
| 27513 | case 1876: /* avx512f_fmsub_v8df_mask_round */ |
| 27514 | case 1875: /* avx512f_fmsub_v8df_mask */ |
| 27515 | case 1874: /* avx512vl_fmsub_v4sf_mask_round */ |
| 27516 | case 1873: /* avx512vl_fmsub_v4sf_mask */ |
| 27517 | case 1872: /* avx512vl_fmsub_v8sf_mask_round */ |
| 27518 | case 1871: /* avx512vl_fmsub_v8sf_mask */ |
| 27519 | case 1870: /* avx512f_fmsub_v16sf_mask_round */ |
| 27520 | case 1869: /* avx512f_fmsub_v16sf_mask */ |
| 27521 | case 1868: /* fma_fmsub_v2df_maskz_1 */ |
| 27522 | case 1867: /* *fma_fmsub_v2df */ |
| 27523 | case 1866: /* fma_fmsub_v4df_maskz_1 */ |
| 27524 | case 1865: /* *fma_fmsub_v4df */ |
| 27525 | case 1864: /* fma_fmsub_v8df_maskz_1_round */ |
| 27526 | case 1863: /* fma_fmsub_v8df_maskz_1 */ |
| 27527 | case 1862: /* *fma_fmsub_v8df_round */ |
| 27528 | case 1861: /* *fma_fmsub_v8df */ |
| 27529 | case 1860: /* *fma_fmsub_df */ |
| 27530 | case 1859: /* fma_fmsub_v4sf_maskz_1 */ |
| 27531 | case 1858: /* *fma_fmsub_v4sf */ |
| 27532 | case 1857: /* fma_fmsub_v8sf_maskz_1 */ |
| 27533 | case 1856: /* *fma_fmsub_v8sf */ |
| 27534 | case 1855: /* fma_fmsub_v16sf_maskz_1_round */ |
| 27535 | case 1854: /* fma_fmsub_v16sf_maskz_1 */ |
| 27536 | case 1853: /* *fma_fmsub_v16sf_round */ |
| 27537 | case 1852: /* *fma_fmsub_v16sf */ |
| 27538 | case 1851: /* *fma_fmsub_sf */ |
| 27539 | case 1850: /* *fma_fmsub_v4df */ |
| 27540 | case 1849: /* *fma_fmsub_v8sf */ |
| 27541 | case 1848: /* *fma_fmsub_v2df */ |
| 27542 | case 1847: /* *fma_fmsub_v4sf */ |
| 27543 | case 1846: /* *fma_fmsub_df */ |
| 27544 | case 1845: /* *fma_fmsub_sf */ |
| 27545 | case 1844: /* avx512vl_fmadd_v2df_mask3_round */ |
| 27546 | case 1843: /* avx512vl_fmadd_v2df_mask3 */ |
| 27547 | case 1842: /* avx512vl_fmadd_v4df_mask3_round */ |
| 27548 | case 1841: /* avx512vl_fmadd_v4df_mask3 */ |
| 27549 | case 1840: /* avx512f_fmadd_v8df_mask3_round */ |
| 27550 | case 1839: /* avx512f_fmadd_v8df_mask3 */ |
| 27551 | case 1838: /* avx512vl_fmadd_v4sf_mask3_round */ |
| 27552 | case 1837: /* avx512vl_fmadd_v4sf_mask3 */ |
| 27553 | case 1836: /* avx512vl_fmadd_v8sf_mask3_round */ |
| 27554 | case 1835: /* avx512vl_fmadd_v8sf_mask3 */ |
| 27555 | case 1834: /* avx512f_fmadd_v16sf_mask3_round */ |
| 27556 | case 1833: /* avx512f_fmadd_v16sf_mask3 */ |
| 27557 | case 1832: /* avx512vl_fmadd_v2df_mask */ |
| 27558 | case 1831: /* avx512vl_fmadd_v4df_mask */ |
| 27559 | case 1830: /* avx512f_fmadd_v8df_mask_round */ |
| 27560 | case 1829: /* avx512f_fmadd_v8df_mask */ |
| 27561 | case 1828: /* avx512vl_fmadd_v4sf_mask */ |
| 27562 | case 1827: /* avx512vl_fmadd_v8sf_mask */ |
| 27563 | case 1826: /* avx512f_fmadd_v16sf_mask_round */ |
| 27564 | case 1825: /* avx512f_fmadd_v16sf_mask */ |
| 27565 | case 1824: /* fma_fmadd_v2df_maskz_1 */ |
| 27566 | case 1823: /* *fma_fmadd_v2df */ |
| 27567 | case 1822: /* fma_fmadd_v4df_maskz_1 */ |
| 27568 | case 1821: /* *fma_fmadd_v4df */ |
| 27569 | case 1820: /* fma_fmadd_v8df_maskz_1_round */ |
| 27570 | case 1819: /* fma_fmadd_v8df_maskz_1 */ |
| 27571 | case 1818: /* *fma_fmadd_v8df_round */ |
| 27572 | case 1817: /* *fma_fmadd_v8df */ |
| 27573 | case 1816: /* *fma_fmadd_df */ |
| 27574 | case 1815: /* fma_fmadd_v4sf_maskz_1 */ |
| 27575 | case 1814: /* *fma_fmadd_v4sf */ |
| 27576 | case 1813: /* fma_fmadd_v8sf_maskz_1 */ |
| 27577 | case 1812: /* *fma_fmadd_v8sf */ |
| 27578 | case 1811: /* fma_fmadd_v16sf_maskz_1_round */ |
| 27579 | case 1810: /* fma_fmadd_v16sf_maskz_1 */ |
| 27580 | case 1809: /* *fma_fmadd_v16sf_round */ |
| 27581 | case 1808: /* *fma_fmadd_v16sf */ |
| 27582 | case 1807: /* *fma_fmadd_sf */ |
| 27583 | case 1806: /* *fma_fmadd_v4df */ |
| 27584 | case 1805: /* *fma_fmadd_v8sf */ |
| 27585 | case 1804: /* *fma_fmadd_v2df */ |
| 27586 | case 1803: /* *fma_fmadd_v4sf */ |
| 27587 | case 1802: /* *fma_fmadd_df */ |
| 27588 | case 1801: /* *fma_fmadd_sf */ |
| 27589 | case 1634: /* reducesv2df */ |
| 27590 | case 1633: /* reducesv4sf */ |
| 27591 | case 1632: /* reducepv2df_mask */ |
| 27592 | case 1631: /* *reducepv2df */ |
| 27593 | case 1630: /* reducepv4df_mask */ |
| 27594 | case 1629: /* *reducepv4df */ |
| 27595 | case 1628: /* reducepv8df_mask */ |
| 27596 | case 1627: /* *reducepv8df */ |
| 27597 | case 1626: /* reducepv4sf_mask */ |
| 27598 | case 1625: /* *reducepv4sf */ |
| 27599 | case 1624: /* reducepv8sf_mask */ |
| 27600 | case 1623: /* *reducepv8sf */ |
| 27601 | case 1622: /* reducepv16sf_mask */ |
| 27602 | case 1621: /* *reducepv16sf */ |
| 27603 | case 1606: /* sse2_vmsminv2df3_round */ |
| 27604 | case 1605: /* sse2_vmsminv2df3 */ |
| 27605 | case 1604: /* sse2_vmsmaxv2df3_round */ |
| 27606 | case 1603: /* sse2_vmsmaxv2df3 */ |
| 27607 | case 1602: /* sse_vmsminv4sf3_round */ |
| 27608 | case 1601: /* sse_vmsminv4sf3 */ |
| 27609 | case 1600: /* sse_vmsmaxv4sf3_round */ |
| 27610 | case 1599: /* sse_vmsmaxv4sf3 */ |
| 27611 | case 1518: /* sse_vmrsqrtv4sf2 */ |
| 27612 | case 1517: /* rsqrt14v2df */ |
| 27613 | case 1516: /* rsqrt14v4sf */ |
| 27614 | case 1515: /* rsqrt14v2df_mask */ |
| 27615 | case 1514: /* *rsqrt14v2df */ |
| 27616 | case 1513: /* rsqrt14v4df_mask */ |
| 27617 | case 1512: /* *rsqrt14v4df */ |
| 27618 | case 1511: /* rsqrt14v8df_mask */ |
| 27619 | case 1510: /* *rsqrt14v8df */ |
| 27620 | case 1509: /* rsqrt14v4sf_mask */ |
| 27621 | case 1508: /* *rsqrt14v4sf */ |
| 27622 | case 1507: /* rsqrt14v8sf_mask */ |
| 27623 | case 1506: /* *rsqrt14v8sf */ |
| 27624 | case 1505: /* rsqrt14v16sf_mask */ |
| 27625 | case 1504: /* *rsqrt14v16sf */ |
| 27626 | case 1503: /* sse_rsqrtv4sf2 */ |
| 27627 | case 1502: /* avx_rsqrtv8sf2 */ |
| 27628 | case 1481: /* srcp14v2df */ |
| 27629 | case 1480: /* srcp14v4sf */ |
| 27630 | case 1479: /* rcp14v2df_mask */ |
| 27631 | case 1478: /* *rcp14v2df */ |
| 27632 | case 1477: /* rcp14v4df_mask */ |
| 27633 | case 1476: /* *rcp14v4df */ |
| 27634 | case 1475: /* rcp14v8df_mask */ |
| 27635 | case 1474: /* *rcp14v8df */ |
| 27636 | case 1473: /* rcp14v4sf_mask */ |
| 27637 | case 1472: /* *rcp14v4sf */ |
| 27638 | case 1471: /* rcp14v8sf_mask */ |
| 27639 | case 1470: /* *rcp14v8sf */ |
| 27640 | case 1469: /* rcp14v16sf_mask */ |
| 27641 | case 1468: /* *rcp14v16sf */ |
| 27642 | case 1465: /* avx_rcpv8sf2 */ |
| 27643 | case 1352: /* kunpckhi */ |
| 27644 | case 1351: /* kortestdi */ |
| 27645 | case 1350: /* kortestsi */ |
| 27646 | case 1349: /* kortesthi */ |
| 27647 | case 1348: /* kortestqi */ |
| 27648 | case 1347: /* ktestdi */ |
| 27649 | case 1346: /* ktestsi */ |
| 27650 | case 1345: /* ktesthi */ |
| 27651 | case 1344: /* ktestqi */ |
| 27652 | case 1343: /* klshiftrtdi */ |
| 27653 | case 1342: /* kashiftdi */ |
| 27654 | case 1341: /* klshiftrtsi */ |
| 27655 | case 1340: /* kashiftsi */ |
| 27656 | case 1339: /* klshiftrthi */ |
| 27657 | case 1338: /* kashifthi */ |
| 27658 | case 1337: /* klshiftrtqi */ |
| 27659 | case 1336: /* kashiftqi */ |
| 27660 | case 1335: /* kadddi */ |
| 27661 | case 1334: /* kaddsi */ |
| 27662 | case 1333: /* kaddhi */ |
| 27663 | case 1332: /* kaddqi */ |
| 27664 | case 1331: /* knotdi */ |
| 27665 | case 1330: /* knotsi */ |
| 27666 | case 1329: /* knothi */ |
| 27667 | case 1328: /* knotqi */ |
| 27668 | case 1327: /* kxnordi */ |
| 27669 | case 1326: /* kxnorsi */ |
| 27670 | case 1325: /* kxnorhi */ |
| 27671 | case 1324: /* kxnorqi */ |
| 27672 | case 1323: /* kandndi */ |
| 27673 | case 1322: /* kandnsi */ |
| 27674 | case 1321: /* kandnhi */ |
| 27675 | case 1320: /* kandnqi */ |
| 27676 | case 1319: /* kxordi */ |
| 27677 | case 1318: /* kiordi */ |
| 27678 | case 1317: /* kanddi */ |
| 27679 | case 1316: /* kxorsi */ |
| 27680 | case 1315: /* kiorsi */ |
| 27681 | case 1314: /* kandsi */ |
| 27682 | case 1313: /* kxorhi */ |
| 27683 | case 1312: /* kiorhi */ |
| 27684 | case 1311: /* kandhi */ |
| 27685 | case 1310: /* kxorqi */ |
| 27686 | case 1309: /* kiorqi */ |
| 27687 | case 1308: /* kandqi */ |
| 27688 | case 1217: /* *mmx_femms */ |
| 27689 | case 1216: /* *mmx_emms */ |
| 27690 | case 1215: /* *mmx_maskmovq */ |
| 27691 | case 1214: /* *mmx_maskmovq */ |
| 27692 | case 1213: /* mmx_pmovmskb */ |
| 27693 | case 1212: /* mmx_psadbw */ |
| 27694 | case 1211: /* *mmx_uavgv4hi3 */ |
| 27695 | case 1210: /* *mmx_uavgv8qi3 */ |
| 27696 | case 1206: /* *mmx_concatv2si */ |
| 27697 | case 1205: /* *vec_dupv2si */ |
| 27698 | case 1204: /* *vec_dupv4hi */ |
| 27699 | case 1203: /* mmx_pswapdv2si2 */ |
| 27700 | case 1202: /* mmx_pshufw_1 */ |
| 27701 | case 1201: /* mmx_pextrw */ |
| 27702 | case 1200: /* *mmx_pinsrw */ |
| 27703 | case 1199: /* mmx_punpckldq */ |
| 27704 | case 1198: /* mmx_punpckhdq */ |
| 27705 | case 1197: /* mmx_punpcklwd */ |
| 27706 | case 1196: /* mmx_punpckhwd */ |
| 27707 | case 1195: /* mmx_punpcklbw */ |
| 27708 | case 1194: /* mmx_punpckhbw */ |
| 27709 | case 1193: /* mmx_packuswb */ |
| 27710 | case 1192: /* mmx_packssdw */ |
| 27711 | case 1191: /* mmx_packsswb */ |
| 27712 | case 1190: /* *mmx_xorv2si3 */ |
| 27713 | case 1189: /* *mmx_iorv2si3 */ |
| 27714 | case 1188: /* *mmx_andv2si3 */ |
| 27715 | case 1187: /* *mmx_xorv4hi3 */ |
| 27716 | case 1186: /* *mmx_iorv4hi3 */ |
| 27717 | case 1185: /* *mmx_andv4hi3 */ |
| 27718 | case 1184: /* *mmx_xorv8qi3 */ |
| 27719 | case 1183: /* *mmx_iorv8qi3 */ |
| 27720 | case 1182: /* *mmx_andv8qi3 */ |
| 27721 | case 1181: /* mmx_andnotv2si3 */ |
| 27722 | case 1180: /* mmx_andnotv4hi3 */ |
| 27723 | case 1179: /* mmx_andnotv8qi3 */ |
| 27724 | case 1178: /* mmx_gtv2si3 */ |
| 27725 | case 1177: /* mmx_gtv4hi3 */ |
| 27726 | case 1176: /* mmx_gtv8qi3 */ |
| 27727 | case 1175: /* *mmx_eqv2si3 */ |
| 27728 | case 1174: /* *mmx_eqv4hi3 */ |
| 27729 | case 1173: /* *mmx_eqv8qi3 */ |
| 27730 | case 1172: /* mmx_lshrv1di3 */ |
| 27731 | case 1171: /* mmx_ashlv1di3 */ |
| 27732 | case 1170: /* mmx_lshrv2si3 */ |
| 27733 | case 1169: /* mmx_ashlv2si3 */ |
| 27734 | case 1168: /* mmx_lshrv4hi3 */ |
| 27735 | case 1167: /* mmx_ashlv4hi3 */ |
| 27736 | case 1166: /* mmx_ashrv2si3 */ |
| 27737 | case 1165: /* mmx_ashrv4hi3 */ |
| 27738 | case 1164: /* *mmx_uminv8qi3 */ |
| 27739 | case 1163: /* *mmx_umaxv8qi3 */ |
| 27740 | case 1162: /* *mmx_sminv4hi3 */ |
| 27741 | case 1161: /* *mmx_smaxv4hi3 */ |
| 27742 | case 1160: /* *sse2_umulv1siv1di3 */ |
| 27743 | case 1159: /* *mmx_pmulhrwv4hi3 */ |
| 27744 | case 1158: /* *mmx_pmaddwd */ |
| 27745 | case 1157: /* *mmx_umulv4hi3_highpart */ |
| 27746 | case 1156: /* *mmx_smulv4hi3_highpart */ |
| 27747 | case 1155: /* *mmx_mulv4hi3 */ |
| 27748 | case 1154: /* *mmx_ussubv4hi3 */ |
| 27749 | case 1153: /* *mmx_sssubv4hi3 */ |
| 27750 | case 1152: /* *mmx_usaddv4hi3 */ |
| 27751 | case 1151: /* *mmx_ssaddv4hi3 */ |
| 27752 | case 1150: /* *mmx_ussubv8qi3 */ |
| 27753 | case 1149: /* *mmx_sssubv8qi3 */ |
| 27754 | case 1148: /* *mmx_usaddv8qi3 */ |
| 27755 | case 1147: /* *mmx_ssaddv8qi3 */ |
| 27756 | case 1146: /* *mmx_subv1di3 */ |
| 27757 | case 1145: /* *mmx_addv1di3 */ |
| 27758 | case 1144: /* *mmx_subv2si3 */ |
| 27759 | case 1143: /* *mmx_addv2si3 */ |
| 27760 | case 1142: /* *mmx_subv4hi3 */ |
| 27761 | case 1141: /* *mmx_addv4hi3 */ |
| 27762 | case 1140: /* *mmx_subv8qi3 */ |
| 27763 | case 1139: /* *mmx_addv8qi3 */ |
| 27764 | case 1136: /* *mmx_concatv2sf */ |
| 27765 | case 1135: /* *vec_dupv2sf */ |
| 27766 | case 1134: /* mmx_pswapdv2sf2 */ |
| 27767 | case 1133: /* mmx_floatv2si2 */ |
| 27768 | case 1132: /* mmx_pi2fw */ |
| 27769 | case 1131: /* mmx_pf2iw */ |
| 27770 | case 1130: /* mmx_pf2id */ |
| 27771 | case 1129: /* mmx_gev2sf3 */ |
| 27772 | case 1128: /* mmx_gtv2sf3 */ |
| 27773 | case 1127: /* *mmx_eqv2sf3 */ |
| 27774 | case 1126: /* mmx_addsubv2sf3 */ |
| 27775 | case 1125: /* mmx_hsubv2sf3 */ |
| 27776 | case 1124: /* mmx_haddv2sf3 */ |
| 27777 | case 1123: /* mmx_rsqit1v2sf3 */ |
| 27778 | case 1122: /* mmx_rsqrtv2sf2 */ |
| 27779 | case 1121: /* mmx_rcpit2v2sf3 */ |
| 27780 | case 1120: /* mmx_rcpit1v2sf3 */ |
| 27781 | case 1119: /* mmx_rcpv2sf2 */ |
| 27782 | case 1118: /* mmx_ieee_minv2sf3 */ |
| 27783 | case 1117: /* mmx_ieee_maxv2sf3 */ |
| 27784 | case 1116: /* *mmx_sminv2sf3 */ |
| 27785 | case 1115: /* *mmx_smaxv2sf3 */ |
| 27786 | case 1114: /* *mmx_mulv2sf3 */ |
| 27787 | case 1113: /* *mmx_subv2sf3 */ |
| 27788 | case 1112: /* *mmx_addv2sf3 */ |
| 27789 | case 1111: /* sse_movntq */ |
| 27790 | case 1100: /* *bnd64_stx */ |
| 27791 | case 1099: /* *bnd32_stx */ |
| 27792 | case 1098: /* *bnd64_ldx */ |
| 27793 | case 1097: /* *bnd32_ldx */ |
| 27794 | case 1096: /* *bnd64_cn */ |
| 27795 | case 1095: /* *bnd64_cu */ |
| 27796 | case 1094: /* *bnd64_cl */ |
| 27797 | case 1093: /* *bnd32_cn */ |
| 27798 | case 1092: /* *bnd32_cu */ |
| 27799 | case 1091: /* *bnd32_cl */ |
| 27800 | case 1090: /* *movbnd64_internal_mpx */ |
| 27801 | case 1089: /* *movbnd32_internal_mpx */ |
| 27802 | case 1088: /* *bnd64_mk */ |
| 27803 | case 1087: /* *bnd32_mk */ |
| 27804 | case 1060: /* *lwp_lwpinsdi3_1 */ |
| 27805 | case 1059: /* *lwp_lwpinssi3_1 */ |
| 27806 | case 1058: /* *lwp_lwpvaldi3_1 */ |
| 27807 | case 1057: /* *lwp_lwpvalsi3_1 */ |
| 27808 | case 1056: /* lwp_slwpcbdi */ |
| 27809 | case 1055: /* lwp_slwpcbsi */ |
| 27810 | case 1054: /* *lwp_llwpcbdi1 */ |
| 27811 | case 1053: /* *lwp_llwpcbsi1 */ |
| 27812 | case 1008: /* *prefetch_prefetchwt1 */ |
| 27813 | case 1007: /* *prefetch_3dnow */ |
| 27814 | case 984: /* *xop_pcmov_df */ |
| 27815 | case 983: /* *xop_pcmov_sf */ |
| 27816 | case 980: /* *movxfcc_1 */ |
| 27817 | case 927: /* fistsi2_ceil_with_temp */ |
| 27818 | case 926: /* fistsi2_floor_with_temp */ |
| 27819 | case 925: /* fisthi2_ceil_with_temp */ |
| 27820 | case 924: /* fisthi2_floor_with_temp */ |
| 27821 | case 923: /* fistsi2_ceil */ |
| 27822 | case 922: /* fistsi2_floor */ |
| 27823 | case 921: /* fisthi2_ceil */ |
| 27824 | case 920: /* fisthi2_floor */ |
| 27825 | case 919: /* fistdi2_ceil_with_temp */ |
| 27826 | case 918: /* fistdi2_floor_with_temp */ |
| 27827 | case 917: /* fistdi2_ceil */ |
| 27828 | case 916: /* fistdi2_floor */ |
| 27829 | case 915: /* *fistdi2_ceil_1 */ |
| 27830 | case 914: /* *fistdi2_floor_1 */ |
| 27831 | case 913: /* *fistsi2_ceil_1 */ |
| 27832 | case 912: /* *fistsi2_floor_1 */ |
| 27833 | case 911: /* *fisthi2_ceil_1 */ |
| 27834 | case 910: /* *fisthi2_floor_1 */ |
| 27835 | case 909: /* frndintxf2_mask_pm_i387 */ |
| 27836 | case 908: /* frndintxf2_mask_pm */ |
| 27837 | case 907: /* frndintxf2_trunc_i387 */ |
| 27838 | case 906: /* frndintxf2_ceil_i387 */ |
| 27839 | case 905: /* frndintxf2_floor_i387 */ |
| 27840 | case 904: /* frndintdf2_trunc_i387 */ |
| 27841 | case 903: /* frndintdf2_ceil_i387 */ |
| 27842 | case 902: /* frndintdf2_floor_i387 */ |
| 27843 | case 901: /* frndintsf2_trunc_i387 */ |
| 27844 | case 900: /* frndintsf2_ceil_i387 */ |
| 27845 | case 899: /* frndintsf2_floor_i387 */ |
| 27846 | case 898: /* frndintxf2_trunc */ |
| 27847 | case 897: /* frndintxf2_ceil */ |
| 27848 | case 896: /* frndintxf2_floor */ |
| 27849 | case 895: /* frndintdf2_trunc */ |
| 27850 | case 894: /* frndintdf2_ceil */ |
| 27851 | case 893: /* frndintdf2_floor */ |
| 27852 | case 892: /* frndintsf2_trunc */ |
| 27853 | case 891: /* frndintsf2_ceil */ |
| 27854 | case 890: /* frndintsf2_floor */ |
| 27855 | case 889: /* fistsi2_with_temp */ |
| 27856 | case 888: /* fisthi2_with_temp */ |
| 27857 | case 887: /* fistsi2 */ |
| 27858 | case 886: /* fisthi2 */ |
| 27859 | case 885: /* *fistsi2_1 */ |
| 27860 | case 884: /* *fisthi2_1 */ |
| 27861 | case 883: /* fistdi2_with_temp */ |
| 27862 | case 882: /* fistdi2 */ |
| 27863 | case 881: /* *fistdi2_1 */ |
| 27864 | case 880: /* rintdf2_frndint */ |
| 27865 | case 879: /* rintsf2_frndint */ |
| 27866 | case 878: /* rintxf2 */ |
| 27867 | case 875: /* fscalexf4_i387 */ |
| 27868 | case 874: /* *f2xm1xf2_i387 */ |
| 27869 | case 873: /* fxtract_extenddfxf3_i387 */ |
| 27870 | case 872: /* fxtract_extendsfxf3_i387 */ |
| 27871 | case 871: /* fxtractxf3_i387 */ |
| 27872 | case 870: /* fyl2xp1_extenddfxf3_i387 */ |
| 27873 | case 869: /* fyl2xp1_extendsfxf3_i387 */ |
| 27874 | case 868: /* fyl2xp1xf3_i387 */ |
| 27875 | case 867: /* fyl2x_extenddfxf3_i387 */ |
| 27876 | case 866: /* fyl2x_extendsfxf3_i387 */ |
| 27877 | case 865: /* fyl2xxf3_i387 */ |
| 27878 | case 864: /* fpatan_extenddfxf3_i387 */ |
| 27879 | case 863: /* fpatan_extendsfxf3_i387 */ |
| 27880 | case 862: /* *fpatanxf3_i387 */ |
| 27881 | case 861: /* fptan_extenddfxf4_i387 */ |
| 27882 | case 860: /* fptan_extendsfxf4_i387 */ |
| 27883 | case 859: /* fptanxf4_i387 */ |
| 27884 | case 858: /* sincos_extenddfxf3_i387 */ |
| 27885 | case 857: /* sincos_extendsfxf3_i387 */ |
| 27886 | case 856: /* sincosxf3 */ |
| 27887 | case 855: /* *cos_extenddfxf2_i387 */ |
| 27888 | case 854: /* *sin_extenddfxf2_i387 */ |
| 27889 | case 853: /* *cos_extendsfxf2_i387 */ |
| 27890 | case 852: /* *sin_extendsfxf2_i387 */ |
| 27891 | case 851: /* *cosxf2_i387 */ |
| 27892 | case 850: /* *sinxf2_i387 */ |
| 27893 | case 849: /* fprem1xf4_i387 */ |
| 27894 | case 848: /* fpremxf4_i387 */ |
| 27895 | case 844: /* sqrt_extenddfxf2_i387 */ |
| 27896 | case 843: /* sqrt_extendsfxf2_i387 */ |
| 27897 | case 842: /* sqrtxf2 */ |
| 27898 | case 839: /* *fop_xf_6_i387 */ |
| 27899 | case 838: /* *fop_xf_6_i387 */ |
| 27900 | case 837: /* *fop_xf_5_i387 */ |
| 27901 | case 836: /* *fop_xf_5_i387 */ |
| 27902 | case 835: /* *fop_xf_4_i387 */ |
| 27903 | case 834: /* *fop_xf_4_i387 */ |
| 27904 | case 833: /* *fop_xf_3_i387 */ |
| 27905 | case 832: /* *fop_xf_3_i387 */ |
| 27906 | case 831: /* *fop_xf_2_i387 */ |
| 27907 | case 830: /* *fop_xf_2_i387 */ |
| 27908 | case 829: /* *fop_xf_1_i387 */ |
| 27909 | case 828: /* *fop_xf_comm_i387 */ |
| 27910 | case 827: /* *fop_df_6_i387 */ |
| 27911 | case 826: /* *fop_df_5_i387 */ |
| 27912 | case 825: /* *fop_df_4_i387 */ |
| 27913 | case 824: /* *fop_df_3_i387 */ |
| 27914 | case 823: /* *fop_sf_3_i387 */ |
| 27915 | case 822: /* *fop_df_3_i387 */ |
| 27916 | case 821: /* *fop_sf_3_i387 */ |
| 27917 | case 820: /* *fop_df_2_i387 */ |
| 27918 | case 819: /* *fop_sf_2_i387 */ |
| 27919 | case 818: /* *fop_df_2_i387 */ |
| 27920 | case 817: /* *fop_sf_2_i387 */ |
| 27921 | case 783: /* *bswapdi2 */ |
| 27922 | case 782: /* *bswapsi2 */ |
| 27923 | case 779: /* popcounthi2 */ |
| 27924 | case 777: /* *popcountdi2_falsedep */ |
| 27925 | case 776: /* *popcountsi2_falsedep */ |
| 27926 | case 775: /* popcountdi2 */ |
| 27927 | case 774: /* popcountsi2 */ |
| 27928 | case 773: /* *tbm_tzmsk_di */ |
| 27929 | case 772: /* *tbm_tzmsk_si */ |
| 27930 | case 771: /* *tbm_t1mskc_di */ |
| 27931 | case 770: /* *tbm_t1mskc_si */ |
| 27932 | case 769: /* *tbm_blsic_di */ |
| 27933 | case 768: /* *tbm_blsic_si */ |
| 27934 | case 767: /* *tbm_blsfill_di */ |
| 27935 | case 766: /* *tbm_blsfill_si */ |
| 27936 | case 765: /* *tbm_blcs_di */ |
| 27937 | case 764: /* *tbm_blcs_si */ |
| 27938 | case 763: /* *tbm_blcmsk_di */ |
| 27939 | case 762: /* *tbm_blcmsk_si */ |
| 27940 | case 761: /* *tbm_blcic_di */ |
| 27941 | case 760: /* *tbm_blcic_si */ |
| 27942 | case 759: /* *tbm_blci_di */ |
| 27943 | case 758: /* *tbm_blci_si */ |
| 27944 | case 757: /* *tbm_blcfill_di */ |
| 27945 | case 756: /* *tbm_blcfill_si */ |
| 27946 | case 755: /* tbm_bextri_di */ |
| 27947 | case 754: /* tbm_bextri_si */ |
| 27948 | case 753: /* bmi2_pext_di3 */ |
| 27949 | case 752: /* bmi2_pext_si3 */ |
| 27950 | case 751: /* bmi2_pdep_di3 */ |
| 27951 | case 750: /* bmi2_pdep_si3 */ |
| 27952 | case 749: /* *bmi2_bzhi_di3_1_ccz */ |
| 27953 | case 748: /* *bmi2_bzhi_si3_1_ccz */ |
| 27954 | case 747: /* *bmi2_bzhi_di3_1 */ |
| 27955 | case 746: /* *bmi2_bzhi_si3_1 */ |
| 27956 | case 745: /* *bmi2_bzhi_di3 */ |
| 27957 | case 744: /* *bmi2_bzhi_si3 */ |
| 27958 | case 743: /* *bmi_blsr_di */ |
| 27959 | case 742: /* *bmi_blsr_si */ |
| 27960 | case 741: /* *bmi_blsmsk_di */ |
| 27961 | case 740: /* *bmi_blsmsk_si */ |
| 27962 | case 739: /* *bmi_blsi_di */ |
| 27963 | case 738: /* *bmi_blsi_si */ |
| 27964 | case 737: /* *bmi_bextr_di_ccz */ |
| 27965 | case 736: /* *bmi_bextr_si_ccz */ |
| 27966 | case 735: /* bmi_bextr_di */ |
| 27967 | case 734: /* bmi_bextr_si */ |
| 27968 | case 733: /* lzcnt_hi */ |
| 27969 | case 731: /* *lzcnt_di_falsedep */ |
| 27970 | case 729: /* *lzcnt_si_falsedep */ |
| 27971 | case 727: /* lzcnt_di */ |
| 27972 | case 725: /* lzcnt_si */ |
| 27973 | case 723: /* *clzdi2_lzcnt_falsedep */ |
| 27974 | case 722: /* *clzsi2_lzcnt_falsedep */ |
| 27975 | case 721: /* clzdi2_lzcnt */ |
| 27976 | case 720: /* clzsi2_lzcnt */ |
| 27977 | case 600: /* *bmi2_rorxsi3_1_zext */ |
| 27978 | case 595: /* *bmi2_rorxdi3_1 */ |
| 27979 | case 594: /* *bmi2_rorxsi3_1 */ |
| 27980 | case 559: /* *bmi2_ashrsi3_1_zext */ |
| 27981 | case 558: /* *bmi2_lshrsi3_1_zext */ |
| 27982 | case 553: /* *bmi2_ashrdi3_1 */ |
| 27983 | case 552: /* *bmi2_lshrdi3_1 */ |
| 27984 | case 551: /* *bmi2_ashrsi3_1 */ |
| 27985 | case 550: /* *bmi2_lshrsi3_1 */ |
| 27986 | case 523: /* *bmi2_ashlsi3_1_zext */ |
| 27987 | case 520: /* *bmi2_ashldi3_1 */ |
| 27988 | case 519: /* *bmi2_ashlsi3_1 */ |
| 27989 | case 495: /* *negextenddfxf2 */ |
| 27990 | case 494: /* *absextenddfxf2 */ |
| 27991 | case 493: /* *negextendsfxf2 */ |
| 27992 | case 492: /* *absextendsfxf2 */ |
| 27993 | case 491: /* *negextendsfdf2 */ |
| 27994 | case 490: /* *absextendsfdf2 */ |
| 27995 | case 489: /* *negxf2_1 */ |
| 27996 | case 488: /* *absxf2_1 */ |
| 27997 | case 487: /* *negdf2_1 */ |
| 27998 | case 486: /* *absdf2_1 */ |
| 27999 | case 485: /* *negsf2_1 */ |
| 28000 | case 484: /* *abssf2_1 */ |
| 28001 | case 420: /* *andn_di_ccno */ |
| 28002 | case 419: /* *andn_si_ccno */ |
| 28003 | case 418: /* *andnhi_1 */ |
| 28004 | case 417: /* *andnqi_1 */ |
| 28005 | case 416: /* *andndi_1 */ |
| 28006 | case 415: /* *andnsi_1 */ |
| 28007 | case 354: /* *bmi2_umulditi3_1 */ |
| 28008 | case 353: /* *bmi2_umulsidi3_1 */ |
| 28009 | case 191: /* fix_truncsi_i387_with_temp */ |
| 28010 | case 190: /* fix_trunchi_i387_with_temp */ |
| 28011 | case 189: /* fix_truncsi_i387 */ |
| 28012 | case 188: /* fix_trunchi_i387 */ |
| 28013 | case 187: /* fix_truncdi_i387_with_temp */ |
| 28014 | case 186: /* fix_truncdi_i387 */ |
| 28015 | case 185: /* *fix_truncdi_i387_1 */ |
| 28016 | case 184: /* *fix_truncsi_i387_1 */ |
| 28017 | case 183: /* *fix_trunchi_i387_1 */ |
| 28018 | case 182: /* fix_truncdi_i387_fisttp_with_temp */ |
| 28019 | case 181: /* fix_truncsi_i387_fisttp_with_temp */ |
| 28020 | case 180: /* fix_trunchi_i387_fisttp_with_temp */ |
| 28021 | case 179: /* fix_truncdi_i387_fisttp */ |
| 28022 | case 178: /* fix_truncsi_i387_fisttp */ |
| 28023 | case 177: /* fix_trunchi_i387_fisttp */ |
| 28024 | case 176: /* fix_truncdi_fisttp_i387_1 */ |
| 28025 | case 175: /* fix_truncsi_fisttp_i387_1 */ |
| 28026 | case 174: /* fix_trunchi_fisttp_i387_1 */ |
| 28027 | case 130: /* *swapdf */ |
| 28028 | case 129: /* *swapsf */ |
| 28029 | case 128: /* swapxf */ |
| 28030 | case 54: /* *cmpiuxf_i387 */ |
| 28031 | case 53: /* *cmpixf_i387 */ |
| 28032 | return 0; |
| 28033 | |
| 28034 | case 356: /* *umulditi3_1 */ |
| 28035 | case 52: /* *cmpiudf */ |
| 28036 | case 51: /* *cmpiusf */ |
| 28037 | case 50: /* *cmpidf */ |
| 28038 | case 49: /* *cmpisf */ |
| 28039 | extract_constrain_insn_cached (insn); |
| 28040 | if (which_alternative != 0) |
| 28041 | { |
| 28042 | return 10 /* 0xa */; |
| 28043 | } |
| 28044 | else |
| 28045 | { |
| 28046 | return 0; |
| 28047 | } |
| 28048 | |
| 28049 | case 4984: /* atomic_bit_test_and_resetdi_1 */ |
| 28050 | case 4983: /* atomic_bit_test_and_resetsi_1 */ |
| 28051 | case 4982: /* atomic_bit_test_and_resethi_1 */ |
| 28052 | case 4981: /* atomic_bit_test_and_complementdi_1 */ |
| 28053 | case 4980: /* atomic_bit_test_and_complementsi_1 */ |
| 28054 | case 4979: /* atomic_bit_test_and_complementhi_1 */ |
| 28055 | case 4978: /* atomic_bit_test_and_setdi_1 */ |
| 28056 | case 4977: /* atomic_bit_test_and_setsi_1 */ |
| 28057 | case 4976: /* atomic_bit_test_and_sethi_1 */ |
| 28058 | case 4975: /* atomic_xordi */ |
| 28059 | case 4974: /* atomic_ordi */ |
| 28060 | case 4973: /* atomic_anddi */ |
| 28061 | case 4972: /* atomic_xorsi */ |
| 28062 | case 4971: /* atomic_orsi */ |
| 28063 | case 4970: /* atomic_andsi */ |
| 28064 | case 4969: /* atomic_xorhi */ |
| 28065 | case 4968: /* atomic_orhi */ |
| 28066 | case 4967: /* atomic_andhi */ |
| 28067 | case 4966: /* atomic_xorqi */ |
| 28068 | case 4965: /* atomic_orqi */ |
| 28069 | case 4964: /* atomic_andqi */ |
| 28070 | case 4963: /* atomic_subdi */ |
| 28071 | case 4962: /* atomic_subsi */ |
| 28072 | case 4961: /* atomic_subhi */ |
| 28073 | case 4960: /* atomic_subqi */ |
| 28074 | case 4959: /* atomic_adddi */ |
| 28075 | case 4958: /* atomic_addsi */ |
| 28076 | case 4957: /* atomic_addhi */ |
| 28077 | case 4956: /* atomic_addqi */ |
| 28078 | case 4955: /* atomic_exchangedi */ |
| 28079 | case 4954: /* atomic_exchangesi */ |
| 28080 | case 4953: /* atomic_exchangehi */ |
| 28081 | case 4952: /* atomic_exchangeqi */ |
| 28082 | case 4951: /* *atomic_fetch_add_cmpdi */ |
| 28083 | case 4950: /* *atomic_fetch_add_cmpsi */ |
| 28084 | case 4949: /* *atomic_fetch_add_cmphi */ |
| 28085 | case 4948: /* *atomic_fetch_add_cmpqi */ |
| 28086 | case 4947: /* atomic_fetch_adddi */ |
| 28087 | case 4946: /* atomic_fetch_addsi */ |
| 28088 | case 4945: /* atomic_fetch_addhi */ |
| 28089 | case 4944: /* atomic_fetch_addqi */ |
| 28090 | case 4943: /* atomic_compare_and_swapdi_1 */ |
| 28091 | case 4942: /* atomic_compare_and_swapsi_1 */ |
| 28092 | case 4941: /* atomic_compare_and_swaphi_1 */ |
| 28093 | case 4940: /* atomic_compare_and_swapqi_1 */ |
| 28094 | case 4939: /* atomic_compare_and_swapti_doubleword */ |
| 28095 | case 4938: /* atomic_compare_and_swapdi_doubleword */ |
| 28096 | case 4933: /* atomic_storedi_fpu */ |
| 28097 | case 4932: /* atomic_storedi_1 */ |
| 28098 | case 4931: /* atomic_storesi_1 */ |
| 28099 | case 4930: /* atomic_storehi_1 */ |
| 28100 | case 4929: /* atomic_storeqi_1 */ |
| 28101 | case 4928: /* atomic_loaddi_fpu */ |
| 28102 | case 4927: /* mfence_nosse */ |
| 28103 | case 4923: /* vpopcountv8di_mask */ |
| 28104 | case 4922: /* vpopcountv8di */ |
| 28105 | case 4921: /* vpopcountv16si_mask */ |
| 28106 | case 4920: /* vpopcountv16si */ |
| 28107 | case 4901: /* *movv64si_internal */ |
| 28108 | case 4900: /* *movv64sf_internal */ |
| 28109 | case 4875: /* avx512f_pd512_256pd */ |
| 28110 | case 4874: /* avx512f_ps512_256ps */ |
| 28111 | case 4873: /* avx512f_si512_256si */ |
| 28112 | case 4872: /* avx512f_pd512_pd */ |
| 28113 | case 4871: /* avx512f_ps512_ps */ |
| 28114 | case 4870: /* avx512f_si512_si */ |
| 28115 | case 4832: /* avx512f_vgetmantv2df_round */ |
| 28116 | case 4831: /* avx512f_vgetmantv2df */ |
| 28117 | case 4830: /* avx512f_vgetmantv4sf_round */ |
| 28118 | case 4829: /* avx512f_vgetmantv4sf */ |
| 28119 | case 4828: /* avx512vl_getmantv2df_mask_round */ |
| 28120 | case 4827: /* avx512vl_getmantv2df_mask */ |
| 28121 | case 4826: /* avx512vl_getmantv2df_round */ |
| 28122 | case 4825: /* avx512vl_getmantv2df */ |
| 28123 | case 4824: /* avx512vl_getmantv4df_mask_round */ |
| 28124 | case 4823: /* avx512vl_getmantv4df_mask */ |
| 28125 | case 4822: /* avx512vl_getmantv4df_round */ |
| 28126 | case 4821: /* avx512vl_getmantv4df */ |
| 28127 | case 4820: /* avx512f_getmantv8df_mask_round */ |
| 28128 | case 4819: /* avx512f_getmantv8df_mask */ |
| 28129 | case 4818: /* avx512f_getmantv8df_round */ |
| 28130 | case 4817: /* avx512f_getmantv8df */ |
| 28131 | case 4816: /* avx512vl_getmantv4sf_mask_round */ |
| 28132 | case 4815: /* avx512vl_getmantv4sf_mask */ |
| 28133 | case 4814: /* avx512vl_getmantv4sf_round */ |
| 28134 | case 4813: /* avx512vl_getmantv4sf */ |
| 28135 | case 4812: /* avx512vl_getmantv8sf_mask_round */ |
| 28136 | case 4811: /* avx512vl_getmantv8sf_mask */ |
| 28137 | case 4810: /* avx512vl_getmantv8sf_round */ |
| 28138 | case 4809: /* avx512vl_getmantv8sf */ |
| 28139 | case 4808: /* avx512f_getmantv16sf_mask_round */ |
| 28140 | case 4807: /* avx512f_getmantv16sf_mask */ |
| 28141 | case 4806: /* avx512f_getmantv16sf_round */ |
| 28142 | case 4805: /* avx512f_getmantv16sf */ |
| 28143 | case 4435: /* avx_pd256_pd */ |
| 28144 | case 4434: /* avx_ps256_ps */ |
| 28145 | case 4433: /* avx_si256_si */ |
| 28146 | case 4252: /* *avx_vperm_broadcast_v4df */ |
| 28147 | case 4251: /* *avx_vperm_broadcast_v8sf */ |
| 28148 | case 3677: /* sse3_monitor_di */ |
| 28149 | case 3676: /* sse3_monitor_si */ |
| 28150 | case 3675: /* sse3_mwait */ |
| 28151 | case 3637: /* *vec_extractv4si_zext_mem */ |
| 28152 | case 3636: /* *vec_extractv4si_mem */ |
| 28153 | case 3633: /* *vec_extractv4si_0_zext */ |
| 28154 | case 3632: /* *vec_extractv4si_0_zext_sse4 */ |
| 28155 | case 3631: /* *vec_extractv2di_0_sse */ |
| 28156 | case 3630: /* *vec_extractv2di_0 */ |
| 28157 | case 3629: /* *vec_extractv4si_0 */ |
| 28158 | case 3628: /* *vec_extractv8hi_mem */ |
| 28159 | case 3627: /* *vec_extractv16qi_mem */ |
| 28160 | case 3503: /* avx512vl_testnmv2di3_mask */ |
| 28161 | case 3502: /* avx512vl_testnmv2di3 */ |
| 28162 | case 3501: /* avx512vl_testnmv4di3_mask */ |
| 28163 | case 3500: /* avx512vl_testnmv4di3 */ |
| 28164 | case 3499: /* avx512f_testnmv8di3_mask */ |
| 28165 | case 3498: /* avx512f_testnmv8di3 */ |
| 28166 | case 3497: /* avx512vl_testnmv4si3_mask */ |
| 28167 | case 3496: /* avx512vl_testnmv4si3 */ |
| 28168 | case 3495: /* avx512vl_testnmv8si3_mask */ |
| 28169 | case 3494: /* avx512vl_testnmv8si3 */ |
| 28170 | case 3493: /* avx512f_testnmv16si3_mask */ |
| 28171 | case 3492: /* avx512f_testnmv16si3 */ |
| 28172 | case 3491: /* avx512vl_testnmv8hi3_mask */ |
| 28173 | case 3490: /* avx512vl_testnmv8hi3 */ |
| 28174 | case 3489: /* avx512vl_testnmv16hi3_mask */ |
| 28175 | case 3488: /* avx512vl_testnmv16hi3 */ |
| 28176 | case 3487: /* avx512bw_testnmv32hi3_mask */ |
| 28177 | case 3486: /* avx512bw_testnmv32hi3 */ |
| 28178 | case 3485: /* avx512vl_testnmv32qi3_mask */ |
| 28179 | case 3484: /* avx512vl_testnmv32qi3 */ |
| 28180 | case 3483: /* avx512vl_testnmv16qi3_mask */ |
| 28181 | case 3482: /* avx512vl_testnmv16qi3 */ |
| 28182 | case 3481: /* avx512bw_testnmv64qi3_mask */ |
| 28183 | case 3480: /* avx512bw_testnmv64qi3 */ |
| 28184 | case 3479: /* avx512vl_testmv2di3_mask */ |
| 28185 | case 3478: /* avx512vl_testmv2di3 */ |
| 28186 | case 3477: /* avx512vl_testmv4di3_mask */ |
| 28187 | case 3476: /* avx512vl_testmv4di3 */ |
| 28188 | case 3475: /* avx512f_testmv8di3_mask */ |
| 28189 | case 3474: /* avx512f_testmv8di3 */ |
| 28190 | case 3473: /* avx512vl_testmv4si3_mask */ |
| 28191 | case 3472: /* avx512vl_testmv4si3 */ |
| 28192 | case 3471: /* avx512vl_testmv8si3_mask */ |
| 28193 | case 3470: /* avx512vl_testmv8si3 */ |
| 28194 | case 3469: /* avx512f_testmv16si3_mask */ |
| 28195 | case 3468: /* avx512f_testmv16si3 */ |
| 28196 | case 3467: /* avx512vl_testmv8hi3_mask */ |
| 28197 | case 3466: /* avx512vl_testmv8hi3 */ |
| 28198 | case 3465: /* avx512vl_testmv16hi3_mask */ |
| 28199 | case 3464: /* avx512vl_testmv16hi3 */ |
| 28200 | case 3463: /* avx512bw_testmv32hi3_mask */ |
| 28201 | case 3462: /* avx512bw_testmv32hi3 */ |
| 28202 | case 3461: /* avx512vl_testmv32qi3_mask */ |
| 28203 | case 3460: /* avx512vl_testmv32qi3 */ |
| 28204 | case 3459: /* avx512vl_testmv16qi3_mask */ |
| 28205 | case 3458: /* avx512vl_testmv16qi3 */ |
| 28206 | case 3457: /* avx512bw_testmv64qi3_mask */ |
| 28207 | case 3456: /* avx512bw_testmv64qi3 */ |
| 28208 | case 3191: /* avx512vl_rorv2di_mask */ |
| 28209 | case 3190: /* avx512vl_rorv2di */ |
| 28210 | case 3189: /* avx512vl_rolv2di_mask */ |
| 28211 | case 3188: /* avx512vl_rolv2di */ |
| 28212 | case 3187: /* avx512vl_rorv4di_mask */ |
| 28213 | case 3186: /* avx512vl_rorv4di */ |
| 28214 | case 3185: /* avx512vl_rolv4di_mask */ |
| 28215 | case 3184: /* avx512vl_rolv4di */ |
| 28216 | case 3183: /* avx512f_rorv8di_mask */ |
| 28217 | case 3182: /* avx512f_rorv8di */ |
| 28218 | case 3181: /* avx512f_rolv8di_mask */ |
| 28219 | case 3180: /* avx512f_rolv8di */ |
| 28220 | case 3179: /* avx512vl_rorv4si_mask */ |
| 28221 | case 3178: /* avx512vl_rorv4si */ |
| 28222 | case 3177: /* avx512vl_rolv4si_mask */ |
| 28223 | case 3176: /* avx512vl_rolv4si */ |
| 28224 | case 3175: /* avx512vl_rorv8si_mask */ |
| 28225 | case 3174: /* avx512vl_rorv8si */ |
| 28226 | case 3173: /* avx512vl_rolv8si_mask */ |
| 28227 | case 3172: /* avx512vl_rolv8si */ |
| 28228 | case 3171: /* avx512f_rorv16si_mask */ |
| 28229 | case 3170: /* avx512f_rorv16si */ |
| 28230 | case 3169: /* avx512f_rolv16si_mask */ |
| 28231 | case 3168: /* avx512f_rolv16si */ |
| 28232 | case 3167: /* avx512vl_rorvv2di_mask */ |
| 28233 | case 3166: /* avx512vl_rorvv2di */ |
| 28234 | case 3165: /* avx512vl_rolvv2di_mask */ |
| 28235 | case 3164: /* avx512vl_rolvv2di */ |
| 28236 | case 3163: /* avx512vl_rorvv4di_mask */ |
| 28237 | case 3162: /* avx512vl_rorvv4di */ |
| 28238 | case 3161: /* avx512vl_rolvv4di_mask */ |
| 28239 | case 3160: /* avx512vl_rolvv4di */ |
| 28240 | case 3159: /* avx512f_rorvv8di_mask */ |
| 28241 | case 3158: /* avx512f_rorvv8di */ |
| 28242 | case 3157: /* avx512f_rolvv8di_mask */ |
| 28243 | case 3156: /* avx512f_rolvv8di */ |
| 28244 | case 3155: /* avx512vl_rorvv4si_mask */ |
| 28245 | case 3154: /* avx512vl_rorvv4si */ |
| 28246 | case 3153: /* avx512vl_rolvv4si_mask */ |
| 28247 | case 3152: /* avx512vl_rolvv4si */ |
| 28248 | case 3151: /* avx512vl_rorvv8si_mask */ |
| 28249 | case 3150: /* avx512vl_rorvv8si */ |
| 28250 | case 3149: /* avx512vl_rolvv8si_mask */ |
| 28251 | case 3148: /* avx512vl_rolvv8si */ |
| 28252 | case 3147: /* avx512f_rorvv16si_mask */ |
| 28253 | case 3146: /* avx512f_rorvv16si */ |
| 28254 | case 3145: /* avx512f_rolvv16si_mask */ |
| 28255 | case 3144: /* avx512f_rolvv16si */ |
| 28256 | case 2704: /* avx512f_rndscalev2df_round */ |
| 28257 | case 2703: /* avx512f_rndscalev2df */ |
| 28258 | case 2702: /* avx512f_rndscalev4sf_round */ |
| 28259 | case 2701: /* avx512f_rndscalev4sf */ |
| 28260 | case 2700: /* avx512vl_rndscalev2df_mask_round */ |
| 28261 | case 2699: /* avx512vl_rndscalev2df_mask */ |
| 28262 | case 2698: /* avx512vl_rndscalev2df_round */ |
| 28263 | case 2697: /* avx512vl_rndscalev2df */ |
| 28264 | case 2696: /* avx512vl_rndscalev4df_mask_round */ |
| 28265 | case 2695: /* avx512vl_rndscalev4df_mask */ |
| 28266 | case 2694: /* avx512vl_rndscalev4df_round */ |
| 28267 | case 2693: /* avx512vl_rndscalev4df */ |
| 28268 | case 2692: /* avx512f_rndscalev8df_mask_round */ |
| 28269 | case 2691: /* avx512f_rndscalev8df_mask */ |
| 28270 | case 2690: /* avx512f_rndscalev8df_round */ |
| 28271 | case 2689: /* avx512f_rndscalev8df */ |
| 28272 | case 2688: /* avx512vl_rndscalev4sf_mask_round */ |
| 28273 | case 2687: /* avx512vl_rndscalev4sf_mask */ |
| 28274 | case 2686: /* avx512vl_rndscalev4sf_round */ |
| 28275 | case 2685: /* avx512vl_rndscalev4sf */ |
| 28276 | case 2684: /* avx512vl_rndscalev8sf_mask_round */ |
| 28277 | case 2683: /* avx512vl_rndscalev8sf_mask */ |
| 28278 | case 2682: /* avx512vl_rndscalev8sf_round */ |
| 28279 | case 2681: /* avx512vl_rndscalev8sf */ |
| 28280 | case 2680: /* avx512f_rndscalev16sf_mask_round */ |
| 28281 | case 2679: /* avx512f_rndscalev16sf_mask */ |
| 28282 | case 2678: /* avx512f_rndscalev16sf_round */ |
| 28283 | case 2677: /* avx512f_rndscalev16sf */ |
| 28284 | case 2676: /* avx512f_sfixupimmv2df_mask_round */ |
| 28285 | case 2675: /* avx512f_sfixupimmv2df_mask */ |
| 28286 | case 2674: /* avx512f_sfixupimmv4sf_mask_round */ |
| 28287 | case 2673: /* avx512f_sfixupimmv4sf_mask */ |
| 28288 | case 2672: /* avx512f_sfixupimmv2df_maskz_1_round */ |
| 28289 | case 2671: /* avx512f_sfixupimmv2df_maskz_1 */ |
| 28290 | case 2670: /* avx512f_sfixupimmv2df_round */ |
| 28291 | case 2669: /* avx512f_sfixupimmv2df */ |
| 28292 | case 2668: /* avx512f_sfixupimmv4sf_maskz_1_round */ |
| 28293 | case 2667: /* avx512f_sfixupimmv4sf_maskz_1 */ |
| 28294 | case 2666: /* avx512f_sfixupimmv4sf_round */ |
| 28295 | case 2665: /* avx512f_sfixupimmv4sf */ |
| 28296 | case 2664: /* avx512vl_fixupimmv2df_mask_round */ |
| 28297 | case 2663: /* avx512vl_fixupimmv2df_mask */ |
| 28298 | case 2662: /* avx512vl_fixupimmv4df_mask_round */ |
| 28299 | case 2661: /* avx512vl_fixupimmv4df_mask */ |
| 28300 | case 2660: /* avx512f_fixupimmv8df_mask_round */ |
| 28301 | case 2659: /* avx512f_fixupimmv8df_mask */ |
| 28302 | case 2658: /* avx512vl_fixupimmv4sf_mask_round */ |
| 28303 | case 2657: /* avx512vl_fixupimmv4sf_mask */ |
| 28304 | case 2656: /* avx512vl_fixupimmv8sf_mask_round */ |
| 28305 | case 2655: /* avx512vl_fixupimmv8sf_mask */ |
| 28306 | case 2654: /* avx512f_fixupimmv16sf_mask_round */ |
| 28307 | case 2653: /* avx512f_fixupimmv16sf_mask */ |
| 28308 | case 2652: /* avx512vl_fixupimmv2df_maskz_1_round */ |
| 28309 | case 2651: /* avx512vl_fixupimmv2df_maskz_1 */ |
| 28310 | case 2650: /* avx512vl_fixupimmv2df_round */ |
| 28311 | case 2649: /* avx512vl_fixupimmv2df */ |
| 28312 | case 2648: /* avx512vl_fixupimmv4df_maskz_1_round */ |
| 28313 | case 2647: /* avx512vl_fixupimmv4df_maskz_1 */ |
| 28314 | case 2646: /* avx512vl_fixupimmv4df_round */ |
| 28315 | case 2645: /* avx512vl_fixupimmv4df */ |
| 28316 | case 2644: /* avx512f_fixupimmv8df_maskz_1_round */ |
| 28317 | case 2643: /* avx512f_fixupimmv8df_maskz_1 */ |
| 28318 | case 2642: /* avx512f_fixupimmv8df_round */ |
| 28319 | case 2641: /* avx512f_fixupimmv8df */ |
| 28320 | case 2640: /* avx512vl_fixupimmv4sf_maskz_1_round */ |
| 28321 | case 2639: /* avx512vl_fixupimmv4sf_maskz_1 */ |
| 28322 | case 2638: /* avx512vl_fixupimmv4sf_round */ |
| 28323 | case 2637: /* avx512vl_fixupimmv4sf */ |
| 28324 | case 2636: /* avx512vl_fixupimmv8sf_maskz_1_round */ |
| 28325 | case 2635: /* avx512vl_fixupimmv8sf_maskz_1 */ |
| 28326 | case 2634: /* avx512vl_fixupimmv8sf_round */ |
| 28327 | case 2633: /* avx512vl_fixupimmv8sf */ |
| 28328 | case 2632: /* avx512f_fixupimmv16sf_maskz_1_round */ |
| 28329 | case 2631: /* avx512f_fixupimmv16sf_maskz_1 */ |
| 28330 | case 2630: /* avx512f_fixupimmv16sf_round */ |
| 28331 | case 2629: /* avx512f_fixupimmv16sf */ |
| 28332 | case 2628: /* avx512vl_alignv2di_mask */ |
| 28333 | case 2627: /* *avx512vl_alignv2di */ |
| 28334 | case 2626: /* avx512vl_alignv4di_mask */ |
| 28335 | case 2625: /* *avx512vl_alignv4di */ |
| 28336 | case 2624: /* avx512f_alignv8di_mask */ |
| 28337 | case 2623: /* *avx512f_alignv8di */ |
| 28338 | case 2622: /* avx512vl_alignv4si_mask */ |
| 28339 | case 2621: /* *avx512vl_alignv4si */ |
| 28340 | case 2620: /* avx512vl_alignv8si_mask */ |
| 28341 | case 2619: /* *avx512vl_alignv8si */ |
| 28342 | case 2618: /* avx512f_alignv16si_mask */ |
| 28343 | case 2617: /* *avx512f_alignv16si */ |
| 28344 | case 2616: /* avx512f_sgetexpv2df_round */ |
| 28345 | case 2615: /* avx512f_sgetexpv2df */ |
| 28346 | case 2614: /* avx512f_sgetexpv4sf_round */ |
| 28347 | case 2613: /* avx512f_sgetexpv4sf */ |
| 28348 | case 2612: /* avx512vl_getexpv2df_mask_round */ |
| 28349 | case 2611: /* avx512vl_getexpv2df_mask */ |
| 28350 | case 2610: /* avx512vl_getexpv2df_round */ |
| 28351 | case 2609: /* avx512vl_getexpv2df */ |
| 28352 | case 2608: /* avx512vl_getexpv4df_mask_round */ |
| 28353 | case 2607: /* avx512vl_getexpv4df_mask */ |
| 28354 | case 2606: /* avx512vl_getexpv4df_round */ |
| 28355 | case 2605: /* avx512vl_getexpv4df */ |
| 28356 | case 2604: /* avx512f_getexpv8df_mask_round */ |
| 28357 | case 2603: /* avx512f_getexpv8df_mask */ |
| 28358 | case 2602: /* avx512f_getexpv8df_round */ |
| 28359 | case 2601: /* avx512f_getexpv8df */ |
| 28360 | case 2600: /* avx512vl_getexpv4sf_mask_round */ |
| 28361 | case 2599: /* avx512vl_getexpv4sf_mask */ |
| 28362 | case 2598: /* avx512vl_getexpv4sf_round */ |
| 28363 | case 2597: /* avx512vl_getexpv4sf */ |
| 28364 | case 2596: /* avx512vl_getexpv8sf_mask_round */ |
| 28365 | case 2595: /* avx512vl_getexpv8sf_mask */ |
| 28366 | case 2594: /* avx512vl_getexpv8sf_round */ |
| 28367 | case 2593: /* avx512vl_getexpv8sf */ |
| 28368 | case 2592: /* avx512f_getexpv16sf_mask_round */ |
| 28369 | case 2591: /* avx512f_getexpv16sf_mask */ |
| 28370 | case 2590: /* avx512f_getexpv16sf_round */ |
| 28371 | case 2589: /* avx512f_getexpv16sf */ |
| 28372 | case 2570: /* avx512vl_scalefv2df_mask_round */ |
| 28373 | case 2569: /* avx512vl_scalefv2df_mask */ |
| 28374 | case 2568: /* avx512vl_scalefv2df_round */ |
| 28375 | case 2567: /* avx512vl_scalefv2df */ |
| 28376 | case 2566: /* avx512vl_scalefv4df_mask_round */ |
| 28377 | case 2565: /* avx512vl_scalefv4df_mask */ |
| 28378 | case 2564: /* avx512vl_scalefv4df_round */ |
| 28379 | case 2563: /* avx512vl_scalefv4df */ |
| 28380 | case 2562: /* avx512f_scalefv8df_mask_round */ |
| 28381 | case 2561: /* avx512f_scalefv8df_mask */ |
| 28382 | case 2560: /* avx512f_scalefv8df_round */ |
| 28383 | case 2559: /* avx512f_scalefv8df */ |
| 28384 | case 2558: /* avx512vl_scalefv4sf_mask_round */ |
| 28385 | case 2557: /* avx512vl_scalefv4sf_mask */ |
| 28386 | case 2556: /* avx512vl_scalefv4sf_round */ |
| 28387 | case 2555: /* avx512vl_scalefv4sf */ |
| 28388 | case 2554: /* avx512vl_scalefv8sf_mask_round */ |
| 28389 | case 2553: /* avx512vl_scalefv8sf_mask */ |
| 28390 | case 2552: /* avx512vl_scalefv8sf_round */ |
| 28391 | case 2551: /* avx512vl_scalefv8sf */ |
| 28392 | case 2550: /* avx512f_scalefv16sf_mask_round */ |
| 28393 | case 2549: /* avx512f_scalefv16sf_mask */ |
| 28394 | case 2548: /* avx512f_scalefv16sf_round */ |
| 28395 | case 2547: /* avx512f_scalefv16sf */ |
| 28396 | case 2546: /* avx512f_vmscalefv2df_round */ |
| 28397 | case 2545: /* avx512f_vmscalefv2df */ |
| 28398 | case 2544: /* avx512f_vmscalefv4sf_round */ |
| 28399 | case 2543: /* avx512f_vmscalefv4sf */ |
| 28400 | case 2529: /* vec_extract_lo_v32qi */ |
| 28401 | case 2527: /* vec_extract_lo_v64qi */ |
| 28402 | case 2525: /* vec_extract_lo_v16hi */ |
| 28403 | case 2523: /* vec_extract_lo_v32hi */ |
| 28404 | case 2502: /* vec_extract_lo_v16si_mask */ |
| 28405 | case 2501: /* vec_extract_lo_v16si */ |
| 28406 | case 2500: /* vec_extract_lo_v16sf_mask */ |
| 28407 | case 2499: /* vec_extract_lo_v16sf */ |
| 28408 | case 2468: /* *vec_extractv4sf_mem */ |
| 28409 | case 2466: /* *vec_extractv4sf_0 */ |
| 28410 | case 2415: /* *avx512vl_cvtmask2qv2di */ |
| 28411 | case 2414: /* *avx512vl_cvtmask2qv4di */ |
| 28412 | case 2413: /* *avx512f_cvtmask2qv8di */ |
| 28413 | case 2412: /* *avx512vl_cvtmask2dv4si */ |
| 28414 | case 2411: /* *avx512vl_cvtmask2dv8si */ |
| 28415 | case 2410: /* *avx512f_cvtmask2dv16si */ |
| 28416 | case 2409: /* *avx512vl_cvtmask2wv8hi */ |
| 28417 | case 2408: /* *avx512vl_cvtmask2wv16hi */ |
| 28418 | case 2407: /* *avx512bw_cvtmask2wv32hi */ |
| 28419 | case 2406: /* *avx512vl_cvtmask2bv32qi */ |
| 28420 | case 2405: /* *avx512vl_cvtmask2bv16qi */ |
| 28421 | case 2404: /* *avx512bw_cvtmask2bv64qi */ |
| 28422 | case 2403: /* avx512vl_cvtq2maskv2di */ |
| 28423 | case 2402: /* avx512vl_cvtq2maskv4di */ |
| 28424 | case 2401: /* avx512f_cvtq2maskv8di */ |
| 28425 | case 2400: /* avx512vl_cvtd2maskv4si */ |
| 28426 | case 2399: /* avx512vl_cvtd2maskv8si */ |
| 28427 | case 2398: /* avx512f_cvtd2maskv16si */ |
| 28428 | case 2397: /* avx512vl_cvtw2maskv8hi */ |
| 28429 | case 2396: /* avx512vl_cvtw2maskv16hi */ |
| 28430 | case 2395: /* avx512bw_cvtw2maskv32hi */ |
| 28431 | case 2394: /* avx512vl_cvtb2maskv32qi */ |
| 28432 | case 2393: /* avx512vl_cvtb2maskv16qi */ |
| 28433 | case 2392: /* avx512bw_cvtb2maskv64qi */ |
| 28434 | case 1360: /* *absnegv2df2 */ |
| 28435 | case 1359: /* *absnegv4df2 */ |
| 28436 | case 1358: /* *absnegv8df2 */ |
| 28437 | case 1357: /* *absnegv4sf2 */ |
| 28438 | case 1356: /* *absnegv8sf2 */ |
| 28439 | case 1355: /* *absnegv16sf2 */ |
| 28440 | case 1354: /* kunpckdi */ |
| 28441 | case 1353: /* kunpcksi */ |
| 28442 | case 1294: /* movdi_to_sse */ |
| 28443 | case 1209: /* *vec_extractv2si_zext_mem */ |
| 28444 | case 1207: /* *vec_extractv2si_0 */ |
| 28445 | case 1137: /* *vec_extractv2sf_0 */ |
| 28446 | case 1105: /* rdpid */ |
| 28447 | case 1104: /* *wrpkru */ |
| 28448 | case 1103: /* *rdpkru */ |
| 28449 | case 1086: /* clzero_di */ |
| 28450 | case 1085: /* clzero_si */ |
| 28451 | case 1084: /* monitorx_di */ |
| 28452 | case 1083: /* monitorx_si */ |
| 28453 | case 1082: /* mwaitx */ |
| 28454 | case 1079: /* xtest_1 */ |
| 28455 | case 1078: /* xabort */ |
| 28456 | case 1077: /* xend */ |
| 28457 | case 1076: /* xbegin_1 */ |
| 28458 | case 1075: /* *pause */ |
| 28459 | case 1074: /* rdseeddi_1 */ |
| 28460 | case 1073: /* rdseedsi_1 */ |
| 28461 | case 1072: /* rdseedhi_1 */ |
| 28462 | case 1071: /* rdranddi_1 */ |
| 28463 | case 1070: /* rdrandsi_1 */ |
| 28464 | case 1069: /* rdrandhi_1 */ |
| 28465 | case 1068: /* wrgsbasedi */ |
| 28466 | case 1067: /* wrfsbasedi */ |
| 28467 | case 1066: /* wrgsbasesi */ |
| 28468 | case 1065: /* wrfsbasesi */ |
| 28469 | case 1064: /* rdgsbasedi */ |
| 28470 | case 1063: /* rdfsbasedi */ |
| 28471 | case 1062: /* rdgsbasesi */ |
| 28472 | case 1061: /* rdfsbasesi */ |
| 28473 | case 1052: /* fnclex */ |
| 28474 | case 1051: /* fnstsw */ |
| 28475 | case 1050: /* fldenv */ |
| 28476 | case 1049: /* fnstenv */ |
| 28477 | case 1048: /* xrstors64 */ |
| 28478 | case 1047: /* xrstor64 */ |
| 28479 | case 1046: /* xrstors_rex64 */ |
| 28480 | case 1045: /* xrstor_rex64 */ |
| 28481 | case 1044: /* xrstors */ |
| 28482 | case 1043: /* xrstor */ |
| 28483 | case 1042: /* xsaves64 */ |
| 28484 | case 1041: /* xsavec64 */ |
| 28485 | case 1040: /* xsaveopt64 */ |
| 28486 | case 1039: /* xsave64 */ |
| 28487 | case 1038: /* xsaves_rex64 */ |
| 28488 | case 1037: /* xsavec_rex64 */ |
| 28489 | case 1036: /* xsaveopt_rex64 */ |
| 28490 | case 1035: /* xsave_rex64 */ |
| 28491 | case 1034: /* xsaves */ |
| 28492 | case 1033: /* xsavec */ |
| 28493 | case 1032: /* xsaveopt */ |
| 28494 | case 1031: /* xsave */ |
| 28495 | case 1030: /* fxrstor64 */ |
| 28496 | case 1029: /* fxrstor */ |
| 28497 | case 1028: /* fxsave64 */ |
| 28498 | case 1027: /* fxsave */ |
| 28499 | case 1026: /* rdtscp_rex64 */ |
| 28500 | case 1025: /* rdtscp */ |
| 28501 | case 1024: /* rdtsc_rex64 */ |
| 28502 | case 1023: /* rdtsc */ |
| 28503 | case 1022: /* rdpmc_rex64 */ |
| 28504 | case 1021: /* rdpmc */ |
| 28505 | case 1016: /* stack_tls_protect_test_di */ |
| 28506 | case 1015: /* stack_tls_protect_test_si */ |
| 28507 | case 1014: /* stack_protect_test_di */ |
| 28508 | case 1013: /* stack_protect_test_si */ |
| 28509 | case 1012: /* stack_tls_protect_set_di */ |
| 28510 | case 1011: /* stack_tls_protect_set_si */ |
| 28511 | case 1010: /* stack_protect_set_di */ |
| 28512 | case 1009: /* stack_protect_set_si */ |
| 28513 | case 1005: /* trap */ |
| 28514 | case 1004: /* probe_stack_rangedi */ |
| 28515 | case 1003: /* probe_stack_rangesi */ |
| 28516 | case 1002: /* adjust_stack_and_probedi */ |
| 28517 | case 1001: /* adjust_stack_and_probesi */ |
| 28518 | case 998: /* allocate_stack_worker_probe_di */ |
| 28519 | case 997: /* allocate_stack_worker_probe_si */ |
| 28520 | case 934: /* cld */ |
| 28521 | case 932: /* fxamdf2_i387_with_temp */ |
| 28522 | case 931: /* fxamsf2_i387_with_temp */ |
| 28523 | case 930: /* fxamxf2_i387 */ |
| 28524 | case 929: /* fxamdf2_i387 */ |
| 28525 | case 928: /* fxamsf2_i387 */ |
| 28526 | case 811: /* *tls_dynamic_gnu2_combine_64 */ |
| 28527 | case 808: /* *tls_dynamic_gnu2_combine_32 */ |
| 28528 | case 797: /* *tls_local_dynamic_32_once */ |
| 28529 | case 796: /* *tls_local_dynamic_base_64_largepic */ |
| 28530 | case 795: /* *tls_local_dynamic_base_64_di */ |
| 28531 | case 794: /* *tls_local_dynamic_base_64_si */ |
| 28532 | case 793: /* *tls_local_dynamic_base_32_gnu */ |
| 28533 | case 792: /* *tls_global_dynamic_64_largepic */ |
| 28534 | case 791: /* *tls_global_dynamic_64_di */ |
| 28535 | case 790: /* *tls_global_dynamic_64_si */ |
| 28536 | case 789: /* *tls_global_dynamic_32_gnu */ |
| 28537 | case 788: /* *parityhi2_cmp */ |
| 28538 | case 787: /* paritysi2_cmp */ |
| 28539 | case 786: /* paritydi2_cmp */ |
| 28540 | case 785: /* bswaphi_lowpart */ |
| 28541 | case 784: /* *bswaphi_lowpart_1 */ |
| 28542 | case 778: /* *popcounthi2_1 */ |
| 28543 | case 706: /* ffssi2_no_cmove */ |
| 28544 | case 702: /* eh_return_internal */ |
| 28545 | case 698: /* *set_got_labelled */ |
| 28546 | case 697: /* *set_got */ |
| 28547 | case 696: /* pad */ |
| 28548 | case 695: /* nops */ |
| 28549 | case 694: /* nop */ |
| 28550 | case 690: /* interrupt_return */ |
| 28551 | case 688: /* prologue_use */ |
| 28552 | case 687: /* *memory_blockage */ |
| 28553 | case 686: /* blockage */ |
| 28554 | case 658: /* *jccxf_si_r_i387 */ |
| 28555 | case 657: /* *jccdf_si_r_i387 */ |
| 28556 | case 656: /* *jccsf_si_r_i387 */ |
| 28557 | case 655: /* *jccxf_hi_r_i387 */ |
| 28558 | case 654: /* *jccdf_hi_r_i387 */ |
| 28559 | case 653: /* *jccsf_hi_r_i387 */ |
| 28560 | case 652: /* *jccxf_si_i387 */ |
| 28561 | case 651: /* *jccdf_si_i387 */ |
| 28562 | case 650: /* *jccsf_si_i387 */ |
| 28563 | case 649: /* *jccxf_hi_i387 */ |
| 28564 | case 648: /* *jccdf_hi_i387 */ |
| 28565 | case 647: /* *jccsf_hi_i387 */ |
| 28566 | case 646: /* *jccuxf_r_i387 */ |
| 28567 | case 645: /* *jccudf_r_i387 */ |
| 28568 | case 644: /* *jccusf_r_i387 */ |
| 28569 | case 643: /* *jccuxf_i387 */ |
| 28570 | case 642: /* *jccudf_i387 */ |
| 28571 | case 641: /* *jccusf_i387 */ |
| 28572 | case 640: /* *jccdf_r_i387 */ |
| 28573 | case 639: /* *jccsf_r_i387 */ |
| 28574 | case 638: /* *jccdf_i387 */ |
| 28575 | case 637: /* *jccsf_i387 */ |
| 28576 | case 636: /* *jccxf_r_i387 */ |
| 28577 | case 635: /* *jccxf_i387 */ |
| 28578 | case 634: /* *jccxf_0_r_i387 */ |
| 28579 | case 633: /* *jccdf_0_r_i387 */ |
| 28580 | case 632: /* *jccsf_0_r_i387 */ |
| 28581 | case 631: /* *jccxf_0_i387 */ |
| 28582 | case 630: /* *jccdf_0_i387 */ |
| 28583 | case 629: /* *jccsf_0_i387 */ |
| 28584 | case 622: /* *setcc_si_1_movzbl */ |
| 28585 | case 621: /* *setcc_si_1_and */ |
| 28586 | case 620: /* *setcc_di_1 */ |
| 28587 | case 619: /* *jcc_btdi_mask */ |
| 28588 | case 618: /* *jcc_btsi_mask */ |
| 28589 | case 617: /* *jcc_btdi_1 */ |
| 28590 | case 616: /* *jcc_btsi_1 */ |
| 28591 | case 615: /* *jcc_btdi */ |
| 28592 | case 614: /* *jcc_btsi */ |
| 28593 | case 593: /* ix86_rotrti3_doubleword */ |
| 28594 | case 592: /* ix86_rotrdi3_doubleword */ |
| 28595 | case 591: /* ix86_rotlti3_doubleword */ |
| 28596 | case 590: /* ix86_rotldi3_doubleword */ |
| 28597 | case 589: /* *rotrdi3_mask */ |
| 28598 | case 588: /* *rotldi3_mask */ |
| 28599 | case 587: /* *rotrsi3_mask */ |
| 28600 | case 586: /* *rotlsi3_mask */ |
| 28601 | case 544: /* *ashrti3_doubleword */ |
| 28602 | case 543: /* *lshrti3_doubleword */ |
| 28603 | case 542: /* *ashrdi3_doubleword */ |
| 28604 | case 541: /* *lshrdi3_doubleword */ |
| 28605 | case 540: /* *ashrdi3_mask */ |
| 28606 | case 539: /* *lshrdi3_mask */ |
| 28607 | case 538: /* *ashrsi3_mask */ |
| 28608 | case 537: /* *lshrsi3_mask */ |
| 28609 | case 518: /* *ashldi3_mask */ |
| 28610 | case 517: /* *ashlsi3_mask */ |
| 28611 | case 514: /* *ashlti3_doubleword */ |
| 28612 | case 513: /* *ashldi3_doubleword */ |
| 28613 | case 502: /* *one_cmpldi2_doubleword */ |
| 28614 | case 501: /* copysigntf3_var */ |
| 28615 | case 500: /* copysigndf3_var */ |
| 28616 | case 499: /* copysignsf3_var */ |
| 28617 | case 498: /* copysigntf3_const */ |
| 28618 | case 497: /* copysigndf3_const */ |
| 28619 | case 496: /* copysignsf3_const */ |
| 28620 | case 483: /* *absnegtf2_sse */ |
| 28621 | case 482: /* *absnegxf2_i387 */ |
| 28622 | case 481: /* *absnegdf2 */ |
| 28623 | case 480: /* *absnegsf2 */ |
| 28624 | case 465: /* *negti2_doubleword */ |
| 28625 | case 464: /* *negdi2_doubleword */ |
| 28626 | case 422: /* *xordi3_doubleword */ |
| 28627 | case 421: /* *iordi3_doubleword */ |
| 28628 | case 414: /* *andndi3_doubleword */ |
| 28629 | case 397: /* *anddi3_doubleword */ |
| 28630 | case 396: /* *testqi_ext_3 */ |
| 28631 | case 395: /* *testqi_ext_3 */ |
| 28632 | case 394: /* *testqi_ext_3 */ |
| 28633 | case 382: /* *udivmoddi4_pow2 */ |
| 28634 | case 381: /* *udivmodsi4_pow2 */ |
| 28635 | case 380: /* *udivmoddi4 */ |
| 28636 | case 379: /* *udivmodsi4 */ |
| 28637 | case 378: /* *udivmodhi4 */ |
| 28638 | case 377: /* udivmoddi4_1 */ |
| 28639 | case 376: /* udivmodsi4_1 */ |
| 28640 | case 371: /* *divmoddi4 */ |
| 28641 | case 370: /* *divmodsi4 */ |
| 28642 | case 369: /* *divmodhi4 */ |
| 28643 | case 368: /* divmoddi4_1 */ |
| 28644 | case 367: /* divmodsi4_1 */ |
| 28645 | case 270: /* *subti3_doubleword */ |
| 28646 | case 269: /* *subdi3_doubleword */ |
| 28647 | case 216: /* *addti3_doubleword */ |
| 28648 | case 215: /* *adddi3_doubleword */ |
| 28649 | case 212: /* *floatunssixf2_i387_with_xmm */ |
| 28650 | case 211: /* *floatunssidf2_i387_with_xmm */ |
| 28651 | case 210: /* *floatunssisf2_i387_with_xmm */ |
| 28652 | case 209: /* floatdixf2_i387_with_xmm */ |
| 28653 | case 208: /* floatdidf2_i387_with_xmm */ |
| 28654 | case 207: /* floatdisf2_i387_with_xmm */ |
| 28655 | case 193: /* x86_fldcw_1 */ |
| 28656 | case 192: /* x86_fnstcw_1 */ |
| 28657 | case 169: /* *fixuns_truncdf_1 */ |
| 28658 | case 168: /* *fixuns_truncsf_1 */ |
| 28659 | case 146: /* extendsidi2_1 */ |
| 28660 | case 144: /* *zextsi_doubleword */ |
| 28661 | case 143: /* *zexthi_doubleword */ |
| 28662 | case 142: /* *zextqi_doubleword */ |
| 28663 | case 141: /* *zexthi_doubleword_and */ |
| 28664 | case 140: /* *zextqi_doubleword_and */ |
| 28665 | case 121: /* *pushdf */ |
| 28666 | case 120: /* *pushxf */ |
| 28667 | case 119: /* *pushxf_rounded */ |
| 28668 | case 118: /* *pushxf_rounded */ |
| 28669 | case 117: /* *pushtf */ |
| 28670 | case 56: /* *pushti2 */ |
| 28671 | case 55: /* *pushdi2 */ |
| 28672 | case 48: /* x86_sahf_1 */ |
| 28673 | case 47: /* x86_fnstsw_1 */ |
| 28674 | case 46: /* *cmpxf_si_cc_i387 */ |
| 28675 | case 45: /* *cmpdf_si_cc_i387 */ |
| 28676 | case 44: /* *cmpsf_si_cc_i387 */ |
| 28677 | case 43: /* *cmpxf_hi_cc_i387 */ |
| 28678 | case 42: /* *cmpdf_hi_cc_i387 */ |
| 28679 | case 41: /* *cmpsf_hi_cc_i387 */ |
| 28680 | case 40: /* *cmpxf_si_i387 */ |
| 28681 | case 39: /* *cmpdf_si_i387 */ |
| 28682 | case 38: /* *cmpsf_si_i387 */ |
| 28683 | case 37: /* *cmpxf_hi_i387 */ |
| 28684 | case 36: /* *cmpdf_hi_i387 */ |
| 28685 | case 35: /* *cmpsf_hi_i387 */ |
| 28686 | case 34: /* *cmpuxf_cc_i387 */ |
| 28687 | case 33: /* *cmpudf_cc_i387 */ |
| 28688 | case 32: /* *cmpusf_cc_i387 */ |
| 28689 | case 31: /* *cmpuxf_i387 */ |
| 28690 | case 30: /* *cmpudf_i387 */ |
| 28691 | case 29: /* *cmpusf_i387 */ |
| 28692 | case 28: /* *cmpdf_cc_i387 */ |
| 28693 | case 27: /* *cmpsf_cc_i387 */ |
| 28694 | case 26: /* *cmpdf_i387 */ |
| 28695 | case 25: /* *cmpsf_i387 */ |
| 28696 | case 24: /* *cmpxf_cc_i387 */ |
| 28697 | case 23: /* *cmpxf_i387 */ |
| 28698 | case 22: /* *cmpxf_0_cc_i387 */ |
| 28699 | case 21: /* *cmpdf_0_cc_i387 */ |
| 28700 | case 20: /* *cmpsf_0_cc_i387 */ |
| 28701 | case 19: /* *cmpxf_0_i387 */ |
| 28702 | case 18: /* *cmpdf_0_i387 */ |
| 28703 | case 17: /* *cmpsf_0_i387 */ |
| 28704 | return 9; |
| 28705 | |
| 28706 | case 4: /* *cmpdi_ccno_1 */ |
| 28707 | case 3: /* *cmpsi_ccno_1 */ |
| 28708 | case 2: /* *cmphi_ccno_1 */ |
| 28709 | case 1: /* *cmpqi_ccno_1 */ |
| 28710 | extract_constrain_insn_cached (insn); |
| 28711 | if ((which_alternative != 0) || (which_alternative != 1) || (get_attr_memory (insn) == MEMORY_NONE)) |
| 28712 | { |
| 28713 | return 1; |
| 28714 | } |
| 28715 | else |
| 28716 | { |
| 28717 | return 0; |
| 28718 | } |
| 28719 | |
| 28720 | case -1: |
| 28721 | if (GET_CODE (PATTERN (insn)) != ASM_INPUT |
| 28722 | && asm_noperands (PATTERN (insn)) < 0) |
| 28723 | fatal_insn_not_found (insn); |
| 28724 | /* FALLTHRU */ |
| 28725 | case 78: /* *movxi_internal_avx512f */ |
| 28726 | case 79: /* *movoi_internal_avx */ |
| 28727 | case 80: /* *movti_internal */ |
| 28728 | case 81: /* *movdi_internal */ |
| 28729 | case 82: /* *movsi_internal */ |
| 28730 | case 83: /* *movhi_internal */ |
| 28731 | case 84: /* *movqi_internal */ |
| 28732 | case 101: /* *extvhi */ |
| 28733 | case 102: /* *extvsi */ |
| 28734 | case 103: /* *extzvhi */ |
| 28735 | case 104: /* *extzvsi */ |
| 28736 | case 105: /* *extzvdi */ |
| 28737 | case 107: /* *extzvqi */ |
| 28738 | case 124: /* *movtf_internal */ |
| 28739 | case 126: /* *movdf_internal */ |
| 28740 | case 127: /* *movsf_internal */ |
| 28741 | case 131: /* *zero_extendsidi2 */ |
| 28742 | case 132: /* zero_extendqidi2 */ |
| 28743 | case 133: /* zero_extendhidi2 */ |
| 28744 | case 136: /* *zero_extendqisi2 */ |
| 28745 | case 137: /* *zero_extendhisi2 */ |
| 28746 | case 139: /* *zero_extendqihi2 */ |
| 28747 | case 145: /* *extendsidi2_rex64 */ |
| 28748 | case 147: /* extendqidi2 */ |
| 28749 | case 148: /* extendhidi2 */ |
| 28750 | case 149: /* extendhisi2 */ |
| 28751 | case 150: /* *extendhisi2_zext */ |
| 28752 | case 151: /* extendqisi2 */ |
| 28753 | case 152: /* *extendqisi2_zext */ |
| 28754 | case 153: /* extendqihi2 */ |
| 28755 | case 154: /* *extendsfdf2 */ |
| 28756 | case 157: /* *truncdfsf_fast_mixed */ |
| 28757 | case 159: /* *truncdfsf_mixed */ |
| 28758 | case 170: /* fix_truncsfsi_sse */ |
| 28759 | case 171: /* fix_truncsfdi_sse */ |
| 28760 | case 172: /* fix_truncdfsi_sse */ |
| 28761 | case 173: /* fix_truncdfdi_sse */ |
| 28762 | case 199: /* *floatsisf2_mixed */ |
| 28763 | case 200: /* *floatdisf2_mixed */ |
| 28764 | case 201: /* *floatsidf2_mixed */ |
| 28765 | case 202: /* *floatdidf2_mixed */ |
| 28766 | case 398: /* *anddi_1 */ |
| 28767 | case 400: /* *andhi_1 */ |
| 28768 | case 401: /* *andsi_1 */ |
| 28769 | case 547: /* ashrdi3_cvt */ |
| 28770 | case 548: /* *ashrsi3_cvt_zext */ |
| 28771 | case 549: /* ashrsi3_cvt */ |
| 28772 | case 876: /* sse4_1_roundsf2 */ |
| 28773 | case 877: /* sse4_1_rounddf2 */ |
| 28774 | case 933: /* movmsk_df */ |
| 28775 | case 1106: /* *movv8qi_internal */ |
| 28776 | case 1107: /* *movv4hi_internal */ |
| 28777 | case 1108: /* *movv2si_internal */ |
| 28778 | case 1109: /* *movv1di_internal */ |
| 28779 | case 1110: /* *movv2sf_internal */ |
| 28780 | case 1138: /* *vec_extractv2sf_1 */ |
| 28781 | case 1208: /* *vec_extractv2si_1 */ |
| 28782 | case 1218: /* movv64qi_internal */ |
| 28783 | case 1219: /* movv32qi_internal */ |
| 28784 | case 1220: /* movv16qi_internal */ |
| 28785 | case 1221: /* movv32hi_internal */ |
| 28786 | case 1222: /* movv16hi_internal */ |
| 28787 | case 1223: /* movv8hi_internal */ |
| 28788 | case 1224: /* movv16si_internal */ |
| 28789 | case 1225: /* movv8si_internal */ |
| 28790 | case 1226: /* movv4si_internal */ |
| 28791 | case 1227: /* movv8di_internal */ |
| 28792 | case 1228: /* movv4di_internal */ |
| 28793 | case 1229: /* movv2di_internal */ |
| 28794 | case 1230: /* movv4ti_internal */ |
| 28795 | case 1231: /* movv2ti_internal */ |
| 28796 | case 1232: /* movv1ti_internal */ |
| 28797 | case 1233: /* movv16sf_internal */ |
| 28798 | case 1234: /* movv8sf_internal */ |
| 28799 | case 1235: /* movv4sf_internal */ |
| 28800 | case 1236: /* movv8df_internal */ |
| 28801 | case 1237: /* movv4df_internal */ |
| 28802 | case 1238: /* movv2df_internal */ |
| 28803 | case 1239: /* avx512f_loadv16si_mask */ |
| 28804 | case 1240: /* avx512vl_loadv8si_mask */ |
| 28805 | case 1241: /* avx512vl_loadv4si_mask */ |
| 28806 | case 1242: /* avx512f_loadv8di_mask */ |
| 28807 | case 1243: /* avx512vl_loadv4di_mask */ |
| 28808 | case 1244: /* avx512vl_loadv2di_mask */ |
| 28809 | case 1245: /* avx512f_loadv16sf_mask */ |
| 28810 | case 1246: /* avx512vl_loadv8sf_mask */ |
| 28811 | case 1247: /* avx512vl_loadv4sf_mask */ |
| 28812 | case 1248: /* avx512f_loadv8df_mask */ |
| 28813 | case 1249: /* avx512vl_loadv4df_mask */ |
| 28814 | case 1250: /* avx512vl_loadv2df_mask */ |
| 28815 | case 1251: /* avx512bw_loadv64qi_mask */ |
| 28816 | case 1252: /* avx512vl_loadv16qi_mask */ |
| 28817 | case 1253: /* avx512vl_loadv32qi_mask */ |
| 28818 | case 1254: /* avx512bw_loadv32hi_mask */ |
| 28819 | case 1255: /* avx512vl_loadv16hi_mask */ |
| 28820 | case 1256: /* avx512vl_loadv8hi_mask */ |
| 28821 | case 1257: /* avx512f_blendmv16si */ |
| 28822 | case 1258: /* avx512vl_blendmv8si */ |
| 28823 | case 1259: /* avx512vl_blendmv4si */ |
| 28824 | case 1260: /* avx512f_blendmv8di */ |
| 28825 | case 1261: /* avx512vl_blendmv4di */ |
| 28826 | case 1262: /* avx512vl_blendmv2di */ |
| 28827 | case 1263: /* avx512f_blendmv16sf */ |
| 28828 | case 1264: /* avx512vl_blendmv8sf */ |
| 28829 | case 1265: /* avx512vl_blendmv4sf */ |
| 28830 | case 1266: /* avx512f_blendmv8df */ |
| 28831 | case 1267: /* avx512vl_blendmv4df */ |
| 28832 | case 1268: /* avx512vl_blendmv2df */ |
| 28833 | case 1269: /* avx512bw_blendmv64qi */ |
| 28834 | case 1270: /* avx512vl_blendmv16qi */ |
| 28835 | case 1271: /* avx512vl_blendmv32qi */ |
| 28836 | case 1272: /* avx512bw_blendmv32hi */ |
| 28837 | case 1273: /* avx512vl_blendmv16hi */ |
| 28838 | case 1274: /* avx512vl_blendmv8hi */ |
| 28839 | case 1275: /* avx512f_storev16si_mask */ |
| 28840 | case 1276: /* avx512vl_storev8si_mask */ |
| 28841 | case 1277: /* avx512vl_storev4si_mask */ |
| 28842 | case 1278: /* avx512f_storev8di_mask */ |
| 28843 | case 1279: /* avx512vl_storev4di_mask */ |
| 28844 | case 1280: /* avx512vl_storev2di_mask */ |
| 28845 | case 1281: /* avx512f_storev16sf_mask */ |
| 28846 | case 1282: /* avx512vl_storev8sf_mask */ |
| 28847 | case 1283: /* avx512vl_storev4sf_mask */ |
| 28848 | case 1284: /* avx512f_storev8df_mask */ |
| 28849 | case 1285: /* avx512vl_storev4df_mask */ |
| 28850 | case 1286: /* avx512vl_storev2df_mask */ |
| 28851 | case 1287: /* avx512bw_storev64qi_mask */ |
| 28852 | case 1288: /* avx512vl_storev16qi_mask */ |
| 28853 | case 1289: /* avx512vl_storev32qi_mask */ |
| 28854 | case 1290: /* avx512bw_storev32hi_mask */ |
| 28855 | case 1291: /* avx512vl_storev16hi_mask */ |
| 28856 | case 1292: /* avx512vl_storev8hi_mask */ |
| 28857 | case 1293: /* sse2_movq128 */ |
| 28858 | case 1295: /* avx_lddqu256 */ |
| 28859 | case 1296: /* sse3_lddqu */ |
| 28860 | case 1297: /* sse2_movntisi */ |
| 28861 | case 1298: /* sse2_movntidi */ |
| 28862 | case 1299: /* avx512f_movntv16sf */ |
| 28863 | case 1300: /* avx_movntv8sf */ |
| 28864 | case 1301: /* sse_movntv4sf */ |
| 28865 | case 1302: /* avx512f_movntv8df */ |
| 28866 | case 1303: /* avx_movntv4df */ |
| 28867 | case 1304: /* sse2_movntv2df */ |
| 28868 | case 1305: /* avx512f_movntv8di */ |
| 28869 | case 1306: /* avx_movntv4di */ |
| 28870 | case 1307: /* sse2_movntv2di */ |
| 28871 | case 2103: /* sse_cvtpi2ps */ |
| 28872 | case 2104: /* sse_cvtps2pi */ |
| 28873 | case 2105: /* sse_cvttps2pi */ |
| 28874 | case 2106: /* sse_cvtsi2ss */ |
| 28875 | case 2107: /* sse_cvtsi2ss_round */ |
| 28876 | case 2108: /* sse_cvtsi2ssq */ |
| 28877 | case 2109: /* sse_cvtsi2ssq_round */ |
| 28878 | case 2110: /* sse_cvtss2si */ |
| 28879 | case 2111: /* sse_cvtss2si_round */ |
| 28880 | case 2112: /* sse_cvtss2si_2 */ |
| 28881 | case 2113: /* sse_cvtss2siq */ |
| 28882 | case 2114: /* sse_cvtss2siq_round */ |
| 28883 | case 2115: /* sse_cvtss2siq_2 */ |
| 28884 | case 2116: /* sse_cvttss2si */ |
| 28885 | case 2117: /* sse_cvttss2si_round */ |
| 28886 | case 2118: /* sse_cvttss2siq */ |
| 28887 | case 2119: /* sse_cvttss2siq_round */ |
| 28888 | case 2120: /* cvtusi2ss32 */ |
| 28889 | case 2121: /* cvtusi2ss32_round */ |
| 28890 | case 2122: /* cvtusi2sd32 */ |
| 28891 | case 2123: /* cvtusi2ss64 */ |
| 28892 | case 2124: /* cvtusi2ss64_round */ |
| 28893 | case 2125: /* cvtusi2sd64 */ |
| 28894 | case 2126: /* cvtusi2sd64_round */ |
| 28895 | case 2127: /* floatv16siv16sf2 */ |
| 28896 | case 2128: /* floatv16siv16sf2_round */ |
| 28897 | case 2129: /* floatv16siv16sf2_mask */ |
| 28898 | case 2130: /* floatv16siv16sf2_mask_round */ |
| 28899 | case 2131: /* floatv8siv8sf2 */ |
| 28900 | case 2132: /* floatv8siv8sf2_mask */ |
| 28901 | case 2133: /* floatv4siv4sf2 */ |
| 28902 | case 2134: /* floatv4siv4sf2_mask */ |
| 28903 | case 2135: /* ufloatv16siv16sf2 */ |
| 28904 | case 2136: /* ufloatv16siv16sf2_round */ |
| 28905 | case 2137: /* ufloatv16siv16sf2_mask */ |
| 28906 | case 2138: /* ufloatv16siv16sf2_mask_round */ |
| 28907 | case 2139: /* ufloatv8siv8sf2 */ |
| 28908 | case 2140: /* ufloatv8siv8sf2_round */ |
| 28909 | case 2141: /* ufloatv8siv8sf2_mask */ |
| 28910 | case 2142: /* ufloatv8siv8sf2_mask_round */ |
| 28911 | case 2143: /* ufloatv4siv4sf2 */ |
| 28912 | case 2144: /* ufloatv4siv4sf2_round */ |
| 28913 | case 2145: /* ufloatv4siv4sf2_mask */ |
| 28914 | case 2146: /* ufloatv4siv4sf2_mask_round */ |
| 28915 | case 2147: /* avx_fix_notruncv8sfv8si */ |
| 28916 | case 2148: /* avx_fix_notruncv8sfv8si_mask */ |
| 28917 | case 2149: /* sse2_fix_notruncv4sfv4si */ |
| 28918 | case 2150: /* sse2_fix_notruncv4sfv4si_mask */ |
| 28919 | case 2151: /* avx512f_fix_notruncv16sfv16si */ |
| 28920 | case 2152: /* avx512f_fix_notruncv16sfv16si_round */ |
| 28921 | case 2153: /* avx512f_fix_notruncv16sfv16si_mask */ |
| 28922 | case 2154: /* avx512f_fix_notruncv16sfv16si_mask_round */ |
| 28923 | case 2155: /* *avx512f_ufix_notruncv16sfv16si */ |
| 28924 | case 2156: /* *avx512f_ufix_notruncv16sfv16si_round */ |
| 28925 | case 2157: /* avx512f_ufix_notruncv16sfv16si_mask */ |
| 28926 | case 2158: /* avx512f_ufix_notruncv16sfv16si_mask_round */ |
| 28927 | case 2159: /* *avx512vl_ufix_notruncv8sfv8si */ |
| 28928 | case 2160: /* *avx512vl_ufix_notruncv8sfv8si_round */ |
| 28929 | case 2161: /* avx512vl_ufix_notruncv8sfv8si_mask */ |
| 28930 | case 2162: /* avx512vl_ufix_notruncv8sfv8si_mask_round */ |
| 28931 | case 2163: /* *avx512vl_ufix_notruncv4sfv4si */ |
| 28932 | case 2164: /* *avx512vl_ufix_notruncv4sfv4si_round */ |
| 28933 | case 2165: /* avx512vl_ufix_notruncv4sfv4si_mask */ |
| 28934 | case 2166: /* avx512vl_ufix_notruncv4sfv4si_mask_round */ |
| 28935 | case 2167: /* *avx512dq_cvtps2qqv8di */ |
| 28936 | case 2168: /* *avx512dq_cvtps2qqv8di_round */ |
| 28937 | case 2169: /* avx512dq_cvtps2qqv8di_mask */ |
| 28938 | case 2170: /* avx512dq_cvtps2qqv8di_mask_round */ |
| 28939 | case 2171: /* *avx512dq_cvtps2qqv4di */ |
| 28940 | case 2172: /* avx512dq_cvtps2qqv4di_mask */ |
| 28941 | case 2173: /* *avx512dq_cvtps2qqv2di */ |
| 28942 | case 2174: /* avx512dq_cvtps2qqv2di_mask */ |
| 28943 | case 2175: /* *avx512dq_cvtps2uqqv8di */ |
| 28944 | case 2176: /* *avx512dq_cvtps2uqqv8di_round */ |
| 28945 | case 2177: /* avx512dq_cvtps2uqqv8di_mask */ |
| 28946 | case 2178: /* avx512dq_cvtps2uqqv8di_mask_round */ |
| 28947 | case 2179: /* *avx512dq_cvtps2uqqv4di */ |
| 28948 | case 2180: /* avx512dq_cvtps2uqqv4di_mask */ |
| 28949 | case 2181: /* *avx512dq_cvtps2uqqv2di */ |
| 28950 | case 2182: /* avx512dq_cvtps2uqqv2di_mask */ |
| 28951 | case 2183: /* fix_truncv16sfv16si2 */ |
| 28952 | case 2184: /* fix_truncv16sfv16si2_round */ |
| 28953 | case 2185: /* fix_truncv16sfv16si2_mask */ |
| 28954 | case 2186: /* fix_truncv16sfv16si2_mask_round */ |
| 28955 | case 2187: /* ufix_truncv16sfv16si2 */ |
| 28956 | case 2188: /* ufix_truncv16sfv16si2_round */ |
| 28957 | case 2189: /* ufix_truncv16sfv16si2_mask */ |
| 28958 | case 2190: /* ufix_truncv16sfv16si2_mask_round */ |
| 28959 | case 2191: /* fix_truncv8sfv8si2 */ |
| 28960 | case 2192: /* fix_truncv8sfv8si2_mask */ |
| 28961 | case 2193: /* fix_truncv4sfv4si2 */ |
| 28962 | case 2194: /* fix_truncv4sfv4si2_mask */ |
| 28963 | case 2195: /* sse2_cvtpi2pd */ |
| 28964 | case 2196: /* sse2_cvtpd2pi */ |
| 28965 | case 2197: /* sse2_cvttpd2pi */ |
| 28966 | case 2198: /* sse2_cvtsi2sd */ |
| 28967 | case 2199: /* sse2_cvtsi2sdq */ |
| 28968 | case 2200: /* sse2_cvtsi2sdq_round */ |
| 28969 | case 2201: /* avx512f_vcvtss2usi */ |
| 28970 | case 2202: /* avx512f_vcvtss2usi_round */ |
| 28971 | case 2203: /* avx512f_vcvtss2usiq */ |
| 28972 | case 2204: /* avx512f_vcvtss2usiq_round */ |
| 28973 | case 2205: /* avx512f_vcvttss2usi */ |
| 28974 | case 2206: /* avx512f_vcvttss2usi_round */ |
| 28975 | case 2207: /* avx512f_vcvttss2usiq */ |
| 28976 | case 2208: /* avx512f_vcvttss2usiq_round */ |
| 28977 | case 2209: /* avx512f_vcvtsd2usi */ |
| 28978 | case 2210: /* avx512f_vcvtsd2usi_round */ |
| 28979 | case 2211: /* avx512f_vcvtsd2usiq */ |
| 28980 | case 2212: /* avx512f_vcvtsd2usiq_round */ |
| 28981 | case 2213: /* avx512f_vcvttsd2usi */ |
| 28982 | case 2214: /* avx512f_vcvttsd2usi_round */ |
| 28983 | case 2215: /* avx512f_vcvttsd2usiq */ |
| 28984 | case 2216: /* avx512f_vcvttsd2usiq_round */ |
| 28985 | case 2217: /* sse2_cvtsd2si */ |
| 28986 | case 2218: /* sse2_cvtsd2si_round */ |
| 28987 | case 2219: /* sse2_cvtsd2si_2 */ |
| 28988 | case 2220: /* sse2_cvtsd2siq */ |
| 28989 | case 2221: /* sse2_cvtsd2siq_round */ |
| 28990 | case 2222: /* sse2_cvtsd2siq_2 */ |
| 28991 | case 2223: /* sse2_cvttsd2si */ |
| 28992 | case 2224: /* sse2_cvttsd2si_round */ |
| 28993 | case 2225: /* sse2_cvttsd2siq */ |
| 28994 | case 2226: /* sse2_cvttsd2siq_round */ |
| 28995 | case 2227: /* floatv8siv8df2 */ |
| 28996 | case 2228: /* floatv8siv8df2_mask */ |
| 28997 | case 2229: /* floatv4siv4df2 */ |
| 28998 | case 2230: /* floatv4siv4df2_mask */ |
| 28999 | case 2231: /* floatv8div8df2 */ |
| 29000 | case 2232: /* floatv8div8df2_round */ |
| 29001 | case 2233: /* floatv8div8df2_mask */ |
| 29002 | case 2234: /* floatv8div8df2_mask_round */ |
| 29003 | case 2235: /* ufloatv8div8df2 */ |
| 29004 | case 2236: /* ufloatv8div8df2_round */ |
| 29005 | case 2237: /* ufloatv8div8df2_mask */ |
| 29006 | case 2238: /* ufloatv8div8df2_mask_round */ |
| 29007 | case 2239: /* floatv4div4df2 */ |
| 29008 | case 2240: /* floatv4div4df2_round */ |
| 29009 | case 2241: /* floatv4div4df2_mask */ |
| 29010 | case 2242: /* floatv4div4df2_mask_round */ |
| 29011 | case 2243: /* ufloatv4div4df2 */ |
| 29012 | case 2244: /* ufloatv4div4df2_round */ |
| 29013 | case 2245: /* ufloatv4div4df2_mask */ |
| 29014 | case 2246: /* ufloatv4div4df2_mask_round */ |
| 29015 | case 2247: /* floatv2div2df2 */ |
| 29016 | case 2248: /* floatv2div2df2_round */ |
| 29017 | case 2249: /* floatv2div2df2_mask */ |
| 29018 | case 2250: /* floatv2div2df2_mask_round */ |
| 29019 | case 2251: /* ufloatv2div2df2 */ |
| 29020 | case 2252: /* ufloatv2div2df2_round */ |
| 29021 | case 2253: /* ufloatv2div2df2_mask */ |
| 29022 | case 2254: /* ufloatv2div2df2_mask_round */ |
| 29023 | case 2255: /* floatv8div8sf2 */ |
| 29024 | case 2256: /* floatv8div8sf2_round */ |
| 29025 | case 2257: /* floatv8div8sf2_mask */ |
| 29026 | case 2258: /* floatv8div8sf2_mask_round */ |
| 29027 | case 2259: /* ufloatv8div8sf2 */ |
| 29028 | case 2260: /* ufloatv8div8sf2_round */ |
| 29029 | case 2261: /* ufloatv8div8sf2_mask */ |
| 29030 | case 2262: /* ufloatv8div8sf2_mask_round */ |
| 29031 | case 2263: /* floatv4div4sf2 */ |
| 29032 | case 2264: /* floatv4div4sf2_mask */ |
| 29033 | case 2265: /* ufloatv4div4sf2 */ |
| 29034 | case 2266: /* ufloatv4div4sf2_mask */ |
| 29035 | case 2267: /* *floatv2div2sf2 */ |
| 29036 | case 2268: /* *ufloatv2div2sf2 */ |
| 29037 | case 2269: /* floatv2div2sf2_mask */ |
| 29038 | case 2270: /* ufloatv2div2sf2_mask */ |
| 29039 | case 2271: /* *floatv2div2sf2_mask_1 */ |
| 29040 | case 2272: /* *ufloatv2div2sf2_mask_1 */ |
| 29041 | case 2273: /* ufloatv8siv8df2 */ |
| 29042 | case 2274: /* ufloatv8siv8df2_mask */ |
| 29043 | case 2275: /* ufloatv4siv4df2 */ |
| 29044 | case 2276: /* ufloatv4siv4df2_mask */ |
| 29045 | case 2277: /* ufloatv2siv2df2 */ |
| 29046 | case 2278: /* ufloatv2siv2df2_mask */ |
| 29047 | case 2279: /* avx512f_cvtdq2pd512_2 */ |
| 29048 | case 2280: /* avx_cvtdq2pd256_2 */ |
| 29049 | case 2281: /* sse2_cvtdq2pd */ |
| 29050 | case 2282: /* sse2_cvtdq2pd_mask */ |
| 29051 | case 2283: /* avx512f_cvtpd2dq512 */ |
| 29052 | case 2284: /* avx512f_cvtpd2dq512_round */ |
| 29053 | case 2285: /* avx512f_cvtpd2dq512_mask */ |
| 29054 | case 2286: /* avx512f_cvtpd2dq512_mask_round */ |
| 29055 | case 2287: /* avx_cvtpd2dq256 */ |
| 29056 | case 2288: /* avx_cvtpd2dq256_mask */ |
| 29057 | case 2289: /* *avx_cvtpd2dq256_2 */ |
| 29058 | case 2290: /* sse2_cvtpd2dq */ |
| 29059 | case 2291: /* sse2_cvtpd2dq_mask */ |
| 29060 | case 2292: /* ufix_notruncv8dfv8si2 */ |
| 29061 | case 2293: /* ufix_notruncv8dfv8si2_round */ |
| 29062 | case 2294: /* ufix_notruncv8dfv8si2_mask */ |
| 29063 | case 2295: /* ufix_notruncv8dfv8si2_mask_round */ |
| 29064 | case 2296: /* ufix_notruncv4dfv4si2 */ |
| 29065 | case 2297: /* ufix_notruncv4dfv4si2_round */ |
| 29066 | case 2298: /* ufix_notruncv4dfv4si2_mask */ |
| 29067 | case 2299: /* ufix_notruncv4dfv4si2_mask_round */ |
| 29068 | case 2300: /* ufix_notruncv2dfv2si2 */ |
| 29069 | case 2301: /* ufix_notruncv2dfv2si2_mask */ |
| 29070 | case 2302: /* fix_truncv8dfv8si2 */ |
| 29071 | case 2303: /* fix_truncv8dfv8si2_round */ |
| 29072 | case 2304: /* fix_truncv8dfv8si2_mask */ |
| 29073 | case 2305: /* fix_truncv8dfv8si2_mask_round */ |
| 29074 | case 2306: /* ufix_truncv8dfv8si2 */ |
| 29075 | case 2307: /* ufix_truncv8dfv8si2_round */ |
| 29076 | case 2308: /* ufix_truncv8dfv8si2_mask */ |
| 29077 | case 2309: /* ufix_truncv8dfv8si2_mask_round */ |
| 29078 | case 2310: /* ufix_truncv2dfv2si2 */ |
| 29079 | case 2311: /* ufix_truncv2dfv2si2_mask */ |
| 29080 | case 2312: /* fix_truncv4dfv4si2 */ |
| 29081 | case 2313: /* fix_truncv4dfv4si2_mask */ |
| 29082 | case 2314: /* ufix_truncv4dfv4si2 */ |
| 29083 | case 2315: /* ufix_truncv4dfv4si2_mask */ |
| 29084 | case 2316: /* fix_truncv8dfv8di2 */ |
| 29085 | case 2317: /* fix_truncv8dfv8di2_round */ |
| 29086 | case 2318: /* fix_truncv8dfv8di2_mask */ |
| 29087 | case 2319: /* fix_truncv8dfv8di2_mask_round */ |
| 29088 | case 2320: /* ufix_truncv8dfv8di2 */ |
| 29089 | case 2321: /* ufix_truncv8dfv8di2_round */ |
| 29090 | case 2322: /* ufix_truncv8dfv8di2_mask */ |
| 29091 | case 2323: /* ufix_truncv8dfv8di2_mask_round */ |
| 29092 | case 2324: /* fix_truncv4dfv4di2 */ |
| 29093 | case 2325: /* fix_truncv4dfv4di2_mask */ |
| 29094 | case 2326: /* ufix_truncv4dfv4di2 */ |
| 29095 | case 2327: /* ufix_truncv4dfv4di2_mask */ |
| 29096 | case 2328: /* fix_truncv2dfv2di2 */ |
| 29097 | case 2329: /* fix_truncv2dfv2di2_mask */ |
| 29098 | case 2330: /* ufix_truncv2dfv2di2 */ |
| 29099 | case 2331: /* ufix_truncv2dfv2di2_mask */ |
| 29100 | case 2332: /* fix_notruncv8dfv8di2 */ |
| 29101 | case 2333: /* fix_notruncv8dfv8di2_round */ |
| 29102 | case 2334: /* fix_notruncv8dfv8di2_mask */ |
| 29103 | case 2335: /* fix_notruncv8dfv8di2_mask_round */ |
| 29104 | case 2336: /* fix_notruncv4dfv4di2 */ |
| 29105 | case 2337: /* fix_notruncv4dfv4di2_mask */ |
| 29106 | case 2338: /* fix_notruncv2dfv2di2 */ |
| 29107 | case 2339: /* fix_notruncv2dfv2di2_mask */ |
| 29108 | case 2340: /* ufix_notruncv8dfv8di2 */ |
| 29109 | case 2341: /* ufix_notruncv8dfv8di2_round */ |
| 29110 | case 2342: /* ufix_notruncv8dfv8di2_mask */ |
| 29111 | case 2343: /* ufix_notruncv8dfv8di2_mask_round */ |
| 29112 | case 2344: /* ufix_notruncv4dfv4di2 */ |
| 29113 | case 2345: /* ufix_notruncv4dfv4di2_mask */ |
| 29114 | case 2346: /* ufix_notruncv2dfv2di2 */ |
| 29115 | case 2347: /* ufix_notruncv2dfv2di2_mask */ |
| 29116 | case 2348: /* fix_truncv8sfv8di2 */ |
| 29117 | case 2349: /* fix_truncv8sfv8di2_round */ |
| 29118 | case 2350: /* fix_truncv8sfv8di2_mask */ |
| 29119 | case 2351: /* fix_truncv8sfv8di2_mask_round */ |
| 29120 | case 2352: /* ufix_truncv8sfv8di2 */ |
| 29121 | case 2353: /* ufix_truncv8sfv8di2_round */ |
| 29122 | case 2354: /* ufix_truncv8sfv8di2_mask */ |
| 29123 | case 2355: /* ufix_truncv8sfv8di2_mask_round */ |
| 29124 | case 2356: /* fix_truncv4sfv4di2 */ |
| 29125 | case 2357: /* fix_truncv4sfv4di2_mask */ |
| 29126 | case 2358: /* ufix_truncv4sfv4di2 */ |
| 29127 | case 2359: /* ufix_truncv4sfv4di2_mask */ |
| 29128 | case 2360: /* fix_truncv2sfv2di2 */ |
| 29129 | case 2361: /* fix_truncv2sfv2di2_mask */ |
| 29130 | case 2362: /* ufix_truncv2sfv2di2 */ |
| 29131 | case 2363: /* ufix_truncv2sfv2di2_mask */ |
| 29132 | case 2364: /* ufix_truncv8sfv8si2 */ |
| 29133 | case 2365: /* ufix_truncv8sfv8si2_mask */ |
| 29134 | case 2366: /* ufix_truncv4sfv4si2 */ |
| 29135 | case 2367: /* ufix_truncv4sfv4si2_mask */ |
| 29136 | case 2368: /* sse2_cvttpd2dq */ |
| 29137 | case 2369: /* sse2_cvttpd2dq_mask */ |
| 29138 | case 2370: /* sse2_cvtsd2ss */ |
| 29139 | case 2371: /* sse2_cvtsd2ss_round */ |
| 29140 | case 2372: /* *sse2_vd_cvtsd2ss */ |
| 29141 | case 2373: /* sse2_cvtss2sd */ |
| 29142 | case 2374: /* sse2_cvtss2sd_round */ |
| 29143 | case 2375: /* *sse2_vd_cvtss2sd */ |
| 29144 | case 2376: /* *avx512f_cvtpd2ps512 */ |
| 29145 | case 2377: /* *avx512f_cvtpd2ps512_round */ |
| 29146 | case 2378: /* avx512f_cvtpd2ps512_mask */ |
| 29147 | case 2379: /* avx512f_cvtpd2ps512_mask_round */ |
| 29148 | case 2380: /* avx_cvtpd2ps256 */ |
| 29149 | case 2381: /* avx_cvtpd2ps256_mask */ |
| 29150 | case 2382: /* *sse2_cvtpd2ps */ |
| 29151 | case 2383: /* *sse2_cvtpd2ps_mask */ |
| 29152 | case 2384: /* avx512f_cvtps2pd512 */ |
| 29153 | case 2385: /* avx512f_cvtps2pd512_round */ |
| 29154 | case 2386: /* avx512f_cvtps2pd512_mask */ |
| 29155 | case 2387: /* avx512f_cvtps2pd512_mask_round */ |
| 29156 | case 2388: /* avx_cvtps2pd256 */ |
| 29157 | case 2389: /* avx_cvtps2pd256_mask */ |
| 29158 | case 2390: /* *avx_cvtps2pd256_2 */ |
| 29159 | case 2391: /* vec_unpacks_lo_v16sf */ |
| 29160 | case 2416: /* sse2_cvtps2pd */ |
| 29161 | case 2417: /* sse2_cvtps2pd_mask */ |
| 29162 | case 2418: /* sse_movhlps */ |
| 29163 | case 2419: /* sse_movlhps */ |
| 29164 | case 2449: /* sse_storehps */ |
| 29165 | case 2450: /* sse_loadhps */ |
| 29166 | case 2451: /* sse_storelps */ |
| 29167 | case 2452: /* sse_loadlps */ |
| 29168 | case 2453: /* sse_movss */ |
| 29169 | case 2459: /* *vec_concatv2sf_sse4_1 */ |
| 29170 | case 2460: /* *vec_concatv2sf_sse */ |
| 29171 | case 2461: /* *vec_concatv4sf */ |
| 29172 | case 2462: /* vec_setv4si_0 */ |
| 29173 | case 2463: /* vec_setv4sf_0 */ |
| 29174 | case 2536: /* *vec_interleave_highv2df */ |
| 29175 | case 2542: /* *vec_interleave_lowv2df */ |
| 29176 | case 2726: /* sse2_storehpd */ |
| 29177 | case 2727: /* *vec_extractv2df_1_sse */ |
| 29178 | case 2728: /* sse2_storelpd */ |
| 29179 | case 2729: /* *vec_extractv2df_0_sse */ |
| 29180 | case 2730: /* sse2_loadhpd */ |
| 29181 | case 2731: /* sse2_loadlpd */ |
| 29182 | case 2732: /* sse2_movsd */ |
| 29183 | case 2735: /* vec_concatv2df */ |
| 29184 | case 2736: /* *avx512f_ss_truncatev16siv16qi2 */ |
| 29185 | case 2737: /* *avx512f_truncatev16siv16qi2 */ |
| 29186 | case 2738: /* *avx512f_us_truncatev16siv16qi2 */ |
| 29187 | case 2739: /* *avx512f_ss_truncatev16siv16hi2 */ |
| 29188 | case 2740: /* *avx512f_truncatev16siv16hi2 */ |
| 29189 | case 2741: /* *avx512f_us_truncatev16siv16hi2 */ |
| 29190 | case 2742: /* *avx512f_ss_truncatev8div8si2 */ |
| 29191 | case 2743: /* *avx512f_truncatev8div8si2 */ |
| 29192 | case 2744: /* *avx512f_us_truncatev8div8si2 */ |
| 29193 | case 2745: /* *avx512f_ss_truncatev8div8hi2 */ |
| 29194 | case 2746: /* *avx512f_truncatev8div8hi2 */ |
| 29195 | case 2747: /* *avx512f_us_truncatev8div8hi2 */ |
| 29196 | case 2748: /* avx512f_ss_truncatev16siv16qi2_mask */ |
| 29197 | case 2749: /* avx512f_truncatev16siv16qi2_mask */ |
| 29198 | case 2750: /* avx512f_us_truncatev16siv16qi2_mask */ |
| 29199 | case 2751: /* avx512f_ss_truncatev16siv16hi2_mask */ |
| 29200 | case 2752: /* avx512f_truncatev16siv16hi2_mask */ |
| 29201 | case 2753: /* avx512f_us_truncatev16siv16hi2_mask */ |
| 29202 | case 2754: /* avx512f_ss_truncatev8div8si2_mask */ |
| 29203 | case 2755: /* avx512f_truncatev8div8si2_mask */ |
| 29204 | case 2756: /* avx512f_us_truncatev8div8si2_mask */ |
| 29205 | case 2757: /* avx512f_ss_truncatev8div8hi2_mask */ |
| 29206 | case 2758: /* avx512f_truncatev8div8hi2_mask */ |
| 29207 | case 2759: /* avx512f_us_truncatev8div8hi2_mask */ |
| 29208 | case 2760: /* avx512bw_ss_truncatev32hiv32qi2 */ |
| 29209 | case 2761: /* avx512bw_truncatev32hiv32qi2 */ |
| 29210 | case 2762: /* avx512bw_us_truncatev32hiv32qi2 */ |
| 29211 | case 2763: /* avx512bw_ss_truncatev32hiv32qi2_mask */ |
| 29212 | case 2764: /* avx512bw_truncatev32hiv32qi2_mask */ |
| 29213 | case 2765: /* avx512bw_us_truncatev32hiv32qi2_mask */ |
| 29214 | case 2766: /* *avx512vl_ss_truncatev4div4si2 */ |
| 29215 | case 2767: /* *avx512vl_truncatev4div4si2 */ |
| 29216 | case 2768: /* *avx512vl_us_truncatev4div4si2 */ |
| 29217 | case 2769: /* *avx512vl_ss_truncatev8siv8hi2 */ |
| 29218 | case 2770: /* *avx512vl_truncatev8siv8hi2 */ |
| 29219 | case 2771: /* *avx512vl_us_truncatev8siv8hi2 */ |
| 29220 | case 2772: /* *avx512vl_ss_truncatev16hiv16qi2 */ |
| 29221 | case 2773: /* *avx512vl_truncatev16hiv16qi2 */ |
| 29222 | case 2774: /* *avx512vl_us_truncatev16hiv16qi2 */ |
| 29223 | case 2775: /* avx512vl_ss_truncatev4div4si2_mask */ |
| 29224 | case 2776: /* avx512vl_truncatev4div4si2_mask */ |
| 29225 | case 2777: /* avx512vl_us_truncatev4div4si2_mask */ |
| 29226 | case 2778: /* avx512vl_ss_truncatev8siv8hi2_mask */ |
| 29227 | case 2779: /* avx512vl_truncatev8siv8hi2_mask */ |
| 29228 | case 2780: /* avx512vl_us_truncatev8siv8hi2_mask */ |
| 29229 | case 2781: /* avx512vl_ss_truncatev16hiv16qi2_mask */ |
| 29230 | case 2782: /* avx512vl_truncatev16hiv16qi2_mask */ |
| 29231 | case 2783: /* avx512vl_us_truncatev16hiv16qi2_mask */ |
| 29232 | case 2784: /* *avx512vl_ss_truncatev4div4qi2 */ |
| 29233 | case 2785: /* *avx512vl_truncatev4div4qi2 */ |
| 29234 | case 2786: /* *avx512vl_us_truncatev4div4qi2 */ |
| 29235 | case 2787: /* *avx512vl_ss_truncatev2div2qi2 */ |
| 29236 | case 2788: /* *avx512vl_truncatev2div2qi2 */ |
| 29237 | case 2789: /* *avx512vl_us_truncatev2div2qi2 */ |
| 29238 | case 2790: /* *avx512vl_ss_truncatev8siv8qi2 */ |
| 29239 | case 2791: /* *avx512vl_truncatev8siv8qi2 */ |
| 29240 | case 2792: /* *avx512vl_us_truncatev8siv8qi2 */ |
| 29241 | case 2793: /* *avx512vl_ss_truncatev4siv4qi2 */ |
| 29242 | case 2794: /* *avx512vl_truncatev4siv4qi2 */ |
| 29243 | case 2795: /* *avx512vl_us_truncatev4siv4qi2 */ |
| 29244 | case 2796: /* *avx512vl_ss_truncatev8hiv8qi2 */ |
| 29245 | case 2797: /* *avx512vl_truncatev8hiv8qi2 */ |
| 29246 | case 2798: /* *avx512vl_us_truncatev8hiv8qi2 */ |
| 29247 | case 2799: /* *avx512vl_ss_truncatev2div2qi2_store */ |
| 29248 | case 2800: /* *avx512vl_truncatev2div2qi2_store */ |
| 29249 | case 2801: /* *avx512vl_us_truncatev2div2qi2_store */ |
| 29250 | case 2802: /* avx512vl_ss_truncatev2div2qi2_mask */ |
| 29251 | case 2803: /* avx512vl_truncatev2div2qi2_mask */ |
| 29252 | case 2804: /* avx512vl_us_truncatev2div2qi2_mask */ |
| 29253 | case 2805: /* *avx512vl_ss_truncatev2div2qi2_mask_1 */ |
| 29254 | case 2806: /* *avx512vl_truncatev2div2qi2_mask_1 */ |
| 29255 | case 2807: /* *avx512vl_us_truncatev2div2qi2_mask_1 */ |
| 29256 | case 2808: /* avx512vl_ss_truncatev2div2qi2_mask_store */ |
| 29257 | case 2809: /* avx512vl_truncatev2div2qi2_mask_store */ |
| 29258 | case 2810: /* avx512vl_us_truncatev2div2qi2_mask_store */ |
| 29259 | case 2811: /* *avx512vl_ss_truncatev4siv4qi2_store */ |
| 29260 | case 2812: /* *avx512vl_truncatev4siv4qi2_store */ |
| 29261 | case 2813: /* *avx512vl_us_truncatev4siv4qi2_store */ |
| 29262 | case 2814: /* *avx512vl_ss_truncatev4div4qi2_store */ |
| 29263 | case 2815: /* *avx512vl_truncatev4div4qi2_store */ |
| 29264 | case 2816: /* *avx512vl_us_truncatev4div4qi2_store */ |
| 29265 | case 2817: /* avx512vl_ss_truncatev4siv4qi2_mask */ |
| 29266 | case 2818: /* avx512vl_truncatev4siv4qi2_mask */ |
| 29267 | case 2819: /* avx512vl_us_truncatev4siv4qi2_mask */ |
| 29268 | case 2820: /* avx512vl_ss_truncatev4div4qi2_mask */ |
| 29269 | case 2821: /* avx512vl_truncatev4div4qi2_mask */ |
| 29270 | case 2822: /* avx512vl_us_truncatev4div4qi2_mask */ |
| 29271 | case 2823: /* *avx512vl_ss_truncatev4siv4qi2_mask_1 */ |
| 29272 | case 2824: /* *avx512vl_truncatev4siv4qi2_mask_1 */ |
| 29273 | case 2825: /* *avx512vl_us_truncatev4siv4qi2_mask_1 */ |
| 29274 | case 2826: /* *avx512vl_ss_truncatev4div4qi2_mask_1 */ |
| 29275 | case 2827: /* *avx512vl_truncatev4div4qi2_mask_1 */ |
| 29276 | case 2828: /* *avx512vl_us_truncatev4div4qi2_mask_1 */ |
| 29277 | case 2829: /* avx512vl_ss_truncatev4siv4qi2_mask_store */ |
| 29278 | case 2830: /* avx512vl_truncatev4siv4qi2_mask_store */ |
| 29279 | case 2831: /* avx512vl_us_truncatev4siv4qi2_mask_store */ |
| 29280 | case 2832: /* avx512vl_ss_truncatev4div4qi2_mask_store */ |
| 29281 | case 2833: /* avx512vl_truncatev4div4qi2_mask_store */ |
| 29282 | case 2834: /* avx512vl_us_truncatev4div4qi2_mask_store */ |
| 29283 | case 2835: /* *avx512vl_ss_truncatev8hiv8qi2_store */ |
| 29284 | case 2836: /* *avx512vl_truncatev8hiv8qi2_store */ |
| 29285 | case 2837: /* *avx512vl_us_truncatev8hiv8qi2_store */ |
| 29286 | case 2838: /* *avx512vl_ss_truncatev8siv8qi2_store */ |
| 29287 | case 2839: /* *avx512vl_truncatev8siv8qi2_store */ |
| 29288 | case 2840: /* *avx512vl_us_truncatev8siv8qi2_store */ |
| 29289 | case 2841: /* avx512vl_ss_truncatev8hiv8qi2_mask */ |
| 29290 | case 2842: /* avx512vl_truncatev8hiv8qi2_mask */ |
| 29291 | case 2843: /* avx512vl_us_truncatev8hiv8qi2_mask */ |
| 29292 | case 2844: /* avx512vl_ss_truncatev8siv8qi2_mask */ |
| 29293 | case 2845: /* avx512vl_truncatev8siv8qi2_mask */ |
| 29294 | case 2846: /* avx512vl_us_truncatev8siv8qi2_mask */ |
| 29295 | case 2847: /* *avx512vl_ss_truncatev8hiv8qi2_mask_1 */ |
| 29296 | case 2848: /* *avx512vl_truncatev8hiv8qi2_mask_1 */ |
| 29297 | case 2849: /* *avx512vl_us_truncatev8hiv8qi2_mask_1 */ |
| 29298 | case 2850: /* *avx512vl_ss_truncatev8siv8qi2_mask_1 */ |
| 29299 | case 2851: /* *avx512vl_truncatev8siv8qi2_mask_1 */ |
| 29300 | case 2852: /* *avx512vl_us_truncatev8siv8qi2_mask_1 */ |
| 29301 | case 2853: /* avx512vl_ss_truncatev8hiv8qi2_mask_store */ |
| 29302 | case 2854: /* avx512vl_truncatev8hiv8qi2_mask_store */ |
| 29303 | case 2855: /* avx512vl_us_truncatev8hiv8qi2_mask_store */ |
| 29304 | case 2856: /* avx512vl_ss_truncatev8siv8qi2_mask_store */ |
| 29305 | case 2857: /* avx512vl_truncatev8siv8qi2_mask_store */ |
| 29306 | case 2858: /* avx512vl_us_truncatev8siv8qi2_mask_store */ |
| 29307 | case 2859: /* *avx512vl_ss_truncatev4div4hi2 */ |
| 29308 | case 2860: /* *avx512vl_truncatev4div4hi2 */ |
| 29309 | case 2861: /* *avx512vl_us_truncatev4div4hi2 */ |
| 29310 | case 2862: /* *avx512vl_ss_truncatev2div2hi2 */ |
| 29311 | case 2863: /* *avx512vl_truncatev2div2hi2 */ |
| 29312 | case 2864: /* *avx512vl_us_truncatev2div2hi2 */ |
| 29313 | case 2865: /* *avx512vl_ss_truncatev4siv4hi2 */ |
| 29314 | case 2866: /* *avx512vl_truncatev4siv4hi2 */ |
| 29315 | case 2867: /* *avx512vl_us_truncatev4siv4hi2 */ |
| 29316 | case 2868: /* *avx512vl_ss_truncatev4siv4hi2_store */ |
| 29317 | case 2869: /* *avx512vl_truncatev4siv4hi2_store */ |
| 29318 | case 2870: /* *avx512vl_us_truncatev4siv4hi2_store */ |
| 29319 | case 2871: /* *avx512vl_ss_truncatev4div4hi2_store */ |
| 29320 | case 2872: /* *avx512vl_truncatev4div4hi2_store */ |
| 29321 | case 2873: /* *avx512vl_us_truncatev4div4hi2_store */ |
| 29322 | case 2874: /* avx512vl_ss_truncatev4siv4hi2_mask */ |
| 29323 | case 2875: /* avx512vl_truncatev4siv4hi2_mask */ |
| 29324 | case 2876: /* avx512vl_us_truncatev4siv4hi2_mask */ |
| 29325 | case 2877: /* avx512vl_ss_truncatev4div4hi2_mask */ |
| 29326 | case 2878: /* avx512vl_truncatev4div4hi2_mask */ |
| 29327 | case 2879: /* avx512vl_us_truncatev4div4hi2_mask */ |
| 29328 | case 2880: /* *avx512vl_ss_truncatev4siv4hi2_mask_1 */ |
| 29329 | case 2881: /* *avx512vl_truncatev4siv4hi2_mask_1 */ |
| 29330 | case 2882: /* *avx512vl_us_truncatev4siv4hi2_mask_1 */ |
| 29331 | case 2883: /* *avx512vl_ss_truncatev4div4hi2_mask_1 */ |
| 29332 | case 2884: /* *avx512vl_truncatev4div4hi2_mask_1 */ |
| 29333 | case 2885: /* *avx512vl_us_truncatev4div4hi2_mask_1 */ |
| 29334 | case 2886: /* avx512vl_ss_truncatev4siv4hi2_mask_store */ |
| 29335 | case 2887: /* avx512vl_truncatev4siv4hi2_mask_store */ |
| 29336 | case 2888: /* avx512vl_us_truncatev4siv4hi2_mask_store */ |
| 29337 | case 2889: /* avx512vl_ss_truncatev4div4hi2_mask_store */ |
| 29338 | case 2890: /* avx512vl_truncatev4div4hi2_mask_store */ |
| 29339 | case 2891: /* avx512vl_us_truncatev4div4hi2_mask_store */ |
| 29340 | case 2892: /* *avx512vl_ss_truncatev2div2hi2_store */ |
| 29341 | case 2893: /* *avx512vl_truncatev2div2hi2_store */ |
| 29342 | case 2894: /* *avx512vl_us_truncatev2div2hi2_store */ |
| 29343 | case 2895: /* avx512vl_ss_truncatev2div2hi2_mask */ |
| 29344 | case 2896: /* avx512vl_truncatev2div2hi2_mask */ |
| 29345 | case 2897: /* avx512vl_us_truncatev2div2hi2_mask */ |
| 29346 | case 2898: /* *avx512vl_ss_truncatev2div2hi2_mask_1 */ |
| 29347 | case 2899: /* *avx512vl_truncatev2div2hi2_mask_1 */ |
| 29348 | case 2900: /* *avx512vl_us_truncatev2div2hi2_mask_1 */ |
| 29349 | case 2901: /* avx512vl_ss_truncatev2div2hi2_mask_store */ |
| 29350 | case 2902: /* avx512vl_truncatev2div2hi2_mask_store */ |
| 29351 | case 2903: /* avx512vl_us_truncatev2div2hi2_mask_store */ |
| 29352 | case 2904: /* *avx512vl_ss_truncatev2div2si2 */ |
| 29353 | case 2905: /* *avx512vl_truncatev2div2si2 */ |
| 29354 | case 2906: /* *avx512vl_us_truncatev2div2si2 */ |
| 29355 | case 2907: /* *avx512vl_ss_truncatev2div2si2_store */ |
| 29356 | case 2908: /* *avx512vl_truncatev2div2si2_store */ |
| 29357 | case 2909: /* *avx512vl_us_truncatev2div2si2_store */ |
| 29358 | case 2910: /* avx512vl_ss_truncatev2div2si2_mask */ |
| 29359 | case 2911: /* avx512vl_truncatev2div2si2_mask */ |
| 29360 | case 2912: /* avx512vl_us_truncatev2div2si2_mask */ |
| 29361 | case 2913: /* *avx512vl_ss_truncatev2div2si2_mask_1 */ |
| 29362 | case 2914: /* *avx512vl_truncatev2div2si2_mask_1 */ |
| 29363 | case 2915: /* *avx512vl_us_truncatev2div2si2_mask_1 */ |
| 29364 | case 2916: /* avx512vl_ss_truncatev2div2si2_mask_store */ |
| 29365 | case 2917: /* avx512vl_truncatev2div2si2_mask_store */ |
| 29366 | case 2918: /* avx512vl_us_truncatev2div2si2_mask_store */ |
| 29367 | case 2919: /* *avx512f_ss_truncatev8div16qi2 */ |
| 29368 | case 2920: /* *avx512f_truncatev8div16qi2 */ |
| 29369 | case 2921: /* *avx512f_us_truncatev8div16qi2 */ |
| 29370 | case 2922: /* *avx512f_ss_truncatev8div16qi2_store */ |
| 29371 | case 2923: /* *avx512f_truncatev8div16qi2_store */ |
| 29372 | case 2924: /* *avx512f_us_truncatev8div16qi2_store */ |
| 29373 | case 2925: /* avx512f_ss_truncatev8div16qi2_mask */ |
| 29374 | case 2926: /* avx512f_truncatev8div16qi2_mask */ |
| 29375 | case 2927: /* avx512f_us_truncatev8div16qi2_mask */ |
| 29376 | case 2928: /* *avx512f_ss_truncatev8div16qi2_mask_1 */ |
| 29377 | case 2929: /* *avx512f_truncatev8div16qi2_mask_1 */ |
| 29378 | case 2930: /* *avx512f_us_truncatev8div16qi2_mask_1 */ |
| 29379 | case 2931: /* avx512f_ss_truncatev8div16qi2_mask_store */ |
| 29380 | case 2932: /* avx512f_truncatev8div16qi2_mask_store */ |
| 29381 | case 2933: /* avx512f_us_truncatev8div16qi2_mask_store */ |
| 29382 | case 3620: /* sse2_loadld */ |
| 29383 | case 3638: /* *vec_extractv2di_1 */ |
| 29384 | case 3639: /* *vec_concatv2si_sse4_1 */ |
| 29385 | case 3640: /* *vec_concatv2si */ |
| 29386 | case 3641: /* *vec_concatv4si */ |
| 29387 | case 3642: /* vec_concatv2di */ |
| 29388 | case 3658: /* avx_movmskps256 */ |
| 29389 | case 3659: /* sse_movmskps */ |
| 29390 | case 3660: /* avx_movmskpd256 */ |
| 29391 | case 3661: /* sse2_movmskpd */ |
| 29392 | case 3662: /* *avx_movmskps256_zext */ |
| 29393 | case 3663: /* *sse_movmskps_zext */ |
| 29394 | case 3664: /* *avx_movmskpd256_zext */ |
| 29395 | case 3665: /* *sse2_movmskpd_zext */ |
| 29396 | case 3666: /* avx2_pmovmskb */ |
| 29397 | case 3667: /* sse2_pmovmskb */ |
| 29398 | case 3668: /* *avx2_pmovmskb_zext */ |
| 29399 | case 3669: /* *sse2_pmovmskb_zext */ |
| 29400 | case 3670: /* *sse2_maskmovdqu */ |
| 29401 | case 3671: /* *sse2_maskmovdqu */ |
| 29402 | case 3764: /* sse4a_movntsf */ |
| 29403 | case 3765: /* sse4a_movntdf */ |
| 29404 | case 3766: /* sse4a_vmmovntv4sf */ |
| 29405 | case 3767: /* sse4a_vmmovntv2df */ |
| 29406 | case 3772: /* avx_blendps256 */ |
| 29407 | case 3773: /* sse4_1_blendps */ |
| 29408 | case 3774: /* avx_blendpd256 */ |
| 29409 | case 3775: /* sse4_1_blendpd */ |
| 29410 | case 3776: /* avx_blendvps256 */ |
| 29411 | case 3777: /* sse4_1_blendvps */ |
| 29412 | case 3778: /* avx_blendvpd256 */ |
| 29413 | case 3779: /* sse4_1_blendvpd */ |
| 29414 | case 3784: /* avx512f_movntdqa */ |
| 29415 | case 3785: /* avx2_movntdqa */ |
| 29416 | case 3786: /* sse4_1_movntdqa */ |
| 29417 | case 3795: /* avx2_pblendvb */ |
| 29418 | case 3796: /* sse4_1_pblendvb */ |
| 29419 | case 3797: /* sse4_1_pblendw */ |
| 29420 | case 3798: /* *avx2_pblendw */ |
| 29421 | case 3799: /* avx2_pblenddv8si */ |
| 29422 | case 3800: /* avx2_pblenddv4si */ |
| 29423 | case 3802: /* avx2_sign_extendv16qiv16hi2 */ |
| 29424 | case 3803: /* avx2_sign_extendv16qiv16hi2_mask */ |
| 29425 | case 3804: /* avx2_zero_extendv16qiv16hi2 */ |
| 29426 | case 3805: /* avx2_zero_extendv16qiv16hi2_mask */ |
| 29427 | case 3806: /* avx512bw_sign_extendv32qiv32hi2 */ |
| 29428 | case 3807: /* avx512bw_sign_extendv32qiv32hi2_mask */ |
| 29429 | case 3808: /* avx512bw_zero_extendv32qiv32hi2 */ |
| 29430 | case 3809: /* avx512bw_zero_extendv32qiv32hi2_mask */ |
| 29431 | case 3810: /* sse4_1_sign_extendv8qiv8hi2 */ |
| 29432 | case 3811: /* sse4_1_sign_extendv8qiv8hi2_mask */ |
| 29433 | case 3812: /* sse4_1_zero_extendv8qiv8hi2 */ |
| 29434 | case 3813: /* sse4_1_zero_extendv8qiv8hi2_mask */ |
| 29435 | case 3814: /* *avx512f_sign_extendv16qiv16si2 */ |
| 29436 | case 3815: /* avx512f_sign_extendv16qiv16si2_mask */ |
| 29437 | case 3816: /* *avx512f_zero_extendv16qiv16si2 */ |
| 29438 | case 3817: /* avx512f_zero_extendv16qiv16si2_mask */ |
| 29439 | case 3818: /* avx2_sign_extendv8qiv8si2 */ |
| 29440 | case 3819: /* avx2_sign_extendv8qiv8si2_mask */ |
| 29441 | case 3820: /* avx2_zero_extendv8qiv8si2 */ |
| 29442 | case 3821: /* avx2_zero_extendv8qiv8si2_mask */ |
| 29443 | case 3822: /* sse4_1_sign_extendv4qiv4si2 */ |
| 29444 | case 3823: /* sse4_1_sign_extendv4qiv4si2_mask */ |
| 29445 | case 3824: /* sse4_1_zero_extendv4qiv4si2 */ |
| 29446 | case 3825: /* sse4_1_zero_extendv4qiv4si2_mask */ |
| 29447 | case 3826: /* avx512f_sign_extendv16hiv16si2 */ |
| 29448 | case 3827: /* avx512f_sign_extendv16hiv16si2_mask */ |
| 29449 | case 3828: /* avx512f_zero_extendv16hiv16si2 */ |
| 29450 | case 3829: /* avx512f_zero_extendv16hiv16si2_mask */ |
| 29451 | case 3830: /* avx2_sign_extendv8hiv8si2 */ |
| 29452 | case 3831: /* avx2_sign_extendv8hiv8si2_mask */ |
| 29453 | case 3832: /* avx2_zero_extendv8hiv8si2 */ |
| 29454 | case 3833: /* avx2_zero_extendv8hiv8si2_mask */ |
| 29455 | case 3834: /* sse4_1_sign_extendv4hiv4si2 */ |
| 29456 | case 3835: /* sse4_1_sign_extendv4hiv4si2_mask */ |
| 29457 | case 3836: /* sse4_1_zero_extendv4hiv4si2 */ |
| 29458 | case 3837: /* sse4_1_zero_extendv4hiv4si2_mask */ |
| 29459 | case 3838: /* avx512f_sign_extendv8qiv8di2 */ |
| 29460 | case 3839: /* avx512f_sign_extendv8qiv8di2_mask */ |
| 29461 | case 3840: /* avx512f_zero_extendv8qiv8di2 */ |
| 29462 | case 3841: /* avx512f_zero_extendv8qiv8di2_mask */ |
| 29463 | case 3842: /* avx2_sign_extendv4qiv4di2 */ |
| 29464 | case 3843: /* avx2_sign_extendv4qiv4di2_mask */ |
| 29465 | case 3844: /* avx2_zero_extendv4qiv4di2 */ |
| 29466 | case 3845: /* avx2_zero_extendv4qiv4di2_mask */ |
| 29467 | case 3846: /* sse4_1_sign_extendv2qiv2di2 */ |
| 29468 | case 3847: /* sse4_1_sign_extendv2qiv2di2_mask */ |
| 29469 | case 3848: /* sse4_1_zero_extendv2qiv2di2 */ |
| 29470 | case 3849: /* sse4_1_zero_extendv2qiv2di2_mask */ |
| 29471 | case 3850: /* avx512f_sign_extendv8hiv8di2 */ |
| 29472 | case 3851: /* avx512f_sign_extendv8hiv8di2_mask */ |
| 29473 | case 3852: /* avx512f_zero_extendv8hiv8di2 */ |
| 29474 | case 3853: /* avx512f_zero_extendv8hiv8di2_mask */ |
| 29475 | case 3854: /* avx2_sign_extendv4hiv4di2 */ |
| 29476 | case 3855: /* avx2_sign_extendv4hiv4di2_mask */ |
| 29477 | case 3856: /* avx2_zero_extendv4hiv4di2 */ |
| 29478 | case 3857: /* avx2_zero_extendv4hiv4di2_mask */ |
| 29479 | case 3858: /* sse4_1_sign_extendv2hiv2di2 */ |
| 29480 | case 3859: /* sse4_1_sign_extendv2hiv2di2_mask */ |
| 29481 | case 3860: /* sse4_1_zero_extendv2hiv2di2 */ |
| 29482 | case 3861: /* sse4_1_zero_extendv2hiv2di2_mask */ |
| 29483 | case 3862: /* avx512f_sign_extendv8siv8di2 */ |
| 29484 | case 3863: /* avx512f_sign_extendv8siv8di2_mask */ |
| 29485 | case 3864: /* avx512f_zero_extendv8siv8di2 */ |
| 29486 | case 3865: /* avx512f_zero_extendv8siv8di2_mask */ |
| 29487 | case 3866: /* avx2_sign_extendv4siv4di2 */ |
| 29488 | case 3867: /* avx2_sign_extendv4siv4di2_mask */ |
| 29489 | case 3868: /* avx2_zero_extendv4siv4di2 */ |
| 29490 | case 3869: /* avx2_zero_extendv4siv4di2_mask */ |
| 29491 | case 3870: /* sse4_1_sign_extendv2siv2di2 */ |
| 29492 | case 3871: /* sse4_1_sign_extendv2siv2di2_mask */ |
| 29493 | case 3872: /* sse4_1_zero_extendv2siv2di2 */ |
| 29494 | case 3873: /* sse4_1_zero_extendv2siv2di2_mask */ |
| 29495 | case 3891: /* avx_roundps256 */ |
| 29496 | case 3892: /* sse4_1_roundps */ |
| 29497 | case 3893: /* avx_roundpd256 */ |
| 29498 | case 3894: /* sse4_1_roundpd */ |
| 29499 | case 3895: /* sse4_1_roundss */ |
| 29500 | case 3896: /* sse4_1_roundsd */ |
| 29501 | case 4057: /* avx2_pbroadcastv16si */ |
| 29502 | case 4058: /* avx2_pbroadcastv8di */ |
| 29503 | case 4059: /* avx2_pbroadcastv64qi */ |
| 29504 | case 4060: /* avx2_pbroadcastv32qi */ |
| 29505 | case 4061: /* avx2_pbroadcastv16qi */ |
| 29506 | case 4062: /* avx2_pbroadcastv32hi */ |
| 29507 | case 4063: /* avx2_pbroadcastv16hi */ |
| 29508 | case 4064: /* avx2_pbroadcastv8hi */ |
| 29509 | case 4065: /* avx2_pbroadcastv8si */ |
| 29510 | case 4066: /* avx2_pbroadcastv4si */ |
| 29511 | case 4067: /* avx2_pbroadcastv4di */ |
| 29512 | case 4068: /* avx2_pbroadcastv2di */ |
| 29513 | case 4069: /* avx2_pbroadcastv32qi_1 */ |
| 29514 | case 4070: /* avx2_pbroadcastv16hi_1 */ |
| 29515 | case 4071: /* avx2_pbroadcastv8si_1 */ |
| 29516 | case 4072: /* avx2_pbroadcastv4di_1 */ |
| 29517 | case 4111: /* avx512f_vec_dupv16si_1 */ |
| 29518 | case 4112: /* avx512f_vec_dupv8di_1 */ |
| 29519 | case 4113: /* avx512bw_vec_dupv32hi_1 */ |
| 29520 | case 4114: /* avx512bw_vec_dupv64qi_1 */ |
| 29521 | case 4115: /* avx512f_vec_dupv16si */ |
| 29522 | case 4116: /* avx512f_vec_dupv16si_mask */ |
| 29523 | case 4117: /* avx512vl_vec_dupv8si */ |
| 29524 | case 4118: /* avx512vl_vec_dupv8si_mask */ |
| 29525 | case 4119: /* avx512vl_vec_dupv4si */ |
| 29526 | case 4120: /* avx512vl_vec_dupv4si_mask */ |
| 29527 | case 4121: /* avx512f_vec_dupv8di */ |
| 29528 | case 4122: /* avx512f_vec_dupv8di_mask */ |
| 29529 | case 4123: /* avx512vl_vec_dupv4di */ |
| 29530 | case 4124: /* avx512vl_vec_dupv4di_mask */ |
| 29531 | case 4125: /* avx512vl_vec_dupv2di */ |
| 29532 | case 4126: /* avx512vl_vec_dupv2di_mask */ |
| 29533 | case 4127: /* avx512f_vec_dupv16sf */ |
| 29534 | case 4128: /* avx512f_vec_dupv16sf_mask */ |
| 29535 | case 4129: /* avx512vl_vec_dupv8sf */ |
| 29536 | case 4130: /* avx512vl_vec_dupv8sf_mask */ |
| 29537 | case 4131: /* avx512vl_vec_dupv4sf */ |
| 29538 | case 4132: /* avx512vl_vec_dupv4sf_mask */ |
| 29539 | case 4133: /* avx512f_vec_dupv8df */ |
| 29540 | case 4134: /* avx512f_vec_dupv8df_mask */ |
| 29541 | case 4135: /* avx512vl_vec_dupv4df */ |
| 29542 | case 4136: /* avx512vl_vec_dupv4df_mask */ |
| 29543 | case 4137: /* avx512vl_vec_dupv2df */ |
| 29544 | case 4138: /* avx512vl_vec_dupv2df_mask */ |
| 29545 | case 4139: /* avx512bw_vec_dupv64qi */ |
| 29546 | case 4140: /* avx512bw_vec_dupv64qi_mask */ |
| 29547 | case 4141: /* avx512vl_vec_dupv16qi */ |
| 29548 | case 4142: /* avx512vl_vec_dupv16qi_mask */ |
| 29549 | case 4143: /* avx512vl_vec_dupv32qi */ |
| 29550 | case 4144: /* avx512vl_vec_dupv32qi_mask */ |
| 29551 | case 4145: /* avx512bw_vec_dupv32hi */ |
| 29552 | case 4146: /* avx512bw_vec_dupv32hi_mask */ |
| 29553 | case 4147: /* avx512vl_vec_dupv16hi */ |
| 29554 | case 4148: /* avx512vl_vec_dupv16hi_mask */ |
| 29555 | case 4149: /* avx512vl_vec_dupv8hi */ |
| 29556 | case 4150: /* avx512vl_vec_dupv8hi_mask */ |
| 29557 | case 4151: /* *avx512f_broadcastv16sf */ |
| 29558 | case 4152: /* avx512f_broadcastv16sf_mask */ |
| 29559 | case 4153: /* *avx512f_broadcastv16si */ |
| 29560 | case 4154: /* avx512f_broadcastv16si_mask */ |
| 29561 | case 4155: /* *avx512f_broadcastv8df */ |
| 29562 | case 4156: /* avx512f_broadcastv8df_mask */ |
| 29563 | case 4157: /* *avx512f_broadcastv8di */ |
| 29564 | case 4158: /* avx512f_broadcastv8di_mask */ |
| 29565 | case 4159: /* *avx512bw_vec_dup_gprv64qi */ |
| 29566 | case 4160: /* avx512bw_vec_dup_gprv64qi_mask */ |
| 29567 | case 4161: /* *avx512vl_vec_dup_gprv16qi */ |
| 29568 | case 4162: /* avx512vl_vec_dup_gprv16qi_mask */ |
| 29569 | case 4163: /* *avx512vl_vec_dup_gprv32qi */ |
| 29570 | case 4164: /* avx512vl_vec_dup_gprv32qi_mask */ |
| 29571 | case 4165: /* *avx512bw_vec_dup_gprv32hi */ |
| 29572 | case 4166: /* avx512bw_vec_dup_gprv32hi_mask */ |
| 29573 | case 4167: /* *avx512vl_vec_dup_gprv16hi */ |
| 29574 | case 4168: /* avx512vl_vec_dup_gprv16hi_mask */ |
| 29575 | case 4169: /* *avx512vl_vec_dup_gprv8hi */ |
| 29576 | case 4170: /* avx512vl_vec_dup_gprv8hi_mask */ |
| 29577 | case 4171: /* *avx512f_vec_dup_gprv16si */ |
| 29578 | case 4172: /* avx512f_vec_dup_gprv16si_mask */ |
| 29579 | case 4173: /* *avx512vl_vec_dup_gprv8si */ |
| 29580 | case 4174: /* avx512vl_vec_dup_gprv8si_mask */ |
| 29581 | case 4175: /* *avx512vl_vec_dup_gprv4si */ |
| 29582 | case 4176: /* avx512vl_vec_dup_gprv4si_mask */ |
| 29583 | case 4177: /* *avx512f_vec_dup_gprv8di */ |
| 29584 | case 4178: /* avx512f_vec_dup_gprv8di_mask */ |
| 29585 | case 4179: /* *avx512vl_vec_dup_gprv4di */ |
| 29586 | case 4180: /* avx512vl_vec_dup_gprv4di_mask */ |
| 29587 | case 4181: /* *avx512vl_vec_dup_gprv2di */ |
| 29588 | case 4182: /* avx512vl_vec_dup_gprv2di_mask */ |
| 29589 | case 4183: /* *avx512f_vec_dup_gprv16sf */ |
| 29590 | case 4184: /* avx512f_vec_dup_gprv16sf_mask */ |
| 29591 | case 4185: /* *avx512vl_vec_dup_gprv8sf */ |
| 29592 | case 4186: /* avx512vl_vec_dup_gprv8sf_mask */ |
| 29593 | case 4187: /* *avx512vl_vec_dup_gprv4sf */ |
| 29594 | case 4188: /* avx512vl_vec_dup_gprv4sf_mask */ |
| 29595 | case 4189: /* *avx512f_vec_dup_gprv8df */ |
| 29596 | case 4190: /* avx512f_vec_dup_gprv8df_mask */ |
| 29597 | case 4191: /* *avx512vl_vec_dup_gprv4df */ |
| 29598 | case 4192: /* avx512vl_vec_dup_gprv4df_mask */ |
| 29599 | case 4193: /* *avx512vl_vec_dup_gprv2df */ |
| 29600 | case 4194: /* avx512vl_vec_dup_gprv2df_mask */ |
| 29601 | case 4195: /* vec_dupv4sf */ |
| 29602 | case 4196: /* *vec_dupv4si */ |
| 29603 | case 4197: /* *vec_dupv2di */ |
| 29604 | case 4198: /* avx2_vbroadcasti128_v32qi */ |
| 29605 | case 4199: /* avx2_vbroadcasti128_v16hi */ |
| 29606 | case 4200: /* avx2_vbroadcasti128_v8si */ |
| 29607 | case 4201: /* avx2_vbroadcasti128_v4di */ |
| 29608 | case 4202: /* *vec_dupv32qi */ |
| 29609 | case 4203: /* *vec_dupv16qi */ |
| 29610 | case 4204: /* *vec_dupv16hi */ |
| 29611 | case 4205: /* *vec_dupv8hi */ |
| 29612 | case 4206: /* *vec_dupv8si */ |
| 29613 | case 4207: /* *vec_dupv4si */ |
| 29614 | case 4208: /* vec_dupv8si */ |
| 29615 | case 4209: /* vec_dupv8sf */ |
| 29616 | case 4210: /* vec_dupv4di */ |
| 29617 | case 4211: /* vec_dupv4df */ |
| 29618 | case 4212: /* avx_vbroadcastf128_v32qi */ |
| 29619 | case 4213: /* avx_vbroadcastf128_v16hi */ |
| 29620 | case 4214: /* avx_vbroadcastf128_v8si */ |
| 29621 | case 4215: /* avx_vbroadcastf128_v4di */ |
| 29622 | case 4216: /* avx_vbroadcastf128_v8sf */ |
| 29623 | case 4217: /* avx_vbroadcastf128_v4df */ |
| 29624 | case 4218: /* *avx512dq_broadcastv16si */ |
| 29625 | case 4219: /* avx512dq_broadcastv16si_mask */ |
| 29626 | case 4220: /* *avx512dq_broadcastv8si */ |
| 29627 | case 4221: /* avx512dq_broadcastv8si_mask */ |
| 29628 | case 4222: /* *avx512dq_broadcastv4si */ |
| 29629 | case 4223: /* avx512dq_broadcastv4si_mask */ |
| 29630 | case 4224: /* *avx512dq_broadcastv16sf */ |
| 29631 | case 4225: /* avx512dq_broadcastv16sf_mask */ |
| 29632 | case 4226: /* *avx512dq_broadcastv8sf */ |
| 29633 | case 4227: /* avx512dq_broadcastv8sf_mask */ |
| 29634 | case 4228: /* *avx512vl_broadcastv8si_1 */ |
| 29635 | case 4229: /* avx512vl_broadcastv8si_mask_1 */ |
| 29636 | case 4230: /* *avx512vl_broadcastv8sf_1 */ |
| 29637 | case 4231: /* avx512vl_broadcastv8sf_mask_1 */ |
| 29638 | case 4232: /* *avx512dq_broadcastv16sf_1 */ |
| 29639 | case 4233: /* avx512dq_broadcastv16sf_mask_1 */ |
| 29640 | case 4234: /* *avx512dq_broadcastv16si_1 */ |
| 29641 | case 4235: /* avx512dq_broadcastv16si_mask_1 */ |
| 29642 | case 4236: /* *avx512dq_broadcastv8di_1 */ |
| 29643 | case 4237: /* avx512dq_broadcastv8di_mask_1 */ |
| 29644 | case 4238: /* *avx512dq_broadcastv8df_1 */ |
| 29645 | case 4239: /* avx512dq_broadcastv8df_mask_1 */ |
| 29646 | case 4240: /* *avx512dq_broadcastv4di_1 */ |
| 29647 | case 4241: /* avx512dq_broadcastv4di_mask_1 */ |
| 29648 | case 4242: /* *avx512dq_broadcastv4df_1 */ |
| 29649 | case 4243: /* avx512dq_broadcastv4df_mask_1 */ |
| 29650 | case 4250: /* *avx_vperm_broadcast_v4sf */ |
| 29651 | case 4490: /* avx_vec_concatv32qi */ |
| 29652 | case 4491: /* avx_vec_concatv16hi */ |
| 29653 | case 4492: /* avx_vec_concatv8si */ |
| 29654 | case 4493: /* avx_vec_concatv4di */ |
| 29655 | case 4494: /* avx_vec_concatv8sf */ |
| 29656 | case 4495: /* avx_vec_concatv4df */ |
| 29657 | case 4496: /* avx_vec_concatv64qi */ |
| 29658 | case 4497: /* avx_vec_concatv32hi */ |
| 29659 | case 4498: /* avx_vec_concatv16si */ |
| 29660 | case 4499: /* avx_vec_concatv8di */ |
| 29661 | case 4500: /* avx_vec_concatv16sf */ |
| 29662 | case 4501: /* avx_vec_concatv8df */ |
| 29663 | case 4502: /* vcvtph2ps */ |
| 29664 | case 4503: /* vcvtph2ps_mask */ |
| 29665 | case 4504: /* *vcvtph2ps_load */ |
| 29666 | case 4505: /* *vcvtph2ps_load_mask */ |
| 29667 | case 4506: /* vcvtph2ps256 */ |
| 29668 | case 4507: /* vcvtph2ps256_mask */ |
| 29669 | case 4508: /* *avx512f_vcvtph2ps512 */ |
| 29670 | case 4509: /* *avx512f_vcvtph2ps512_round */ |
| 29671 | case 4510: /* avx512f_vcvtph2ps512_mask */ |
| 29672 | case 4511: /* avx512f_vcvtph2ps512_mask_round */ |
| 29673 | case 4512: /* *vcvtps2ph */ |
| 29674 | case 4513: /* *vcvtps2ph_mask */ |
| 29675 | case 4514: /* *vcvtps2ph_store */ |
| 29676 | case 4515: /* vcvtps2ph256 */ |
| 29677 | case 4516: /* vcvtps2ph256_mask */ |
| 29678 | case 4517: /* *avx512f_vcvtps2ph512 */ |
| 29679 | case 4518: /* avx512f_vcvtps2ph512_mask */ |
| 29680 | case 4519: /* *avx2_gathersiv2di */ |
| 29681 | case 4520: /* *avx2_gathersiv2di */ |
| 29682 | case 4521: /* *avx2_gathersiv2df */ |
| 29683 | case 4522: /* *avx2_gathersiv2df */ |
| 29684 | case 4523: /* *avx2_gathersiv4di */ |
| 29685 | case 4524: /* *avx2_gathersiv4di */ |
| 29686 | case 4525: /* *avx2_gathersiv4df */ |
| 29687 | case 4526: /* *avx2_gathersiv4df */ |
| 29688 | case 4527: /* *avx2_gathersiv4si */ |
| 29689 | case 4528: /* *avx2_gathersiv4si */ |
| 29690 | case 4529: /* *avx2_gathersiv4sf */ |
| 29691 | case 4530: /* *avx2_gathersiv4sf */ |
| 29692 | case 4531: /* *avx2_gathersiv8si */ |
| 29693 | case 4532: /* *avx2_gathersiv8si */ |
| 29694 | case 4533: /* *avx2_gathersiv8sf */ |
| 29695 | case 4534: /* *avx2_gathersiv8sf */ |
| 29696 | case 4535: /* *avx2_gathersiv2di_2 */ |
| 29697 | case 4536: /* *avx2_gathersiv2di_2 */ |
| 29698 | case 4537: /* *avx2_gathersiv2df_2 */ |
| 29699 | case 4538: /* *avx2_gathersiv2df_2 */ |
| 29700 | case 4539: /* *avx2_gathersiv4di_2 */ |
| 29701 | case 4540: /* *avx2_gathersiv4di_2 */ |
| 29702 | case 4541: /* *avx2_gathersiv4df_2 */ |
| 29703 | case 4542: /* *avx2_gathersiv4df_2 */ |
| 29704 | case 4543: /* *avx2_gathersiv4si_2 */ |
| 29705 | case 4544: /* *avx2_gathersiv4si_2 */ |
| 29706 | case 4545: /* *avx2_gathersiv4sf_2 */ |
| 29707 | case 4546: /* *avx2_gathersiv4sf_2 */ |
| 29708 | case 4547: /* *avx2_gathersiv8si_2 */ |
| 29709 | case 4548: /* *avx2_gathersiv8si_2 */ |
| 29710 | case 4549: /* *avx2_gathersiv8sf_2 */ |
| 29711 | case 4550: /* *avx2_gathersiv8sf_2 */ |
| 29712 | case 4551: /* *avx2_gatherdiv2di */ |
| 29713 | case 4552: /* *avx2_gatherdiv2di */ |
| 29714 | case 4553: /* *avx2_gatherdiv2df */ |
| 29715 | case 4554: /* *avx2_gatherdiv2df */ |
| 29716 | case 4555: /* *avx2_gatherdiv4di */ |
| 29717 | case 4556: /* *avx2_gatherdiv4di */ |
| 29718 | case 4557: /* *avx2_gatherdiv4df */ |
| 29719 | case 4558: /* *avx2_gatherdiv4df */ |
| 29720 | case 4559: /* *avx2_gatherdiv4si */ |
| 29721 | case 4560: /* *avx2_gatherdiv4si */ |
| 29722 | case 4561: /* *avx2_gatherdiv4sf */ |
| 29723 | case 4562: /* *avx2_gatherdiv4sf */ |
| 29724 | case 4563: /* *avx2_gatherdiv8si */ |
| 29725 | case 4564: /* *avx2_gatherdiv8si */ |
| 29726 | case 4565: /* *avx2_gatherdiv8sf */ |
| 29727 | case 4566: /* *avx2_gatherdiv8sf */ |
| 29728 | case 4567: /* *avx2_gatherdiv2di_2 */ |
| 29729 | case 4568: /* *avx2_gatherdiv2di_2 */ |
| 29730 | case 4569: /* *avx2_gatherdiv2df_2 */ |
| 29731 | case 4570: /* *avx2_gatherdiv2df_2 */ |
| 29732 | case 4571: /* *avx2_gatherdiv4di_2 */ |
| 29733 | case 4572: /* *avx2_gatherdiv4di_2 */ |
| 29734 | case 4573: /* *avx2_gatherdiv4df_2 */ |
| 29735 | case 4574: /* *avx2_gatherdiv4df_2 */ |
| 29736 | case 4575: /* *avx2_gatherdiv4si_2 */ |
| 29737 | case 4576: /* *avx2_gatherdiv4si_2 */ |
| 29738 | case 4577: /* *avx2_gatherdiv4sf_2 */ |
| 29739 | case 4578: /* *avx2_gatherdiv4sf_2 */ |
| 29740 | case 4579: /* *avx2_gatherdiv8si_2 */ |
| 29741 | case 4580: /* *avx2_gatherdiv8si_2 */ |
| 29742 | case 4581: /* *avx2_gatherdiv8sf_2 */ |
| 29743 | case 4582: /* *avx2_gatherdiv8sf_2 */ |
| 29744 | case 4583: /* *avx2_gatherdiv8si_3 */ |
| 29745 | case 4584: /* *avx2_gatherdiv8si_3 */ |
| 29746 | case 4585: /* *avx2_gatherdiv8sf_3 */ |
| 29747 | case 4586: /* *avx2_gatherdiv8sf_3 */ |
| 29748 | case 4587: /* *avx2_gatherdiv8si_4 */ |
| 29749 | case 4588: /* *avx2_gatherdiv8si_4 */ |
| 29750 | case 4589: /* *avx2_gatherdiv8sf_4 */ |
| 29751 | case 4590: /* *avx2_gatherdiv8sf_4 */ |
| 29752 | case 4591: /* *avx512f_gathersiv16si */ |
| 29753 | case 4592: /* *avx512f_gathersiv16si */ |
| 29754 | case 4593: /* *avx512f_gathersiv16sf */ |
| 29755 | case 4594: /* *avx512f_gathersiv16sf */ |
| 29756 | case 4595: /* *avx512f_gathersiv8di */ |
| 29757 | case 4596: /* *avx512f_gathersiv8di */ |
| 29758 | case 4597: /* *avx512f_gathersiv8df */ |
| 29759 | case 4598: /* *avx512f_gathersiv8df */ |
| 29760 | case 4599: /* *avx512f_gathersiv8si */ |
| 29761 | case 4600: /* *avx512f_gathersiv8si */ |
| 29762 | case 4601: /* *avx512f_gathersiv8sf */ |
| 29763 | case 4602: /* *avx512f_gathersiv8sf */ |
| 29764 | case 4603: /* *avx512f_gathersiv4di */ |
| 29765 | case 4604: /* *avx512f_gathersiv4di */ |
| 29766 | case 4605: /* *avx512f_gathersiv4df */ |
| 29767 | case 4606: /* *avx512f_gathersiv4df */ |
| 29768 | case 4607: /* *avx512f_gathersiv4si */ |
| 29769 | case 4608: /* *avx512f_gathersiv4si */ |
| 29770 | case 4609: /* *avx512f_gathersiv4sf */ |
| 29771 | case 4610: /* *avx512f_gathersiv4sf */ |
| 29772 | case 4611: /* *avx512f_gathersiv2di */ |
| 29773 | case 4612: /* *avx512f_gathersiv2di */ |
| 29774 | case 4613: /* *avx512f_gathersiv2df */ |
| 29775 | case 4614: /* *avx512f_gathersiv2df */ |
| 29776 | case 4615: /* *avx512f_gathersiv16si_2 */ |
| 29777 | case 4616: /* *avx512f_gathersiv16si_2 */ |
| 29778 | case 4617: /* *avx512f_gathersiv16sf_2 */ |
| 29779 | case 4618: /* *avx512f_gathersiv16sf_2 */ |
| 29780 | case 4619: /* *avx512f_gathersiv8di_2 */ |
| 29781 | case 4620: /* *avx512f_gathersiv8di_2 */ |
| 29782 | case 4621: /* *avx512f_gathersiv8df_2 */ |
| 29783 | case 4622: /* *avx512f_gathersiv8df_2 */ |
| 29784 | case 4623: /* *avx512f_gathersiv8si_2 */ |
| 29785 | case 4624: /* *avx512f_gathersiv8si_2 */ |
| 29786 | case 4625: /* *avx512f_gathersiv8sf_2 */ |
| 29787 | case 4626: /* *avx512f_gathersiv8sf_2 */ |
| 29788 | case 4627: /* *avx512f_gathersiv4di_2 */ |
| 29789 | case 4628: /* *avx512f_gathersiv4di_2 */ |
| 29790 | case 4629: /* *avx512f_gathersiv4df_2 */ |
| 29791 | case 4630: /* *avx512f_gathersiv4df_2 */ |
| 29792 | case 4631: /* *avx512f_gathersiv4si_2 */ |
| 29793 | case 4632: /* *avx512f_gathersiv4si_2 */ |
| 29794 | case 4633: /* *avx512f_gathersiv4sf_2 */ |
| 29795 | case 4634: /* *avx512f_gathersiv4sf_2 */ |
| 29796 | case 4635: /* *avx512f_gathersiv2di_2 */ |
| 29797 | case 4636: /* *avx512f_gathersiv2di_2 */ |
| 29798 | case 4637: /* *avx512f_gathersiv2df_2 */ |
| 29799 | case 4638: /* *avx512f_gathersiv2df_2 */ |
| 29800 | case 4639: /* *avx512f_gatherdiv16si */ |
| 29801 | case 4640: /* *avx512f_gatherdiv16si */ |
| 29802 | case 4641: /* *avx512f_gatherdiv16sf */ |
| 29803 | case 4642: /* *avx512f_gatherdiv16sf */ |
| 29804 | case 4643: /* *avx512f_gatherdiv8di */ |
| 29805 | case 4644: /* *avx512f_gatherdiv8di */ |
| 29806 | case 4645: /* *avx512f_gatherdiv8df */ |
| 29807 | case 4646: /* *avx512f_gatherdiv8df */ |
| 29808 | case 4647: /* *avx512f_gatherdiv8si */ |
| 29809 | case 4648: /* *avx512f_gatherdiv8si */ |
| 29810 | case 4649: /* *avx512f_gatherdiv8sf */ |
| 29811 | case 4650: /* *avx512f_gatherdiv8sf */ |
| 29812 | case 4651: /* *avx512f_gatherdiv4di */ |
| 29813 | case 4652: /* *avx512f_gatherdiv4di */ |
| 29814 | case 4653: /* *avx512f_gatherdiv4df */ |
| 29815 | case 4654: /* *avx512f_gatherdiv4df */ |
| 29816 | case 4655: /* *avx512f_gatherdiv4si */ |
| 29817 | case 4656: /* *avx512f_gatherdiv4si */ |
| 29818 | case 4657: /* *avx512f_gatherdiv4sf */ |
| 29819 | case 4658: /* *avx512f_gatherdiv4sf */ |
| 29820 | case 4659: /* *avx512f_gatherdiv2di */ |
| 29821 | case 4660: /* *avx512f_gatherdiv2di */ |
| 29822 | case 4661: /* *avx512f_gatherdiv2df */ |
| 29823 | case 4662: /* *avx512f_gatherdiv2df */ |
| 29824 | case 4663: /* *avx512f_gatherdiv16si_2 */ |
| 29825 | case 4664: /* *avx512f_gatherdiv16si_2 */ |
| 29826 | case 4665: /* *avx512f_gatherdiv16sf_2 */ |
| 29827 | case 4666: /* *avx512f_gatherdiv16sf_2 */ |
| 29828 | case 4667: /* *avx512f_gatherdiv8di_2 */ |
| 29829 | case 4668: /* *avx512f_gatherdiv8di_2 */ |
| 29830 | case 4669: /* *avx512f_gatherdiv8df_2 */ |
| 29831 | case 4670: /* *avx512f_gatherdiv8df_2 */ |
| 29832 | case 4671: /* *avx512f_gatherdiv8si_2 */ |
| 29833 | case 4672: /* *avx512f_gatherdiv8si_2 */ |
| 29834 | case 4673: /* *avx512f_gatherdiv8sf_2 */ |
| 29835 | case 4674: /* *avx512f_gatherdiv8sf_2 */ |
| 29836 | case 4675: /* *avx512f_gatherdiv4di_2 */ |
| 29837 | case 4676: /* *avx512f_gatherdiv4di_2 */ |
| 29838 | case 4677: /* *avx512f_gatherdiv4df_2 */ |
| 29839 | case 4678: /* *avx512f_gatherdiv4df_2 */ |
| 29840 | case 4679: /* *avx512f_gatherdiv4si_2 */ |
| 29841 | case 4680: /* *avx512f_gatherdiv4si_2 */ |
| 29842 | case 4681: /* *avx512f_gatherdiv4sf_2 */ |
| 29843 | case 4682: /* *avx512f_gatherdiv4sf_2 */ |
| 29844 | case 4683: /* *avx512f_gatherdiv2di_2 */ |
| 29845 | case 4684: /* *avx512f_gatherdiv2di_2 */ |
| 29846 | case 4685: /* *avx512f_gatherdiv2df_2 */ |
| 29847 | case 4686: /* *avx512f_gatherdiv2df_2 */ |
| 29848 | case 4687: /* *avx512f_scattersiv16si */ |
| 29849 | case 4688: /* *avx512f_scattersiv16si */ |
| 29850 | case 4689: /* *avx512f_scattersiv16sf */ |
| 29851 | case 4690: /* *avx512f_scattersiv16sf */ |
| 29852 | case 4691: /* *avx512f_scattersiv8di */ |
| 29853 | case 4692: /* *avx512f_scattersiv8di */ |
| 29854 | case 4693: /* *avx512f_scattersiv8df */ |
| 29855 | case 4694: /* *avx512f_scattersiv8df */ |
| 29856 | case 4695: /* *avx512f_scattersiv8si */ |
| 29857 | case 4696: /* *avx512f_scattersiv8si */ |
| 29858 | case 4697: /* *avx512f_scattersiv8sf */ |
| 29859 | case 4698: /* *avx512f_scattersiv8sf */ |
| 29860 | case 4699: /* *avx512f_scattersiv4di */ |
| 29861 | case 4700: /* *avx512f_scattersiv4di */ |
| 29862 | case 4701: /* *avx512f_scattersiv4df */ |
| 29863 | case 4702: /* *avx512f_scattersiv4df */ |
| 29864 | case 4703: /* *avx512f_scattersiv4si */ |
| 29865 | case 4704: /* *avx512f_scattersiv4si */ |
| 29866 | case 4705: /* *avx512f_scattersiv4sf */ |
| 29867 | case 4706: /* *avx512f_scattersiv4sf */ |
| 29868 | case 4707: /* *avx512f_scattersiv2di */ |
| 29869 | case 4708: /* *avx512f_scattersiv2di */ |
| 29870 | case 4709: /* *avx512f_scattersiv2df */ |
| 29871 | case 4710: /* *avx512f_scattersiv2df */ |
| 29872 | case 4711: /* *avx512f_scatterdiv16si */ |
| 29873 | case 4712: /* *avx512f_scatterdiv16si */ |
| 29874 | case 4713: /* *avx512f_scatterdiv16sf */ |
| 29875 | case 4714: /* *avx512f_scatterdiv16sf */ |
| 29876 | case 4715: /* *avx512f_scatterdiv8di */ |
| 29877 | case 4716: /* *avx512f_scatterdiv8di */ |
| 29878 | case 4717: /* *avx512f_scatterdiv8df */ |
| 29879 | case 4718: /* *avx512f_scatterdiv8df */ |
| 29880 | case 4719: /* *avx512f_scatterdiv8si */ |
| 29881 | case 4720: /* *avx512f_scatterdiv8si */ |
| 29882 | case 4721: /* *avx512f_scatterdiv8sf */ |
| 29883 | case 4722: /* *avx512f_scatterdiv8sf */ |
| 29884 | case 4723: /* *avx512f_scatterdiv4di */ |
| 29885 | case 4724: /* *avx512f_scatterdiv4di */ |
| 29886 | case 4725: /* *avx512f_scatterdiv4df */ |
| 29887 | case 4726: /* *avx512f_scatterdiv4df */ |
| 29888 | case 4727: /* *avx512f_scatterdiv4si */ |
| 29889 | case 4728: /* *avx512f_scatterdiv4si */ |
| 29890 | case 4729: /* *avx512f_scatterdiv4sf */ |
| 29891 | case 4730: /* *avx512f_scatterdiv4sf */ |
| 29892 | case 4731: /* *avx512f_scatterdiv2di */ |
| 29893 | case 4732: /* *avx512f_scatterdiv2di */ |
| 29894 | case 4733: /* *avx512f_scatterdiv2df */ |
| 29895 | case 4734: /* *avx512f_scatterdiv2df */ |
| 29896 | case 4735: /* avx512f_compressv16si_mask */ |
| 29897 | case 4736: /* avx512f_compressv16sf_mask */ |
| 29898 | case 4737: /* avx512f_compressv8di_mask */ |
| 29899 | case 4738: /* avx512f_compressv8df_mask */ |
| 29900 | case 4739: /* avx512vl_compressv8si_mask */ |
| 29901 | case 4740: /* avx512vl_compressv8sf_mask */ |
| 29902 | case 4741: /* avx512vl_compressv4di_mask */ |
| 29903 | case 4742: /* avx512vl_compressv4df_mask */ |
| 29904 | case 4743: /* avx512vl_compressv4si_mask */ |
| 29905 | case 4744: /* avx512vl_compressv4sf_mask */ |
| 29906 | case 4745: /* avx512vl_compressv2di_mask */ |
| 29907 | case 4746: /* avx512vl_compressv2df_mask */ |
| 29908 | case 4747: /* avx512f_compressstorev16si_mask */ |
| 29909 | case 4748: /* avx512f_compressstorev16sf_mask */ |
| 29910 | case 4749: /* avx512f_compressstorev8di_mask */ |
| 29911 | case 4750: /* avx512f_compressstorev8df_mask */ |
| 29912 | case 4751: /* avx512vl_compressstorev8si_mask */ |
| 29913 | case 4752: /* avx512vl_compressstorev8sf_mask */ |
| 29914 | case 4753: /* avx512vl_compressstorev4di_mask */ |
| 29915 | case 4754: /* avx512vl_compressstorev4df_mask */ |
| 29916 | case 4755: /* avx512vl_compressstorev4si_mask */ |
| 29917 | case 4756: /* avx512vl_compressstorev4sf_mask */ |
| 29918 | case 4757: /* avx512vl_compressstorev2di_mask */ |
| 29919 | case 4758: /* avx512vl_compressstorev2df_mask */ |
| 29920 | case 4759: /* avx512f_expandv16si_mask */ |
| 29921 | case 4760: /* avx512f_expandv16sf_mask */ |
| 29922 | case 4761: /* avx512f_expandv8di_mask */ |
| 29923 | case 4762: /* avx512f_expandv8df_mask */ |
| 29924 | case 4763: /* avx512vl_expandv8si_mask */ |
| 29925 | case 4764: /* avx512vl_expandv8sf_mask */ |
| 29926 | case 4765: /* avx512vl_expandv4di_mask */ |
| 29927 | case 4766: /* avx512vl_expandv4df_mask */ |
| 29928 | case 4767: /* avx512vl_expandv4si_mask */ |
| 29929 | case 4768: /* avx512vl_expandv4sf_mask */ |
| 29930 | case 4769: /* avx512vl_expandv2di_mask */ |
| 29931 | case 4770: /* avx512vl_expandv2df_mask */ |
| 29932 | case 4936: /* loaddi_via_sse */ |
| 29933 | case 4937: /* storedi_via_sse */ |
| 29934 | extract_insn_cached (insn); |
| 29935 | if (((cached_type = get_attr_type (insn)) == TYPE_OTHER) && (! ((cached_atom_unit = get_attr_atom_unit (insn)) == ATOM_UNIT_JEU))) |
| 29936 | { |
| 29937 | return 9; |
| 29938 | } |
| 29939 | else if ((cached_type == TYPE_OTHER) && ((cached_atom_unit = get_attr_atom_unit (insn)) == ATOM_UNIT_JEU)) |
| 29940 | { |
| 29941 | return 1; |
| 29942 | } |
| 29943 | else if (cached_type == TYPE_MULTI) |
| 29944 | { |
| 29945 | return 9; |
| 29946 | } |
| 29947 | else if ((cached_type == TYPE_ALU) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) && ((cached_use_carry = get_attr_use_carry (insn)) == USE_CARRY_0)) |
| 29948 | { |
| 29949 | return 1; |
| 29950 | } |
| 29951 | else if ((cached_type == TYPE_ALU) && (! ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) && ((cached_use_carry = get_attr_use_carry (insn)) == USE_CARRY_0)) |
| 29952 | { |
| 29953 | return 1; |
| 29954 | } |
| 29955 | else if ((cached_type == TYPE_ALU) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) && ((cached_use_carry = get_attr_use_carry (insn)) == USE_CARRY_1)) |
| 29956 | { |
| 29957 | return 1; |
| 29958 | } |
| 29959 | else if ((cached_type == TYPE_ALU) && (! ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) && ((cached_use_carry = get_attr_use_carry (insn)) == USE_CARRY_1)) |
| 29960 | { |
| 29961 | return 1; |
| 29962 | } |
| 29963 | else if ((cached_type == TYPE_ALU1) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 29964 | { |
| 29965 | return 1; |
| 29966 | } |
| 29967 | else if ((cached_type == TYPE_ALU1) && (! ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE))) |
| 29968 | { |
| 29969 | return 1; |
| 29970 | } |
| 29971 | else if ((cached_type == TYPE_NEGNOT) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 29972 | { |
| 29973 | return 1; |
| 29974 | } |
| 29975 | else if ((cached_type == TYPE_NEGNOT) && (! ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE))) |
| 29976 | { |
| 29977 | return 1; |
| 29978 | } |
| 29979 | else if ((cached_type == TYPE_IMOV) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 29980 | { |
| 29981 | return 1; |
| 29982 | } |
| 29983 | else if ((cached_type == TYPE_IMOV) && (! ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE))) |
| 29984 | { |
| 29985 | return 1; |
| 29986 | } |
| 29987 | else if ((cached_type == TYPE_IMOVX) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) && (((register_operand (operands[0], HImode)) && (general_operand (operands[1], HImode))) || ((register_operand (operands[0], SImode)) && (general_operand (operands[1], SImode))))) |
| 29988 | { |
| 29989 | return 1; |
| 29990 | } |
| 29991 | else if ((cached_type == TYPE_IMOVX) && (! ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) && (((register_operand (operands[0], HImode)) && (general_operand (operands[1], HImode))) || ((register_operand (operands[0], SImode)) && (general_operand (operands[1], SImode))))) |
| 29992 | { |
| 29993 | return 1; |
| 29994 | } |
| 29995 | else if ((cached_type == TYPE_IMOVX) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) && ((register_operand (operands[0], QImode)) || ((register_operand (operands[0], SImode)) && (! (general_operand (operands[1], SImode)))) || (register_operand (operands[0], DImode)))) |
| 29996 | { |
| 29997 | return 1; |
| 29998 | } |
| 29999 | else if ((cached_type == TYPE_IMOVX) && (! ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) && ((register_operand (operands[0], QImode)) || ((register_operand (operands[0], SImode)) && (! (general_operand (operands[1], SImode)))) || (register_operand (operands[0], DImode)))) |
| 30000 | { |
| 30001 | return 1; |
| 30002 | } |
| 30003 | else if ((cached_type == TYPE_IMOVX) && (register_operand (operands[0], HImode)) && (general_operand (operands[1], QImode))) |
| 30004 | { |
| 30005 | return 3; |
| 30006 | } |
| 30007 | else if ((cached_type == TYPE_LEA) && (! ((cached_mode = get_attr_mode (insn)) == MODE_HI))) |
| 30008 | { |
| 30009 | return 1; |
| 30010 | } |
| 30011 | else if ((cached_type == TYPE_LEA) && ((cached_mode = get_attr_mode (insn)) == MODE_HI)) |
| 30012 | { |
| 30013 | return 2; |
| 30014 | } |
| 30015 | else if ((cached_type == TYPE_INCDEC) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 30016 | { |
| 30017 | return 1; |
| 30018 | } |
| 30019 | else if ((cached_type == TYPE_INCDEC) && (! ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE))) |
| 30020 | { |
| 30021 | return 1; |
| 30022 | } |
| 30023 | else if ((cached_type == TYPE_ISHIFT) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) && ((cached_prefix_0f = get_attr_prefix_0f (insn)) == 0)) |
| 30024 | { |
| 30025 | return 1; |
| 30026 | } |
| 30027 | else if ((cached_type == TYPE_ISHIFT) && (! ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) && ((cached_prefix_0f = get_attr_prefix_0f (insn)) == 0)) |
| 30028 | { |
| 30029 | return 1; |
| 30030 | } |
| 30031 | else if ((cached_type == TYPE_ISHIFT) && ((cached_prefix_0f = get_attr_prefix_0f (insn)) == 1)) |
| 30032 | { |
| 30033 | return 7; |
| 30034 | } |
| 30035 | else if ((cached_type == TYPE_ISHIFT1) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 30036 | { |
| 30037 | return 1; |
| 30038 | } |
| 30039 | else if ((cached_type == TYPE_ISHIFT1) && (! ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE))) |
| 30040 | { |
| 30041 | return 1; |
| 30042 | } |
| 30043 | else if ((cached_type == TYPE_ROTATE) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 30044 | { |
| 30045 | return 1; |
| 30046 | } |
| 30047 | else if ((cached_type == TYPE_ROTATE) && (! ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE))) |
| 30048 | { |
| 30049 | return 1; |
| 30050 | } |
| 30051 | else if ((cached_type == TYPE_ROTATE1) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 30052 | { |
| 30053 | return 1; |
| 30054 | } |
| 30055 | else if ((cached_type == TYPE_ROTATE1) && (! ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE))) |
| 30056 | { |
| 30057 | return 1; |
| 30058 | } |
| 30059 | else if ((cached_type == TYPE_IMUL) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) && ((cached_mode = get_attr_mode (insn)) == MODE_SI)) |
| 30060 | { |
| 30061 | return 5; |
| 30062 | } |
| 30063 | else if ((cached_type == TYPE_IMUL) && (! ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) && ((cached_mode = get_attr_mode (insn)) == MODE_SI)) |
| 30064 | { |
| 30065 | return 5; |
| 30066 | } |
| 30067 | else if ((cached_type == TYPE_IMUL) && (! ((cached_mode = get_attr_mode (insn)) == MODE_SI))) |
| 30068 | { |
| 30069 | return 10 /* 0xa */; |
| 30070 | } |
| 30071 | else if (cached_type == TYPE_IDIV) |
| 30072 | { |
| 30073 | return 65 /* 0x41 */; |
| 30074 | } |
| 30075 | else if ((cached_type == TYPE_ICMP) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 30076 | { |
| 30077 | return 1; |
| 30078 | } |
| 30079 | else if ((cached_type == TYPE_ICMP) && (! ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE))) |
| 30080 | { |
| 30081 | return 1; |
| 30082 | } |
| 30083 | else if ((cached_type == TYPE_TEST) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 30084 | { |
| 30085 | return 1; |
| 30086 | } |
| 30087 | else if ((cached_type == TYPE_TEST) && (! ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE))) |
| 30088 | { |
| 30089 | return 1; |
| 30090 | } |
| 30091 | else if ((cached_type == TYPE_IBR) && (! ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD))) |
| 30092 | { |
| 30093 | return 1; |
| 30094 | } |
| 30095 | else if ((cached_type == TYPE_IBR) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 30096 | { |
| 30097 | return 2; |
| 30098 | } |
| 30099 | else if ((cached_type == TYPE_SETCC) && (! ((cached_memory = get_attr_memory (insn)) == MEMORY_STORE))) |
| 30100 | { |
| 30101 | return 1; |
| 30102 | } |
| 30103 | else if ((cached_type == TYPE_SETCC) && ((cached_memory = get_attr_memory (insn)) == MEMORY_STORE)) |
| 30104 | { |
| 30105 | return 2; |
| 30106 | } |
| 30107 | else if ((cached_type == TYPE_ICMOV) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 30108 | { |
| 30109 | return 1; |
| 30110 | } |
| 30111 | else if ((cached_type == TYPE_ICMOV) && (! ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE))) |
| 30112 | { |
| 30113 | return 1; |
| 30114 | } |
| 30115 | else if (cached_type == TYPE_PUSH) |
| 30116 | { |
| 30117 | return 2; |
| 30118 | } |
| 30119 | else if ((cached_type == TYPE_POP) && ((cached_mode = get_attr_mode (insn)) == MODE_DI)) |
| 30120 | { |
| 30121 | return 1; |
| 30122 | } |
| 30123 | else if ((cached_type == TYPE_POP) && (! ((cached_mode = get_attr_mode (insn)) == MODE_DI))) |
| 30124 | { |
| 30125 | return 2; |
| 30126 | } |
| 30127 | else if (cached_type == TYPE_CALL) |
| 30128 | { |
| 30129 | return 1; |
| 30130 | } |
| 30131 | else if (cached_type == TYPE_CALLV) |
| 30132 | { |
| 30133 | return 1; |
| 30134 | } |
| 30135 | else if (cached_type == TYPE_LEAVE) |
| 30136 | { |
| 30137 | return 3; |
| 30138 | } |
| 30139 | else if (cached_type == TYPE_STR) |
| 30140 | { |
| 30141 | return 3; |
| 30142 | } |
| 30143 | else if (((cached_type == TYPE_SSELOG) || (cached_type == TYPE_SSESHUF)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 30144 | { |
| 30145 | return 1; |
| 30146 | } |
| 30147 | else if (((cached_type == TYPE_SSELOG) || (cached_type == TYPE_SSESHUF)) && (! ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE))) |
| 30148 | { |
| 30149 | return 1; |
| 30150 | } |
| 30151 | else if (((cached_type == TYPE_SSELOG1) || (cached_type == TYPE_SSESHUF1)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 30152 | { |
| 30153 | return 1; |
| 30154 | } |
| 30155 | else if (((cached_type == TYPE_SSELOG1) || (cached_type == TYPE_SSESHUF1)) && (! ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE))) |
| 30156 | { |
| 30157 | return 1; |
| 30158 | } |
| 30159 | else if ((cached_type == TYPE_SSEIADD) && (! (register_operand (operands[0], V2DImode))) && (! ((cached_atom_unit = get_attr_atom_unit (insn)) == ATOM_UNIT_SIMUL)) && (! (cached_atom_unit == ATOM_UNIT_COMPLEX))) |
| 30160 | { |
| 30161 | return 1; |
| 30162 | } |
| 30163 | else if ((cached_type == TYPE_SSEIADD) && (! (register_operand (operands[0], V2DImode))) && ((cached_atom_unit = get_attr_atom_unit (insn)) == ATOM_UNIT_SIMUL) && ((cached_mode = get_attr_mode (insn)) == MODE_DI)) |
| 30164 | { |
| 30165 | return 4; |
| 30166 | } |
| 30167 | else if ((cached_type == TYPE_SSEIADD) && (! (register_operand (operands[0], V2DImode))) && ((cached_atom_unit = get_attr_atom_unit (insn)) == ATOM_UNIT_SIMUL) && ((cached_mode = get_attr_mode (insn)) == MODE_TI)) |
| 30168 | { |
| 30169 | return 5; |
| 30170 | } |
| 30171 | else if ((cached_type == TYPE_SSEIADD) && ((register_operand (operands[0], V2DImode)) || ((cached_atom_unit = get_attr_atom_unit (insn)) == ATOM_UNIT_COMPLEX))) |
| 30172 | { |
| 30173 | return 6; |
| 30174 | } |
| 30175 | else if ((cached_type == TYPE_SSEISHFT) && (! ((cached_atom_unit = get_attr_atom_unit (insn)) == ATOM_UNIT_SISHUF)) && (immediate_operand (operands[2], VOIDmode))) |
| 30176 | { |
| 30177 | return 1; |
| 30178 | } |
| 30179 | else if ((cached_type == TYPE_SSEISHFT1) || ((cached_type == TYPE_SSEISHFT) && ((cached_atom_unit = get_attr_atom_unit (insn)) == ATOM_UNIT_SISHUF) && (immediate_operand (operands[2], VOIDmode)))) |
| 30180 | { |
| 30181 | return 1; |
| 30182 | } |
| 30183 | else if ((cached_type == TYPE_SSEISHFT) && (! (immediate_operand (operands[2], VOIDmode)))) |
| 30184 | { |
| 30185 | return 2; |
| 30186 | } |
| 30187 | else if (cached_type == TYPE_SSEIMUL) |
| 30188 | { |
| 30189 | return 1; |
| 30190 | } |
| 30191 | else if ((cached_type == TYPE_SSE) && ((cached_atom_sse_attr = get_attr_atom_sse_attr (insn)) == ATOM_SSE_ATTR_RCP) && ((cached_mode = get_attr_mode (insn)) == MODE_SF)) |
| 30192 | { |
| 30193 | return 4; |
| 30194 | } |
| 30195 | else if ((cached_type == TYPE_SSE) && ((cached_atom_sse_attr = get_attr_atom_sse_attr (insn)) == ATOM_SSE_ATTR_MOVDUP)) |
| 30196 | { |
| 30197 | return 1; |
| 30198 | } |
| 30199 | else if ((cached_type == TYPE_SSE) && ((cached_atom_sse_attr = get_attr_atom_sse_attr (insn)) == ATOM_SSE_ATTR_LFENCE)) |
| 30200 | { |
| 30201 | return 1; |
| 30202 | } |
| 30203 | else if ((cached_type == TYPE_SSE) && (((cached_atom_sse_attr = get_attr_atom_sse_attr (insn)) == ATOM_SSE_ATTR_FENCE) || (cached_atom_sse_attr == ATOM_SSE_ATTR_PREFETCH))) |
| 30204 | { |
| 30205 | return 1; |
| 30206 | } |
| 30207 | else if ((cached_type == TYPE_SSE) && ((((cached_atom_sse_attr = get_attr_atom_sse_attr (insn)) == ATOM_SSE_ATTR_SQRT) || (cached_atom_sse_attr == ATOM_SSE_ATTR_MXCSR)) || ((cached_atom_sse_attr == ATOM_SSE_ATTR_RCP) && ((cached_mode = get_attr_mode (insn)) == MODE_V4SF)))) |
| 30208 | { |
| 30209 | return 7; |
| 30210 | } |
| 30211 | else if ((cached_type == TYPE_SSEMOV) && (register_operand (operands[0], VOIDmode)) && (register_operand (operands[1], VOIDmode))) |
| 30212 | { |
| 30213 | return 1; |
| 30214 | } |
| 30215 | else if ((cached_type == TYPE_SSEMOV) && (register_operand (operands[0], VOIDmode)) && (register_operand (operands[1], VOIDmode))) |
| 30216 | { |
| 30217 | return 1; |
| 30218 | } |
| 30219 | else if ((cached_type == TYPE_SSEMOV) && (register_operand (operands[0], VOIDmode)) && (register_operand (operands[1], VOIDmode))) |
| 30220 | { |
| 30221 | return 3; |
| 30222 | } |
| 30223 | else if ((cached_type == TYPE_SSEMOV) && ((cached_movu = get_attr_movu (insn)) == MOVU_0) && (! ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE))) |
| 30224 | { |
| 30225 | return 1; |
| 30226 | } |
| 30227 | else if ((cached_type == TYPE_SSEMOV) && (((cached_movu = get_attr_movu (insn)) == MOVU_1) || (! ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)))) |
| 30228 | { |
| 30229 | return 2; |
| 30230 | } |
| 30231 | else if (((cached_type == TYPE_SSEADD) || (cached_type == TYPE_SSEADD1)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) && (! ((cached_mode = get_attr_mode (insn)) == MODE_V2DF)) && (! ((cached_atom_unit = get_attr_atom_unit (insn)) == ATOM_UNIT_COMPLEX))) |
| 30232 | { |
| 30233 | return 5; |
| 30234 | } |
| 30235 | else if (((cached_type == TYPE_SSEADD) || (cached_type == TYPE_SSEADD1)) && (! ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) && (! ((cached_mode = get_attr_mode (insn)) == MODE_V2DF)) && (! ((cached_atom_unit = get_attr_atom_unit (insn)) == ATOM_UNIT_COMPLEX))) |
| 30236 | { |
| 30237 | return 5; |
| 30238 | } |
| 30239 | else if (((cached_type == TYPE_SSEADD) || (cached_type == TYPE_SSEADD1)) && (((cached_mode = get_attr_mode (insn)) == MODE_V2DF) || ((cached_atom_unit = get_attr_atom_unit (insn)) == ATOM_UNIT_COMPLEX))) |
| 30240 | { |
| 30241 | return 8; |
| 30242 | } |
| 30243 | else if ((cached_type == TYPE_SSEMUL) && (! ((cached_mode = get_attr_mode (insn)) == MODE_SF))) |
| 30244 | { |
| 30245 | return 5; |
| 30246 | } |
| 30247 | else if ((cached_type == TYPE_SSEMUL) && ((cached_mode = get_attr_mode (insn)) == MODE_SF)) |
| 30248 | { |
| 30249 | return 4; |
| 30250 | } |
| 30251 | else if (cached_type == TYPE_SSECMP) |
| 30252 | { |
| 30253 | return 1; |
| 30254 | } |
| 30255 | else if (cached_type == TYPE_SSECOMI) |
| 30256 | { |
| 30257 | return 10 /* 0xa */; |
| 30258 | } |
| 30259 | else if ((cached_type == TYPE_SSECVT) && (((register_operand (operands[0], V2SImode)) && (register_operand (operands[1], V4SFmode))) || ((register_operand (operands[0], V4SFmode)) && (register_operand (operands[1], V2SImode))))) |
| 30260 | { |
| 30261 | return 5; |
| 30262 | } |
| 30263 | else if ((cached_type == TYPE_SSECVT) && (((register_operand (operands[0], V2SImode)) && (memory_operand (operands[1], V4SFmode))) || ((register_operand (operands[0], V4SFmode)) && (memory_operand (operands[1], V2SImode))))) |
| 30264 | { |
| 30265 | return 5; |
| 30266 | } |
| 30267 | else if ((cached_type == TYPE_SSECVT) && ((! (register_operand (operands[0], V2SImode))) || (! (nonimmediate_operand (operands[1], V4SFmode)))) && ((! (register_operand (operands[0], V4SFmode))) || (! (nonimmediate_operand (operands[1], V2SImode))))) |
| 30268 | { |
| 30269 | return 7; |
| 30270 | } |
| 30271 | else if ((cached_type == TYPE_SSEICVT) && (register_operand (operands[0], V2DFmode)) && (memory_operand (operands[1], SImode))) |
| 30272 | { |
| 30273 | return 5; |
| 30274 | } |
| 30275 | else if ((cached_type == TYPE_SSEICVT) && ((! (register_operand (operands[0], V2DFmode))) || (! (memory_operand (operands[1], SImode))))) |
| 30276 | { |
| 30277 | return 8; |
| 30278 | } |
| 30279 | else if (cached_type == TYPE_SSEDIV) |
| 30280 | { |
| 30281 | return 62 /* 0x3e */; |
| 30282 | } |
| 30283 | else if ((cached_type == TYPE_FMOV) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 30284 | { |
| 30285 | return 1; |
| 30286 | } |
| 30287 | else if ((cached_type == TYPE_FMOV) && (! ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE))) |
| 30288 | { |
| 30289 | return 1; |
| 30290 | } |
| 30291 | else |
| 30292 | { |
| 30293 | return 0; |
| 30294 | } |
| 30295 | |
| 30296 | default: |
| 30297 | return 1; |
| 30298 | |
| 30299 | } |
| 30300 | } |
| 30301 | |
| 30302 | int |
| 30303 | insn_default_latency_slm (rtx_insn *insn ATTRIBUTE_UNUSED) |
| 30304 | { |
| 30305 | enum attr_type cached_type ATTRIBUTE_UNUSED; |
| 30306 | enum attr_memory cached_memory ATTRIBUTE_UNUSED; |
| 30307 | enum attr_atom_unit cached_atom_unit ATTRIBUTE_UNUSED; |
| 30308 | enum attr_use_carry cached_use_carry ATTRIBUTE_UNUSED; |
| 30309 | int cached_prefix_0f ATTRIBUTE_UNUSED; |
| 30310 | enum attr_mode cached_mode ATTRIBUTE_UNUSED; |
| 30311 | enum attr_atom_sse_attr cached_atom_sse_attr ATTRIBUTE_UNUSED; |
| 30312 | enum attr_movu cached_movu ATTRIBUTE_UNUSED; |
| 30313 | |
| 30314 | switch (recog_memoized (insn)) |
| 30315 | { |
| 30316 | case 3656: /* avx2_psadbw */ |
| 30317 | case 3655: /* avx512f_psadbw */ |
| 30318 | extract_insn_cached (insn); |
| 30319 | if (register_operand (operands[0], V2DImode)) |
| 30320 | { |
| 30321 | return 4; |
| 30322 | } |
| 30323 | else |
| 30324 | { |
| 30325 | return 0; |
| 30326 | } |
| 30327 | |
| 30328 | case 4489: /* avx512bw_lshrvv32hi_mask */ |
| 30329 | case 4488: /* avx512bw_lshrvv32hi */ |
| 30330 | case 4487: /* avx512bw_ashlvv32hi_mask */ |
| 30331 | case 4486: /* avx512bw_ashlvv32hi */ |
| 30332 | case 4485: /* avx512vl_lshrvv16hi_mask */ |
| 30333 | case 4484: /* avx512vl_lshrvv16hi */ |
| 30334 | case 4483: /* avx512vl_ashlvv16hi_mask */ |
| 30335 | case 4482: /* avx512vl_ashlvv16hi */ |
| 30336 | case 4481: /* avx512vl_lshrvv8hi_mask */ |
| 30337 | case 4480: /* avx512vl_lshrvv8hi */ |
| 30338 | case 4479: /* avx512vl_ashlvv8hi_mask */ |
| 30339 | case 4478: /* avx512vl_ashlvv8hi */ |
| 30340 | case 4477: /* avx2_lshrvv2di_mask */ |
| 30341 | case 4476: /* avx2_lshrvv2di */ |
| 30342 | case 4475: /* avx2_ashlvv2di_mask */ |
| 30343 | case 4474: /* avx2_ashlvv2di */ |
| 30344 | case 4473: /* avx2_lshrvv4di_mask */ |
| 30345 | case 4472: /* avx2_lshrvv4di */ |
| 30346 | case 4471: /* avx2_ashlvv4di_mask */ |
| 30347 | case 4470: /* avx2_ashlvv4di */ |
| 30348 | case 4469: /* avx512f_lshrvv8di_mask */ |
| 30349 | case 4468: /* avx512f_lshrvv8di */ |
| 30350 | case 4467: /* avx512f_ashlvv8di_mask */ |
| 30351 | case 4466: /* avx512f_ashlvv8di */ |
| 30352 | case 4465: /* avx2_lshrvv4si_mask */ |
| 30353 | case 4464: /* avx2_lshrvv4si */ |
| 30354 | case 4463: /* avx2_ashlvv4si_mask */ |
| 30355 | case 4462: /* avx2_ashlvv4si */ |
| 30356 | case 4461: /* avx2_lshrvv8si_mask */ |
| 30357 | case 4460: /* avx2_lshrvv8si */ |
| 30358 | case 4459: /* avx2_ashlvv8si_mask */ |
| 30359 | case 4458: /* avx2_ashlvv8si */ |
| 30360 | case 4457: /* avx512f_lshrvv16si_mask */ |
| 30361 | case 4456: /* avx512f_lshrvv16si */ |
| 30362 | case 4455: /* avx512f_ashlvv16si_mask */ |
| 30363 | case 4454: /* avx512f_ashlvv16si */ |
| 30364 | case 4453: /* avx512bw_ashrvv32hi_mask */ |
| 30365 | case 4452: /* avx512bw_ashrvv32hi */ |
| 30366 | case 4451: /* avx512vl_ashrvv16hi_mask */ |
| 30367 | case 4450: /* avx512vl_ashrvv16hi */ |
| 30368 | case 4449: /* avx512vl_ashrvv8hi_mask */ |
| 30369 | case 4448: /* avx512vl_ashrvv8hi */ |
| 30370 | case 4447: /* avx512f_ashrvv8di_mask */ |
| 30371 | case 4446: /* avx512f_ashrvv8di */ |
| 30372 | case 4445: /* avx2_ashrvv4di_mask */ |
| 30373 | case 4444: /* avx2_ashrvv4di */ |
| 30374 | case 4443: /* avx2_ashrvv2di_mask */ |
| 30375 | case 4442: /* avx2_ashrvv2di */ |
| 30376 | case 4441: /* avx512f_ashrvv16si_mask */ |
| 30377 | case 4440: /* avx512f_ashrvv16si */ |
| 30378 | case 4439: /* avx2_ashrvv8si_mask */ |
| 30379 | case 4438: /* avx2_ashrvv8si */ |
| 30380 | case 4437: /* avx2_ashrvv4si_mask */ |
| 30381 | case 4436: /* avx2_ashrvv4si */ |
| 30382 | case 4396: /* *ssse3_palignrv2df_perm */ |
| 30383 | case 4395: /* *ssse3_palignrv4sf_perm */ |
| 30384 | case 4394: /* *ssse3_palignrv2di_perm */ |
| 30385 | case 4393: /* *ssse3_palignrv4si_perm */ |
| 30386 | case 4392: /* *ssse3_palignrv8hi_perm */ |
| 30387 | case 4391: /* *ssse3_palignrv16qi_perm */ |
| 30388 | case 4019: /* xop_shlv2di3 */ |
| 30389 | case 4018: /* xop_shlv4si3 */ |
| 30390 | case 4017: /* xop_shlv8hi3 */ |
| 30391 | case 4016: /* xop_shlv16qi3 */ |
| 30392 | case 4015: /* xop_shav2di3 */ |
| 30393 | case 4014: /* xop_shav4si3 */ |
| 30394 | case 4013: /* xop_shav8hi3 */ |
| 30395 | case 4012: /* xop_shav16qi3 */ |
| 30396 | case 4011: /* xop_vrotlv2di3 */ |
| 30397 | case 4010: /* xop_vrotlv4si3 */ |
| 30398 | case 4009: /* xop_vrotlv8hi3 */ |
| 30399 | case 4008: /* xop_vrotlv16qi3 */ |
| 30400 | case 4007: /* xop_rotrv2di3 */ |
| 30401 | case 4006: /* xop_rotrv4si3 */ |
| 30402 | case 4005: /* xop_rotrv8hi3 */ |
| 30403 | case 4004: /* xop_rotrv16qi3 */ |
| 30404 | case 4003: /* xop_rotlv2di3 */ |
| 30405 | case 4002: /* xop_rotlv4si3 */ |
| 30406 | case 4001: /* xop_rotlv8hi3 */ |
| 30407 | case 4000: /* xop_rotlv16qi3 */ |
| 30408 | case 3736: /* ssse3_palignrdi */ |
| 30409 | case 3735: /* ssse3_palignrti */ |
| 30410 | case 3734: /* avx2_palignrv2ti */ |
| 30411 | case 3733: /* avx512bw_palignrv4ti */ |
| 30412 | case 3732: /* ssse3_palignrv16qi_mask */ |
| 30413 | case 3731: /* avx2_palignrv32qi_mask */ |
| 30414 | case 3730: /* avx512bw_palignrv64qi_mask */ |
| 30415 | case 3143: /* sse2_lshrv1ti3 */ |
| 30416 | case 3142: /* avx2_lshrv2ti3 */ |
| 30417 | case 3141: /* avx512bw_lshrv4ti3 */ |
| 30418 | case 3140: /* sse2_ashlv1ti3 */ |
| 30419 | case 3139: /* avx2_ashlv2ti3 */ |
| 30420 | case 3138: /* avx512bw_ashlv4ti3 */ |
| 30421 | case 3137: /* lshrv8di3_mask */ |
| 30422 | case 3136: /* lshrv8di3 */ |
| 30423 | case 3135: /* ashlv8di3_mask */ |
| 30424 | case 3134: /* ashlv8di3 */ |
| 30425 | case 3133: /* lshrv16si3_mask */ |
| 30426 | case 3132: /* lshrv16si3 */ |
| 30427 | case 3131: /* ashlv16si3_mask */ |
| 30428 | case 3130: /* ashlv16si3 */ |
| 30429 | case 3129: /* lshrv2di3_mask */ |
| 30430 | case 3128: /* lshrv2di3 */ |
| 30431 | case 3127: /* ashlv2di3_mask */ |
| 30432 | case 3126: /* ashlv2di3 */ |
| 30433 | case 3125: /* lshrv4di3_mask */ |
| 30434 | case 3124: /* lshrv4di3 */ |
| 30435 | case 3123: /* ashlv4di3_mask */ |
| 30436 | case 3122: /* ashlv4di3 */ |
| 30437 | case 3121: /* lshrv4si3_mask */ |
| 30438 | case 3120: /* lshrv4si3 */ |
| 30439 | case 3119: /* ashlv4si3_mask */ |
| 30440 | case 3118: /* ashlv4si3 */ |
| 30441 | case 3117: /* lshrv8si3_mask */ |
| 30442 | case 3116: /* lshrv8si3 */ |
| 30443 | case 3115: /* ashlv8si3_mask */ |
| 30444 | case 3114: /* ashlv8si3 */ |
| 30445 | case 3113: /* lshrv8hi3_mask */ |
| 30446 | case 3112: /* lshrv8hi3 */ |
| 30447 | case 3111: /* ashlv8hi3_mask */ |
| 30448 | case 3110: /* ashlv8hi3 */ |
| 30449 | case 3109: /* lshrv16hi3_mask */ |
| 30450 | case 3108: /* lshrv16hi3 */ |
| 30451 | case 3107: /* ashlv16hi3_mask */ |
| 30452 | case 3106: /* ashlv16hi3 */ |
| 30453 | case 3105: /* lshrv32hi3_mask */ |
| 30454 | case 3104: /* lshrv32hi3 */ |
| 30455 | case 3103: /* ashlv32hi3_mask */ |
| 30456 | case 3102: /* ashlv32hi3 */ |
| 30457 | case 3101: /* ashrv8di3_mask */ |
| 30458 | case 3100: /* ashrv8di3 */ |
| 30459 | case 3099: /* ashrv16si3_mask */ |
| 30460 | case 3098: /* ashrv16si3 */ |
| 30461 | case 3097: /* ashrv4di3_mask */ |
| 30462 | case 3096: /* ashrv4di3 */ |
| 30463 | case 3095: /* ashrv32hi3_mask */ |
| 30464 | case 3094: /* ashrv32hi3 */ |
| 30465 | case 3093: /* ashrv2di3_mask */ |
| 30466 | case 3092: /* *ashrv2di3 */ |
| 30467 | case 3091: /* ashrv4si3 */ |
| 30468 | case 3090: /* ashrv8si3 */ |
| 30469 | case 3089: /* ashrv8hi3 */ |
| 30470 | case 3088: /* ashrv16hi3 */ |
| 30471 | case 3087: /* ashrv4si3_mask */ |
| 30472 | case 3086: /* *ashrv4si3 */ |
| 30473 | case 3085: /* ashrv8si3_mask */ |
| 30474 | case 3084: /* *ashrv8si3 */ |
| 30475 | case 3083: /* ashrv8hi3_mask */ |
| 30476 | case 3082: /* *ashrv8hi3 */ |
| 30477 | case 3081: /* ashrv16hi3_mask */ |
| 30478 | case 3080: /* *ashrv16hi3 */ |
| 30479 | extract_insn_cached (insn); |
| 30480 | if (immediate_operand (operands[2], VOIDmode)) |
| 30481 | { |
| 30482 | return 1; |
| 30483 | } |
| 30484 | else |
| 30485 | { |
| 30486 | return 2; |
| 30487 | } |
| 30488 | |
| 30489 | case 3705: /* ssse3_pmaddubsw128 */ |
| 30490 | case 3657: /* sse2_psadbw */ |
| 30491 | case 3067: /* *sse2_pmaddwd */ |
| 30492 | extract_insn_cached (insn); |
| 30493 | if (! (register_operand (operands[0], V2DImode))) |
| 30494 | { |
| 30495 | return 5; |
| 30496 | } |
| 30497 | else |
| 30498 | { |
| 30499 | return 4; |
| 30500 | } |
| 30501 | |
| 30502 | case 3702: /* avx512bw_pmaddubsw512v32hi_mask */ |
| 30503 | case 3701: /* avx512bw_pmaddubsw512v32hi */ |
| 30504 | case 3700: /* avx512bw_pmaddubsw512v16hi_mask */ |
| 30505 | case 3699: /* avx512bw_pmaddubsw512v16hi */ |
| 30506 | case 3698: /* avx512bw_pmaddubsw512v8hi_mask */ |
| 30507 | case 3697: /* avx512bw_pmaddubsw512v8hi */ |
| 30508 | case 3696: /* avx2_pmaddubsw256 */ |
| 30509 | case 3691: /* avx2_phsubdv8si3 */ |
| 30510 | case 3690: /* avx2_phadddv8si3 */ |
| 30511 | case 3681: /* avx2_phsubswv16hi3 */ |
| 30512 | case 3680: /* avx2_phsubwv16hi3 */ |
| 30513 | case 3679: /* avx2_phaddswv16hi3 */ |
| 30514 | case 3678: /* avx2_phaddwv16hi3 */ |
| 30515 | case 3654: /* *sse2_uavgv8hi3_mask */ |
| 30516 | case 3653: /* *sse2_uavgv8hi3 */ |
| 30517 | case 3652: /* *avx2_uavgv16hi3_mask */ |
| 30518 | case 3651: /* *avx2_uavgv16hi3 */ |
| 30519 | case 3650: /* *avx512bw_uavgv32hi3_mask */ |
| 30520 | case 3649: /* *avx512bw_uavgv32hi3 */ |
| 30521 | case 3648: /* *sse2_uavgv16qi3_mask */ |
| 30522 | case 3647: /* *sse2_uavgv16qi3 */ |
| 30523 | case 3646: /* *avx2_uavgv32qi3_mask */ |
| 30524 | case 3645: /* *avx2_uavgv32qi3 */ |
| 30525 | case 3644: /* *avx512bw_uavgv64qi3_mask */ |
| 30526 | case 3643: /* *avx512bw_uavgv64qi3 */ |
| 30527 | case 3319: /* *uminv16qi3 */ |
| 30528 | case 3318: /* *umaxv16qi3 */ |
| 30529 | case 3317: /* *sse4_1_uminv4si3_mask */ |
| 30530 | case 3316: /* *sse4_1_uminv4si3 */ |
| 30531 | case 3315: /* *sse4_1_umaxv4si3_mask */ |
| 30532 | case 3314: /* *sse4_1_umaxv4si3 */ |
| 30533 | case 3313: /* *sse4_1_uminv8hi3_mask */ |
| 30534 | case 3312: /* *sse4_1_uminv8hi3 */ |
| 30535 | case 3311: /* *sse4_1_umaxv8hi3_mask */ |
| 30536 | case 3310: /* *sse4_1_umaxv8hi3 */ |
| 30537 | case 3309: /* *sminv8hi3 */ |
| 30538 | case 3308: /* *smaxv8hi3 */ |
| 30539 | case 3307: /* *sse4_1_sminv4si3_mask */ |
| 30540 | case 3306: /* *sse4_1_sminv4si3 */ |
| 30541 | case 3305: /* *sse4_1_smaxv4si3_mask */ |
| 30542 | case 3304: /* *sse4_1_smaxv4si3 */ |
| 30543 | case 3303: /* *sse4_1_sminv16qi3_mask */ |
| 30544 | case 3302: /* *sse4_1_sminv16qi3 */ |
| 30545 | case 3301: /* *sse4_1_smaxv16qi3_mask */ |
| 30546 | case 3300: /* *sse4_1_smaxv16qi3 */ |
| 30547 | case 3299: /* uminv8hi3_mask */ |
| 30548 | case 3298: /* *uminv8hi3 */ |
| 30549 | case 3297: /* umaxv8hi3_mask */ |
| 30550 | case 3296: /* *umaxv8hi3 */ |
| 30551 | case 3295: /* sminv8hi3_mask */ |
| 30552 | case 3294: /* *sminv8hi3 */ |
| 30553 | case 3293: /* smaxv8hi3_mask */ |
| 30554 | case 3292: /* *smaxv8hi3 */ |
| 30555 | case 3291: /* uminv16hi3_mask */ |
| 30556 | case 3290: /* *uminv16hi3 */ |
| 30557 | case 3289: /* umaxv16hi3_mask */ |
| 30558 | case 3288: /* *umaxv16hi3 */ |
| 30559 | case 3287: /* sminv16hi3_mask */ |
| 30560 | case 3286: /* *sminv16hi3 */ |
| 30561 | case 3285: /* smaxv16hi3_mask */ |
| 30562 | case 3284: /* *smaxv16hi3 */ |
| 30563 | case 3283: /* uminv32hi3_mask */ |
| 30564 | case 3282: /* *uminv32hi3 */ |
| 30565 | case 3281: /* umaxv32hi3_mask */ |
| 30566 | case 3280: /* *umaxv32hi3 */ |
| 30567 | case 3279: /* sminv32hi3_mask */ |
| 30568 | case 3278: /* *sminv32hi3 */ |
| 30569 | case 3277: /* smaxv32hi3_mask */ |
| 30570 | case 3276: /* *smaxv32hi3 */ |
| 30571 | case 3275: /* uminv32qi3_mask */ |
| 30572 | case 3274: /* *uminv32qi3 */ |
| 30573 | case 3273: /* umaxv32qi3_mask */ |
| 30574 | case 3272: /* *umaxv32qi3 */ |
| 30575 | case 3271: /* sminv32qi3_mask */ |
| 30576 | case 3270: /* *sminv32qi3 */ |
| 30577 | case 3269: /* smaxv32qi3_mask */ |
| 30578 | case 3268: /* *smaxv32qi3 */ |
| 30579 | case 3267: /* uminv16qi3_mask */ |
| 30580 | case 3266: /* *uminv16qi3 */ |
| 30581 | case 3265: /* umaxv16qi3_mask */ |
| 30582 | case 3264: /* *umaxv16qi3 */ |
| 30583 | case 3263: /* sminv16qi3_mask */ |
| 30584 | case 3262: /* *sminv16qi3 */ |
| 30585 | case 3261: /* smaxv16qi3_mask */ |
| 30586 | case 3260: /* *smaxv16qi3 */ |
| 30587 | case 3259: /* uminv64qi3_mask */ |
| 30588 | case 3258: /* *uminv64qi3 */ |
| 30589 | case 3257: /* umaxv64qi3_mask */ |
| 30590 | case 3256: /* *umaxv64qi3 */ |
| 30591 | case 3255: /* sminv64qi3_mask */ |
| 30592 | case 3254: /* *sminv64qi3 */ |
| 30593 | case 3253: /* smaxv64qi3_mask */ |
| 30594 | case 3252: /* *smaxv64qi3 */ |
| 30595 | case 3251: /* *avx512f_uminv2di3_mask */ |
| 30596 | case 3250: /* *avx512f_uminv2di3 */ |
| 30597 | case 3249: /* *avx512f_umaxv2di3_mask */ |
| 30598 | case 3248: /* *avx512f_umaxv2di3 */ |
| 30599 | case 3247: /* *avx512f_sminv2di3_mask */ |
| 30600 | case 3246: /* *avx512f_sminv2di3 */ |
| 30601 | case 3245: /* *avx512f_smaxv2di3_mask */ |
| 30602 | case 3244: /* *avx512f_smaxv2di3 */ |
| 30603 | case 3243: /* *avx512f_uminv4di3_mask */ |
| 30604 | case 3242: /* *avx512f_uminv4di3 */ |
| 30605 | case 3241: /* *avx512f_umaxv4di3_mask */ |
| 30606 | case 3240: /* *avx512f_umaxv4di3 */ |
| 30607 | case 3239: /* *avx512f_sminv4di3_mask */ |
| 30608 | case 3238: /* *avx512f_sminv4di3 */ |
| 30609 | case 3237: /* *avx512f_smaxv4di3_mask */ |
| 30610 | case 3236: /* *avx512f_smaxv4di3 */ |
| 30611 | case 3235: /* *avx512f_uminv8di3_mask */ |
| 30612 | case 3234: /* *avx512f_uminv8di3 */ |
| 30613 | case 3233: /* *avx512f_umaxv8di3_mask */ |
| 30614 | case 3232: /* *avx512f_umaxv8di3 */ |
| 30615 | case 3231: /* *avx512f_sminv8di3_mask */ |
| 30616 | case 3230: /* *avx512f_sminv8di3 */ |
| 30617 | case 3229: /* *avx512f_smaxv8di3_mask */ |
| 30618 | case 3228: /* *avx512f_smaxv8di3 */ |
| 30619 | case 3227: /* *avx512f_uminv4si3_mask */ |
| 30620 | case 3226: /* *avx512f_uminv4si3 */ |
| 30621 | case 3225: /* *avx512f_umaxv4si3_mask */ |
| 30622 | case 3224: /* *avx512f_umaxv4si3 */ |
| 30623 | case 3223: /* *avx512f_sminv4si3_mask */ |
| 30624 | case 3222: /* *avx512f_sminv4si3 */ |
| 30625 | case 3221: /* *avx512f_smaxv4si3_mask */ |
| 30626 | case 3220: /* *avx512f_smaxv4si3 */ |
| 30627 | case 3219: /* *avx512f_uminv8si3_mask */ |
| 30628 | case 3218: /* *avx512f_uminv8si3 */ |
| 30629 | case 3217: /* *avx512f_umaxv8si3_mask */ |
| 30630 | case 3216: /* *avx512f_umaxv8si3 */ |
| 30631 | case 3215: /* *avx512f_sminv8si3_mask */ |
| 30632 | case 3214: /* *avx512f_sminv8si3 */ |
| 30633 | case 3213: /* *avx512f_smaxv8si3_mask */ |
| 30634 | case 3212: /* *avx512f_smaxv8si3 */ |
| 30635 | case 3211: /* *avx512f_uminv16si3_mask */ |
| 30636 | case 3210: /* *avx512f_uminv16si3 */ |
| 30637 | case 3209: /* *avx512f_umaxv16si3_mask */ |
| 30638 | case 3208: /* *avx512f_umaxv16si3 */ |
| 30639 | case 3207: /* *avx512f_sminv16si3_mask */ |
| 30640 | case 3206: /* *avx512f_sminv16si3 */ |
| 30641 | case 3205: /* *avx512f_smaxv16si3_mask */ |
| 30642 | case 3204: /* *avx512f_smaxv16si3 */ |
| 30643 | case 3203: /* *avx2_uminv8si3 */ |
| 30644 | case 3202: /* *avx2_umaxv8si3 */ |
| 30645 | case 3201: /* *avx2_sminv8si3 */ |
| 30646 | case 3200: /* *avx2_smaxv8si3 */ |
| 30647 | case 3199: /* *avx2_uminv16hi3 */ |
| 30648 | case 3198: /* *avx2_umaxv16hi3 */ |
| 30649 | case 3197: /* *avx2_sminv16hi3 */ |
| 30650 | case 3196: /* *avx2_smaxv16hi3 */ |
| 30651 | case 3195: /* *avx2_uminv32qi3 */ |
| 30652 | case 3194: /* *avx2_umaxv32qi3 */ |
| 30653 | case 3193: /* *avx2_sminv32qi3 */ |
| 30654 | case 3192: /* *avx2_smaxv32qi3 */ |
| 30655 | case 3066: /* *avx2_pmaddwd */ |
| 30656 | case 3065: /* avx512bw_pmaddwd512v8hi_mask */ |
| 30657 | case 3064: /* avx512bw_pmaddwd512v8hi */ |
| 30658 | case 3063: /* avx512bw_pmaddwd512v16hi_mask */ |
| 30659 | case 3062: /* avx512bw_pmaddwd512v16hi */ |
| 30660 | case 3061: /* avx512bw_pmaddwd512v32hi_mask */ |
| 30661 | case 3060: /* avx512bw_pmaddwd512v32hi */ |
| 30662 | case 3029: /* *sse2_ussubv8hi3_mask */ |
| 30663 | case 3028: /* *sse2_ussubv8hi3 */ |
| 30664 | case 3027: /* *sse2_sssubv8hi3_mask */ |
| 30665 | case 3026: /* *sse2_sssubv8hi3 */ |
| 30666 | case 3025: /* *sse2_usaddv8hi3_mask */ |
| 30667 | case 3024: /* *sse2_usaddv8hi3 */ |
| 30668 | case 3023: /* *sse2_ssaddv8hi3_mask */ |
| 30669 | case 3022: /* *sse2_ssaddv8hi3 */ |
| 30670 | case 3021: /* *avx2_ussubv16hi3_mask */ |
| 30671 | case 3020: /* *avx2_ussubv16hi3 */ |
| 30672 | case 3019: /* *avx2_sssubv16hi3_mask */ |
| 30673 | case 3018: /* *avx2_sssubv16hi3 */ |
| 30674 | case 3017: /* *avx2_usaddv16hi3_mask */ |
| 30675 | case 3016: /* *avx2_usaddv16hi3 */ |
| 30676 | case 3015: /* *avx2_ssaddv16hi3_mask */ |
| 30677 | case 3014: /* *avx2_ssaddv16hi3 */ |
| 30678 | case 3013: /* *avx512bw_ussubv32hi3_mask */ |
| 30679 | case 3012: /* *avx512bw_ussubv32hi3 */ |
| 30680 | case 3011: /* *avx512bw_sssubv32hi3_mask */ |
| 30681 | case 3010: /* *avx512bw_sssubv32hi3 */ |
| 30682 | case 3009: /* *avx512bw_usaddv32hi3_mask */ |
| 30683 | case 3008: /* *avx512bw_usaddv32hi3 */ |
| 30684 | case 3007: /* *avx512bw_ssaddv32hi3_mask */ |
| 30685 | case 3006: /* *avx512bw_ssaddv32hi3 */ |
| 30686 | case 3005: /* *sse2_ussubv16qi3_mask */ |
| 30687 | case 3004: /* *sse2_ussubv16qi3 */ |
| 30688 | case 3003: /* *sse2_sssubv16qi3_mask */ |
| 30689 | case 3002: /* *sse2_sssubv16qi3 */ |
| 30690 | case 3001: /* *sse2_usaddv16qi3_mask */ |
| 30691 | case 3000: /* *sse2_usaddv16qi3 */ |
| 30692 | case 2999: /* *sse2_ssaddv16qi3_mask */ |
| 30693 | case 2998: /* *sse2_ssaddv16qi3 */ |
| 30694 | case 2997: /* *avx2_ussubv32qi3_mask */ |
| 30695 | case 2996: /* *avx2_ussubv32qi3 */ |
| 30696 | case 2995: /* *avx2_sssubv32qi3_mask */ |
| 30697 | case 2994: /* *avx2_sssubv32qi3 */ |
| 30698 | case 2993: /* *avx2_usaddv32qi3_mask */ |
| 30699 | case 2992: /* *avx2_usaddv32qi3 */ |
| 30700 | case 2991: /* *avx2_ssaddv32qi3_mask */ |
| 30701 | case 2990: /* *avx2_ssaddv32qi3 */ |
| 30702 | case 2989: /* *avx512bw_ussubv64qi3_mask */ |
| 30703 | case 2988: /* *avx512bw_ussubv64qi3 */ |
| 30704 | case 2987: /* *avx512bw_sssubv64qi3_mask */ |
| 30705 | case 2986: /* *avx512bw_sssubv64qi3 */ |
| 30706 | case 2985: /* *avx512bw_usaddv64qi3_mask */ |
| 30707 | case 2984: /* *avx512bw_usaddv64qi3 */ |
| 30708 | case 2983: /* *avx512bw_ssaddv64qi3_mask */ |
| 30709 | case 2982: /* *avx512bw_ssaddv64qi3 */ |
| 30710 | case 2981: /* *subv8hi3_mask */ |
| 30711 | case 2980: /* *addv8hi3_mask */ |
| 30712 | case 2979: /* *subv16hi3_mask */ |
| 30713 | case 2978: /* *addv16hi3_mask */ |
| 30714 | case 2977: /* *subv32hi3_mask */ |
| 30715 | case 2976: /* *addv32hi3_mask */ |
| 30716 | case 2975: /* *subv32qi3_mask */ |
| 30717 | case 2974: /* *addv32qi3_mask */ |
| 30718 | case 2973: /* *subv16qi3_mask */ |
| 30719 | case 2972: /* *addv16qi3_mask */ |
| 30720 | case 2971: /* *subv64qi3_mask */ |
| 30721 | case 2970: /* *addv64qi3_mask */ |
| 30722 | case 2969: /* *subv2di3_mask */ |
| 30723 | case 2968: /* *addv2di3_mask */ |
| 30724 | case 2967: /* *subv4di3_mask */ |
| 30725 | case 2966: /* *addv4di3_mask */ |
| 30726 | case 2965: /* *subv8di3_mask */ |
| 30727 | case 2964: /* *addv8di3_mask */ |
| 30728 | case 2963: /* *subv4si3_mask */ |
| 30729 | case 2962: /* *addv4si3_mask */ |
| 30730 | case 2961: /* *subv8si3_mask */ |
| 30731 | case 2960: /* *addv8si3_mask */ |
| 30732 | case 2959: /* *subv16si3_mask */ |
| 30733 | case 2958: /* *addv16si3_mask */ |
| 30734 | case 2957: /* *subv2di3 */ |
| 30735 | case 2956: /* *addv2di3 */ |
| 30736 | case 2955: /* *subv4di3 */ |
| 30737 | case 2954: /* *addv4di3 */ |
| 30738 | case 2953: /* *subv8di3 */ |
| 30739 | case 2952: /* *addv8di3 */ |
| 30740 | case 2951: /* *subv4si3 */ |
| 30741 | case 2950: /* *addv4si3 */ |
| 30742 | case 2949: /* *subv8si3 */ |
| 30743 | case 2948: /* *addv8si3 */ |
| 30744 | case 2947: /* *subv16si3 */ |
| 30745 | case 2946: /* *addv16si3 */ |
| 30746 | case 2945: /* *subv8hi3 */ |
| 30747 | case 2944: /* *addv8hi3 */ |
| 30748 | case 2943: /* *subv16hi3 */ |
| 30749 | case 2942: /* *addv16hi3 */ |
| 30750 | case 2941: /* *subv32hi3 */ |
| 30751 | case 2940: /* *addv32hi3 */ |
| 30752 | case 2939: /* *subv16qi3 */ |
| 30753 | case 2938: /* *addv16qi3 */ |
| 30754 | case 2937: /* *subv32qi3 */ |
| 30755 | case 2936: /* *addv32qi3 */ |
| 30756 | case 2935: /* *subv64qi3 */ |
| 30757 | case 2934: /* *addv64qi3 */ |
| 30758 | extract_insn_cached (insn); |
| 30759 | if (! (register_operand (operands[0], V2DImode))) |
| 30760 | { |
| 30761 | return 1; |
| 30762 | } |
| 30763 | else |
| 30764 | { |
| 30765 | return 4; |
| 30766 | } |
| 30767 | |
| 30768 | case 2467: /* *sse4_1_extractps */ |
| 30769 | extract_constrain_insn_cached (insn); |
| 30770 | if (!((1 << which_alternative) & 0x7)) |
| 30771 | { |
| 30772 | return 9; |
| 30773 | } |
| 30774 | else |
| 30775 | { |
| 30776 | return 1; |
| 30777 | } |
| 30778 | |
| 30779 | case 1464: /* sse2_divv2df3_mask */ |
| 30780 | case 1463: /* sse2_divv2df3 */ |
| 30781 | case 1462: /* avx_divv4df3_mask */ |
| 30782 | case 1461: /* avx_divv4df3 */ |
| 30783 | case 1460: /* avx512f_divv8df3_mask_round */ |
| 30784 | case 1459: /* avx512f_divv8df3_mask */ |
| 30785 | case 1458: /* avx512f_divv8df3_round */ |
| 30786 | case 1457: /* avx512f_divv8df3 */ |
| 30787 | case 1456: /* sse_divv4sf3_mask */ |
| 30788 | case 1455: /* sse_divv4sf3 */ |
| 30789 | case 1454: /* avx_divv8sf3_mask */ |
| 30790 | case 1453: /* avx_divv8sf3 */ |
| 30791 | case 1452: /* avx512f_divv16sf3_mask_round */ |
| 30792 | case 1451: /* avx512f_divv16sf3_mask */ |
| 30793 | case 1450: /* avx512f_divv16sf3_round */ |
| 30794 | case 1449: /* avx512f_divv16sf3 */ |
| 30795 | case 1448: /* sse2_vmdivv2df3_round */ |
| 30796 | case 1447: /* sse2_vmdivv2df3 */ |
| 30797 | case 1444: /* sse_vmdivv4sf3_round */ |
| 30798 | case 1443: /* sse_vmdivv4sf3 */ |
| 30799 | return 13 /* 0xd */; |
| 30800 | |
| 30801 | case 3783: /* sse4_1_dppd */ |
| 30802 | case 3782: /* avx_dppd256 */ |
| 30803 | case 3781: /* sse4_1_dpps */ |
| 30804 | case 3780: /* avx_dpps256 */ |
| 30805 | case 3713: /* *ssse3_pmulhrswv4hi3 */ |
| 30806 | case 3712: /* *ssse3_pmulhrswv8hi3_mask */ |
| 30807 | case 3711: /* *ssse3_pmulhrswv8hi3 */ |
| 30808 | case 3710: /* *avx2_pmulhrswv16hi3_mask */ |
| 30809 | case 3709: /* *avx2_pmulhrswv16hi3 */ |
| 30810 | case 3708: /* *avx512bw_pmulhrswv32hi3_mask */ |
| 30811 | case 3707: /* *avx512bw_pmulhrswv32hi3 */ |
| 30812 | case 3704: /* avx512bw_umulhrswv32hi3_mask */ |
| 30813 | case 3703: /* avx512bw_umulhrswv32hi3 */ |
| 30814 | case 3079: /* *sse4_1_mulv4si3_mask */ |
| 30815 | case 3078: /* *sse4_1_mulv4si3 */ |
| 30816 | case 3077: /* *avx2_mulv8si3_mask */ |
| 30817 | case 3076: /* *avx2_mulv8si3 */ |
| 30818 | case 3075: /* *avx512f_mulv16si3_mask */ |
| 30819 | case 3074: /* *avx512f_mulv16si3 */ |
| 30820 | case 3073: /* avx512dq_mulv2di3_mask */ |
| 30821 | case 3072: /* avx512dq_mulv2di3 */ |
| 30822 | case 3071: /* avx512dq_mulv4di3_mask */ |
| 30823 | case 3070: /* avx512dq_mulv4di3 */ |
| 30824 | case 3069: /* avx512dq_mulv8di3_mask */ |
| 30825 | case 3068: /* avx512dq_mulv8di3 */ |
| 30826 | case 3059: /* *sse4_1_mulv2siv2di3_mask */ |
| 30827 | case 3058: /* *sse4_1_mulv2siv2di3 */ |
| 30828 | case 3057: /* *vec_widen_smult_even_v8si_mask */ |
| 30829 | case 3056: /* *vec_widen_smult_even_v8si */ |
| 30830 | case 3055: /* *vec_widen_smult_even_v16si_mask */ |
| 30831 | case 3054: /* *vec_widen_smult_even_v16si */ |
| 30832 | case 3053: /* *vec_widen_umult_even_v4si_mask */ |
| 30833 | case 3052: /* *vec_widen_umult_even_v4si */ |
| 30834 | case 3051: /* *vec_widen_umult_even_v8si_mask */ |
| 30835 | case 3050: /* *vec_widen_umult_even_v8si */ |
| 30836 | case 3049: /* *vec_widen_umult_even_v16si_mask */ |
| 30837 | case 3048: /* *vec_widen_umult_even_v16si */ |
| 30838 | case 3047: /* *umulv8hi3_highpart_mask */ |
| 30839 | case 3046: /* *umulv8hi3_highpart */ |
| 30840 | case 3045: /* *smulv8hi3_highpart_mask */ |
| 30841 | case 3044: /* *smulv8hi3_highpart */ |
| 30842 | case 3043: /* *umulv16hi3_highpart_mask */ |
| 30843 | case 3042: /* *umulv16hi3_highpart */ |
| 30844 | case 3041: /* *smulv16hi3_highpart_mask */ |
| 30845 | case 3040: /* *smulv16hi3_highpart */ |
| 30846 | case 3039: /* *umulv32hi3_highpart_mask */ |
| 30847 | case 3038: /* *umulv32hi3_highpart */ |
| 30848 | case 3037: /* *smulv32hi3_highpart_mask */ |
| 30849 | case 3036: /* *smulv32hi3_highpart */ |
| 30850 | case 3035: /* *mulv8hi3_mask */ |
| 30851 | case 3034: /* *mulv8hi3 */ |
| 30852 | case 3033: /* *mulv16hi3_mask */ |
| 30853 | case 3032: /* *mulv16hi3 */ |
| 30854 | case 3031: /* *mulv32hi3_mask */ |
| 30855 | case 3030: /* *mulv32hi3 */ |
| 30856 | case 1446: /* sse2_vmmulv2df3_round */ |
| 30857 | case 1445: /* sse2_vmmulv2df3 */ |
| 30858 | case 1440: /* *mulv2df3_mask_round */ |
| 30859 | case 1439: /* *mulv2df3_mask */ |
| 30860 | case 1438: /* *mulv2df3_round */ |
| 30861 | case 1437: /* *mulv2df3 */ |
| 30862 | case 1436: /* *mulv4df3_mask_round */ |
| 30863 | case 1435: /* *mulv4df3_mask */ |
| 30864 | case 1434: /* *mulv4df3_round */ |
| 30865 | case 1433: /* *mulv4df3 */ |
| 30866 | case 1432: /* *mulv8df3_mask_round */ |
| 30867 | case 1431: /* *mulv8df3_mask */ |
| 30868 | case 1430: /* *mulv8df3_round */ |
| 30869 | case 1429: /* *mulv8df3 */ |
| 30870 | case 1428: /* *mulv4sf3_mask_round */ |
| 30871 | case 1427: /* *mulv4sf3_mask */ |
| 30872 | case 1426: /* *mulv4sf3_round */ |
| 30873 | case 1425: /* *mulv4sf3 */ |
| 30874 | case 1424: /* *mulv8sf3_mask_round */ |
| 30875 | case 1423: /* *mulv8sf3_mask */ |
| 30876 | case 1422: /* *mulv8sf3_round */ |
| 30877 | case 1421: /* *mulv8sf3 */ |
| 30878 | case 1420: /* *mulv16sf3_mask_round */ |
| 30879 | case 1419: /* *mulv16sf3_mask */ |
| 30880 | case 1418: /* *mulv16sf3_round */ |
| 30881 | case 1417: /* *mulv16sf3 */ |
| 30882 | return 5; |
| 30883 | |
| 30884 | case 994: /* pro_epilogue_adjust_stack_di_add */ |
| 30885 | case 993: /* pro_epilogue_adjust_stack_si_add */ |
| 30886 | extract_constrain_insn_cached (insn); |
| 30887 | if (((which_alternative == 0) && (! ( |
| 30888 | #line 17556 "/___NETBSD_SRC___/tools/gcc/../../external/gpl3/gcc/dist/gcc/config/i386/i386.md" |
| 30889 | (TARGET_OPT_AGU)))) || ((cached_type = get_attr_type (insn)) == TYPE_IMOV) || (cached_type == TYPE_LEA)) |
| 30890 | { |
| 30891 | return 1; |
| 30892 | } |
| 30893 | else |
| 30894 | { |
| 30895 | return 0; |
| 30896 | } |
| 30897 | |
| 30898 | case 982: /* *movsfcc_1_387 */ |
| 30899 | extract_constrain_insn_cached (insn); |
| 30900 | if (!((1 << which_alternative) & 0x3)) |
| 30901 | { |
| 30902 | return 2; |
| 30903 | } |
| 30904 | else |
| 30905 | { |
| 30906 | return 0; |
| 30907 | } |
| 30908 | |
| 30909 | case 981: /* *movdfcc_1 */ |
| 30910 | extract_constrain_insn_cached (insn); |
| 30911 | if (((1 << which_alternative) & 0xc)) |
| 30912 | { |
| 30913 | return 9; |
| 30914 | } |
| 30915 | else if (!((1 << which_alternative) & 0xf)) |
| 30916 | { |
| 30917 | return 2; |
| 30918 | } |
| 30919 | else |
| 30920 | { |
| 30921 | return 0; |
| 30922 | } |
| 30923 | |
| 30924 | case 816: /* *fop_df_1 */ |
| 30925 | case 815: /* *fop_sf_1 */ |
| 30926 | if ((cached_type = get_attr_type (insn)) == TYPE_SSEADD) |
| 30927 | { |
| 30928 | return 3; |
| 30929 | } |
| 30930 | else if (cached_type == TYPE_SSEDIV) |
| 30931 | { |
| 30932 | return 13 /* 0xd */; |
| 30933 | } |
| 30934 | else |
| 30935 | { |
| 30936 | return 0; |
| 30937 | } |
| 30938 | |
| 30939 | case 813: /* *fop_df_comm */ |
| 30940 | if ((cached_type = get_attr_type (insn)) == TYPE_SSEADD) |
| 30941 | { |
| 30942 | return 3; |
| 30943 | } |
| 30944 | else if (cached_type == TYPE_SSEMUL) |
| 30945 | { |
| 30946 | return 5; |
| 30947 | } |
| 30948 | else |
| 30949 | { |
| 30950 | return 0; |
| 30951 | } |
| 30952 | |
| 30953 | case 812: /* *fop_sf_comm */ |
| 30954 | if ((cached_type = get_attr_type (insn)) == TYPE_SSEADD) |
| 30955 | { |
| 30956 | return 3; |
| 30957 | } |
| 30958 | else if (cached_type == TYPE_SSEMUL) |
| 30959 | { |
| 30960 | return 4; |
| 30961 | } |
| 30962 | else |
| 30963 | { |
| 30964 | return 0; |
| 30965 | } |
| 30966 | |
| 30967 | case 693: /* simple_return_indirect_internal */ |
| 30968 | case 663: /* *tablejump_1 */ |
| 30969 | case 662: /* *tablejump_1 */ |
| 30970 | case 661: /* *indirect_jump */ |
| 30971 | case 660: /* *indirect_jump */ |
| 30972 | extract_constrain_insn_cached (insn); |
| 30973 | if ( |
| 30974 | #line 12442 "/___NETBSD_SRC___/tools/gcc/../../external/gpl3/gcc/dist/gcc/config/i386/i386.md" |
| 30975 | ((cfun->machine->indirect_branch_type |
| 30976 | != indirect_branch_keep))) |
| 30977 | { |
| 30978 | return 9; |
| 30979 | } |
| 30980 | else if (! ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 30981 | { |
| 30982 | return 1; |
| 30983 | } |
| 30984 | else |
| 30985 | { |
| 30986 | return 2; |
| 30987 | } |
| 30988 | |
| 30989 | case 659: /* jump */ |
| 30990 | case 628: /* *jcc_2 */ |
| 30991 | case 627: /* *jcc_1 */ |
| 30992 | if (! ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 30993 | { |
| 30994 | return 1; |
| 30995 | } |
| 30996 | else |
| 30997 | { |
| 30998 | return 2; |
| 30999 | } |
| 31000 | |
| 31001 | case 624: /* *setcc_qi_slp */ |
| 31002 | case 623: /* *setcc_qi */ |
| 31003 | if (! ((cached_memory = get_attr_memory (insn)) == MEMORY_STORE)) |
| 31004 | { |
| 31005 | return 1; |
| 31006 | } |
| 31007 | else |
| 31008 | { |
| 31009 | return 2; |
| 31010 | } |
| 31011 | |
| 31012 | case 732: /* tzcnt_hi */ |
| 31013 | case 730: /* *tzcnt_di_falsedep */ |
| 31014 | case 728: /* *tzcnt_si_falsedep */ |
| 31015 | case 726: /* tzcnt_di */ |
| 31016 | case 724: /* tzcnt_si */ |
| 31017 | case 719: /* *bsrhi */ |
| 31018 | case 718: /* bsr */ |
| 31019 | case 717: /* bsr_rex64 */ |
| 31020 | case 716: /* *ctzdi2_falsedep */ |
| 31021 | case 715: /* *ctzsi2_falsedep */ |
| 31022 | case 714: /* ctzdi2 */ |
| 31023 | case 713: /* ctzsi2 */ |
| 31024 | case 712: /* *bsfdi_1 */ |
| 31025 | case 711: /* *bsfsi_1 */ |
| 31026 | case 710: /* *tzcntdi_1_falsedep */ |
| 31027 | case 709: /* *tzcntsi_1_falsedep */ |
| 31028 | case 708: /* *tzcntdi_1 */ |
| 31029 | case 707: /* *tzcntsi_1 */ |
| 31030 | case 613: /* *btdi */ |
| 31031 | case 612: /* *btsi */ |
| 31032 | case 611: /* *btcq */ |
| 31033 | case 610: /* *btrq */ |
| 31034 | case 609: /* *btsq */ |
| 31035 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) |
| 31036 | { |
| 31037 | return 10 /* 0xa */; |
| 31038 | } |
| 31039 | else |
| 31040 | { |
| 31041 | return 1; |
| 31042 | } |
| 31043 | |
| 31044 | case 602: /* *rotrsi3_1_zext */ |
| 31045 | case 601: /* *rotlsi3_1_zext */ |
| 31046 | case 599: /* *rotrdi3_1 */ |
| 31047 | case 598: /* *rotldi3_1 */ |
| 31048 | case 597: /* *rotrsi3_1 */ |
| 31049 | case 596: /* *rotlsi3_1 */ |
| 31050 | case 561: /* *ashrsi3_1_zext */ |
| 31051 | case 560: /* *lshrsi3_1_zext */ |
| 31052 | case 557: /* *ashrdi3_1 */ |
| 31053 | case 556: /* *lshrdi3_1 */ |
| 31054 | case 555: /* *ashrsi3_1 */ |
| 31055 | case 554: /* *lshrsi3_1 */ |
| 31056 | extract_constrain_insn_cached (insn); |
| 31057 | if (which_alternative == 0) |
| 31058 | { |
| 31059 | return 1; |
| 31060 | } |
| 31061 | else |
| 31062 | { |
| 31063 | return 0; |
| 31064 | } |
| 31065 | |
| 31066 | case 536: /* *ashldi3_cconly */ |
| 31067 | case 535: /* *ashlsi3_cconly */ |
| 31068 | case 534: /* *ashlhi3_cconly */ |
| 31069 | case 533: /* *ashlqi3_cconly */ |
| 31070 | case 532: /* *ashlsi3_cmp_zext */ |
| 31071 | case 531: /* *ashldi3_cmp */ |
| 31072 | case 530: /* *ashlsi3_cmp */ |
| 31073 | case 529: /* *ashlhi3_cmp */ |
| 31074 | case 528: /* *ashlqi3_cmp */ |
| 31075 | if (((cached_type = get_attr_type (insn)) == TYPE_ALU) || (cached_type == TYPE_ISHIFT)) |
| 31076 | { |
| 31077 | return 1; |
| 31078 | } |
| 31079 | else |
| 31080 | { |
| 31081 | return 0; |
| 31082 | } |
| 31083 | |
| 31084 | case 527: /* *ashlqi3_1_slp */ |
| 31085 | if (((cached_type = get_attr_type (insn)) == TYPE_ALU1) || (cached_type == TYPE_ISHIFT1)) |
| 31086 | { |
| 31087 | return 1; |
| 31088 | } |
| 31089 | else |
| 31090 | { |
| 31091 | return 0; |
| 31092 | } |
| 31093 | |
| 31094 | case 526: /* *ashlqi3_1 */ |
| 31095 | extract_constrain_insn_cached (insn); |
| 31096 | if (((cached_type = get_attr_type (insn)) == TYPE_ALU) || (which_alternative == 2) || (cached_type == TYPE_ISHIFT)) |
| 31097 | { |
| 31098 | return 1; |
| 31099 | } |
| 31100 | else |
| 31101 | { |
| 31102 | return 0; |
| 31103 | } |
| 31104 | |
| 31105 | case 525: /* *ashlhi3_1 */ |
| 31106 | extract_constrain_insn_cached (insn); |
| 31107 | if ((which_alternative != 0) || ((cached_type = get_attr_type (insn)) == TYPE_ALU) || (cached_type == TYPE_ISHIFT)) |
| 31108 | { |
| 31109 | return 1; |
| 31110 | } |
| 31111 | else |
| 31112 | { |
| 31113 | return 0; |
| 31114 | } |
| 31115 | |
| 31116 | case 524: /* *ashlsi3_1_zext */ |
| 31117 | case 522: /* *ashldi3_1 */ |
| 31118 | case 521: /* *ashlsi3_1 */ |
| 31119 | extract_constrain_insn_cached (insn); |
| 31120 | if (((cached_type = get_attr_type (insn)) == TYPE_ALU) || (which_alternative == 1) || (cached_type == TYPE_ISHIFT)) |
| 31121 | { |
| 31122 | return 1; |
| 31123 | } |
| 31124 | else |
| 31125 | { |
| 31126 | return 0; |
| 31127 | } |
| 31128 | |
| 31129 | case 386: /* udivmodhiqi3 */ |
| 31130 | case 385: /* *udivmoddi4_noext */ |
| 31131 | case 384: /* *udivmodsi4_noext */ |
| 31132 | case 383: /* *udivmodhi4_noext */ |
| 31133 | case 375: /* divmodhiqi3 */ |
| 31134 | case 374: /* *divmoddi4_noext */ |
| 31135 | case 373: /* *divmodsi4_noext */ |
| 31136 | case 372: /* *divmodhi4_noext */ |
| 31137 | return 33 /* 0x21 */; |
| 31138 | |
| 31139 | case 356: /* *umulditi3_1 */ |
| 31140 | extract_constrain_insn_cached (insn); |
| 31141 | if (which_alternative != 0) |
| 31142 | { |
| 31143 | return 4; |
| 31144 | } |
| 31145 | else |
| 31146 | { |
| 31147 | return 0; |
| 31148 | } |
| 31149 | |
| 31150 | case 355: /* *umulsidi3_1 */ |
| 31151 | extract_constrain_insn_cached (insn); |
| 31152 | if (which_alternative == 1) |
| 31153 | { |
| 31154 | return 3; |
| 31155 | } |
| 31156 | else |
| 31157 | { |
| 31158 | return 0; |
| 31159 | } |
| 31160 | |
| 31161 | case 1618: /* avx_hsubv8sf3 */ |
| 31162 | case 1617: /* avx_haddv8sf3 */ |
| 31163 | case 1612: /* avx_hsubv4df3 */ |
| 31164 | case 1611: /* avx_haddv4df3 */ |
| 31165 | case 1610: /* sse3_addsubv4sf3 */ |
| 31166 | case 1609: /* avx_addsubv8sf3 */ |
| 31167 | case 1607: /* avx_addsubv4df3 */ |
| 31168 | case 1594: /* ieee_minv4df3_mask */ |
| 31169 | case 1593: /* ieee_minv4df3 */ |
| 31170 | case 1592: /* ieee_maxv4df3_mask */ |
| 31171 | case 1591: /* ieee_maxv4df3 */ |
| 31172 | case 1590: /* ieee_minv8df3_mask_round */ |
| 31173 | case 1589: /* ieee_minv8df3_mask */ |
| 31174 | case 1588: /* ieee_minv8df3_round */ |
| 31175 | case 1587: /* ieee_minv8df3 */ |
| 31176 | case 1586: /* ieee_maxv8df3_mask_round */ |
| 31177 | case 1585: /* ieee_maxv8df3_mask */ |
| 31178 | case 1584: /* ieee_maxv8df3_round */ |
| 31179 | case 1583: /* ieee_maxv8df3 */ |
| 31180 | case 1582: /* ieee_minv4sf3_mask */ |
| 31181 | case 1581: /* ieee_minv4sf3 */ |
| 31182 | case 1580: /* ieee_maxv4sf3_mask */ |
| 31183 | case 1579: /* ieee_maxv4sf3 */ |
| 31184 | case 1578: /* ieee_minv8sf3_mask */ |
| 31185 | case 1577: /* ieee_minv8sf3 */ |
| 31186 | case 1576: /* ieee_maxv8sf3_mask */ |
| 31187 | case 1575: /* ieee_maxv8sf3 */ |
| 31188 | case 1574: /* ieee_minv16sf3_mask_round */ |
| 31189 | case 1573: /* ieee_minv16sf3_mask */ |
| 31190 | case 1572: /* ieee_minv16sf3_round */ |
| 31191 | case 1571: /* ieee_minv16sf3 */ |
| 31192 | case 1570: /* ieee_maxv16sf3_mask_round */ |
| 31193 | case 1569: /* ieee_maxv16sf3_mask */ |
| 31194 | case 1568: /* ieee_maxv16sf3_round */ |
| 31195 | case 1567: /* ieee_maxv16sf3 */ |
| 31196 | case 1558: /* *sminv4df3_mask_round */ |
| 31197 | case 1557: /* *sminv4df3_mask */ |
| 31198 | case 1556: /* *sminv4df3_round */ |
| 31199 | case 1555: /* *sminv4df3 */ |
| 31200 | case 1554: /* *smaxv4df3_mask_round */ |
| 31201 | case 1553: /* *smaxv4df3_mask */ |
| 31202 | case 1552: /* *smaxv4df3_round */ |
| 31203 | case 1551: /* *smaxv4df3 */ |
| 31204 | case 1550: /* *sminv8df3_mask_round */ |
| 31205 | case 1549: /* *sminv8df3_mask */ |
| 31206 | case 1548: /* *sminv8df3_round */ |
| 31207 | case 1547: /* *sminv8df3 */ |
| 31208 | case 1546: /* *smaxv8df3_mask_round */ |
| 31209 | case 1545: /* *smaxv8df3_mask */ |
| 31210 | case 1544: /* *smaxv8df3_round */ |
| 31211 | case 1543: /* *smaxv8df3 */ |
| 31212 | case 1542: /* *sminv4sf3_mask_round */ |
| 31213 | case 1541: /* *sminv4sf3_mask */ |
| 31214 | case 1540: /* *sminv4sf3_round */ |
| 31215 | case 1539: /* *sminv4sf3 */ |
| 31216 | case 1538: /* *smaxv4sf3_mask_round */ |
| 31217 | case 1537: /* *smaxv4sf3_mask */ |
| 31218 | case 1536: /* *smaxv4sf3_round */ |
| 31219 | case 1535: /* *smaxv4sf3 */ |
| 31220 | case 1534: /* *sminv8sf3_mask_round */ |
| 31221 | case 1533: /* *sminv8sf3_mask */ |
| 31222 | case 1532: /* *sminv8sf3_round */ |
| 31223 | case 1531: /* *sminv8sf3 */ |
| 31224 | case 1530: /* *smaxv8sf3_mask_round */ |
| 31225 | case 1529: /* *smaxv8sf3_mask */ |
| 31226 | case 1528: /* *smaxv8sf3_round */ |
| 31227 | case 1527: /* *smaxv8sf3 */ |
| 31228 | case 1526: /* *sminv16sf3_mask_round */ |
| 31229 | case 1525: /* *sminv16sf3_mask */ |
| 31230 | case 1524: /* *sminv16sf3_round */ |
| 31231 | case 1523: /* *sminv16sf3 */ |
| 31232 | case 1522: /* *smaxv16sf3_mask_round */ |
| 31233 | case 1521: /* *smaxv16sf3_mask */ |
| 31234 | case 1520: /* *smaxv16sf3_round */ |
| 31235 | case 1519: /* *smaxv16sf3 */ |
| 31236 | case 1416: /* sse2_vmsubv2df3_round */ |
| 31237 | case 1415: /* sse2_vmsubv2df3 */ |
| 31238 | case 1414: /* sse2_vmaddv2df3_round */ |
| 31239 | case 1413: /* sse2_vmaddv2df3 */ |
| 31240 | case 1412: /* sse_vmsubv4sf3_round */ |
| 31241 | case 1411: /* sse_vmsubv4sf3 */ |
| 31242 | case 1410: /* sse_vmaddv4sf3_round */ |
| 31243 | case 1409: /* sse_vmaddv4sf3 */ |
| 31244 | case 1400: /* *subv4df3_mask_round */ |
| 31245 | case 1399: /* *subv4df3_mask */ |
| 31246 | case 1398: /* *subv4df3_round */ |
| 31247 | case 1397: /* *subv4df3 */ |
| 31248 | case 1396: /* *addv4df3_mask_round */ |
| 31249 | case 1395: /* *addv4df3_mask */ |
| 31250 | case 1394: /* *addv4df3_round */ |
| 31251 | case 1393: /* *addv4df3 */ |
| 31252 | case 1392: /* *subv8df3_mask_round */ |
| 31253 | case 1391: /* *subv8df3_mask */ |
| 31254 | case 1390: /* *subv8df3_round */ |
| 31255 | case 1389: /* *subv8df3 */ |
| 31256 | case 1388: /* *addv8df3_mask_round */ |
| 31257 | case 1387: /* *addv8df3_mask */ |
| 31258 | case 1386: /* *addv8df3_round */ |
| 31259 | case 1385: /* *addv8df3 */ |
| 31260 | case 1384: /* *subv4sf3_mask_round */ |
| 31261 | case 1383: /* *subv4sf3_mask */ |
| 31262 | case 1382: /* *subv4sf3_round */ |
| 31263 | case 1381: /* *subv4sf3 */ |
| 31264 | case 1380: /* *addv4sf3_mask_round */ |
| 31265 | case 1379: /* *addv4sf3_mask */ |
| 31266 | case 1378: /* *addv4sf3_round */ |
| 31267 | case 1377: /* *addv4sf3 */ |
| 31268 | case 1376: /* *subv8sf3_mask_round */ |
| 31269 | case 1375: /* *subv8sf3_mask */ |
| 31270 | case 1374: /* *subv8sf3_round */ |
| 31271 | case 1373: /* *subv8sf3 */ |
| 31272 | case 1372: /* *addv8sf3_mask_round */ |
| 31273 | case 1371: /* *addv8sf3_mask */ |
| 31274 | case 1370: /* *addv8sf3_round */ |
| 31275 | case 1369: /* *addv8sf3 */ |
| 31276 | case 1368: /* *subv16sf3_mask_round */ |
| 31277 | case 1367: /* *subv16sf3_mask */ |
| 31278 | case 1366: /* *subv16sf3_round */ |
| 31279 | case 1365: /* *subv16sf3 */ |
| 31280 | case 1364: /* *addv16sf3_mask_round */ |
| 31281 | case 1363: /* *addv16sf3_mask */ |
| 31282 | case 1362: /* *addv16sf3_round */ |
| 31283 | case 1361: /* *addv16sf3 */ |
| 31284 | case 992: /* *ieee_smindf3 */ |
| 31285 | case 991: /* *ieee_smaxdf3 */ |
| 31286 | case 990: /* *ieee_sminsf3 */ |
| 31287 | case 989: /* *ieee_smaxsf3 */ |
| 31288 | case 988: /* smindf3 */ |
| 31289 | case 987: /* smaxdf3 */ |
| 31290 | case 986: /* sminsf3 */ |
| 31291 | case 985: /* smaxsf3 */ |
| 31292 | case 968: /* *strlenqi_1 */ |
| 31293 | case 967: /* *strlenqi_1 */ |
| 31294 | case 966: /* *cmpstrnqi_1 */ |
| 31295 | case 965: /* *cmpstrnqi_1 */ |
| 31296 | case 964: /* *cmpstrnqi_nz_1 */ |
| 31297 | case 963: /* *cmpstrnqi_nz_1 */ |
| 31298 | case 962: /* *rep_stosqi */ |
| 31299 | case 961: /* *rep_stosqi */ |
| 31300 | case 960: /* *rep_stossi */ |
| 31301 | case 959: /* *rep_stossi */ |
| 31302 | case 958: /* *rep_stosdi_rex64 */ |
| 31303 | case 957: /* *rep_stosdi_rex64 */ |
| 31304 | case 956: /* *strsetqi_1 */ |
| 31305 | case 955: /* *strsetqi_1 */ |
| 31306 | case 954: /* *strsethi_1 */ |
| 31307 | case 953: /* *strsethi_1 */ |
| 31308 | case 952: /* *strsetsi_1 */ |
| 31309 | case 951: /* *strsetsi_1 */ |
| 31310 | case 950: /* *strsetdi_rex_1 */ |
| 31311 | case 949: /* *strsetdi_rex_1 */ |
| 31312 | case 948: /* *rep_movqi */ |
| 31313 | case 947: /* *rep_movqi */ |
| 31314 | case 946: /* *rep_movsi */ |
| 31315 | case 945: /* *rep_movsi */ |
| 31316 | case 944: /* *rep_movdi_rex64 */ |
| 31317 | case 943: /* *rep_movdi_rex64 */ |
| 31318 | case 942: /* *strmovqi_1 */ |
| 31319 | case 941: /* *strmovqi_1 */ |
| 31320 | case 940: /* *strmovhi_1 */ |
| 31321 | case 939: /* *strmovhi_1 */ |
| 31322 | case 938: /* *strmovsi_1 */ |
| 31323 | case 937: /* *strmovsi_1 */ |
| 31324 | case 936: /* *strmovdi_rex_1 */ |
| 31325 | case 935: /* *strmovdi_rex_1 */ |
| 31326 | case 704: /* leave_rex64 */ |
| 31327 | case 703: /* leave */ |
| 31328 | case 366: /* *umulsi3_highpart_1 */ |
| 31329 | case 365: /* *smulsi3_highpart_1 */ |
| 31330 | case 364: /* *umulsi3_highpart_zext */ |
| 31331 | case 363: /* *smulsi3_highpart_zext */ |
| 31332 | case 357: /* *mulsidi3_1 */ |
| 31333 | case 349: /* *umulvsi4 */ |
| 31334 | case 346: /* *mulvsi4_1 */ |
| 31335 | case 342: /* *mulvsi4 */ |
| 31336 | case 340: /* *mulsi3_1_zext */ |
| 31337 | case 338: /* *mulsi3_1 */ |
| 31338 | return 3; |
| 31339 | |
| 31340 | case 3706: /* ssse3_pmaddubsw */ |
| 31341 | case 3695: /* ssse3_phsubdv2si3 */ |
| 31342 | case 3694: /* ssse3_phadddv2si3 */ |
| 31343 | case 3693: /* ssse3_phsubdv4si3 */ |
| 31344 | case 3692: /* ssse3_phadddv4si3 */ |
| 31345 | case 3689: /* ssse3_phsubswv4hi3 */ |
| 31346 | case 3688: /* ssse3_phsubwv4hi3 */ |
| 31347 | case 3687: /* ssse3_phaddswv4hi3 */ |
| 31348 | case 3686: /* ssse3_phaddwv4hi3 */ |
| 31349 | case 3685: /* ssse3_phsubswv8hi3 */ |
| 31350 | case 3684: /* ssse3_phsubwv8hi3 */ |
| 31351 | case 3683: /* ssse3_phaddswv8hi3 */ |
| 31352 | case 3682: /* ssse3_phaddwv8hi3 */ |
| 31353 | case 1620: /* sse3_hsubv4sf3 */ |
| 31354 | case 1619: /* sse3_haddv4sf3 */ |
| 31355 | case 1614: /* sse3_hsubv2df3 */ |
| 31356 | case 1613: /* *sse3_haddv2df3 */ |
| 31357 | case 1608: /* sse3_addsubv2df3 */ |
| 31358 | case 1598: /* ieee_minv2df3_mask */ |
| 31359 | case 1597: /* ieee_minv2df3 */ |
| 31360 | case 1596: /* ieee_maxv2df3_mask */ |
| 31361 | case 1595: /* ieee_maxv2df3 */ |
| 31362 | case 1566: /* *sminv2df3_mask_round */ |
| 31363 | case 1565: /* *sminv2df3_mask */ |
| 31364 | case 1564: /* *sminv2df3_round */ |
| 31365 | case 1563: /* *sminv2df3 */ |
| 31366 | case 1562: /* *smaxv2df3_mask_round */ |
| 31367 | case 1561: /* *smaxv2df3_mask */ |
| 31368 | case 1560: /* *smaxv2df3_round */ |
| 31369 | case 1559: /* *smaxv2df3 */ |
| 31370 | case 1467: /* sse_vmrcpv4sf2 */ |
| 31371 | case 1442: /* sse_vmmulv4sf3_round */ |
| 31372 | case 1441: /* sse_vmmulv4sf3 */ |
| 31373 | case 1408: /* *subv2df3_mask_round */ |
| 31374 | case 1407: /* *subv2df3_mask */ |
| 31375 | case 1406: /* *subv2df3_round */ |
| 31376 | case 1405: /* *subv2df3 */ |
| 31377 | case 1404: /* *addv2df3_mask_round */ |
| 31378 | case 1403: /* *addv2df3_mask */ |
| 31379 | case 1402: /* *addv2df3_round */ |
| 31380 | case 1401: /* *addv2df3 */ |
| 31381 | case 845: /* *rsqrtsf2_sse */ |
| 31382 | case 814: /* *rcpsf2_sse */ |
| 31383 | case 546: /* x86_shrd */ |
| 31384 | case 545: /* x86_64_shrd */ |
| 31385 | case 516: /* x86_shld */ |
| 31386 | case 515: /* x86_64_shld */ |
| 31387 | case 362: /* *umuldi3_highpart_1 */ |
| 31388 | case 361: /* *smuldi3_highpart_1 */ |
| 31389 | case 360: /* *umulqihi3_1 */ |
| 31390 | case 359: /* *mulqihi3_1 */ |
| 31391 | case 358: /* *mulditi3_1 */ |
| 31392 | case 352: /* *umulvqi4 */ |
| 31393 | case 351: /* *mulvqi4 */ |
| 31394 | case 350: /* *umulvdi4 */ |
| 31395 | case 348: /* *umulvhi4 */ |
| 31396 | case 347: /* *mulvdi4_1 */ |
| 31397 | case 345: /* *mulvhi4_1 */ |
| 31398 | case 344: /* *mulvhi4 */ |
| 31399 | case 343: /* *mulvdi4 */ |
| 31400 | case 341: /* *mulqi3_1 */ |
| 31401 | case 339: /* *muldi3_1 */ |
| 31402 | case 337: /* *mulhi3_1 */ |
| 31403 | return 4; |
| 31404 | |
| 31405 | case 163: /* *truncxfdf2_mixed */ |
| 31406 | case 162: /* *truncxfsf2_mixed */ |
| 31407 | case 160: /* *truncdfsf_i387 */ |
| 31408 | extract_constrain_insn_cached (insn); |
| 31409 | if (which_alternative != 0) |
| 31410 | { |
| 31411 | return 9; |
| 31412 | } |
| 31413 | else |
| 31414 | { |
| 31415 | return 1; |
| 31416 | } |
| 31417 | |
| 31418 | case 125: /* *movxf_internal */ |
| 31419 | extract_constrain_insn_cached (insn); |
| 31420 | if (((1 << which_alternative) & 0xff8)) |
| 31421 | { |
| 31422 | return 9; |
| 31423 | } |
| 31424 | else |
| 31425 | { |
| 31426 | return 1; |
| 31427 | } |
| 31428 | |
| 31429 | case 123: /* *pushsf */ |
| 31430 | case 122: /* *pushsf_rex64 */ |
| 31431 | extract_constrain_insn_cached (insn); |
| 31432 | if (which_alternative != 1) |
| 31433 | { |
| 31434 | return 9; |
| 31435 | } |
| 31436 | else |
| 31437 | { |
| 31438 | return 2; |
| 31439 | } |
| 31440 | |
| 31441 | case 979: /* *movqicc_noc */ |
| 31442 | case 978: /* *movsicc_noc_zext */ |
| 31443 | case 977: /* *movdicc_noc */ |
| 31444 | case 976: /* *movsicc_noc */ |
| 31445 | case 975: /* *movhicc_noc */ |
| 31446 | case 974: /* *x86_movdicc_0_m1_neg */ |
| 31447 | case 973: /* *x86_movsicc_0_m1_neg */ |
| 31448 | case 972: /* *x86_movdicc_0_m1_se */ |
| 31449 | case 971: /* *x86_movsicc_0_m1_se */ |
| 31450 | case 970: /* *x86_movdicc_0_m1 */ |
| 31451 | case 969: /* *x86_movsicc_0_m1 */ |
| 31452 | case 318: /* subborrowdi */ |
| 31453 | case 317: /* subborrowsi */ |
| 31454 | case 316: /* *subsi3_carry_zext_0 */ |
| 31455 | case 315: /* *subsi3_carry_zext */ |
| 31456 | case 314: /* *subdi3_carry_0 */ |
| 31457 | case 313: /* *subsi3_carry_0 */ |
| 31458 | case 312: /* *subhi3_carry_0 */ |
| 31459 | case 311: /* *subqi3_carry_0 */ |
| 31460 | case 310: /* subdi3_carry */ |
| 31461 | case 309: /* subsi3_carry */ |
| 31462 | case 308: /* subhi3_carry */ |
| 31463 | case 307: /* subqi3_carry */ |
| 31464 | case 306: /* addcarrydi */ |
| 31465 | case 305: /* addcarrysi */ |
| 31466 | case 304: /* *addsi3_carry_zext_0 */ |
| 31467 | case 303: /* *addsi3_carry_zext */ |
| 31468 | case 302: /* *adddi3_carry_0 */ |
| 31469 | case 301: /* *addsi3_carry_0 */ |
| 31470 | case 300: /* *addhi3_carry_0 */ |
| 31471 | case 299: /* *addqi3_carry_0 */ |
| 31472 | case 298: /* adddi3_carry */ |
| 31473 | case 297: /* addsi3_carry */ |
| 31474 | case 296: /* addhi3_carry */ |
| 31475 | case 295: /* addqi3_carry */ |
| 31476 | case 72: /* *popflsi1 */ |
| 31477 | case 71: /* *pushfldi2 */ |
| 31478 | case 70: /* *pushflsi2 */ |
| 31479 | case 68: /* *popsi1_epilogue */ |
| 31480 | case 66: /* *popsi1 */ |
| 31481 | case 65: /* *pushdi2_prologue */ |
| 31482 | case 64: /* *pushsi2_prologue */ |
| 31483 | case 63: /* *pushhi2 */ |
| 31484 | case 62: /* *pushqi2 */ |
| 31485 | case 61: /* *pushsi2_rex64 */ |
| 31486 | case 60: /* *pushhi2_rex64 */ |
| 31487 | case 59: /* *pushqi2_rex64 */ |
| 31488 | case 58: /* *pushsi2 */ |
| 31489 | return 2; |
| 31490 | |
| 31491 | case 57: /* *pushdi2_rex64 */ |
| 31492 | extract_constrain_insn_cached (insn); |
| 31493 | if (which_alternative != 0) |
| 31494 | { |
| 31495 | return 9; |
| 31496 | } |
| 31497 | else |
| 31498 | { |
| 31499 | return 2; |
| 31500 | } |
| 31501 | |
| 31502 | case 4919: /* avx5124vnniw_vp4dpwssds_maskz */ |
| 31503 | case 4918: /* avx5124vnniw_vp4dpwssds_mask */ |
| 31504 | case 4917: /* avx5124vnniw_vp4dpwssds */ |
| 31505 | case 4916: /* avx5124vnniw_vp4dpwssd_maskz */ |
| 31506 | case 4915: /* avx5124vnniw_vp4dpwssd_mask */ |
| 31507 | case 4914: /* avx5124vnniw_vp4dpwssd */ |
| 31508 | case 4913: /* avx5124fmaddps_4fnmaddss_maskz */ |
| 31509 | case 4912: /* avx5124fmaddps_4fnmaddss_mask */ |
| 31510 | case 4911: /* avx5124fmaddps_4fnmaddss */ |
| 31511 | case 4910: /* avx5124fmaddps_4fnmaddps_maskz */ |
| 31512 | case 4909: /* avx5124fmaddps_4fnmaddps_mask */ |
| 31513 | case 4908: /* avx5124fmaddps_4fnmaddps */ |
| 31514 | case 4907: /* avx5124fmaddps_4fmaddss_maskz */ |
| 31515 | case 4906: /* avx5124fmaddps_4fmaddss_mask */ |
| 31516 | case 4905: /* avx5124fmaddps_4fmaddss */ |
| 31517 | case 4904: /* avx5124fmaddps_4fmaddps_maskz */ |
| 31518 | case 4903: /* avx5124fmaddps_4fmaddps_mask */ |
| 31519 | case 4902: /* avx5124fmaddps_4fmaddps */ |
| 31520 | case 4893: /* vpamdd52huqv2di_mask */ |
| 31521 | case 4892: /* vpamdd52luqv2di_mask */ |
| 31522 | case 4891: /* vpamdd52huqv4di_mask */ |
| 31523 | case 4890: /* vpamdd52luqv4di_mask */ |
| 31524 | case 4889: /* vpamdd52huqv8di_mask */ |
| 31525 | case 4888: /* vpamdd52luqv8di_mask */ |
| 31526 | case 4887: /* vpamdd52huqv2di_maskz_1 */ |
| 31527 | case 4886: /* vpamdd52huqv2di */ |
| 31528 | case 4885: /* vpamdd52luqv2di_maskz_1 */ |
| 31529 | case 4884: /* vpamdd52luqv2di */ |
| 31530 | case 4883: /* vpamdd52huqv4di_maskz_1 */ |
| 31531 | case 4882: /* vpamdd52huqv4di */ |
| 31532 | case 4881: /* vpamdd52luqv4di_maskz_1 */ |
| 31533 | case 4880: /* vpamdd52luqv4di */ |
| 31534 | case 4879: /* vpamdd52huqv8di_maskz_1 */ |
| 31535 | case 4878: /* vpamdd52huqv8di */ |
| 31536 | case 4877: /* vpamdd52luqv8di_maskz_1 */ |
| 31537 | case 4876: /* vpamdd52luqv8di */ |
| 31538 | case 4862: /* conflictv2di_mask */ |
| 31539 | case 4861: /* *conflictv2di */ |
| 31540 | case 4860: /* conflictv4di_mask */ |
| 31541 | case 4859: /* *conflictv4di */ |
| 31542 | case 4858: /* conflictv8di_mask */ |
| 31543 | case 4857: /* *conflictv8di */ |
| 31544 | case 4856: /* conflictv4si_mask */ |
| 31545 | case 4855: /* *conflictv4si */ |
| 31546 | case 4854: /* conflictv8si_mask */ |
| 31547 | case 4853: /* *conflictv8si */ |
| 31548 | case 4852: /* conflictv16si_mask */ |
| 31549 | case 4851: /* *conflictv16si */ |
| 31550 | case 4850: /* clzv2di2_mask */ |
| 31551 | case 4849: /* clzv2di2 */ |
| 31552 | case 4848: /* clzv4di2_mask */ |
| 31553 | case 4847: /* clzv4di2 */ |
| 31554 | case 4846: /* clzv8di2_mask */ |
| 31555 | case 4845: /* clzv8di2 */ |
| 31556 | case 4844: /* clzv4si2_mask */ |
| 31557 | case 4843: /* clzv4si2 */ |
| 31558 | case 4842: /* clzv8si2_mask */ |
| 31559 | case 4841: /* clzv8si2 */ |
| 31560 | case 4840: /* clzv16si2_mask */ |
| 31561 | case 4839: /* clzv16si2 */ |
| 31562 | case 4804: /* avx512dq_vmfpclassv2df */ |
| 31563 | case 4803: /* avx512dq_vmfpclassv4sf */ |
| 31564 | case 4802: /* avx512dq_fpclassv2df_mask */ |
| 31565 | case 4801: /* avx512dq_fpclassv2df */ |
| 31566 | case 4800: /* avx512dq_fpclassv4df_mask */ |
| 31567 | case 4799: /* avx512dq_fpclassv4df */ |
| 31568 | case 4798: /* avx512dq_fpclassv8df_mask */ |
| 31569 | case 4797: /* avx512dq_fpclassv8df */ |
| 31570 | case 4796: /* avx512dq_fpclassv4sf_mask */ |
| 31571 | case 4795: /* avx512dq_fpclassv4sf */ |
| 31572 | case 4794: /* avx512dq_fpclassv8sf_mask */ |
| 31573 | case 4793: /* avx512dq_fpclassv8sf */ |
| 31574 | case 4792: /* avx512dq_fpclassv16sf_mask */ |
| 31575 | case 4791: /* avx512dq_fpclassv16sf */ |
| 31576 | case 4790: /* avx512dq_rangesv2df_round */ |
| 31577 | case 4789: /* avx512dq_rangesv2df */ |
| 31578 | case 4788: /* avx512dq_rangesv4sf_round */ |
| 31579 | case 4787: /* avx512dq_rangesv4sf */ |
| 31580 | case 4786: /* avx512dq_rangepv2df_mask */ |
| 31581 | case 4785: /* avx512dq_rangepv2df */ |
| 31582 | case 4784: /* avx512dq_rangepv4df_mask */ |
| 31583 | case 4783: /* avx512dq_rangepv4df */ |
| 31584 | case 4782: /* avx512dq_rangepv8df_mask_round */ |
| 31585 | case 4781: /* avx512dq_rangepv8df_mask */ |
| 31586 | case 4780: /* avx512dq_rangepv8df_round */ |
| 31587 | case 4779: /* avx512dq_rangepv8df */ |
| 31588 | case 4778: /* avx512dq_rangepv4sf_mask */ |
| 31589 | case 4777: /* avx512dq_rangepv4sf */ |
| 31590 | case 4776: /* avx512dq_rangepv8sf_mask */ |
| 31591 | case 4775: /* avx512dq_rangepv8sf */ |
| 31592 | case 4774: /* avx512dq_rangepv16sf_mask_round */ |
| 31593 | case 4773: /* avx512dq_rangepv16sf_mask */ |
| 31594 | case 4772: /* avx512dq_rangepv16sf_round */ |
| 31595 | case 4771: /* avx512dq_rangepv16sf */ |
| 31596 | case 4249: /* avx512cd_maskw_vec_dupv4si */ |
| 31597 | case 4248: /* avx512cd_maskw_vec_dupv8si */ |
| 31598 | case 4247: /* avx512cd_maskw_vec_dupv16si */ |
| 31599 | case 4246: /* avx512cd_maskb_vec_dupv2di */ |
| 31600 | case 4245: /* avx512cd_maskb_vec_dupv4di */ |
| 31601 | case 4244: /* avx512cd_maskb_vec_dupv8di */ |
| 31602 | case 4056: /* avx_vzeroupper */ |
| 31603 | case 4055: /* *avx_vzeroall */ |
| 31604 | case 4047: /* xop_vpermil2v2df3 */ |
| 31605 | case 4046: /* xop_vpermil2v4df3 */ |
| 31606 | case 4045: /* xop_vpermil2v4sf3 */ |
| 31607 | case 4044: /* xop_vpermil2v8sf3 */ |
| 31608 | case 4031: /* xop_maskcmpv2di3 */ |
| 31609 | case 4030: /* xop_maskcmpv4si3 */ |
| 31610 | case 4029: /* xop_maskcmpv8hi3 */ |
| 31611 | case 4028: /* xop_maskcmpv16qi3 */ |
| 31612 | case 4027: /* *xop_vmfrczv2df2 */ |
| 31613 | case 4026: /* *xop_vmfrczv4sf2 */ |
| 31614 | case 4025: /* xop_frczv4df2 */ |
| 31615 | case 4024: /* xop_frczv8sf2 */ |
| 31616 | case 4023: /* xop_frczv2df2 */ |
| 31617 | case 4022: /* xop_frczv4sf2 */ |
| 31618 | case 4021: /* xop_frczdf2 */ |
| 31619 | case 4020: /* xop_frczsf2 */ |
| 31620 | case 3999: /* xop_pperm_pack_v8hi_v16qi */ |
| 31621 | case 3998: /* xop_pperm_pack_v4si_v8hi */ |
| 31622 | case 3997: /* xop_pperm_pack_v2di_v4si */ |
| 31623 | case 3996: /* xop_pperm */ |
| 31624 | case 3995: /* xop_phsubdq */ |
| 31625 | case 3994: /* xop_phsubwd */ |
| 31626 | case 3993: /* xop_phsubbw */ |
| 31627 | case 3992: /* xop_phaddudq */ |
| 31628 | case 3991: /* xop_phadddq */ |
| 31629 | case 3990: /* xop_phadduwq */ |
| 31630 | case 3989: /* xop_phaddwq */ |
| 31631 | case 3988: /* xop_phadduwd */ |
| 31632 | case 3987: /* xop_phaddwd */ |
| 31633 | case 3986: /* xop_phaddubq */ |
| 31634 | case 3985: /* xop_phaddbq */ |
| 31635 | case 3984: /* xop_phaddubd */ |
| 31636 | case 3983: /* xop_phaddbd */ |
| 31637 | case 3982: /* xop_phaddubw */ |
| 31638 | case 3981: /* xop_phaddbw */ |
| 31639 | case 3980: /* xop_pcmov_v2df */ |
| 31640 | case 3979: /* xop_pcmov_v4df256 */ |
| 31641 | case 3978: /* xop_pcmov_v8df512 */ |
| 31642 | case 3977: /* xop_pcmov_v4sf */ |
| 31643 | case 3976: /* xop_pcmov_v8sf256 */ |
| 31644 | case 3975: /* xop_pcmov_v16sf512 */ |
| 31645 | case 3974: /* xop_pcmov_v2di */ |
| 31646 | case 3973: /* xop_pcmov_v4di256 */ |
| 31647 | case 3972: /* xop_pcmov_v8di512 */ |
| 31648 | case 3971: /* xop_pcmov_v4si */ |
| 31649 | case 3970: /* xop_pcmov_v8si256 */ |
| 31650 | case 3969: /* xop_pcmov_v16si512 */ |
| 31651 | case 3968: /* xop_pcmov_v8hi */ |
| 31652 | case 3967: /* xop_pcmov_v16hi256 */ |
| 31653 | case 3966: /* xop_pcmov_v16qi */ |
| 31654 | case 3965: /* xop_pcmov_v32qi256 */ |
| 31655 | case 3964: /* xop_pmadcsswd */ |
| 31656 | case 3963: /* xop_pmadcswd */ |
| 31657 | case 3962: /* xop_pmacsswd */ |
| 31658 | case 3961: /* xop_pmacswd */ |
| 31659 | case 3960: /* xop_pmacssdqh */ |
| 31660 | case 3959: /* xop_pmacsdqh */ |
| 31661 | case 3958: /* xop_pmacssdql */ |
| 31662 | case 3957: /* xop_pmacsdql */ |
| 31663 | case 3956: /* xop_pmacssdd */ |
| 31664 | case 3955: /* xop_pmacsdd */ |
| 31665 | case 3954: /* xop_pmacssww */ |
| 31666 | case 3953: /* xop_pmacsww */ |
| 31667 | case 3952: /* avx512er_vmrsqrt28v2df_round */ |
| 31668 | case 3951: /* avx512er_vmrsqrt28v2df */ |
| 31669 | case 3950: /* avx512er_vmrsqrt28v4sf_round */ |
| 31670 | case 3949: /* avx512er_vmrsqrt28v4sf */ |
| 31671 | case 3948: /* avx512er_rsqrt28v8df_mask_round */ |
| 31672 | case 3947: /* avx512er_rsqrt28v8df_mask */ |
| 31673 | case 3946: /* *avx512er_rsqrt28v8df_round */ |
| 31674 | case 3945: /* *avx512er_rsqrt28v8df */ |
| 31675 | case 3944: /* avx512er_rsqrt28v16sf_mask_round */ |
| 31676 | case 3943: /* avx512er_rsqrt28v16sf_mask */ |
| 31677 | case 3942: /* *avx512er_rsqrt28v16sf_round */ |
| 31678 | case 3941: /* *avx512er_rsqrt28v16sf */ |
| 31679 | case 3940: /* avx512er_vmrcp28v2df_round */ |
| 31680 | case 3939: /* avx512er_vmrcp28v2df */ |
| 31681 | case 3938: /* avx512er_vmrcp28v4sf_round */ |
| 31682 | case 3937: /* avx512er_vmrcp28v4sf */ |
| 31683 | case 3936: /* avx512er_rcp28v8df_mask_round */ |
| 31684 | case 3935: /* avx512er_rcp28v8df_mask */ |
| 31685 | case 3934: /* *avx512er_rcp28v8df_round */ |
| 31686 | case 3933: /* *avx512er_rcp28v8df */ |
| 31687 | case 3932: /* avx512er_rcp28v16sf_mask_round */ |
| 31688 | case 3931: /* avx512er_rcp28v16sf_mask */ |
| 31689 | case 3930: /* *avx512er_rcp28v16sf_round */ |
| 31690 | case 3929: /* *avx512er_rcp28v16sf */ |
| 31691 | case 3928: /* avx512er_exp2v8df_mask_round */ |
| 31692 | case 3927: /* avx512er_exp2v8df_mask */ |
| 31693 | case 3926: /* avx512er_exp2v8df_round */ |
| 31694 | case 3925: /* avx512er_exp2v8df */ |
| 31695 | case 3924: /* avx512er_exp2v16sf_mask_round */ |
| 31696 | case 3923: /* avx512er_exp2v16sf_mask */ |
| 31697 | case 3922: /* avx512er_exp2v16sf_round */ |
| 31698 | case 3921: /* avx512er_exp2v16sf */ |
| 31699 | case 3920: /* *avx512pf_scatterpfv8didf_mask */ |
| 31700 | case 3919: /* *avx512pf_scatterpfv8didf_mask */ |
| 31701 | case 3918: /* *avx512pf_scatterpfv8sidf_mask */ |
| 31702 | case 3917: /* *avx512pf_scatterpfv8sidf_mask */ |
| 31703 | case 3916: /* *avx512pf_scatterpfv8disf_mask */ |
| 31704 | case 3915: /* *avx512pf_scatterpfv8disf_mask */ |
| 31705 | case 3914: /* *avx512pf_scatterpfv16sisf_mask */ |
| 31706 | case 3913: /* *avx512pf_scatterpfv16sisf_mask */ |
| 31707 | case 3912: /* *avx512pf_gatherpfv8didf_mask */ |
| 31708 | case 3911: /* *avx512pf_gatherpfv8didf_mask */ |
| 31709 | case 3910: /* *avx512pf_gatherpfv8sidf_mask */ |
| 31710 | case 3909: /* *avx512pf_gatherpfv8sidf_mask */ |
| 31711 | case 3908: /* *avx512pf_gatherpfv8disf_mask */ |
| 31712 | case 3907: /* *avx512pf_gatherpfv8disf_mask */ |
| 31713 | case 3906: /* *avx512pf_gatherpfv16sisf_mask */ |
| 31714 | case 3905: /* *avx512pf_gatherpfv16sisf_mask */ |
| 31715 | case 3771: /* sse4a_insertq */ |
| 31716 | case 3770: /* sse4a_insertqi */ |
| 31717 | case 3769: /* sse4a_extrq */ |
| 31718 | case 3768: /* sse4a_extrqi */ |
| 31719 | case 2725: /* sse2_shufpd_v2df */ |
| 31720 | case 2724: /* sse2_shufpd_v2di */ |
| 31721 | case 2711: /* sse2_shufpd_v2df_mask */ |
| 31722 | case 2710: /* avx_shufpd256_1_mask */ |
| 31723 | case 2709: /* avx_shufpd256_1 */ |
| 31724 | case 2448: /* sse_shufps_v4sf */ |
| 31725 | case 2447: /* sse_shufps_v4si */ |
| 31726 | case 2446: /* sse_shufps_v4sf_mask */ |
| 31727 | case 2445: /* avx_shufps256_1_mask */ |
| 31728 | case 2444: /* avx_shufps256_1 */ |
| 31729 | case 2443: /* avx512f_movsldup512_mask */ |
| 31730 | case 2442: /* *avx512f_movsldup512 */ |
| 31731 | case 2441: /* sse3_movsldup_mask */ |
| 31732 | case 2440: /* sse3_movsldup */ |
| 31733 | case 2439: /* avx_movsldup256_mask */ |
| 31734 | case 2438: /* avx_movsldup256 */ |
| 31735 | case 2437: /* avx512f_movshdup512_mask */ |
| 31736 | case 2436: /* *avx512f_movshdup512 */ |
| 31737 | case 2435: /* sse3_movshdup_mask */ |
| 31738 | case 2434: /* sse3_movshdup */ |
| 31739 | case 2433: /* avx_movshdup256_mask */ |
| 31740 | case 2432: /* avx_movshdup256 */ |
| 31741 | case 2102: /* *fma4i_vmfnmsub_v2df */ |
| 31742 | case 2101: /* *fma4i_vmfnmsub_v4sf */ |
| 31743 | case 2100: /* *fma4i_vmfnmadd_v2df */ |
| 31744 | case 2099: /* *fma4i_vmfnmadd_v4sf */ |
| 31745 | case 2098: /* *fma4i_vmfmsub_v2df */ |
| 31746 | case 2097: /* *fma4i_vmfmsub_v4sf */ |
| 31747 | case 2096: /* *fma4i_vmfmadd_v2df */ |
| 31748 | case 2095: /* *fma4i_vmfmadd_v4sf */ |
| 31749 | case 2094: /* *fmai_fnmsub_v2df_round */ |
| 31750 | case 2093: /* *fmai_fnmsub_v2df */ |
| 31751 | case 2092: /* *fmai_fnmsub_v4sf_round */ |
| 31752 | case 2091: /* *fmai_fnmsub_v4sf */ |
| 31753 | case 2090: /* *fmai_fnmadd_v2df_round */ |
| 31754 | case 2089: /* *fmai_fnmadd_v2df */ |
| 31755 | case 2088: /* *fmai_fnmadd_v4sf_round */ |
| 31756 | case 2087: /* *fmai_fnmadd_v4sf */ |
| 31757 | case 2086: /* *fmai_fmsub_v2df */ |
| 31758 | case 2085: /* *fmai_fmsub_v2df */ |
| 31759 | case 2084: /* *fmai_fmsub_v4sf */ |
| 31760 | case 2083: /* *fmai_fmsub_v4sf */ |
| 31761 | case 2082: /* *fmai_fmadd_v2df */ |
| 31762 | case 2081: /* *fmai_fmadd_v2df */ |
| 31763 | case 2080: /* *fmai_fmadd_v4sf */ |
| 31764 | case 2079: /* *fmai_fmadd_v4sf */ |
| 31765 | case 2078: /* avx512vl_fmsubadd_v2df_mask3_round */ |
| 31766 | case 2077: /* avx512vl_fmsubadd_v2df_mask3 */ |
| 31767 | case 2076: /* avx512vl_fmsubadd_v4df_mask3_round */ |
| 31768 | case 2075: /* avx512vl_fmsubadd_v4df_mask3 */ |
| 31769 | case 2074: /* avx512f_fmsubadd_v8df_mask3_round */ |
| 31770 | case 2073: /* avx512f_fmsubadd_v8df_mask3 */ |
| 31771 | case 2072: /* avx512vl_fmsubadd_v4sf_mask3_round */ |
| 31772 | case 2071: /* avx512vl_fmsubadd_v4sf_mask3 */ |
| 31773 | case 2070: /* avx512vl_fmsubadd_v8sf_mask3_round */ |
| 31774 | case 2069: /* avx512vl_fmsubadd_v8sf_mask3 */ |
| 31775 | case 2068: /* avx512f_fmsubadd_v16sf_mask3_round */ |
| 31776 | case 2067: /* avx512f_fmsubadd_v16sf_mask3 */ |
| 31777 | case 2066: /* avx512vl_fmsubadd_v2df_mask_round */ |
| 31778 | case 2065: /* avx512vl_fmsubadd_v2df_mask */ |
| 31779 | case 2064: /* avx512vl_fmsubadd_v4df_mask_round */ |
| 31780 | case 2063: /* avx512vl_fmsubadd_v4df_mask */ |
| 31781 | case 2062: /* avx512f_fmsubadd_v8df_mask_round */ |
| 31782 | case 2061: /* avx512f_fmsubadd_v8df_mask */ |
| 31783 | case 2060: /* avx512vl_fmsubadd_v4sf_mask_round */ |
| 31784 | case 2059: /* avx512vl_fmsubadd_v4sf_mask */ |
| 31785 | case 2058: /* avx512vl_fmsubadd_v8sf_mask_round */ |
| 31786 | case 2057: /* avx512vl_fmsubadd_v8sf_mask */ |
| 31787 | case 2056: /* avx512f_fmsubadd_v16sf_mask_round */ |
| 31788 | case 2055: /* avx512f_fmsubadd_v16sf_mask */ |
| 31789 | case 2054: /* fma_fmsubadd_v2df_maskz_1 */ |
| 31790 | case 2053: /* *fma_fmsubadd_v2df */ |
| 31791 | case 2052: /* fma_fmsubadd_v4df_maskz_1 */ |
| 31792 | case 2051: /* *fma_fmsubadd_v4df */ |
| 31793 | case 2050: /* fma_fmsubadd_v8df_maskz_1_round */ |
| 31794 | case 2049: /* fma_fmsubadd_v8df_maskz_1 */ |
| 31795 | case 2048: /* *fma_fmsubadd_v8df_round */ |
| 31796 | case 2047: /* *fma_fmsubadd_v8df */ |
| 31797 | case 2046: /* *fma_fmsubadd_df */ |
| 31798 | case 2045: /* fma_fmsubadd_v4sf_maskz_1 */ |
| 31799 | case 2044: /* *fma_fmsubadd_v4sf */ |
| 31800 | case 2043: /* fma_fmsubadd_v8sf_maskz_1 */ |
| 31801 | case 2042: /* *fma_fmsubadd_v8sf */ |
| 31802 | case 2041: /* fma_fmsubadd_v16sf_maskz_1_round */ |
| 31803 | case 2040: /* fma_fmsubadd_v16sf_maskz_1 */ |
| 31804 | case 2039: /* *fma_fmsubadd_v16sf_round */ |
| 31805 | case 2038: /* *fma_fmsubadd_v16sf */ |
| 31806 | case 2037: /* *fma_fmsubadd_sf */ |
| 31807 | case 2036: /* *fma_fmsubadd_v2df */ |
| 31808 | case 2035: /* *fma_fmsubadd_v4df */ |
| 31809 | case 2034: /* *fma_fmsubadd_v4sf */ |
| 31810 | case 2033: /* *fma_fmsubadd_v8sf */ |
| 31811 | case 2032: /* avx512vl_fmaddsub_v2df_mask3_round */ |
| 31812 | case 2031: /* avx512vl_fmaddsub_v2df_mask3 */ |
| 31813 | case 2030: /* avx512vl_fmaddsub_v4df_mask3_round */ |
| 31814 | case 2029: /* avx512vl_fmaddsub_v4df_mask3 */ |
| 31815 | case 2028: /* avx512f_fmaddsub_v8df_mask3_round */ |
| 31816 | case 2027: /* avx512f_fmaddsub_v8df_mask3 */ |
| 31817 | case 2026: /* avx512vl_fmaddsub_v4sf_mask3_round */ |
| 31818 | case 2025: /* avx512vl_fmaddsub_v4sf_mask3 */ |
| 31819 | case 2024: /* avx512vl_fmaddsub_v8sf_mask3_round */ |
| 31820 | case 2023: /* avx512vl_fmaddsub_v8sf_mask3 */ |
| 31821 | case 2022: /* avx512f_fmaddsub_v16sf_mask3_round */ |
| 31822 | case 2021: /* avx512f_fmaddsub_v16sf_mask3 */ |
| 31823 | case 2020: /* avx512vl_fmaddsub_v2df_mask_round */ |
| 31824 | case 2019: /* avx512vl_fmaddsub_v2df_mask */ |
| 31825 | case 2018: /* avx512vl_fmaddsub_v4df_mask_round */ |
| 31826 | case 2017: /* avx512vl_fmaddsub_v4df_mask */ |
| 31827 | case 2016: /* avx512f_fmaddsub_v8df_mask_round */ |
| 31828 | case 2015: /* avx512f_fmaddsub_v8df_mask */ |
| 31829 | case 2014: /* avx512vl_fmaddsub_v4sf_mask_round */ |
| 31830 | case 2013: /* avx512vl_fmaddsub_v4sf_mask */ |
| 31831 | case 2012: /* avx512vl_fmaddsub_v8sf_mask_round */ |
| 31832 | case 2011: /* avx512vl_fmaddsub_v8sf_mask */ |
| 31833 | case 2010: /* avx512f_fmaddsub_v16sf_mask_round */ |
| 31834 | case 2009: /* avx512f_fmaddsub_v16sf_mask */ |
| 31835 | case 2008: /* fma_fmaddsub_v2df_maskz_1 */ |
| 31836 | case 2007: /* *fma_fmaddsub_v2df */ |
| 31837 | case 2006: /* fma_fmaddsub_v4df_maskz_1 */ |
| 31838 | case 2005: /* *fma_fmaddsub_v4df */ |
| 31839 | case 2004: /* fma_fmaddsub_v8df_maskz_1_round */ |
| 31840 | case 2003: /* fma_fmaddsub_v8df_maskz_1 */ |
| 31841 | case 2002: /* *fma_fmaddsub_v8df_round */ |
| 31842 | case 2001: /* *fma_fmaddsub_v8df */ |
| 31843 | case 2000: /* *fma_fmaddsub_df */ |
| 31844 | case 1999: /* fma_fmaddsub_v4sf_maskz_1 */ |
| 31845 | case 1998: /* *fma_fmaddsub_v4sf */ |
| 31846 | case 1997: /* fma_fmaddsub_v8sf_maskz_1 */ |
| 31847 | case 1996: /* *fma_fmaddsub_v8sf */ |
| 31848 | case 1995: /* fma_fmaddsub_v16sf_maskz_1_round */ |
| 31849 | case 1994: /* fma_fmaddsub_v16sf_maskz_1 */ |
| 31850 | case 1993: /* *fma_fmaddsub_v16sf_round */ |
| 31851 | case 1992: /* *fma_fmaddsub_v16sf */ |
| 31852 | case 1991: /* *fma_fmaddsub_sf */ |
| 31853 | case 1990: /* *fma_fmaddsub_v2df */ |
| 31854 | case 1989: /* *fma_fmaddsub_v4df */ |
| 31855 | case 1988: /* *fma_fmaddsub_v4sf */ |
| 31856 | case 1987: /* *fma_fmaddsub_v8sf */ |
| 31857 | case 1986: /* avx512vl_fnmsub_v2df_mask3_round */ |
| 31858 | case 1985: /* avx512vl_fnmsub_v2df_mask3 */ |
| 31859 | case 1984: /* avx512vl_fnmsub_v4df_mask3_round */ |
| 31860 | case 1983: /* avx512vl_fnmsub_v4df_mask3 */ |
| 31861 | case 1982: /* avx512f_fnmsub_v8df_mask3_round */ |
| 31862 | case 1981: /* avx512f_fnmsub_v8df_mask3 */ |
| 31863 | case 1980: /* avx512vl_fnmsub_v4sf_mask3_round */ |
| 31864 | case 1979: /* avx512vl_fnmsub_v4sf_mask3 */ |
| 31865 | case 1978: /* avx512vl_fnmsub_v8sf_mask3_round */ |
| 31866 | case 1977: /* avx512vl_fnmsub_v8sf_mask3 */ |
| 31867 | case 1976: /* avx512f_fnmsub_v16sf_mask3_round */ |
| 31868 | case 1975: /* avx512f_fnmsub_v16sf_mask3 */ |
| 31869 | case 1974: /* avx512vl_fnmsub_v2df_mask */ |
| 31870 | case 1973: /* avx512vl_fnmsub_v4df_mask */ |
| 31871 | case 1972: /* avx512f_fnmsub_v8df_mask_round */ |
| 31872 | case 1971: /* avx512f_fnmsub_v8df_mask */ |
| 31873 | case 1970: /* avx512vl_fnmsub_v4sf_mask */ |
| 31874 | case 1969: /* avx512vl_fnmsub_v8sf_mask */ |
| 31875 | case 1968: /* avx512f_fnmsub_v16sf_mask_round */ |
| 31876 | case 1967: /* avx512f_fnmsub_v16sf_mask */ |
| 31877 | case 1966: /* fma_fnmsub_v2df_maskz_1 */ |
| 31878 | case 1965: /* *fma_fnmsub_v2df */ |
| 31879 | case 1964: /* fma_fnmsub_v4df_maskz_1 */ |
| 31880 | case 1963: /* *fma_fnmsub_v4df */ |
| 31881 | case 1962: /* fma_fnmsub_v8df_maskz_1_round */ |
| 31882 | case 1961: /* fma_fnmsub_v8df_maskz_1 */ |
| 31883 | case 1960: /* *fma_fnmsub_v8df_round */ |
| 31884 | case 1959: /* *fma_fnmsub_v8df */ |
| 31885 | case 1958: /* *fma_fnmsub_df */ |
| 31886 | case 1957: /* fma_fnmsub_v4sf_maskz_1 */ |
| 31887 | case 1956: /* *fma_fnmsub_v4sf */ |
| 31888 | case 1955: /* fma_fnmsub_v8sf_maskz_1 */ |
| 31889 | case 1954: /* *fma_fnmsub_v8sf */ |
| 31890 | case 1953: /* fma_fnmsub_v16sf_maskz_1_round */ |
| 31891 | case 1952: /* fma_fnmsub_v16sf_maskz_1 */ |
| 31892 | case 1951: /* *fma_fnmsub_v16sf_round */ |
| 31893 | case 1950: /* *fma_fnmsub_v16sf */ |
| 31894 | case 1949: /* *fma_fnmsub_sf */ |
| 31895 | case 1948: /* *fma_fnmsub_v4df */ |
| 31896 | case 1947: /* *fma_fnmsub_v4df */ |
| 31897 | case 1946: /* *fma_fnmsub_v4df */ |
| 31898 | case 1945: /* *fma_fnmsub_v4df */ |
| 31899 | case 1944: /* *fma_fnmsub_v8sf */ |
| 31900 | case 1943: /* *fma_fnmsub_v8sf */ |
| 31901 | case 1942: /* *fma_fnmsub_v8sf */ |
| 31902 | case 1941: /* *fma_fnmsub_v8sf */ |
| 31903 | case 1940: /* *fma_fnmsub_v2df */ |
| 31904 | case 1939: /* *fma_fnmsub_v2df */ |
| 31905 | case 1938: /* *fma_fnmsub_v2df */ |
| 31906 | case 1937: /* *fma_fnmsub_v2df */ |
| 31907 | case 1936: /* *fma_fnmsub_v4sf */ |
| 31908 | case 1935: /* *fma_fnmsub_v4sf */ |
| 31909 | case 1934: /* *fma_fnmsub_v4sf */ |
| 31910 | case 1933: /* *fma_fnmsub_v4sf */ |
| 31911 | case 1932: /* *fma_fnmsub_df */ |
| 31912 | case 1931: /* *fma_fnmsub_df */ |
| 31913 | case 1930: /* *fma_fnmsub_sf */ |
| 31914 | case 1929: /* *fma_fnmsub_sf */ |
| 31915 | case 1928: /* avx512vl_fnmadd_v2df_mask3 */ |
| 31916 | case 1927: /* avx512vl_fnmadd_v4df_mask3 */ |
| 31917 | case 1926: /* avx512f_fnmadd_v8df_mask3_round */ |
| 31918 | case 1925: /* avx512f_fnmadd_v8df_mask3 */ |
| 31919 | case 1924: /* avx512vl_fnmadd_v4sf_mask3 */ |
| 31920 | case 1923: /* avx512vl_fnmadd_v8sf_mask3 */ |
| 31921 | case 1922: /* avx512f_fnmadd_v16sf_mask3_round */ |
| 31922 | case 1921: /* avx512f_fnmadd_v16sf_mask3 */ |
| 31923 | case 1920: /* avx512vl_fnmadd_v2df_mask */ |
| 31924 | case 1919: /* avx512vl_fnmadd_v4df_mask */ |
| 31925 | case 1918: /* avx512f_fnmadd_v8df_mask_round */ |
| 31926 | case 1917: /* avx512f_fnmadd_v8df_mask */ |
| 31927 | case 1916: /* avx512vl_fnmadd_v4sf_mask */ |
| 31928 | case 1915: /* avx512vl_fnmadd_v8sf_mask */ |
| 31929 | case 1914: /* avx512f_fnmadd_v16sf_mask_round */ |
| 31930 | case 1913: /* avx512f_fnmadd_v16sf_mask */ |
| 31931 | case 1912: /* fma_fnmadd_v2df_maskz_1 */ |
| 31932 | case 1911: /* *fma_fnmadd_v2df */ |
| 31933 | case 1910: /* fma_fnmadd_v4df_maskz_1 */ |
| 31934 | case 1909: /* *fma_fnmadd_v4df */ |
| 31935 | case 1908: /* fma_fnmadd_v8df_maskz_1_round */ |
| 31936 | case 1907: /* fma_fnmadd_v8df_maskz_1 */ |
| 31937 | case 1906: /* *fma_fnmadd_v8df_round */ |
| 31938 | case 1905: /* *fma_fnmadd_v8df */ |
| 31939 | case 1904: /* *fma_fnmadd_df */ |
| 31940 | case 1903: /* fma_fnmadd_v4sf_maskz_1 */ |
| 31941 | case 1902: /* *fma_fnmadd_v4sf */ |
| 31942 | case 1901: /* fma_fnmadd_v8sf_maskz_1 */ |
| 31943 | case 1900: /* *fma_fnmadd_v8sf */ |
| 31944 | case 1899: /* fma_fnmadd_v16sf_maskz_1_round */ |
| 31945 | case 1898: /* fma_fnmadd_v16sf_maskz_1 */ |
| 31946 | case 1897: /* *fma_fnmadd_v16sf_round */ |
| 31947 | case 1896: /* *fma_fnmadd_v16sf */ |
| 31948 | case 1895: /* *fma_fnmadd_sf */ |
| 31949 | case 1894: /* *fma_fnmadd_v4df */ |
| 31950 | case 1893: /* *fma_fnmadd_v8sf */ |
| 31951 | case 1892: /* *fma_fnmadd_v2df */ |
| 31952 | case 1891: /* *fma_fnmadd_v4sf */ |
| 31953 | case 1890: /* *fma_fnmadd_df */ |
| 31954 | case 1889: /* *fma_fnmadd_sf */ |
| 31955 | case 1888: /* avx512vl_fmsub_v2df_mask3 */ |
| 31956 | case 1887: /* avx512vl_fmsub_v4df_mask3 */ |
| 31957 | case 1886: /* avx512f_fmsub_v8df_mask3_round */ |
| 31958 | case 1885: /* avx512f_fmsub_v8df_mask3 */ |
| 31959 | case 1884: /* avx512vl_fmsub_v4sf_mask3 */ |
| 31960 | case 1883: /* avx512vl_fmsub_v8sf_mask3 */ |
| 31961 | case 1882: /* avx512f_fmsub_v16sf_mask3_round */ |
| 31962 | case 1881: /* avx512f_fmsub_v16sf_mask3 */ |
| 31963 | case 1880: /* avx512vl_fmsub_v2df_mask_round */ |
| 31964 | case 1879: /* avx512vl_fmsub_v2df_mask */ |
| 31965 | case 1878: /* avx512vl_fmsub_v4df_mask_round */ |
| 31966 | case 1877: /* avx512vl_fmsub_v4df_mask */ |
| 31967 | case 1876: /* avx512f_fmsub_v8df_mask_round */ |
| 31968 | case 1875: /* avx512f_fmsub_v8df_mask */ |
| 31969 | case 1874: /* avx512vl_fmsub_v4sf_mask_round */ |
| 31970 | case 1873: /* avx512vl_fmsub_v4sf_mask */ |
| 31971 | case 1872: /* avx512vl_fmsub_v8sf_mask_round */ |
| 31972 | case 1871: /* avx512vl_fmsub_v8sf_mask */ |
| 31973 | case 1870: /* avx512f_fmsub_v16sf_mask_round */ |
| 31974 | case 1869: /* avx512f_fmsub_v16sf_mask */ |
| 31975 | case 1868: /* fma_fmsub_v2df_maskz_1 */ |
| 31976 | case 1867: /* *fma_fmsub_v2df */ |
| 31977 | case 1866: /* fma_fmsub_v4df_maskz_1 */ |
| 31978 | case 1865: /* *fma_fmsub_v4df */ |
| 31979 | case 1864: /* fma_fmsub_v8df_maskz_1_round */ |
| 31980 | case 1863: /* fma_fmsub_v8df_maskz_1 */ |
| 31981 | case 1862: /* *fma_fmsub_v8df_round */ |
| 31982 | case 1861: /* *fma_fmsub_v8df */ |
| 31983 | case 1860: /* *fma_fmsub_df */ |
| 31984 | case 1859: /* fma_fmsub_v4sf_maskz_1 */ |
| 31985 | case 1858: /* *fma_fmsub_v4sf */ |
| 31986 | case 1857: /* fma_fmsub_v8sf_maskz_1 */ |
| 31987 | case 1856: /* *fma_fmsub_v8sf */ |
| 31988 | case 1855: /* fma_fmsub_v16sf_maskz_1_round */ |
| 31989 | case 1854: /* fma_fmsub_v16sf_maskz_1 */ |
| 31990 | case 1853: /* *fma_fmsub_v16sf_round */ |
| 31991 | case 1852: /* *fma_fmsub_v16sf */ |
| 31992 | case 1851: /* *fma_fmsub_sf */ |
| 31993 | case 1850: /* *fma_fmsub_v4df */ |
| 31994 | case 1849: /* *fma_fmsub_v8sf */ |
| 31995 | case 1848: /* *fma_fmsub_v2df */ |
| 31996 | case 1847: /* *fma_fmsub_v4sf */ |
| 31997 | case 1846: /* *fma_fmsub_df */ |
| 31998 | case 1845: /* *fma_fmsub_sf */ |
| 31999 | case 1844: /* avx512vl_fmadd_v2df_mask3_round */ |
| 32000 | case 1843: /* avx512vl_fmadd_v2df_mask3 */ |
| 32001 | case 1842: /* avx512vl_fmadd_v4df_mask3_round */ |
| 32002 | case 1841: /* avx512vl_fmadd_v4df_mask3 */ |
| 32003 | case 1840: /* avx512f_fmadd_v8df_mask3_round */ |
| 32004 | case 1839: /* avx512f_fmadd_v8df_mask3 */ |
| 32005 | case 1838: /* avx512vl_fmadd_v4sf_mask3_round */ |
| 32006 | case 1837: /* avx512vl_fmadd_v4sf_mask3 */ |
| 32007 | case 1836: /* avx512vl_fmadd_v8sf_mask3_round */ |
| 32008 | case 1835: /* avx512vl_fmadd_v8sf_mask3 */ |
| 32009 | case 1834: /* avx512f_fmadd_v16sf_mask3_round */ |
| 32010 | case 1833: /* avx512f_fmadd_v16sf_mask3 */ |
| 32011 | case 1832: /* avx512vl_fmadd_v2df_mask */ |
| 32012 | case 1831: /* avx512vl_fmadd_v4df_mask */ |
| 32013 | case 1830: /* avx512f_fmadd_v8df_mask_round */ |
| 32014 | case 1829: /* avx512f_fmadd_v8df_mask */ |
| 32015 | case 1828: /* avx512vl_fmadd_v4sf_mask */ |
| 32016 | case 1827: /* avx512vl_fmadd_v8sf_mask */ |
| 32017 | case 1826: /* avx512f_fmadd_v16sf_mask_round */ |
| 32018 | case 1825: /* avx512f_fmadd_v16sf_mask */ |
| 32019 | case 1824: /* fma_fmadd_v2df_maskz_1 */ |
| 32020 | case 1823: /* *fma_fmadd_v2df */ |
| 32021 | case 1822: /* fma_fmadd_v4df_maskz_1 */ |
| 32022 | case 1821: /* *fma_fmadd_v4df */ |
| 32023 | case 1820: /* fma_fmadd_v8df_maskz_1_round */ |
| 32024 | case 1819: /* fma_fmadd_v8df_maskz_1 */ |
| 32025 | case 1818: /* *fma_fmadd_v8df_round */ |
| 32026 | case 1817: /* *fma_fmadd_v8df */ |
| 32027 | case 1816: /* *fma_fmadd_df */ |
| 32028 | case 1815: /* fma_fmadd_v4sf_maskz_1 */ |
| 32029 | case 1814: /* *fma_fmadd_v4sf */ |
| 32030 | case 1813: /* fma_fmadd_v8sf_maskz_1 */ |
| 32031 | case 1812: /* *fma_fmadd_v8sf */ |
| 32032 | case 1811: /* fma_fmadd_v16sf_maskz_1_round */ |
| 32033 | case 1810: /* fma_fmadd_v16sf_maskz_1 */ |
| 32034 | case 1809: /* *fma_fmadd_v16sf_round */ |
| 32035 | case 1808: /* *fma_fmadd_v16sf */ |
| 32036 | case 1807: /* *fma_fmadd_sf */ |
| 32037 | case 1806: /* *fma_fmadd_v4df */ |
| 32038 | case 1805: /* *fma_fmadd_v8sf */ |
| 32039 | case 1804: /* *fma_fmadd_v2df */ |
| 32040 | case 1803: /* *fma_fmadd_v4sf */ |
| 32041 | case 1802: /* *fma_fmadd_df */ |
| 32042 | case 1801: /* *fma_fmadd_sf */ |
| 32043 | case 1634: /* reducesv2df */ |
| 32044 | case 1633: /* reducesv4sf */ |
| 32045 | case 1632: /* reducepv2df_mask */ |
| 32046 | case 1631: /* *reducepv2df */ |
| 32047 | case 1630: /* reducepv4df_mask */ |
| 32048 | case 1629: /* *reducepv4df */ |
| 32049 | case 1628: /* reducepv8df_mask */ |
| 32050 | case 1627: /* *reducepv8df */ |
| 32051 | case 1626: /* reducepv4sf_mask */ |
| 32052 | case 1625: /* *reducepv4sf */ |
| 32053 | case 1624: /* reducepv8sf_mask */ |
| 32054 | case 1623: /* *reducepv8sf */ |
| 32055 | case 1622: /* reducepv16sf_mask */ |
| 32056 | case 1621: /* *reducepv16sf */ |
| 32057 | case 1616: /* *sse3_hsubv2df3_low */ |
| 32058 | case 1615: /* *sse3_haddv2df3_low */ |
| 32059 | case 1606: /* sse2_vmsminv2df3_round */ |
| 32060 | case 1605: /* sse2_vmsminv2df3 */ |
| 32061 | case 1604: /* sse2_vmsmaxv2df3_round */ |
| 32062 | case 1603: /* sse2_vmsmaxv2df3 */ |
| 32063 | case 1602: /* sse_vmsminv4sf3_round */ |
| 32064 | case 1601: /* sse_vmsminv4sf3 */ |
| 32065 | case 1600: /* sse_vmsmaxv4sf3_round */ |
| 32066 | case 1599: /* sse_vmsmaxv4sf3 */ |
| 32067 | case 1518: /* sse_vmrsqrtv4sf2 */ |
| 32068 | case 1517: /* rsqrt14v2df */ |
| 32069 | case 1516: /* rsqrt14v4sf */ |
| 32070 | case 1515: /* rsqrt14v2df_mask */ |
| 32071 | case 1514: /* *rsqrt14v2df */ |
| 32072 | case 1513: /* rsqrt14v4df_mask */ |
| 32073 | case 1512: /* *rsqrt14v4df */ |
| 32074 | case 1511: /* rsqrt14v8df_mask */ |
| 32075 | case 1510: /* *rsqrt14v8df */ |
| 32076 | case 1509: /* rsqrt14v4sf_mask */ |
| 32077 | case 1508: /* *rsqrt14v4sf */ |
| 32078 | case 1507: /* rsqrt14v8sf_mask */ |
| 32079 | case 1506: /* *rsqrt14v8sf */ |
| 32080 | case 1505: /* rsqrt14v16sf_mask */ |
| 32081 | case 1504: /* *rsqrt14v16sf */ |
| 32082 | case 1503: /* sse_rsqrtv4sf2 */ |
| 32083 | case 1502: /* avx_rsqrtv8sf2 */ |
| 32084 | case 1481: /* srcp14v2df */ |
| 32085 | case 1480: /* srcp14v4sf */ |
| 32086 | case 1479: /* rcp14v2df_mask */ |
| 32087 | case 1478: /* *rcp14v2df */ |
| 32088 | case 1477: /* rcp14v4df_mask */ |
| 32089 | case 1476: /* *rcp14v4df */ |
| 32090 | case 1475: /* rcp14v8df_mask */ |
| 32091 | case 1474: /* *rcp14v8df */ |
| 32092 | case 1473: /* rcp14v4sf_mask */ |
| 32093 | case 1472: /* *rcp14v4sf */ |
| 32094 | case 1471: /* rcp14v8sf_mask */ |
| 32095 | case 1470: /* *rcp14v8sf */ |
| 32096 | case 1469: /* rcp14v16sf_mask */ |
| 32097 | case 1468: /* *rcp14v16sf */ |
| 32098 | case 1465: /* avx_rcpv8sf2 */ |
| 32099 | case 1352: /* kunpckhi */ |
| 32100 | case 1351: /* kortestdi */ |
| 32101 | case 1350: /* kortestsi */ |
| 32102 | case 1349: /* kortesthi */ |
| 32103 | case 1348: /* kortestqi */ |
| 32104 | case 1347: /* ktestdi */ |
| 32105 | case 1346: /* ktestsi */ |
| 32106 | case 1345: /* ktesthi */ |
| 32107 | case 1344: /* ktestqi */ |
| 32108 | case 1343: /* klshiftrtdi */ |
| 32109 | case 1342: /* kashiftdi */ |
| 32110 | case 1341: /* klshiftrtsi */ |
| 32111 | case 1340: /* kashiftsi */ |
| 32112 | case 1339: /* klshiftrthi */ |
| 32113 | case 1338: /* kashifthi */ |
| 32114 | case 1337: /* klshiftrtqi */ |
| 32115 | case 1336: /* kashiftqi */ |
| 32116 | case 1335: /* kadddi */ |
| 32117 | case 1334: /* kaddsi */ |
| 32118 | case 1333: /* kaddhi */ |
| 32119 | case 1332: /* kaddqi */ |
| 32120 | case 1331: /* knotdi */ |
| 32121 | case 1330: /* knotsi */ |
| 32122 | case 1329: /* knothi */ |
| 32123 | case 1328: /* knotqi */ |
| 32124 | case 1327: /* kxnordi */ |
| 32125 | case 1326: /* kxnorsi */ |
| 32126 | case 1325: /* kxnorhi */ |
| 32127 | case 1324: /* kxnorqi */ |
| 32128 | case 1323: /* kandndi */ |
| 32129 | case 1322: /* kandnsi */ |
| 32130 | case 1321: /* kandnhi */ |
| 32131 | case 1320: /* kandnqi */ |
| 32132 | case 1319: /* kxordi */ |
| 32133 | case 1318: /* kiordi */ |
| 32134 | case 1317: /* kanddi */ |
| 32135 | case 1316: /* kxorsi */ |
| 32136 | case 1315: /* kiorsi */ |
| 32137 | case 1314: /* kandsi */ |
| 32138 | case 1313: /* kxorhi */ |
| 32139 | case 1312: /* kiorhi */ |
| 32140 | case 1311: /* kandhi */ |
| 32141 | case 1310: /* kxorqi */ |
| 32142 | case 1309: /* kiorqi */ |
| 32143 | case 1308: /* kandqi */ |
| 32144 | case 1217: /* *mmx_femms */ |
| 32145 | case 1216: /* *mmx_emms */ |
| 32146 | case 1215: /* *mmx_maskmovq */ |
| 32147 | case 1214: /* *mmx_maskmovq */ |
| 32148 | case 1213: /* mmx_pmovmskb */ |
| 32149 | case 1212: /* mmx_psadbw */ |
| 32150 | case 1211: /* *mmx_uavgv4hi3 */ |
| 32151 | case 1210: /* *mmx_uavgv8qi3 */ |
| 32152 | case 1206: /* *mmx_concatv2si */ |
| 32153 | case 1205: /* *vec_dupv2si */ |
| 32154 | case 1204: /* *vec_dupv4hi */ |
| 32155 | case 1203: /* mmx_pswapdv2si2 */ |
| 32156 | case 1202: /* mmx_pshufw_1 */ |
| 32157 | case 1201: /* mmx_pextrw */ |
| 32158 | case 1200: /* *mmx_pinsrw */ |
| 32159 | case 1199: /* mmx_punpckldq */ |
| 32160 | case 1198: /* mmx_punpckhdq */ |
| 32161 | case 1197: /* mmx_punpcklwd */ |
| 32162 | case 1196: /* mmx_punpckhwd */ |
| 32163 | case 1195: /* mmx_punpcklbw */ |
| 32164 | case 1194: /* mmx_punpckhbw */ |
| 32165 | case 1193: /* mmx_packuswb */ |
| 32166 | case 1192: /* mmx_packssdw */ |
| 32167 | case 1191: /* mmx_packsswb */ |
| 32168 | case 1190: /* *mmx_xorv2si3 */ |
| 32169 | case 1189: /* *mmx_iorv2si3 */ |
| 32170 | case 1188: /* *mmx_andv2si3 */ |
| 32171 | case 1187: /* *mmx_xorv4hi3 */ |
| 32172 | case 1186: /* *mmx_iorv4hi3 */ |
| 32173 | case 1185: /* *mmx_andv4hi3 */ |
| 32174 | case 1184: /* *mmx_xorv8qi3 */ |
| 32175 | case 1183: /* *mmx_iorv8qi3 */ |
| 32176 | case 1182: /* *mmx_andv8qi3 */ |
| 32177 | case 1181: /* mmx_andnotv2si3 */ |
| 32178 | case 1180: /* mmx_andnotv4hi3 */ |
| 32179 | case 1179: /* mmx_andnotv8qi3 */ |
| 32180 | case 1178: /* mmx_gtv2si3 */ |
| 32181 | case 1177: /* mmx_gtv4hi3 */ |
| 32182 | case 1176: /* mmx_gtv8qi3 */ |
| 32183 | case 1175: /* *mmx_eqv2si3 */ |
| 32184 | case 1174: /* *mmx_eqv4hi3 */ |
| 32185 | case 1173: /* *mmx_eqv8qi3 */ |
| 32186 | case 1172: /* mmx_lshrv1di3 */ |
| 32187 | case 1171: /* mmx_ashlv1di3 */ |
| 32188 | case 1170: /* mmx_lshrv2si3 */ |
| 32189 | case 1169: /* mmx_ashlv2si3 */ |
| 32190 | case 1168: /* mmx_lshrv4hi3 */ |
| 32191 | case 1167: /* mmx_ashlv4hi3 */ |
| 32192 | case 1166: /* mmx_ashrv2si3 */ |
| 32193 | case 1165: /* mmx_ashrv4hi3 */ |
| 32194 | case 1164: /* *mmx_uminv8qi3 */ |
| 32195 | case 1163: /* *mmx_umaxv8qi3 */ |
| 32196 | case 1162: /* *mmx_sminv4hi3 */ |
| 32197 | case 1161: /* *mmx_smaxv4hi3 */ |
| 32198 | case 1160: /* *sse2_umulv1siv1di3 */ |
| 32199 | case 1159: /* *mmx_pmulhrwv4hi3 */ |
| 32200 | case 1158: /* *mmx_pmaddwd */ |
| 32201 | case 1157: /* *mmx_umulv4hi3_highpart */ |
| 32202 | case 1156: /* *mmx_smulv4hi3_highpart */ |
| 32203 | case 1155: /* *mmx_mulv4hi3 */ |
| 32204 | case 1154: /* *mmx_ussubv4hi3 */ |
| 32205 | case 1153: /* *mmx_sssubv4hi3 */ |
| 32206 | case 1152: /* *mmx_usaddv4hi3 */ |
| 32207 | case 1151: /* *mmx_ssaddv4hi3 */ |
| 32208 | case 1150: /* *mmx_ussubv8qi3 */ |
| 32209 | case 1149: /* *mmx_sssubv8qi3 */ |
| 32210 | case 1148: /* *mmx_usaddv8qi3 */ |
| 32211 | case 1147: /* *mmx_ssaddv8qi3 */ |
| 32212 | case 1146: /* *mmx_subv1di3 */ |
| 32213 | case 1145: /* *mmx_addv1di3 */ |
| 32214 | case 1144: /* *mmx_subv2si3 */ |
| 32215 | case 1143: /* *mmx_addv2si3 */ |
| 32216 | case 1142: /* *mmx_subv4hi3 */ |
| 32217 | case 1141: /* *mmx_addv4hi3 */ |
| 32218 | case 1140: /* *mmx_subv8qi3 */ |
| 32219 | case 1139: /* *mmx_addv8qi3 */ |
| 32220 | case 1136: /* *mmx_concatv2sf */ |
| 32221 | case 1135: /* *vec_dupv2sf */ |
| 32222 | case 1134: /* mmx_pswapdv2sf2 */ |
| 32223 | case 1133: /* mmx_floatv2si2 */ |
| 32224 | case 1132: /* mmx_pi2fw */ |
| 32225 | case 1131: /* mmx_pf2iw */ |
| 32226 | case 1130: /* mmx_pf2id */ |
| 32227 | case 1129: /* mmx_gev2sf3 */ |
| 32228 | case 1128: /* mmx_gtv2sf3 */ |
| 32229 | case 1127: /* *mmx_eqv2sf3 */ |
| 32230 | case 1126: /* mmx_addsubv2sf3 */ |
| 32231 | case 1125: /* mmx_hsubv2sf3 */ |
| 32232 | case 1124: /* mmx_haddv2sf3 */ |
| 32233 | case 1123: /* mmx_rsqit1v2sf3 */ |
| 32234 | case 1122: /* mmx_rsqrtv2sf2 */ |
| 32235 | case 1121: /* mmx_rcpit2v2sf3 */ |
| 32236 | case 1120: /* mmx_rcpit1v2sf3 */ |
| 32237 | case 1119: /* mmx_rcpv2sf2 */ |
| 32238 | case 1118: /* mmx_ieee_minv2sf3 */ |
| 32239 | case 1117: /* mmx_ieee_maxv2sf3 */ |
| 32240 | case 1116: /* *mmx_sminv2sf3 */ |
| 32241 | case 1115: /* *mmx_smaxv2sf3 */ |
| 32242 | case 1114: /* *mmx_mulv2sf3 */ |
| 32243 | case 1113: /* *mmx_subv2sf3 */ |
| 32244 | case 1112: /* *mmx_addv2sf3 */ |
| 32245 | case 1111: /* sse_movntq */ |
| 32246 | case 1100: /* *bnd64_stx */ |
| 32247 | case 1099: /* *bnd32_stx */ |
| 32248 | case 1098: /* *bnd64_ldx */ |
| 32249 | case 1097: /* *bnd32_ldx */ |
| 32250 | case 1096: /* *bnd64_cn */ |
| 32251 | case 1095: /* *bnd64_cu */ |
| 32252 | case 1094: /* *bnd64_cl */ |
| 32253 | case 1093: /* *bnd32_cn */ |
| 32254 | case 1092: /* *bnd32_cu */ |
| 32255 | case 1091: /* *bnd32_cl */ |
| 32256 | case 1090: /* *movbnd64_internal_mpx */ |
| 32257 | case 1089: /* *movbnd32_internal_mpx */ |
| 32258 | case 1088: /* *bnd64_mk */ |
| 32259 | case 1087: /* *bnd32_mk */ |
| 32260 | case 1060: /* *lwp_lwpinsdi3_1 */ |
| 32261 | case 1059: /* *lwp_lwpinssi3_1 */ |
| 32262 | case 1058: /* *lwp_lwpvaldi3_1 */ |
| 32263 | case 1057: /* *lwp_lwpvalsi3_1 */ |
| 32264 | case 1056: /* lwp_slwpcbdi */ |
| 32265 | case 1055: /* lwp_slwpcbsi */ |
| 32266 | case 1054: /* *lwp_llwpcbdi1 */ |
| 32267 | case 1053: /* *lwp_llwpcbsi1 */ |
| 32268 | case 1008: /* *prefetch_prefetchwt1 */ |
| 32269 | case 1007: /* *prefetch_3dnow */ |
| 32270 | case 984: /* *xop_pcmov_df */ |
| 32271 | case 983: /* *xop_pcmov_sf */ |
| 32272 | case 980: /* *movxfcc_1 */ |
| 32273 | case 927: /* fistsi2_ceil_with_temp */ |
| 32274 | case 926: /* fistsi2_floor_with_temp */ |
| 32275 | case 925: /* fisthi2_ceil_with_temp */ |
| 32276 | case 924: /* fisthi2_floor_with_temp */ |
| 32277 | case 923: /* fistsi2_ceil */ |
| 32278 | case 922: /* fistsi2_floor */ |
| 32279 | case 921: /* fisthi2_ceil */ |
| 32280 | case 920: /* fisthi2_floor */ |
| 32281 | case 919: /* fistdi2_ceil_with_temp */ |
| 32282 | case 918: /* fistdi2_floor_with_temp */ |
| 32283 | case 917: /* fistdi2_ceil */ |
| 32284 | case 916: /* fistdi2_floor */ |
| 32285 | case 915: /* *fistdi2_ceil_1 */ |
| 32286 | case 914: /* *fistdi2_floor_1 */ |
| 32287 | case 913: /* *fistsi2_ceil_1 */ |
| 32288 | case 912: /* *fistsi2_floor_1 */ |
| 32289 | case 911: /* *fisthi2_ceil_1 */ |
| 32290 | case 910: /* *fisthi2_floor_1 */ |
| 32291 | case 909: /* frndintxf2_mask_pm_i387 */ |
| 32292 | case 908: /* frndintxf2_mask_pm */ |
| 32293 | case 907: /* frndintxf2_trunc_i387 */ |
| 32294 | case 906: /* frndintxf2_ceil_i387 */ |
| 32295 | case 905: /* frndintxf2_floor_i387 */ |
| 32296 | case 904: /* frndintdf2_trunc_i387 */ |
| 32297 | case 903: /* frndintdf2_ceil_i387 */ |
| 32298 | case 902: /* frndintdf2_floor_i387 */ |
| 32299 | case 901: /* frndintsf2_trunc_i387 */ |
| 32300 | case 900: /* frndintsf2_ceil_i387 */ |
| 32301 | case 899: /* frndintsf2_floor_i387 */ |
| 32302 | case 898: /* frndintxf2_trunc */ |
| 32303 | case 897: /* frndintxf2_ceil */ |
| 32304 | case 896: /* frndintxf2_floor */ |
| 32305 | case 895: /* frndintdf2_trunc */ |
| 32306 | case 894: /* frndintdf2_ceil */ |
| 32307 | case 893: /* frndintdf2_floor */ |
| 32308 | case 892: /* frndintsf2_trunc */ |
| 32309 | case 891: /* frndintsf2_ceil */ |
| 32310 | case 890: /* frndintsf2_floor */ |
| 32311 | case 889: /* fistsi2_with_temp */ |
| 32312 | case 888: /* fisthi2_with_temp */ |
| 32313 | case 887: /* fistsi2 */ |
| 32314 | case 886: /* fisthi2 */ |
| 32315 | case 885: /* *fistsi2_1 */ |
| 32316 | case 884: /* *fisthi2_1 */ |
| 32317 | case 883: /* fistdi2_with_temp */ |
| 32318 | case 882: /* fistdi2 */ |
| 32319 | case 881: /* *fistdi2_1 */ |
| 32320 | case 880: /* rintdf2_frndint */ |
| 32321 | case 879: /* rintsf2_frndint */ |
| 32322 | case 878: /* rintxf2 */ |
| 32323 | case 875: /* fscalexf4_i387 */ |
| 32324 | case 874: /* *f2xm1xf2_i387 */ |
| 32325 | case 873: /* fxtract_extenddfxf3_i387 */ |
| 32326 | case 872: /* fxtract_extendsfxf3_i387 */ |
| 32327 | case 871: /* fxtractxf3_i387 */ |
| 32328 | case 870: /* fyl2xp1_extenddfxf3_i387 */ |
| 32329 | case 869: /* fyl2xp1_extendsfxf3_i387 */ |
| 32330 | case 868: /* fyl2xp1xf3_i387 */ |
| 32331 | case 867: /* fyl2x_extenddfxf3_i387 */ |
| 32332 | case 866: /* fyl2x_extendsfxf3_i387 */ |
| 32333 | case 865: /* fyl2xxf3_i387 */ |
| 32334 | case 864: /* fpatan_extenddfxf3_i387 */ |
| 32335 | case 863: /* fpatan_extendsfxf3_i387 */ |
| 32336 | case 862: /* *fpatanxf3_i387 */ |
| 32337 | case 861: /* fptan_extenddfxf4_i387 */ |
| 32338 | case 860: /* fptan_extendsfxf4_i387 */ |
| 32339 | case 859: /* fptanxf4_i387 */ |
| 32340 | case 858: /* sincos_extenddfxf3_i387 */ |
| 32341 | case 857: /* sincos_extendsfxf3_i387 */ |
| 32342 | case 856: /* sincosxf3 */ |
| 32343 | case 855: /* *cos_extenddfxf2_i387 */ |
| 32344 | case 854: /* *sin_extenddfxf2_i387 */ |
| 32345 | case 853: /* *cos_extendsfxf2_i387 */ |
| 32346 | case 852: /* *sin_extendsfxf2_i387 */ |
| 32347 | case 851: /* *cosxf2_i387 */ |
| 32348 | case 850: /* *sinxf2_i387 */ |
| 32349 | case 849: /* fprem1xf4_i387 */ |
| 32350 | case 848: /* fpremxf4_i387 */ |
| 32351 | case 844: /* sqrt_extenddfxf2_i387 */ |
| 32352 | case 843: /* sqrt_extendsfxf2_i387 */ |
| 32353 | case 842: /* sqrtxf2 */ |
| 32354 | case 839: /* *fop_xf_6_i387 */ |
| 32355 | case 838: /* *fop_xf_6_i387 */ |
| 32356 | case 837: /* *fop_xf_5_i387 */ |
| 32357 | case 836: /* *fop_xf_5_i387 */ |
| 32358 | case 835: /* *fop_xf_4_i387 */ |
| 32359 | case 834: /* *fop_xf_4_i387 */ |
| 32360 | case 833: /* *fop_xf_3_i387 */ |
| 32361 | case 832: /* *fop_xf_3_i387 */ |
| 32362 | case 831: /* *fop_xf_2_i387 */ |
| 32363 | case 830: /* *fop_xf_2_i387 */ |
| 32364 | case 829: /* *fop_xf_1_i387 */ |
| 32365 | case 828: /* *fop_xf_comm_i387 */ |
| 32366 | case 827: /* *fop_df_6_i387 */ |
| 32367 | case 826: /* *fop_df_5_i387 */ |
| 32368 | case 825: /* *fop_df_4_i387 */ |
| 32369 | case 824: /* *fop_df_3_i387 */ |
| 32370 | case 823: /* *fop_sf_3_i387 */ |
| 32371 | case 822: /* *fop_df_3_i387 */ |
| 32372 | case 821: /* *fop_sf_3_i387 */ |
| 32373 | case 820: /* *fop_df_2_i387 */ |
| 32374 | case 819: /* *fop_sf_2_i387 */ |
| 32375 | case 818: /* *fop_df_2_i387 */ |
| 32376 | case 817: /* *fop_sf_2_i387 */ |
| 32377 | case 783: /* *bswapdi2 */ |
| 32378 | case 782: /* *bswapsi2 */ |
| 32379 | case 779: /* popcounthi2 */ |
| 32380 | case 777: /* *popcountdi2_falsedep */ |
| 32381 | case 776: /* *popcountsi2_falsedep */ |
| 32382 | case 775: /* popcountdi2 */ |
| 32383 | case 774: /* popcountsi2 */ |
| 32384 | case 773: /* *tbm_tzmsk_di */ |
| 32385 | case 772: /* *tbm_tzmsk_si */ |
| 32386 | case 771: /* *tbm_t1mskc_di */ |
| 32387 | case 770: /* *tbm_t1mskc_si */ |
| 32388 | case 769: /* *tbm_blsic_di */ |
| 32389 | case 768: /* *tbm_blsic_si */ |
| 32390 | case 767: /* *tbm_blsfill_di */ |
| 32391 | case 766: /* *tbm_blsfill_si */ |
| 32392 | case 765: /* *tbm_blcs_di */ |
| 32393 | case 764: /* *tbm_blcs_si */ |
| 32394 | case 763: /* *tbm_blcmsk_di */ |
| 32395 | case 762: /* *tbm_blcmsk_si */ |
| 32396 | case 761: /* *tbm_blcic_di */ |
| 32397 | case 760: /* *tbm_blcic_si */ |
| 32398 | case 759: /* *tbm_blci_di */ |
| 32399 | case 758: /* *tbm_blci_si */ |
| 32400 | case 757: /* *tbm_blcfill_di */ |
| 32401 | case 756: /* *tbm_blcfill_si */ |
| 32402 | case 755: /* tbm_bextri_di */ |
| 32403 | case 754: /* tbm_bextri_si */ |
| 32404 | case 753: /* bmi2_pext_di3 */ |
| 32405 | case 752: /* bmi2_pext_si3 */ |
| 32406 | case 751: /* bmi2_pdep_di3 */ |
| 32407 | case 750: /* bmi2_pdep_si3 */ |
| 32408 | case 749: /* *bmi2_bzhi_di3_1_ccz */ |
| 32409 | case 748: /* *bmi2_bzhi_si3_1_ccz */ |
| 32410 | case 747: /* *bmi2_bzhi_di3_1 */ |
| 32411 | case 746: /* *bmi2_bzhi_si3_1 */ |
| 32412 | case 745: /* *bmi2_bzhi_di3 */ |
| 32413 | case 744: /* *bmi2_bzhi_si3 */ |
| 32414 | case 743: /* *bmi_blsr_di */ |
| 32415 | case 742: /* *bmi_blsr_si */ |
| 32416 | case 741: /* *bmi_blsmsk_di */ |
| 32417 | case 740: /* *bmi_blsmsk_si */ |
| 32418 | case 739: /* *bmi_blsi_di */ |
| 32419 | case 738: /* *bmi_blsi_si */ |
| 32420 | case 737: /* *bmi_bextr_di_ccz */ |
| 32421 | case 736: /* *bmi_bextr_si_ccz */ |
| 32422 | case 735: /* bmi_bextr_di */ |
| 32423 | case 734: /* bmi_bextr_si */ |
| 32424 | case 733: /* lzcnt_hi */ |
| 32425 | case 731: /* *lzcnt_di_falsedep */ |
| 32426 | case 729: /* *lzcnt_si_falsedep */ |
| 32427 | case 727: /* lzcnt_di */ |
| 32428 | case 725: /* lzcnt_si */ |
| 32429 | case 723: /* *clzdi2_lzcnt_falsedep */ |
| 32430 | case 722: /* *clzsi2_lzcnt_falsedep */ |
| 32431 | case 721: /* clzdi2_lzcnt */ |
| 32432 | case 720: /* clzsi2_lzcnt */ |
| 32433 | case 600: /* *bmi2_rorxsi3_1_zext */ |
| 32434 | case 595: /* *bmi2_rorxdi3_1 */ |
| 32435 | case 594: /* *bmi2_rorxsi3_1 */ |
| 32436 | case 559: /* *bmi2_ashrsi3_1_zext */ |
| 32437 | case 558: /* *bmi2_lshrsi3_1_zext */ |
| 32438 | case 553: /* *bmi2_ashrdi3_1 */ |
| 32439 | case 552: /* *bmi2_lshrdi3_1 */ |
| 32440 | case 551: /* *bmi2_ashrsi3_1 */ |
| 32441 | case 550: /* *bmi2_lshrsi3_1 */ |
| 32442 | case 523: /* *bmi2_ashlsi3_1_zext */ |
| 32443 | case 520: /* *bmi2_ashldi3_1 */ |
| 32444 | case 519: /* *bmi2_ashlsi3_1 */ |
| 32445 | case 495: /* *negextenddfxf2 */ |
| 32446 | case 494: /* *absextenddfxf2 */ |
| 32447 | case 493: /* *negextendsfxf2 */ |
| 32448 | case 492: /* *absextendsfxf2 */ |
| 32449 | case 491: /* *negextendsfdf2 */ |
| 32450 | case 490: /* *absextendsfdf2 */ |
| 32451 | case 489: /* *negxf2_1 */ |
| 32452 | case 488: /* *absxf2_1 */ |
| 32453 | case 487: /* *negdf2_1 */ |
| 32454 | case 486: /* *absdf2_1 */ |
| 32455 | case 485: /* *negsf2_1 */ |
| 32456 | case 484: /* *abssf2_1 */ |
| 32457 | case 420: /* *andn_di_ccno */ |
| 32458 | case 419: /* *andn_si_ccno */ |
| 32459 | case 418: /* *andnhi_1 */ |
| 32460 | case 417: /* *andnqi_1 */ |
| 32461 | case 416: /* *andndi_1 */ |
| 32462 | case 415: /* *andnsi_1 */ |
| 32463 | case 354: /* *bmi2_umulditi3_1 */ |
| 32464 | case 353: /* *bmi2_umulsidi3_1 */ |
| 32465 | case 191: /* fix_truncsi_i387_with_temp */ |
| 32466 | case 190: /* fix_trunchi_i387_with_temp */ |
| 32467 | case 189: /* fix_truncsi_i387 */ |
| 32468 | case 188: /* fix_trunchi_i387 */ |
| 32469 | case 187: /* fix_truncdi_i387_with_temp */ |
| 32470 | case 186: /* fix_truncdi_i387 */ |
| 32471 | case 185: /* *fix_truncdi_i387_1 */ |
| 32472 | case 184: /* *fix_truncsi_i387_1 */ |
| 32473 | case 183: /* *fix_trunchi_i387_1 */ |
| 32474 | case 182: /* fix_truncdi_i387_fisttp_with_temp */ |
| 32475 | case 181: /* fix_truncsi_i387_fisttp_with_temp */ |
| 32476 | case 180: /* fix_trunchi_i387_fisttp_with_temp */ |
| 32477 | case 179: /* fix_truncdi_i387_fisttp */ |
| 32478 | case 178: /* fix_truncsi_i387_fisttp */ |
| 32479 | case 177: /* fix_trunchi_i387_fisttp */ |
| 32480 | case 176: /* fix_truncdi_fisttp_i387_1 */ |
| 32481 | case 175: /* fix_truncsi_fisttp_i387_1 */ |
| 32482 | case 174: /* fix_trunchi_fisttp_i387_1 */ |
| 32483 | case 130: /* *swapdf */ |
| 32484 | case 129: /* *swapsf */ |
| 32485 | case 128: /* swapxf */ |
| 32486 | case 54: /* *cmpiuxf_i387 */ |
| 32487 | case 53: /* *cmpixf_i387 */ |
| 32488 | return 0; |
| 32489 | |
| 32490 | case 781: /* *bswapdi2_movbe */ |
| 32491 | case 780: /* *bswapsi2_movbe */ |
| 32492 | case 52: /* *cmpiudf */ |
| 32493 | case 51: /* *cmpiusf */ |
| 32494 | case 50: /* *cmpidf */ |
| 32495 | case 49: /* *cmpisf */ |
| 32496 | extract_constrain_insn_cached (insn); |
| 32497 | if (which_alternative != 0) |
| 32498 | { |
| 32499 | return 1; |
| 32500 | } |
| 32501 | else |
| 32502 | { |
| 32503 | return 0; |
| 32504 | } |
| 32505 | |
| 32506 | case 4984: /* atomic_bit_test_and_resetdi_1 */ |
| 32507 | case 4983: /* atomic_bit_test_and_resetsi_1 */ |
| 32508 | case 4982: /* atomic_bit_test_and_resethi_1 */ |
| 32509 | case 4981: /* atomic_bit_test_and_complementdi_1 */ |
| 32510 | case 4980: /* atomic_bit_test_and_complementsi_1 */ |
| 32511 | case 4979: /* atomic_bit_test_and_complementhi_1 */ |
| 32512 | case 4978: /* atomic_bit_test_and_setdi_1 */ |
| 32513 | case 4977: /* atomic_bit_test_and_setsi_1 */ |
| 32514 | case 4976: /* atomic_bit_test_and_sethi_1 */ |
| 32515 | case 4975: /* atomic_xordi */ |
| 32516 | case 4974: /* atomic_ordi */ |
| 32517 | case 4973: /* atomic_anddi */ |
| 32518 | case 4972: /* atomic_xorsi */ |
| 32519 | case 4971: /* atomic_orsi */ |
| 32520 | case 4970: /* atomic_andsi */ |
| 32521 | case 4969: /* atomic_xorhi */ |
| 32522 | case 4968: /* atomic_orhi */ |
| 32523 | case 4967: /* atomic_andhi */ |
| 32524 | case 4966: /* atomic_xorqi */ |
| 32525 | case 4965: /* atomic_orqi */ |
| 32526 | case 4964: /* atomic_andqi */ |
| 32527 | case 4963: /* atomic_subdi */ |
| 32528 | case 4962: /* atomic_subsi */ |
| 32529 | case 4961: /* atomic_subhi */ |
| 32530 | case 4960: /* atomic_subqi */ |
| 32531 | case 4959: /* atomic_adddi */ |
| 32532 | case 4958: /* atomic_addsi */ |
| 32533 | case 4957: /* atomic_addhi */ |
| 32534 | case 4956: /* atomic_addqi */ |
| 32535 | case 4955: /* atomic_exchangedi */ |
| 32536 | case 4954: /* atomic_exchangesi */ |
| 32537 | case 4953: /* atomic_exchangehi */ |
| 32538 | case 4952: /* atomic_exchangeqi */ |
| 32539 | case 4951: /* *atomic_fetch_add_cmpdi */ |
| 32540 | case 4950: /* *atomic_fetch_add_cmpsi */ |
| 32541 | case 4949: /* *atomic_fetch_add_cmphi */ |
| 32542 | case 4948: /* *atomic_fetch_add_cmpqi */ |
| 32543 | case 4947: /* atomic_fetch_adddi */ |
| 32544 | case 4946: /* atomic_fetch_addsi */ |
| 32545 | case 4945: /* atomic_fetch_addhi */ |
| 32546 | case 4944: /* atomic_fetch_addqi */ |
| 32547 | case 4943: /* atomic_compare_and_swapdi_1 */ |
| 32548 | case 4942: /* atomic_compare_and_swapsi_1 */ |
| 32549 | case 4941: /* atomic_compare_and_swaphi_1 */ |
| 32550 | case 4940: /* atomic_compare_and_swapqi_1 */ |
| 32551 | case 4939: /* atomic_compare_and_swapti_doubleword */ |
| 32552 | case 4938: /* atomic_compare_and_swapdi_doubleword */ |
| 32553 | case 4933: /* atomic_storedi_fpu */ |
| 32554 | case 4932: /* atomic_storedi_1 */ |
| 32555 | case 4931: /* atomic_storesi_1 */ |
| 32556 | case 4930: /* atomic_storehi_1 */ |
| 32557 | case 4929: /* atomic_storeqi_1 */ |
| 32558 | case 4928: /* atomic_loaddi_fpu */ |
| 32559 | case 4927: /* mfence_nosse */ |
| 32560 | case 4923: /* vpopcountv8di_mask */ |
| 32561 | case 4922: /* vpopcountv8di */ |
| 32562 | case 4921: /* vpopcountv16si_mask */ |
| 32563 | case 4920: /* vpopcountv16si */ |
| 32564 | case 4901: /* *movv64si_internal */ |
| 32565 | case 4900: /* *movv64sf_internal */ |
| 32566 | case 4875: /* avx512f_pd512_256pd */ |
| 32567 | case 4874: /* avx512f_ps512_256ps */ |
| 32568 | case 4873: /* avx512f_si512_256si */ |
| 32569 | case 4872: /* avx512f_pd512_pd */ |
| 32570 | case 4871: /* avx512f_ps512_ps */ |
| 32571 | case 4870: /* avx512f_si512_si */ |
| 32572 | case 4832: /* avx512f_vgetmantv2df_round */ |
| 32573 | case 4831: /* avx512f_vgetmantv2df */ |
| 32574 | case 4830: /* avx512f_vgetmantv4sf_round */ |
| 32575 | case 4829: /* avx512f_vgetmantv4sf */ |
| 32576 | case 4828: /* avx512vl_getmantv2df_mask_round */ |
| 32577 | case 4827: /* avx512vl_getmantv2df_mask */ |
| 32578 | case 4826: /* avx512vl_getmantv2df_round */ |
| 32579 | case 4825: /* avx512vl_getmantv2df */ |
| 32580 | case 4824: /* avx512vl_getmantv4df_mask_round */ |
| 32581 | case 4823: /* avx512vl_getmantv4df_mask */ |
| 32582 | case 4822: /* avx512vl_getmantv4df_round */ |
| 32583 | case 4821: /* avx512vl_getmantv4df */ |
| 32584 | case 4820: /* avx512f_getmantv8df_mask_round */ |
| 32585 | case 4819: /* avx512f_getmantv8df_mask */ |
| 32586 | case 4818: /* avx512f_getmantv8df_round */ |
| 32587 | case 4817: /* avx512f_getmantv8df */ |
| 32588 | case 4816: /* avx512vl_getmantv4sf_mask_round */ |
| 32589 | case 4815: /* avx512vl_getmantv4sf_mask */ |
| 32590 | case 4814: /* avx512vl_getmantv4sf_round */ |
| 32591 | case 4813: /* avx512vl_getmantv4sf */ |
| 32592 | case 4812: /* avx512vl_getmantv8sf_mask_round */ |
| 32593 | case 4811: /* avx512vl_getmantv8sf_mask */ |
| 32594 | case 4810: /* avx512vl_getmantv8sf_round */ |
| 32595 | case 4809: /* avx512vl_getmantv8sf */ |
| 32596 | case 4808: /* avx512f_getmantv16sf_mask_round */ |
| 32597 | case 4807: /* avx512f_getmantv16sf_mask */ |
| 32598 | case 4806: /* avx512f_getmantv16sf_round */ |
| 32599 | case 4805: /* avx512f_getmantv16sf */ |
| 32600 | case 4435: /* avx_pd256_pd */ |
| 32601 | case 4434: /* avx_ps256_ps */ |
| 32602 | case 4433: /* avx_si256_si */ |
| 32603 | case 4252: /* *avx_vperm_broadcast_v4df */ |
| 32604 | case 4251: /* *avx_vperm_broadcast_v8sf */ |
| 32605 | case 3677: /* sse3_monitor_di */ |
| 32606 | case 3676: /* sse3_monitor_si */ |
| 32607 | case 3675: /* sse3_mwait */ |
| 32608 | case 3673: /* sse_stmxcsr */ |
| 32609 | case 3672: /* sse_ldmxcsr */ |
| 32610 | case 3637: /* *vec_extractv4si_zext_mem */ |
| 32611 | case 3636: /* *vec_extractv4si_mem */ |
| 32612 | case 3633: /* *vec_extractv4si_0_zext */ |
| 32613 | case 3632: /* *vec_extractv4si_0_zext_sse4 */ |
| 32614 | case 3631: /* *vec_extractv2di_0_sse */ |
| 32615 | case 3630: /* *vec_extractv2di_0 */ |
| 32616 | case 3629: /* *vec_extractv4si_0 */ |
| 32617 | case 3628: /* *vec_extractv8hi_mem */ |
| 32618 | case 3627: /* *vec_extractv16qi_mem */ |
| 32619 | case 3503: /* avx512vl_testnmv2di3_mask */ |
| 32620 | case 3502: /* avx512vl_testnmv2di3 */ |
| 32621 | case 3501: /* avx512vl_testnmv4di3_mask */ |
| 32622 | case 3500: /* avx512vl_testnmv4di3 */ |
| 32623 | case 3499: /* avx512f_testnmv8di3_mask */ |
| 32624 | case 3498: /* avx512f_testnmv8di3 */ |
| 32625 | case 3497: /* avx512vl_testnmv4si3_mask */ |
| 32626 | case 3496: /* avx512vl_testnmv4si3 */ |
| 32627 | case 3495: /* avx512vl_testnmv8si3_mask */ |
| 32628 | case 3494: /* avx512vl_testnmv8si3 */ |
| 32629 | case 3493: /* avx512f_testnmv16si3_mask */ |
| 32630 | case 3492: /* avx512f_testnmv16si3 */ |
| 32631 | case 3491: /* avx512vl_testnmv8hi3_mask */ |
| 32632 | case 3490: /* avx512vl_testnmv8hi3 */ |
| 32633 | case 3489: /* avx512vl_testnmv16hi3_mask */ |
| 32634 | case 3488: /* avx512vl_testnmv16hi3 */ |
| 32635 | case 3487: /* avx512bw_testnmv32hi3_mask */ |
| 32636 | case 3486: /* avx512bw_testnmv32hi3 */ |
| 32637 | case 3485: /* avx512vl_testnmv32qi3_mask */ |
| 32638 | case 3484: /* avx512vl_testnmv32qi3 */ |
| 32639 | case 3483: /* avx512vl_testnmv16qi3_mask */ |
| 32640 | case 3482: /* avx512vl_testnmv16qi3 */ |
| 32641 | case 3481: /* avx512bw_testnmv64qi3_mask */ |
| 32642 | case 3480: /* avx512bw_testnmv64qi3 */ |
| 32643 | case 3479: /* avx512vl_testmv2di3_mask */ |
| 32644 | case 3478: /* avx512vl_testmv2di3 */ |
| 32645 | case 3477: /* avx512vl_testmv4di3_mask */ |
| 32646 | case 3476: /* avx512vl_testmv4di3 */ |
| 32647 | case 3475: /* avx512f_testmv8di3_mask */ |
| 32648 | case 3474: /* avx512f_testmv8di3 */ |
| 32649 | case 3473: /* avx512vl_testmv4si3_mask */ |
| 32650 | case 3472: /* avx512vl_testmv4si3 */ |
| 32651 | case 3471: /* avx512vl_testmv8si3_mask */ |
| 32652 | case 3470: /* avx512vl_testmv8si3 */ |
| 32653 | case 3469: /* avx512f_testmv16si3_mask */ |
| 32654 | case 3468: /* avx512f_testmv16si3 */ |
| 32655 | case 3467: /* avx512vl_testmv8hi3_mask */ |
| 32656 | case 3466: /* avx512vl_testmv8hi3 */ |
| 32657 | case 3465: /* avx512vl_testmv16hi3_mask */ |
| 32658 | case 3464: /* avx512vl_testmv16hi3 */ |
| 32659 | case 3463: /* avx512bw_testmv32hi3_mask */ |
| 32660 | case 3462: /* avx512bw_testmv32hi3 */ |
| 32661 | case 3461: /* avx512vl_testmv32qi3_mask */ |
| 32662 | case 3460: /* avx512vl_testmv32qi3 */ |
| 32663 | case 3459: /* avx512vl_testmv16qi3_mask */ |
| 32664 | case 3458: /* avx512vl_testmv16qi3 */ |
| 32665 | case 3457: /* avx512bw_testmv64qi3_mask */ |
| 32666 | case 3456: /* avx512bw_testmv64qi3 */ |
| 32667 | case 3191: /* avx512vl_rorv2di_mask */ |
| 32668 | case 3190: /* avx512vl_rorv2di */ |
| 32669 | case 3189: /* avx512vl_rolv2di_mask */ |
| 32670 | case 3188: /* avx512vl_rolv2di */ |
| 32671 | case 3187: /* avx512vl_rorv4di_mask */ |
| 32672 | case 3186: /* avx512vl_rorv4di */ |
| 32673 | case 3185: /* avx512vl_rolv4di_mask */ |
| 32674 | case 3184: /* avx512vl_rolv4di */ |
| 32675 | case 3183: /* avx512f_rorv8di_mask */ |
| 32676 | case 3182: /* avx512f_rorv8di */ |
| 32677 | case 3181: /* avx512f_rolv8di_mask */ |
| 32678 | case 3180: /* avx512f_rolv8di */ |
| 32679 | case 3179: /* avx512vl_rorv4si_mask */ |
| 32680 | case 3178: /* avx512vl_rorv4si */ |
| 32681 | case 3177: /* avx512vl_rolv4si_mask */ |
| 32682 | case 3176: /* avx512vl_rolv4si */ |
| 32683 | case 3175: /* avx512vl_rorv8si_mask */ |
| 32684 | case 3174: /* avx512vl_rorv8si */ |
| 32685 | case 3173: /* avx512vl_rolv8si_mask */ |
| 32686 | case 3172: /* avx512vl_rolv8si */ |
| 32687 | case 3171: /* avx512f_rorv16si_mask */ |
| 32688 | case 3170: /* avx512f_rorv16si */ |
| 32689 | case 3169: /* avx512f_rolv16si_mask */ |
| 32690 | case 3168: /* avx512f_rolv16si */ |
| 32691 | case 3167: /* avx512vl_rorvv2di_mask */ |
| 32692 | case 3166: /* avx512vl_rorvv2di */ |
| 32693 | case 3165: /* avx512vl_rolvv2di_mask */ |
| 32694 | case 3164: /* avx512vl_rolvv2di */ |
| 32695 | case 3163: /* avx512vl_rorvv4di_mask */ |
| 32696 | case 3162: /* avx512vl_rorvv4di */ |
| 32697 | case 3161: /* avx512vl_rolvv4di_mask */ |
| 32698 | case 3160: /* avx512vl_rolvv4di */ |
| 32699 | case 3159: /* avx512f_rorvv8di_mask */ |
| 32700 | case 3158: /* avx512f_rorvv8di */ |
| 32701 | case 3157: /* avx512f_rolvv8di_mask */ |
| 32702 | case 3156: /* avx512f_rolvv8di */ |
| 32703 | case 3155: /* avx512vl_rorvv4si_mask */ |
| 32704 | case 3154: /* avx512vl_rorvv4si */ |
| 32705 | case 3153: /* avx512vl_rolvv4si_mask */ |
| 32706 | case 3152: /* avx512vl_rolvv4si */ |
| 32707 | case 3151: /* avx512vl_rorvv8si_mask */ |
| 32708 | case 3150: /* avx512vl_rorvv8si */ |
| 32709 | case 3149: /* avx512vl_rolvv8si_mask */ |
| 32710 | case 3148: /* avx512vl_rolvv8si */ |
| 32711 | case 3147: /* avx512f_rorvv16si_mask */ |
| 32712 | case 3146: /* avx512f_rorvv16si */ |
| 32713 | case 3145: /* avx512f_rolvv16si_mask */ |
| 32714 | case 3144: /* avx512f_rolvv16si */ |
| 32715 | case 2704: /* avx512f_rndscalev2df_round */ |
| 32716 | case 2703: /* avx512f_rndscalev2df */ |
| 32717 | case 2702: /* avx512f_rndscalev4sf_round */ |
| 32718 | case 2701: /* avx512f_rndscalev4sf */ |
| 32719 | case 2700: /* avx512vl_rndscalev2df_mask_round */ |
| 32720 | case 2699: /* avx512vl_rndscalev2df_mask */ |
| 32721 | case 2698: /* avx512vl_rndscalev2df_round */ |
| 32722 | case 2697: /* avx512vl_rndscalev2df */ |
| 32723 | case 2696: /* avx512vl_rndscalev4df_mask_round */ |
| 32724 | case 2695: /* avx512vl_rndscalev4df_mask */ |
| 32725 | case 2694: /* avx512vl_rndscalev4df_round */ |
| 32726 | case 2693: /* avx512vl_rndscalev4df */ |
| 32727 | case 2692: /* avx512f_rndscalev8df_mask_round */ |
| 32728 | case 2691: /* avx512f_rndscalev8df_mask */ |
| 32729 | case 2690: /* avx512f_rndscalev8df_round */ |
| 32730 | case 2689: /* avx512f_rndscalev8df */ |
| 32731 | case 2688: /* avx512vl_rndscalev4sf_mask_round */ |
| 32732 | case 2687: /* avx512vl_rndscalev4sf_mask */ |
| 32733 | case 2686: /* avx512vl_rndscalev4sf_round */ |
| 32734 | case 2685: /* avx512vl_rndscalev4sf */ |
| 32735 | case 2684: /* avx512vl_rndscalev8sf_mask_round */ |
| 32736 | case 2683: /* avx512vl_rndscalev8sf_mask */ |
| 32737 | case 2682: /* avx512vl_rndscalev8sf_round */ |
| 32738 | case 2681: /* avx512vl_rndscalev8sf */ |
| 32739 | case 2680: /* avx512f_rndscalev16sf_mask_round */ |
| 32740 | case 2679: /* avx512f_rndscalev16sf_mask */ |
| 32741 | case 2678: /* avx512f_rndscalev16sf_round */ |
| 32742 | case 2677: /* avx512f_rndscalev16sf */ |
| 32743 | case 2676: /* avx512f_sfixupimmv2df_mask_round */ |
| 32744 | case 2675: /* avx512f_sfixupimmv2df_mask */ |
| 32745 | case 2674: /* avx512f_sfixupimmv4sf_mask_round */ |
| 32746 | case 2673: /* avx512f_sfixupimmv4sf_mask */ |
| 32747 | case 2672: /* avx512f_sfixupimmv2df_maskz_1_round */ |
| 32748 | case 2671: /* avx512f_sfixupimmv2df_maskz_1 */ |
| 32749 | case 2670: /* avx512f_sfixupimmv2df_round */ |
| 32750 | case 2669: /* avx512f_sfixupimmv2df */ |
| 32751 | case 2668: /* avx512f_sfixupimmv4sf_maskz_1_round */ |
| 32752 | case 2667: /* avx512f_sfixupimmv4sf_maskz_1 */ |
| 32753 | case 2666: /* avx512f_sfixupimmv4sf_round */ |
| 32754 | case 2665: /* avx512f_sfixupimmv4sf */ |
| 32755 | case 2664: /* avx512vl_fixupimmv2df_mask_round */ |
| 32756 | case 2663: /* avx512vl_fixupimmv2df_mask */ |
| 32757 | case 2662: /* avx512vl_fixupimmv4df_mask_round */ |
| 32758 | case 2661: /* avx512vl_fixupimmv4df_mask */ |
| 32759 | case 2660: /* avx512f_fixupimmv8df_mask_round */ |
| 32760 | case 2659: /* avx512f_fixupimmv8df_mask */ |
| 32761 | case 2658: /* avx512vl_fixupimmv4sf_mask_round */ |
| 32762 | case 2657: /* avx512vl_fixupimmv4sf_mask */ |
| 32763 | case 2656: /* avx512vl_fixupimmv8sf_mask_round */ |
| 32764 | case 2655: /* avx512vl_fixupimmv8sf_mask */ |
| 32765 | case 2654: /* avx512f_fixupimmv16sf_mask_round */ |
| 32766 | case 2653: /* avx512f_fixupimmv16sf_mask */ |
| 32767 | case 2652: /* avx512vl_fixupimmv2df_maskz_1_round */ |
| 32768 | case 2651: /* avx512vl_fixupimmv2df_maskz_1 */ |
| 32769 | case 2650: /* avx512vl_fixupimmv2df_round */ |
| 32770 | case 2649: /* avx512vl_fixupimmv2df */ |
| 32771 | case 2648: /* avx512vl_fixupimmv4df_maskz_1_round */ |
| 32772 | case 2647: /* avx512vl_fixupimmv4df_maskz_1 */ |
| 32773 | case 2646: /* avx512vl_fixupimmv4df_round */ |
| 32774 | case 2645: /* avx512vl_fixupimmv4df */ |
| 32775 | case 2644: /* avx512f_fixupimmv8df_maskz_1_round */ |
| 32776 | case 2643: /* avx512f_fixupimmv8df_maskz_1 */ |
| 32777 | case 2642: /* avx512f_fixupimmv8df_round */ |
| 32778 | case 2641: /* avx512f_fixupimmv8df */ |
| 32779 | case 2640: /* avx512vl_fixupimmv4sf_maskz_1_round */ |
| 32780 | case 2639: /* avx512vl_fixupimmv4sf_maskz_1 */ |
| 32781 | case 2638: /* avx512vl_fixupimmv4sf_round */ |
| 32782 | case 2637: /* avx512vl_fixupimmv4sf */ |
| 32783 | case 2636: /* avx512vl_fixupimmv8sf_maskz_1_round */ |
| 32784 | case 2635: /* avx512vl_fixupimmv8sf_maskz_1 */ |
| 32785 | case 2634: /* avx512vl_fixupimmv8sf_round */ |
| 32786 | case 2633: /* avx512vl_fixupimmv8sf */ |
| 32787 | case 2632: /* avx512f_fixupimmv16sf_maskz_1_round */ |
| 32788 | case 2631: /* avx512f_fixupimmv16sf_maskz_1 */ |
| 32789 | case 2630: /* avx512f_fixupimmv16sf_round */ |
| 32790 | case 2629: /* avx512f_fixupimmv16sf */ |
| 32791 | case 2628: /* avx512vl_alignv2di_mask */ |
| 32792 | case 2627: /* *avx512vl_alignv2di */ |
| 32793 | case 2626: /* avx512vl_alignv4di_mask */ |
| 32794 | case 2625: /* *avx512vl_alignv4di */ |
| 32795 | case 2624: /* avx512f_alignv8di_mask */ |
| 32796 | case 2623: /* *avx512f_alignv8di */ |
| 32797 | case 2622: /* avx512vl_alignv4si_mask */ |
| 32798 | case 2621: /* *avx512vl_alignv4si */ |
| 32799 | case 2620: /* avx512vl_alignv8si_mask */ |
| 32800 | case 2619: /* *avx512vl_alignv8si */ |
| 32801 | case 2618: /* avx512f_alignv16si_mask */ |
| 32802 | case 2617: /* *avx512f_alignv16si */ |
| 32803 | case 2616: /* avx512f_sgetexpv2df_round */ |
| 32804 | case 2615: /* avx512f_sgetexpv2df */ |
| 32805 | case 2614: /* avx512f_sgetexpv4sf_round */ |
| 32806 | case 2613: /* avx512f_sgetexpv4sf */ |
| 32807 | case 2612: /* avx512vl_getexpv2df_mask_round */ |
| 32808 | case 2611: /* avx512vl_getexpv2df_mask */ |
| 32809 | case 2610: /* avx512vl_getexpv2df_round */ |
| 32810 | case 2609: /* avx512vl_getexpv2df */ |
| 32811 | case 2608: /* avx512vl_getexpv4df_mask_round */ |
| 32812 | case 2607: /* avx512vl_getexpv4df_mask */ |
| 32813 | case 2606: /* avx512vl_getexpv4df_round */ |
| 32814 | case 2605: /* avx512vl_getexpv4df */ |
| 32815 | case 2604: /* avx512f_getexpv8df_mask_round */ |
| 32816 | case 2603: /* avx512f_getexpv8df_mask */ |
| 32817 | case 2602: /* avx512f_getexpv8df_round */ |
| 32818 | case 2601: /* avx512f_getexpv8df */ |
| 32819 | case 2600: /* avx512vl_getexpv4sf_mask_round */ |
| 32820 | case 2599: /* avx512vl_getexpv4sf_mask */ |
| 32821 | case 2598: /* avx512vl_getexpv4sf_round */ |
| 32822 | case 2597: /* avx512vl_getexpv4sf */ |
| 32823 | case 2596: /* avx512vl_getexpv8sf_mask_round */ |
| 32824 | case 2595: /* avx512vl_getexpv8sf_mask */ |
| 32825 | case 2594: /* avx512vl_getexpv8sf_round */ |
| 32826 | case 2593: /* avx512vl_getexpv8sf */ |
| 32827 | case 2592: /* avx512f_getexpv16sf_mask_round */ |
| 32828 | case 2591: /* avx512f_getexpv16sf_mask */ |
| 32829 | case 2590: /* avx512f_getexpv16sf_round */ |
| 32830 | case 2589: /* avx512f_getexpv16sf */ |
| 32831 | case 2570: /* avx512vl_scalefv2df_mask_round */ |
| 32832 | case 2569: /* avx512vl_scalefv2df_mask */ |
| 32833 | case 2568: /* avx512vl_scalefv2df_round */ |
| 32834 | case 2567: /* avx512vl_scalefv2df */ |
| 32835 | case 2566: /* avx512vl_scalefv4df_mask_round */ |
| 32836 | case 2565: /* avx512vl_scalefv4df_mask */ |
| 32837 | case 2564: /* avx512vl_scalefv4df_round */ |
| 32838 | case 2563: /* avx512vl_scalefv4df */ |
| 32839 | case 2562: /* avx512f_scalefv8df_mask_round */ |
| 32840 | case 2561: /* avx512f_scalefv8df_mask */ |
| 32841 | case 2560: /* avx512f_scalefv8df_round */ |
| 32842 | case 2559: /* avx512f_scalefv8df */ |
| 32843 | case 2558: /* avx512vl_scalefv4sf_mask_round */ |
| 32844 | case 2557: /* avx512vl_scalefv4sf_mask */ |
| 32845 | case 2556: /* avx512vl_scalefv4sf_round */ |
| 32846 | case 2555: /* avx512vl_scalefv4sf */ |
| 32847 | case 2554: /* avx512vl_scalefv8sf_mask_round */ |
| 32848 | case 2553: /* avx512vl_scalefv8sf_mask */ |
| 32849 | case 2552: /* avx512vl_scalefv8sf_round */ |
| 32850 | case 2551: /* avx512vl_scalefv8sf */ |
| 32851 | case 2550: /* avx512f_scalefv16sf_mask_round */ |
| 32852 | case 2549: /* avx512f_scalefv16sf_mask */ |
| 32853 | case 2548: /* avx512f_scalefv16sf_round */ |
| 32854 | case 2547: /* avx512f_scalefv16sf */ |
| 32855 | case 2546: /* avx512f_vmscalefv2df_round */ |
| 32856 | case 2545: /* avx512f_vmscalefv2df */ |
| 32857 | case 2544: /* avx512f_vmscalefv4sf_round */ |
| 32858 | case 2543: /* avx512f_vmscalefv4sf */ |
| 32859 | case 2529: /* vec_extract_lo_v32qi */ |
| 32860 | case 2527: /* vec_extract_lo_v64qi */ |
| 32861 | case 2525: /* vec_extract_lo_v16hi */ |
| 32862 | case 2523: /* vec_extract_lo_v32hi */ |
| 32863 | case 2502: /* vec_extract_lo_v16si_mask */ |
| 32864 | case 2501: /* vec_extract_lo_v16si */ |
| 32865 | case 2500: /* vec_extract_lo_v16sf_mask */ |
| 32866 | case 2499: /* vec_extract_lo_v16sf */ |
| 32867 | case 2468: /* *vec_extractv4sf_mem */ |
| 32868 | case 2466: /* *vec_extractv4sf_0 */ |
| 32869 | case 2415: /* *avx512vl_cvtmask2qv2di */ |
| 32870 | case 2414: /* *avx512vl_cvtmask2qv4di */ |
| 32871 | case 2413: /* *avx512f_cvtmask2qv8di */ |
| 32872 | case 2412: /* *avx512vl_cvtmask2dv4si */ |
| 32873 | case 2411: /* *avx512vl_cvtmask2dv8si */ |
| 32874 | case 2410: /* *avx512f_cvtmask2dv16si */ |
| 32875 | case 2409: /* *avx512vl_cvtmask2wv8hi */ |
| 32876 | case 2408: /* *avx512vl_cvtmask2wv16hi */ |
| 32877 | case 2407: /* *avx512bw_cvtmask2wv32hi */ |
| 32878 | case 2406: /* *avx512vl_cvtmask2bv32qi */ |
| 32879 | case 2405: /* *avx512vl_cvtmask2bv16qi */ |
| 32880 | case 2404: /* *avx512bw_cvtmask2bv64qi */ |
| 32881 | case 2403: /* avx512vl_cvtq2maskv2di */ |
| 32882 | case 2402: /* avx512vl_cvtq2maskv4di */ |
| 32883 | case 2401: /* avx512f_cvtq2maskv8di */ |
| 32884 | case 2400: /* avx512vl_cvtd2maskv4si */ |
| 32885 | case 2399: /* avx512vl_cvtd2maskv8si */ |
| 32886 | case 2398: /* avx512f_cvtd2maskv16si */ |
| 32887 | case 2397: /* avx512vl_cvtw2maskv8hi */ |
| 32888 | case 2396: /* avx512vl_cvtw2maskv16hi */ |
| 32889 | case 2395: /* avx512bw_cvtw2maskv32hi */ |
| 32890 | case 2394: /* avx512vl_cvtb2maskv32qi */ |
| 32891 | case 2393: /* avx512vl_cvtb2maskv16qi */ |
| 32892 | case 2392: /* avx512bw_cvtb2maskv64qi */ |
| 32893 | case 1501: /* sse2_vmsqrtv2df2_round */ |
| 32894 | case 1500: /* sse2_vmsqrtv2df2 */ |
| 32895 | case 1499: /* sse_vmsqrtv4sf2_round */ |
| 32896 | case 1498: /* sse_vmsqrtv4sf2 */ |
| 32897 | case 1497: /* sse2_sqrtv2df2_mask */ |
| 32898 | case 1496: /* sse2_sqrtv2df2 */ |
| 32899 | case 1495: /* avx_sqrtv4df2_mask */ |
| 32900 | case 1494: /* avx_sqrtv4df2 */ |
| 32901 | case 1493: /* avx512f_sqrtv8df2_mask_round */ |
| 32902 | case 1492: /* avx512f_sqrtv8df2_mask */ |
| 32903 | case 1491: /* avx512f_sqrtv8df2_round */ |
| 32904 | case 1490: /* avx512f_sqrtv8df2 */ |
| 32905 | case 1489: /* sse_sqrtv4sf2_mask */ |
| 32906 | case 1488: /* sse_sqrtv4sf2 */ |
| 32907 | case 1487: /* avx_sqrtv8sf2_mask */ |
| 32908 | case 1486: /* avx_sqrtv8sf2 */ |
| 32909 | case 1485: /* avx512f_sqrtv16sf2_mask_round */ |
| 32910 | case 1484: /* avx512f_sqrtv16sf2_mask */ |
| 32911 | case 1483: /* avx512f_sqrtv16sf2_round */ |
| 32912 | case 1482: /* avx512f_sqrtv16sf2 */ |
| 32913 | case 1466: /* sse_rcpv4sf2 */ |
| 32914 | case 1360: /* *absnegv2df2 */ |
| 32915 | case 1359: /* *absnegv4df2 */ |
| 32916 | case 1358: /* *absnegv8df2 */ |
| 32917 | case 1357: /* *absnegv4sf2 */ |
| 32918 | case 1356: /* *absnegv8sf2 */ |
| 32919 | case 1355: /* *absnegv16sf2 */ |
| 32920 | case 1354: /* kunpckdi */ |
| 32921 | case 1353: /* kunpcksi */ |
| 32922 | case 1294: /* movdi_to_sse */ |
| 32923 | case 1209: /* *vec_extractv2si_zext_mem */ |
| 32924 | case 1207: /* *vec_extractv2si_0 */ |
| 32925 | case 1137: /* *vec_extractv2sf_0 */ |
| 32926 | case 1105: /* rdpid */ |
| 32927 | case 1104: /* *wrpkru */ |
| 32928 | case 1103: /* *rdpkru */ |
| 32929 | case 1086: /* clzero_di */ |
| 32930 | case 1085: /* clzero_si */ |
| 32931 | case 1084: /* monitorx_di */ |
| 32932 | case 1083: /* monitorx_si */ |
| 32933 | case 1082: /* mwaitx */ |
| 32934 | case 1079: /* xtest_1 */ |
| 32935 | case 1078: /* xabort */ |
| 32936 | case 1077: /* xend */ |
| 32937 | case 1076: /* xbegin_1 */ |
| 32938 | case 1075: /* *pause */ |
| 32939 | case 1074: /* rdseeddi_1 */ |
| 32940 | case 1073: /* rdseedsi_1 */ |
| 32941 | case 1072: /* rdseedhi_1 */ |
| 32942 | case 1071: /* rdranddi_1 */ |
| 32943 | case 1070: /* rdrandsi_1 */ |
| 32944 | case 1069: /* rdrandhi_1 */ |
| 32945 | case 1068: /* wrgsbasedi */ |
| 32946 | case 1067: /* wrfsbasedi */ |
| 32947 | case 1066: /* wrgsbasesi */ |
| 32948 | case 1065: /* wrfsbasesi */ |
| 32949 | case 1064: /* rdgsbasedi */ |
| 32950 | case 1063: /* rdfsbasedi */ |
| 32951 | case 1062: /* rdgsbasesi */ |
| 32952 | case 1061: /* rdfsbasesi */ |
| 32953 | case 1052: /* fnclex */ |
| 32954 | case 1051: /* fnstsw */ |
| 32955 | case 1050: /* fldenv */ |
| 32956 | case 1049: /* fnstenv */ |
| 32957 | case 1048: /* xrstors64 */ |
| 32958 | case 1047: /* xrstor64 */ |
| 32959 | case 1046: /* xrstors_rex64 */ |
| 32960 | case 1045: /* xrstor_rex64 */ |
| 32961 | case 1044: /* xrstors */ |
| 32962 | case 1043: /* xrstor */ |
| 32963 | case 1042: /* xsaves64 */ |
| 32964 | case 1041: /* xsavec64 */ |
| 32965 | case 1040: /* xsaveopt64 */ |
| 32966 | case 1039: /* xsave64 */ |
| 32967 | case 1038: /* xsaves_rex64 */ |
| 32968 | case 1037: /* xsavec_rex64 */ |
| 32969 | case 1036: /* xsaveopt_rex64 */ |
| 32970 | case 1035: /* xsave_rex64 */ |
| 32971 | case 1034: /* xsaves */ |
| 32972 | case 1033: /* xsavec */ |
| 32973 | case 1032: /* xsaveopt */ |
| 32974 | case 1031: /* xsave */ |
| 32975 | case 1030: /* fxrstor64 */ |
| 32976 | case 1029: /* fxrstor */ |
| 32977 | case 1028: /* fxsave64 */ |
| 32978 | case 1027: /* fxsave */ |
| 32979 | case 1026: /* rdtscp_rex64 */ |
| 32980 | case 1025: /* rdtscp */ |
| 32981 | case 1024: /* rdtsc_rex64 */ |
| 32982 | case 1023: /* rdtsc */ |
| 32983 | case 1022: /* rdpmc_rex64 */ |
| 32984 | case 1021: /* rdpmc */ |
| 32985 | case 1016: /* stack_tls_protect_test_di */ |
| 32986 | case 1015: /* stack_tls_protect_test_si */ |
| 32987 | case 1014: /* stack_protect_test_di */ |
| 32988 | case 1013: /* stack_protect_test_si */ |
| 32989 | case 1012: /* stack_tls_protect_set_di */ |
| 32990 | case 1011: /* stack_tls_protect_set_si */ |
| 32991 | case 1010: /* stack_protect_set_di */ |
| 32992 | case 1009: /* stack_protect_set_si */ |
| 32993 | case 1005: /* trap */ |
| 32994 | case 1004: /* probe_stack_rangedi */ |
| 32995 | case 1003: /* probe_stack_rangesi */ |
| 32996 | case 1002: /* adjust_stack_and_probedi */ |
| 32997 | case 1001: /* adjust_stack_and_probesi */ |
| 32998 | case 998: /* allocate_stack_worker_probe_di */ |
| 32999 | case 997: /* allocate_stack_worker_probe_si */ |
| 33000 | case 934: /* cld */ |
| 33001 | case 932: /* fxamdf2_i387_with_temp */ |
| 33002 | case 931: /* fxamsf2_i387_with_temp */ |
| 33003 | case 930: /* fxamxf2_i387 */ |
| 33004 | case 929: /* fxamdf2_i387 */ |
| 33005 | case 928: /* fxamsf2_i387 */ |
| 33006 | case 847: /* *sqrtdf2_sse */ |
| 33007 | case 846: /* *sqrtsf2_sse */ |
| 33008 | case 811: /* *tls_dynamic_gnu2_combine_64 */ |
| 33009 | case 808: /* *tls_dynamic_gnu2_combine_32 */ |
| 33010 | case 797: /* *tls_local_dynamic_32_once */ |
| 33011 | case 796: /* *tls_local_dynamic_base_64_largepic */ |
| 33012 | case 795: /* *tls_local_dynamic_base_64_di */ |
| 33013 | case 794: /* *tls_local_dynamic_base_64_si */ |
| 33014 | case 793: /* *tls_local_dynamic_base_32_gnu */ |
| 33015 | case 792: /* *tls_global_dynamic_64_largepic */ |
| 33016 | case 791: /* *tls_global_dynamic_64_di */ |
| 33017 | case 790: /* *tls_global_dynamic_64_si */ |
| 33018 | case 789: /* *tls_global_dynamic_32_gnu */ |
| 33019 | case 788: /* *parityhi2_cmp */ |
| 33020 | case 787: /* paritysi2_cmp */ |
| 33021 | case 786: /* paritydi2_cmp */ |
| 33022 | case 785: /* bswaphi_lowpart */ |
| 33023 | case 784: /* *bswaphi_lowpart_1 */ |
| 33024 | case 778: /* *popcounthi2_1 */ |
| 33025 | case 706: /* ffssi2_no_cmove */ |
| 33026 | case 702: /* eh_return_internal */ |
| 33027 | case 698: /* *set_got_labelled */ |
| 33028 | case 697: /* *set_got */ |
| 33029 | case 696: /* pad */ |
| 33030 | case 695: /* nops */ |
| 33031 | case 694: /* nop */ |
| 33032 | case 690: /* interrupt_return */ |
| 33033 | case 688: /* prologue_use */ |
| 33034 | case 687: /* *memory_blockage */ |
| 33035 | case 686: /* blockage */ |
| 33036 | case 658: /* *jccxf_si_r_i387 */ |
| 33037 | case 657: /* *jccdf_si_r_i387 */ |
| 33038 | case 656: /* *jccsf_si_r_i387 */ |
| 33039 | case 655: /* *jccxf_hi_r_i387 */ |
| 33040 | case 654: /* *jccdf_hi_r_i387 */ |
| 33041 | case 653: /* *jccsf_hi_r_i387 */ |
| 33042 | case 652: /* *jccxf_si_i387 */ |
| 33043 | case 651: /* *jccdf_si_i387 */ |
| 33044 | case 650: /* *jccsf_si_i387 */ |
| 33045 | case 649: /* *jccxf_hi_i387 */ |
| 33046 | case 648: /* *jccdf_hi_i387 */ |
| 33047 | case 647: /* *jccsf_hi_i387 */ |
| 33048 | case 646: /* *jccuxf_r_i387 */ |
| 33049 | case 645: /* *jccudf_r_i387 */ |
| 33050 | case 644: /* *jccusf_r_i387 */ |
| 33051 | case 643: /* *jccuxf_i387 */ |
| 33052 | case 642: /* *jccudf_i387 */ |
| 33053 | case 641: /* *jccusf_i387 */ |
| 33054 | case 640: /* *jccdf_r_i387 */ |
| 33055 | case 639: /* *jccsf_r_i387 */ |
| 33056 | case 638: /* *jccdf_i387 */ |
| 33057 | case 637: /* *jccsf_i387 */ |
| 33058 | case 636: /* *jccxf_r_i387 */ |
| 33059 | case 635: /* *jccxf_i387 */ |
| 33060 | case 634: /* *jccxf_0_r_i387 */ |
| 33061 | case 633: /* *jccdf_0_r_i387 */ |
| 33062 | case 632: /* *jccsf_0_r_i387 */ |
| 33063 | case 631: /* *jccxf_0_i387 */ |
| 33064 | case 630: /* *jccdf_0_i387 */ |
| 33065 | case 629: /* *jccsf_0_i387 */ |
| 33066 | case 622: /* *setcc_si_1_movzbl */ |
| 33067 | case 621: /* *setcc_si_1_and */ |
| 33068 | case 620: /* *setcc_di_1 */ |
| 33069 | case 619: /* *jcc_btdi_mask */ |
| 33070 | case 618: /* *jcc_btsi_mask */ |
| 33071 | case 617: /* *jcc_btdi_1 */ |
| 33072 | case 616: /* *jcc_btsi_1 */ |
| 33073 | case 615: /* *jcc_btdi */ |
| 33074 | case 614: /* *jcc_btsi */ |
| 33075 | case 593: /* ix86_rotrti3_doubleword */ |
| 33076 | case 592: /* ix86_rotrdi3_doubleword */ |
| 33077 | case 591: /* ix86_rotlti3_doubleword */ |
| 33078 | case 590: /* ix86_rotldi3_doubleword */ |
| 33079 | case 589: /* *rotrdi3_mask */ |
| 33080 | case 588: /* *rotldi3_mask */ |
| 33081 | case 587: /* *rotrsi3_mask */ |
| 33082 | case 586: /* *rotlsi3_mask */ |
| 33083 | case 544: /* *ashrti3_doubleword */ |
| 33084 | case 543: /* *lshrti3_doubleword */ |
| 33085 | case 542: /* *ashrdi3_doubleword */ |
| 33086 | case 541: /* *lshrdi3_doubleword */ |
| 33087 | case 540: /* *ashrdi3_mask */ |
| 33088 | case 539: /* *lshrdi3_mask */ |
| 33089 | case 538: /* *ashrsi3_mask */ |
| 33090 | case 537: /* *lshrsi3_mask */ |
| 33091 | case 518: /* *ashldi3_mask */ |
| 33092 | case 517: /* *ashlsi3_mask */ |
| 33093 | case 514: /* *ashlti3_doubleword */ |
| 33094 | case 513: /* *ashldi3_doubleword */ |
| 33095 | case 502: /* *one_cmpldi2_doubleword */ |
| 33096 | case 501: /* copysigntf3_var */ |
| 33097 | case 500: /* copysigndf3_var */ |
| 33098 | case 499: /* copysignsf3_var */ |
| 33099 | case 498: /* copysigntf3_const */ |
| 33100 | case 497: /* copysigndf3_const */ |
| 33101 | case 496: /* copysignsf3_const */ |
| 33102 | case 483: /* *absnegtf2_sse */ |
| 33103 | case 482: /* *absnegxf2_i387 */ |
| 33104 | case 481: /* *absnegdf2 */ |
| 33105 | case 480: /* *absnegsf2 */ |
| 33106 | case 465: /* *negti2_doubleword */ |
| 33107 | case 464: /* *negdi2_doubleword */ |
| 33108 | case 422: /* *xordi3_doubleword */ |
| 33109 | case 421: /* *iordi3_doubleword */ |
| 33110 | case 414: /* *andndi3_doubleword */ |
| 33111 | case 397: /* *anddi3_doubleword */ |
| 33112 | case 396: /* *testqi_ext_3 */ |
| 33113 | case 395: /* *testqi_ext_3 */ |
| 33114 | case 394: /* *testqi_ext_3 */ |
| 33115 | case 382: /* *udivmoddi4_pow2 */ |
| 33116 | case 381: /* *udivmodsi4_pow2 */ |
| 33117 | case 380: /* *udivmoddi4 */ |
| 33118 | case 379: /* *udivmodsi4 */ |
| 33119 | case 378: /* *udivmodhi4 */ |
| 33120 | case 377: /* udivmoddi4_1 */ |
| 33121 | case 376: /* udivmodsi4_1 */ |
| 33122 | case 371: /* *divmoddi4 */ |
| 33123 | case 370: /* *divmodsi4 */ |
| 33124 | case 369: /* *divmodhi4 */ |
| 33125 | case 368: /* divmoddi4_1 */ |
| 33126 | case 367: /* divmodsi4_1 */ |
| 33127 | case 270: /* *subti3_doubleword */ |
| 33128 | case 269: /* *subdi3_doubleword */ |
| 33129 | case 216: /* *addti3_doubleword */ |
| 33130 | case 215: /* *adddi3_doubleword */ |
| 33131 | case 212: /* *floatunssixf2_i387_with_xmm */ |
| 33132 | case 211: /* *floatunssidf2_i387_with_xmm */ |
| 33133 | case 210: /* *floatunssisf2_i387_with_xmm */ |
| 33134 | case 209: /* floatdixf2_i387_with_xmm */ |
| 33135 | case 208: /* floatdidf2_i387_with_xmm */ |
| 33136 | case 207: /* floatdisf2_i387_with_xmm */ |
| 33137 | case 193: /* x86_fldcw_1 */ |
| 33138 | case 192: /* x86_fnstcw_1 */ |
| 33139 | case 169: /* *fixuns_truncdf_1 */ |
| 33140 | case 168: /* *fixuns_truncsf_1 */ |
| 33141 | case 146: /* extendsidi2_1 */ |
| 33142 | case 144: /* *zextsi_doubleword */ |
| 33143 | case 143: /* *zexthi_doubleword */ |
| 33144 | case 142: /* *zextqi_doubleword */ |
| 33145 | case 141: /* *zexthi_doubleword_and */ |
| 33146 | case 140: /* *zextqi_doubleword_and */ |
| 33147 | case 121: /* *pushdf */ |
| 33148 | case 120: /* *pushxf */ |
| 33149 | case 119: /* *pushxf_rounded */ |
| 33150 | case 118: /* *pushxf_rounded */ |
| 33151 | case 117: /* *pushtf */ |
| 33152 | case 56: /* *pushti2 */ |
| 33153 | case 55: /* *pushdi2 */ |
| 33154 | case 48: /* x86_sahf_1 */ |
| 33155 | case 47: /* x86_fnstsw_1 */ |
| 33156 | case 46: /* *cmpxf_si_cc_i387 */ |
| 33157 | case 45: /* *cmpdf_si_cc_i387 */ |
| 33158 | case 44: /* *cmpsf_si_cc_i387 */ |
| 33159 | case 43: /* *cmpxf_hi_cc_i387 */ |
| 33160 | case 42: /* *cmpdf_hi_cc_i387 */ |
| 33161 | case 41: /* *cmpsf_hi_cc_i387 */ |
| 33162 | case 40: /* *cmpxf_si_i387 */ |
| 33163 | case 39: /* *cmpdf_si_i387 */ |
| 33164 | case 38: /* *cmpsf_si_i387 */ |
| 33165 | case 37: /* *cmpxf_hi_i387 */ |
| 33166 | case 36: /* *cmpdf_hi_i387 */ |
| 33167 | case 35: /* *cmpsf_hi_i387 */ |
| 33168 | case 34: /* *cmpuxf_cc_i387 */ |
| 33169 | case 33: /* *cmpudf_cc_i387 */ |
| 33170 | case 32: /* *cmpusf_cc_i387 */ |
| 33171 | case 31: /* *cmpuxf_i387 */ |
| 33172 | case 30: /* *cmpudf_i387 */ |
| 33173 | case 29: /* *cmpusf_i387 */ |
| 33174 | case 28: /* *cmpdf_cc_i387 */ |
| 33175 | case 27: /* *cmpsf_cc_i387 */ |
| 33176 | case 26: /* *cmpdf_i387 */ |
| 33177 | case 25: /* *cmpsf_i387 */ |
| 33178 | case 24: /* *cmpxf_cc_i387 */ |
| 33179 | case 23: /* *cmpxf_i387 */ |
| 33180 | case 22: /* *cmpxf_0_cc_i387 */ |
| 33181 | case 21: /* *cmpdf_0_cc_i387 */ |
| 33182 | case 20: /* *cmpsf_0_cc_i387 */ |
| 33183 | case 19: /* *cmpxf_0_i387 */ |
| 33184 | case 18: /* *cmpdf_0_i387 */ |
| 33185 | case 17: /* *cmpsf_0_i387 */ |
| 33186 | return 9; |
| 33187 | |
| 33188 | case 4935: /* storedi_via_fpu */ |
| 33189 | case 4934: /* loaddi_via_fpu */ |
| 33190 | case 4926: /* mfence_sse2 */ |
| 33191 | case 4925: /* *sse_sfence */ |
| 33192 | case 4924: /* *sse2_lfence */ |
| 33193 | case 4899: /* vpmultishiftqbv32qi_mask */ |
| 33194 | case 4898: /* vpmultishiftqbv32qi */ |
| 33195 | case 4897: /* vpmultishiftqbv16qi_mask */ |
| 33196 | case 4896: /* vpmultishiftqbv16qi */ |
| 33197 | case 4895: /* vpmultishiftqbv64qi_mask */ |
| 33198 | case 4894: /* vpmultishiftqbv64qi */ |
| 33199 | case 4869: /* sha256rnds2 */ |
| 33200 | case 4868: /* sha256msg2 */ |
| 33201 | case 4867: /* sha256msg1 */ |
| 33202 | case 4866: /* sha1rnds4 */ |
| 33203 | case 4865: /* sha1nexte */ |
| 33204 | case 4864: /* sha1msg2 */ |
| 33205 | case 4863: /* sha1msg1 */ |
| 33206 | case 4838: /* avx512bw_dbpsadbwv32hi_mask */ |
| 33207 | case 4837: /* *avx512bw_dbpsadbwv32hi */ |
| 33208 | case 4836: /* avx512bw_dbpsadbwv16hi_mask */ |
| 33209 | case 4835: /* *avx512bw_dbpsadbwv16hi */ |
| 33210 | case 4834: /* avx512bw_dbpsadbwv8hi_mask */ |
| 33211 | case 4833: /* *avx512bw_dbpsadbwv8hi */ |
| 33212 | case 4432: /* avx2_maskstoreq256 */ |
| 33213 | case 4431: /* avx2_maskstored256 */ |
| 33214 | case 4430: /* avx2_maskstoreq */ |
| 33215 | case 4429: /* avx2_maskstored */ |
| 33216 | case 4428: /* avx_maskstorepd256 */ |
| 33217 | case 4427: /* avx_maskstoreps256 */ |
| 33218 | case 4426: /* avx_maskstorepd */ |
| 33219 | case 4425: /* avx_maskstoreps */ |
| 33220 | case 4424: /* avx2_maskloadq256 */ |
| 33221 | case 4423: /* avx2_maskloadd256 */ |
| 33222 | case 4422: /* avx2_maskloadq */ |
| 33223 | case 4421: /* avx2_maskloadd */ |
| 33224 | case 4420: /* avx_maskloadpd256 */ |
| 33225 | case 4419: /* avx_maskloadps256 */ |
| 33226 | case 4418: /* avx_maskloadpd */ |
| 33227 | case 4417: /* avx_maskloadps */ |
| 33228 | case 4416: /* vec_set_hi_v32qi */ |
| 33229 | case 4415: /* vec_set_lo_v32qi */ |
| 33230 | case 4414: /* vec_set_hi_v16hi */ |
| 33231 | case 4413: /* vec_set_lo_v16hi */ |
| 33232 | case 4412: /* vec_set_hi_v8sf_mask */ |
| 33233 | case 4411: /* vec_set_hi_v8sf */ |
| 33234 | case 4410: /* vec_set_hi_v8si_mask */ |
| 33235 | case 4409: /* vec_set_hi_v8si */ |
| 33236 | case 4408: /* vec_set_lo_v8sf_mask */ |
| 33237 | case 4407: /* vec_set_lo_v8sf */ |
| 33238 | case 4406: /* vec_set_lo_v8si_mask */ |
| 33239 | case 4405: /* vec_set_lo_v8si */ |
| 33240 | case 4404: /* vec_set_hi_v4df_mask */ |
| 33241 | case 4403: /* vec_set_hi_v4df */ |
| 33242 | case 4402: /* vec_set_hi_v4di_mask */ |
| 33243 | case 4401: /* vec_set_hi_v4di */ |
| 33244 | case 4400: /* vec_set_lo_v4df_mask */ |
| 33245 | case 4399: /* vec_set_lo_v4df */ |
| 33246 | case 4398: /* vec_set_lo_v4di_mask */ |
| 33247 | case 4397: /* vec_set_lo_v4di */ |
| 33248 | case 4390: /* *avx_vperm2f128v4df_nozero */ |
| 33249 | case 4389: /* *avx_vperm2f128v8sf_nozero */ |
| 33250 | case 4388: /* *avx_vperm2f128v8si_nozero */ |
| 33251 | case 4387: /* *avx_vperm2f128v4df_full */ |
| 33252 | case 4386: /* *avx_vperm2f128v8sf_full */ |
| 33253 | case 4385: /* *avx_vperm2f128v8si_full */ |
| 33254 | case 4384: /* avx512bw_vpermt2varv32hi3_mask */ |
| 33255 | case 4383: /* avx512vl_vpermt2varv16hi3_mask */ |
| 33256 | case 4382: /* avx512vl_vpermt2varv8hi3_mask */ |
| 33257 | case 4381: /* avx512vl_vpermt2varv32qi3_mask */ |
| 33258 | case 4380: /* avx512vl_vpermt2varv16qi3_mask */ |
| 33259 | case 4379: /* avx512bw_vpermt2varv64qi3_mask */ |
| 33260 | case 4378: /* avx512vl_vpermt2varv2df3_mask */ |
| 33261 | case 4377: /* avx512vl_vpermt2varv2di3_mask */ |
| 33262 | case 4376: /* avx512vl_vpermt2varv4sf3_mask */ |
| 33263 | case 4375: /* avx512vl_vpermt2varv4si3_mask */ |
| 33264 | case 4374: /* avx512vl_vpermt2varv4df3_mask */ |
| 33265 | case 4373: /* avx512vl_vpermt2varv4di3_mask */ |
| 33266 | case 4372: /* avx512vl_vpermt2varv8sf3_mask */ |
| 33267 | case 4371: /* avx512vl_vpermt2varv8si3_mask */ |
| 33268 | case 4370: /* avx512f_vpermt2varv8df3_mask */ |
| 33269 | case 4369: /* avx512f_vpermt2varv8di3_mask */ |
| 33270 | case 4368: /* avx512f_vpermt2varv16sf3_mask */ |
| 33271 | case 4367: /* avx512f_vpermt2varv16si3_mask */ |
| 33272 | case 4366: /* avx512bw_vpermt2varv32hi3_maskz_1 */ |
| 33273 | case 4365: /* avx512bw_vpermt2varv32hi3 */ |
| 33274 | case 4364: /* avx512vl_vpermt2varv16hi3_maskz_1 */ |
| 33275 | case 4363: /* avx512vl_vpermt2varv16hi3 */ |
| 33276 | case 4362: /* avx512vl_vpermt2varv8hi3_maskz_1 */ |
| 33277 | case 4361: /* avx512vl_vpermt2varv8hi3 */ |
| 33278 | case 4360: /* avx512vl_vpermt2varv32qi3_maskz_1 */ |
| 33279 | case 4359: /* avx512vl_vpermt2varv32qi3 */ |
| 33280 | case 4358: /* avx512vl_vpermt2varv16qi3_maskz_1 */ |
| 33281 | case 4357: /* avx512vl_vpermt2varv16qi3 */ |
| 33282 | case 4356: /* avx512bw_vpermt2varv64qi3_maskz_1 */ |
| 33283 | case 4355: /* avx512bw_vpermt2varv64qi3 */ |
| 33284 | case 4354: /* avx512vl_vpermt2varv2df3_maskz_1 */ |
| 33285 | case 4353: /* avx512vl_vpermt2varv2df3 */ |
| 33286 | case 4352: /* avx512vl_vpermt2varv2di3_maskz_1 */ |
| 33287 | case 4351: /* avx512vl_vpermt2varv2di3 */ |
| 33288 | case 4350: /* avx512vl_vpermt2varv4sf3_maskz_1 */ |
| 33289 | case 4349: /* avx512vl_vpermt2varv4sf3 */ |
| 33290 | case 4348: /* avx512vl_vpermt2varv4si3_maskz_1 */ |
| 33291 | case 4347: /* avx512vl_vpermt2varv4si3 */ |
| 33292 | case 4346: /* avx512vl_vpermt2varv4df3_maskz_1 */ |
| 33293 | case 4345: /* avx512vl_vpermt2varv4df3 */ |
| 33294 | case 4344: /* avx512vl_vpermt2varv4di3_maskz_1 */ |
| 33295 | case 4343: /* avx512vl_vpermt2varv4di3 */ |
| 33296 | case 4342: /* avx512vl_vpermt2varv8sf3_maskz_1 */ |
| 33297 | case 4341: /* avx512vl_vpermt2varv8sf3 */ |
| 33298 | case 4340: /* avx512vl_vpermt2varv8si3_maskz_1 */ |
| 33299 | case 4339: /* avx512vl_vpermt2varv8si3 */ |
| 33300 | case 4338: /* avx512f_vpermt2varv8df3_maskz_1 */ |
| 33301 | case 4337: /* avx512f_vpermt2varv8df3 */ |
| 33302 | case 4336: /* avx512f_vpermt2varv8di3_maskz_1 */ |
| 33303 | case 4335: /* avx512f_vpermt2varv8di3 */ |
| 33304 | case 4334: /* avx512f_vpermt2varv16sf3_maskz_1 */ |
| 33305 | case 4333: /* avx512f_vpermt2varv16sf3 */ |
| 33306 | case 4332: /* avx512f_vpermt2varv16si3_maskz_1 */ |
| 33307 | case 4331: /* avx512f_vpermt2varv16si3 */ |
| 33308 | case 4330: /* avx512bw_vpermi2varv32hi3_mask */ |
| 33309 | case 4329: /* avx512vl_vpermi2varv16hi3_mask */ |
| 33310 | case 4328: /* avx512vl_vpermi2varv8hi3_mask */ |
| 33311 | case 4327: /* avx512vl_vpermi2varv32qi3_mask */ |
| 33312 | case 4326: /* avx512vl_vpermi2varv16qi3_mask */ |
| 33313 | case 4325: /* avx512bw_vpermi2varv64qi3_mask */ |
| 33314 | case 4324: /* avx512vl_vpermi2varv2df3_mask */ |
| 33315 | case 4323: /* avx512vl_vpermi2varv2di3_mask */ |
| 33316 | case 4322: /* avx512vl_vpermi2varv4sf3_mask */ |
| 33317 | case 4321: /* avx512vl_vpermi2varv4si3_mask */ |
| 33318 | case 4320: /* avx512vl_vpermi2varv4df3_mask */ |
| 33319 | case 4319: /* avx512vl_vpermi2varv4di3_mask */ |
| 33320 | case 4318: /* avx512vl_vpermi2varv8sf3_mask */ |
| 33321 | case 4317: /* avx512vl_vpermi2varv8si3_mask */ |
| 33322 | case 4316: /* avx512f_vpermi2varv8df3_mask */ |
| 33323 | case 4315: /* avx512f_vpermi2varv8di3_mask */ |
| 33324 | case 4314: /* avx512f_vpermi2varv16sf3_mask */ |
| 33325 | case 4313: /* avx512f_vpermi2varv16si3_mask */ |
| 33326 | case 4312: /* avx512bw_vpermi2varv32hi3_maskz_1 */ |
| 33327 | case 4311: /* avx512bw_vpermi2varv32hi3 */ |
| 33328 | case 4310: /* avx512vl_vpermi2varv16hi3_maskz_1 */ |
| 33329 | case 4309: /* avx512vl_vpermi2varv16hi3 */ |
| 33330 | case 4308: /* avx512vl_vpermi2varv8hi3_maskz_1 */ |
| 33331 | case 4307: /* avx512vl_vpermi2varv8hi3 */ |
| 33332 | case 4306: /* avx512vl_vpermi2varv32qi3_maskz_1 */ |
| 33333 | case 4305: /* avx512vl_vpermi2varv32qi3 */ |
| 33334 | case 4304: /* avx512vl_vpermi2varv16qi3_maskz_1 */ |
| 33335 | case 4303: /* avx512vl_vpermi2varv16qi3 */ |
| 33336 | case 4302: /* avx512bw_vpermi2varv64qi3_maskz_1 */ |
| 33337 | case 4301: /* avx512bw_vpermi2varv64qi3 */ |
| 33338 | case 4300: /* avx512vl_vpermi2varv2df3_maskz_1 */ |
| 33339 | case 4299: /* avx512vl_vpermi2varv2df3 */ |
| 33340 | case 4298: /* avx512vl_vpermi2varv2di3_maskz_1 */ |
| 33341 | case 4297: /* avx512vl_vpermi2varv2di3 */ |
| 33342 | case 4296: /* avx512vl_vpermi2varv4sf3_maskz_1 */ |
| 33343 | case 4295: /* avx512vl_vpermi2varv4sf3 */ |
| 33344 | case 4294: /* avx512vl_vpermi2varv4si3_maskz_1 */ |
| 33345 | case 4293: /* avx512vl_vpermi2varv4si3 */ |
| 33346 | case 4292: /* avx512vl_vpermi2varv4df3_maskz_1 */ |
| 33347 | case 4291: /* avx512vl_vpermi2varv4df3 */ |
| 33348 | case 4290: /* avx512vl_vpermi2varv4di3_maskz_1 */ |
| 33349 | case 4289: /* avx512vl_vpermi2varv4di3 */ |
| 33350 | case 4288: /* avx512vl_vpermi2varv8sf3_maskz_1 */ |
| 33351 | case 4287: /* avx512vl_vpermi2varv8sf3 */ |
| 33352 | case 4286: /* avx512vl_vpermi2varv8si3_maskz_1 */ |
| 33353 | case 4285: /* avx512vl_vpermi2varv8si3 */ |
| 33354 | case 4284: /* avx512f_vpermi2varv8df3_maskz_1 */ |
| 33355 | case 4283: /* avx512f_vpermi2varv8df3 */ |
| 33356 | case 4282: /* avx512f_vpermi2varv8di3_maskz_1 */ |
| 33357 | case 4281: /* avx512f_vpermi2varv8di3 */ |
| 33358 | case 4280: /* avx512f_vpermi2varv16sf3_maskz_1 */ |
| 33359 | case 4279: /* avx512f_vpermi2varv16sf3 */ |
| 33360 | case 4278: /* avx512f_vpermi2varv16si3_maskz_1 */ |
| 33361 | case 4277: /* avx512f_vpermi2varv16si3 */ |
| 33362 | case 4276: /* avx_vpermilvarv2df3_mask */ |
| 33363 | case 4275: /* avx_vpermilvarv2df3 */ |
| 33364 | case 4274: /* avx_vpermilvarv4df3_mask */ |
| 33365 | case 4273: /* avx_vpermilvarv4df3 */ |
| 33366 | case 4272: /* avx512f_vpermilvarv8df3_mask */ |
| 33367 | case 4271: /* avx512f_vpermilvarv8df3 */ |
| 33368 | case 4270: /* avx_vpermilvarv4sf3_mask */ |
| 33369 | case 4269: /* avx_vpermilvarv4sf3 */ |
| 33370 | case 4268: /* avx_vpermilvarv8sf3_mask */ |
| 33371 | case 4267: /* avx_vpermilvarv8sf3 */ |
| 33372 | case 4266: /* avx512f_vpermilvarv16sf3_mask */ |
| 33373 | case 4265: /* avx512f_vpermilvarv16sf3 */ |
| 33374 | case 4264: /* *avx_vpermilpv2df_mask */ |
| 33375 | case 4263: /* *avx_vpermilpv2df */ |
| 33376 | case 4262: /* *avx_vpermilpv4df_mask */ |
| 33377 | case 4261: /* *avx_vpermilpv4df */ |
| 33378 | case 4260: /* *avx512f_vpermilpv8df_mask */ |
| 33379 | case 4259: /* *avx512f_vpermilpv8df */ |
| 33380 | case 4258: /* *avx_vpermilpv4sf_mask */ |
| 33381 | case 4257: /* *avx_vpermilpv4sf */ |
| 33382 | case 4256: /* *avx_vpermilpv8sf_mask */ |
| 33383 | case 4255: /* *avx_vpermilpv8sf */ |
| 33384 | case 4254: /* *avx512f_vpermilpv16sf_mask */ |
| 33385 | case 4253: /* *avx512f_vpermilpv16sf */ |
| 33386 | case 4110: /* avx2_vec_dupv4df */ |
| 33387 | case 4109: /* avx2_permv2ti */ |
| 33388 | case 4108: /* avx512f_permv8di_1_mask */ |
| 33389 | case 4107: /* avx512f_permv8di_1 */ |
| 33390 | case 4106: /* avx512f_permv8df_1_mask */ |
| 33391 | case 4105: /* avx512f_permv8df_1 */ |
| 33392 | case 4104: /* avx2_permv4df_1_mask */ |
| 33393 | case 4103: /* avx2_permv4df_1 */ |
| 33394 | case 4102: /* avx2_permv4di_1_mask */ |
| 33395 | case 4101: /* avx2_permv4di_1 */ |
| 33396 | case 4100: /* avx512bw_permvarv32hi_mask */ |
| 33397 | case 4099: /* avx512bw_permvarv32hi */ |
| 33398 | case 4098: /* avx512vl_permvarv16hi_mask */ |
| 33399 | case 4097: /* avx512vl_permvarv16hi */ |
| 33400 | case 4096: /* avx512vl_permvarv8hi_mask */ |
| 33401 | case 4095: /* avx512vl_permvarv8hi */ |
| 33402 | case 4094: /* avx512vl_permvarv32qi_mask */ |
| 33403 | case 4093: /* avx512vl_permvarv32qi */ |
| 33404 | case 4092: /* avx512vl_permvarv16qi_mask */ |
| 33405 | case 4091: /* avx512vl_permvarv16qi */ |
| 33406 | case 4090: /* avx512bw_permvarv64qi_mask */ |
| 33407 | case 4089: /* avx512bw_permvarv64qi */ |
| 33408 | case 4088: /* avx2_permvarv4df_mask */ |
| 33409 | case 4087: /* avx2_permvarv4df */ |
| 33410 | case 4086: /* avx2_permvarv4di_mask */ |
| 33411 | case 4085: /* avx2_permvarv4di */ |
| 33412 | case 4084: /* avx512f_permvarv8df_mask */ |
| 33413 | case 4083: /* avx512f_permvarv8df */ |
| 33414 | case 4082: /* avx512f_permvarv8di_mask */ |
| 33415 | case 4081: /* avx512f_permvarv8di */ |
| 33416 | case 4080: /* avx512f_permvarv16sf_mask */ |
| 33417 | case 4079: /* avx512f_permvarv16sf */ |
| 33418 | case 4078: /* avx512f_permvarv16si_mask */ |
| 33419 | case 4077: /* avx512f_permvarv16si */ |
| 33420 | case 4076: /* avx2_permvarv8sf_mask */ |
| 33421 | case 4075: /* avx2_permvarv8sf */ |
| 33422 | case 4074: /* avx2_permvarv8si_mask */ |
| 33423 | case 4073: /* avx2_permvarv8si */ |
| 33424 | case 4054: /* pclmulqdq */ |
| 33425 | case 4053: /* aeskeygenassist */ |
| 33426 | case 4052: /* aesimc */ |
| 33427 | case 4051: /* aesdeclast */ |
| 33428 | case 4050: /* aesdec */ |
| 33429 | case 4049: /* aesenclast */ |
| 33430 | case 4048: /* aesenc */ |
| 33431 | case 4043: /* xop_pcom_tfv2di3 */ |
| 33432 | case 4042: /* xop_pcom_tfv4si3 */ |
| 33433 | case 4041: /* xop_pcom_tfv8hi3 */ |
| 33434 | case 4040: /* xop_pcom_tfv16qi3 */ |
| 33435 | case 4039: /* xop_maskcmp_uns2v2di3 */ |
| 33436 | case 4038: /* xop_maskcmp_uns2v4si3 */ |
| 33437 | case 4037: /* xop_maskcmp_uns2v8hi3 */ |
| 33438 | case 4036: /* xop_maskcmp_uns2v16qi3 */ |
| 33439 | case 4035: /* xop_maskcmp_unsv2di3 */ |
| 33440 | case 4034: /* xop_maskcmp_unsv4si3 */ |
| 33441 | case 4033: /* xop_maskcmp_unsv8hi3 */ |
| 33442 | case 4032: /* xop_maskcmp_unsv16qi3 */ |
| 33443 | case 3904: /* sse4_2_pcmpistr_cconly */ |
| 33444 | case 3903: /* sse4_2_pcmpistrm */ |
| 33445 | case 3902: /* sse4_2_pcmpistri */ |
| 33446 | case 3901: /* sse4_2_pcmpistr */ |
| 33447 | case 3900: /* sse4_2_pcmpestr_cconly */ |
| 33448 | case 3899: /* sse4_2_pcmpestrm */ |
| 33449 | case 3898: /* sse4_2_pcmpestri */ |
| 33450 | case 3897: /* sse4_2_pcmpestr */ |
| 33451 | case 3890: /* ptesttf2 */ |
| 33452 | case 3889: /* avx_ptestv4df */ |
| 33453 | case 3888: /* avx_ptestv8sf */ |
| 33454 | case 3887: /* avx_ptestv4di */ |
| 33455 | case 3886: /* avx_ptestv8si */ |
| 33456 | case 3885: /* avx_ptestv16hi */ |
| 33457 | case 3884: /* avx_ptestv32qi */ |
| 33458 | case 3883: /* sse4_1_ptestv2df */ |
| 33459 | case 3882: /* sse4_1_ptestv4sf */ |
| 33460 | case 3881: /* sse4_1_ptestv2di */ |
| 33461 | case 3880: /* sse4_1_ptestv4si */ |
| 33462 | case 3879: /* sse4_1_ptestv8hi */ |
| 33463 | case 3878: /* sse4_1_ptestv16qi */ |
| 33464 | case 3877: /* avx_vtestpd */ |
| 33465 | case 3876: /* avx_vtestpd256 */ |
| 33466 | case 3875: /* avx_vtestps */ |
| 33467 | case 3874: /* avx_vtestps256 */ |
| 33468 | case 3801: /* sse4_1_phminposuw */ |
| 33469 | case 3794: /* sse4_1_packusdw_mask */ |
| 33470 | case 3793: /* sse4_1_packusdw */ |
| 33471 | case 3792: /* avx2_packusdw_mask */ |
| 33472 | case 3791: /* avx2_packusdw */ |
| 33473 | case 3790: /* avx512bw_packusdw_mask */ |
| 33474 | case 3789: /* avx512bw_packusdw */ |
| 33475 | case 3788: /* sse4_1_mpsadbw */ |
| 33476 | case 3787: /* avx2_mpsadbw */ |
| 33477 | case 3763: /* absv2si2 */ |
| 33478 | case 3762: /* absv4hi2 */ |
| 33479 | case 3761: /* absv8qi2 */ |
| 33480 | case 3760: /* absv8hi2_mask */ |
| 33481 | case 3759: /* absv16hi2_mask */ |
| 33482 | case 3758: /* absv32hi2_mask */ |
| 33483 | case 3757: /* absv32qi2_mask */ |
| 33484 | case 3756: /* absv16qi2_mask */ |
| 33485 | case 3755: /* absv64qi2_mask */ |
| 33486 | case 3754: /* absv2di2_mask */ |
| 33487 | case 3753: /* absv4di2_mask */ |
| 33488 | case 3752: /* absv8di2_mask */ |
| 33489 | case 3751: /* absv4si2_mask */ |
| 33490 | case 3750: /* absv8si2_mask */ |
| 33491 | case 3749: /* absv16si2_mask */ |
| 33492 | case 3748: /* *absv2di2 */ |
| 33493 | case 3747: /* *absv4di2 */ |
| 33494 | case 3746: /* *absv8di2 */ |
| 33495 | case 3745: /* *absv4si2 */ |
| 33496 | case 3744: /* *absv8si2 */ |
| 33497 | case 3743: /* *absv16si2 */ |
| 33498 | case 3742: /* *absv8hi2 */ |
| 33499 | case 3741: /* *absv16hi2 */ |
| 33500 | case 3740: /* *absv32hi2 */ |
| 33501 | case 3739: /* *absv16qi2 */ |
| 33502 | case 3738: /* *absv32qi2 */ |
| 33503 | case 3737: /* *absv64qi2 */ |
| 33504 | case 3729: /* ssse3_psignv2si3 */ |
| 33505 | case 3728: /* ssse3_psignv4hi3 */ |
| 33506 | case 3727: /* ssse3_psignv8qi3 */ |
| 33507 | case 3726: /* ssse3_psignv4si3 */ |
| 33508 | case 3725: /* avx2_psignv8si3 */ |
| 33509 | case 3724: /* ssse3_psignv8hi3 */ |
| 33510 | case 3723: /* avx2_psignv16hi3 */ |
| 33511 | case 3722: /* ssse3_psignv16qi3 */ |
| 33512 | case 3721: /* avx2_psignv32qi3 */ |
| 33513 | case 3720: /* ssse3_pshufbv8qi3 */ |
| 33514 | case 3719: /* ssse3_pshufbv16qi3_mask */ |
| 33515 | case 3718: /* ssse3_pshufbv16qi3 */ |
| 33516 | case 3717: /* avx2_pshufbv32qi3_mask */ |
| 33517 | case 3716: /* avx2_pshufbv32qi3 */ |
| 33518 | case 3715: /* avx512bw_pshufbv64qi3_mask */ |
| 33519 | case 3714: /* avx512bw_pshufbv64qi3 */ |
| 33520 | case 3674: /* sse2_clflush */ |
| 33521 | case 3635: /* *vec_extractv4si_zext */ |
| 33522 | case 3634: /* *vec_extractv4si */ |
| 33523 | case 3626: /* *vec_extractv8hi_zext */ |
| 33524 | case 3625: /* *vec_extractv8hi_zext */ |
| 33525 | case 3624: /* *vec_extractv16qi_zext */ |
| 33526 | case 3623: /* *vec_extractv16qi_zext */ |
| 33527 | case 3622: /* *vec_extractv8hi */ |
| 33528 | case 3621: /* *vec_extractv16qi */ |
| 33529 | case 3619: /* sse2_pshufhw_1_mask */ |
| 33530 | case 3618: /* sse2_pshufhw_1 */ |
| 33531 | case 3617: /* avx2_pshufhw_1_mask */ |
| 33532 | case 3616: /* avx2_pshufhw_1 */ |
| 33533 | case 3615: /* avx512bw_pshufhwv32hi_mask */ |
| 33534 | case 3614: /* *avx512bw_pshufhwv32hi */ |
| 33535 | case 3613: /* sse2_pshuflw_1_mask */ |
| 33536 | case 3612: /* sse2_pshuflw_1 */ |
| 33537 | case 3611: /* avx2_pshuflw_1_mask */ |
| 33538 | case 3610: /* avx2_pshuflw_1 */ |
| 33539 | case 3609: /* avx512bw_pshuflwv32hi_mask */ |
| 33540 | case 3608: /* *avx512bw_pshuflwv32hi */ |
| 33541 | case 3607: /* sse2_pshufd_1_mask */ |
| 33542 | case 3606: /* sse2_pshufd_1 */ |
| 33543 | case 3605: /* avx2_pshufd_1_mask */ |
| 33544 | case 3604: /* avx2_pshufd_1 */ |
| 33545 | case 3603: /* avx512f_pshufd_1_mask */ |
| 33546 | case 3602: /* avx512f_pshufd_1 */ |
| 33547 | case 3601: /* avx512f_shuf_i32x4_1_mask */ |
| 33548 | case 3600: /* avx512f_shuf_i32x4_1 */ |
| 33549 | case 3599: /* avx512f_shuf_f32x4_1_mask */ |
| 33550 | case 3598: /* avx512f_shuf_f32x4_1 */ |
| 33551 | case 3597: /* avx512vl_shuf_f32x4_1_mask */ |
| 33552 | case 3596: /* avx512vl_shuf_f32x4_1 */ |
| 33553 | case 3595: /* avx512vl_shuf_i32x4_1_mask */ |
| 33554 | case 3594: /* avx512vl_shuf_i32x4_1 */ |
| 33555 | case 3593: /* avx512f_shuf_i64x2_1_mask */ |
| 33556 | case 3592: /* avx512f_shuf_i64x2_1 */ |
| 33557 | case 3591: /* avx512f_shuf_f64x2_1_mask */ |
| 33558 | case 3590: /* avx512f_shuf_f64x2_1 */ |
| 33559 | case 3589: /* avx512dq_shuf_f64x2_1_mask */ |
| 33560 | case 3588: /* *avx512dq_shuf_f64x2_1 */ |
| 33561 | case 3587: /* avx512dq_shuf_i64x2_1_mask */ |
| 33562 | case 3586: /* *avx512dq_shuf_i64x2_1 */ |
| 33563 | case 3585: /* vec_set_hi_v8di_mask */ |
| 33564 | case 3584: /* vec_set_hi_v8di */ |
| 33565 | case 3583: /* vec_set_hi_v8df_mask */ |
| 33566 | case 3582: /* vec_set_hi_v8df */ |
| 33567 | case 3581: /* vec_set_lo_v8di_mask */ |
| 33568 | case 3580: /* vec_set_lo_v8di */ |
| 33569 | case 3579: /* vec_set_lo_v8df_mask */ |
| 33570 | case 3578: /* vec_set_lo_v8df */ |
| 33571 | case 3577: /* vec_set_hi_v16si_mask */ |
| 33572 | case 3576: /* vec_set_hi_v16si */ |
| 33573 | case 3575: /* vec_set_hi_v16sf_mask */ |
| 33574 | case 3574: /* vec_set_hi_v16sf */ |
| 33575 | case 3573: /* vec_set_lo_v16si_mask */ |
| 33576 | case 3572: /* vec_set_lo_v16si */ |
| 33577 | case 3571: /* vec_set_lo_v16sf_mask */ |
| 33578 | case 3570: /* vec_set_lo_v16sf */ |
| 33579 | case 3569: /* avx512f_vinserti32x4_1_mask */ |
| 33580 | case 3568: /* *avx512f_vinserti32x4_1 */ |
| 33581 | case 3567: /* avx512f_vinsertf32x4_1_mask */ |
| 33582 | case 3566: /* *avx512f_vinsertf32x4_1 */ |
| 33583 | case 3565: /* avx512dq_vinserti64x2_1_mask */ |
| 33584 | case 3564: /* *avx512dq_vinserti64x2_1 */ |
| 33585 | case 3563: /* avx512dq_vinsertf64x2_1_mask */ |
| 33586 | case 3562: /* *avx512dq_vinsertf64x2_1 */ |
| 33587 | case 3561: /* sse4_1_pinsrq */ |
| 33588 | case 3560: /* sse4_1_pinsrd */ |
| 33589 | case 3559: /* sse2_pinsrw */ |
| 33590 | case 3558: /* sse4_1_pinsrb */ |
| 33591 | case 3557: /* vec_interleave_lowv4si_mask */ |
| 33592 | case 3556: /* vec_interleave_lowv4si */ |
| 33593 | case 3555: /* avx512f_interleave_lowv16si_mask */ |
| 33594 | case 3554: /* *avx512f_interleave_lowv16si */ |
| 33595 | case 3553: /* avx2_interleave_lowv8si_mask */ |
| 33596 | case 3552: /* avx2_interleave_lowv8si */ |
| 33597 | case 3551: /* vec_interleave_highv4si_mask */ |
| 33598 | case 3550: /* vec_interleave_highv4si */ |
| 33599 | case 3549: /* avx512f_interleave_highv16si_mask */ |
| 33600 | case 3548: /* *avx512f_interleave_highv16si */ |
| 33601 | case 3547: /* avx2_interleave_highv8si_mask */ |
| 33602 | case 3546: /* avx2_interleave_highv8si */ |
| 33603 | case 3545: /* vec_interleave_lowv8hi_mask */ |
| 33604 | case 3544: /* vec_interleave_lowv8hi */ |
| 33605 | case 3543: /* avx2_interleave_lowv16hi_mask */ |
| 33606 | case 3542: /* avx2_interleave_lowv16hi */ |
| 33607 | case 3541: /* avx512bw_interleave_lowv32hi_mask */ |
| 33608 | case 3540: /* *avx512bw_interleave_lowv32hi */ |
| 33609 | case 3539: /* vec_interleave_highv8hi_mask */ |
| 33610 | case 3538: /* vec_interleave_highv8hi */ |
| 33611 | case 3537: /* avx2_interleave_highv16hi_mask */ |
| 33612 | case 3536: /* avx2_interleave_highv16hi */ |
| 33613 | case 3535: /* avx512bw_interleave_highv32hi_mask */ |
| 33614 | case 3534: /* avx512bw_interleave_highv32hi */ |
| 33615 | case 3533: /* vec_interleave_lowv16qi_mask */ |
| 33616 | case 3532: /* vec_interleave_lowv16qi */ |
| 33617 | case 3531: /* avx2_interleave_lowv32qi_mask */ |
| 33618 | case 3530: /* avx2_interleave_lowv32qi */ |
| 33619 | case 3529: /* avx512bw_interleave_lowv64qi_mask */ |
| 33620 | case 3528: /* avx512bw_interleave_lowv64qi */ |
| 33621 | case 3527: /* vec_interleave_highv16qi_mask */ |
| 33622 | case 3526: /* vec_interleave_highv16qi */ |
| 33623 | case 3525: /* avx2_interleave_highv32qi_mask */ |
| 33624 | case 3524: /* avx2_interleave_highv32qi */ |
| 33625 | case 3523: /* avx512bw_interleave_highv64qi_mask */ |
| 33626 | case 3522: /* avx512bw_interleave_highv64qi */ |
| 33627 | case 3521: /* sse2_packuswb_mask */ |
| 33628 | case 3520: /* sse2_packuswb */ |
| 33629 | case 3519: /* avx2_packuswb_mask */ |
| 33630 | case 3518: /* avx2_packuswb */ |
| 33631 | case 3517: /* avx512bw_packuswb_mask */ |
| 33632 | case 3516: /* avx512bw_packuswb */ |
| 33633 | case 3515: /* sse2_packssdw_mask */ |
| 33634 | case 3514: /* sse2_packssdw */ |
| 33635 | case 3513: /* avx2_packssdw_mask */ |
| 33636 | case 3512: /* avx2_packssdw */ |
| 33637 | case 3511: /* avx512bw_packssdw_mask */ |
| 33638 | case 3510: /* avx512bw_packssdw */ |
| 33639 | case 3509: /* sse2_packsswb_mask */ |
| 33640 | case 3508: /* sse2_packsswb */ |
| 33641 | case 3507: /* avx2_packsswb_mask */ |
| 33642 | case 3506: /* avx2_packsswb */ |
| 33643 | case 3505: /* avx512bw_packsswb_mask */ |
| 33644 | case 3504: /* avx512bw_packsswb */ |
| 33645 | case 3455: /* *xorv8hi3 */ |
| 33646 | case 3454: /* *iorv8hi3 */ |
| 33647 | case 3453: /* *andv8hi3 */ |
| 33648 | case 3452: /* *xorv16hi3 */ |
| 33649 | case 3451: /* *iorv16hi3 */ |
| 33650 | case 3450: /* *andv16hi3 */ |
| 33651 | case 3449: /* *xorv32hi3 */ |
| 33652 | case 3448: /* *iorv32hi3 */ |
| 33653 | case 3447: /* *andv32hi3 */ |
| 33654 | case 3446: /* *xorv16qi3 */ |
| 33655 | case 3445: /* *iorv16qi3 */ |
| 33656 | case 3444: /* *andv16qi3 */ |
| 33657 | case 3443: /* *xorv32qi3 */ |
| 33658 | case 3442: /* *iorv32qi3 */ |
| 33659 | case 3441: /* *andv32qi3 */ |
| 33660 | case 3440: /* *xorv64qi3 */ |
| 33661 | case 3439: /* *iorv64qi3 */ |
| 33662 | case 3438: /* *andv64qi3 */ |
| 33663 | case 3437: /* xorv2di3_mask */ |
| 33664 | case 3436: /* *xorv2di3 */ |
| 33665 | case 3435: /* iorv2di3_mask */ |
| 33666 | case 3434: /* *iorv2di3 */ |
| 33667 | case 3433: /* andv2di3_mask */ |
| 33668 | case 3432: /* *andv2di3 */ |
| 33669 | case 3431: /* xorv4di3_mask */ |
| 33670 | case 3430: /* *xorv4di3 */ |
| 33671 | case 3429: /* iorv4di3_mask */ |
| 33672 | case 3428: /* *iorv4di3 */ |
| 33673 | case 3427: /* andv4di3_mask */ |
| 33674 | case 3426: /* *andv4di3 */ |
| 33675 | case 3425: /* xorv8di3_mask */ |
| 33676 | case 3424: /* *xorv8di3 */ |
| 33677 | case 3423: /* iorv8di3_mask */ |
| 33678 | case 3422: /* *iorv8di3 */ |
| 33679 | case 3421: /* andv8di3_mask */ |
| 33680 | case 3420: /* *andv8di3 */ |
| 33681 | case 3419: /* xorv4si3_mask */ |
| 33682 | case 3418: /* *xorv4si3 */ |
| 33683 | case 3417: /* iorv4si3_mask */ |
| 33684 | case 3416: /* *iorv4si3 */ |
| 33685 | case 3415: /* andv4si3_mask */ |
| 33686 | case 3414: /* *andv4si3 */ |
| 33687 | case 3413: /* xorv8si3_mask */ |
| 33688 | case 3412: /* *xorv8si3 */ |
| 33689 | case 3411: /* iorv8si3_mask */ |
| 33690 | case 3410: /* *iorv8si3 */ |
| 33691 | case 3409: /* andv8si3_mask */ |
| 33692 | case 3408: /* *andv8si3 */ |
| 33693 | case 3407: /* xorv16si3_mask */ |
| 33694 | case 3406: /* *xorv16si3 */ |
| 33695 | case 3405: /* iorv16si3_mask */ |
| 33696 | case 3404: /* *iorv16si3 */ |
| 33697 | case 3403: /* andv16si3_mask */ |
| 33698 | case 3402: /* *andv16si3 */ |
| 33699 | case 3401: /* *andnotv2di3_mask */ |
| 33700 | case 3400: /* *andnotv4di3_mask */ |
| 33701 | case 3399: /* *andnotv8di3_mask */ |
| 33702 | case 3398: /* *andnotv4si3_mask */ |
| 33703 | case 3397: /* *andnotv8si3_mask */ |
| 33704 | case 3396: /* *andnotv16si3_mask */ |
| 33705 | case 3395: /* *andnotv2di3 */ |
| 33706 | case 3394: /* *andnotv4di3 */ |
| 33707 | case 3393: /* *andnotv4si3 */ |
| 33708 | case 3392: /* *andnotv8si3 */ |
| 33709 | case 3391: /* *andnotv8hi3 */ |
| 33710 | case 3390: /* *andnotv16hi3 */ |
| 33711 | case 3389: /* *andnotv32hi3 */ |
| 33712 | case 3388: /* *andnotv16qi3 */ |
| 33713 | case 3387: /* *andnotv32qi3 */ |
| 33714 | case 3386: /* *andnotv64qi3 */ |
| 33715 | case 3385: /* *andnotv8di3 */ |
| 33716 | case 3384: /* *andnotv16si3 */ |
| 33717 | case 3383: /* sse2_gtv4si3 */ |
| 33718 | case 3382: /* sse2_gtv8hi3 */ |
| 33719 | case 3381: /* sse2_gtv16qi3 */ |
| 33720 | case 3380: /* avx512vl_gtv8hi3_mask */ |
| 33721 | case 3379: /* avx512vl_gtv8hi3 */ |
| 33722 | case 3378: /* avx512vl_gtv16hi3_mask */ |
| 33723 | case 3377: /* avx512vl_gtv16hi3 */ |
| 33724 | case 3376: /* avx512bw_gtv32hi3_mask */ |
| 33725 | case 3375: /* avx512bw_gtv32hi3 */ |
| 33726 | case 3374: /* avx512vl_gtv32qi3_mask */ |
| 33727 | case 3373: /* avx512vl_gtv32qi3 */ |
| 33728 | case 3372: /* avx512vl_gtv16qi3_mask */ |
| 33729 | case 3371: /* avx512vl_gtv16qi3 */ |
| 33730 | case 3370: /* avx512bw_gtv64qi3_mask */ |
| 33731 | case 3369: /* avx512bw_gtv64qi3 */ |
| 33732 | case 3368: /* avx512vl_gtv2di3_mask */ |
| 33733 | case 3367: /* avx512vl_gtv2di3 */ |
| 33734 | case 3366: /* avx512vl_gtv4di3_mask */ |
| 33735 | case 3365: /* avx512vl_gtv4di3 */ |
| 33736 | case 3364: /* avx512f_gtv8di3_mask */ |
| 33737 | case 3363: /* avx512f_gtv8di3 */ |
| 33738 | case 3362: /* avx512vl_gtv4si3_mask */ |
| 33739 | case 3361: /* avx512vl_gtv4si3 */ |
| 33740 | case 3360: /* avx512vl_gtv8si3_mask */ |
| 33741 | case 3359: /* avx512vl_gtv8si3 */ |
| 33742 | case 3358: /* avx512f_gtv16si3_mask */ |
| 33743 | case 3357: /* avx512f_gtv16si3 */ |
| 33744 | case 3356: /* avx2_gtv4di3 */ |
| 33745 | case 3355: /* avx2_gtv8si3 */ |
| 33746 | case 3354: /* avx2_gtv16hi3 */ |
| 33747 | case 3353: /* avx2_gtv32qi3 */ |
| 33748 | case 3352: /* sse4_2_gtv2di3 */ |
| 33749 | case 3351: /* *sse2_eqv4si3 */ |
| 33750 | case 3350: /* *sse2_eqv8hi3 */ |
| 33751 | case 3349: /* *sse2_eqv16qi3 */ |
| 33752 | case 3348: /* *sse4_1_eqv2di3 */ |
| 33753 | case 3347: /* avx512vl_eqv2di3_mask_1 */ |
| 33754 | case 3346: /* avx512vl_eqv2di3_1 */ |
| 33755 | case 3345: /* avx512vl_eqv4di3_mask_1 */ |
| 33756 | case 3344: /* avx512vl_eqv4di3_1 */ |
| 33757 | case 3343: /* avx512f_eqv8di3_mask_1 */ |
| 33758 | case 3342: /* avx512f_eqv8di3_1 */ |
| 33759 | case 3341: /* avx512vl_eqv4si3_mask_1 */ |
| 33760 | case 3340: /* avx512vl_eqv4si3_1 */ |
| 33761 | case 3339: /* avx512vl_eqv8si3_mask_1 */ |
| 33762 | case 3338: /* avx512vl_eqv8si3_1 */ |
| 33763 | case 3337: /* avx512f_eqv16si3_mask_1 */ |
| 33764 | case 3336: /* avx512f_eqv16si3_1 */ |
| 33765 | case 3335: /* avx512vl_eqv8hi3_mask_1 */ |
| 33766 | case 3334: /* avx512vl_eqv8hi3_1 */ |
| 33767 | case 3333: /* avx512vl_eqv16hi3_mask_1 */ |
| 33768 | case 3332: /* avx512vl_eqv16hi3_1 */ |
| 33769 | case 3331: /* avx512bw_eqv32hi3_mask_1 */ |
| 33770 | case 3330: /* avx512bw_eqv32hi3_1 */ |
| 33771 | case 3329: /* avx512vl_eqv32qi3_mask_1 */ |
| 33772 | case 3328: /* avx512vl_eqv32qi3_1 */ |
| 33773 | case 3327: /* avx512vl_eqv16qi3_mask_1 */ |
| 33774 | case 3326: /* avx512vl_eqv16qi3_1 */ |
| 33775 | case 3325: /* avx512bw_eqv64qi3_mask_1 */ |
| 33776 | case 3324: /* avx512bw_eqv64qi3_1 */ |
| 33777 | case 3323: /* *avx2_eqv4di3 */ |
| 33778 | case 3322: /* *avx2_eqv8si3 */ |
| 33779 | case 3321: /* *avx2_eqv16hi3 */ |
| 33780 | case 3320: /* *avx2_eqv32qi3 */ |
| 33781 | case 2734: /* vec_dupv2df_mask */ |
| 33782 | case 2733: /* vec_dupv2df */ |
| 33783 | case 2723: /* vec_interleave_lowv2di_mask */ |
| 33784 | case 2722: /* vec_interleave_lowv2di */ |
| 33785 | case 2721: /* avx512f_interleave_lowv8di_mask */ |
| 33786 | case 2720: /* *avx512f_interleave_lowv8di */ |
| 33787 | case 2719: /* avx2_interleave_lowv4di_mask */ |
| 33788 | case 2718: /* avx2_interleave_lowv4di */ |
| 33789 | case 2717: /* vec_interleave_highv2di_mask */ |
| 33790 | case 2716: /* vec_interleave_highv2di */ |
| 33791 | case 2715: /* avx512f_interleave_highv8di_mask */ |
| 33792 | case 2714: /* *avx512f_interleave_highv8di */ |
| 33793 | case 2713: /* avx2_interleave_highv4di_mask */ |
| 33794 | case 2712: /* avx2_interleave_highv4di */ |
| 33795 | case 2708: /* avx512f_shufpd512_1_mask */ |
| 33796 | case 2707: /* avx512f_shufpd512_1 */ |
| 33797 | case 2706: /* avx512f_shufps512_1_mask */ |
| 33798 | case 2705: /* avx512f_shufps512_1 */ |
| 33799 | case 2588: /* avx512vl_vternlogv2di_mask */ |
| 33800 | case 2587: /* avx512vl_vternlogv4di_mask */ |
| 33801 | case 2586: /* avx512f_vternlogv8di_mask */ |
| 33802 | case 2585: /* avx512vl_vternlogv4si_mask */ |
| 33803 | case 2584: /* avx512vl_vternlogv8si_mask */ |
| 33804 | case 2583: /* avx512f_vternlogv16si_mask */ |
| 33805 | case 2582: /* avx512vl_vternlogv2di_maskz_1 */ |
| 33806 | case 2581: /* avx512vl_vternlogv2di */ |
| 33807 | case 2580: /* avx512vl_vternlogv4di_maskz_1 */ |
| 33808 | case 2579: /* avx512vl_vternlogv4di */ |
| 33809 | case 2578: /* avx512f_vternlogv8di_maskz_1 */ |
| 33810 | case 2577: /* avx512f_vternlogv8di */ |
| 33811 | case 2576: /* avx512vl_vternlogv4si_maskz_1 */ |
| 33812 | case 2575: /* avx512vl_vternlogv4si */ |
| 33813 | case 2574: /* avx512vl_vternlogv8si_maskz_1 */ |
| 33814 | case 2573: /* avx512vl_vternlogv8si */ |
| 33815 | case 2572: /* avx512f_vternlogv16si_maskz_1 */ |
| 33816 | case 2571: /* avx512f_vternlogv16si */ |
| 33817 | case 2541: /* avx512vl_unpcklpd128_mask */ |
| 33818 | case 2540: /* *avx_unpcklpd256_mask */ |
| 33819 | case 2539: /* *avx_unpcklpd256 */ |
| 33820 | case 2538: /* *avx512f_unpcklpd512_mask */ |
| 33821 | case 2537: /* *avx512f_unpcklpd512 */ |
| 33822 | case 2535: /* avx512vl_unpckhpd128_mask */ |
| 33823 | case 2534: /* avx_unpckhpd256_mask */ |
| 33824 | case 2533: /* avx_unpckhpd256 */ |
| 33825 | case 2532: /* avx512f_unpckhpd512_mask */ |
| 33826 | case 2531: /* *avx512f_unpckhpd512 */ |
| 33827 | case 2530: /* vec_extract_hi_v32qi */ |
| 33828 | case 2528: /* vec_extract_hi_v64qi */ |
| 33829 | case 2526: /* vec_extract_hi_v16hi */ |
| 33830 | case 2524: /* vec_extract_hi_v32hi */ |
| 33831 | case 2522: /* vec_extract_hi_v8sf */ |
| 33832 | case 2521: /* vec_extract_hi_v8si */ |
| 33833 | case 2520: /* vec_extract_hi_v8sf_mask */ |
| 33834 | case 2519: /* vec_extract_hi_v8si_mask */ |
| 33835 | case 2518: /* vec_extract_hi_v8sf_maskm */ |
| 33836 | case 2517: /* vec_extract_hi_v8si_maskm */ |
| 33837 | case 2516: /* vec_extract_lo_v8sf_maskm */ |
| 33838 | case 2515: /* vec_extract_lo_v8si_maskm */ |
| 33839 | case 2514: /* vec_extract_lo_v8sf_mask */ |
| 33840 | case 2513: /* vec_extract_lo_v8sf */ |
| 33841 | case 2512: /* vec_extract_lo_v8si_mask */ |
| 33842 | case 2511: /* vec_extract_lo_v8si */ |
| 33843 | case 2510: /* vec_extract_hi_v4df_mask */ |
| 33844 | case 2509: /* vec_extract_hi_v4df */ |
| 33845 | case 2508: /* vec_extract_hi_v4di_mask */ |
| 33846 | case 2507: /* vec_extract_hi_v4di */ |
| 33847 | case 2506: /* vec_extract_lo_v4df_mask */ |
| 33848 | case 2505: /* vec_extract_lo_v4df */ |
| 33849 | case 2504: /* vec_extract_lo_v4di_mask */ |
| 33850 | case 2503: /* vec_extract_lo_v4di */ |
| 33851 | case 2498: /* vec_extract_hi_v16si_mask */ |
| 33852 | case 2497: /* vec_extract_hi_v16si */ |
| 33853 | case 2496: /* vec_extract_hi_v16sf_mask */ |
| 33854 | case 2495: /* vec_extract_hi_v16sf */ |
| 33855 | case 2494: /* vec_extract_hi_v16si_maskm */ |
| 33856 | case 2493: /* vec_extract_hi_v16sf_maskm */ |
| 33857 | case 2492: /* vec_extract_hi_v8di_mask */ |
| 33858 | case 2491: /* vec_extract_hi_v8di */ |
| 33859 | case 2490: /* vec_extract_hi_v8df_mask */ |
| 33860 | case 2489: /* vec_extract_hi_v8df */ |
| 33861 | case 2488: /* vec_extract_hi_v8di_maskm */ |
| 33862 | case 2487: /* vec_extract_hi_v8df_maskm */ |
| 33863 | case 2486: /* vec_extract_lo_v8di_mask */ |
| 33864 | case 2485: /* vec_extract_lo_v8di */ |
| 33865 | case 2484: /* vec_extract_lo_v8df_mask */ |
| 33866 | case 2483: /* vec_extract_lo_v8df */ |
| 33867 | case 2482: /* vec_extract_lo_v8di_maskm */ |
| 33868 | case 2481: /* vec_extract_lo_v8df_maskm */ |
| 33869 | case 2480: /* avx512f_vextracti32x4_1_mask */ |
| 33870 | case 2479: /* *avx512f_vextracti32x4_1 */ |
| 33871 | case 2478: /* avx512f_vextractf32x4_1_mask */ |
| 33872 | case 2477: /* *avx512f_vextractf32x4_1 */ |
| 33873 | case 2476: /* avx512dq_vextracti64x2_1_mask */ |
| 33874 | case 2475: /* *avx512dq_vextracti64x2_1 */ |
| 33875 | case 2474: /* avx512dq_vextractf64x2_1_mask */ |
| 33876 | case 2473: /* *avx512dq_vextractf64x2_1 */ |
| 33877 | case 2472: /* avx512f_vextracti32x4_1_maskm */ |
| 33878 | case 2471: /* avx512f_vextractf32x4_1_maskm */ |
| 33879 | case 2470: /* avx512dq_vextracti64x2_1_maskm */ |
| 33880 | case 2469: /* avx512dq_vextractf64x2_1_maskm */ |
| 33881 | case 2465: /* sse4_1_insertps */ |
| 33882 | case 2464: /* *vec_setv4sf_sse4_1 */ |
| 33883 | case 2458: /* avx512f_vec_dupv8df_1 */ |
| 33884 | case 2457: /* avx512f_vec_dupv16sf_1 */ |
| 33885 | case 2456: /* avx2_vec_dupv8sf_1 */ |
| 33886 | case 2455: /* avx2_vec_dupv4sf */ |
| 33887 | case 2454: /* avx2_vec_dupv8sf */ |
| 33888 | case 2431: /* vec_interleave_lowv4sf */ |
| 33889 | case 2430: /* unpcklps128_mask */ |
| 33890 | case 2429: /* avx_unpcklps256_mask */ |
| 33891 | case 2428: /* avx_unpcklps256 */ |
| 33892 | case 2427: /* avx512f_unpcklps512_mask */ |
| 33893 | case 2426: /* *avx512f_unpcklps512 */ |
| 33894 | case 2425: /* vec_interleave_highv4sf_mask */ |
| 33895 | case 2424: /* vec_interleave_highv4sf */ |
| 33896 | case 2423: /* avx_unpckhps256_mask */ |
| 33897 | case 2422: /* avx_unpckhps256 */ |
| 33898 | case 2421: /* avx512f_unpckhps512_mask */ |
| 33899 | case 2420: /* *avx512f_unpckhps512 */ |
| 33900 | case 1800: /* *xortf3 */ |
| 33901 | case 1799: /* *iortf3 */ |
| 33902 | case 1798: /* *andtf3 */ |
| 33903 | case 1797: /* *xordf3 */ |
| 33904 | case 1796: /* *iordf3 */ |
| 33905 | case 1795: /* *anddf3 */ |
| 33906 | case 1794: /* *xorsf3 */ |
| 33907 | case 1793: /* *iorsf3 */ |
| 33908 | case 1792: /* *andsf3 */ |
| 33909 | case 1791: /* *andnottf3 */ |
| 33910 | case 1790: /* *andnotdf3 */ |
| 33911 | case 1789: /* *andnotsf3 */ |
| 33912 | case 1788: /* *xorv8df3_mask */ |
| 33913 | case 1787: /* *xorv8df3 */ |
| 33914 | case 1786: /* *iorv8df3_mask */ |
| 33915 | case 1785: /* *iorv8df3 */ |
| 33916 | case 1784: /* *andv8df3_mask */ |
| 33917 | case 1783: /* *andv8df3 */ |
| 33918 | case 1782: /* *xorv16sf3_mask */ |
| 33919 | case 1781: /* *xorv16sf3 */ |
| 33920 | case 1780: /* *iorv16sf3_mask */ |
| 33921 | case 1779: /* *iorv16sf3 */ |
| 33922 | case 1778: /* *andv16sf3_mask */ |
| 33923 | case 1777: /* *andv16sf3 */ |
| 33924 | case 1776: /* *xorv2df3_mask */ |
| 33925 | case 1775: /* *xorv2df3 */ |
| 33926 | case 1774: /* *iorv2df3_mask */ |
| 33927 | case 1773: /* *iorv2df3 */ |
| 33928 | case 1772: /* *andv2df3_mask */ |
| 33929 | case 1771: /* *andv2df3 */ |
| 33930 | case 1770: /* *xorv4df3_mask */ |
| 33931 | case 1769: /* *xorv4df3 */ |
| 33932 | case 1768: /* *iorv4df3_mask */ |
| 33933 | case 1767: /* *iorv4df3 */ |
| 33934 | case 1766: /* *andv4df3_mask */ |
| 33935 | case 1765: /* *andv4df3 */ |
| 33936 | case 1764: /* *xorv4sf3_mask */ |
| 33937 | case 1763: /* *xorv4sf3 */ |
| 33938 | case 1762: /* *iorv4sf3_mask */ |
| 33939 | case 1761: /* *iorv4sf3 */ |
| 33940 | case 1760: /* *andv4sf3_mask */ |
| 33941 | case 1759: /* *andv4sf3 */ |
| 33942 | case 1758: /* *xorv8sf3_mask */ |
| 33943 | case 1757: /* *xorv8sf3 */ |
| 33944 | case 1756: /* *iorv8sf3_mask */ |
| 33945 | case 1755: /* *iorv8sf3 */ |
| 33946 | case 1754: /* *andv8sf3_mask */ |
| 33947 | case 1753: /* *andv8sf3 */ |
| 33948 | case 1752: /* avx512f_andnotv8df3_mask */ |
| 33949 | case 1751: /* avx512f_andnotv8df3 */ |
| 33950 | case 1750: /* avx512f_andnotv16sf3_mask */ |
| 33951 | case 1749: /* avx512f_andnotv16sf3 */ |
| 33952 | case 1748: /* sse2_andnotv2df3_mask */ |
| 33953 | case 1747: /* sse2_andnotv2df3 */ |
| 33954 | case 1746: /* avx_andnotv4df3_mask */ |
| 33955 | case 1745: /* avx_andnotv4df3 */ |
| 33956 | case 1744: /* sse_andnotv4sf3_mask */ |
| 33957 | case 1743: /* sse_andnotv4sf3 */ |
| 33958 | case 1742: /* avx_andnotv8sf3_mask */ |
| 33959 | case 1741: /* avx_andnotv8sf3 */ |
| 33960 | case 1740: /* sse2_ucomi_round */ |
| 33961 | case 1739: /* sse2_ucomi */ |
| 33962 | case 1738: /* sse_ucomi_round */ |
| 33963 | case 1737: /* sse_ucomi */ |
| 33964 | case 1736: /* sse2_comi_round */ |
| 33965 | case 1735: /* sse2_comi */ |
| 33966 | case 1734: /* sse_comi_round */ |
| 33967 | case 1733: /* sse_comi */ |
| 33968 | case 1732: /* avx512f_maskcmpv2df3 */ |
| 33969 | case 1731: /* avx512f_maskcmpv4df3 */ |
| 33970 | case 1730: /* avx512f_maskcmpv8df3 */ |
| 33971 | case 1729: /* avx512f_maskcmpv4sf3 */ |
| 33972 | case 1728: /* avx512f_maskcmpv8sf3 */ |
| 33973 | case 1727: /* avx512f_maskcmpv16sf3 */ |
| 33974 | case 1726: /* avx512f_vmcmpv2df3_mask_round */ |
| 33975 | case 1725: /* avx512f_vmcmpv2df3_mask */ |
| 33976 | case 1724: /* avx512f_vmcmpv4sf3_mask_round */ |
| 33977 | case 1723: /* avx512f_vmcmpv4sf3_mask */ |
| 33978 | case 1722: /* avx512f_vmcmpv2df3_round */ |
| 33979 | case 1721: /* avx512f_vmcmpv2df3 */ |
| 33980 | case 1720: /* avx512f_vmcmpv4sf3_round */ |
| 33981 | case 1719: /* avx512f_vmcmpv4sf3 */ |
| 33982 | case 1718: /* avx512vl_ucmpv2di3_mask */ |
| 33983 | case 1717: /* avx512vl_ucmpv2di3 */ |
| 33984 | case 1716: /* avx512vl_ucmpv4di3_mask */ |
| 33985 | case 1715: /* avx512vl_ucmpv4di3 */ |
| 33986 | case 1714: /* avx512f_ucmpv8di3_mask */ |
| 33987 | case 1713: /* avx512f_ucmpv8di3 */ |
| 33988 | case 1712: /* avx512vl_ucmpv4si3_mask */ |
| 33989 | case 1711: /* avx512vl_ucmpv4si3 */ |
| 33990 | case 1710: /* avx512vl_ucmpv8si3_mask */ |
| 33991 | case 1709: /* avx512vl_ucmpv8si3 */ |
| 33992 | case 1708: /* avx512f_ucmpv16si3_mask */ |
| 33993 | case 1707: /* avx512f_ucmpv16si3 */ |
| 33994 | case 1706: /* avx512vl_ucmpv8hi3_mask */ |
| 33995 | case 1705: /* avx512vl_ucmpv8hi3 */ |
| 33996 | case 1704: /* avx512vl_ucmpv16hi3_mask */ |
| 33997 | case 1703: /* avx512vl_ucmpv16hi3 */ |
| 33998 | case 1702: /* avx512bw_ucmpv32hi3_mask */ |
| 33999 | case 1701: /* avx512bw_ucmpv32hi3 */ |
| 34000 | case 1700: /* avx512vl_ucmpv32qi3_mask */ |
| 34001 | case 1699: /* avx512vl_ucmpv32qi3 */ |
| 34002 | case 1698: /* avx512vl_ucmpv16qi3_mask */ |
| 34003 | case 1697: /* avx512vl_ucmpv16qi3 */ |
| 34004 | case 1696: /* avx512bw_ucmpv64qi3_mask */ |
| 34005 | case 1695: /* avx512bw_ucmpv64qi3 */ |
| 34006 | case 1694: /* avx512vl_cmpv8hi3_mask */ |
| 34007 | case 1693: /* avx512vl_cmpv8hi3 */ |
| 34008 | case 1692: /* avx512vl_cmpv16hi3_mask */ |
| 34009 | case 1691: /* avx512vl_cmpv16hi3 */ |
| 34010 | case 1690: /* avx512bw_cmpv32hi3_mask */ |
| 34011 | case 1689: /* avx512bw_cmpv32hi3 */ |
| 34012 | case 1688: /* avx512vl_cmpv32qi3_mask */ |
| 34013 | case 1687: /* avx512vl_cmpv32qi3 */ |
| 34014 | case 1686: /* avx512vl_cmpv16qi3_mask */ |
| 34015 | case 1685: /* avx512vl_cmpv16qi3 */ |
| 34016 | case 1684: /* avx512bw_cmpv64qi3_mask */ |
| 34017 | case 1683: /* avx512bw_cmpv64qi3 */ |
| 34018 | case 1682: /* avx512vl_cmpv2df3_mask */ |
| 34019 | case 1681: /* avx512vl_cmpv2df3 */ |
| 34020 | case 1680: /* avx512vl_cmpv4df3_mask */ |
| 34021 | case 1679: /* avx512vl_cmpv4df3 */ |
| 34022 | case 1678: /* avx512f_cmpv8df3_mask_round */ |
| 34023 | case 1677: /* avx512f_cmpv8df3_round */ |
| 34024 | case 1676: /* avx512f_cmpv8df3_mask */ |
| 34025 | case 1675: /* avx512f_cmpv8df3 */ |
| 34026 | case 1674: /* avx512vl_cmpv4sf3_mask */ |
| 34027 | case 1673: /* avx512vl_cmpv4sf3 */ |
| 34028 | case 1672: /* avx512vl_cmpv8sf3_mask */ |
| 34029 | case 1671: /* avx512vl_cmpv8sf3 */ |
| 34030 | case 1670: /* avx512f_cmpv16sf3_mask_round */ |
| 34031 | case 1669: /* avx512f_cmpv16sf3_round */ |
| 34032 | case 1668: /* avx512f_cmpv16sf3_mask */ |
| 34033 | case 1667: /* avx512f_cmpv16sf3 */ |
| 34034 | case 1666: /* avx512vl_cmpv2di3_mask */ |
| 34035 | case 1665: /* avx512vl_cmpv2di3 */ |
| 34036 | case 1664: /* avx512vl_cmpv4di3_mask */ |
| 34037 | case 1663: /* avx512vl_cmpv4di3 */ |
| 34038 | case 1662: /* avx512f_cmpv8di3_mask_round */ |
| 34039 | case 1661: /* avx512f_cmpv8di3_round */ |
| 34040 | case 1660: /* avx512f_cmpv8di3_mask */ |
| 34041 | case 1659: /* avx512f_cmpv8di3 */ |
| 34042 | case 1658: /* avx512vl_cmpv4si3_mask */ |
| 34043 | case 1657: /* avx512vl_cmpv4si3 */ |
| 34044 | case 1656: /* avx512vl_cmpv8si3_mask */ |
| 34045 | case 1655: /* avx512vl_cmpv8si3 */ |
| 34046 | case 1654: /* avx512f_cmpv16si3_mask_round */ |
| 34047 | case 1653: /* avx512f_cmpv16si3_round */ |
| 34048 | case 1652: /* avx512f_cmpv16si3_mask */ |
| 34049 | case 1651: /* avx512f_cmpv16si3 */ |
| 34050 | case 1650: /* sse2_vmmaskcmpv2df3 */ |
| 34051 | case 1649: /* sse_vmmaskcmpv4sf3 */ |
| 34052 | case 1648: /* sse2_maskcmpv2df3 */ |
| 34053 | case 1647: /* avx_maskcmpv4df3 */ |
| 34054 | case 1646: /* sse_maskcmpv4sf3 */ |
| 34055 | case 1645: /* avx_maskcmpv8sf3 */ |
| 34056 | case 1644: /* *sse2_maskcmpv2df3_comm */ |
| 34057 | case 1643: /* *avx_maskcmpv4df3_comm */ |
| 34058 | case 1642: /* *sse_maskcmpv4sf3_comm */ |
| 34059 | case 1641: /* *avx_maskcmpv8sf3_comm */ |
| 34060 | case 1640: /* avx_vmcmpv2df3 */ |
| 34061 | case 1639: /* avx_vmcmpv4sf3 */ |
| 34062 | case 1638: /* avx_cmpv2df3 */ |
| 34063 | case 1637: /* avx_cmpv4df3 */ |
| 34064 | case 1636: /* avx_cmpv4sf3 */ |
| 34065 | case 1635: /* avx_cmpv8sf3 */ |
| 34066 | case 1102: /* move_size_reloc_di */ |
| 34067 | case 1101: /* move_size_reloc_si */ |
| 34068 | case 1081: /* clflushopt */ |
| 34069 | case 1080: /* clwb */ |
| 34070 | case 1020: /* sse4_2_crc32di */ |
| 34071 | case 1019: /* sse4_2_crc32si */ |
| 34072 | case 1018: /* sse4_2_crc32hi */ |
| 34073 | case 1017: /* sse4_2_crc32qi */ |
| 34074 | case 1006: /* *prefetch_sse */ |
| 34075 | case 1000: /* probe_stack_di */ |
| 34076 | case 999: /* probe_stack_si */ |
| 34077 | case 996: /* pro_epilogue_adjust_stack_di_sub */ |
| 34078 | case 995: /* pro_epilogue_adjust_stack_si_sub */ |
| 34079 | case 841: /* truncxfdf2_i387_noop_unspec */ |
| 34080 | case 840: /* truncxfsf2_i387_noop_unspec */ |
| 34081 | case 810: /* *tls_dynamic_gnu2_call_64 */ |
| 34082 | case 809: /* *tls_dynamic_gnu2_lea_64 */ |
| 34083 | case 807: /* *tls_dynamic_gnu2_call_32 */ |
| 34084 | case 806: /* *tls_dynamic_gnu2_lea_32 */ |
| 34085 | case 805: /* *add_tp_di */ |
| 34086 | case 804: /* *add_tp_si */ |
| 34087 | case 803: /* *add_tp_x32_zext */ |
| 34088 | case 802: /* *add_tp_x32 */ |
| 34089 | case 801: /* *load_tp_di */ |
| 34090 | case 800: /* *load_tp_si */ |
| 34091 | case 799: /* *load_tp_x32_zext */ |
| 34092 | case 798: /* *load_tp_x32 */ |
| 34093 | case 705: /* split_stack_return */ |
| 34094 | case 701: /* set_got_offset_rex64 */ |
| 34095 | case 700: /* set_rip_rex64 */ |
| 34096 | case 699: /* set_got_rex64 */ |
| 34097 | case 692: /* simple_return_pop_internal */ |
| 34098 | case 691: /* simple_return_internal_long */ |
| 34099 | case 689: /* simple_return_internal */ |
| 34100 | case 685: /* *sibcall_value_pop_memory */ |
| 34101 | case 684: /* *sibcall_value_pop */ |
| 34102 | case 683: /* *call_value_pop */ |
| 34103 | case 682: /* *sibcall_value_memory */ |
| 34104 | case 681: /* *sibcall_value_memory */ |
| 34105 | case 680: /* *sibcall_value */ |
| 34106 | case 679: /* *sibcall_value */ |
| 34107 | case 678: /* *sibcall_value_GOT_32 */ |
| 34108 | case 677: /* *call_value_got_x32 */ |
| 34109 | case 676: /* *call_value */ |
| 34110 | case 675: /* *call_value */ |
| 34111 | case 674: /* *sibcall_pop_memory */ |
| 34112 | case 673: /* *sibcall_pop */ |
| 34113 | case 672: /* *call_pop */ |
| 34114 | case 671: /* *sibcall_memory */ |
| 34115 | case 670: /* *sibcall_memory */ |
| 34116 | case 669: /* *sibcall */ |
| 34117 | case 668: /* *sibcall */ |
| 34118 | case 667: /* *sibcall_GOT_32 */ |
| 34119 | case 666: /* *call_got_x32 */ |
| 34120 | case 665: /* *call */ |
| 34121 | case 664: /* *call */ |
| 34122 | case 626: /* setcc_df_sse */ |
| 34123 | case 625: /* setcc_sf_sse */ |
| 34124 | case 608: /* *rotrqi3_1_slp */ |
| 34125 | case 607: /* *rotlqi3_1_slp */ |
| 34126 | case 606: /* *rotrhi3_1 */ |
| 34127 | case 605: /* *rotlhi3_1 */ |
| 34128 | case 604: /* *rotrqi3_1 */ |
| 34129 | case 603: /* *rotlqi3_1 */ |
| 34130 | case 585: /* *ashrdi3_cconly */ |
| 34131 | case 584: /* *lshrdi3_cconly */ |
| 34132 | case 583: /* *ashrsi3_cconly */ |
| 34133 | case 582: /* *lshrsi3_cconly */ |
| 34134 | case 581: /* *ashrhi3_cconly */ |
| 34135 | case 580: /* *lshrhi3_cconly */ |
| 34136 | case 579: /* *ashrqi3_cconly */ |
| 34137 | case 578: /* *lshrqi3_cconly */ |
| 34138 | case 577: /* *ashrsi3_cmp_zext */ |
| 34139 | case 576: /* *lshrsi3_cmp_zext */ |
| 34140 | case 575: /* *ashrdi3_cmp */ |
| 34141 | case 574: /* *lshrdi3_cmp */ |
| 34142 | case 573: /* *ashrsi3_cmp */ |
| 34143 | case 572: /* *lshrsi3_cmp */ |
| 34144 | case 571: /* *ashrhi3_cmp */ |
| 34145 | case 570: /* *lshrhi3_cmp */ |
| 34146 | case 569: /* *ashrqi3_cmp */ |
| 34147 | case 568: /* *lshrqi3_cmp */ |
| 34148 | case 567: /* *ashrqi3_1_slp */ |
| 34149 | case 566: /* *lshrqi3_1_slp */ |
| 34150 | case 565: /* *ashrhi3_1 */ |
| 34151 | case 564: /* *lshrhi3_1 */ |
| 34152 | case 563: /* *ashrqi3_1 */ |
| 34153 | case 562: /* *lshrqi3_1 */ |
| 34154 | case 512: /* *one_cmplsi2_2_zext */ |
| 34155 | case 511: /* *one_cmpldi2_2 */ |
| 34156 | case 510: /* *one_cmplsi2_2 */ |
| 34157 | case 509: /* *one_cmplhi2_2 */ |
| 34158 | case 508: /* *one_cmplqi2_2 */ |
| 34159 | case 507: /* *one_cmplqi2_1 */ |
| 34160 | case 506: /* *one_cmplsi2_1_zext */ |
| 34161 | case 505: /* *one_cmpldi2_1 */ |
| 34162 | case 504: /* *one_cmplsi2_1 */ |
| 34163 | case 503: /* *one_cmplhi2_1 */ |
| 34164 | case 479: /* *negvdi3 */ |
| 34165 | case 478: /* *negvsi3 */ |
| 34166 | case 477: /* *negvhi3 */ |
| 34167 | case 476: /* *negvqi3 */ |
| 34168 | case 475: /* *negsi2_cmpz_zext */ |
| 34169 | case 474: /* *negdi2_cmpz */ |
| 34170 | case 473: /* *negsi2_cmpz */ |
| 34171 | case 472: /* *neghi2_cmpz */ |
| 34172 | case 471: /* *negqi2_cmpz */ |
| 34173 | case 470: /* *negsi2_1_zext */ |
| 34174 | case 469: /* *negdi2_1 */ |
| 34175 | case 468: /* *negsi2_1 */ |
| 34176 | case 467: /* *neghi2_1 */ |
| 34177 | case 466: /* *negqi2_1 */ |
| 34178 | case 463: /* *xorqi_ext_1_cc */ |
| 34179 | case 462: /* *xorqi_ext_2 */ |
| 34180 | case 461: /* *iorqi_ext_2 */ |
| 34181 | case 460: /* *xorqi_ext_1 */ |
| 34182 | case 459: /* *iorqi_ext_1 */ |
| 34183 | case 458: /* *xordi_3 */ |
| 34184 | case 457: /* *iordi_3 */ |
| 34185 | case 456: /* *xorsi_3 */ |
| 34186 | case 455: /* *iorsi_3 */ |
| 34187 | case 454: /* *xorhi_3 */ |
| 34188 | case 453: /* *iorhi_3 */ |
| 34189 | case 452: /* *xorqi_3 */ |
| 34190 | case 451: /* *iorqi_3 */ |
| 34191 | case 450: /* *xorqi_2_slp */ |
| 34192 | case 449: /* *iorqi_2_slp */ |
| 34193 | case 448: /* *xorsi_2_zext_imm */ |
| 34194 | case 447: /* *iorsi_2_zext_imm */ |
| 34195 | case 446: /* *xorsi_2_zext */ |
| 34196 | case 445: /* *iorsi_2_zext */ |
| 34197 | case 444: /* *xordi_2 */ |
| 34198 | case 443: /* *iordi_2 */ |
| 34199 | case 442: /* *xorsi_2 */ |
| 34200 | case 441: /* *iorsi_2 */ |
| 34201 | case 440: /* *xorhi_2 */ |
| 34202 | case 439: /* *iorhi_2 */ |
| 34203 | case 438: /* *xorqi_2 */ |
| 34204 | case 437: /* *iorqi_2 */ |
| 34205 | case 436: /* *xorqi_1_slp */ |
| 34206 | case 435: /* *iorqi_1_slp */ |
| 34207 | case 434: /* *xorqi_1 */ |
| 34208 | case 433: /* *iorqi_1 */ |
| 34209 | case 432: /* *xorsi_1_zext_imm */ |
| 34210 | case 431: /* *iorsi_1_zext_imm */ |
| 34211 | case 430: /* *xorsi_1_zext */ |
| 34212 | case 429: /* *iorsi_1_zext */ |
| 34213 | case 428: /* *xordi_1 */ |
| 34214 | case 427: /* *iordi_1 */ |
| 34215 | case 426: /* *xorsi_1 */ |
| 34216 | case 425: /* *iorsi_1 */ |
| 34217 | case 424: /* *xorhi_1 */ |
| 34218 | case 423: /* *iorhi_1 */ |
| 34219 | case 413: /* *andqi_ext_2 */ |
| 34220 | case 412: /* *andqi_ext_1_cc */ |
| 34221 | case 411: /* andqi_ext_1 */ |
| 34222 | case 410: /* *andqi_2_slp */ |
| 34223 | case 409: /* *andsi_2 */ |
| 34224 | case 408: /* *andhi_2 */ |
| 34225 | case 407: /* *andqi_2 */ |
| 34226 | case 406: /* *andqi_2_maybe_si */ |
| 34227 | case 405: /* *andsi_2_zext */ |
| 34228 | case 404: /* *anddi_2 */ |
| 34229 | case 403: /* *andqi_1_slp */ |
| 34230 | case 402: /* *andqi_1 */ |
| 34231 | case 399: /* *andsi_1_zext */ |
| 34232 | case 393: /* *testqi_ext_2 */ |
| 34233 | case 392: /* *testqi_ext_1 */ |
| 34234 | case 391: /* *testsi_1 */ |
| 34235 | case 390: /* *testhi_1 */ |
| 34236 | case 389: /* *testqi_1 */ |
| 34237 | case 388: /* *testqi_1_maybe_si */ |
| 34238 | case 387: /* *testdi_1 */ |
| 34239 | case 336: /* *addsi3_zext_cc_overflow_2 */ |
| 34240 | case 335: /* *adddi3_cc_overflow_2 */ |
| 34241 | case 334: /* *addsi3_cc_overflow_2 */ |
| 34242 | case 333: /* *addhi3_cc_overflow_2 */ |
| 34243 | case 332: /* *addqi3_cc_overflow_2 */ |
| 34244 | case 331: /* *adddi3_cconly_overflow_2 */ |
| 34245 | case 330: /* *addsi3_cconly_overflow_2 */ |
| 34246 | case 329: /* *addhi3_cconly_overflow_2 */ |
| 34247 | case 328: /* *addqi3_cconly_overflow_2 */ |
| 34248 | case 327: /* *addsi3_zext_cc_overflow_1 */ |
| 34249 | case 326: /* *adddi3_cc_overflow_1 */ |
| 34250 | case 325: /* *addsi3_cc_overflow_1 */ |
| 34251 | case 324: /* *addhi3_cc_overflow_1 */ |
| 34252 | case 323: /* *addqi3_cc_overflow_1 */ |
| 34253 | case 322: /* *adddi3_cconly_overflow_1 */ |
| 34254 | case 321: /* *addsi3_cconly_overflow_1 */ |
| 34255 | case 320: /* *addhi3_cconly_overflow_1 */ |
| 34256 | case 319: /* *addqi3_cconly_overflow_1 */ |
| 34257 | case 294: /* *subsi_3_zext */ |
| 34258 | case 293: /* *subdi_3 */ |
| 34259 | case 292: /* *subsi_3 */ |
| 34260 | case 291: /* *subhi_3 */ |
| 34261 | case 290: /* *subqi_3 */ |
| 34262 | case 289: /* *subvdi4_1 */ |
| 34263 | case 288: /* *subvsi4_1 */ |
| 34264 | case 287: /* *subvhi4_1 */ |
| 34265 | case 286: /* *subvqi4_1 */ |
| 34266 | case 285: /* *subvdi4 */ |
| 34267 | case 284: /* *subvsi4 */ |
| 34268 | case 283: /* *subvhi4 */ |
| 34269 | case 282: /* *subvqi4 */ |
| 34270 | case 281: /* *subsi_2_zext */ |
| 34271 | case 280: /* *subdi_2 */ |
| 34272 | case 279: /* *subsi_2 */ |
| 34273 | case 278: /* *subhi_2 */ |
| 34274 | case 277: /* *subqi_2 */ |
| 34275 | case 276: /* *subqi_1_slp */ |
| 34276 | case 275: /* *subsi_1_zext */ |
| 34277 | case 274: /* *subdi_1 */ |
| 34278 | case 273: /* *subsi_1 */ |
| 34279 | case 272: /* *subhi_1 */ |
| 34280 | case 271: /* *subqi_1 */ |
| 34281 | case 268: /* *leadi_general_4 */ |
| 34282 | case 267: /* *leadi_general_4 */ |
| 34283 | case 266: /* *leasi_general_4 */ |
| 34284 | case 265: /* *leasi_general_4 */ |
| 34285 | case 264: /* *leahi_general_4 */ |
| 34286 | case 263: /* *leahi_general_4 */ |
| 34287 | case 262: /* *leaqi_general_4 */ |
| 34288 | case 261: /* *leaqi_general_4 */ |
| 34289 | case 260: /* *leahi_general_3b */ |
| 34290 | case 259: /* *leaqi_general_3b */ |
| 34291 | case 258: /* *leahi_general_3 */ |
| 34292 | case 257: /* *leaqi_general_3 */ |
| 34293 | case 256: /* *leahi_general_2b */ |
| 34294 | case 255: /* *leaqi_general_2b */ |
| 34295 | case 254: /* *leahi_general_2 */ |
| 34296 | case 253: /* *leaqi_general_2 */ |
| 34297 | case 252: /* *leahi_general_1 */ |
| 34298 | case 251: /* *leaqi_general_1 */ |
| 34299 | case 250: /* *addvdi4_1 */ |
| 34300 | case 249: /* *addvsi4_1 */ |
| 34301 | case 248: /* *addvhi4_1 */ |
| 34302 | case 247: /* *addvqi4_1 */ |
| 34303 | case 246: /* *addvdi4 */ |
| 34304 | case 245: /* *addvsi4 */ |
| 34305 | case 244: /* *addvhi4 */ |
| 34306 | case 243: /* *addvqi4 */ |
| 34307 | case 242: /* *addqi_ext_2 */ |
| 34308 | case 214: /* *leadi */ |
| 34309 | case 213: /* *leasi */ |
| 34310 | case 206: /* *floatdidf2_i387 */ |
| 34311 | case 205: /* *floatdisf2_i387 */ |
| 34312 | case 204: /* *floatsidf2_i387 */ |
| 34313 | case 203: /* *floatsisf2_i387 */ |
| 34314 | case 198: /* floatdixf2 */ |
| 34315 | case 197: /* floatsixf2 */ |
| 34316 | case 196: /* floathixf2 */ |
| 34317 | case 195: /* floathidf2 */ |
| 34318 | case 194: /* floathisf2 */ |
| 34319 | case 167: /* *truncxfdf2_i387 */ |
| 34320 | case 166: /* *truncxfsf2_i387 */ |
| 34321 | case 165: /* truncxfdf2_i387_noop */ |
| 34322 | case 164: /* truncxfsf2_i387_noop */ |
| 34323 | case 161: /* *truncdfsf2_i387_1 */ |
| 34324 | case 158: /* *truncdfsf_fast_i387 */ |
| 34325 | case 156: /* *extenddfxf2_i387 */ |
| 34326 | case 155: /* *extendsfxf2_i387 */ |
| 34327 | case 138: /* zero_extendqihi2_and */ |
| 34328 | case 135: /* zero_extendhisi2_and */ |
| 34329 | case 134: /* zero_extendqisi2_and */ |
| 34330 | case 116: /* *insvqi_3 */ |
| 34331 | case 115: /* *insvqi_3 */ |
| 34332 | case 114: /* *insvqi_2 */ |
| 34333 | case 113: /* *insvqi_2 */ |
| 34334 | case 112: /* *insvqi_1 */ |
| 34335 | case 111: /* *insvqi_1_mem_rex64 */ |
| 34336 | case 110: /* insvdi_1 */ |
| 34337 | case 109: /* insvsi_1 */ |
| 34338 | case 108: /* insvhi_1 */ |
| 34339 | case 106: /* *extzvqi_mem_rex64 */ |
| 34340 | case 100: /* *movstricthi_xor */ |
| 34341 | case 99: /* *movstrictqi_xor */ |
| 34342 | case 98: /* *movstricthi_1 */ |
| 34343 | case 97: /* *movstrictqi_1 */ |
| 34344 | case 96: /* *swaphi */ |
| 34345 | case 95: /* *swapqi */ |
| 34346 | case 94: /* *swapdi */ |
| 34347 | case 93: /* *swapsi */ |
| 34348 | case 92: /* *movabsdi_2 */ |
| 34349 | case 91: /* *movabssi_2 */ |
| 34350 | case 90: /* *movabshi_2 */ |
| 34351 | case 89: /* *movabsqi_2 */ |
| 34352 | case 88: /* *movabsdi_1 */ |
| 34353 | case 87: /* *movabssi_1 */ |
| 34354 | case 86: /* *movabshi_1 */ |
| 34355 | case 85: /* *movabsqi_1 */ |
| 34356 | case 77: /* *movdi_or */ |
| 34357 | case 76: /* *movsi_or */ |
| 34358 | case 75: /* *movdi_xor */ |
| 34359 | case 74: /* *movsi_xor */ |
| 34360 | case 73: /* *popfldi1 */ |
| 34361 | case 69: /* *popdi1_epilogue */ |
| 34362 | case 67: /* *popdi1 */ |
| 34363 | case 16: /* *cmpqi_ext_4 */ |
| 34364 | case 15: /* *cmpqi_ext_3 */ |
| 34365 | case 14: /* *cmpqi_ext_2 */ |
| 34366 | case 13: /* *cmpqi_ext_1 */ |
| 34367 | case 12: /* *cmpdi_minus_1 */ |
| 34368 | case 11: /* *cmpsi_minus_1 */ |
| 34369 | case 10: /* *cmphi_minus_1 */ |
| 34370 | case 9: /* *cmpqi_minus_1 */ |
| 34371 | case 8: /* *cmpdi_1 */ |
| 34372 | case 7: /* *cmpsi_1 */ |
| 34373 | case 6: /* *cmphi_1 */ |
| 34374 | case 5: /* *cmpqi_1 */ |
| 34375 | return 1; |
| 34376 | |
| 34377 | case 4: /* *cmpdi_ccno_1 */ |
| 34378 | case 3: /* *cmpsi_ccno_1 */ |
| 34379 | case 2: /* *cmphi_ccno_1 */ |
| 34380 | case 1: /* *cmpqi_ccno_1 */ |
| 34381 | extract_constrain_insn_cached (insn); |
| 34382 | if ((which_alternative != 0) || (which_alternative != 1) || (get_attr_memory (insn) == MEMORY_NONE)) |
| 34383 | { |
| 34384 | return 1; |
| 34385 | } |
| 34386 | else |
| 34387 | { |
| 34388 | return 0; |
| 34389 | } |
| 34390 | |
| 34391 | case -1: |
| 34392 | if (GET_CODE (PATTERN (insn)) != ASM_INPUT |
| 34393 | && asm_noperands (PATTERN (insn)) < 0) |
| 34394 | fatal_insn_not_found (insn); |
| 34395 | /* FALLTHRU */ |
| 34396 | default: |
| 34397 | extract_insn_cached (insn); |
| 34398 | if (((cached_type = get_attr_type (insn)) == TYPE_OTHER) && (! ((cached_atom_unit = get_attr_atom_unit (insn)) == ATOM_UNIT_JEU))) |
| 34399 | { |
| 34400 | return 9; |
| 34401 | } |
| 34402 | else if ((cached_type == TYPE_OTHER) && ((cached_atom_unit = get_attr_atom_unit (insn)) == ATOM_UNIT_JEU)) |
| 34403 | { |
| 34404 | return 1; |
| 34405 | } |
| 34406 | else if (cached_type == TYPE_MULTI) |
| 34407 | { |
| 34408 | return 9; |
| 34409 | } |
| 34410 | else if ((cached_type == TYPE_ALU) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) && ((cached_use_carry = get_attr_use_carry (insn)) == USE_CARRY_0)) |
| 34411 | { |
| 34412 | return 1; |
| 34413 | } |
| 34414 | else if ((cached_type == TYPE_ALU) && (! ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) && ((cached_use_carry = get_attr_use_carry (insn)) == USE_CARRY_0)) |
| 34415 | { |
| 34416 | return 1; |
| 34417 | } |
| 34418 | else if ((cached_type == TYPE_ALU) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) && ((cached_use_carry = get_attr_use_carry (insn)) == USE_CARRY_1)) |
| 34419 | { |
| 34420 | return 2; |
| 34421 | } |
| 34422 | else if ((cached_type == TYPE_ALU) && (! ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) && ((cached_use_carry = get_attr_use_carry (insn)) == USE_CARRY_1)) |
| 34423 | { |
| 34424 | return 2; |
| 34425 | } |
| 34426 | else if ((cached_type == TYPE_ALU1) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) && ((cached_prefix_0f = get_attr_prefix_0f (insn)) == 0)) |
| 34427 | { |
| 34428 | return 1; |
| 34429 | } |
| 34430 | else if ((cached_type == TYPE_ALU1) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) && ((cached_prefix_0f = get_attr_prefix_0f (insn)) == 1)) |
| 34431 | { |
| 34432 | return 10 /* 0xa */; |
| 34433 | } |
| 34434 | else if ((cached_type == TYPE_ALU1) && (! ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE))) |
| 34435 | { |
| 34436 | return 1; |
| 34437 | } |
| 34438 | else if ((cached_type == TYPE_NEGNOT) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 34439 | { |
| 34440 | return 1; |
| 34441 | } |
| 34442 | else if ((cached_type == TYPE_NEGNOT) && (! ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE))) |
| 34443 | { |
| 34444 | return 1; |
| 34445 | } |
| 34446 | else if ((cached_type == TYPE_IMOV) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 34447 | { |
| 34448 | return 1; |
| 34449 | } |
| 34450 | else if ((cached_type == TYPE_IMOV) && (! ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE))) |
| 34451 | { |
| 34452 | return 1; |
| 34453 | } |
| 34454 | else if ((cached_type == TYPE_IMOVX) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) && (((register_operand (operands[0], HImode)) && (general_operand (operands[1], HImode))) || ((register_operand (operands[0], SImode)) && (general_operand (operands[1], SImode))))) |
| 34455 | { |
| 34456 | return 1; |
| 34457 | } |
| 34458 | else if ((cached_type == TYPE_IMOVX) && (! ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) && (((register_operand (operands[0], HImode)) && (general_operand (operands[1], HImode))) || ((register_operand (operands[0], SImode)) && (general_operand (operands[1], SImode))))) |
| 34459 | { |
| 34460 | return 1; |
| 34461 | } |
| 34462 | else if ((cached_type == TYPE_IMOVX) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) && ((register_operand (operands[0], QImode)) || ((register_operand (operands[0], SImode)) && (! (general_operand (operands[1], SImode)))) || (register_operand (operands[0], DImode)))) |
| 34463 | { |
| 34464 | return 1; |
| 34465 | } |
| 34466 | else if ((cached_type == TYPE_IMOVX) && (! ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) && ((register_operand (operands[0], QImode)) || ((register_operand (operands[0], SImode)) && (! (general_operand (operands[1], SImode)))) || (register_operand (operands[0], DImode)))) |
| 34467 | { |
| 34468 | return 1; |
| 34469 | } |
| 34470 | else if ((cached_type == TYPE_IMOVX) && (register_operand (operands[0], HImode)) && (general_operand (operands[1], QImode))) |
| 34471 | { |
| 34472 | return 3; |
| 34473 | } |
| 34474 | else if ((cached_type == TYPE_LEA) && (! ((cached_mode = get_attr_mode (insn)) == MODE_HI))) |
| 34475 | { |
| 34476 | return 1; |
| 34477 | } |
| 34478 | else if ((cached_type == TYPE_LEA) && ((cached_mode = get_attr_mode (insn)) == MODE_HI)) |
| 34479 | { |
| 34480 | return 2; |
| 34481 | } |
| 34482 | else if ((cached_type == TYPE_INCDEC) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 34483 | { |
| 34484 | return 1; |
| 34485 | } |
| 34486 | else if ((cached_type == TYPE_INCDEC) && (! ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE))) |
| 34487 | { |
| 34488 | return 3; |
| 34489 | } |
| 34490 | else if ((cached_type == TYPE_ISHIFT) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) && ((cached_prefix_0f = get_attr_prefix_0f (insn)) == 0)) |
| 34491 | { |
| 34492 | return 1; |
| 34493 | } |
| 34494 | else if ((cached_type == TYPE_ISHIFT) && (! ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) && ((cached_prefix_0f = get_attr_prefix_0f (insn)) == 0)) |
| 34495 | { |
| 34496 | return 1; |
| 34497 | } |
| 34498 | else if ((cached_type == TYPE_ISHIFT) && ((cached_prefix_0f = get_attr_prefix_0f (insn)) == 1)) |
| 34499 | { |
| 34500 | return 4; |
| 34501 | } |
| 34502 | else if ((cached_type == TYPE_ISHIFT1) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 34503 | { |
| 34504 | return 1; |
| 34505 | } |
| 34506 | else if ((cached_type == TYPE_ISHIFT1) && (! ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE))) |
| 34507 | { |
| 34508 | return 1; |
| 34509 | } |
| 34510 | else if ((cached_type == TYPE_ROTATE) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 34511 | { |
| 34512 | return 1; |
| 34513 | } |
| 34514 | else if ((cached_type == TYPE_ROTATE) && (! ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE))) |
| 34515 | { |
| 34516 | return 1; |
| 34517 | } |
| 34518 | else if ((cached_type == TYPE_ROTATE1) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 34519 | { |
| 34520 | return 1; |
| 34521 | } |
| 34522 | else if ((cached_type == TYPE_ROTATE1) && (! ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE))) |
| 34523 | { |
| 34524 | return 1; |
| 34525 | } |
| 34526 | else if ((cached_type == TYPE_IMUL) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) && ((cached_mode = get_attr_mode (insn)) == MODE_SI)) |
| 34527 | { |
| 34528 | return 3; |
| 34529 | } |
| 34530 | else if ((cached_type == TYPE_IMUL) && (! ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) && ((cached_mode = get_attr_mode (insn)) == MODE_SI)) |
| 34531 | { |
| 34532 | return 3; |
| 34533 | } |
| 34534 | else if ((cached_type == TYPE_IMUL) && (! ((cached_mode = get_attr_mode (insn)) == MODE_SI))) |
| 34535 | { |
| 34536 | return 4; |
| 34537 | } |
| 34538 | else if (cached_type == TYPE_IDIV) |
| 34539 | { |
| 34540 | return 33 /* 0x21 */; |
| 34541 | } |
| 34542 | else if ((cached_type == TYPE_ICMP) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 34543 | { |
| 34544 | return 1; |
| 34545 | } |
| 34546 | else if ((cached_type == TYPE_ICMP) && (! ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE))) |
| 34547 | { |
| 34548 | return 1; |
| 34549 | } |
| 34550 | else if ((cached_type == TYPE_TEST) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 34551 | { |
| 34552 | return 1; |
| 34553 | } |
| 34554 | else if ((cached_type == TYPE_TEST) && (! ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE))) |
| 34555 | { |
| 34556 | return 1; |
| 34557 | } |
| 34558 | else if ((cached_type == TYPE_IBR) && (! ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD))) |
| 34559 | { |
| 34560 | return 1; |
| 34561 | } |
| 34562 | else if ((cached_type == TYPE_IBR) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 34563 | { |
| 34564 | return 2; |
| 34565 | } |
| 34566 | else if ((cached_type == TYPE_SETCC) && (! ((cached_memory = get_attr_memory (insn)) == MEMORY_STORE))) |
| 34567 | { |
| 34568 | return 1; |
| 34569 | } |
| 34570 | else if ((cached_type == TYPE_SETCC) && ((cached_memory = get_attr_memory (insn)) == MEMORY_STORE)) |
| 34571 | { |
| 34572 | return 2; |
| 34573 | } |
| 34574 | else if ((cached_type == TYPE_ICMOV) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 34575 | { |
| 34576 | return 2; |
| 34577 | } |
| 34578 | else if ((cached_type == TYPE_ICMOV) && (! ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE))) |
| 34579 | { |
| 34580 | return 2; |
| 34581 | } |
| 34582 | else if (cached_type == TYPE_PUSH) |
| 34583 | { |
| 34584 | return 2; |
| 34585 | } |
| 34586 | else if ((cached_type == TYPE_POP) && ((cached_mode = get_attr_mode (insn)) == MODE_DI)) |
| 34587 | { |
| 34588 | return 1; |
| 34589 | } |
| 34590 | else if ((cached_type == TYPE_POP) && (! ((cached_mode = get_attr_mode (insn)) == MODE_DI))) |
| 34591 | { |
| 34592 | return 2; |
| 34593 | } |
| 34594 | else if (cached_type == TYPE_CALL) |
| 34595 | { |
| 34596 | return 1; |
| 34597 | } |
| 34598 | else if (cached_type == TYPE_CALLV) |
| 34599 | { |
| 34600 | return 1; |
| 34601 | } |
| 34602 | else if (cached_type == TYPE_LEAVE) |
| 34603 | { |
| 34604 | return 3; |
| 34605 | } |
| 34606 | else if (cached_type == TYPE_STR) |
| 34607 | { |
| 34608 | return 3; |
| 34609 | } |
| 34610 | else if ((cached_type == TYPE_SSELOG) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 34611 | { |
| 34612 | return 1; |
| 34613 | } |
| 34614 | else if ((cached_type == TYPE_SSELOG) && (! ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE))) |
| 34615 | { |
| 34616 | return 1; |
| 34617 | } |
| 34618 | else if ((cached_type == TYPE_SSELOG1) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 34619 | { |
| 34620 | return 1; |
| 34621 | } |
| 34622 | else if ((cached_type == TYPE_SSELOG1) && (! ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE))) |
| 34623 | { |
| 34624 | return 1; |
| 34625 | } |
| 34626 | else if ((cached_type == TYPE_SSEIADD) && (! (register_operand (operands[0], V2DImode))) && (! ((cached_atom_unit = get_attr_atom_unit (insn)) == ATOM_UNIT_SIMUL)) && (! (cached_atom_unit == ATOM_UNIT_COMPLEX))) |
| 34627 | { |
| 34628 | return 1; |
| 34629 | } |
| 34630 | else if ((cached_type == TYPE_SSEIADD) && (! (register_operand (operands[0], V2DImode))) && ((cached_atom_unit = get_attr_atom_unit (insn)) == ATOM_UNIT_SIMUL) && ((cached_mode = get_attr_mode (insn)) == MODE_DI)) |
| 34631 | { |
| 34632 | return 4; |
| 34633 | } |
| 34634 | else if ((cached_type == TYPE_SSEIADD) && (! (register_operand (operands[0], V2DImode))) && ((cached_atom_unit = get_attr_atom_unit (insn)) == ATOM_UNIT_SIMUL) && ((cached_mode = get_attr_mode (insn)) == MODE_TI)) |
| 34635 | { |
| 34636 | return 5; |
| 34637 | } |
| 34638 | else if ((cached_type == TYPE_SSEIADD) && ((register_operand (operands[0], V2DImode)) || ((cached_atom_unit = get_attr_atom_unit (insn)) == ATOM_UNIT_COMPLEX))) |
| 34639 | { |
| 34640 | return 4; |
| 34641 | } |
| 34642 | else if ((cached_type == TYPE_SSEISHFT) && (! ((cached_atom_unit = get_attr_atom_unit (insn)) == ATOM_UNIT_SISHUF)) && (immediate_operand (operands[2], VOIDmode))) |
| 34643 | { |
| 34644 | return 1; |
| 34645 | } |
| 34646 | else if ((cached_type == TYPE_SSEISHFT1) || ((cached_type == TYPE_SSEISHFT) && ((cached_atom_unit = get_attr_atom_unit (insn)) == ATOM_UNIT_SISHUF) && (immediate_operand (operands[2], VOIDmode)))) |
| 34647 | { |
| 34648 | return 1; |
| 34649 | } |
| 34650 | else if ((cached_type == TYPE_SSEISHFT) && (! (immediate_operand (operands[2], VOIDmode)))) |
| 34651 | { |
| 34652 | return 2; |
| 34653 | } |
| 34654 | else if (cached_type == TYPE_SSEIMUL) |
| 34655 | { |
| 34656 | return 5; |
| 34657 | } |
| 34658 | else if ((cached_type == TYPE_SSE) && ((cached_atom_sse_attr = get_attr_atom_sse_attr (insn)) == ATOM_SSE_ATTR_RCP) && ((cached_mode = get_attr_mode (insn)) == MODE_SF)) |
| 34659 | { |
| 34660 | return 4; |
| 34661 | } |
| 34662 | else if ((cached_type == TYPE_SSE) && ((cached_atom_sse_attr = get_attr_atom_sse_attr (insn)) == ATOM_SSE_ATTR_MOVDUP)) |
| 34663 | { |
| 34664 | return 1; |
| 34665 | } |
| 34666 | else if ((cached_type == TYPE_SSE) && ((cached_atom_sse_attr = get_attr_atom_sse_attr (insn)) == ATOM_SSE_ATTR_LFENCE)) |
| 34667 | { |
| 34668 | return 1; |
| 34669 | } |
| 34670 | else if ((cached_type == TYPE_SSE) && (((cached_atom_sse_attr = get_attr_atom_sse_attr (insn)) == ATOM_SSE_ATTR_FENCE) || (cached_atom_sse_attr == ATOM_SSE_ATTR_PREFETCH))) |
| 34671 | { |
| 34672 | return 1; |
| 34673 | } |
| 34674 | else if ((cached_type == TYPE_SSE) && ((((cached_atom_sse_attr = get_attr_atom_sse_attr (insn)) == ATOM_SSE_ATTR_SQRT) || (cached_atom_sse_attr == ATOM_SSE_ATTR_MXCSR)) || ((cached_atom_sse_attr == ATOM_SSE_ATTR_RCP) && ((cached_mode = get_attr_mode (insn)) == MODE_V4SF)))) |
| 34675 | { |
| 34676 | return 9; |
| 34677 | } |
| 34678 | else if ((cached_type == TYPE_SSEMOV) && (register_operand (operands[0], VOIDmode)) && (register_operand (operands[1], VOIDmode))) |
| 34679 | { |
| 34680 | return 1; |
| 34681 | } |
| 34682 | else if ((cached_type == TYPE_SSEMOV) && (register_operand (operands[0], VOIDmode)) && (register_operand (operands[1], VOIDmode))) |
| 34683 | { |
| 34684 | return 1; |
| 34685 | } |
| 34686 | else if ((cached_type == TYPE_SSEMOV) && (register_operand (operands[0], VOIDmode)) && (register_operand (operands[1], VOIDmode))) |
| 34687 | { |
| 34688 | return 3; |
| 34689 | } |
| 34690 | else if ((cached_type == TYPE_SSEMOV) && ((cached_movu = get_attr_movu (insn)) == MOVU_0) && (! ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE))) |
| 34691 | { |
| 34692 | return 1; |
| 34693 | } |
| 34694 | else if ((cached_type == TYPE_SSEMOV) && (((cached_movu = get_attr_movu (insn)) == MOVU_1) || (! ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)))) |
| 34695 | { |
| 34696 | return 2; |
| 34697 | } |
| 34698 | else if ((cached_type == TYPE_SSEADD) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) && (! ((cached_mode = get_attr_mode (insn)) == MODE_V2DF)) && (! ((cached_atom_unit = get_attr_atom_unit (insn)) == ATOM_UNIT_COMPLEX))) |
| 34699 | { |
| 34700 | return 3; |
| 34701 | } |
| 34702 | else if ((cached_type == TYPE_SSEADD) && (! ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) && (! ((cached_mode = get_attr_mode (insn)) == MODE_V2DF)) && (! ((cached_atom_unit = get_attr_atom_unit (insn)) == ATOM_UNIT_COMPLEX))) |
| 34703 | { |
| 34704 | return 3; |
| 34705 | } |
| 34706 | else if ((cached_type == TYPE_SSEADD) && (((cached_mode = get_attr_mode (insn)) == MODE_V2DF) || ((cached_atom_unit = get_attr_atom_unit (insn)) == ATOM_UNIT_COMPLEX))) |
| 34707 | { |
| 34708 | return 4; |
| 34709 | } |
| 34710 | else if ((cached_type == TYPE_SSEMUL) && (! ((cached_mode = get_attr_mode (insn)) == MODE_SF))) |
| 34711 | { |
| 34712 | return 5; |
| 34713 | } |
| 34714 | else if ((cached_type == TYPE_SSEMUL) && ((cached_mode = get_attr_mode (insn)) == MODE_SF)) |
| 34715 | { |
| 34716 | return 4; |
| 34717 | } |
| 34718 | else if (cached_type == TYPE_SSECMP) |
| 34719 | { |
| 34720 | return 1; |
| 34721 | } |
| 34722 | else if (cached_type == TYPE_SSECOMI) |
| 34723 | { |
| 34724 | return 1; |
| 34725 | } |
| 34726 | else if ((cached_type == TYPE_SSECVT) && (((register_operand (operands[0], V2SImode)) && (register_operand (operands[1], V4SFmode))) || ((register_operand (operands[0], V4SFmode)) && (register_operand (operands[1], V2SImode))))) |
| 34727 | { |
| 34728 | return 5; |
| 34729 | } |
| 34730 | else if ((cached_type == TYPE_SSECVT) && (((register_operand (operands[0], V2SImode)) && (memory_operand (operands[1], V4SFmode))) || ((register_operand (operands[0], V4SFmode)) && (memory_operand (operands[1], V2SImode))))) |
| 34731 | { |
| 34732 | return 5; |
| 34733 | } |
| 34734 | else if ((cached_type == TYPE_SSECVT) && (((register_operand (operands[0], V2DFmode)) && (register_operand (operands[1], V2SImode))) || ((register_operand (operands[0], V2SImode)) && (register_operand (operands[1], V2DFmode))))) |
| 34735 | { |
| 34736 | return 2; |
| 34737 | } |
| 34738 | else if ((cached_type == TYPE_SSECVT) && (((register_operand (operands[0], V2DFmode)) && (memory_operand (operands[1], V2SImode))) || ((register_operand (operands[0], V2SImode)) && (memory_operand (operands[1], V2DFmode))))) |
| 34739 | { |
| 34740 | return 2; |
| 34741 | } |
| 34742 | else if ((cached_type == TYPE_SSECVT) && ((! (register_operand (operands[0], V2SImode))) || (! (nonimmediate_operand (operands[1], V4SFmode)))) && ((! (register_operand (operands[0], V4SFmode))) || (! (nonimmediate_operand (operands[1], V2SImode))))) |
| 34743 | { |
| 34744 | return 4; |
| 34745 | } |
| 34746 | else if ((cached_type == TYPE_SSEICVT) && (register_operand (operands[0], V2DFmode)) && (nonimmediate_operand (operands[1], SImode))) |
| 34747 | { |
| 34748 | return 1; |
| 34749 | } |
| 34750 | else if ((cached_type == TYPE_SSEICVT) && ((! (register_operand (operands[0], V2DFmode))) || (! (memory_operand (operands[1], SImode))))) |
| 34751 | { |
| 34752 | return 4; |
| 34753 | } |
| 34754 | else if (cached_type == TYPE_SSEDIV) |
| 34755 | { |
| 34756 | return 13 /* 0xd */; |
| 34757 | } |
| 34758 | else if ((cached_type == TYPE_FMOV) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 34759 | { |
| 34760 | return 1; |
| 34761 | } |
| 34762 | else if ((cached_type == TYPE_FMOV) && (! ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE))) |
| 34763 | { |
| 34764 | return 1; |
| 34765 | } |
| 34766 | else |
| 34767 | { |
| 34768 | return 0; |
| 34769 | } |
| 34770 | |
| 34771 | } |
| 34772 | } |
| 34773 | |
| 34774 | int |
| 34775 | insn_default_latency_haswell (rtx_insn *insn ATTRIBUTE_UNUSED) |
| 34776 | { |
| 34777 | enum attr_memory cached_memory ATTRIBUTE_UNUSED; |
| 34778 | enum attr_type cached_type ATTRIBUTE_UNUSED; |
| 34779 | enum attr_mode cached_mode ATTRIBUTE_UNUSED; |
| 34780 | int cached_length_immediate ATTRIBUTE_UNUSED; |
| 34781 | |
| 34782 | switch (recog_memoized (insn)) |
| 34783 | { |
| 34784 | case 4489: /* avx512bw_lshrvv32hi_mask */ |
| 34785 | case 4488: /* avx512bw_lshrvv32hi */ |
| 34786 | case 4487: /* avx512bw_ashlvv32hi_mask */ |
| 34787 | case 4486: /* avx512bw_ashlvv32hi */ |
| 34788 | case 4485: /* avx512vl_lshrvv16hi_mask */ |
| 34789 | case 4484: /* avx512vl_lshrvv16hi */ |
| 34790 | case 4483: /* avx512vl_ashlvv16hi_mask */ |
| 34791 | case 4482: /* avx512vl_ashlvv16hi */ |
| 34792 | case 4481: /* avx512vl_lshrvv8hi_mask */ |
| 34793 | case 4480: /* avx512vl_lshrvv8hi */ |
| 34794 | case 4479: /* avx512vl_ashlvv8hi_mask */ |
| 34795 | case 4478: /* avx512vl_ashlvv8hi */ |
| 34796 | case 4477: /* avx2_lshrvv2di_mask */ |
| 34797 | case 4476: /* avx2_lshrvv2di */ |
| 34798 | case 4475: /* avx2_ashlvv2di_mask */ |
| 34799 | case 4474: /* avx2_ashlvv2di */ |
| 34800 | case 4473: /* avx2_lshrvv4di_mask */ |
| 34801 | case 4472: /* avx2_lshrvv4di */ |
| 34802 | case 4471: /* avx2_ashlvv4di_mask */ |
| 34803 | case 4470: /* avx2_ashlvv4di */ |
| 34804 | case 4469: /* avx512f_lshrvv8di_mask */ |
| 34805 | case 4468: /* avx512f_lshrvv8di */ |
| 34806 | case 4467: /* avx512f_ashlvv8di_mask */ |
| 34807 | case 4466: /* avx512f_ashlvv8di */ |
| 34808 | case 4465: /* avx2_lshrvv4si_mask */ |
| 34809 | case 4464: /* avx2_lshrvv4si */ |
| 34810 | case 4463: /* avx2_ashlvv4si_mask */ |
| 34811 | case 4462: /* avx2_ashlvv4si */ |
| 34812 | case 4461: /* avx2_lshrvv8si_mask */ |
| 34813 | case 4460: /* avx2_lshrvv8si */ |
| 34814 | case 4459: /* avx2_ashlvv8si_mask */ |
| 34815 | case 4458: /* avx2_ashlvv8si */ |
| 34816 | case 4457: /* avx512f_lshrvv16si_mask */ |
| 34817 | case 4456: /* avx512f_lshrvv16si */ |
| 34818 | case 4455: /* avx512f_ashlvv16si_mask */ |
| 34819 | case 4454: /* avx512f_ashlvv16si */ |
| 34820 | case 4453: /* avx512bw_ashrvv32hi_mask */ |
| 34821 | case 4452: /* avx512bw_ashrvv32hi */ |
| 34822 | case 4451: /* avx512vl_ashrvv16hi_mask */ |
| 34823 | case 4450: /* avx512vl_ashrvv16hi */ |
| 34824 | case 4449: /* avx512vl_ashrvv8hi_mask */ |
| 34825 | case 4448: /* avx512vl_ashrvv8hi */ |
| 34826 | case 4447: /* avx512f_ashrvv8di_mask */ |
| 34827 | case 4446: /* avx512f_ashrvv8di */ |
| 34828 | case 4445: /* avx2_ashrvv4di_mask */ |
| 34829 | case 4444: /* avx2_ashrvv4di */ |
| 34830 | case 4443: /* avx2_ashrvv2di_mask */ |
| 34831 | case 4442: /* avx2_ashrvv2di */ |
| 34832 | case 4441: /* avx512f_ashrvv16si_mask */ |
| 34833 | case 4440: /* avx512f_ashrvv16si */ |
| 34834 | case 4439: /* avx2_ashrvv8si_mask */ |
| 34835 | case 4438: /* avx2_ashrvv8si */ |
| 34836 | case 4437: /* avx2_ashrvv4si_mask */ |
| 34837 | case 4436: /* avx2_ashrvv4si */ |
| 34838 | case 4019: /* xop_shlv2di3 */ |
| 34839 | case 4018: /* xop_shlv4si3 */ |
| 34840 | case 4017: /* xop_shlv8hi3 */ |
| 34841 | case 4016: /* xop_shlv16qi3 */ |
| 34842 | case 4015: /* xop_shav2di3 */ |
| 34843 | case 4014: /* xop_shav4si3 */ |
| 34844 | case 4013: /* xop_shav8hi3 */ |
| 34845 | case 4012: /* xop_shav16qi3 */ |
| 34846 | case 4011: /* xop_vrotlv2di3 */ |
| 34847 | case 4010: /* xop_vrotlv4si3 */ |
| 34848 | case 4009: /* xop_vrotlv8hi3 */ |
| 34849 | case 4008: /* xop_vrotlv16qi3 */ |
| 34850 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) |
| 34851 | { |
| 34852 | return 2; |
| 34853 | } |
| 34854 | else if (cached_memory == MEMORY_LOAD) |
| 34855 | { |
| 34856 | return 3; |
| 34857 | } |
| 34858 | else |
| 34859 | { |
| 34860 | return 0; |
| 34861 | } |
| 34862 | |
| 34863 | case 3904: /* sse4_2_pcmpistr_cconly */ |
| 34864 | case 3900: /* sse4_2_pcmpestr_cconly */ |
| 34865 | extract_constrain_insn_cached (insn); |
| 34866 | if (((1 << which_alternative) & 0x5)) |
| 34867 | { |
| 34868 | return 1; |
| 34869 | } |
| 34870 | else |
| 34871 | { |
| 34872 | return 2; |
| 34873 | } |
| 34874 | |
| 34875 | case 2530: /* vec_extract_hi_v32qi */ |
| 34876 | case 2526: /* vec_extract_hi_v16hi */ |
| 34877 | extract_constrain_insn_cached (insn); |
| 34878 | if (((1 << which_alternative) & 0x15)) |
| 34879 | { |
| 34880 | return 1; |
| 34881 | } |
| 34882 | else |
| 34883 | { |
| 34884 | return 0; |
| 34885 | } |
| 34886 | |
| 34887 | case 2467: /* *sse4_1_extractps */ |
| 34888 | extract_constrain_insn_cached (insn); |
| 34889 | if (!((1 << which_alternative) & 0x7)) |
| 34890 | { |
| 34891 | return 6; |
| 34892 | } |
| 34893 | else if ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) |
| 34894 | { |
| 34895 | return 1; |
| 34896 | } |
| 34897 | else if (cached_memory == MEMORY_LOAD) |
| 34898 | { |
| 34899 | return 2; |
| 34900 | } |
| 34901 | else |
| 34902 | { |
| 34903 | return 0; |
| 34904 | } |
| 34905 | |
| 34906 | case 1464: /* sse2_divv2df3_mask */ |
| 34907 | case 1463: /* sse2_divv2df3 */ |
| 34908 | case 1462: /* avx_divv4df3_mask */ |
| 34909 | case 1461: /* avx_divv4df3 */ |
| 34910 | case 1448: /* sse2_vmdivv2df3_round */ |
| 34911 | case 1447: /* sse2_vmdivv2df3 */ |
| 34912 | if (get_attr_memory (insn) == MEMORY_NONE) |
| 34913 | { |
| 34914 | return 28 /* 0x1c */; |
| 34915 | } |
| 34916 | else |
| 34917 | { |
| 34918 | return 0; |
| 34919 | } |
| 34920 | |
| 34921 | case 1456: /* sse_divv4sf3_mask */ |
| 34922 | case 1455: /* sse_divv4sf3 */ |
| 34923 | case 1454: /* avx_divv8sf3_mask */ |
| 34924 | case 1453: /* avx_divv8sf3 */ |
| 34925 | case 1444: /* sse_vmdivv4sf3_round */ |
| 34926 | case 1443: /* sse_vmdivv4sf3 */ |
| 34927 | if (get_attr_memory (insn) == MEMORY_NONE) |
| 34928 | { |
| 34929 | return 18 /* 0x12 */; |
| 34930 | } |
| 34931 | else |
| 34932 | { |
| 34933 | return 0; |
| 34934 | } |
| 34935 | |
| 34936 | case 4919: /* avx5124vnniw_vp4dpwssds_maskz */ |
| 34937 | case 4918: /* avx5124vnniw_vp4dpwssds_mask */ |
| 34938 | case 4917: /* avx5124vnniw_vp4dpwssds */ |
| 34939 | case 4916: /* avx5124vnniw_vp4dpwssd_maskz */ |
| 34940 | case 4915: /* avx5124vnniw_vp4dpwssd_mask */ |
| 34941 | case 4914: /* avx5124vnniw_vp4dpwssd */ |
| 34942 | case 4913: /* avx5124fmaddps_4fnmaddss_maskz */ |
| 34943 | case 4912: /* avx5124fmaddps_4fnmaddss_mask */ |
| 34944 | case 4911: /* avx5124fmaddps_4fnmaddss */ |
| 34945 | case 4910: /* avx5124fmaddps_4fnmaddps_maskz */ |
| 34946 | case 4909: /* avx5124fmaddps_4fnmaddps_mask */ |
| 34947 | case 4908: /* avx5124fmaddps_4fnmaddps */ |
| 34948 | case 4907: /* avx5124fmaddps_4fmaddss_maskz */ |
| 34949 | case 4906: /* avx5124fmaddps_4fmaddss_mask */ |
| 34950 | case 4905: /* avx5124fmaddps_4fmaddss */ |
| 34951 | case 4904: /* avx5124fmaddps_4fmaddps_maskz */ |
| 34952 | case 4903: /* avx5124fmaddps_4fmaddps_mask */ |
| 34953 | case 4902: /* avx5124fmaddps_4fmaddps */ |
| 34954 | case 4893: /* vpamdd52huqv2di_mask */ |
| 34955 | case 4892: /* vpamdd52luqv2di_mask */ |
| 34956 | case 4891: /* vpamdd52huqv4di_mask */ |
| 34957 | case 4890: /* vpamdd52luqv4di_mask */ |
| 34958 | case 4889: /* vpamdd52huqv8di_mask */ |
| 34959 | case 4888: /* vpamdd52luqv8di_mask */ |
| 34960 | case 4887: /* vpamdd52huqv2di_maskz_1 */ |
| 34961 | case 4886: /* vpamdd52huqv2di */ |
| 34962 | case 4885: /* vpamdd52luqv2di_maskz_1 */ |
| 34963 | case 4884: /* vpamdd52luqv2di */ |
| 34964 | case 4883: /* vpamdd52huqv4di_maskz_1 */ |
| 34965 | case 4882: /* vpamdd52huqv4di */ |
| 34966 | case 4881: /* vpamdd52luqv4di_maskz_1 */ |
| 34967 | case 4880: /* vpamdd52luqv4di */ |
| 34968 | case 4879: /* vpamdd52huqv8di_maskz_1 */ |
| 34969 | case 4878: /* vpamdd52huqv8di */ |
| 34970 | case 4877: /* vpamdd52luqv8di_maskz_1 */ |
| 34971 | case 4876: /* vpamdd52luqv8di */ |
| 34972 | case 3964: /* xop_pmadcsswd */ |
| 34973 | case 3963: /* xop_pmadcswd */ |
| 34974 | case 3962: /* xop_pmacsswd */ |
| 34975 | case 3961: /* xop_pmacswd */ |
| 34976 | case 3960: /* xop_pmacssdqh */ |
| 34977 | case 3959: /* xop_pmacsdqh */ |
| 34978 | case 3958: /* xop_pmacssdql */ |
| 34979 | case 3957: /* xop_pmacsdql */ |
| 34980 | case 3956: /* xop_pmacssdd */ |
| 34981 | case 3955: /* xop_pmacsdd */ |
| 34982 | case 3954: /* xop_pmacssww */ |
| 34983 | case 3953: /* xop_pmacsww */ |
| 34984 | case 3783: /* sse4_1_dppd */ |
| 34985 | case 3782: /* avx_dppd256 */ |
| 34986 | case 3781: /* sse4_1_dpps */ |
| 34987 | case 3780: /* avx_dpps256 */ |
| 34988 | case 2102: /* *fma4i_vmfnmsub_v2df */ |
| 34989 | case 2101: /* *fma4i_vmfnmsub_v4sf */ |
| 34990 | case 2100: /* *fma4i_vmfnmadd_v2df */ |
| 34991 | case 2099: /* *fma4i_vmfnmadd_v4sf */ |
| 34992 | case 2098: /* *fma4i_vmfmsub_v2df */ |
| 34993 | case 2097: /* *fma4i_vmfmsub_v4sf */ |
| 34994 | case 2096: /* *fma4i_vmfmadd_v2df */ |
| 34995 | case 2095: /* *fma4i_vmfmadd_v4sf */ |
| 34996 | case 2094: /* *fmai_fnmsub_v2df_round */ |
| 34997 | case 2093: /* *fmai_fnmsub_v2df */ |
| 34998 | case 2092: /* *fmai_fnmsub_v4sf_round */ |
| 34999 | case 2091: /* *fmai_fnmsub_v4sf */ |
| 35000 | case 2090: /* *fmai_fnmadd_v2df_round */ |
| 35001 | case 2089: /* *fmai_fnmadd_v2df */ |
| 35002 | case 2088: /* *fmai_fnmadd_v4sf_round */ |
| 35003 | case 2087: /* *fmai_fnmadd_v4sf */ |
| 35004 | case 2086: /* *fmai_fmsub_v2df */ |
| 35005 | case 2085: /* *fmai_fmsub_v2df */ |
| 35006 | case 2084: /* *fmai_fmsub_v4sf */ |
| 35007 | case 2083: /* *fmai_fmsub_v4sf */ |
| 35008 | case 2082: /* *fmai_fmadd_v2df */ |
| 35009 | case 2081: /* *fmai_fmadd_v2df */ |
| 35010 | case 2080: /* *fmai_fmadd_v4sf */ |
| 35011 | case 2079: /* *fmai_fmadd_v4sf */ |
| 35012 | case 2078: /* avx512vl_fmsubadd_v2df_mask3_round */ |
| 35013 | case 2077: /* avx512vl_fmsubadd_v2df_mask3 */ |
| 35014 | case 2076: /* avx512vl_fmsubadd_v4df_mask3_round */ |
| 35015 | case 2075: /* avx512vl_fmsubadd_v4df_mask3 */ |
| 35016 | case 2074: /* avx512f_fmsubadd_v8df_mask3_round */ |
| 35017 | case 2073: /* avx512f_fmsubadd_v8df_mask3 */ |
| 35018 | case 2072: /* avx512vl_fmsubadd_v4sf_mask3_round */ |
| 35019 | case 2071: /* avx512vl_fmsubadd_v4sf_mask3 */ |
| 35020 | case 2070: /* avx512vl_fmsubadd_v8sf_mask3_round */ |
| 35021 | case 2069: /* avx512vl_fmsubadd_v8sf_mask3 */ |
| 35022 | case 2068: /* avx512f_fmsubadd_v16sf_mask3_round */ |
| 35023 | case 2067: /* avx512f_fmsubadd_v16sf_mask3 */ |
| 35024 | case 2066: /* avx512vl_fmsubadd_v2df_mask_round */ |
| 35025 | case 2065: /* avx512vl_fmsubadd_v2df_mask */ |
| 35026 | case 2064: /* avx512vl_fmsubadd_v4df_mask_round */ |
| 35027 | case 2063: /* avx512vl_fmsubadd_v4df_mask */ |
| 35028 | case 2062: /* avx512f_fmsubadd_v8df_mask_round */ |
| 35029 | case 2061: /* avx512f_fmsubadd_v8df_mask */ |
| 35030 | case 2060: /* avx512vl_fmsubadd_v4sf_mask_round */ |
| 35031 | case 2059: /* avx512vl_fmsubadd_v4sf_mask */ |
| 35032 | case 2058: /* avx512vl_fmsubadd_v8sf_mask_round */ |
| 35033 | case 2057: /* avx512vl_fmsubadd_v8sf_mask */ |
| 35034 | case 2056: /* avx512f_fmsubadd_v16sf_mask_round */ |
| 35035 | case 2055: /* avx512f_fmsubadd_v16sf_mask */ |
| 35036 | case 2054: /* fma_fmsubadd_v2df_maskz_1 */ |
| 35037 | case 2053: /* *fma_fmsubadd_v2df */ |
| 35038 | case 2052: /* fma_fmsubadd_v4df_maskz_1 */ |
| 35039 | case 2051: /* *fma_fmsubadd_v4df */ |
| 35040 | case 2050: /* fma_fmsubadd_v8df_maskz_1_round */ |
| 35041 | case 2049: /* fma_fmsubadd_v8df_maskz_1 */ |
| 35042 | case 2048: /* *fma_fmsubadd_v8df_round */ |
| 35043 | case 2047: /* *fma_fmsubadd_v8df */ |
| 35044 | case 2046: /* *fma_fmsubadd_df */ |
| 35045 | case 2045: /* fma_fmsubadd_v4sf_maskz_1 */ |
| 35046 | case 2044: /* *fma_fmsubadd_v4sf */ |
| 35047 | case 2043: /* fma_fmsubadd_v8sf_maskz_1 */ |
| 35048 | case 2042: /* *fma_fmsubadd_v8sf */ |
| 35049 | case 2041: /* fma_fmsubadd_v16sf_maskz_1_round */ |
| 35050 | case 2040: /* fma_fmsubadd_v16sf_maskz_1 */ |
| 35051 | case 2039: /* *fma_fmsubadd_v16sf_round */ |
| 35052 | case 2038: /* *fma_fmsubadd_v16sf */ |
| 35053 | case 2037: /* *fma_fmsubadd_sf */ |
| 35054 | case 2036: /* *fma_fmsubadd_v2df */ |
| 35055 | case 2035: /* *fma_fmsubadd_v4df */ |
| 35056 | case 2034: /* *fma_fmsubadd_v4sf */ |
| 35057 | case 2033: /* *fma_fmsubadd_v8sf */ |
| 35058 | case 2032: /* avx512vl_fmaddsub_v2df_mask3_round */ |
| 35059 | case 2031: /* avx512vl_fmaddsub_v2df_mask3 */ |
| 35060 | case 2030: /* avx512vl_fmaddsub_v4df_mask3_round */ |
| 35061 | case 2029: /* avx512vl_fmaddsub_v4df_mask3 */ |
| 35062 | case 2028: /* avx512f_fmaddsub_v8df_mask3_round */ |
| 35063 | case 2027: /* avx512f_fmaddsub_v8df_mask3 */ |
| 35064 | case 2026: /* avx512vl_fmaddsub_v4sf_mask3_round */ |
| 35065 | case 2025: /* avx512vl_fmaddsub_v4sf_mask3 */ |
| 35066 | case 2024: /* avx512vl_fmaddsub_v8sf_mask3_round */ |
| 35067 | case 2023: /* avx512vl_fmaddsub_v8sf_mask3 */ |
| 35068 | case 2022: /* avx512f_fmaddsub_v16sf_mask3_round */ |
| 35069 | case 2021: /* avx512f_fmaddsub_v16sf_mask3 */ |
| 35070 | case 2020: /* avx512vl_fmaddsub_v2df_mask_round */ |
| 35071 | case 2019: /* avx512vl_fmaddsub_v2df_mask */ |
| 35072 | case 2018: /* avx512vl_fmaddsub_v4df_mask_round */ |
| 35073 | case 2017: /* avx512vl_fmaddsub_v4df_mask */ |
| 35074 | case 2016: /* avx512f_fmaddsub_v8df_mask_round */ |
| 35075 | case 2015: /* avx512f_fmaddsub_v8df_mask */ |
| 35076 | case 2014: /* avx512vl_fmaddsub_v4sf_mask_round */ |
| 35077 | case 2013: /* avx512vl_fmaddsub_v4sf_mask */ |
| 35078 | case 2012: /* avx512vl_fmaddsub_v8sf_mask_round */ |
| 35079 | case 2011: /* avx512vl_fmaddsub_v8sf_mask */ |
| 35080 | case 2010: /* avx512f_fmaddsub_v16sf_mask_round */ |
| 35081 | case 2009: /* avx512f_fmaddsub_v16sf_mask */ |
| 35082 | case 2008: /* fma_fmaddsub_v2df_maskz_1 */ |
| 35083 | case 2007: /* *fma_fmaddsub_v2df */ |
| 35084 | case 2006: /* fma_fmaddsub_v4df_maskz_1 */ |
| 35085 | case 2005: /* *fma_fmaddsub_v4df */ |
| 35086 | case 2004: /* fma_fmaddsub_v8df_maskz_1_round */ |
| 35087 | case 2003: /* fma_fmaddsub_v8df_maskz_1 */ |
| 35088 | case 2002: /* *fma_fmaddsub_v8df_round */ |
| 35089 | case 2001: /* *fma_fmaddsub_v8df */ |
| 35090 | case 2000: /* *fma_fmaddsub_df */ |
| 35091 | case 1999: /* fma_fmaddsub_v4sf_maskz_1 */ |
| 35092 | case 1998: /* *fma_fmaddsub_v4sf */ |
| 35093 | case 1997: /* fma_fmaddsub_v8sf_maskz_1 */ |
| 35094 | case 1996: /* *fma_fmaddsub_v8sf */ |
| 35095 | case 1995: /* fma_fmaddsub_v16sf_maskz_1_round */ |
| 35096 | case 1994: /* fma_fmaddsub_v16sf_maskz_1 */ |
| 35097 | case 1993: /* *fma_fmaddsub_v16sf_round */ |
| 35098 | case 1992: /* *fma_fmaddsub_v16sf */ |
| 35099 | case 1991: /* *fma_fmaddsub_sf */ |
| 35100 | case 1990: /* *fma_fmaddsub_v2df */ |
| 35101 | case 1989: /* *fma_fmaddsub_v4df */ |
| 35102 | case 1988: /* *fma_fmaddsub_v4sf */ |
| 35103 | case 1987: /* *fma_fmaddsub_v8sf */ |
| 35104 | case 1986: /* avx512vl_fnmsub_v2df_mask3_round */ |
| 35105 | case 1985: /* avx512vl_fnmsub_v2df_mask3 */ |
| 35106 | case 1984: /* avx512vl_fnmsub_v4df_mask3_round */ |
| 35107 | case 1983: /* avx512vl_fnmsub_v4df_mask3 */ |
| 35108 | case 1982: /* avx512f_fnmsub_v8df_mask3_round */ |
| 35109 | case 1981: /* avx512f_fnmsub_v8df_mask3 */ |
| 35110 | case 1980: /* avx512vl_fnmsub_v4sf_mask3_round */ |
| 35111 | case 1979: /* avx512vl_fnmsub_v4sf_mask3 */ |
| 35112 | case 1978: /* avx512vl_fnmsub_v8sf_mask3_round */ |
| 35113 | case 1977: /* avx512vl_fnmsub_v8sf_mask3 */ |
| 35114 | case 1976: /* avx512f_fnmsub_v16sf_mask3_round */ |
| 35115 | case 1975: /* avx512f_fnmsub_v16sf_mask3 */ |
| 35116 | case 1974: /* avx512vl_fnmsub_v2df_mask */ |
| 35117 | case 1973: /* avx512vl_fnmsub_v4df_mask */ |
| 35118 | case 1972: /* avx512f_fnmsub_v8df_mask_round */ |
| 35119 | case 1971: /* avx512f_fnmsub_v8df_mask */ |
| 35120 | case 1970: /* avx512vl_fnmsub_v4sf_mask */ |
| 35121 | case 1969: /* avx512vl_fnmsub_v8sf_mask */ |
| 35122 | case 1968: /* avx512f_fnmsub_v16sf_mask_round */ |
| 35123 | case 1967: /* avx512f_fnmsub_v16sf_mask */ |
| 35124 | case 1966: /* fma_fnmsub_v2df_maskz_1 */ |
| 35125 | case 1965: /* *fma_fnmsub_v2df */ |
| 35126 | case 1964: /* fma_fnmsub_v4df_maskz_1 */ |
| 35127 | case 1963: /* *fma_fnmsub_v4df */ |
| 35128 | case 1962: /* fma_fnmsub_v8df_maskz_1_round */ |
| 35129 | case 1961: /* fma_fnmsub_v8df_maskz_1 */ |
| 35130 | case 1960: /* *fma_fnmsub_v8df_round */ |
| 35131 | case 1959: /* *fma_fnmsub_v8df */ |
| 35132 | case 1958: /* *fma_fnmsub_df */ |
| 35133 | case 1957: /* fma_fnmsub_v4sf_maskz_1 */ |
| 35134 | case 1956: /* *fma_fnmsub_v4sf */ |
| 35135 | case 1955: /* fma_fnmsub_v8sf_maskz_1 */ |
| 35136 | case 1954: /* *fma_fnmsub_v8sf */ |
| 35137 | case 1953: /* fma_fnmsub_v16sf_maskz_1_round */ |
| 35138 | case 1952: /* fma_fnmsub_v16sf_maskz_1 */ |
| 35139 | case 1951: /* *fma_fnmsub_v16sf_round */ |
| 35140 | case 1950: /* *fma_fnmsub_v16sf */ |
| 35141 | case 1949: /* *fma_fnmsub_sf */ |
| 35142 | case 1948: /* *fma_fnmsub_v4df */ |
| 35143 | case 1947: /* *fma_fnmsub_v4df */ |
| 35144 | case 1946: /* *fma_fnmsub_v4df */ |
| 35145 | case 1945: /* *fma_fnmsub_v4df */ |
| 35146 | case 1944: /* *fma_fnmsub_v8sf */ |
| 35147 | case 1943: /* *fma_fnmsub_v8sf */ |
| 35148 | case 1942: /* *fma_fnmsub_v8sf */ |
| 35149 | case 1941: /* *fma_fnmsub_v8sf */ |
| 35150 | case 1940: /* *fma_fnmsub_v2df */ |
| 35151 | case 1939: /* *fma_fnmsub_v2df */ |
| 35152 | case 1938: /* *fma_fnmsub_v2df */ |
| 35153 | case 1937: /* *fma_fnmsub_v2df */ |
| 35154 | case 1936: /* *fma_fnmsub_v4sf */ |
| 35155 | case 1935: /* *fma_fnmsub_v4sf */ |
| 35156 | case 1934: /* *fma_fnmsub_v4sf */ |
| 35157 | case 1933: /* *fma_fnmsub_v4sf */ |
| 35158 | case 1932: /* *fma_fnmsub_df */ |
| 35159 | case 1931: /* *fma_fnmsub_df */ |
| 35160 | case 1930: /* *fma_fnmsub_sf */ |
| 35161 | case 1929: /* *fma_fnmsub_sf */ |
| 35162 | case 1928: /* avx512vl_fnmadd_v2df_mask3 */ |
| 35163 | case 1927: /* avx512vl_fnmadd_v4df_mask3 */ |
| 35164 | case 1926: /* avx512f_fnmadd_v8df_mask3_round */ |
| 35165 | case 1925: /* avx512f_fnmadd_v8df_mask3 */ |
| 35166 | case 1924: /* avx512vl_fnmadd_v4sf_mask3 */ |
| 35167 | case 1923: /* avx512vl_fnmadd_v8sf_mask3 */ |
| 35168 | case 1922: /* avx512f_fnmadd_v16sf_mask3_round */ |
| 35169 | case 1921: /* avx512f_fnmadd_v16sf_mask3 */ |
| 35170 | case 1920: /* avx512vl_fnmadd_v2df_mask */ |
| 35171 | case 1919: /* avx512vl_fnmadd_v4df_mask */ |
| 35172 | case 1918: /* avx512f_fnmadd_v8df_mask_round */ |
| 35173 | case 1917: /* avx512f_fnmadd_v8df_mask */ |
| 35174 | case 1916: /* avx512vl_fnmadd_v4sf_mask */ |
| 35175 | case 1915: /* avx512vl_fnmadd_v8sf_mask */ |
| 35176 | case 1914: /* avx512f_fnmadd_v16sf_mask_round */ |
| 35177 | case 1913: /* avx512f_fnmadd_v16sf_mask */ |
| 35178 | case 1912: /* fma_fnmadd_v2df_maskz_1 */ |
| 35179 | case 1911: /* *fma_fnmadd_v2df */ |
| 35180 | case 1910: /* fma_fnmadd_v4df_maskz_1 */ |
| 35181 | case 1909: /* *fma_fnmadd_v4df */ |
| 35182 | case 1908: /* fma_fnmadd_v8df_maskz_1_round */ |
| 35183 | case 1907: /* fma_fnmadd_v8df_maskz_1 */ |
| 35184 | case 1906: /* *fma_fnmadd_v8df_round */ |
| 35185 | case 1905: /* *fma_fnmadd_v8df */ |
| 35186 | case 1904: /* *fma_fnmadd_df */ |
| 35187 | case 1903: /* fma_fnmadd_v4sf_maskz_1 */ |
| 35188 | case 1902: /* *fma_fnmadd_v4sf */ |
| 35189 | case 1901: /* fma_fnmadd_v8sf_maskz_1 */ |
| 35190 | case 1900: /* *fma_fnmadd_v8sf */ |
| 35191 | case 1899: /* fma_fnmadd_v16sf_maskz_1_round */ |
| 35192 | case 1898: /* fma_fnmadd_v16sf_maskz_1 */ |
| 35193 | case 1897: /* *fma_fnmadd_v16sf_round */ |
| 35194 | case 1896: /* *fma_fnmadd_v16sf */ |
| 35195 | case 1895: /* *fma_fnmadd_sf */ |
| 35196 | case 1894: /* *fma_fnmadd_v4df */ |
| 35197 | case 1893: /* *fma_fnmadd_v8sf */ |
| 35198 | case 1892: /* *fma_fnmadd_v2df */ |
| 35199 | case 1891: /* *fma_fnmadd_v4sf */ |
| 35200 | case 1890: /* *fma_fnmadd_df */ |
| 35201 | case 1889: /* *fma_fnmadd_sf */ |
| 35202 | case 1888: /* avx512vl_fmsub_v2df_mask3 */ |
| 35203 | case 1887: /* avx512vl_fmsub_v4df_mask3 */ |
| 35204 | case 1886: /* avx512f_fmsub_v8df_mask3_round */ |
| 35205 | case 1885: /* avx512f_fmsub_v8df_mask3 */ |
| 35206 | case 1884: /* avx512vl_fmsub_v4sf_mask3 */ |
| 35207 | case 1883: /* avx512vl_fmsub_v8sf_mask3 */ |
| 35208 | case 1882: /* avx512f_fmsub_v16sf_mask3_round */ |
| 35209 | case 1881: /* avx512f_fmsub_v16sf_mask3 */ |
| 35210 | case 1880: /* avx512vl_fmsub_v2df_mask_round */ |
| 35211 | case 1879: /* avx512vl_fmsub_v2df_mask */ |
| 35212 | case 1878: /* avx512vl_fmsub_v4df_mask_round */ |
| 35213 | case 1877: /* avx512vl_fmsub_v4df_mask */ |
| 35214 | case 1876: /* avx512f_fmsub_v8df_mask_round */ |
| 35215 | case 1875: /* avx512f_fmsub_v8df_mask */ |
| 35216 | case 1874: /* avx512vl_fmsub_v4sf_mask_round */ |
| 35217 | case 1873: /* avx512vl_fmsub_v4sf_mask */ |
| 35218 | case 1872: /* avx512vl_fmsub_v8sf_mask_round */ |
| 35219 | case 1871: /* avx512vl_fmsub_v8sf_mask */ |
| 35220 | case 1870: /* avx512f_fmsub_v16sf_mask_round */ |
| 35221 | case 1869: /* avx512f_fmsub_v16sf_mask */ |
| 35222 | case 1868: /* fma_fmsub_v2df_maskz_1 */ |
| 35223 | case 1867: /* *fma_fmsub_v2df */ |
| 35224 | case 1866: /* fma_fmsub_v4df_maskz_1 */ |
| 35225 | case 1865: /* *fma_fmsub_v4df */ |
| 35226 | case 1864: /* fma_fmsub_v8df_maskz_1_round */ |
| 35227 | case 1863: /* fma_fmsub_v8df_maskz_1 */ |
| 35228 | case 1862: /* *fma_fmsub_v8df_round */ |
| 35229 | case 1861: /* *fma_fmsub_v8df */ |
| 35230 | case 1860: /* *fma_fmsub_df */ |
| 35231 | case 1859: /* fma_fmsub_v4sf_maskz_1 */ |
| 35232 | case 1858: /* *fma_fmsub_v4sf */ |
| 35233 | case 1857: /* fma_fmsub_v8sf_maskz_1 */ |
| 35234 | case 1856: /* *fma_fmsub_v8sf */ |
| 35235 | case 1855: /* fma_fmsub_v16sf_maskz_1_round */ |
| 35236 | case 1854: /* fma_fmsub_v16sf_maskz_1 */ |
| 35237 | case 1853: /* *fma_fmsub_v16sf_round */ |
| 35238 | case 1852: /* *fma_fmsub_v16sf */ |
| 35239 | case 1851: /* *fma_fmsub_sf */ |
| 35240 | case 1850: /* *fma_fmsub_v4df */ |
| 35241 | case 1849: /* *fma_fmsub_v8sf */ |
| 35242 | case 1848: /* *fma_fmsub_v2df */ |
| 35243 | case 1847: /* *fma_fmsub_v4sf */ |
| 35244 | case 1846: /* *fma_fmsub_df */ |
| 35245 | case 1845: /* *fma_fmsub_sf */ |
| 35246 | case 1844: /* avx512vl_fmadd_v2df_mask3_round */ |
| 35247 | case 1843: /* avx512vl_fmadd_v2df_mask3 */ |
| 35248 | case 1842: /* avx512vl_fmadd_v4df_mask3_round */ |
| 35249 | case 1841: /* avx512vl_fmadd_v4df_mask3 */ |
| 35250 | case 1840: /* avx512f_fmadd_v8df_mask3_round */ |
| 35251 | case 1839: /* avx512f_fmadd_v8df_mask3 */ |
| 35252 | case 1838: /* avx512vl_fmadd_v4sf_mask3_round */ |
| 35253 | case 1837: /* avx512vl_fmadd_v4sf_mask3 */ |
| 35254 | case 1836: /* avx512vl_fmadd_v8sf_mask3_round */ |
| 35255 | case 1835: /* avx512vl_fmadd_v8sf_mask3 */ |
| 35256 | case 1834: /* avx512f_fmadd_v16sf_mask3_round */ |
| 35257 | case 1833: /* avx512f_fmadd_v16sf_mask3 */ |
| 35258 | case 1832: /* avx512vl_fmadd_v2df_mask */ |
| 35259 | case 1831: /* avx512vl_fmadd_v4df_mask */ |
| 35260 | case 1830: /* avx512f_fmadd_v8df_mask_round */ |
| 35261 | case 1829: /* avx512f_fmadd_v8df_mask */ |
| 35262 | case 1828: /* avx512vl_fmadd_v4sf_mask */ |
| 35263 | case 1827: /* avx512vl_fmadd_v8sf_mask */ |
| 35264 | case 1826: /* avx512f_fmadd_v16sf_mask_round */ |
| 35265 | case 1825: /* avx512f_fmadd_v16sf_mask */ |
| 35266 | case 1824: /* fma_fmadd_v2df_maskz_1 */ |
| 35267 | case 1823: /* *fma_fmadd_v2df */ |
| 35268 | case 1822: /* fma_fmadd_v4df_maskz_1 */ |
| 35269 | case 1821: /* *fma_fmadd_v4df */ |
| 35270 | case 1820: /* fma_fmadd_v8df_maskz_1_round */ |
| 35271 | case 1819: /* fma_fmadd_v8df_maskz_1 */ |
| 35272 | case 1818: /* *fma_fmadd_v8df_round */ |
| 35273 | case 1817: /* *fma_fmadd_v8df */ |
| 35274 | case 1816: /* *fma_fmadd_df */ |
| 35275 | case 1815: /* fma_fmadd_v4sf_maskz_1 */ |
| 35276 | case 1814: /* *fma_fmadd_v4sf */ |
| 35277 | case 1813: /* fma_fmadd_v8sf_maskz_1 */ |
| 35278 | case 1812: /* *fma_fmadd_v8sf */ |
| 35279 | case 1811: /* fma_fmadd_v16sf_maskz_1_round */ |
| 35280 | case 1810: /* fma_fmadd_v16sf_maskz_1 */ |
| 35281 | case 1809: /* *fma_fmadd_v16sf_round */ |
| 35282 | case 1808: /* *fma_fmadd_v16sf */ |
| 35283 | case 1807: /* *fma_fmadd_sf */ |
| 35284 | case 1806: /* *fma_fmadd_v4df */ |
| 35285 | case 1805: /* *fma_fmadd_v8sf */ |
| 35286 | case 1804: /* *fma_fmadd_v2df */ |
| 35287 | case 1803: /* *fma_fmadd_v4sf */ |
| 35288 | case 1802: /* *fma_fmadd_df */ |
| 35289 | case 1801: /* *fma_fmadd_sf */ |
| 35290 | case 1446: /* sse2_vmmulv2df3_round */ |
| 35291 | case 1445: /* sse2_vmmulv2df3 */ |
| 35292 | case 1442: /* sse_vmmulv4sf3_round */ |
| 35293 | case 1441: /* sse_vmmulv4sf3 */ |
| 35294 | case 1440: /* *mulv2df3_mask_round */ |
| 35295 | case 1439: /* *mulv2df3_mask */ |
| 35296 | case 1438: /* *mulv2df3_round */ |
| 35297 | case 1437: /* *mulv2df3 */ |
| 35298 | case 1436: /* *mulv4df3_mask_round */ |
| 35299 | case 1435: /* *mulv4df3_mask */ |
| 35300 | case 1434: /* *mulv4df3_round */ |
| 35301 | case 1433: /* *mulv4df3 */ |
| 35302 | case 1432: /* *mulv8df3_mask_round */ |
| 35303 | case 1431: /* *mulv8df3_mask */ |
| 35304 | case 1430: /* *mulv8df3_round */ |
| 35305 | case 1429: /* *mulv8df3 */ |
| 35306 | case 1428: /* *mulv4sf3_mask_round */ |
| 35307 | case 1427: /* *mulv4sf3_mask */ |
| 35308 | case 1426: /* *mulv4sf3_round */ |
| 35309 | case 1425: /* *mulv4sf3 */ |
| 35310 | case 1424: /* *mulv8sf3_mask_round */ |
| 35311 | case 1423: /* *mulv8sf3_mask */ |
| 35312 | case 1422: /* *mulv8sf3_round */ |
| 35313 | case 1421: /* *mulv8sf3 */ |
| 35314 | case 1420: /* *mulv16sf3_mask_round */ |
| 35315 | case 1419: /* *mulv16sf3_mask */ |
| 35316 | case 1418: /* *mulv16sf3_round */ |
| 35317 | case 1417: /* *mulv16sf3 */ |
| 35318 | if (((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) || (cached_memory == MEMORY_LOAD)) |
| 35319 | { |
| 35320 | return 5; |
| 35321 | } |
| 35322 | else |
| 35323 | { |
| 35324 | return 0; |
| 35325 | } |
| 35326 | |
| 35327 | case 4770: /* avx512vl_expandv2df_mask */ |
| 35328 | case 4769: /* avx512vl_expandv2di_mask */ |
| 35329 | case 4768: /* avx512vl_expandv4sf_mask */ |
| 35330 | case 4767: /* avx512vl_expandv4si_mask */ |
| 35331 | case 4766: /* avx512vl_expandv4df_mask */ |
| 35332 | case 4765: /* avx512vl_expandv4di_mask */ |
| 35333 | case 4764: /* avx512vl_expandv8sf_mask */ |
| 35334 | case 4763: /* avx512vl_expandv8si_mask */ |
| 35335 | case 4762: /* avx512f_expandv8df_mask */ |
| 35336 | case 4761: /* avx512f_expandv8di_mask */ |
| 35337 | case 4760: /* avx512f_expandv16sf_mask */ |
| 35338 | case 4759: /* avx512f_expandv16si_mask */ |
| 35339 | case 3903: /* sse4_2_pcmpistrm */ |
| 35340 | case 3902: /* sse4_2_pcmpistri */ |
| 35341 | case 3901: /* sse4_2_pcmpistr */ |
| 35342 | case 3899: /* sse4_2_pcmpestrm */ |
| 35343 | case 3898: /* sse4_2_pcmpestri */ |
| 35344 | case 3897: /* sse4_2_pcmpestr */ |
| 35345 | case 1256: /* avx512vl_loadv8hi_mask */ |
| 35346 | case 1255: /* avx512vl_loadv16hi_mask */ |
| 35347 | case 1254: /* avx512bw_loadv32hi_mask */ |
| 35348 | case 1253: /* avx512vl_loadv32qi_mask */ |
| 35349 | case 1252: /* avx512vl_loadv16qi_mask */ |
| 35350 | case 1251: /* avx512bw_loadv64qi_mask */ |
| 35351 | case 1250: /* avx512vl_loadv2df_mask */ |
| 35352 | case 1249: /* avx512vl_loadv4df_mask */ |
| 35353 | case 1248: /* avx512f_loadv8df_mask */ |
| 35354 | case 1247: /* avx512vl_loadv4sf_mask */ |
| 35355 | case 1246: /* avx512vl_loadv8sf_mask */ |
| 35356 | case 1245: /* avx512f_loadv16sf_mask */ |
| 35357 | case 1244: /* avx512vl_loadv2di_mask */ |
| 35358 | case 1243: /* avx512vl_loadv4di_mask */ |
| 35359 | case 1242: /* avx512f_loadv8di_mask */ |
| 35360 | case 1241: /* avx512vl_loadv4si_mask */ |
| 35361 | case 1240: /* avx512vl_loadv8si_mask */ |
| 35362 | case 1239: /* avx512f_loadv16si_mask */ |
| 35363 | extract_constrain_insn_cached (insn); |
| 35364 | if (which_alternative == 0) |
| 35365 | { |
| 35366 | return 1; |
| 35367 | } |
| 35368 | else |
| 35369 | { |
| 35370 | return 2; |
| 35371 | } |
| 35372 | |
| 35373 | case 1206: /* *mmx_concatv2si */ |
| 35374 | case 1136: /* *mmx_concatv2sf */ |
| 35375 | extract_constrain_insn_cached (insn); |
| 35376 | if (which_alternative == 0) |
| 35377 | { |
| 35378 | return 4; |
| 35379 | } |
| 35380 | else |
| 35381 | { |
| 35382 | return 0; |
| 35383 | } |
| 35384 | |
| 35385 | case 3713: /* *ssse3_pmulhrswv4hi3 */ |
| 35386 | case 3712: /* *ssse3_pmulhrswv8hi3_mask */ |
| 35387 | case 3711: /* *ssse3_pmulhrswv8hi3 */ |
| 35388 | case 3710: /* *avx2_pmulhrswv16hi3_mask */ |
| 35389 | case 3709: /* *avx2_pmulhrswv16hi3 */ |
| 35390 | case 3708: /* *avx512bw_pmulhrswv32hi3_mask */ |
| 35391 | case 3707: /* *avx512bw_pmulhrswv32hi3 */ |
| 35392 | case 3704: /* avx512bw_umulhrswv32hi3_mask */ |
| 35393 | case 3703: /* avx512bw_umulhrswv32hi3 */ |
| 35394 | case 3079: /* *sse4_1_mulv4si3_mask */ |
| 35395 | case 3078: /* *sse4_1_mulv4si3 */ |
| 35396 | case 3077: /* *avx2_mulv8si3_mask */ |
| 35397 | case 3076: /* *avx2_mulv8si3 */ |
| 35398 | case 3075: /* *avx512f_mulv16si3_mask */ |
| 35399 | case 3074: /* *avx512f_mulv16si3 */ |
| 35400 | case 3073: /* avx512dq_mulv2di3_mask */ |
| 35401 | case 3072: /* avx512dq_mulv2di3 */ |
| 35402 | case 3071: /* avx512dq_mulv4di3_mask */ |
| 35403 | case 3070: /* avx512dq_mulv4di3 */ |
| 35404 | case 3069: /* avx512dq_mulv8di3_mask */ |
| 35405 | case 3068: /* avx512dq_mulv8di3 */ |
| 35406 | case 3059: /* *sse4_1_mulv2siv2di3_mask */ |
| 35407 | case 3058: /* *sse4_1_mulv2siv2di3 */ |
| 35408 | case 3057: /* *vec_widen_smult_even_v8si_mask */ |
| 35409 | case 3056: /* *vec_widen_smult_even_v8si */ |
| 35410 | case 3055: /* *vec_widen_smult_even_v16si_mask */ |
| 35411 | case 3054: /* *vec_widen_smult_even_v16si */ |
| 35412 | case 3053: /* *vec_widen_umult_even_v4si_mask */ |
| 35413 | case 3052: /* *vec_widen_umult_even_v4si */ |
| 35414 | case 3051: /* *vec_widen_umult_even_v8si_mask */ |
| 35415 | case 3050: /* *vec_widen_umult_even_v8si */ |
| 35416 | case 3049: /* *vec_widen_umult_even_v16si_mask */ |
| 35417 | case 3048: /* *vec_widen_umult_even_v16si */ |
| 35418 | case 3047: /* *umulv8hi3_highpart_mask */ |
| 35419 | case 3046: /* *umulv8hi3_highpart */ |
| 35420 | case 3045: /* *smulv8hi3_highpart_mask */ |
| 35421 | case 3044: /* *smulv8hi3_highpart */ |
| 35422 | case 3043: /* *umulv16hi3_highpart_mask */ |
| 35423 | case 3042: /* *umulv16hi3_highpart */ |
| 35424 | case 3041: /* *smulv16hi3_highpart_mask */ |
| 35425 | case 3040: /* *smulv16hi3_highpart */ |
| 35426 | case 3039: /* *umulv32hi3_highpart_mask */ |
| 35427 | case 3038: /* *umulv32hi3_highpart */ |
| 35428 | case 3037: /* *smulv32hi3_highpart_mask */ |
| 35429 | case 3036: /* *smulv32hi3_highpart */ |
| 35430 | case 3035: /* *mulv8hi3_mask */ |
| 35431 | case 3034: /* *mulv8hi3 */ |
| 35432 | case 3033: /* *mulv16hi3_mask */ |
| 35433 | case 3032: /* *mulv16hi3 */ |
| 35434 | case 3031: /* *mulv32hi3_mask */ |
| 35435 | case 3030: /* *mulv32hi3 */ |
| 35436 | case 1160: /* *sse2_umulv1siv1di3 */ |
| 35437 | case 1159: /* *mmx_pmulhrwv4hi3 */ |
| 35438 | case 1158: /* *mmx_pmaddwd */ |
| 35439 | case 1157: /* *mmx_umulv4hi3_highpart */ |
| 35440 | case 1156: /* *mmx_smulv4hi3_highpart */ |
| 35441 | case 1155: /* *mmx_mulv4hi3 */ |
| 35442 | case 1114: /* *mmx_mulv2sf3 */ |
| 35443 | if (get_attr_memory (insn) == MEMORY_NONE) |
| 35444 | { |
| 35445 | return 5; |
| 35446 | } |
| 35447 | else |
| 35448 | { |
| 35449 | return 0; |
| 35450 | } |
| 35451 | |
| 35452 | case 4869: /* sha256rnds2 */ |
| 35453 | case 4868: /* sha256msg2 */ |
| 35454 | case 4867: /* sha256msg1 */ |
| 35455 | case 4866: /* sha1rnds4 */ |
| 35456 | case 4865: /* sha1nexte */ |
| 35457 | case 4864: /* sha1msg2 */ |
| 35458 | case 4863: /* sha1msg1 */ |
| 35459 | case 4838: /* avx512bw_dbpsadbwv32hi_mask */ |
| 35460 | case 4837: /* *avx512bw_dbpsadbwv32hi */ |
| 35461 | case 4836: /* avx512bw_dbpsadbwv16hi_mask */ |
| 35462 | case 4835: /* *avx512bw_dbpsadbwv16hi */ |
| 35463 | case 4834: /* avx512bw_dbpsadbwv8hi_mask */ |
| 35464 | case 4833: /* *avx512bw_dbpsadbwv8hi */ |
| 35465 | case 4432: /* avx2_maskstoreq256 */ |
| 35466 | case 4431: /* avx2_maskstored256 */ |
| 35467 | case 4430: /* avx2_maskstoreq */ |
| 35468 | case 4429: /* avx2_maskstored */ |
| 35469 | case 4428: /* avx_maskstorepd256 */ |
| 35470 | case 4427: /* avx_maskstoreps256 */ |
| 35471 | case 4426: /* avx_maskstorepd */ |
| 35472 | case 4425: /* avx_maskstoreps */ |
| 35473 | case 4424: /* avx2_maskloadq256 */ |
| 35474 | case 4423: /* avx2_maskloadd256 */ |
| 35475 | case 4422: /* avx2_maskloadq */ |
| 35476 | case 4421: /* avx2_maskloadd */ |
| 35477 | case 4420: /* avx_maskloadpd256 */ |
| 35478 | case 4419: /* avx_maskloadps256 */ |
| 35479 | case 4418: /* avx_maskloadpd */ |
| 35480 | case 4417: /* avx_maskloadps */ |
| 35481 | case 4110: /* avx2_vec_dupv4df */ |
| 35482 | case 4054: /* pclmulqdq */ |
| 35483 | case 4053: /* aeskeygenassist */ |
| 35484 | case 4052: /* aesimc */ |
| 35485 | case 4051: /* aesdeclast */ |
| 35486 | case 4050: /* aesdec */ |
| 35487 | case 4049: /* aesenclast */ |
| 35488 | case 4048: /* aesenc */ |
| 35489 | case 3801: /* sse4_1_phminposuw */ |
| 35490 | case 3788: /* sse4_1_mpsadbw */ |
| 35491 | case 3787: /* avx2_mpsadbw */ |
| 35492 | case 3763: /* absv2si2 */ |
| 35493 | case 3762: /* absv4hi2 */ |
| 35494 | case 3761: /* absv8qi2 */ |
| 35495 | case 3760: /* absv8hi2_mask */ |
| 35496 | case 3759: /* absv16hi2_mask */ |
| 35497 | case 3758: /* absv32hi2_mask */ |
| 35498 | case 3757: /* absv32qi2_mask */ |
| 35499 | case 3756: /* absv16qi2_mask */ |
| 35500 | case 3755: /* absv64qi2_mask */ |
| 35501 | case 3754: /* absv2di2_mask */ |
| 35502 | case 3753: /* absv4di2_mask */ |
| 35503 | case 3752: /* absv8di2_mask */ |
| 35504 | case 3751: /* absv4si2_mask */ |
| 35505 | case 3750: /* absv8si2_mask */ |
| 35506 | case 3749: /* absv16si2_mask */ |
| 35507 | case 3748: /* *absv2di2 */ |
| 35508 | case 3747: /* *absv4di2 */ |
| 35509 | case 3746: /* *absv8di2 */ |
| 35510 | case 3745: /* *absv4si2 */ |
| 35511 | case 3744: /* *absv8si2 */ |
| 35512 | case 3743: /* *absv16si2 */ |
| 35513 | case 3742: /* *absv8hi2 */ |
| 35514 | case 3741: /* *absv16hi2 */ |
| 35515 | case 3740: /* *absv32hi2 */ |
| 35516 | case 3739: /* *absv16qi2 */ |
| 35517 | case 3738: /* *absv32qi2 */ |
| 35518 | case 3737: /* *absv64qi2 */ |
| 35519 | case 3729: /* ssse3_psignv2si3 */ |
| 35520 | case 3728: /* ssse3_psignv4hi3 */ |
| 35521 | case 3727: /* ssse3_psignv8qi3 */ |
| 35522 | case 3726: /* ssse3_psignv4si3 */ |
| 35523 | case 3725: /* avx2_psignv8si3 */ |
| 35524 | case 3724: /* ssse3_psignv8hi3 */ |
| 35525 | case 3723: /* avx2_psignv16hi3 */ |
| 35526 | case 3722: /* ssse3_psignv16qi3 */ |
| 35527 | case 3721: /* avx2_psignv32qi3 */ |
| 35528 | case 3720: /* ssse3_pshufbv8qi3 */ |
| 35529 | case 3719: /* ssse3_pshufbv16qi3_mask */ |
| 35530 | case 3718: /* ssse3_pshufbv16qi3 */ |
| 35531 | case 3717: /* avx2_pshufbv32qi3_mask */ |
| 35532 | case 3716: /* avx2_pshufbv32qi3 */ |
| 35533 | case 3715: /* avx512bw_pshufbv64qi3_mask */ |
| 35534 | case 3714: /* avx512bw_pshufbv64qi3 */ |
| 35535 | case 3635: /* *vec_extractv4si_zext */ |
| 35536 | case 3626: /* *vec_extractv8hi_zext */ |
| 35537 | case 3625: /* *vec_extractv8hi_zext */ |
| 35538 | case 3624: /* *vec_extractv16qi_zext */ |
| 35539 | case 3623: /* *vec_extractv16qi_zext */ |
| 35540 | case 3622: /* *vec_extractv8hi */ |
| 35541 | case 3621: /* *vec_extractv16qi */ |
| 35542 | case 3607: /* sse2_pshufd_1_mask */ |
| 35543 | case 3606: /* sse2_pshufd_1 */ |
| 35544 | case 3605: /* avx2_pshufd_1_mask */ |
| 35545 | case 3604: /* avx2_pshufd_1 */ |
| 35546 | case 3603: /* avx512f_pshufd_1_mask */ |
| 35547 | case 3602: /* avx512f_pshufd_1 */ |
| 35548 | case 2734: /* vec_dupv2df_mask */ |
| 35549 | case 2733: /* vec_dupv2df */ |
| 35550 | case 2522: /* vec_extract_hi_v8sf */ |
| 35551 | case 2521: /* vec_extract_hi_v8si */ |
| 35552 | case 2520: /* vec_extract_hi_v8sf_mask */ |
| 35553 | case 2519: /* vec_extract_hi_v8si_mask */ |
| 35554 | case 2518: /* vec_extract_hi_v8sf_maskm */ |
| 35555 | case 2517: /* vec_extract_hi_v8si_maskm */ |
| 35556 | case 2516: /* vec_extract_lo_v8sf_maskm */ |
| 35557 | case 2515: /* vec_extract_lo_v8si_maskm */ |
| 35558 | case 2514: /* vec_extract_lo_v8sf_mask */ |
| 35559 | case 2513: /* vec_extract_lo_v8sf */ |
| 35560 | case 2512: /* vec_extract_lo_v8si_mask */ |
| 35561 | case 2511: /* vec_extract_lo_v8si */ |
| 35562 | case 2498: /* vec_extract_hi_v16si_mask */ |
| 35563 | case 2497: /* vec_extract_hi_v16si */ |
| 35564 | case 2496: /* vec_extract_hi_v16sf_mask */ |
| 35565 | case 2495: /* vec_extract_hi_v16sf */ |
| 35566 | case 2494: /* vec_extract_hi_v16si_maskm */ |
| 35567 | case 2493: /* vec_extract_hi_v16sf_maskm */ |
| 35568 | case 2492: /* vec_extract_hi_v8di_mask */ |
| 35569 | case 2491: /* vec_extract_hi_v8di */ |
| 35570 | case 2490: /* vec_extract_hi_v8df_mask */ |
| 35571 | case 2489: /* vec_extract_hi_v8df */ |
| 35572 | case 2486: /* vec_extract_lo_v8di_mask */ |
| 35573 | case 2485: /* vec_extract_lo_v8di */ |
| 35574 | case 2484: /* vec_extract_lo_v8df_mask */ |
| 35575 | case 2483: /* vec_extract_lo_v8df */ |
| 35576 | case 2482: /* vec_extract_lo_v8di_maskm */ |
| 35577 | case 2481: /* vec_extract_lo_v8df_maskm */ |
| 35578 | case 2480: /* avx512f_vextracti32x4_1_mask */ |
| 35579 | case 2479: /* *avx512f_vextracti32x4_1 */ |
| 35580 | case 2478: /* avx512f_vextractf32x4_1_mask */ |
| 35581 | case 2477: /* *avx512f_vextractf32x4_1 */ |
| 35582 | case 2476: /* avx512dq_vextracti64x2_1_mask */ |
| 35583 | case 2475: /* *avx512dq_vextracti64x2_1 */ |
| 35584 | case 2474: /* avx512dq_vextractf64x2_1_mask */ |
| 35585 | case 2473: /* *avx512dq_vextractf64x2_1 */ |
| 35586 | case 2458: /* avx512f_vec_dupv8df_1 */ |
| 35587 | case 2457: /* avx512f_vec_dupv16sf_1 */ |
| 35588 | case 2456: /* avx2_vec_dupv8sf_1 */ |
| 35589 | case 2455: /* avx2_vec_dupv4sf */ |
| 35590 | case 2454: /* avx2_vec_dupv8sf */ |
| 35591 | case 1020: /* sse4_2_crc32di */ |
| 35592 | case 1019: /* sse4_2_crc32si */ |
| 35593 | case 1018: /* sse4_2_crc32hi */ |
| 35594 | case 1017: /* sse4_2_crc32qi */ |
| 35595 | if (get_attr_memory (insn) == MEMORY_NONE) |
| 35596 | { |
| 35597 | return 1; |
| 35598 | } |
| 35599 | else |
| 35600 | { |
| 35601 | return 0; |
| 35602 | } |
| 35603 | |
| 35604 | case 982: /* *movsfcc_1_387 */ |
| 35605 | extract_constrain_insn_cached (insn); |
| 35606 | if (((((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) || (cached_memory == MEMORY_LOAD)) && (!((1 << which_alternative) & 0x3))) || (((1 << which_alternative) & 0x3))) |
| 35607 | { |
| 35608 | return 2; |
| 35609 | } |
| 35610 | else |
| 35611 | { |
| 35612 | return 0; |
| 35613 | } |
| 35614 | |
| 35615 | case 981: /* *movdfcc_1 */ |
| 35616 | extract_constrain_insn_cached (insn); |
| 35617 | if (((1 << which_alternative) & 0xc)) |
| 35618 | { |
| 35619 | return 6; |
| 35620 | } |
| 35621 | else if (((((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) || (cached_memory == MEMORY_LOAD)) && (!((1 << which_alternative) & 0xf))) || (((1 << which_alternative) & 0x3))) |
| 35622 | { |
| 35623 | return 2; |
| 35624 | } |
| 35625 | else |
| 35626 | { |
| 35627 | return 0; |
| 35628 | } |
| 35629 | |
| 35630 | case 979: /* *movqicc_noc */ |
| 35631 | case 978: /* *movsicc_noc_zext */ |
| 35632 | case 977: /* *movdicc_noc */ |
| 35633 | case 976: /* *movsicc_noc */ |
| 35634 | case 975: /* *movhicc_noc */ |
| 35635 | if (((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) || (cached_memory == MEMORY_LOAD)) |
| 35636 | { |
| 35637 | return 2; |
| 35638 | } |
| 35639 | else |
| 35640 | { |
| 35641 | return 0; |
| 35642 | } |
| 35643 | |
| 35644 | case 4937: /* storedi_via_sse */ |
| 35645 | case 4936: /* loaddi_via_sse */ |
| 35646 | case 4746: /* avx512vl_compressv2df_mask */ |
| 35647 | case 4745: /* avx512vl_compressv2di_mask */ |
| 35648 | case 4744: /* avx512vl_compressv4sf_mask */ |
| 35649 | case 4743: /* avx512vl_compressv4si_mask */ |
| 35650 | case 4742: /* avx512vl_compressv4df_mask */ |
| 35651 | case 4741: /* avx512vl_compressv4di_mask */ |
| 35652 | case 4740: /* avx512vl_compressv8sf_mask */ |
| 35653 | case 4739: /* avx512vl_compressv8si_mask */ |
| 35654 | case 4738: /* avx512f_compressv8df_mask */ |
| 35655 | case 4737: /* avx512f_compressv8di_mask */ |
| 35656 | case 4736: /* avx512f_compressv16sf_mask */ |
| 35657 | case 4735: /* avx512f_compressv16si_mask */ |
| 35658 | case 4734: /* *avx512f_scatterdiv2df */ |
| 35659 | case 4733: /* *avx512f_scatterdiv2df */ |
| 35660 | case 4732: /* *avx512f_scatterdiv2di */ |
| 35661 | case 4731: /* *avx512f_scatterdiv2di */ |
| 35662 | case 4730: /* *avx512f_scatterdiv4sf */ |
| 35663 | case 4729: /* *avx512f_scatterdiv4sf */ |
| 35664 | case 4728: /* *avx512f_scatterdiv4si */ |
| 35665 | case 4727: /* *avx512f_scatterdiv4si */ |
| 35666 | case 4726: /* *avx512f_scatterdiv4df */ |
| 35667 | case 4725: /* *avx512f_scatterdiv4df */ |
| 35668 | case 4724: /* *avx512f_scatterdiv4di */ |
| 35669 | case 4723: /* *avx512f_scatterdiv4di */ |
| 35670 | case 4722: /* *avx512f_scatterdiv8sf */ |
| 35671 | case 4721: /* *avx512f_scatterdiv8sf */ |
| 35672 | case 4720: /* *avx512f_scatterdiv8si */ |
| 35673 | case 4719: /* *avx512f_scatterdiv8si */ |
| 35674 | case 4718: /* *avx512f_scatterdiv8df */ |
| 35675 | case 4717: /* *avx512f_scatterdiv8df */ |
| 35676 | case 4716: /* *avx512f_scatterdiv8di */ |
| 35677 | case 4715: /* *avx512f_scatterdiv8di */ |
| 35678 | case 4714: /* *avx512f_scatterdiv16sf */ |
| 35679 | case 4713: /* *avx512f_scatterdiv16sf */ |
| 35680 | case 4712: /* *avx512f_scatterdiv16si */ |
| 35681 | case 4711: /* *avx512f_scatterdiv16si */ |
| 35682 | case 4710: /* *avx512f_scattersiv2df */ |
| 35683 | case 4709: /* *avx512f_scattersiv2df */ |
| 35684 | case 4708: /* *avx512f_scattersiv2di */ |
| 35685 | case 4707: /* *avx512f_scattersiv2di */ |
| 35686 | case 4706: /* *avx512f_scattersiv4sf */ |
| 35687 | case 4705: /* *avx512f_scattersiv4sf */ |
| 35688 | case 4704: /* *avx512f_scattersiv4si */ |
| 35689 | case 4703: /* *avx512f_scattersiv4si */ |
| 35690 | case 4702: /* *avx512f_scattersiv4df */ |
| 35691 | case 4701: /* *avx512f_scattersiv4df */ |
| 35692 | case 4700: /* *avx512f_scattersiv4di */ |
| 35693 | case 4699: /* *avx512f_scattersiv4di */ |
| 35694 | case 4698: /* *avx512f_scattersiv8sf */ |
| 35695 | case 4697: /* *avx512f_scattersiv8sf */ |
| 35696 | case 4696: /* *avx512f_scattersiv8si */ |
| 35697 | case 4695: /* *avx512f_scattersiv8si */ |
| 35698 | case 4694: /* *avx512f_scattersiv8df */ |
| 35699 | case 4693: /* *avx512f_scattersiv8df */ |
| 35700 | case 4692: /* *avx512f_scattersiv8di */ |
| 35701 | case 4691: /* *avx512f_scattersiv8di */ |
| 35702 | case 4690: /* *avx512f_scattersiv16sf */ |
| 35703 | case 4689: /* *avx512f_scattersiv16sf */ |
| 35704 | case 4688: /* *avx512f_scattersiv16si */ |
| 35705 | case 4687: /* *avx512f_scattersiv16si */ |
| 35706 | case 4686: /* *avx512f_gatherdiv2df_2 */ |
| 35707 | case 4685: /* *avx512f_gatherdiv2df_2 */ |
| 35708 | case 4684: /* *avx512f_gatherdiv2di_2 */ |
| 35709 | case 4683: /* *avx512f_gatherdiv2di_2 */ |
| 35710 | case 4682: /* *avx512f_gatherdiv4sf_2 */ |
| 35711 | case 4681: /* *avx512f_gatherdiv4sf_2 */ |
| 35712 | case 4680: /* *avx512f_gatherdiv4si_2 */ |
| 35713 | case 4679: /* *avx512f_gatherdiv4si_2 */ |
| 35714 | case 4678: /* *avx512f_gatherdiv4df_2 */ |
| 35715 | case 4677: /* *avx512f_gatherdiv4df_2 */ |
| 35716 | case 4676: /* *avx512f_gatherdiv4di_2 */ |
| 35717 | case 4675: /* *avx512f_gatherdiv4di_2 */ |
| 35718 | case 4674: /* *avx512f_gatherdiv8sf_2 */ |
| 35719 | case 4673: /* *avx512f_gatherdiv8sf_2 */ |
| 35720 | case 4672: /* *avx512f_gatherdiv8si_2 */ |
| 35721 | case 4671: /* *avx512f_gatherdiv8si_2 */ |
| 35722 | case 4670: /* *avx512f_gatherdiv8df_2 */ |
| 35723 | case 4669: /* *avx512f_gatherdiv8df_2 */ |
| 35724 | case 4668: /* *avx512f_gatherdiv8di_2 */ |
| 35725 | case 4667: /* *avx512f_gatherdiv8di_2 */ |
| 35726 | case 4666: /* *avx512f_gatherdiv16sf_2 */ |
| 35727 | case 4665: /* *avx512f_gatherdiv16sf_2 */ |
| 35728 | case 4664: /* *avx512f_gatherdiv16si_2 */ |
| 35729 | case 4663: /* *avx512f_gatherdiv16si_2 */ |
| 35730 | case 4662: /* *avx512f_gatherdiv2df */ |
| 35731 | case 4661: /* *avx512f_gatherdiv2df */ |
| 35732 | case 4660: /* *avx512f_gatherdiv2di */ |
| 35733 | case 4659: /* *avx512f_gatherdiv2di */ |
| 35734 | case 4658: /* *avx512f_gatherdiv4sf */ |
| 35735 | case 4657: /* *avx512f_gatherdiv4sf */ |
| 35736 | case 4656: /* *avx512f_gatherdiv4si */ |
| 35737 | case 4655: /* *avx512f_gatherdiv4si */ |
| 35738 | case 4654: /* *avx512f_gatherdiv4df */ |
| 35739 | case 4653: /* *avx512f_gatherdiv4df */ |
| 35740 | case 4652: /* *avx512f_gatherdiv4di */ |
| 35741 | case 4651: /* *avx512f_gatherdiv4di */ |
| 35742 | case 4650: /* *avx512f_gatherdiv8sf */ |
| 35743 | case 4649: /* *avx512f_gatherdiv8sf */ |
| 35744 | case 4648: /* *avx512f_gatherdiv8si */ |
| 35745 | case 4647: /* *avx512f_gatherdiv8si */ |
| 35746 | case 4646: /* *avx512f_gatherdiv8df */ |
| 35747 | case 4645: /* *avx512f_gatherdiv8df */ |
| 35748 | case 4644: /* *avx512f_gatherdiv8di */ |
| 35749 | case 4643: /* *avx512f_gatherdiv8di */ |
| 35750 | case 4642: /* *avx512f_gatherdiv16sf */ |
| 35751 | case 4641: /* *avx512f_gatherdiv16sf */ |
| 35752 | case 4640: /* *avx512f_gatherdiv16si */ |
| 35753 | case 4639: /* *avx512f_gatherdiv16si */ |
| 35754 | case 4638: /* *avx512f_gathersiv2df_2 */ |
| 35755 | case 4637: /* *avx512f_gathersiv2df_2 */ |
| 35756 | case 4636: /* *avx512f_gathersiv2di_2 */ |
| 35757 | case 4635: /* *avx512f_gathersiv2di_2 */ |
| 35758 | case 4634: /* *avx512f_gathersiv4sf_2 */ |
| 35759 | case 4633: /* *avx512f_gathersiv4sf_2 */ |
| 35760 | case 4632: /* *avx512f_gathersiv4si_2 */ |
| 35761 | case 4631: /* *avx512f_gathersiv4si_2 */ |
| 35762 | case 4630: /* *avx512f_gathersiv4df_2 */ |
| 35763 | case 4629: /* *avx512f_gathersiv4df_2 */ |
| 35764 | case 4628: /* *avx512f_gathersiv4di_2 */ |
| 35765 | case 4627: /* *avx512f_gathersiv4di_2 */ |
| 35766 | case 4626: /* *avx512f_gathersiv8sf_2 */ |
| 35767 | case 4625: /* *avx512f_gathersiv8sf_2 */ |
| 35768 | case 4624: /* *avx512f_gathersiv8si_2 */ |
| 35769 | case 4623: /* *avx512f_gathersiv8si_2 */ |
| 35770 | case 4622: /* *avx512f_gathersiv8df_2 */ |
| 35771 | case 4621: /* *avx512f_gathersiv8df_2 */ |
| 35772 | case 4620: /* *avx512f_gathersiv8di_2 */ |
| 35773 | case 4619: /* *avx512f_gathersiv8di_2 */ |
| 35774 | case 4618: /* *avx512f_gathersiv16sf_2 */ |
| 35775 | case 4617: /* *avx512f_gathersiv16sf_2 */ |
| 35776 | case 4616: /* *avx512f_gathersiv16si_2 */ |
| 35777 | case 4615: /* *avx512f_gathersiv16si_2 */ |
| 35778 | case 4614: /* *avx512f_gathersiv2df */ |
| 35779 | case 4613: /* *avx512f_gathersiv2df */ |
| 35780 | case 4612: /* *avx512f_gathersiv2di */ |
| 35781 | case 4611: /* *avx512f_gathersiv2di */ |
| 35782 | case 4610: /* *avx512f_gathersiv4sf */ |
| 35783 | case 4609: /* *avx512f_gathersiv4sf */ |
| 35784 | case 4608: /* *avx512f_gathersiv4si */ |
| 35785 | case 4607: /* *avx512f_gathersiv4si */ |
| 35786 | case 4606: /* *avx512f_gathersiv4df */ |
| 35787 | case 4605: /* *avx512f_gathersiv4df */ |
| 35788 | case 4604: /* *avx512f_gathersiv4di */ |
| 35789 | case 4603: /* *avx512f_gathersiv4di */ |
| 35790 | case 4602: /* *avx512f_gathersiv8sf */ |
| 35791 | case 4601: /* *avx512f_gathersiv8sf */ |
| 35792 | case 4600: /* *avx512f_gathersiv8si */ |
| 35793 | case 4599: /* *avx512f_gathersiv8si */ |
| 35794 | case 4598: /* *avx512f_gathersiv8df */ |
| 35795 | case 4597: /* *avx512f_gathersiv8df */ |
| 35796 | case 4596: /* *avx512f_gathersiv8di */ |
| 35797 | case 4595: /* *avx512f_gathersiv8di */ |
| 35798 | case 4594: /* *avx512f_gathersiv16sf */ |
| 35799 | case 4593: /* *avx512f_gathersiv16sf */ |
| 35800 | case 4592: /* *avx512f_gathersiv16si */ |
| 35801 | case 4591: /* *avx512f_gathersiv16si */ |
| 35802 | case 4590: /* *avx2_gatherdiv8sf_4 */ |
| 35803 | case 4589: /* *avx2_gatherdiv8sf_4 */ |
| 35804 | case 4588: /* *avx2_gatherdiv8si_4 */ |
| 35805 | case 4587: /* *avx2_gatherdiv8si_4 */ |
| 35806 | case 4586: /* *avx2_gatherdiv8sf_3 */ |
| 35807 | case 4585: /* *avx2_gatherdiv8sf_3 */ |
| 35808 | case 4584: /* *avx2_gatherdiv8si_3 */ |
| 35809 | case 4583: /* *avx2_gatherdiv8si_3 */ |
| 35810 | case 4582: /* *avx2_gatherdiv8sf_2 */ |
| 35811 | case 4581: /* *avx2_gatherdiv8sf_2 */ |
| 35812 | case 4580: /* *avx2_gatherdiv8si_2 */ |
| 35813 | case 4579: /* *avx2_gatherdiv8si_2 */ |
| 35814 | case 4578: /* *avx2_gatherdiv4sf_2 */ |
| 35815 | case 4577: /* *avx2_gatherdiv4sf_2 */ |
| 35816 | case 4576: /* *avx2_gatherdiv4si_2 */ |
| 35817 | case 4575: /* *avx2_gatherdiv4si_2 */ |
| 35818 | case 4574: /* *avx2_gatherdiv4df_2 */ |
| 35819 | case 4573: /* *avx2_gatherdiv4df_2 */ |
| 35820 | case 4572: /* *avx2_gatherdiv4di_2 */ |
| 35821 | case 4571: /* *avx2_gatherdiv4di_2 */ |
| 35822 | case 4570: /* *avx2_gatherdiv2df_2 */ |
| 35823 | case 4569: /* *avx2_gatherdiv2df_2 */ |
| 35824 | case 4568: /* *avx2_gatherdiv2di_2 */ |
| 35825 | case 4567: /* *avx2_gatherdiv2di_2 */ |
| 35826 | case 4566: /* *avx2_gatherdiv8sf */ |
| 35827 | case 4565: /* *avx2_gatherdiv8sf */ |
| 35828 | case 4564: /* *avx2_gatherdiv8si */ |
| 35829 | case 4563: /* *avx2_gatherdiv8si */ |
| 35830 | case 4562: /* *avx2_gatherdiv4sf */ |
| 35831 | case 4561: /* *avx2_gatherdiv4sf */ |
| 35832 | case 4560: /* *avx2_gatherdiv4si */ |
| 35833 | case 4559: /* *avx2_gatherdiv4si */ |
| 35834 | case 4558: /* *avx2_gatherdiv4df */ |
| 35835 | case 4557: /* *avx2_gatherdiv4df */ |
| 35836 | case 4556: /* *avx2_gatherdiv4di */ |
| 35837 | case 4555: /* *avx2_gatherdiv4di */ |
| 35838 | case 4554: /* *avx2_gatherdiv2df */ |
| 35839 | case 4553: /* *avx2_gatherdiv2df */ |
| 35840 | case 4552: /* *avx2_gatherdiv2di */ |
| 35841 | case 4551: /* *avx2_gatherdiv2di */ |
| 35842 | case 4550: /* *avx2_gathersiv8sf_2 */ |
| 35843 | case 4549: /* *avx2_gathersiv8sf_2 */ |
| 35844 | case 4548: /* *avx2_gathersiv8si_2 */ |
| 35845 | case 4547: /* *avx2_gathersiv8si_2 */ |
| 35846 | case 4546: /* *avx2_gathersiv4sf_2 */ |
| 35847 | case 4545: /* *avx2_gathersiv4sf_2 */ |
| 35848 | case 4544: /* *avx2_gathersiv4si_2 */ |
| 35849 | case 4543: /* *avx2_gathersiv4si_2 */ |
| 35850 | case 4542: /* *avx2_gathersiv4df_2 */ |
| 35851 | case 4541: /* *avx2_gathersiv4df_2 */ |
| 35852 | case 4540: /* *avx2_gathersiv4di_2 */ |
| 35853 | case 4539: /* *avx2_gathersiv4di_2 */ |
| 35854 | case 4538: /* *avx2_gathersiv2df_2 */ |
| 35855 | case 4537: /* *avx2_gathersiv2df_2 */ |
| 35856 | case 4536: /* *avx2_gathersiv2di_2 */ |
| 35857 | case 4535: /* *avx2_gathersiv2di_2 */ |
| 35858 | case 4534: /* *avx2_gathersiv8sf */ |
| 35859 | case 4533: /* *avx2_gathersiv8sf */ |
| 35860 | case 4532: /* *avx2_gathersiv8si */ |
| 35861 | case 4531: /* *avx2_gathersiv8si */ |
| 35862 | case 4530: /* *avx2_gathersiv4sf */ |
| 35863 | case 4529: /* *avx2_gathersiv4sf */ |
| 35864 | case 4528: /* *avx2_gathersiv4si */ |
| 35865 | case 4527: /* *avx2_gathersiv4si */ |
| 35866 | case 4526: /* *avx2_gathersiv4df */ |
| 35867 | case 4525: /* *avx2_gathersiv4df */ |
| 35868 | case 4524: /* *avx2_gathersiv4di */ |
| 35869 | case 4523: /* *avx2_gathersiv4di */ |
| 35870 | case 4522: /* *avx2_gathersiv2df */ |
| 35871 | case 4521: /* *avx2_gathersiv2df */ |
| 35872 | case 4520: /* *avx2_gathersiv2di */ |
| 35873 | case 4519: /* *avx2_gathersiv2di */ |
| 35874 | case 4243: /* avx512dq_broadcastv4df_mask_1 */ |
| 35875 | case 4242: /* *avx512dq_broadcastv4df_1 */ |
| 35876 | case 4241: /* avx512dq_broadcastv4di_mask_1 */ |
| 35877 | case 4240: /* *avx512dq_broadcastv4di_1 */ |
| 35878 | case 4239: /* avx512dq_broadcastv8df_mask_1 */ |
| 35879 | case 4238: /* *avx512dq_broadcastv8df_1 */ |
| 35880 | case 4237: /* avx512dq_broadcastv8di_mask_1 */ |
| 35881 | case 4236: /* *avx512dq_broadcastv8di_1 */ |
| 35882 | case 4235: /* avx512dq_broadcastv16si_mask_1 */ |
| 35883 | case 4234: /* *avx512dq_broadcastv16si_1 */ |
| 35884 | case 4233: /* avx512dq_broadcastv16sf_mask_1 */ |
| 35885 | case 4232: /* *avx512dq_broadcastv16sf_1 */ |
| 35886 | case 4231: /* avx512vl_broadcastv8sf_mask_1 */ |
| 35887 | case 4230: /* *avx512vl_broadcastv8sf_1 */ |
| 35888 | case 4229: /* avx512vl_broadcastv8si_mask_1 */ |
| 35889 | case 4228: /* *avx512vl_broadcastv8si_1 */ |
| 35890 | case 4227: /* avx512dq_broadcastv8sf_mask */ |
| 35891 | case 4226: /* *avx512dq_broadcastv8sf */ |
| 35892 | case 4225: /* avx512dq_broadcastv16sf_mask */ |
| 35893 | case 4224: /* *avx512dq_broadcastv16sf */ |
| 35894 | case 4223: /* avx512dq_broadcastv4si_mask */ |
| 35895 | case 4222: /* *avx512dq_broadcastv4si */ |
| 35896 | case 4221: /* avx512dq_broadcastv8si_mask */ |
| 35897 | case 4220: /* *avx512dq_broadcastv8si */ |
| 35898 | case 4219: /* avx512dq_broadcastv16si_mask */ |
| 35899 | case 4218: /* *avx512dq_broadcastv16si */ |
| 35900 | case 4211: /* vec_dupv4df */ |
| 35901 | case 4210: /* vec_dupv4di */ |
| 35902 | case 4209: /* vec_dupv8sf */ |
| 35903 | case 4208: /* vec_dupv8si */ |
| 35904 | case 4207: /* *vec_dupv4si */ |
| 35905 | case 4206: /* *vec_dupv8si */ |
| 35906 | case 4205: /* *vec_dupv8hi */ |
| 35907 | case 4204: /* *vec_dupv16hi */ |
| 35908 | case 4203: /* *vec_dupv16qi */ |
| 35909 | case 4202: /* *vec_dupv32qi */ |
| 35910 | case 4201: /* avx2_vbroadcasti128_v4di */ |
| 35911 | case 4200: /* avx2_vbroadcasti128_v8si */ |
| 35912 | case 4199: /* avx2_vbroadcasti128_v16hi */ |
| 35913 | case 4198: /* avx2_vbroadcasti128_v32qi */ |
| 35914 | case 4194: /* avx512vl_vec_dup_gprv2df_mask */ |
| 35915 | case 4193: /* *avx512vl_vec_dup_gprv2df */ |
| 35916 | case 4192: /* avx512vl_vec_dup_gprv4df_mask */ |
| 35917 | case 4191: /* *avx512vl_vec_dup_gprv4df */ |
| 35918 | case 4190: /* avx512f_vec_dup_gprv8df_mask */ |
| 35919 | case 4189: /* *avx512f_vec_dup_gprv8df */ |
| 35920 | case 4188: /* avx512vl_vec_dup_gprv4sf_mask */ |
| 35921 | case 4187: /* *avx512vl_vec_dup_gprv4sf */ |
| 35922 | case 4186: /* avx512vl_vec_dup_gprv8sf_mask */ |
| 35923 | case 4185: /* *avx512vl_vec_dup_gprv8sf */ |
| 35924 | case 4184: /* avx512f_vec_dup_gprv16sf_mask */ |
| 35925 | case 4183: /* *avx512f_vec_dup_gprv16sf */ |
| 35926 | case 4182: /* avx512vl_vec_dup_gprv2di_mask */ |
| 35927 | case 4181: /* *avx512vl_vec_dup_gprv2di */ |
| 35928 | case 4180: /* avx512vl_vec_dup_gprv4di_mask */ |
| 35929 | case 4179: /* *avx512vl_vec_dup_gprv4di */ |
| 35930 | case 4178: /* avx512f_vec_dup_gprv8di_mask */ |
| 35931 | case 4177: /* *avx512f_vec_dup_gprv8di */ |
| 35932 | case 4176: /* avx512vl_vec_dup_gprv4si_mask */ |
| 35933 | case 4175: /* *avx512vl_vec_dup_gprv4si */ |
| 35934 | case 4174: /* avx512vl_vec_dup_gprv8si_mask */ |
| 35935 | case 4173: /* *avx512vl_vec_dup_gprv8si */ |
| 35936 | case 4172: /* avx512f_vec_dup_gprv16si_mask */ |
| 35937 | case 4171: /* *avx512f_vec_dup_gprv16si */ |
| 35938 | case 4170: /* avx512vl_vec_dup_gprv8hi_mask */ |
| 35939 | case 4169: /* *avx512vl_vec_dup_gprv8hi */ |
| 35940 | case 4168: /* avx512vl_vec_dup_gprv16hi_mask */ |
| 35941 | case 4167: /* *avx512vl_vec_dup_gprv16hi */ |
| 35942 | case 4166: /* avx512bw_vec_dup_gprv32hi_mask */ |
| 35943 | case 4165: /* *avx512bw_vec_dup_gprv32hi */ |
| 35944 | case 4164: /* avx512vl_vec_dup_gprv32qi_mask */ |
| 35945 | case 4163: /* *avx512vl_vec_dup_gprv32qi */ |
| 35946 | case 4162: /* avx512vl_vec_dup_gprv16qi_mask */ |
| 35947 | case 4161: /* *avx512vl_vec_dup_gprv16qi */ |
| 35948 | case 4160: /* avx512bw_vec_dup_gprv64qi_mask */ |
| 35949 | case 4159: /* *avx512bw_vec_dup_gprv64qi */ |
| 35950 | case 4158: /* avx512f_broadcastv8di_mask */ |
| 35951 | case 4157: /* *avx512f_broadcastv8di */ |
| 35952 | case 4156: /* avx512f_broadcastv8df_mask */ |
| 35953 | case 4155: /* *avx512f_broadcastv8df */ |
| 35954 | case 4154: /* avx512f_broadcastv16si_mask */ |
| 35955 | case 4153: /* *avx512f_broadcastv16si */ |
| 35956 | case 4152: /* avx512f_broadcastv16sf_mask */ |
| 35957 | case 4151: /* *avx512f_broadcastv16sf */ |
| 35958 | case 4150: /* avx512vl_vec_dupv8hi_mask */ |
| 35959 | case 4149: /* avx512vl_vec_dupv8hi */ |
| 35960 | case 4148: /* avx512vl_vec_dupv16hi_mask */ |
| 35961 | case 4147: /* avx512vl_vec_dupv16hi */ |
| 35962 | case 4146: /* avx512bw_vec_dupv32hi_mask */ |
| 35963 | case 4145: /* avx512bw_vec_dupv32hi */ |
| 35964 | case 4144: /* avx512vl_vec_dupv32qi_mask */ |
| 35965 | case 4143: /* avx512vl_vec_dupv32qi */ |
| 35966 | case 4142: /* avx512vl_vec_dupv16qi_mask */ |
| 35967 | case 4141: /* avx512vl_vec_dupv16qi */ |
| 35968 | case 4140: /* avx512bw_vec_dupv64qi_mask */ |
| 35969 | case 4139: /* avx512bw_vec_dupv64qi */ |
| 35970 | case 4138: /* avx512vl_vec_dupv2df_mask */ |
| 35971 | case 4137: /* avx512vl_vec_dupv2df */ |
| 35972 | case 4136: /* avx512vl_vec_dupv4df_mask */ |
| 35973 | case 4135: /* avx512vl_vec_dupv4df */ |
| 35974 | case 4134: /* avx512f_vec_dupv8df_mask */ |
| 35975 | case 4133: /* avx512f_vec_dupv8df */ |
| 35976 | case 4132: /* avx512vl_vec_dupv4sf_mask */ |
| 35977 | case 4131: /* avx512vl_vec_dupv4sf */ |
| 35978 | case 4130: /* avx512vl_vec_dupv8sf_mask */ |
| 35979 | case 4129: /* avx512vl_vec_dupv8sf */ |
| 35980 | case 4128: /* avx512f_vec_dupv16sf_mask */ |
| 35981 | case 4127: /* avx512f_vec_dupv16sf */ |
| 35982 | case 4126: /* avx512vl_vec_dupv2di_mask */ |
| 35983 | case 4125: /* avx512vl_vec_dupv2di */ |
| 35984 | case 4124: /* avx512vl_vec_dupv4di_mask */ |
| 35985 | case 4123: /* avx512vl_vec_dupv4di */ |
| 35986 | case 4122: /* avx512f_vec_dupv8di_mask */ |
| 35987 | case 4121: /* avx512f_vec_dupv8di */ |
| 35988 | case 4120: /* avx512vl_vec_dupv4si_mask */ |
| 35989 | case 4119: /* avx512vl_vec_dupv4si */ |
| 35990 | case 4118: /* avx512vl_vec_dupv8si_mask */ |
| 35991 | case 4117: /* avx512vl_vec_dupv8si */ |
| 35992 | case 4116: /* avx512f_vec_dupv16si_mask */ |
| 35993 | case 4115: /* avx512f_vec_dupv16si */ |
| 35994 | case 4114: /* avx512bw_vec_dupv64qi_1 */ |
| 35995 | case 4113: /* avx512bw_vec_dupv32hi_1 */ |
| 35996 | case 4112: /* avx512f_vec_dupv8di_1 */ |
| 35997 | case 4111: /* avx512f_vec_dupv16si_1 */ |
| 35998 | case 4072: /* avx2_pbroadcastv4di_1 */ |
| 35999 | case 4071: /* avx2_pbroadcastv8si_1 */ |
| 36000 | case 4070: /* avx2_pbroadcastv16hi_1 */ |
| 36001 | case 4069: /* avx2_pbroadcastv32qi_1 */ |
| 36002 | case 4068: /* avx2_pbroadcastv2di */ |
| 36003 | case 4067: /* avx2_pbroadcastv4di */ |
| 36004 | case 4066: /* avx2_pbroadcastv4si */ |
| 36005 | case 4065: /* avx2_pbroadcastv8si */ |
| 36006 | case 4064: /* avx2_pbroadcastv8hi */ |
| 36007 | case 4063: /* avx2_pbroadcastv16hi */ |
| 36008 | case 4062: /* avx2_pbroadcastv32hi */ |
| 36009 | case 4061: /* avx2_pbroadcastv16qi */ |
| 36010 | case 4060: /* avx2_pbroadcastv32qi */ |
| 36011 | case 4059: /* avx2_pbroadcastv64qi */ |
| 36012 | case 4058: /* avx2_pbroadcastv8di */ |
| 36013 | case 4057: /* avx2_pbroadcastv16si */ |
| 36014 | case 3873: /* sse4_1_zero_extendv2siv2di2_mask */ |
| 36015 | case 3872: /* sse4_1_zero_extendv2siv2di2 */ |
| 36016 | case 3871: /* sse4_1_sign_extendv2siv2di2_mask */ |
| 36017 | case 3870: /* sse4_1_sign_extendv2siv2di2 */ |
| 36018 | case 3869: /* avx2_zero_extendv4siv4di2_mask */ |
| 36019 | case 3868: /* avx2_zero_extendv4siv4di2 */ |
| 36020 | case 3867: /* avx2_sign_extendv4siv4di2_mask */ |
| 36021 | case 3866: /* avx2_sign_extendv4siv4di2 */ |
| 36022 | case 3865: /* avx512f_zero_extendv8siv8di2_mask */ |
| 36023 | case 3864: /* avx512f_zero_extendv8siv8di2 */ |
| 36024 | case 3863: /* avx512f_sign_extendv8siv8di2_mask */ |
| 36025 | case 3862: /* avx512f_sign_extendv8siv8di2 */ |
| 36026 | case 3861: /* sse4_1_zero_extendv2hiv2di2_mask */ |
| 36027 | case 3860: /* sse4_1_zero_extendv2hiv2di2 */ |
| 36028 | case 3859: /* sse4_1_sign_extendv2hiv2di2_mask */ |
| 36029 | case 3858: /* sse4_1_sign_extendv2hiv2di2 */ |
| 36030 | case 3857: /* avx2_zero_extendv4hiv4di2_mask */ |
| 36031 | case 3856: /* avx2_zero_extendv4hiv4di2 */ |
| 36032 | case 3855: /* avx2_sign_extendv4hiv4di2_mask */ |
| 36033 | case 3854: /* avx2_sign_extendv4hiv4di2 */ |
| 36034 | case 3853: /* avx512f_zero_extendv8hiv8di2_mask */ |
| 36035 | case 3852: /* avx512f_zero_extendv8hiv8di2 */ |
| 36036 | case 3851: /* avx512f_sign_extendv8hiv8di2_mask */ |
| 36037 | case 3850: /* avx512f_sign_extendv8hiv8di2 */ |
| 36038 | case 3849: /* sse4_1_zero_extendv2qiv2di2_mask */ |
| 36039 | case 3848: /* sse4_1_zero_extendv2qiv2di2 */ |
| 36040 | case 3847: /* sse4_1_sign_extendv2qiv2di2_mask */ |
| 36041 | case 3846: /* sse4_1_sign_extendv2qiv2di2 */ |
| 36042 | case 3845: /* avx2_zero_extendv4qiv4di2_mask */ |
| 36043 | case 3844: /* avx2_zero_extendv4qiv4di2 */ |
| 36044 | case 3843: /* avx2_sign_extendv4qiv4di2_mask */ |
| 36045 | case 3842: /* avx2_sign_extendv4qiv4di2 */ |
| 36046 | case 3841: /* avx512f_zero_extendv8qiv8di2_mask */ |
| 36047 | case 3840: /* avx512f_zero_extendv8qiv8di2 */ |
| 36048 | case 3839: /* avx512f_sign_extendv8qiv8di2_mask */ |
| 36049 | case 3838: /* avx512f_sign_extendv8qiv8di2 */ |
| 36050 | case 3837: /* sse4_1_zero_extendv4hiv4si2_mask */ |
| 36051 | case 3836: /* sse4_1_zero_extendv4hiv4si2 */ |
| 36052 | case 3835: /* sse4_1_sign_extendv4hiv4si2_mask */ |
| 36053 | case 3834: /* sse4_1_sign_extendv4hiv4si2 */ |
| 36054 | case 3833: /* avx2_zero_extendv8hiv8si2_mask */ |
| 36055 | case 3832: /* avx2_zero_extendv8hiv8si2 */ |
| 36056 | case 3831: /* avx2_sign_extendv8hiv8si2_mask */ |
| 36057 | case 3830: /* avx2_sign_extendv8hiv8si2 */ |
| 36058 | case 3829: /* avx512f_zero_extendv16hiv16si2_mask */ |
| 36059 | case 3828: /* avx512f_zero_extendv16hiv16si2 */ |
| 36060 | case 3827: /* avx512f_sign_extendv16hiv16si2_mask */ |
| 36061 | case 3826: /* avx512f_sign_extendv16hiv16si2 */ |
| 36062 | case 3825: /* sse4_1_zero_extendv4qiv4si2_mask */ |
| 36063 | case 3824: /* sse4_1_zero_extendv4qiv4si2 */ |
| 36064 | case 3823: /* sse4_1_sign_extendv4qiv4si2_mask */ |
| 36065 | case 3822: /* sse4_1_sign_extendv4qiv4si2 */ |
| 36066 | case 3821: /* avx2_zero_extendv8qiv8si2_mask */ |
| 36067 | case 3820: /* avx2_zero_extendv8qiv8si2 */ |
| 36068 | case 3819: /* avx2_sign_extendv8qiv8si2_mask */ |
| 36069 | case 3818: /* avx2_sign_extendv8qiv8si2 */ |
| 36070 | case 3817: /* avx512f_zero_extendv16qiv16si2_mask */ |
| 36071 | case 3816: /* *avx512f_zero_extendv16qiv16si2 */ |
| 36072 | case 3815: /* avx512f_sign_extendv16qiv16si2_mask */ |
| 36073 | case 3814: /* *avx512f_sign_extendv16qiv16si2 */ |
| 36074 | case 3813: /* sse4_1_zero_extendv8qiv8hi2_mask */ |
| 36075 | case 3812: /* sse4_1_zero_extendv8qiv8hi2 */ |
| 36076 | case 3811: /* sse4_1_sign_extendv8qiv8hi2_mask */ |
| 36077 | case 3810: /* sse4_1_sign_extendv8qiv8hi2 */ |
| 36078 | case 3809: /* avx512bw_zero_extendv32qiv32hi2_mask */ |
| 36079 | case 3808: /* avx512bw_zero_extendv32qiv32hi2 */ |
| 36080 | case 3807: /* avx512bw_sign_extendv32qiv32hi2_mask */ |
| 36081 | case 3806: /* avx512bw_sign_extendv32qiv32hi2 */ |
| 36082 | case 3805: /* avx2_zero_extendv16qiv16hi2_mask */ |
| 36083 | case 3804: /* avx2_zero_extendv16qiv16hi2 */ |
| 36084 | case 3803: /* avx2_sign_extendv16qiv16hi2_mask */ |
| 36085 | case 3802: /* avx2_sign_extendv16qiv16hi2 */ |
| 36086 | case 3800: /* avx2_pblenddv4si */ |
| 36087 | case 3799: /* avx2_pblenddv8si */ |
| 36088 | case 3798: /* *avx2_pblendw */ |
| 36089 | case 3797: /* sse4_1_pblendw */ |
| 36090 | case 3796: /* sse4_1_pblendvb */ |
| 36091 | case 3795: /* avx2_pblendvb */ |
| 36092 | case 3786: /* sse4_1_movntdqa */ |
| 36093 | case 3785: /* avx2_movntdqa */ |
| 36094 | case 3784: /* avx512f_movntdqa */ |
| 36095 | case 3779: /* sse4_1_blendvpd */ |
| 36096 | case 3778: /* avx_blendvpd256 */ |
| 36097 | case 3777: /* sse4_1_blendvps */ |
| 36098 | case 3776: /* avx_blendvps256 */ |
| 36099 | case 3775: /* sse4_1_blendpd */ |
| 36100 | case 3774: /* avx_blendpd256 */ |
| 36101 | case 3773: /* sse4_1_blendps */ |
| 36102 | case 3772: /* avx_blendps256 */ |
| 36103 | case 3767: /* sse4a_vmmovntv2df */ |
| 36104 | case 3766: /* sse4a_vmmovntv4sf */ |
| 36105 | case 3765: /* sse4a_movntdf */ |
| 36106 | case 3764: /* sse4a_movntsf */ |
| 36107 | case 3671: /* *sse2_maskmovdqu */ |
| 36108 | case 3670: /* *sse2_maskmovdqu */ |
| 36109 | case 3669: /* *sse2_pmovmskb_zext */ |
| 36110 | case 3668: /* *avx2_pmovmskb_zext */ |
| 36111 | case 3667: /* sse2_pmovmskb */ |
| 36112 | case 3666: /* avx2_pmovmskb */ |
| 36113 | case 3665: /* *sse2_movmskpd_zext */ |
| 36114 | case 3664: /* *avx_movmskpd256_zext */ |
| 36115 | case 3663: /* *sse_movmskps_zext */ |
| 36116 | case 3662: /* *avx_movmskps256_zext */ |
| 36117 | case 3661: /* sse2_movmskpd */ |
| 36118 | case 3660: /* avx_movmskpd256 */ |
| 36119 | case 3659: /* sse_movmskps */ |
| 36120 | case 3658: /* avx_movmskps256 */ |
| 36121 | case 3620: /* sse2_loadld */ |
| 36122 | case 2930: /* *avx512f_us_truncatev8div16qi2_mask_1 */ |
| 36123 | case 2929: /* *avx512f_truncatev8div16qi2_mask_1 */ |
| 36124 | case 2928: /* *avx512f_ss_truncatev8div16qi2_mask_1 */ |
| 36125 | case 2927: /* avx512f_us_truncatev8div16qi2_mask */ |
| 36126 | case 2926: /* avx512f_truncatev8div16qi2_mask */ |
| 36127 | case 2925: /* avx512f_ss_truncatev8div16qi2_mask */ |
| 36128 | case 2921: /* *avx512f_us_truncatev8div16qi2 */ |
| 36129 | case 2920: /* *avx512f_truncatev8div16qi2 */ |
| 36130 | case 2919: /* *avx512f_ss_truncatev8div16qi2 */ |
| 36131 | case 2915: /* *avx512vl_us_truncatev2div2si2_mask_1 */ |
| 36132 | case 2914: /* *avx512vl_truncatev2div2si2_mask_1 */ |
| 36133 | case 2913: /* *avx512vl_ss_truncatev2div2si2_mask_1 */ |
| 36134 | case 2912: /* avx512vl_us_truncatev2div2si2_mask */ |
| 36135 | case 2911: /* avx512vl_truncatev2div2si2_mask */ |
| 36136 | case 2910: /* avx512vl_ss_truncatev2div2si2_mask */ |
| 36137 | case 2906: /* *avx512vl_us_truncatev2div2si2 */ |
| 36138 | case 2905: /* *avx512vl_truncatev2div2si2 */ |
| 36139 | case 2904: /* *avx512vl_ss_truncatev2div2si2 */ |
| 36140 | case 2900: /* *avx512vl_us_truncatev2div2hi2_mask_1 */ |
| 36141 | case 2899: /* *avx512vl_truncatev2div2hi2_mask_1 */ |
| 36142 | case 2898: /* *avx512vl_ss_truncatev2div2hi2_mask_1 */ |
| 36143 | case 2897: /* avx512vl_us_truncatev2div2hi2_mask */ |
| 36144 | case 2896: /* avx512vl_truncatev2div2hi2_mask */ |
| 36145 | case 2895: /* avx512vl_ss_truncatev2div2hi2_mask */ |
| 36146 | case 2885: /* *avx512vl_us_truncatev4div4hi2_mask_1 */ |
| 36147 | case 2884: /* *avx512vl_truncatev4div4hi2_mask_1 */ |
| 36148 | case 2883: /* *avx512vl_ss_truncatev4div4hi2_mask_1 */ |
| 36149 | case 2882: /* *avx512vl_us_truncatev4siv4hi2_mask_1 */ |
| 36150 | case 2881: /* *avx512vl_truncatev4siv4hi2_mask_1 */ |
| 36151 | case 2880: /* *avx512vl_ss_truncatev4siv4hi2_mask_1 */ |
| 36152 | case 2879: /* avx512vl_us_truncatev4div4hi2_mask */ |
| 36153 | case 2878: /* avx512vl_truncatev4div4hi2_mask */ |
| 36154 | case 2877: /* avx512vl_ss_truncatev4div4hi2_mask */ |
| 36155 | case 2876: /* avx512vl_us_truncatev4siv4hi2_mask */ |
| 36156 | case 2875: /* avx512vl_truncatev4siv4hi2_mask */ |
| 36157 | case 2874: /* avx512vl_ss_truncatev4siv4hi2_mask */ |
| 36158 | case 2867: /* *avx512vl_us_truncatev4siv4hi2 */ |
| 36159 | case 2866: /* *avx512vl_truncatev4siv4hi2 */ |
| 36160 | case 2865: /* *avx512vl_ss_truncatev4siv4hi2 */ |
| 36161 | case 2864: /* *avx512vl_us_truncatev2div2hi2 */ |
| 36162 | case 2863: /* *avx512vl_truncatev2div2hi2 */ |
| 36163 | case 2862: /* *avx512vl_ss_truncatev2div2hi2 */ |
| 36164 | case 2861: /* *avx512vl_us_truncatev4div4hi2 */ |
| 36165 | case 2860: /* *avx512vl_truncatev4div4hi2 */ |
| 36166 | case 2859: /* *avx512vl_ss_truncatev4div4hi2 */ |
| 36167 | case 2852: /* *avx512vl_us_truncatev8siv8qi2_mask_1 */ |
| 36168 | case 2851: /* *avx512vl_truncatev8siv8qi2_mask_1 */ |
| 36169 | case 2850: /* *avx512vl_ss_truncatev8siv8qi2_mask_1 */ |
| 36170 | case 2849: /* *avx512vl_us_truncatev8hiv8qi2_mask_1 */ |
| 36171 | case 2848: /* *avx512vl_truncatev8hiv8qi2_mask_1 */ |
| 36172 | case 2847: /* *avx512vl_ss_truncatev8hiv8qi2_mask_1 */ |
| 36173 | case 2846: /* avx512vl_us_truncatev8siv8qi2_mask */ |
| 36174 | case 2845: /* avx512vl_truncatev8siv8qi2_mask */ |
| 36175 | case 2844: /* avx512vl_ss_truncatev8siv8qi2_mask */ |
| 36176 | case 2843: /* avx512vl_us_truncatev8hiv8qi2_mask */ |
| 36177 | case 2842: /* avx512vl_truncatev8hiv8qi2_mask */ |
| 36178 | case 2841: /* avx512vl_ss_truncatev8hiv8qi2_mask */ |
| 36179 | case 2828: /* *avx512vl_us_truncatev4div4qi2_mask_1 */ |
| 36180 | case 2827: /* *avx512vl_truncatev4div4qi2_mask_1 */ |
| 36181 | case 2826: /* *avx512vl_ss_truncatev4div4qi2_mask_1 */ |
| 36182 | case 2825: /* *avx512vl_us_truncatev4siv4qi2_mask_1 */ |
| 36183 | case 2824: /* *avx512vl_truncatev4siv4qi2_mask_1 */ |
| 36184 | case 2823: /* *avx512vl_ss_truncatev4siv4qi2_mask_1 */ |
| 36185 | case 2822: /* avx512vl_us_truncatev4div4qi2_mask */ |
| 36186 | case 2821: /* avx512vl_truncatev4div4qi2_mask */ |
| 36187 | case 2820: /* avx512vl_ss_truncatev4div4qi2_mask */ |
| 36188 | case 2819: /* avx512vl_us_truncatev4siv4qi2_mask */ |
| 36189 | case 2818: /* avx512vl_truncatev4siv4qi2_mask */ |
| 36190 | case 2817: /* avx512vl_ss_truncatev4siv4qi2_mask */ |
| 36191 | case 2807: /* *avx512vl_us_truncatev2div2qi2_mask_1 */ |
| 36192 | case 2806: /* *avx512vl_truncatev2div2qi2_mask_1 */ |
| 36193 | case 2805: /* *avx512vl_ss_truncatev2div2qi2_mask_1 */ |
| 36194 | case 2804: /* avx512vl_us_truncatev2div2qi2_mask */ |
| 36195 | case 2803: /* avx512vl_truncatev2div2qi2_mask */ |
| 36196 | case 2802: /* avx512vl_ss_truncatev2div2qi2_mask */ |
| 36197 | case 2798: /* *avx512vl_us_truncatev8hiv8qi2 */ |
| 36198 | case 2797: /* *avx512vl_truncatev8hiv8qi2 */ |
| 36199 | case 2796: /* *avx512vl_ss_truncatev8hiv8qi2 */ |
| 36200 | case 2795: /* *avx512vl_us_truncatev4siv4qi2 */ |
| 36201 | case 2794: /* *avx512vl_truncatev4siv4qi2 */ |
| 36202 | case 2793: /* *avx512vl_ss_truncatev4siv4qi2 */ |
| 36203 | case 2792: /* *avx512vl_us_truncatev8siv8qi2 */ |
| 36204 | case 2791: /* *avx512vl_truncatev8siv8qi2 */ |
| 36205 | case 2790: /* *avx512vl_ss_truncatev8siv8qi2 */ |
| 36206 | case 2789: /* *avx512vl_us_truncatev2div2qi2 */ |
| 36207 | case 2788: /* *avx512vl_truncatev2div2qi2 */ |
| 36208 | case 2787: /* *avx512vl_ss_truncatev2div2qi2 */ |
| 36209 | case 2786: /* *avx512vl_us_truncatev4div4qi2 */ |
| 36210 | case 2785: /* *avx512vl_truncatev4div4qi2 */ |
| 36211 | case 2784: /* *avx512vl_ss_truncatev4div4qi2 */ |
| 36212 | case 2729: /* *vec_extractv2df_0_sse */ |
| 36213 | case 2727: /* *vec_extractv2df_1_sse */ |
| 36214 | case 2461: /* *vec_concatv4sf */ |
| 36215 | case 2453: /* sse_movss */ |
| 36216 | case 2451: /* sse_storelps */ |
| 36217 | case 2450: /* sse_loadhps */ |
| 36218 | case 2449: /* sse_storehps */ |
| 36219 | case 2419: /* sse_movlhps */ |
| 36220 | case 2418: /* sse_movhlps */ |
| 36221 | case 1304: /* sse2_movntv2df */ |
| 36222 | case 1303: /* avx_movntv4df */ |
| 36223 | case 1302: /* avx512f_movntv8df */ |
| 36224 | case 1301: /* sse_movntv4sf */ |
| 36225 | case 1300: /* avx_movntv8sf */ |
| 36226 | case 1299: /* avx512f_movntv16sf */ |
| 36227 | case 1298: /* sse2_movntidi */ |
| 36228 | case 1297: /* sse2_movntisi */ |
| 36229 | case 1296: /* sse3_lddqu */ |
| 36230 | case 1295: /* avx_lddqu256 */ |
| 36231 | case 1293: /* sse2_movq128 */ |
| 36232 | case 1274: /* avx512vl_blendmv8hi */ |
| 36233 | case 1273: /* avx512vl_blendmv16hi */ |
| 36234 | case 1272: /* avx512bw_blendmv32hi */ |
| 36235 | case 1271: /* avx512vl_blendmv32qi */ |
| 36236 | case 1270: /* avx512vl_blendmv16qi */ |
| 36237 | case 1269: /* avx512bw_blendmv64qi */ |
| 36238 | case 1268: /* avx512vl_blendmv2df */ |
| 36239 | case 1267: /* avx512vl_blendmv4df */ |
| 36240 | case 1266: /* avx512f_blendmv8df */ |
| 36241 | case 1265: /* avx512vl_blendmv4sf */ |
| 36242 | case 1264: /* avx512vl_blendmv8sf */ |
| 36243 | case 1263: /* avx512f_blendmv16sf */ |
| 36244 | case 1262: /* avx512vl_blendmv2di */ |
| 36245 | case 1261: /* avx512vl_blendmv4di */ |
| 36246 | case 1260: /* avx512f_blendmv8di */ |
| 36247 | case 1259: /* avx512vl_blendmv4si */ |
| 36248 | case 1258: /* avx512vl_blendmv8si */ |
| 36249 | case 1257: /* avx512f_blendmv16si */ |
| 36250 | case 933: /* movmsk_df */ |
| 36251 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) |
| 36252 | { |
| 36253 | return 1; |
| 36254 | } |
| 36255 | else if (cached_memory == MEMORY_LOAD) |
| 36256 | { |
| 36257 | return 2; |
| 36258 | } |
| 36259 | else if (cached_memory == MEMORY_STORE) |
| 36260 | { |
| 36261 | return 1; |
| 36262 | } |
| 36263 | else |
| 36264 | { |
| 36265 | return 0; |
| 36266 | } |
| 36267 | |
| 36268 | case 880: /* rintdf2_frndint */ |
| 36269 | return 32 /* 0x20 */; |
| 36270 | |
| 36271 | case 879: /* rintsf2_frndint */ |
| 36272 | return 18 /* 0x12 */; |
| 36273 | |
| 36274 | case 878: /* rintxf2 */ |
| 36275 | case 875: /* fscalexf4_i387 */ |
| 36276 | case 874: /* *f2xm1xf2_i387 */ |
| 36277 | case 873: /* fxtract_extenddfxf3_i387 */ |
| 36278 | case 872: /* fxtract_extendsfxf3_i387 */ |
| 36279 | case 871: /* fxtractxf3_i387 */ |
| 36280 | case 870: /* fyl2xp1_extenddfxf3_i387 */ |
| 36281 | case 869: /* fyl2xp1_extendsfxf3_i387 */ |
| 36282 | case 868: /* fyl2xp1xf3_i387 */ |
| 36283 | case 867: /* fyl2x_extenddfxf3_i387 */ |
| 36284 | case 866: /* fyl2x_extendsfxf3_i387 */ |
| 36285 | case 865: /* fyl2xxf3_i387 */ |
| 36286 | case 864: /* fpatan_extenddfxf3_i387 */ |
| 36287 | case 863: /* fpatan_extendsfxf3_i387 */ |
| 36288 | case 862: /* *fpatanxf3_i387 */ |
| 36289 | case 861: /* fptan_extenddfxf4_i387 */ |
| 36290 | case 860: /* fptan_extendsfxf4_i387 */ |
| 36291 | case 859: /* fptanxf4_i387 */ |
| 36292 | case 858: /* sincos_extenddfxf3_i387 */ |
| 36293 | case 857: /* sincos_extendsfxf3_i387 */ |
| 36294 | case 856: /* sincosxf3 */ |
| 36295 | case 855: /* *cos_extenddfxf2_i387 */ |
| 36296 | case 854: /* *sin_extenddfxf2_i387 */ |
| 36297 | case 853: /* *cos_extendsfxf2_i387 */ |
| 36298 | case 852: /* *sin_extendsfxf2_i387 */ |
| 36299 | case 851: /* *cosxf2_i387 */ |
| 36300 | case 850: /* *sinxf2_i387 */ |
| 36301 | case 849: /* fprem1xf4_i387 */ |
| 36302 | case 848: /* fpremxf4_i387 */ |
| 36303 | case 844: /* sqrt_extenddfxf2_i387 */ |
| 36304 | case 843: /* sqrt_extendsfxf2_i387 */ |
| 36305 | case 842: /* sqrtxf2 */ |
| 36306 | return 38 /* 0x26 */; |
| 36307 | |
| 36308 | case 693: /* simple_return_indirect_internal */ |
| 36309 | case 663: /* *tablejump_1 */ |
| 36310 | case 662: /* *tablejump_1 */ |
| 36311 | case 661: /* *indirect_jump */ |
| 36312 | case 660: /* *indirect_jump */ |
| 36313 | extract_constrain_insn_cached (insn); |
| 36314 | if ( |
| 36315 | #line 12442 "/___NETBSD_SRC___/tools/gcc/../../external/gpl3/gcc/dist/gcc/config/i386/i386.md" |
| 36316 | ((cfun->machine->indirect_branch_type |
| 36317 | != indirect_branch_keep))) |
| 36318 | { |
| 36319 | return 6; |
| 36320 | } |
| 36321 | else if ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) |
| 36322 | { |
| 36323 | return 1; |
| 36324 | } |
| 36325 | else |
| 36326 | { |
| 36327 | return 2; |
| 36328 | } |
| 36329 | |
| 36330 | case 659: /* jump */ |
| 36331 | case 628: /* *jcc_2 */ |
| 36332 | case 627: /* *jcc_1 */ |
| 36333 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) |
| 36334 | { |
| 36335 | return 1; |
| 36336 | } |
| 36337 | else |
| 36338 | { |
| 36339 | return 2; |
| 36340 | } |
| 36341 | |
| 36342 | case 4043: /* xop_pcom_tfv2di3 */ |
| 36343 | case 4042: /* xop_pcom_tfv4si3 */ |
| 36344 | case 4041: /* xop_pcom_tfv8hi3 */ |
| 36345 | case 4040: /* xop_pcom_tfv16qi3 */ |
| 36346 | case 4039: /* xop_maskcmp_uns2v2di3 */ |
| 36347 | case 4038: /* xop_maskcmp_uns2v4si3 */ |
| 36348 | case 4037: /* xop_maskcmp_uns2v8hi3 */ |
| 36349 | case 4036: /* xop_maskcmp_uns2v16qi3 */ |
| 36350 | case 4035: /* xop_maskcmp_unsv2di3 */ |
| 36351 | case 4034: /* xop_maskcmp_unsv4si3 */ |
| 36352 | case 4033: /* xop_maskcmp_unsv8hi3 */ |
| 36353 | case 4032: /* xop_maskcmp_unsv16qi3 */ |
| 36354 | case 3890: /* ptesttf2 */ |
| 36355 | case 3889: /* avx_ptestv4df */ |
| 36356 | case 3888: /* avx_ptestv8sf */ |
| 36357 | case 3887: /* avx_ptestv4di */ |
| 36358 | case 3886: /* avx_ptestv8si */ |
| 36359 | case 3885: /* avx_ptestv16hi */ |
| 36360 | case 3884: /* avx_ptestv32qi */ |
| 36361 | case 3883: /* sse4_1_ptestv2df */ |
| 36362 | case 3882: /* sse4_1_ptestv4sf */ |
| 36363 | case 3881: /* sse4_1_ptestv2di */ |
| 36364 | case 3880: /* sse4_1_ptestv4si */ |
| 36365 | case 3879: /* sse4_1_ptestv8hi */ |
| 36366 | case 3878: /* sse4_1_ptestv16qi */ |
| 36367 | case 3877: /* avx_vtestpd */ |
| 36368 | case 3876: /* avx_vtestpd256 */ |
| 36369 | case 3875: /* avx_vtestps */ |
| 36370 | case 3874: /* avx_vtestps256 */ |
| 36371 | case 3383: /* sse2_gtv4si3 */ |
| 36372 | case 3382: /* sse2_gtv8hi3 */ |
| 36373 | case 3381: /* sse2_gtv16qi3 */ |
| 36374 | case 3380: /* avx512vl_gtv8hi3_mask */ |
| 36375 | case 3379: /* avx512vl_gtv8hi3 */ |
| 36376 | case 3378: /* avx512vl_gtv16hi3_mask */ |
| 36377 | case 3377: /* avx512vl_gtv16hi3 */ |
| 36378 | case 3376: /* avx512bw_gtv32hi3_mask */ |
| 36379 | case 3375: /* avx512bw_gtv32hi3 */ |
| 36380 | case 3374: /* avx512vl_gtv32qi3_mask */ |
| 36381 | case 3373: /* avx512vl_gtv32qi3 */ |
| 36382 | case 3372: /* avx512vl_gtv16qi3_mask */ |
| 36383 | case 3371: /* avx512vl_gtv16qi3 */ |
| 36384 | case 3370: /* avx512bw_gtv64qi3_mask */ |
| 36385 | case 3369: /* avx512bw_gtv64qi3 */ |
| 36386 | case 3368: /* avx512vl_gtv2di3_mask */ |
| 36387 | case 3367: /* avx512vl_gtv2di3 */ |
| 36388 | case 3366: /* avx512vl_gtv4di3_mask */ |
| 36389 | case 3365: /* avx512vl_gtv4di3 */ |
| 36390 | case 3364: /* avx512f_gtv8di3_mask */ |
| 36391 | case 3363: /* avx512f_gtv8di3 */ |
| 36392 | case 3362: /* avx512vl_gtv4si3_mask */ |
| 36393 | case 3361: /* avx512vl_gtv4si3 */ |
| 36394 | case 3360: /* avx512vl_gtv8si3_mask */ |
| 36395 | case 3359: /* avx512vl_gtv8si3 */ |
| 36396 | case 3358: /* avx512f_gtv16si3_mask */ |
| 36397 | case 3357: /* avx512f_gtv16si3 */ |
| 36398 | case 3356: /* avx2_gtv4di3 */ |
| 36399 | case 3355: /* avx2_gtv8si3 */ |
| 36400 | case 3354: /* avx2_gtv16hi3 */ |
| 36401 | case 3353: /* avx2_gtv32qi3 */ |
| 36402 | case 3352: /* sse4_2_gtv2di3 */ |
| 36403 | case 3351: /* *sse2_eqv4si3 */ |
| 36404 | case 3350: /* *sse2_eqv8hi3 */ |
| 36405 | case 3349: /* *sse2_eqv16qi3 */ |
| 36406 | case 3348: /* *sse4_1_eqv2di3 */ |
| 36407 | case 3347: /* avx512vl_eqv2di3_mask_1 */ |
| 36408 | case 3346: /* avx512vl_eqv2di3_1 */ |
| 36409 | case 3345: /* avx512vl_eqv4di3_mask_1 */ |
| 36410 | case 3344: /* avx512vl_eqv4di3_1 */ |
| 36411 | case 3343: /* avx512f_eqv8di3_mask_1 */ |
| 36412 | case 3342: /* avx512f_eqv8di3_1 */ |
| 36413 | case 3341: /* avx512vl_eqv4si3_mask_1 */ |
| 36414 | case 3340: /* avx512vl_eqv4si3_1 */ |
| 36415 | case 3339: /* avx512vl_eqv8si3_mask_1 */ |
| 36416 | case 3338: /* avx512vl_eqv8si3_1 */ |
| 36417 | case 3337: /* avx512f_eqv16si3_mask_1 */ |
| 36418 | case 3336: /* avx512f_eqv16si3_1 */ |
| 36419 | case 3335: /* avx512vl_eqv8hi3_mask_1 */ |
| 36420 | case 3334: /* avx512vl_eqv8hi3_1 */ |
| 36421 | case 3333: /* avx512vl_eqv16hi3_mask_1 */ |
| 36422 | case 3332: /* avx512vl_eqv16hi3_1 */ |
| 36423 | case 3331: /* avx512bw_eqv32hi3_mask_1 */ |
| 36424 | case 3330: /* avx512bw_eqv32hi3_1 */ |
| 36425 | case 3329: /* avx512vl_eqv32qi3_mask_1 */ |
| 36426 | case 3328: /* avx512vl_eqv32qi3_1 */ |
| 36427 | case 3327: /* avx512vl_eqv16qi3_mask_1 */ |
| 36428 | case 3326: /* avx512vl_eqv16qi3_1 */ |
| 36429 | case 3325: /* avx512bw_eqv64qi3_mask_1 */ |
| 36430 | case 3324: /* avx512bw_eqv64qi3_1 */ |
| 36431 | case 3323: /* *avx2_eqv4di3 */ |
| 36432 | case 3322: /* *avx2_eqv8si3 */ |
| 36433 | case 3321: /* *avx2_eqv16hi3 */ |
| 36434 | case 3320: /* *avx2_eqv32qi3 */ |
| 36435 | case 1740: /* sse2_ucomi_round */ |
| 36436 | case 1739: /* sse2_ucomi */ |
| 36437 | case 1738: /* sse_ucomi_round */ |
| 36438 | case 1737: /* sse_ucomi */ |
| 36439 | case 1736: /* sse2_comi_round */ |
| 36440 | case 1735: /* sse2_comi */ |
| 36441 | case 1734: /* sse_comi_round */ |
| 36442 | case 1733: /* sse_comi */ |
| 36443 | case 1732: /* avx512f_maskcmpv2df3 */ |
| 36444 | case 1731: /* avx512f_maskcmpv4df3 */ |
| 36445 | case 1730: /* avx512f_maskcmpv8df3 */ |
| 36446 | case 1729: /* avx512f_maskcmpv4sf3 */ |
| 36447 | case 1728: /* avx512f_maskcmpv8sf3 */ |
| 36448 | case 1727: /* avx512f_maskcmpv16sf3 */ |
| 36449 | case 1726: /* avx512f_vmcmpv2df3_mask_round */ |
| 36450 | case 1725: /* avx512f_vmcmpv2df3_mask */ |
| 36451 | case 1724: /* avx512f_vmcmpv4sf3_mask_round */ |
| 36452 | case 1723: /* avx512f_vmcmpv4sf3_mask */ |
| 36453 | case 1722: /* avx512f_vmcmpv2df3_round */ |
| 36454 | case 1721: /* avx512f_vmcmpv2df3 */ |
| 36455 | case 1720: /* avx512f_vmcmpv4sf3_round */ |
| 36456 | case 1719: /* avx512f_vmcmpv4sf3 */ |
| 36457 | case 1718: /* avx512vl_ucmpv2di3_mask */ |
| 36458 | case 1717: /* avx512vl_ucmpv2di3 */ |
| 36459 | case 1716: /* avx512vl_ucmpv4di3_mask */ |
| 36460 | case 1715: /* avx512vl_ucmpv4di3 */ |
| 36461 | case 1714: /* avx512f_ucmpv8di3_mask */ |
| 36462 | case 1713: /* avx512f_ucmpv8di3 */ |
| 36463 | case 1712: /* avx512vl_ucmpv4si3_mask */ |
| 36464 | case 1711: /* avx512vl_ucmpv4si3 */ |
| 36465 | case 1710: /* avx512vl_ucmpv8si3_mask */ |
| 36466 | case 1709: /* avx512vl_ucmpv8si3 */ |
| 36467 | case 1708: /* avx512f_ucmpv16si3_mask */ |
| 36468 | case 1707: /* avx512f_ucmpv16si3 */ |
| 36469 | case 1706: /* avx512vl_ucmpv8hi3_mask */ |
| 36470 | case 1705: /* avx512vl_ucmpv8hi3 */ |
| 36471 | case 1704: /* avx512vl_ucmpv16hi3_mask */ |
| 36472 | case 1703: /* avx512vl_ucmpv16hi3 */ |
| 36473 | case 1702: /* avx512bw_ucmpv32hi3_mask */ |
| 36474 | case 1701: /* avx512bw_ucmpv32hi3 */ |
| 36475 | case 1700: /* avx512vl_ucmpv32qi3_mask */ |
| 36476 | case 1699: /* avx512vl_ucmpv32qi3 */ |
| 36477 | case 1698: /* avx512vl_ucmpv16qi3_mask */ |
| 36478 | case 1697: /* avx512vl_ucmpv16qi3 */ |
| 36479 | case 1696: /* avx512bw_ucmpv64qi3_mask */ |
| 36480 | case 1695: /* avx512bw_ucmpv64qi3 */ |
| 36481 | case 1694: /* avx512vl_cmpv8hi3_mask */ |
| 36482 | case 1693: /* avx512vl_cmpv8hi3 */ |
| 36483 | case 1692: /* avx512vl_cmpv16hi3_mask */ |
| 36484 | case 1691: /* avx512vl_cmpv16hi3 */ |
| 36485 | case 1690: /* avx512bw_cmpv32hi3_mask */ |
| 36486 | case 1689: /* avx512bw_cmpv32hi3 */ |
| 36487 | case 1688: /* avx512vl_cmpv32qi3_mask */ |
| 36488 | case 1687: /* avx512vl_cmpv32qi3 */ |
| 36489 | case 1686: /* avx512vl_cmpv16qi3_mask */ |
| 36490 | case 1685: /* avx512vl_cmpv16qi3 */ |
| 36491 | case 1684: /* avx512bw_cmpv64qi3_mask */ |
| 36492 | case 1683: /* avx512bw_cmpv64qi3 */ |
| 36493 | case 1682: /* avx512vl_cmpv2df3_mask */ |
| 36494 | case 1681: /* avx512vl_cmpv2df3 */ |
| 36495 | case 1680: /* avx512vl_cmpv4df3_mask */ |
| 36496 | case 1679: /* avx512vl_cmpv4df3 */ |
| 36497 | case 1678: /* avx512f_cmpv8df3_mask_round */ |
| 36498 | case 1677: /* avx512f_cmpv8df3_round */ |
| 36499 | case 1676: /* avx512f_cmpv8df3_mask */ |
| 36500 | case 1675: /* avx512f_cmpv8df3 */ |
| 36501 | case 1674: /* avx512vl_cmpv4sf3_mask */ |
| 36502 | case 1673: /* avx512vl_cmpv4sf3 */ |
| 36503 | case 1672: /* avx512vl_cmpv8sf3_mask */ |
| 36504 | case 1671: /* avx512vl_cmpv8sf3 */ |
| 36505 | case 1670: /* avx512f_cmpv16sf3_mask_round */ |
| 36506 | case 1669: /* avx512f_cmpv16sf3_round */ |
| 36507 | case 1668: /* avx512f_cmpv16sf3_mask */ |
| 36508 | case 1667: /* avx512f_cmpv16sf3 */ |
| 36509 | case 1666: /* avx512vl_cmpv2di3_mask */ |
| 36510 | case 1665: /* avx512vl_cmpv2di3 */ |
| 36511 | case 1664: /* avx512vl_cmpv4di3_mask */ |
| 36512 | case 1663: /* avx512vl_cmpv4di3 */ |
| 36513 | case 1662: /* avx512f_cmpv8di3_mask_round */ |
| 36514 | case 1661: /* avx512f_cmpv8di3_round */ |
| 36515 | case 1660: /* avx512f_cmpv8di3_mask */ |
| 36516 | case 1659: /* avx512f_cmpv8di3 */ |
| 36517 | case 1658: /* avx512vl_cmpv4si3_mask */ |
| 36518 | case 1657: /* avx512vl_cmpv4si3 */ |
| 36519 | case 1656: /* avx512vl_cmpv8si3_mask */ |
| 36520 | case 1655: /* avx512vl_cmpv8si3 */ |
| 36521 | case 1654: /* avx512f_cmpv16si3_mask_round */ |
| 36522 | case 1653: /* avx512f_cmpv16si3_round */ |
| 36523 | case 1652: /* avx512f_cmpv16si3_mask */ |
| 36524 | case 1651: /* avx512f_cmpv16si3 */ |
| 36525 | case 1650: /* sse2_vmmaskcmpv2df3 */ |
| 36526 | case 1649: /* sse_vmmaskcmpv4sf3 */ |
| 36527 | case 1648: /* sse2_maskcmpv2df3 */ |
| 36528 | case 1647: /* avx_maskcmpv4df3 */ |
| 36529 | case 1646: /* sse_maskcmpv4sf3 */ |
| 36530 | case 1645: /* avx_maskcmpv8sf3 */ |
| 36531 | case 1644: /* *sse2_maskcmpv2df3_comm */ |
| 36532 | case 1643: /* *avx_maskcmpv4df3_comm */ |
| 36533 | case 1642: /* *sse_maskcmpv4sf3_comm */ |
| 36534 | case 1641: /* *avx_maskcmpv8sf3_comm */ |
| 36535 | case 1640: /* avx_vmcmpv2df3 */ |
| 36536 | case 1639: /* avx_vmcmpv4sf3 */ |
| 36537 | case 1638: /* avx_cmpv2df3 */ |
| 36538 | case 1637: /* avx_cmpv4df3 */ |
| 36539 | case 1636: /* avx_cmpv4sf3 */ |
| 36540 | case 1635: /* avx_cmpv8sf3 */ |
| 36541 | case 1620: /* sse3_hsubv4sf3 */ |
| 36542 | case 1619: /* sse3_haddv4sf3 */ |
| 36543 | case 1618: /* avx_hsubv8sf3 */ |
| 36544 | case 1617: /* avx_haddv8sf3 */ |
| 36545 | case 1616: /* *sse3_hsubv2df3_low */ |
| 36546 | case 1615: /* *sse3_haddv2df3_low */ |
| 36547 | case 1614: /* sse3_hsubv2df3 */ |
| 36548 | case 1613: /* *sse3_haddv2df3 */ |
| 36549 | case 1612: /* avx_hsubv4df3 */ |
| 36550 | case 1611: /* avx_haddv4df3 */ |
| 36551 | case 1610: /* sse3_addsubv4sf3 */ |
| 36552 | case 1609: /* avx_addsubv8sf3 */ |
| 36553 | case 1608: /* sse3_addsubv2df3 */ |
| 36554 | case 1607: /* avx_addsubv4df3 */ |
| 36555 | case 1598: /* ieee_minv2df3_mask */ |
| 36556 | case 1597: /* ieee_minv2df3 */ |
| 36557 | case 1596: /* ieee_maxv2df3_mask */ |
| 36558 | case 1595: /* ieee_maxv2df3 */ |
| 36559 | case 1594: /* ieee_minv4df3_mask */ |
| 36560 | case 1593: /* ieee_minv4df3 */ |
| 36561 | case 1592: /* ieee_maxv4df3_mask */ |
| 36562 | case 1591: /* ieee_maxv4df3 */ |
| 36563 | case 1590: /* ieee_minv8df3_mask_round */ |
| 36564 | case 1589: /* ieee_minv8df3_mask */ |
| 36565 | case 1588: /* ieee_minv8df3_round */ |
| 36566 | case 1587: /* ieee_minv8df3 */ |
| 36567 | case 1586: /* ieee_maxv8df3_mask_round */ |
| 36568 | case 1585: /* ieee_maxv8df3_mask */ |
| 36569 | case 1584: /* ieee_maxv8df3_round */ |
| 36570 | case 1583: /* ieee_maxv8df3 */ |
| 36571 | case 1582: /* ieee_minv4sf3_mask */ |
| 36572 | case 1581: /* ieee_minv4sf3 */ |
| 36573 | case 1580: /* ieee_maxv4sf3_mask */ |
| 36574 | case 1579: /* ieee_maxv4sf3 */ |
| 36575 | case 1578: /* ieee_minv8sf3_mask */ |
| 36576 | case 1577: /* ieee_minv8sf3 */ |
| 36577 | case 1576: /* ieee_maxv8sf3_mask */ |
| 36578 | case 1575: /* ieee_maxv8sf3 */ |
| 36579 | case 1574: /* ieee_minv16sf3_mask_round */ |
| 36580 | case 1573: /* ieee_minv16sf3_mask */ |
| 36581 | case 1572: /* ieee_minv16sf3_round */ |
| 36582 | case 1571: /* ieee_minv16sf3 */ |
| 36583 | case 1570: /* ieee_maxv16sf3_mask_round */ |
| 36584 | case 1569: /* ieee_maxv16sf3_mask */ |
| 36585 | case 1568: /* ieee_maxv16sf3_round */ |
| 36586 | case 1567: /* ieee_maxv16sf3 */ |
| 36587 | case 1566: /* *sminv2df3_mask_round */ |
| 36588 | case 1565: /* *sminv2df3_mask */ |
| 36589 | case 1564: /* *sminv2df3_round */ |
| 36590 | case 1563: /* *sminv2df3 */ |
| 36591 | case 1562: /* *smaxv2df3_mask_round */ |
| 36592 | case 1561: /* *smaxv2df3_mask */ |
| 36593 | case 1560: /* *smaxv2df3_round */ |
| 36594 | case 1559: /* *smaxv2df3 */ |
| 36595 | case 1558: /* *sminv4df3_mask_round */ |
| 36596 | case 1557: /* *sminv4df3_mask */ |
| 36597 | case 1556: /* *sminv4df3_round */ |
| 36598 | case 1555: /* *sminv4df3 */ |
| 36599 | case 1554: /* *smaxv4df3_mask_round */ |
| 36600 | case 1553: /* *smaxv4df3_mask */ |
| 36601 | case 1552: /* *smaxv4df3_round */ |
| 36602 | case 1551: /* *smaxv4df3 */ |
| 36603 | case 1550: /* *sminv8df3_mask_round */ |
| 36604 | case 1549: /* *sminv8df3_mask */ |
| 36605 | case 1548: /* *sminv8df3_round */ |
| 36606 | case 1547: /* *sminv8df3 */ |
| 36607 | case 1546: /* *smaxv8df3_mask_round */ |
| 36608 | case 1545: /* *smaxv8df3_mask */ |
| 36609 | case 1544: /* *smaxv8df3_round */ |
| 36610 | case 1543: /* *smaxv8df3 */ |
| 36611 | case 1542: /* *sminv4sf3_mask_round */ |
| 36612 | case 1541: /* *sminv4sf3_mask */ |
| 36613 | case 1540: /* *sminv4sf3_round */ |
| 36614 | case 1539: /* *sminv4sf3 */ |
| 36615 | case 1538: /* *smaxv4sf3_mask_round */ |
| 36616 | case 1537: /* *smaxv4sf3_mask */ |
| 36617 | case 1536: /* *smaxv4sf3_round */ |
| 36618 | case 1535: /* *smaxv4sf3 */ |
| 36619 | case 1534: /* *sminv8sf3_mask_round */ |
| 36620 | case 1533: /* *sminv8sf3_mask */ |
| 36621 | case 1532: /* *sminv8sf3_round */ |
| 36622 | case 1531: /* *sminv8sf3 */ |
| 36623 | case 1530: /* *smaxv8sf3_mask_round */ |
| 36624 | case 1529: /* *smaxv8sf3_mask */ |
| 36625 | case 1528: /* *smaxv8sf3_round */ |
| 36626 | case 1527: /* *smaxv8sf3 */ |
| 36627 | case 1526: /* *sminv16sf3_mask_round */ |
| 36628 | case 1525: /* *sminv16sf3_mask */ |
| 36629 | case 1524: /* *sminv16sf3_round */ |
| 36630 | case 1523: /* *sminv16sf3 */ |
| 36631 | case 1522: /* *smaxv16sf3_mask_round */ |
| 36632 | case 1521: /* *smaxv16sf3_mask */ |
| 36633 | case 1520: /* *smaxv16sf3_round */ |
| 36634 | case 1519: /* *smaxv16sf3 */ |
| 36635 | case 1416: /* sse2_vmsubv2df3_round */ |
| 36636 | case 1415: /* sse2_vmsubv2df3 */ |
| 36637 | case 1414: /* sse2_vmaddv2df3_round */ |
| 36638 | case 1413: /* sse2_vmaddv2df3 */ |
| 36639 | case 1412: /* sse_vmsubv4sf3_round */ |
| 36640 | case 1411: /* sse_vmsubv4sf3 */ |
| 36641 | case 1410: /* sse_vmaddv4sf3_round */ |
| 36642 | case 1409: /* sse_vmaddv4sf3 */ |
| 36643 | case 1408: /* *subv2df3_mask_round */ |
| 36644 | case 1407: /* *subv2df3_mask */ |
| 36645 | case 1406: /* *subv2df3_round */ |
| 36646 | case 1405: /* *subv2df3 */ |
| 36647 | case 1404: /* *addv2df3_mask_round */ |
| 36648 | case 1403: /* *addv2df3_mask */ |
| 36649 | case 1402: /* *addv2df3_round */ |
| 36650 | case 1401: /* *addv2df3 */ |
| 36651 | case 1400: /* *subv4df3_mask_round */ |
| 36652 | case 1399: /* *subv4df3_mask */ |
| 36653 | case 1398: /* *subv4df3_round */ |
| 36654 | case 1397: /* *subv4df3 */ |
| 36655 | case 1396: /* *addv4df3_mask_round */ |
| 36656 | case 1395: /* *addv4df3_mask */ |
| 36657 | case 1394: /* *addv4df3_round */ |
| 36658 | case 1393: /* *addv4df3 */ |
| 36659 | case 1392: /* *subv8df3_mask_round */ |
| 36660 | case 1391: /* *subv8df3_mask */ |
| 36661 | case 1390: /* *subv8df3_round */ |
| 36662 | case 1389: /* *subv8df3 */ |
| 36663 | case 1388: /* *addv8df3_mask_round */ |
| 36664 | case 1387: /* *addv8df3_mask */ |
| 36665 | case 1386: /* *addv8df3_round */ |
| 36666 | case 1385: /* *addv8df3 */ |
| 36667 | case 1384: /* *subv4sf3_mask_round */ |
| 36668 | case 1383: /* *subv4sf3_mask */ |
| 36669 | case 1382: /* *subv4sf3_round */ |
| 36670 | case 1381: /* *subv4sf3 */ |
| 36671 | case 1380: /* *addv4sf3_mask_round */ |
| 36672 | case 1379: /* *addv4sf3_mask */ |
| 36673 | case 1378: /* *addv4sf3_round */ |
| 36674 | case 1377: /* *addv4sf3 */ |
| 36675 | case 1376: /* *subv8sf3_mask_round */ |
| 36676 | case 1375: /* *subv8sf3_mask */ |
| 36677 | case 1374: /* *subv8sf3_round */ |
| 36678 | case 1373: /* *subv8sf3 */ |
| 36679 | case 1372: /* *addv8sf3_mask_round */ |
| 36680 | case 1371: /* *addv8sf3_mask */ |
| 36681 | case 1370: /* *addv8sf3_round */ |
| 36682 | case 1369: /* *addv8sf3 */ |
| 36683 | case 1368: /* *subv16sf3_mask_round */ |
| 36684 | case 1367: /* *subv16sf3_mask */ |
| 36685 | case 1366: /* *subv16sf3_round */ |
| 36686 | case 1365: /* *subv16sf3 */ |
| 36687 | case 1364: /* *addv16sf3_mask_round */ |
| 36688 | case 1363: /* *addv16sf3_mask */ |
| 36689 | case 1362: /* *addv16sf3_round */ |
| 36690 | case 1361: /* *addv16sf3 */ |
| 36691 | case 992: /* *ieee_smindf3 */ |
| 36692 | case 991: /* *ieee_smaxdf3 */ |
| 36693 | case 990: /* *ieee_sminsf3 */ |
| 36694 | case 989: /* *ieee_smaxsf3 */ |
| 36695 | case 988: /* smindf3 */ |
| 36696 | case 987: /* smaxdf3 */ |
| 36697 | case 986: /* sminsf3 */ |
| 36698 | case 985: /* smaxsf3 */ |
| 36699 | case 626: /* setcc_df_sse */ |
| 36700 | case 625: /* setcc_sf_sse */ |
| 36701 | if (((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) || (cached_memory == MEMORY_LOAD)) |
| 36702 | { |
| 36703 | return 3; |
| 36704 | } |
| 36705 | else |
| 36706 | { |
| 36707 | return 0; |
| 36708 | } |
| 36709 | |
| 36710 | case 624: /* *setcc_qi_slp */ |
| 36711 | case 623: /* *setcc_qi */ |
| 36712 | if (((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) || (cached_memory == MEMORY_STORE)) |
| 36713 | { |
| 36714 | return 1; |
| 36715 | } |
| 36716 | else |
| 36717 | { |
| 36718 | return 0; |
| 36719 | } |
| 36720 | |
| 36721 | case 2528: /* vec_extract_hi_v64qi */ |
| 36722 | case 2524: /* vec_extract_hi_v32hi */ |
| 36723 | case 2510: /* vec_extract_hi_v4df_mask */ |
| 36724 | case 2509: /* vec_extract_hi_v4df */ |
| 36725 | case 2508: /* vec_extract_hi_v4di_mask */ |
| 36726 | case 2507: /* vec_extract_hi_v4di */ |
| 36727 | case 2506: /* vec_extract_lo_v4df_mask */ |
| 36728 | case 2505: /* vec_extract_lo_v4df */ |
| 36729 | case 2504: /* vec_extract_lo_v4di_mask */ |
| 36730 | case 2503: /* vec_extract_lo_v4di */ |
| 36731 | case 602: /* *rotrsi3_1_zext */ |
| 36732 | case 601: /* *rotlsi3_1_zext */ |
| 36733 | case 599: /* *rotrdi3_1 */ |
| 36734 | case 598: /* *rotldi3_1 */ |
| 36735 | case 597: /* *rotrsi3_1 */ |
| 36736 | case 596: /* *rotlsi3_1 */ |
| 36737 | case 561: /* *ashrsi3_1_zext */ |
| 36738 | case 560: /* *lshrsi3_1_zext */ |
| 36739 | case 557: /* *ashrdi3_1 */ |
| 36740 | case 556: /* *lshrdi3_1 */ |
| 36741 | case 555: /* *ashrsi3_1 */ |
| 36742 | case 554: /* *lshrsi3_1 */ |
| 36743 | extract_constrain_insn_cached (insn); |
| 36744 | if (which_alternative == 0) |
| 36745 | { |
| 36746 | return 1; |
| 36747 | } |
| 36748 | else |
| 36749 | { |
| 36750 | return 0; |
| 36751 | } |
| 36752 | |
| 36753 | case 549: /* ashrsi3_cvt */ |
| 36754 | case 548: /* *ashrsi3_cvt_zext */ |
| 36755 | case 547: /* ashrdi3_cvt */ |
| 36756 | extract_constrain_insn_cached (insn); |
| 36757 | if (((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) && (which_alternative == 0)) |
| 36758 | { |
| 36759 | return 1; |
| 36760 | } |
| 36761 | else if ((cached_memory == MEMORY_LOAD) && (which_alternative == 0)) |
| 36762 | { |
| 36763 | return 2; |
| 36764 | } |
| 36765 | else if (which_alternative == 1) |
| 36766 | { |
| 36767 | return 1; |
| 36768 | } |
| 36769 | else |
| 36770 | { |
| 36771 | return 0; |
| 36772 | } |
| 36773 | |
| 36774 | case 386: /* udivmodhiqi3 */ |
| 36775 | case 385: /* *udivmoddi4_noext */ |
| 36776 | case 384: /* *udivmodsi4_noext */ |
| 36777 | case 383: /* *udivmodhi4_noext */ |
| 36778 | case 375: /* divmodhiqi3 */ |
| 36779 | case 374: /* *divmoddi4_noext */ |
| 36780 | case 373: /* *divmodsi4_noext */ |
| 36781 | case 372: /* *divmodhi4_noext */ |
| 36782 | if (((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) || (cached_memory == MEMORY_LOAD)) |
| 36783 | { |
| 36784 | return 23 /* 0x17 */; |
| 36785 | } |
| 36786 | else |
| 36787 | { |
| 36788 | return 0; |
| 36789 | } |
| 36790 | |
| 36791 | case 356: /* *umulditi3_1 */ |
| 36792 | case 355: /* *umulsidi3_1 */ |
| 36793 | extract_constrain_insn_cached (insn); |
| 36794 | if (which_alternative == 1) |
| 36795 | { |
| 36796 | return 3; |
| 36797 | } |
| 36798 | else if (which_alternative == 0) |
| 36799 | { |
| 36800 | return 4; |
| 36801 | } |
| 36802 | else |
| 36803 | { |
| 36804 | return 0; |
| 36805 | } |
| 36806 | |
| 36807 | case 4758: /* avx512vl_compressstorev2df_mask */ |
| 36808 | case 4757: /* avx512vl_compressstorev2di_mask */ |
| 36809 | case 4756: /* avx512vl_compressstorev4sf_mask */ |
| 36810 | case 4755: /* avx512vl_compressstorev4si_mask */ |
| 36811 | case 4754: /* avx512vl_compressstorev4df_mask */ |
| 36812 | case 4753: /* avx512vl_compressstorev4di_mask */ |
| 36813 | case 4752: /* avx512vl_compressstorev8sf_mask */ |
| 36814 | case 4751: /* avx512vl_compressstorev8si_mask */ |
| 36815 | case 4750: /* avx512f_compressstorev8df_mask */ |
| 36816 | case 4749: /* avx512f_compressstorev8di_mask */ |
| 36817 | case 4748: /* avx512f_compressstorev16sf_mask */ |
| 36818 | case 4747: /* avx512f_compressstorev16si_mask */ |
| 36819 | case 2933: /* avx512f_us_truncatev8div16qi2_mask_store */ |
| 36820 | case 2932: /* avx512f_truncatev8div16qi2_mask_store */ |
| 36821 | case 2931: /* avx512f_ss_truncatev8div16qi2_mask_store */ |
| 36822 | case 2924: /* *avx512f_us_truncatev8div16qi2_store */ |
| 36823 | case 2923: /* *avx512f_truncatev8div16qi2_store */ |
| 36824 | case 2922: /* *avx512f_ss_truncatev8div16qi2_store */ |
| 36825 | case 2918: /* avx512vl_us_truncatev2div2si2_mask_store */ |
| 36826 | case 2917: /* avx512vl_truncatev2div2si2_mask_store */ |
| 36827 | case 2916: /* avx512vl_ss_truncatev2div2si2_mask_store */ |
| 36828 | case 2909: /* *avx512vl_us_truncatev2div2si2_store */ |
| 36829 | case 2908: /* *avx512vl_truncatev2div2si2_store */ |
| 36830 | case 2907: /* *avx512vl_ss_truncatev2div2si2_store */ |
| 36831 | case 2903: /* avx512vl_us_truncatev2div2hi2_mask_store */ |
| 36832 | case 2902: /* avx512vl_truncatev2div2hi2_mask_store */ |
| 36833 | case 2901: /* avx512vl_ss_truncatev2div2hi2_mask_store */ |
| 36834 | case 2894: /* *avx512vl_us_truncatev2div2hi2_store */ |
| 36835 | case 2893: /* *avx512vl_truncatev2div2hi2_store */ |
| 36836 | case 2892: /* *avx512vl_ss_truncatev2div2hi2_store */ |
| 36837 | case 2891: /* avx512vl_us_truncatev4div4hi2_mask_store */ |
| 36838 | case 2890: /* avx512vl_truncatev4div4hi2_mask_store */ |
| 36839 | case 2889: /* avx512vl_ss_truncatev4div4hi2_mask_store */ |
| 36840 | case 2888: /* avx512vl_us_truncatev4siv4hi2_mask_store */ |
| 36841 | case 2887: /* avx512vl_truncatev4siv4hi2_mask_store */ |
| 36842 | case 2886: /* avx512vl_ss_truncatev4siv4hi2_mask_store */ |
| 36843 | case 2873: /* *avx512vl_us_truncatev4div4hi2_store */ |
| 36844 | case 2872: /* *avx512vl_truncatev4div4hi2_store */ |
| 36845 | case 2871: /* *avx512vl_ss_truncatev4div4hi2_store */ |
| 36846 | case 2870: /* *avx512vl_us_truncatev4siv4hi2_store */ |
| 36847 | case 2869: /* *avx512vl_truncatev4siv4hi2_store */ |
| 36848 | case 2868: /* *avx512vl_ss_truncatev4siv4hi2_store */ |
| 36849 | case 2858: /* avx512vl_us_truncatev8siv8qi2_mask_store */ |
| 36850 | case 2857: /* avx512vl_truncatev8siv8qi2_mask_store */ |
| 36851 | case 2856: /* avx512vl_ss_truncatev8siv8qi2_mask_store */ |
| 36852 | case 2855: /* avx512vl_us_truncatev8hiv8qi2_mask_store */ |
| 36853 | case 2854: /* avx512vl_truncatev8hiv8qi2_mask_store */ |
| 36854 | case 2853: /* avx512vl_ss_truncatev8hiv8qi2_mask_store */ |
| 36855 | case 2840: /* *avx512vl_us_truncatev8siv8qi2_store */ |
| 36856 | case 2839: /* *avx512vl_truncatev8siv8qi2_store */ |
| 36857 | case 2838: /* *avx512vl_ss_truncatev8siv8qi2_store */ |
| 36858 | case 2837: /* *avx512vl_us_truncatev8hiv8qi2_store */ |
| 36859 | case 2836: /* *avx512vl_truncatev8hiv8qi2_store */ |
| 36860 | case 2835: /* *avx512vl_ss_truncatev8hiv8qi2_store */ |
| 36861 | case 2834: /* avx512vl_us_truncatev4div4qi2_mask_store */ |
| 36862 | case 2833: /* avx512vl_truncatev4div4qi2_mask_store */ |
| 36863 | case 2832: /* avx512vl_ss_truncatev4div4qi2_mask_store */ |
| 36864 | case 2831: /* avx512vl_us_truncatev4siv4qi2_mask_store */ |
| 36865 | case 2830: /* avx512vl_truncatev4siv4qi2_mask_store */ |
| 36866 | case 2829: /* avx512vl_ss_truncatev4siv4qi2_mask_store */ |
| 36867 | case 2816: /* *avx512vl_us_truncatev4div4qi2_store */ |
| 36868 | case 2815: /* *avx512vl_truncatev4div4qi2_store */ |
| 36869 | case 2814: /* *avx512vl_ss_truncatev4div4qi2_store */ |
| 36870 | case 2813: /* *avx512vl_us_truncatev4siv4qi2_store */ |
| 36871 | case 2812: /* *avx512vl_truncatev4siv4qi2_store */ |
| 36872 | case 2811: /* *avx512vl_ss_truncatev4siv4qi2_store */ |
| 36873 | case 2810: /* avx512vl_us_truncatev2div2qi2_mask_store */ |
| 36874 | case 2809: /* avx512vl_truncatev2div2qi2_mask_store */ |
| 36875 | case 2808: /* avx512vl_ss_truncatev2div2qi2_mask_store */ |
| 36876 | case 2801: /* *avx512vl_us_truncatev2div2qi2_store */ |
| 36877 | case 2800: /* *avx512vl_truncatev2div2qi2_store */ |
| 36878 | case 2799: /* *avx512vl_ss_truncatev2div2qi2_store */ |
| 36879 | case 2783: /* avx512vl_us_truncatev16hiv16qi2_mask */ |
| 36880 | case 2782: /* avx512vl_truncatev16hiv16qi2_mask */ |
| 36881 | case 2781: /* avx512vl_ss_truncatev16hiv16qi2_mask */ |
| 36882 | case 2780: /* avx512vl_us_truncatev8siv8hi2_mask */ |
| 36883 | case 2779: /* avx512vl_truncatev8siv8hi2_mask */ |
| 36884 | case 2778: /* avx512vl_ss_truncatev8siv8hi2_mask */ |
| 36885 | case 2777: /* avx512vl_us_truncatev4div4si2_mask */ |
| 36886 | case 2776: /* avx512vl_truncatev4div4si2_mask */ |
| 36887 | case 2775: /* avx512vl_ss_truncatev4div4si2_mask */ |
| 36888 | case 2774: /* *avx512vl_us_truncatev16hiv16qi2 */ |
| 36889 | case 2773: /* *avx512vl_truncatev16hiv16qi2 */ |
| 36890 | case 2772: /* *avx512vl_ss_truncatev16hiv16qi2 */ |
| 36891 | case 2771: /* *avx512vl_us_truncatev8siv8hi2 */ |
| 36892 | case 2770: /* *avx512vl_truncatev8siv8hi2 */ |
| 36893 | case 2769: /* *avx512vl_ss_truncatev8siv8hi2 */ |
| 36894 | case 2768: /* *avx512vl_us_truncatev4div4si2 */ |
| 36895 | case 2767: /* *avx512vl_truncatev4div4si2 */ |
| 36896 | case 2766: /* *avx512vl_ss_truncatev4div4si2 */ |
| 36897 | case 2765: /* avx512bw_us_truncatev32hiv32qi2_mask */ |
| 36898 | case 2764: /* avx512bw_truncatev32hiv32qi2_mask */ |
| 36899 | case 2763: /* avx512bw_ss_truncatev32hiv32qi2_mask */ |
| 36900 | case 2762: /* avx512bw_us_truncatev32hiv32qi2 */ |
| 36901 | case 2761: /* avx512bw_truncatev32hiv32qi2 */ |
| 36902 | case 2760: /* avx512bw_ss_truncatev32hiv32qi2 */ |
| 36903 | case 2759: /* avx512f_us_truncatev8div8hi2_mask */ |
| 36904 | case 2758: /* avx512f_truncatev8div8hi2_mask */ |
| 36905 | case 2757: /* avx512f_ss_truncatev8div8hi2_mask */ |
| 36906 | case 2756: /* avx512f_us_truncatev8div8si2_mask */ |
| 36907 | case 2755: /* avx512f_truncatev8div8si2_mask */ |
| 36908 | case 2754: /* avx512f_ss_truncatev8div8si2_mask */ |
| 36909 | case 2753: /* avx512f_us_truncatev16siv16hi2_mask */ |
| 36910 | case 2752: /* avx512f_truncatev16siv16hi2_mask */ |
| 36911 | case 2751: /* avx512f_ss_truncatev16siv16hi2_mask */ |
| 36912 | case 2750: /* avx512f_us_truncatev16siv16qi2_mask */ |
| 36913 | case 2749: /* avx512f_truncatev16siv16qi2_mask */ |
| 36914 | case 2748: /* avx512f_ss_truncatev16siv16qi2_mask */ |
| 36915 | case 2747: /* *avx512f_us_truncatev8div8hi2 */ |
| 36916 | case 2746: /* *avx512f_truncatev8div8hi2 */ |
| 36917 | case 2745: /* *avx512f_ss_truncatev8div8hi2 */ |
| 36918 | case 2744: /* *avx512f_us_truncatev8div8si2 */ |
| 36919 | case 2743: /* *avx512f_truncatev8div8si2 */ |
| 36920 | case 2742: /* *avx512f_ss_truncatev8div8si2 */ |
| 36921 | case 2741: /* *avx512f_us_truncatev16siv16hi2 */ |
| 36922 | case 2740: /* *avx512f_truncatev16siv16hi2 */ |
| 36923 | case 2739: /* *avx512f_ss_truncatev16siv16hi2 */ |
| 36924 | case 2738: /* *avx512f_us_truncatev16siv16qi2 */ |
| 36925 | case 2737: /* *avx512f_truncatev16siv16qi2 */ |
| 36926 | case 2736: /* *avx512f_ss_truncatev16siv16qi2 */ |
| 36927 | case 1292: /* avx512vl_storev8hi_mask */ |
| 36928 | case 1291: /* avx512vl_storev16hi_mask */ |
| 36929 | case 1290: /* avx512bw_storev32hi_mask */ |
| 36930 | case 1289: /* avx512vl_storev32qi_mask */ |
| 36931 | case 1288: /* avx512vl_storev16qi_mask */ |
| 36932 | case 1287: /* avx512bw_storev64qi_mask */ |
| 36933 | case 1286: /* avx512vl_storev2df_mask */ |
| 36934 | case 1285: /* avx512vl_storev4df_mask */ |
| 36935 | case 1284: /* avx512f_storev8df_mask */ |
| 36936 | case 1283: /* avx512vl_storev4sf_mask */ |
| 36937 | case 1282: /* avx512vl_storev8sf_mask */ |
| 36938 | case 1281: /* avx512f_storev16sf_mask */ |
| 36939 | case 1280: /* avx512vl_storev2di_mask */ |
| 36940 | case 1279: /* avx512vl_storev4di_mask */ |
| 36941 | case 1278: /* avx512f_storev8di_mask */ |
| 36942 | case 1277: /* avx512vl_storev4si_mask */ |
| 36943 | case 1276: /* avx512vl_storev8si_mask */ |
| 36944 | case 1275: /* avx512f_storev16si_mask */ |
| 36945 | case 1217: /* *mmx_femms */ |
| 36946 | case 1216: /* *mmx_emms */ |
| 36947 | case 1007: /* *prefetch_3dnow */ |
| 36948 | case 974: /* *x86_movdicc_0_m1_neg */ |
| 36949 | case 973: /* *x86_movsicc_0_m1_neg */ |
| 36950 | case 972: /* *x86_movdicc_0_m1_se */ |
| 36951 | case 971: /* *x86_movsicc_0_m1_se */ |
| 36952 | case 970: /* *x86_movdicc_0_m1 */ |
| 36953 | case 969: /* *x86_movsicc_0_m1 */ |
| 36954 | case 810: /* *tls_dynamic_gnu2_call_64 */ |
| 36955 | case 809: /* *tls_dynamic_gnu2_lea_64 */ |
| 36956 | case 807: /* *tls_dynamic_gnu2_call_32 */ |
| 36957 | case 806: /* *tls_dynamic_gnu2_lea_32 */ |
| 36958 | case 805: /* *add_tp_di */ |
| 36959 | case 804: /* *add_tp_si */ |
| 36960 | case 803: /* *add_tp_x32_zext */ |
| 36961 | case 802: /* *add_tp_x32 */ |
| 36962 | case 700: /* set_rip_rex64 */ |
| 36963 | case 699: /* set_got_rex64 */ |
| 36964 | case 685: /* *sibcall_value_pop_memory */ |
| 36965 | case 684: /* *sibcall_value_pop */ |
| 36966 | case 683: /* *call_value_pop */ |
| 36967 | case 682: /* *sibcall_value_memory */ |
| 36968 | case 681: /* *sibcall_value_memory */ |
| 36969 | case 680: /* *sibcall_value */ |
| 36970 | case 679: /* *sibcall_value */ |
| 36971 | case 678: /* *sibcall_value_GOT_32 */ |
| 36972 | case 677: /* *call_value_got_x32 */ |
| 36973 | case 676: /* *call_value */ |
| 36974 | case 675: /* *call_value */ |
| 36975 | case 674: /* *sibcall_pop_memory */ |
| 36976 | case 673: /* *sibcall_pop */ |
| 36977 | case 672: /* *call_pop */ |
| 36978 | case 671: /* *sibcall_memory */ |
| 36979 | case 670: /* *sibcall_memory */ |
| 36980 | case 669: /* *sibcall */ |
| 36981 | case 668: /* *sibcall */ |
| 36982 | case 667: /* *sibcall_GOT_32 */ |
| 36983 | case 666: /* *call_got_x32 */ |
| 36984 | case 665: /* *call */ |
| 36985 | case 664: /* *call */ |
| 36986 | case 608: /* *rotrqi3_1_slp */ |
| 36987 | case 607: /* *rotlqi3_1_slp */ |
| 36988 | case 606: /* *rotrhi3_1 */ |
| 36989 | case 605: /* *rotlhi3_1 */ |
| 36990 | case 604: /* *rotrqi3_1 */ |
| 36991 | case 603: /* *rotlqi3_1 */ |
| 36992 | case 585: /* *ashrdi3_cconly */ |
| 36993 | case 584: /* *lshrdi3_cconly */ |
| 36994 | case 583: /* *ashrsi3_cconly */ |
| 36995 | case 582: /* *lshrsi3_cconly */ |
| 36996 | case 581: /* *ashrhi3_cconly */ |
| 36997 | case 580: /* *lshrhi3_cconly */ |
| 36998 | case 579: /* *ashrqi3_cconly */ |
| 36999 | case 578: /* *lshrqi3_cconly */ |
| 37000 | case 577: /* *ashrsi3_cmp_zext */ |
| 37001 | case 576: /* *lshrsi3_cmp_zext */ |
| 37002 | case 575: /* *ashrdi3_cmp */ |
| 37003 | case 574: /* *lshrdi3_cmp */ |
| 37004 | case 573: /* *ashrsi3_cmp */ |
| 37005 | case 572: /* *lshrsi3_cmp */ |
| 37006 | case 571: /* *ashrhi3_cmp */ |
| 37007 | case 570: /* *lshrhi3_cmp */ |
| 37008 | case 569: /* *ashrqi3_cmp */ |
| 37009 | case 568: /* *lshrqi3_cmp */ |
| 37010 | case 567: /* *ashrqi3_1_slp */ |
| 37011 | case 566: /* *lshrqi3_1_slp */ |
| 37012 | case 565: /* *ashrhi3_1 */ |
| 37013 | case 564: /* *lshrhi3_1 */ |
| 37014 | case 563: /* *ashrqi3_1 */ |
| 37015 | case 562: /* *lshrqi3_1 */ |
| 37016 | case 546: /* x86_shrd */ |
| 37017 | case 545: /* x86_64_shrd */ |
| 37018 | case 516: /* x86_shld */ |
| 37019 | case 515: /* x86_64_shld */ |
| 37020 | case 495: /* *negextenddfxf2 */ |
| 37021 | case 494: /* *absextenddfxf2 */ |
| 37022 | case 493: /* *negextendsfxf2 */ |
| 37023 | case 492: /* *absextendsfxf2 */ |
| 37024 | case 491: /* *negextendsfdf2 */ |
| 37025 | case 490: /* *absextendsfdf2 */ |
| 37026 | case 489: /* *negxf2_1 */ |
| 37027 | case 488: /* *absxf2_1 */ |
| 37028 | case 487: /* *negdf2_1 */ |
| 37029 | case 486: /* *absdf2_1 */ |
| 37030 | case 485: /* *negsf2_1 */ |
| 37031 | case 484: /* *abssf2_1 */ |
| 37032 | case 268: /* *leadi_general_4 */ |
| 37033 | case 267: /* *leadi_general_4 */ |
| 37034 | case 266: /* *leasi_general_4 */ |
| 37035 | case 265: /* *leasi_general_4 */ |
| 37036 | case 264: /* *leahi_general_4 */ |
| 37037 | case 263: /* *leahi_general_4 */ |
| 37038 | case 262: /* *leaqi_general_4 */ |
| 37039 | case 261: /* *leaqi_general_4 */ |
| 37040 | case 260: /* *leahi_general_3b */ |
| 37041 | case 259: /* *leaqi_general_3b */ |
| 37042 | case 258: /* *leahi_general_3 */ |
| 37043 | case 257: /* *leaqi_general_3 */ |
| 37044 | case 256: /* *leahi_general_2b */ |
| 37045 | case 255: /* *leaqi_general_2b */ |
| 37046 | case 254: /* *leahi_general_2 */ |
| 37047 | case 253: /* *leaqi_general_2 */ |
| 37048 | case 252: /* *leahi_general_1 */ |
| 37049 | case 251: /* *leaqi_general_1 */ |
| 37050 | case 214: /* *leadi */ |
| 37051 | case 213: /* *leasi */ |
| 37052 | return 1; |
| 37053 | |
| 37054 | case 198: /* floatdixf2 */ |
| 37055 | case 197: /* floatsixf2 */ |
| 37056 | case 196: /* floathixf2 */ |
| 37057 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) |
| 37058 | { |
| 37059 | return 1; |
| 37060 | } |
| 37061 | else if ((cached_memory == MEMORY_LOAD) || (cached_memory == MEMORY_STORE)) |
| 37062 | { |
| 37063 | return 3; |
| 37064 | } |
| 37065 | else |
| 37066 | { |
| 37067 | return 0; |
| 37068 | } |
| 37069 | |
| 37070 | case 927: /* fistsi2_ceil_with_temp */ |
| 37071 | case 926: /* fistsi2_floor_with_temp */ |
| 37072 | case 925: /* fisthi2_ceil_with_temp */ |
| 37073 | case 924: /* fisthi2_floor_with_temp */ |
| 37074 | case 923: /* fistsi2_ceil */ |
| 37075 | case 922: /* fistsi2_floor */ |
| 37076 | case 921: /* fisthi2_ceil */ |
| 37077 | case 920: /* fisthi2_floor */ |
| 37078 | case 919: /* fistdi2_ceil_with_temp */ |
| 37079 | case 918: /* fistdi2_floor_with_temp */ |
| 37080 | case 917: /* fistdi2_ceil */ |
| 37081 | case 916: /* fistdi2_floor */ |
| 37082 | case 915: /* *fistdi2_ceil_1 */ |
| 37083 | case 914: /* *fistdi2_floor_1 */ |
| 37084 | case 913: /* *fistsi2_ceil_1 */ |
| 37085 | case 912: /* *fistsi2_floor_1 */ |
| 37086 | case 911: /* *fisthi2_ceil_1 */ |
| 37087 | case 910: /* *fisthi2_floor_1 */ |
| 37088 | case 191: /* fix_truncsi_i387_with_temp */ |
| 37089 | case 190: /* fix_trunchi_i387_with_temp */ |
| 37090 | case 189: /* fix_truncsi_i387 */ |
| 37091 | case 188: /* fix_trunchi_i387 */ |
| 37092 | case 187: /* fix_truncdi_i387_with_temp */ |
| 37093 | case 186: /* fix_truncdi_i387 */ |
| 37094 | case 185: /* *fix_truncdi_i387_1 */ |
| 37095 | case 184: /* *fix_truncsi_i387_1 */ |
| 37096 | case 183: /* *fix_trunchi_i387_1 */ |
| 37097 | return 7; |
| 37098 | |
| 37099 | case 4803: /* avx512dq_vmfpclassv4sf */ |
| 37100 | case 4800: /* avx512dq_fpclassv4df_mask */ |
| 37101 | case 4799: /* avx512dq_fpclassv4df */ |
| 37102 | case 4796: /* avx512dq_fpclassv4sf_mask */ |
| 37103 | case 4795: /* avx512dq_fpclassv4sf */ |
| 37104 | case 4794: /* avx512dq_fpclassv8sf_mask */ |
| 37105 | case 4793: /* avx512dq_fpclassv8sf */ |
| 37106 | case 4788: /* avx512dq_rangesv4sf_round */ |
| 37107 | case 4787: /* avx512dq_rangesv4sf */ |
| 37108 | case 4784: /* avx512dq_rangepv4df_mask */ |
| 37109 | case 4783: /* avx512dq_rangepv4df */ |
| 37110 | case 4778: /* avx512dq_rangepv4sf_mask */ |
| 37111 | case 4777: /* avx512dq_rangepv4sf */ |
| 37112 | case 4776: /* avx512dq_rangepv8sf_mask */ |
| 37113 | case 4775: /* avx512dq_rangepv8sf */ |
| 37114 | case 3950: /* avx512er_vmrsqrt28v4sf_round */ |
| 37115 | case 3949: /* avx512er_vmrsqrt28v4sf */ |
| 37116 | case 3938: /* avx512er_vmrcp28v4sf_round */ |
| 37117 | case 3937: /* avx512er_vmrcp28v4sf */ |
| 37118 | case 2441: /* sse3_movsldup_mask */ |
| 37119 | case 2440: /* sse3_movsldup */ |
| 37120 | case 2439: /* avx_movsldup256_mask */ |
| 37121 | case 2438: /* avx_movsldup256 */ |
| 37122 | case 2435: /* sse3_movshdup_mask */ |
| 37123 | case 2434: /* sse3_movshdup */ |
| 37124 | case 2433: /* avx_movshdup256_mask */ |
| 37125 | case 2432: /* avx_movshdup256 */ |
| 37126 | case 2226: /* sse2_cvttsd2siq_round */ |
| 37127 | case 2225: /* sse2_cvttsd2siq */ |
| 37128 | case 2224: /* sse2_cvttsd2si_round */ |
| 37129 | case 2223: /* sse2_cvttsd2si */ |
| 37130 | case 2222: /* sse2_cvtsd2siq_2 */ |
| 37131 | case 2221: /* sse2_cvtsd2siq_round */ |
| 37132 | case 2220: /* sse2_cvtsd2siq */ |
| 37133 | case 2219: /* sse2_cvtsd2si_2 */ |
| 37134 | case 2218: /* sse2_cvtsd2si_round */ |
| 37135 | case 2217: /* sse2_cvtsd2si */ |
| 37136 | case 2216: /* avx512f_vcvttsd2usiq_round */ |
| 37137 | case 2215: /* avx512f_vcvttsd2usiq */ |
| 37138 | case 2214: /* avx512f_vcvttsd2usi_round */ |
| 37139 | case 2213: /* avx512f_vcvttsd2usi */ |
| 37140 | case 2212: /* avx512f_vcvtsd2usiq_round */ |
| 37141 | case 2211: /* avx512f_vcvtsd2usiq */ |
| 37142 | case 2210: /* avx512f_vcvtsd2usi_round */ |
| 37143 | case 2209: /* avx512f_vcvtsd2usi */ |
| 37144 | case 2208: /* avx512f_vcvttss2usiq_round */ |
| 37145 | case 2207: /* avx512f_vcvttss2usiq */ |
| 37146 | case 2206: /* avx512f_vcvttss2usi_round */ |
| 37147 | case 2205: /* avx512f_vcvttss2usi */ |
| 37148 | case 2204: /* avx512f_vcvtss2usiq_round */ |
| 37149 | case 2203: /* avx512f_vcvtss2usiq */ |
| 37150 | case 2202: /* avx512f_vcvtss2usi_round */ |
| 37151 | case 2201: /* avx512f_vcvtss2usi */ |
| 37152 | case 2200: /* sse2_cvtsi2sdq_round */ |
| 37153 | case 2199: /* sse2_cvtsi2sdq */ |
| 37154 | case 2198: /* sse2_cvtsi2sd */ |
| 37155 | case 2126: /* cvtusi2sd64_round */ |
| 37156 | case 2125: /* cvtusi2sd64 */ |
| 37157 | case 2124: /* cvtusi2ss64_round */ |
| 37158 | case 2123: /* cvtusi2ss64 */ |
| 37159 | case 2122: /* cvtusi2sd32 */ |
| 37160 | case 2121: /* cvtusi2ss32_round */ |
| 37161 | case 2120: /* cvtusi2ss32 */ |
| 37162 | case 2119: /* sse_cvttss2siq_round */ |
| 37163 | case 2118: /* sse_cvttss2siq */ |
| 37164 | case 2117: /* sse_cvttss2si_round */ |
| 37165 | case 2116: /* sse_cvttss2si */ |
| 37166 | case 2115: /* sse_cvtss2siq_2 */ |
| 37167 | case 2114: /* sse_cvtss2siq_round */ |
| 37168 | case 2113: /* sse_cvtss2siq */ |
| 37169 | case 2112: /* sse_cvtss2si_2 */ |
| 37170 | case 2111: /* sse_cvtss2si_round */ |
| 37171 | case 2110: /* sse_cvtss2si */ |
| 37172 | case 2109: /* sse_cvtsi2ssq_round */ |
| 37173 | case 2108: /* sse_cvtsi2ssq */ |
| 37174 | case 2107: /* sse_cvtsi2ss_round */ |
| 37175 | case 2106: /* sse_cvtsi2ss */ |
| 37176 | case 1633: /* reducesv4sf */ |
| 37177 | case 1630: /* reducepv4df_mask */ |
| 37178 | case 1629: /* *reducepv4df */ |
| 37179 | case 1626: /* reducepv4sf_mask */ |
| 37180 | case 1625: /* *reducepv4sf */ |
| 37181 | case 1624: /* reducepv8sf_mask */ |
| 37182 | case 1623: /* *reducepv8sf */ |
| 37183 | case 1516: /* rsqrt14v4sf */ |
| 37184 | case 1513: /* rsqrt14v4df_mask */ |
| 37185 | case 1512: /* *rsqrt14v4df */ |
| 37186 | case 1509: /* rsqrt14v4sf_mask */ |
| 37187 | case 1508: /* *rsqrt14v4sf */ |
| 37188 | case 1507: /* rsqrt14v8sf_mask */ |
| 37189 | case 1506: /* *rsqrt14v8sf */ |
| 37190 | case 1503: /* sse_rsqrtv4sf2 */ |
| 37191 | case 1502: /* avx_rsqrtv8sf2 */ |
| 37192 | case 1495: /* avx_sqrtv4df2_mask */ |
| 37193 | case 1494: /* avx_sqrtv4df2 */ |
| 37194 | case 1489: /* sse_sqrtv4sf2_mask */ |
| 37195 | case 1488: /* sse_sqrtv4sf2 */ |
| 37196 | case 1487: /* avx_sqrtv8sf2_mask */ |
| 37197 | case 1486: /* avx_sqrtv8sf2 */ |
| 37198 | case 1480: /* srcp14v4sf */ |
| 37199 | case 1477: /* rcp14v4df_mask */ |
| 37200 | case 1476: /* *rcp14v4df */ |
| 37201 | case 1473: /* rcp14v4sf_mask */ |
| 37202 | case 1472: /* *rcp14v4sf */ |
| 37203 | case 1471: /* rcp14v8sf_mask */ |
| 37204 | case 1470: /* *rcp14v8sf */ |
| 37205 | case 1466: /* sse_rcpv4sf2 */ |
| 37206 | case 1465: /* avx_rcpv8sf2 */ |
| 37207 | case 1215: /* *mmx_maskmovq */ |
| 37208 | case 1214: /* *mmx_maskmovq */ |
| 37209 | case 1213: /* mmx_pmovmskb */ |
| 37210 | case 1205: /* *vec_dupv2si */ |
| 37211 | case 1204: /* *vec_dupv4hi */ |
| 37212 | case 1203: /* mmx_pswapdv2si2 */ |
| 37213 | case 1202: /* mmx_pshufw_1 */ |
| 37214 | case 1201: /* mmx_pextrw */ |
| 37215 | case 1200: /* *mmx_pinsrw */ |
| 37216 | case 1199: /* mmx_punpckldq */ |
| 37217 | case 1198: /* mmx_punpckhdq */ |
| 37218 | case 1197: /* mmx_punpcklwd */ |
| 37219 | case 1196: /* mmx_punpckhwd */ |
| 37220 | case 1195: /* mmx_punpcklbw */ |
| 37221 | case 1194: /* mmx_punpckhbw */ |
| 37222 | case 1135: /* *vec_dupv2sf */ |
| 37223 | case 704: /* leave_rex64 */ |
| 37224 | case 703: /* leave */ |
| 37225 | case 354: /* *bmi2_umulditi3_1 */ |
| 37226 | case 353: /* *bmi2_umulsidi3_1 */ |
| 37227 | case 173: /* fix_truncdfdi_sse */ |
| 37228 | case 172: /* fix_truncdfsi_sse */ |
| 37229 | case 171: /* fix_truncsfdi_sse */ |
| 37230 | case 170: /* fix_truncsfsi_sse */ |
| 37231 | return 4; |
| 37232 | |
| 37233 | case 4935: /* storedi_via_fpu */ |
| 37234 | case 4934: /* loaddi_via_fpu */ |
| 37235 | case 841: /* truncxfdf2_i387_noop_unspec */ |
| 37236 | case 840: /* truncxfsf2_i387_noop_unspec */ |
| 37237 | case 206: /* *floatdidf2_i387 */ |
| 37238 | case 205: /* *floatdisf2_i387 */ |
| 37239 | case 204: /* *floatsidf2_i387 */ |
| 37240 | case 203: /* *floatsisf2_i387 */ |
| 37241 | case 195: /* floathidf2 */ |
| 37242 | case 194: /* floathisf2 */ |
| 37243 | case 167: /* *truncxfdf2_i387 */ |
| 37244 | case 166: /* *truncxfsf2_i387 */ |
| 37245 | case 165: /* truncxfdf2_i387_noop */ |
| 37246 | case 164: /* truncxfsf2_i387_noop */ |
| 37247 | case 161: /* *truncdfsf2_i387_1 */ |
| 37248 | case 158: /* *truncdfsf_fast_i387 */ |
| 37249 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) |
| 37250 | { |
| 37251 | return 1; |
| 37252 | } |
| 37253 | else if (cached_memory == MEMORY_LOAD) |
| 37254 | { |
| 37255 | return 3; |
| 37256 | } |
| 37257 | else if (cached_memory == MEMORY_STORE) |
| 37258 | { |
| 37259 | return 1; |
| 37260 | } |
| 37261 | else |
| 37262 | { |
| 37263 | return 0; |
| 37264 | } |
| 37265 | |
| 37266 | case 139: /* *zero_extendqihi2 */ |
| 37267 | case 137: /* *zero_extendhisi2 */ |
| 37268 | case 136: /* *zero_extendqisi2 */ |
| 37269 | case 133: /* zero_extendhidi2 */ |
| 37270 | case 132: /* zero_extendqidi2 */ |
| 37271 | extract_constrain_insn_cached (insn); |
| 37272 | if (((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) && (which_alternative == 0)) |
| 37273 | { |
| 37274 | return 1; |
| 37275 | } |
| 37276 | else if ((cached_memory == MEMORY_LOAD) && (which_alternative == 0)) |
| 37277 | { |
| 37278 | return 2; |
| 37279 | } |
| 37280 | else |
| 37281 | { |
| 37282 | return 0; |
| 37283 | } |
| 37284 | |
| 37285 | case 4862: /* conflictv2di_mask */ |
| 37286 | case 4861: /* *conflictv2di */ |
| 37287 | case 4860: /* conflictv4di_mask */ |
| 37288 | case 4859: /* *conflictv4di */ |
| 37289 | case 4858: /* conflictv8di_mask */ |
| 37290 | case 4857: /* *conflictv8di */ |
| 37291 | case 4856: /* conflictv4si_mask */ |
| 37292 | case 4855: /* *conflictv4si */ |
| 37293 | case 4854: /* conflictv8si_mask */ |
| 37294 | case 4853: /* *conflictv8si */ |
| 37295 | case 4852: /* conflictv16si_mask */ |
| 37296 | case 4851: /* *conflictv16si */ |
| 37297 | case 4850: /* clzv2di2_mask */ |
| 37298 | case 4849: /* clzv2di2 */ |
| 37299 | case 4848: /* clzv4di2_mask */ |
| 37300 | case 4847: /* clzv4di2 */ |
| 37301 | case 4846: /* clzv8di2_mask */ |
| 37302 | case 4845: /* clzv8di2 */ |
| 37303 | case 4844: /* clzv4si2_mask */ |
| 37304 | case 4843: /* clzv4si2 */ |
| 37305 | case 4842: /* clzv8si2_mask */ |
| 37306 | case 4841: /* clzv8si2 */ |
| 37307 | case 4840: /* clzv16si2_mask */ |
| 37308 | case 4839: /* clzv16si2 */ |
| 37309 | case 4804: /* avx512dq_vmfpclassv2df */ |
| 37310 | case 4802: /* avx512dq_fpclassv2df_mask */ |
| 37311 | case 4801: /* avx512dq_fpclassv2df */ |
| 37312 | case 4798: /* avx512dq_fpclassv8df_mask */ |
| 37313 | case 4797: /* avx512dq_fpclassv8df */ |
| 37314 | case 4792: /* avx512dq_fpclassv16sf_mask */ |
| 37315 | case 4791: /* avx512dq_fpclassv16sf */ |
| 37316 | case 4790: /* avx512dq_rangesv2df_round */ |
| 37317 | case 4789: /* avx512dq_rangesv2df */ |
| 37318 | case 4786: /* avx512dq_rangepv2df_mask */ |
| 37319 | case 4785: /* avx512dq_rangepv2df */ |
| 37320 | case 4782: /* avx512dq_rangepv8df_mask_round */ |
| 37321 | case 4781: /* avx512dq_rangepv8df_mask */ |
| 37322 | case 4780: /* avx512dq_rangepv8df_round */ |
| 37323 | case 4779: /* avx512dq_rangepv8df */ |
| 37324 | case 4774: /* avx512dq_rangepv16sf_mask_round */ |
| 37325 | case 4773: /* avx512dq_rangepv16sf_mask */ |
| 37326 | case 4772: /* avx512dq_rangepv16sf_round */ |
| 37327 | case 4771: /* avx512dq_rangepv16sf */ |
| 37328 | case 4518: /* avx512f_vcvtps2ph512_mask */ |
| 37329 | case 4517: /* *avx512f_vcvtps2ph512 */ |
| 37330 | case 4516: /* vcvtps2ph256_mask */ |
| 37331 | case 4515: /* vcvtps2ph256 */ |
| 37332 | case 4514: /* *vcvtps2ph_store */ |
| 37333 | case 4513: /* *vcvtps2ph_mask */ |
| 37334 | case 4512: /* *vcvtps2ph */ |
| 37335 | case 4511: /* avx512f_vcvtph2ps512_mask_round */ |
| 37336 | case 4510: /* avx512f_vcvtph2ps512_mask */ |
| 37337 | case 4509: /* *avx512f_vcvtph2ps512_round */ |
| 37338 | case 4508: /* *avx512f_vcvtph2ps512 */ |
| 37339 | case 4507: /* vcvtph2ps256_mask */ |
| 37340 | case 4506: /* vcvtph2ps256 */ |
| 37341 | case 4505: /* *vcvtph2ps_load_mask */ |
| 37342 | case 4504: /* *vcvtph2ps_load */ |
| 37343 | case 4503: /* vcvtph2ps_mask */ |
| 37344 | case 4502: /* vcvtph2ps */ |
| 37345 | case 4249: /* avx512cd_maskw_vec_dupv4si */ |
| 37346 | case 4248: /* avx512cd_maskw_vec_dupv8si */ |
| 37347 | case 4247: /* avx512cd_maskw_vec_dupv16si */ |
| 37348 | case 4246: /* avx512cd_maskb_vec_dupv2di */ |
| 37349 | case 4245: /* avx512cd_maskb_vec_dupv4di */ |
| 37350 | case 4244: /* avx512cd_maskb_vec_dupv8di */ |
| 37351 | case 4056: /* avx_vzeroupper */ |
| 37352 | case 4055: /* *avx_vzeroall */ |
| 37353 | case 4047: /* xop_vpermil2v2df3 */ |
| 37354 | case 4046: /* xop_vpermil2v4df3 */ |
| 37355 | case 4045: /* xop_vpermil2v4sf3 */ |
| 37356 | case 4044: /* xop_vpermil2v8sf3 */ |
| 37357 | case 4031: /* xop_maskcmpv2di3 */ |
| 37358 | case 4030: /* xop_maskcmpv4si3 */ |
| 37359 | case 4029: /* xop_maskcmpv8hi3 */ |
| 37360 | case 4028: /* xop_maskcmpv16qi3 */ |
| 37361 | case 4027: /* *xop_vmfrczv2df2 */ |
| 37362 | case 4026: /* *xop_vmfrczv4sf2 */ |
| 37363 | case 4025: /* xop_frczv4df2 */ |
| 37364 | case 4024: /* xop_frczv8sf2 */ |
| 37365 | case 4023: /* xop_frczv2df2 */ |
| 37366 | case 4022: /* xop_frczv4sf2 */ |
| 37367 | case 4021: /* xop_frczdf2 */ |
| 37368 | case 4020: /* xop_frczsf2 */ |
| 37369 | case 3999: /* xop_pperm_pack_v8hi_v16qi */ |
| 37370 | case 3998: /* xop_pperm_pack_v4si_v8hi */ |
| 37371 | case 3997: /* xop_pperm_pack_v2di_v4si */ |
| 37372 | case 3996: /* xop_pperm */ |
| 37373 | case 3995: /* xop_phsubdq */ |
| 37374 | case 3994: /* xop_phsubwd */ |
| 37375 | case 3993: /* xop_phsubbw */ |
| 37376 | case 3992: /* xop_phaddudq */ |
| 37377 | case 3991: /* xop_phadddq */ |
| 37378 | case 3990: /* xop_phadduwq */ |
| 37379 | case 3989: /* xop_phaddwq */ |
| 37380 | case 3988: /* xop_phadduwd */ |
| 37381 | case 3987: /* xop_phaddwd */ |
| 37382 | case 3986: /* xop_phaddubq */ |
| 37383 | case 3985: /* xop_phaddbq */ |
| 37384 | case 3984: /* xop_phaddubd */ |
| 37385 | case 3983: /* xop_phaddbd */ |
| 37386 | case 3982: /* xop_phaddubw */ |
| 37387 | case 3981: /* xop_phaddbw */ |
| 37388 | case 3980: /* xop_pcmov_v2df */ |
| 37389 | case 3979: /* xop_pcmov_v4df256 */ |
| 37390 | case 3978: /* xop_pcmov_v8df512 */ |
| 37391 | case 3977: /* xop_pcmov_v4sf */ |
| 37392 | case 3976: /* xop_pcmov_v8sf256 */ |
| 37393 | case 3975: /* xop_pcmov_v16sf512 */ |
| 37394 | case 3974: /* xop_pcmov_v2di */ |
| 37395 | case 3973: /* xop_pcmov_v4di256 */ |
| 37396 | case 3972: /* xop_pcmov_v8di512 */ |
| 37397 | case 3971: /* xop_pcmov_v4si */ |
| 37398 | case 3970: /* xop_pcmov_v8si256 */ |
| 37399 | case 3969: /* xop_pcmov_v16si512 */ |
| 37400 | case 3968: /* xop_pcmov_v8hi */ |
| 37401 | case 3967: /* xop_pcmov_v16hi256 */ |
| 37402 | case 3966: /* xop_pcmov_v16qi */ |
| 37403 | case 3965: /* xop_pcmov_v32qi256 */ |
| 37404 | case 3952: /* avx512er_vmrsqrt28v2df_round */ |
| 37405 | case 3951: /* avx512er_vmrsqrt28v2df */ |
| 37406 | case 3948: /* avx512er_rsqrt28v8df_mask_round */ |
| 37407 | case 3947: /* avx512er_rsqrt28v8df_mask */ |
| 37408 | case 3946: /* *avx512er_rsqrt28v8df_round */ |
| 37409 | case 3945: /* *avx512er_rsqrt28v8df */ |
| 37410 | case 3944: /* avx512er_rsqrt28v16sf_mask_round */ |
| 37411 | case 3943: /* avx512er_rsqrt28v16sf_mask */ |
| 37412 | case 3942: /* *avx512er_rsqrt28v16sf_round */ |
| 37413 | case 3941: /* *avx512er_rsqrt28v16sf */ |
| 37414 | case 3940: /* avx512er_vmrcp28v2df_round */ |
| 37415 | case 3939: /* avx512er_vmrcp28v2df */ |
| 37416 | case 3936: /* avx512er_rcp28v8df_mask_round */ |
| 37417 | case 3935: /* avx512er_rcp28v8df_mask */ |
| 37418 | case 3934: /* *avx512er_rcp28v8df_round */ |
| 37419 | case 3933: /* *avx512er_rcp28v8df */ |
| 37420 | case 3932: /* avx512er_rcp28v16sf_mask_round */ |
| 37421 | case 3931: /* avx512er_rcp28v16sf_mask */ |
| 37422 | case 3930: /* *avx512er_rcp28v16sf_round */ |
| 37423 | case 3929: /* *avx512er_rcp28v16sf */ |
| 37424 | case 3928: /* avx512er_exp2v8df_mask_round */ |
| 37425 | case 3927: /* avx512er_exp2v8df_mask */ |
| 37426 | case 3926: /* avx512er_exp2v8df_round */ |
| 37427 | case 3925: /* avx512er_exp2v8df */ |
| 37428 | case 3924: /* avx512er_exp2v16sf_mask_round */ |
| 37429 | case 3923: /* avx512er_exp2v16sf_mask */ |
| 37430 | case 3922: /* avx512er_exp2v16sf_round */ |
| 37431 | case 3921: /* avx512er_exp2v16sf */ |
| 37432 | case 3920: /* *avx512pf_scatterpfv8didf_mask */ |
| 37433 | case 3919: /* *avx512pf_scatterpfv8didf_mask */ |
| 37434 | case 3918: /* *avx512pf_scatterpfv8sidf_mask */ |
| 37435 | case 3917: /* *avx512pf_scatterpfv8sidf_mask */ |
| 37436 | case 3916: /* *avx512pf_scatterpfv8disf_mask */ |
| 37437 | case 3915: /* *avx512pf_scatterpfv8disf_mask */ |
| 37438 | case 3914: /* *avx512pf_scatterpfv16sisf_mask */ |
| 37439 | case 3913: /* *avx512pf_scatterpfv16sisf_mask */ |
| 37440 | case 3912: /* *avx512pf_gatherpfv8didf_mask */ |
| 37441 | case 3911: /* *avx512pf_gatherpfv8didf_mask */ |
| 37442 | case 3910: /* *avx512pf_gatherpfv8sidf_mask */ |
| 37443 | case 3909: /* *avx512pf_gatherpfv8sidf_mask */ |
| 37444 | case 3908: /* *avx512pf_gatherpfv8disf_mask */ |
| 37445 | case 3907: /* *avx512pf_gatherpfv8disf_mask */ |
| 37446 | case 3906: /* *avx512pf_gatherpfv16sisf_mask */ |
| 37447 | case 3905: /* *avx512pf_gatherpfv16sisf_mask */ |
| 37448 | case 3896: /* sse4_1_roundsd */ |
| 37449 | case 3895: /* sse4_1_roundss */ |
| 37450 | case 3894: /* sse4_1_roundpd */ |
| 37451 | case 3893: /* avx_roundpd256 */ |
| 37452 | case 3892: /* sse4_1_roundps */ |
| 37453 | case 3891: /* avx_roundps256 */ |
| 37454 | case 3771: /* sse4a_insertq */ |
| 37455 | case 3770: /* sse4a_insertqi */ |
| 37456 | case 3769: /* sse4a_extrq */ |
| 37457 | case 3768: /* sse4a_extrqi */ |
| 37458 | case 3673: /* sse_stmxcsr */ |
| 37459 | case 3672: /* sse_ldmxcsr */ |
| 37460 | case 2725: /* sse2_shufpd_v2df */ |
| 37461 | case 2724: /* sse2_shufpd_v2di */ |
| 37462 | case 2711: /* sse2_shufpd_v2df_mask */ |
| 37463 | case 2710: /* avx_shufpd256_1_mask */ |
| 37464 | case 2709: /* avx_shufpd256_1 */ |
| 37465 | case 2488: /* vec_extract_hi_v8di_maskm */ |
| 37466 | case 2487: /* vec_extract_hi_v8df_maskm */ |
| 37467 | case 2472: /* avx512f_vextracti32x4_1_maskm */ |
| 37468 | case 2471: /* avx512f_vextractf32x4_1_maskm */ |
| 37469 | case 2470: /* avx512dq_vextracti64x2_1_maskm */ |
| 37470 | case 2469: /* avx512dq_vextractf64x2_1_maskm */ |
| 37471 | case 2448: /* sse_shufps_v4sf */ |
| 37472 | case 2447: /* sse_shufps_v4si */ |
| 37473 | case 2446: /* sse_shufps_v4sf_mask */ |
| 37474 | case 2445: /* avx_shufps256_1_mask */ |
| 37475 | case 2444: /* avx_shufps256_1 */ |
| 37476 | case 2443: /* avx512f_movsldup512_mask */ |
| 37477 | case 2442: /* *avx512f_movsldup512 */ |
| 37478 | case 2437: /* avx512f_movshdup512_mask */ |
| 37479 | case 2436: /* *avx512f_movshdup512 */ |
| 37480 | case 2417: /* sse2_cvtps2pd_mask */ |
| 37481 | case 2416: /* sse2_cvtps2pd */ |
| 37482 | case 2391: /* vec_unpacks_lo_v16sf */ |
| 37483 | case 2390: /* *avx_cvtps2pd256_2 */ |
| 37484 | case 2389: /* avx_cvtps2pd256_mask */ |
| 37485 | case 2388: /* avx_cvtps2pd256 */ |
| 37486 | case 2387: /* avx512f_cvtps2pd512_mask_round */ |
| 37487 | case 2386: /* avx512f_cvtps2pd512_mask */ |
| 37488 | case 2385: /* avx512f_cvtps2pd512_round */ |
| 37489 | case 2384: /* avx512f_cvtps2pd512 */ |
| 37490 | case 2383: /* *sse2_cvtpd2ps_mask */ |
| 37491 | case 2382: /* *sse2_cvtpd2ps */ |
| 37492 | case 2381: /* avx_cvtpd2ps256_mask */ |
| 37493 | case 2380: /* avx_cvtpd2ps256 */ |
| 37494 | case 2379: /* avx512f_cvtpd2ps512_mask_round */ |
| 37495 | case 2378: /* avx512f_cvtpd2ps512_mask */ |
| 37496 | case 2377: /* *avx512f_cvtpd2ps512_round */ |
| 37497 | case 2376: /* *avx512f_cvtpd2ps512 */ |
| 37498 | case 2375: /* *sse2_vd_cvtss2sd */ |
| 37499 | case 2374: /* sse2_cvtss2sd_round */ |
| 37500 | case 2373: /* sse2_cvtss2sd */ |
| 37501 | case 2372: /* *sse2_vd_cvtsd2ss */ |
| 37502 | case 2371: /* sse2_cvtsd2ss_round */ |
| 37503 | case 2370: /* sse2_cvtsd2ss */ |
| 37504 | case 2369: /* sse2_cvttpd2dq_mask */ |
| 37505 | case 2368: /* sse2_cvttpd2dq */ |
| 37506 | case 2367: /* ufix_truncv4sfv4si2_mask */ |
| 37507 | case 2366: /* ufix_truncv4sfv4si2 */ |
| 37508 | case 2365: /* ufix_truncv8sfv8si2_mask */ |
| 37509 | case 2364: /* ufix_truncv8sfv8si2 */ |
| 37510 | case 2363: /* ufix_truncv2sfv2di2_mask */ |
| 37511 | case 2362: /* ufix_truncv2sfv2di2 */ |
| 37512 | case 2361: /* fix_truncv2sfv2di2_mask */ |
| 37513 | case 2360: /* fix_truncv2sfv2di2 */ |
| 37514 | case 2359: /* ufix_truncv4sfv4di2_mask */ |
| 37515 | case 2358: /* ufix_truncv4sfv4di2 */ |
| 37516 | case 2357: /* fix_truncv4sfv4di2_mask */ |
| 37517 | case 2356: /* fix_truncv4sfv4di2 */ |
| 37518 | case 2355: /* ufix_truncv8sfv8di2_mask_round */ |
| 37519 | case 2354: /* ufix_truncv8sfv8di2_mask */ |
| 37520 | case 2353: /* ufix_truncv8sfv8di2_round */ |
| 37521 | case 2352: /* ufix_truncv8sfv8di2 */ |
| 37522 | case 2351: /* fix_truncv8sfv8di2_mask_round */ |
| 37523 | case 2350: /* fix_truncv8sfv8di2_mask */ |
| 37524 | case 2349: /* fix_truncv8sfv8di2_round */ |
| 37525 | case 2348: /* fix_truncv8sfv8di2 */ |
| 37526 | case 2347: /* ufix_notruncv2dfv2di2_mask */ |
| 37527 | case 2346: /* ufix_notruncv2dfv2di2 */ |
| 37528 | case 2345: /* ufix_notruncv4dfv4di2_mask */ |
| 37529 | case 2344: /* ufix_notruncv4dfv4di2 */ |
| 37530 | case 2343: /* ufix_notruncv8dfv8di2_mask_round */ |
| 37531 | case 2342: /* ufix_notruncv8dfv8di2_mask */ |
| 37532 | case 2341: /* ufix_notruncv8dfv8di2_round */ |
| 37533 | case 2340: /* ufix_notruncv8dfv8di2 */ |
| 37534 | case 2339: /* fix_notruncv2dfv2di2_mask */ |
| 37535 | case 2338: /* fix_notruncv2dfv2di2 */ |
| 37536 | case 2337: /* fix_notruncv4dfv4di2_mask */ |
| 37537 | case 2336: /* fix_notruncv4dfv4di2 */ |
| 37538 | case 2335: /* fix_notruncv8dfv8di2_mask_round */ |
| 37539 | case 2334: /* fix_notruncv8dfv8di2_mask */ |
| 37540 | case 2333: /* fix_notruncv8dfv8di2_round */ |
| 37541 | case 2332: /* fix_notruncv8dfv8di2 */ |
| 37542 | case 2331: /* ufix_truncv2dfv2di2_mask */ |
| 37543 | case 2330: /* ufix_truncv2dfv2di2 */ |
| 37544 | case 2329: /* fix_truncv2dfv2di2_mask */ |
| 37545 | case 2328: /* fix_truncv2dfv2di2 */ |
| 37546 | case 2327: /* ufix_truncv4dfv4di2_mask */ |
| 37547 | case 2326: /* ufix_truncv4dfv4di2 */ |
| 37548 | case 2325: /* fix_truncv4dfv4di2_mask */ |
| 37549 | case 2324: /* fix_truncv4dfv4di2 */ |
| 37550 | case 2323: /* ufix_truncv8dfv8di2_mask_round */ |
| 37551 | case 2322: /* ufix_truncv8dfv8di2_mask */ |
| 37552 | case 2321: /* ufix_truncv8dfv8di2_round */ |
| 37553 | case 2320: /* ufix_truncv8dfv8di2 */ |
| 37554 | case 2319: /* fix_truncv8dfv8di2_mask_round */ |
| 37555 | case 2318: /* fix_truncv8dfv8di2_mask */ |
| 37556 | case 2317: /* fix_truncv8dfv8di2_round */ |
| 37557 | case 2316: /* fix_truncv8dfv8di2 */ |
| 37558 | case 2315: /* ufix_truncv4dfv4si2_mask */ |
| 37559 | case 2314: /* ufix_truncv4dfv4si2 */ |
| 37560 | case 2313: /* fix_truncv4dfv4si2_mask */ |
| 37561 | case 2312: /* fix_truncv4dfv4si2 */ |
| 37562 | case 2311: /* ufix_truncv2dfv2si2_mask */ |
| 37563 | case 2310: /* ufix_truncv2dfv2si2 */ |
| 37564 | case 2309: /* ufix_truncv8dfv8si2_mask_round */ |
| 37565 | case 2308: /* ufix_truncv8dfv8si2_mask */ |
| 37566 | case 2307: /* ufix_truncv8dfv8si2_round */ |
| 37567 | case 2306: /* ufix_truncv8dfv8si2 */ |
| 37568 | case 2305: /* fix_truncv8dfv8si2_mask_round */ |
| 37569 | case 2304: /* fix_truncv8dfv8si2_mask */ |
| 37570 | case 2303: /* fix_truncv8dfv8si2_round */ |
| 37571 | case 2302: /* fix_truncv8dfv8si2 */ |
| 37572 | case 2301: /* ufix_notruncv2dfv2si2_mask */ |
| 37573 | case 2300: /* ufix_notruncv2dfv2si2 */ |
| 37574 | case 2299: /* ufix_notruncv4dfv4si2_mask_round */ |
| 37575 | case 2298: /* ufix_notruncv4dfv4si2_mask */ |
| 37576 | case 2297: /* ufix_notruncv4dfv4si2_round */ |
| 37577 | case 2296: /* ufix_notruncv4dfv4si2 */ |
| 37578 | case 2295: /* ufix_notruncv8dfv8si2_mask_round */ |
| 37579 | case 2294: /* ufix_notruncv8dfv8si2_mask */ |
| 37580 | case 2293: /* ufix_notruncv8dfv8si2_round */ |
| 37581 | case 2292: /* ufix_notruncv8dfv8si2 */ |
| 37582 | case 2291: /* sse2_cvtpd2dq_mask */ |
| 37583 | case 2290: /* sse2_cvtpd2dq */ |
| 37584 | case 2289: /* *avx_cvtpd2dq256_2 */ |
| 37585 | case 2288: /* avx_cvtpd2dq256_mask */ |
| 37586 | case 2287: /* avx_cvtpd2dq256 */ |
| 37587 | case 2286: /* avx512f_cvtpd2dq512_mask_round */ |
| 37588 | case 2285: /* avx512f_cvtpd2dq512_mask */ |
| 37589 | case 2284: /* avx512f_cvtpd2dq512_round */ |
| 37590 | case 2283: /* avx512f_cvtpd2dq512 */ |
| 37591 | case 2282: /* sse2_cvtdq2pd_mask */ |
| 37592 | case 2281: /* sse2_cvtdq2pd */ |
| 37593 | case 2280: /* avx_cvtdq2pd256_2 */ |
| 37594 | case 2279: /* avx512f_cvtdq2pd512_2 */ |
| 37595 | case 2278: /* ufloatv2siv2df2_mask */ |
| 37596 | case 2277: /* ufloatv2siv2df2 */ |
| 37597 | case 2276: /* ufloatv4siv4df2_mask */ |
| 37598 | case 2275: /* ufloatv4siv4df2 */ |
| 37599 | case 2274: /* ufloatv8siv8df2_mask */ |
| 37600 | case 2273: /* ufloatv8siv8df2 */ |
| 37601 | case 2272: /* *ufloatv2div2sf2_mask_1 */ |
| 37602 | case 2271: /* *floatv2div2sf2_mask_1 */ |
| 37603 | case 2270: /* ufloatv2div2sf2_mask */ |
| 37604 | case 2269: /* floatv2div2sf2_mask */ |
| 37605 | case 2268: /* *ufloatv2div2sf2 */ |
| 37606 | case 2267: /* *floatv2div2sf2 */ |
| 37607 | case 2266: /* ufloatv4div4sf2_mask */ |
| 37608 | case 2265: /* ufloatv4div4sf2 */ |
| 37609 | case 2264: /* floatv4div4sf2_mask */ |
| 37610 | case 2263: /* floatv4div4sf2 */ |
| 37611 | case 2262: /* ufloatv8div8sf2_mask_round */ |
| 37612 | case 2261: /* ufloatv8div8sf2_mask */ |
| 37613 | case 2260: /* ufloatv8div8sf2_round */ |
| 37614 | case 2259: /* ufloatv8div8sf2 */ |
| 37615 | case 2258: /* floatv8div8sf2_mask_round */ |
| 37616 | case 2257: /* floatv8div8sf2_mask */ |
| 37617 | case 2256: /* floatv8div8sf2_round */ |
| 37618 | case 2255: /* floatv8div8sf2 */ |
| 37619 | case 2254: /* ufloatv2div2df2_mask_round */ |
| 37620 | case 2253: /* ufloatv2div2df2_mask */ |
| 37621 | case 2252: /* ufloatv2div2df2_round */ |
| 37622 | case 2251: /* ufloatv2div2df2 */ |
| 37623 | case 2250: /* floatv2div2df2_mask_round */ |
| 37624 | case 2249: /* floatv2div2df2_mask */ |
| 37625 | case 2248: /* floatv2div2df2_round */ |
| 37626 | case 2247: /* floatv2div2df2 */ |
| 37627 | case 2246: /* ufloatv4div4df2_mask_round */ |
| 37628 | case 2245: /* ufloatv4div4df2_mask */ |
| 37629 | case 2244: /* ufloatv4div4df2_round */ |
| 37630 | case 2243: /* ufloatv4div4df2 */ |
| 37631 | case 2242: /* floatv4div4df2_mask_round */ |
| 37632 | case 2241: /* floatv4div4df2_mask */ |
| 37633 | case 2240: /* floatv4div4df2_round */ |
| 37634 | case 2239: /* floatv4div4df2 */ |
| 37635 | case 2238: /* ufloatv8div8df2_mask_round */ |
| 37636 | case 2237: /* ufloatv8div8df2_mask */ |
| 37637 | case 2236: /* ufloatv8div8df2_round */ |
| 37638 | case 2235: /* ufloatv8div8df2 */ |
| 37639 | case 2234: /* floatv8div8df2_mask_round */ |
| 37640 | case 2233: /* floatv8div8df2_mask */ |
| 37641 | case 2232: /* floatv8div8df2_round */ |
| 37642 | case 2231: /* floatv8div8df2 */ |
| 37643 | case 2230: /* floatv4siv4df2_mask */ |
| 37644 | case 2229: /* floatv4siv4df2 */ |
| 37645 | case 2228: /* floatv8siv8df2_mask */ |
| 37646 | case 2227: /* floatv8siv8df2 */ |
| 37647 | case 2197: /* sse2_cvttpd2pi */ |
| 37648 | case 2196: /* sse2_cvtpd2pi */ |
| 37649 | case 2195: /* sse2_cvtpi2pd */ |
| 37650 | case 2194: /* fix_truncv4sfv4si2_mask */ |
| 37651 | case 2193: /* fix_truncv4sfv4si2 */ |
| 37652 | case 2192: /* fix_truncv8sfv8si2_mask */ |
| 37653 | case 2191: /* fix_truncv8sfv8si2 */ |
| 37654 | case 2190: /* ufix_truncv16sfv16si2_mask_round */ |
| 37655 | case 2189: /* ufix_truncv16sfv16si2_mask */ |
| 37656 | case 2188: /* ufix_truncv16sfv16si2_round */ |
| 37657 | case 2187: /* ufix_truncv16sfv16si2 */ |
| 37658 | case 2186: /* fix_truncv16sfv16si2_mask_round */ |
| 37659 | case 2185: /* fix_truncv16sfv16si2_mask */ |
| 37660 | case 2184: /* fix_truncv16sfv16si2_round */ |
| 37661 | case 2183: /* fix_truncv16sfv16si2 */ |
| 37662 | case 2182: /* avx512dq_cvtps2uqqv2di_mask */ |
| 37663 | case 2181: /* *avx512dq_cvtps2uqqv2di */ |
| 37664 | case 2180: /* avx512dq_cvtps2uqqv4di_mask */ |
| 37665 | case 2179: /* *avx512dq_cvtps2uqqv4di */ |
| 37666 | case 2178: /* avx512dq_cvtps2uqqv8di_mask_round */ |
| 37667 | case 2177: /* avx512dq_cvtps2uqqv8di_mask */ |
| 37668 | case 2176: /* *avx512dq_cvtps2uqqv8di_round */ |
| 37669 | case 2175: /* *avx512dq_cvtps2uqqv8di */ |
| 37670 | case 2174: /* avx512dq_cvtps2qqv2di_mask */ |
| 37671 | case 2173: /* *avx512dq_cvtps2qqv2di */ |
| 37672 | case 2172: /* avx512dq_cvtps2qqv4di_mask */ |
| 37673 | case 2171: /* *avx512dq_cvtps2qqv4di */ |
| 37674 | case 2170: /* avx512dq_cvtps2qqv8di_mask_round */ |
| 37675 | case 2169: /* avx512dq_cvtps2qqv8di_mask */ |
| 37676 | case 2168: /* *avx512dq_cvtps2qqv8di_round */ |
| 37677 | case 2167: /* *avx512dq_cvtps2qqv8di */ |
| 37678 | case 2166: /* avx512vl_ufix_notruncv4sfv4si_mask_round */ |
| 37679 | case 2165: /* avx512vl_ufix_notruncv4sfv4si_mask */ |
| 37680 | case 2164: /* *avx512vl_ufix_notruncv4sfv4si_round */ |
| 37681 | case 2163: /* *avx512vl_ufix_notruncv4sfv4si */ |
| 37682 | case 2162: /* avx512vl_ufix_notruncv8sfv8si_mask_round */ |
| 37683 | case 2161: /* avx512vl_ufix_notruncv8sfv8si_mask */ |
| 37684 | case 2160: /* *avx512vl_ufix_notruncv8sfv8si_round */ |
| 37685 | case 2159: /* *avx512vl_ufix_notruncv8sfv8si */ |
| 37686 | case 2158: /* avx512f_ufix_notruncv16sfv16si_mask_round */ |
| 37687 | case 2157: /* avx512f_ufix_notruncv16sfv16si_mask */ |
| 37688 | case 2156: /* *avx512f_ufix_notruncv16sfv16si_round */ |
| 37689 | case 2155: /* *avx512f_ufix_notruncv16sfv16si */ |
| 37690 | case 2154: /* avx512f_fix_notruncv16sfv16si_mask_round */ |
| 37691 | case 2153: /* avx512f_fix_notruncv16sfv16si_mask */ |
| 37692 | case 2152: /* avx512f_fix_notruncv16sfv16si_round */ |
| 37693 | case 2151: /* avx512f_fix_notruncv16sfv16si */ |
| 37694 | case 2150: /* sse2_fix_notruncv4sfv4si_mask */ |
| 37695 | case 2149: /* sse2_fix_notruncv4sfv4si */ |
| 37696 | case 2148: /* avx_fix_notruncv8sfv8si_mask */ |
| 37697 | case 2147: /* avx_fix_notruncv8sfv8si */ |
| 37698 | case 2146: /* ufloatv4siv4sf2_mask_round */ |
| 37699 | case 2145: /* ufloatv4siv4sf2_mask */ |
| 37700 | case 2144: /* ufloatv4siv4sf2_round */ |
| 37701 | case 2143: /* ufloatv4siv4sf2 */ |
| 37702 | case 2142: /* ufloatv8siv8sf2_mask_round */ |
| 37703 | case 2141: /* ufloatv8siv8sf2_mask */ |
| 37704 | case 2140: /* ufloatv8siv8sf2_round */ |
| 37705 | case 2139: /* ufloatv8siv8sf2 */ |
| 37706 | case 2138: /* ufloatv16siv16sf2_mask_round */ |
| 37707 | case 2137: /* ufloatv16siv16sf2_mask */ |
| 37708 | case 2136: /* ufloatv16siv16sf2_round */ |
| 37709 | case 2135: /* ufloatv16siv16sf2 */ |
| 37710 | case 2134: /* floatv4siv4sf2_mask */ |
| 37711 | case 2133: /* floatv4siv4sf2 */ |
| 37712 | case 2132: /* floatv8siv8sf2_mask */ |
| 37713 | case 2131: /* floatv8siv8sf2 */ |
| 37714 | case 2130: /* floatv16siv16sf2_mask_round */ |
| 37715 | case 2129: /* floatv16siv16sf2_mask */ |
| 37716 | case 2128: /* floatv16siv16sf2_round */ |
| 37717 | case 2127: /* floatv16siv16sf2 */ |
| 37718 | case 2105: /* sse_cvttps2pi */ |
| 37719 | case 2104: /* sse_cvtps2pi */ |
| 37720 | case 2103: /* sse_cvtpi2ps */ |
| 37721 | case 1634: /* reducesv2df */ |
| 37722 | case 1632: /* reducepv2df_mask */ |
| 37723 | case 1631: /* *reducepv2df */ |
| 37724 | case 1628: /* reducepv8df_mask */ |
| 37725 | case 1627: /* *reducepv8df */ |
| 37726 | case 1622: /* reducepv16sf_mask */ |
| 37727 | case 1621: /* *reducepv16sf */ |
| 37728 | case 1517: /* rsqrt14v2df */ |
| 37729 | case 1515: /* rsqrt14v2df_mask */ |
| 37730 | case 1514: /* *rsqrt14v2df */ |
| 37731 | case 1511: /* rsqrt14v8df_mask */ |
| 37732 | case 1510: /* *rsqrt14v8df */ |
| 37733 | case 1505: /* rsqrt14v16sf_mask */ |
| 37734 | case 1504: /* *rsqrt14v16sf */ |
| 37735 | case 1497: /* sse2_sqrtv2df2_mask */ |
| 37736 | case 1496: /* sse2_sqrtv2df2 */ |
| 37737 | case 1493: /* avx512f_sqrtv8df2_mask_round */ |
| 37738 | case 1492: /* avx512f_sqrtv8df2_mask */ |
| 37739 | case 1491: /* avx512f_sqrtv8df2_round */ |
| 37740 | case 1490: /* avx512f_sqrtv8df2 */ |
| 37741 | case 1485: /* avx512f_sqrtv16sf2_mask_round */ |
| 37742 | case 1484: /* avx512f_sqrtv16sf2_mask */ |
| 37743 | case 1483: /* avx512f_sqrtv16sf2_round */ |
| 37744 | case 1482: /* avx512f_sqrtv16sf2 */ |
| 37745 | case 1481: /* srcp14v2df */ |
| 37746 | case 1479: /* rcp14v2df_mask */ |
| 37747 | case 1478: /* *rcp14v2df */ |
| 37748 | case 1475: /* rcp14v8df_mask */ |
| 37749 | case 1474: /* *rcp14v8df */ |
| 37750 | case 1469: /* rcp14v16sf_mask */ |
| 37751 | case 1468: /* *rcp14v16sf */ |
| 37752 | case 1460: /* avx512f_divv8df3_mask_round */ |
| 37753 | case 1459: /* avx512f_divv8df3_mask */ |
| 37754 | case 1458: /* avx512f_divv8df3_round */ |
| 37755 | case 1457: /* avx512f_divv8df3 */ |
| 37756 | case 1452: /* avx512f_divv16sf3_mask_round */ |
| 37757 | case 1451: /* avx512f_divv16sf3_mask */ |
| 37758 | case 1450: /* avx512f_divv16sf3_round */ |
| 37759 | case 1449: /* avx512f_divv16sf3 */ |
| 37760 | case 1352: /* kunpckhi */ |
| 37761 | case 1351: /* kortestdi */ |
| 37762 | case 1350: /* kortestsi */ |
| 37763 | case 1349: /* kortesthi */ |
| 37764 | case 1348: /* kortestqi */ |
| 37765 | case 1347: /* ktestdi */ |
| 37766 | case 1346: /* ktestsi */ |
| 37767 | case 1345: /* ktesthi */ |
| 37768 | case 1344: /* ktestqi */ |
| 37769 | case 1343: /* klshiftrtdi */ |
| 37770 | case 1342: /* kashiftdi */ |
| 37771 | case 1341: /* klshiftrtsi */ |
| 37772 | case 1340: /* kashiftsi */ |
| 37773 | case 1339: /* klshiftrthi */ |
| 37774 | case 1338: /* kashifthi */ |
| 37775 | case 1337: /* klshiftrtqi */ |
| 37776 | case 1336: /* kashiftqi */ |
| 37777 | case 1335: /* kadddi */ |
| 37778 | case 1334: /* kaddsi */ |
| 37779 | case 1333: /* kaddhi */ |
| 37780 | case 1332: /* kaddqi */ |
| 37781 | case 1331: /* knotdi */ |
| 37782 | case 1330: /* knotsi */ |
| 37783 | case 1329: /* knothi */ |
| 37784 | case 1328: /* knotqi */ |
| 37785 | case 1327: /* kxnordi */ |
| 37786 | case 1326: /* kxnorsi */ |
| 37787 | case 1325: /* kxnorhi */ |
| 37788 | case 1324: /* kxnorqi */ |
| 37789 | case 1323: /* kandndi */ |
| 37790 | case 1322: /* kandnsi */ |
| 37791 | case 1321: /* kandnhi */ |
| 37792 | case 1320: /* kandnqi */ |
| 37793 | case 1319: /* kxordi */ |
| 37794 | case 1318: /* kiordi */ |
| 37795 | case 1317: /* kanddi */ |
| 37796 | case 1316: /* kxorsi */ |
| 37797 | case 1315: /* kiorsi */ |
| 37798 | case 1314: /* kandsi */ |
| 37799 | case 1313: /* kxorhi */ |
| 37800 | case 1312: /* kiorhi */ |
| 37801 | case 1311: /* kandhi */ |
| 37802 | case 1310: /* kxorqi */ |
| 37803 | case 1309: /* kiorqi */ |
| 37804 | case 1308: /* kandqi */ |
| 37805 | case 1307: /* sse2_movntv2di */ |
| 37806 | case 1306: /* avx_movntv4di */ |
| 37807 | case 1305: /* avx512f_movntv8di */ |
| 37808 | case 1134: /* mmx_pswapdv2sf2 */ |
| 37809 | case 1133: /* mmx_floatv2si2 */ |
| 37810 | case 1132: /* mmx_pi2fw */ |
| 37811 | case 1131: /* mmx_pf2iw */ |
| 37812 | case 1130: /* mmx_pf2id */ |
| 37813 | case 1111: /* sse_movntq */ |
| 37814 | case 1100: /* *bnd64_stx */ |
| 37815 | case 1099: /* *bnd32_stx */ |
| 37816 | case 1098: /* *bnd64_ldx */ |
| 37817 | case 1097: /* *bnd32_ldx */ |
| 37818 | case 1096: /* *bnd64_cn */ |
| 37819 | case 1095: /* *bnd64_cu */ |
| 37820 | case 1094: /* *bnd64_cl */ |
| 37821 | case 1093: /* *bnd32_cn */ |
| 37822 | case 1092: /* *bnd32_cu */ |
| 37823 | case 1091: /* *bnd32_cl */ |
| 37824 | case 1090: /* *movbnd64_internal_mpx */ |
| 37825 | case 1089: /* *movbnd32_internal_mpx */ |
| 37826 | case 1088: /* *bnd64_mk */ |
| 37827 | case 1087: /* *bnd32_mk */ |
| 37828 | case 1060: /* *lwp_lwpinsdi3_1 */ |
| 37829 | case 1059: /* *lwp_lwpinssi3_1 */ |
| 37830 | case 1058: /* *lwp_lwpvaldi3_1 */ |
| 37831 | case 1057: /* *lwp_lwpvalsi3_1 */ |
| 37832 | case 1056: /* lwp_slwpcbdi */ |
| 37833 | case 1055: /* lwp_slwpcbsi */ |
| 37834 | case 1054: /* *lwp_llwpcbdi1 */ |
| 37835 | case 1053: /* *lwp_llwpcbsi1 */ |
| 37836 | case 1008: /* *prefetch_prefetchwt1 */ |
| 37837 | case 1006: /* *prefetch_sse */ |
| 37838 | case 984: /* *xop_pcmov_df */ |
| 37839 | case 983: /* *xop_pcmov_sf */ |
| 37840 | case 909: /* frndintxf2_mask_pm_i387 */ |
| 37841 | case 908: /* frndintxf2_mask_pm */ |
| 37842 | case 907: /* frndintxf2_trunc_i387 */ |
| 37843 | case 906: /* frndintxf2_ceil_i387 */ |
| 37844 | case 905: /* frndintxf2_floor_i387 */ |
| 37845 | case 904: /* frndintdf2_trunc_i387 */ |
| 37846 | case 903: /* frndintdf2_ceil_i387 */ |
| 37847 | case 902: /* frndintdf2_floor_i387 */ |
| 37848 | case 901: /* frndintsf2_trunc_i387 */ |
| 37849 | case 900: /* frndintsf2_ceil_i387 */ |
| 37850 | case 899: /* frndintsf2_floor_i387 */ |
| 37851 | case 898: /* frndintxf2_trunc */ |
| 37852 | case 897: /* frndintxf2_ceil */ |
| 37853 | case 896: /* frndintxf2_floor */ |
| 37854 | case 895: /* frndintdf2_trunc */ |
| 37855 | case 894: /* frndintdf2_ceil */ |
| 37856 | case 893: /* frndintdf2_floor */ |
| 37857 | case 892: /* frndintsf2_trunc */ |
| 37858 | case 891: /* frndintsf2_ceil */ |
| 37859 | case 890: /* frndintsf2_floor */ |
| 37860 | case 889: /* fistsi2_with_temp */ |
| 37861 | case 888: /* fisthi2_with_temp */ |
| 37862 | case 887: /* fistsi2 */ |
| 37863 | case 886: /* fisthi2 */ |
| 37864 | case 885: /* *fistsi2_1 */ |
| 37865 | case 884: /* *fisthi2_1 */ |
| 37866 | case 883: /* fistdi2_with_temp */ |
| 37867 | case 882: /* fistdi2 */ |
| 37868 | case 881: /* *fistdi2_1 */ |
| 37869 | case 877: /* sse4_1_rounddf2 */ |
| 37870 | case 876: /* sse4_1_roundsf2 */ |
| 37871 | case 783: /* *bswapdi2 */ |
| 37872 | case 782: /* *bswapsi2 */ |
| 37873 | case 779: /* popcounthi2 */ |
| 37874 | case 777: /* *popcountdi2_falsedep */ |
| 37875 | case 776: /* *popcountsi2_falsedep */ |
| 37876 | case 775: /* popcountdi2 */ |
| 37877 | case 774: /* popcountsi2 */ |
| 37878 | case 773: /* *tbm_tzmsk_di */ |
| 37879 | case 772: /* *tbm_tzmsk_si */ |
| 37880 | case 771: /* *tbm_t1mskc_di */ |
| 37881 | case 770: /* *tbm_t1mskc_si */ |
| 37882 | case 769: /* *tbm_blsic_di */ |
| 37883 | case 768: /* *tbm_blsic_si */ |
| 37884 | case 767: /* *tbm_blsfill_di */ |
| 37885 | case 766: /* *tbm_blsfill_si */ |
| 37886 | case 765: /* *tbm_blcs_di */ |
| 37887 | case 764: /* *tbm_blcs_si */ |
| 37888 | case 763: /* *tbm_blcmsk_di */ |
| 37889 | case 762: /* *tbm_blcmsk_si */ |
| 37890 | case 761: /* *tbm_blcic_di */ |
| 37891 | case 760: /* *tbm_blcic_si */ |
| 37892 | case 759: /* *tbm_blci_di */ |
| 37893 | case 758: /* *tbm_blci_si */ |
| 37894 | case 757: /* *tbm_blcfill_di */ |
| 37895 | case 756: /* *tbm_blcfill_si */ |
| 37896 | case 755: /* tbm_bextri_di */ |
| 37897 | case 754: /* tbm_bextri_si */ |
| 37898 | case 753: /* bmi2_pext_di3 */ |
| 37899 | case 752: /* bmi2_pext_si3 */ |
| 37900 | case 751: /* bmi2_pdep_di3 */ |
| 37901 | case 750: /* bmi2_pdep_si3 */ |
| 37902 | case 749: /* *bmi2_bzhi_di3_1_ccz */ |
| 37903 | case 748: /* *bmi2_bzhi_si3_1_ccz */ |
| 37904 | case 747: /* *bmi2_bzhi_di3_1 */ |
| 37905 | case 746: /* *bmi2_bzhi_si3_1 */ |
| 37906 | case 745: /* *bmi2_bzhi_di3 */ |
| 37907 | case 744: /* *bmi2_bzhi_si3 */ |
| 37908 | case 743: /* *bmi_blsr_di */ |
| 37909 | case 742: /* *bmi_blsr_si */ |
| 37910 | case 741: /* *bmi_blsmsk_di */ |
| 37911 | case 740: /* *bmi_blsmsk_si */ |
| 37912 | case 739: /* *bmi_blsi_di */ |
| 37913 | case 738: /* *bmi_blsi_si */ |
| 37914 | case 737: /* *bmi_bextr_di_ccz */ |
| 37915 | case 736: /* *bmi_bextr_si_ccz */ |
| 37916 | case 735: /* bmi_bextr_di */ |
| 37917 | case 734: /* bmi_bextr_si */ |
| 37918 | case 733: /* lzcnt_hi */ |
| 37919 | case 731: /* *lzcnt_di_falsedep */ |
| 37920 | case 729: /* *lzcnt_si_falsedep */ |
| 37921 | case 727: /* lzcnt_di */ |
| 37922 | case 725: /* lzcnt_si */ |
| 37923 | case 723: /* *clzdi2_lzcnt_falsedep */ |
| 37924 | case 722: /* *clzsi2_lzcnt_falsedep */ |
| 37925 | case 721: /* clzdi2_lzcnt */ |
| 37926 | case 720: /* clzsi2_lzcnt */ |
| 37927 | case 600: /* *bmi2_rorxsi3_1_zext */ |
| 37928 | case 595: /* *bmi2_rorxdi3_1 */ |
| 37929 | case 594: /* *bmi2_rorxsi3_1 */ |
| 37930 | case 559: /* *bmi2_ashrsi3_1_zext */ |
| 37931 | case 558: /* *bmi2_lshrsi3_1_zext */ |
| 37932 | case 553: /* *bmi2_ashrdi3_1 */ |
| 37933 | case 552: /* *bmi2_lshrdi3_1 */ |
| 37934 | case 551: /* *bmi2_ashrsi3_1 */ |
| 37935 | case 550: /* *bmi2_lshrsi3_1 */ |
| 37936 | case 523: /* *bmi2_ashlsi3_1_zext */ |
| 37937 | case 520: /* *bmi2_ashldi3_1 */ |
| 37938 | case 519: /* *bmi2_ashlsi3_1 */ |
| 37939 | case 420: /* *andn_di_ccno */ |
| 37940 | case 419: /* *andn_si_ccno */ |
| 37941 | case 418: /* *andnhi_1 */ |
| 37942 | case 417: /* *andnqi_1 */ |
| 37943 | case 416: /* *andndi_1 */ |
| 37944 | case 415: /* *andnsi_1 */ |
| 37945 | case 182: /* fix_truncdi_i387_fisttp_with_temp */ |
| 37946 | case 181: /* fix_truncsi_i387_fisttp_with_temp */ |
| 37947 | case 180: /* fix_trunchi_i387_fisttp_with_temp */ |
| 37948 | case 179: /* fix_truncdi_i387_fisttp */ |
| 37949 | case 178: /* fix_truncsi_i387_fisttp */ |
| 37950 | case 177: /* fix_trunchi_i387_fisttp */ |
| 37951 | case 176: /* fix_truncdi_fisttp_i387_1 */ |
| 37952 | case 175: /* fix_truncsi_fisttp_i387_1 */ |
| 37953 | case 174: /* fix_trunchi_fisttp_i387_1 */ |
| 37954 | case 130: /* *swapdf */ |
| 37955 | case 129: /* *swapsf */ |
| 37956 | case 128: /* swapxf */ |
| 37957 | return 0; |
| 37958 | |
| 37959 | case 123: /* *pushsf */ |
| 37960 | case 122: /* *pushsf_rex64 */ |
| 37961 | extract_constrain_insn_cached (insn); |
| 37962 | if (which_alternative != 1) |
| 37963 | { |
| 37964 | return 6; |
| 37965 | } |
| 37966 | else if (((cached_memory = get_attr_memory (insn)) == MEMORY_STORE) || (cached_memory == MEMORY_BOTH)) |
| 37967 | { |
| 37968 | return 3; |
| 37969 | } |
| 37970 | else |
| 37971 | { |
| 37972 | return 0; |
| 37973 | } |
| 37974 | |
| 37975 | case 1102: /* move_size_reloc_di */ |
| 37976 | case 1101: /* move_size_reloc_si */ |
| 37977 | case 701: /* set_got_offset_rex64 */ |
| 37978 | case 116: /* *insvqi_3 */ |
| 37979 | case 115: /* *insvqi_3 */ |
| 37980 | case 114: /* *insvqi_2 */ |
| 37981 | case 113: /* *insvqi_2 */ |
| 37982 | case 112: /* *insvqi_1 */ |
| 37983 | case 111: /* *insvqi_1_mem_rex64 */ |
| 37984 | case 110: /* insvdi_1 */ |
| 37985 | case 109: /* insvsi_1 */ |
| 37986 | case 108: /* insvhi_1 */ |
| 37987 | case 106: /* *extzvqi_mem_rex64 */ |
| 37988 | case 98: /* *movstricthi_1 */ |
| 37989 | case 97: /* *movstrictqi_1 */ |
| 37990 | case 96: /* *swaphi */ |
| 37991 | case 95: /* *swapqi */ |
| 37992 | case 94: /* *swapdi */ |
| 37993 | case 93: /* *swapsi */ |
| 37994 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) |
| 37995 | { |
| 37996 | return 1; |
| 37997 | } |
| 37998 | else if (cached_memory == MEMORY_LOAD) |
| 37999 | { |
| 38000 | return 2; |
| 38001 | } |
| 38002 | else if (cached_memory == MEMORY_STORE) |
| 38003 | { |
| 38004 | return 3; |
| 38005 | } |
| 38006 | else |
| 38007 | { |
| 38008 | return 0; |
| 38009 | } |
| 38010 | |
| 38011 | case 4926: /* mfence_sse2 */ |
| 38012 | case 4925: /* *sse_sfence */ |
| 38013 | case 4924: /* *sse2_lfence */ |
| 38014 | case 3674: /* sse2_clflush */ |
| 38015 | case 1081: /* clflushopt */ |
| 38016 | case 1080: /* clwb */ |
| 38017 | case 980: /* *movxfcc_1 */ |
| 38018 | case 801: /* *load_tp_di */ |
| 38019 | case 800: /* *load_tp_si */ |
| 38020 | case 799: /* *load_tp_x32_zext */ |
| 38021 | case 798: /* *load_tp_x32 */ |
| 38022 | case 92: /* *movabsdi_2 */ |
| 38023 | case 91: /* *movabssi_2 */ |
| 38024 | case 90: /* *movabshi_2 */ |
| 38025 | case 89: /* *movabsqi_2 */ |
| 38026 | return 2; |
| 38027 | |
| 38028 | case 1606: /* sse2_vmsminv2df3_round */ |
| 38029 | case 1605: /* sse2_vmsminv2df3 */ |
| 38030 | case 1604: /* sse2_vmsmaxv2df3_round */ |
| 38031 | case 1603: /* sse2_vmsmaxv2df3 */ |
| 38032 | case 1602: /* sse_vmsminv4sf3_round */ |
| 38033 | case 1601: /* sse_vmsminv4sf3 */ |
| 38034 | case 1600: /* sse_vmsmaxv4sf3_round */ |
| 38035 | case 1599: /* sse_vmsmaxv4sf3 */ |
| 38036 | case 1518: /* sse_vmrsqrtv4sf2 */ |
| 38037 | case 1501: /* sse2_vmsqrtv2df2_round */ |
| 38038 | case 1500: /* sse2_vmsqrtv2df2 */ |
| 38039 | case 1499: /* sse_vmsqrtv4sf2_round */ |
| 38040 | case 1498: /* sse_vmsqrtv4sf2 */ |
| 38041 | case 1467: /* sse_vmrcpv4sf2 */ |
| 38042 | case 847: /* *sqrtdf2_sse */ |
| 38043 | case 846: /* *sqrtsf2_sse */ |
| 38044 | case 845: /* *rsqrtsf2_sse */ |
| 38045 | case 814: /* *rcpsf2_sse */ |
| 38046 | case 366: /* *umulsi3_highpart_1 */ |
| 38047 | case 365: /* *smulsi3_highpart_1 */ |
| 38048 | case 364: /* *umulsi3_highpart_zext */ |
| 38049 | case 363: /* *smulsi3_highpart_zext */ |
| 38050 | case 362: /* *umuldi3_highpart_1 */ |
| 38051 | case 361: /* *smuldi3_highpart_1 */ |
| 38052 | case 360: /* *umulqihi3_1 */ |
| 38053 | case 359: /* *mulqihi3_1 */ |
| 38054 | case 358: /* *mulditi3_1 */ |
| 38055 | case 357: /* *mulsidi3_1 */ |
| 38056 | case 352: /* *umulvqi4 */ |
| 38057 | case 351: /* *mulvqi4 */ |
| 38058 | case 350: /* *umulvdi4 */ |
| 38059 | case 349: /* *umulvsi4 */ |
| 38060 | case 348: /* *umulvhi4 */ |
| 38061 | case 347: /* *mulvdi4_1 */ |
| 38062 | case 346: /* *mulvsi4_1 */ |
| 38063 | case 345: /* *mulvhi4_1 */ |
| 38064 | case 344: /* *mulvhi4 */ |
| 38065 | case 343: /* *mulvdi4 */ |
| 38066 | case 342: /* *mulvsi4 */ |
| 38067 | case 341: /* *mulqi3_1 */ |
| 38068 | case 340: /* *mulsi3_1_zext */ |
| 38069 | case 339: /* *muldi3_1 */ |
| 38070 | case 338: /* *mulsi3_1 */ |
| 38071 | case 337: /* *mulhi3_1 */ |
| 38072 | case 88: /* *movabsdi_1 */ |
| 38073 | case 87: /* *movabssi_1 */ |
| 38074 | case 86: /* *movabshi_1 */ |
| 38075 | case 85: /* *movabsqi_1 */ |
| 38076 | return 3; |
| 38077 | |
| 38078 | case 1000: /* probe_stack_di */ |
| 38079 | case 999: /* probe_stack_si */ |
| 38080 | case 732: /* tzcnt_hi */ |
| 38081 | case 730: /* *tzcnt_di_falsedep */ |
| 38082 | case 728: /* *tzcnt_si_falsedep */ |
| 38083 | case 726: /* tzcnt_di */ |
| 38084 | case 724: /* tzcnt_si */ |
| 38085 | case 719: /* *bsrhi */ |
| 38086 | case 718: /* bsr */ |
| 38087 | case 717: /* bsr_rex64 */ |
| 38088 | case 716: /* *ctzdi2_falsedep */ |
| 38089 | case 715: /* *ctzsi2_falsedep */ |
| 38090 | case 714: /* ctzdi2 */ |
| 38091 | case 713: /* ctzsi2 */ |
| 38092 | case 712: /* *bsfdi_1 */ |
| 38093 | case 711: /* *bsfsi_1 */ |
| 38094 | case 710: /* *tzcntdi_1_falsedep */ |
| 38095 | case 709: /* *tzcntsi_1_falsedep */ |
| 38096 | case 708: /* *tzcntdi_1 */ |
| 38097 | case 707: /* *tzcntsi_1 */ |
| 38098 | case 613: /* *btdi */ |
| 38099 | case 612: /* *btsi */ |
| 38100 | case 611: /* *btcq */ |
| 38101 | case 610: /* *btrq */ |
| 38102 | case 609: /* *btsq */ |
| 38103 | case 512: /* *one_cmplsi2_2_zext */ |
| 38104 | case 511: /* *one_cmpldi2_2 */ |
| 38105 | case 510: /* *one_cmplsi2_2 */ |
| 38106 | case 509: /* *one_cmplhi2_2 */ |
| 38107 | case 508: /* *one_cmplqi2_2 */ |
| 38108 | case 507: /* *one_cmplqi2_1 */ |
| 38109 | case 506: /* *one_cmplsi2_1_zext */ |
| 38110 | case 505: /* *one_cmpldi2_1 */ |
| 38111 | case 504: /* *one_cmplsi2_1 */ |
| 38112 | case 503: /* *one_cmplhi2_1 */ |
| 38113 | case 479: /* *negvdi3 */ |
| 38114 | case 478: /* *negvsi3 */ |
| 38115 | case 477: /* *negvhi3 */ |
| 38116 | case 476: /* *negvqi3 */ |
| 38117 | case 475: /* *negsi2_cmpz_zext */ |
| 38118 | case 474: /* *negdi2_cmpz */ |
| 38119 | case 473: /* *negsi2_cmpz */ |
| 38120 | case 472: /* *neghi2_cmpz */ |
| 38121 | case 471: /* *negqi2_cmpz */ |
| 38122 | case 470: /* *negsi2_1_zext */ |
| 38123 | case 469: /* *negdi2_1 */ |
| 38124 | case 468: /* *negsi2_1 */ |
| 38125 | case 467: /* *neghi2_1 */ |
| 38126 | case 466: /* *negqi2_1 */ |
| 38127 | case 450: /* *xorqi_2_slp */ |
| 38128 | case 449: /* *iorqi_2_slp */ |
| 38129 | case 436: /* *xorqi_1_slp */ |
| 38130 | case 435: /* *iorqi_1_slp */ |
| 38131 | case 410: /* *andqi_2_slp */ |
| 38132 | case 403: /* *andqi_1_slp */ |
| 38133 | case 276: /* *subqi_1_slp */ |
| 38134 | case 138: /* zero_extendqihi2_and */ |
| 38135 | case 135: /* zero_extendhisi2_and */ |
| 38136 | case 134: /* zero_extendqisi2_and */ |
| 38137 | case 100: /* *movstricthi_xor */ |
| 38138 | case 99: /* *movstrictqi_xor */ |
| 38139 | case 77: /* *movdi_or */ |
| 38140 | case 76: /* *movsi_or */ |
| 38141 | case 75: /* *movdi_xor */ |
| 38142 | case 74: /* *movsi_xor */ |
| 38143 | if (((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) || (cached_memory == MEMORY_STORE)) |
| 38144 | { |
| 38145 | return 1; |
| 38146 | } |
| 38147 | else if (cached_memory == MEMORY_BOTH) |
| 38148 | { |
| 38149 | return 4; |
| 38150 | } |
| 38151 | else |
| 38152 | { |
| 38153 | return 0; |
| 38154 | } |
| 38155 | |
| 38156 | case 73: /* *popfldi1 */ |
| 38157 | case 72: /* *popflsi1 */ |
| 38158 | case 69: /* *popdi1_epilogue */ |
| 38159 | case 68: /* *popsi1_epilogue */ |
| 38160 | case 67: /* *popdi1 */ |
| 38161 | case 66: /* *popsi1 */ |
| 38162 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) |
| 38163 | { |
| 38164 | return 1; |
| 38165 | } |
| 38166 | else if (cached_memory == MEMORY_BOTH) |
| 38167 | { |
| 38168 | return 4; |
| 38169 | } |
| 38170 | else |
| 38171 | { |
| 38172 | return 0; |
| 38173 | } |
| 38174 | |
| 38175 | case 71: /* *pushfldi2 */ |
| 38176 | case 70: /* *pushflsi2 */ |
| 38177 | case 65: /* *pushdi2_prologue */ |
| 38178 | case 64: /* *pushsi2_prologue */ |
| 38179 | case 63: /* *pushhi2 */ |
| 38180 | case 62: /* *pushqi2 */ |
| 38181 | case 61: /* *pushsi2_rex64 */ |
| 38182 | case 60: /* *pushhi2_rex64 */ |
| 38183 | case 59: /* *pushqi2_rex64 */ |
| 38184 | case 58: /* *pushsi2 */ |
| 38185 | if (((cached_memory = get_attr_memory (insn)) == MEMORY_STORE) || (cached_memory == MEMORY_BOTH)) |
| 38186 | { |
| 38187 | return 3; |
| 38188 | } |
| 38189 | else |
| 38190 | { |
| 38191 | return 0; |
| 38192 | } |
| 38193 | |
| 38194 | case 57: /* *pushdi2_rex64 */ |
| 38195 | extract_constrain_insn_cached (insn); |
| 38196 | if (which_alternative != 0) |
| 38197 | { |
| 38198 | return 6; |
| 38199 | } |
| 38200 | else if (((cached_memory = get_attr_memory (insn)) == MEMORY_STORE) || (cached_memory == MEMORY_BOTH)) |
| 38201 | { |
| 38202 | return 3; |
| 38203 | } |
| 38204 | else |
| 38205 | { |
| 38206 | return 0; |
| 38207 | } |
| 38208 | |
| 38209 | case 4984: /* atomic_bit_test_and_resetdi_1 */ |
| 38210 | case 4983: /* atomic_bit_test_and_resetsi_1 */ |
| 38211 | case 4982: /* atomic_bit_test_and_resethi_1 */ |
| 38212 | case 4981: /* atomic_bit_test_and_complementdi_1 */ |
| 38213 | case 4980: /* atomic_bit_test_and_complementsi_1 */ |
| 38214 | case 4979: /* atomic_bit_test_and_complementhi_1 */ |
| 38215 | case 4978: /* atomic_bit_test_and_setdi_1 */ |
| 38216 | case 4977: /* atomic_bit_test_and_setsi_1 */ |
| 38217 | case 4976: /* atomic_bit_test_and_sethi_1 */ |
| 38218 | case 4975: /* atomic_xordi */ |
| 38219 | case 4974: /* atomic_ordi */ |
| 38220 | case 4973: /* atomic_anddi */ |
| 38221 | case 4972: /* atomic_xorsi */ |
| 38222 | case 4971: /* atomic_orsi */ |
| 38223 | case 4970: /* atomic_andsi */ |
| 38224 | case 4969: /* atomic_xorhi */ |
| 38225 | case 4968: /* atomic_orhi */ |
| 38226 | case 4967: /* atomic_andhi */ |
| 38227 | case 4966: /* atomic_xorqi */ |
| 38228 | case 4965: /* atomic_orqi */ |
| 38229 | case 4964: /* atomic_andqi */ |
| 38230 | case 4963: /* atomic_subdi */ |
| 38231 | case 4962: /* atomic_subsi */ |
| 38232 | case 4961: /* atomic_subhi */ |
| 38233 | case 4960: /* atomic_subqi */ |
| 38234 | case 4959: /* atomic_adddi */ |
| 38235 | case 4958: /* atomic_addsi */ |
| 38236 | case 4957: /* atomic_addhi */ |
| 38237 | case 4956: /* atomic_addqi */ |
| 38238 | case 4955: /* atomic_exchangedi */ |
| 38239 | case 4954: /* atomic_exchangesi */ |
| 38240 | case 4953: /* atomic_exchangehi */ |
| 38241 | case 4952: /* atomic_exchangeqi */ |
| 38242 | case 4951: /* *atomic_fetch_add_cmpdi */ |
| 38243 | case 4950: /* *atomic_fetch_add_cmpsi */ |
| 38244 | case 4949: /* *atomic_fetch_add_cmphi */ |
| 38245 | case 4948: /* *atomic_fetch_add_cmpqi */ |
| 38246 | case 4947: /* atomic_fetch_adddi */ |
| 38247 | case 4946: /* atomic_fetch_addsi */ |
| 38248 | case 4945: /* atomic_fetch_addhi */ |
| 38249 | case 4944: /* atomic_fetch_addqi */ |
| 38250 | case 4943: /* atomic_compare_and_swapdi_1 */ |
| 38251 | case 4942: /* atomic_compare_and_swapsi_1 */ |
| 38252 | case 4941: /* atomic_compare_and_swaphi_1 */ |
| 38253 | case 4940: /* atomic_compare_and_swapqi_1 */ |
| 38254 | case 4939: /* atomic_compare_and_swapti_doubleword */ |
| 38255 | case 4938: /* atomic_compare_and_swapdi_doubleword */ |
| 38256 | case 4933: /* atomic_storedi_fpu */ |
| 38257 | case 4932: /* atomic_storedi_1 */ |
| 38258 | case 4931: /* atomic_storesi_1 */ |
| 38259 | case 4930: /* atomic_storehi_1 */ |
| 38260 | case 4929: /* atomic_storeqi_1 */ |
| 38261 | case 4928: /* atomic_loaddi_fpu */ |
| 38262 | case 4927: /* mfence_nosse */ |
| 38263 | case 4923: /* vpopcountv8di_mask */ |
| 38264 | case 4922: /* vpopcountv8di */ |
| 38265 | case 4921: /* vpopcountv16si_mask */ |
| 38266 | case 4920: /* vpopcountv16si */ |
| 38267 | case 4901: /* *movv64si_internal */ |
| 38268 | case 4900: /* *movv64sf_internal */ |
| 38269 | case 4875: /* avx512f_pd512_256pd */ |
| 38270 | case 4874: /* avx512f_ps512_256ps */ |
| 38271 | case 4873: /* avx512f_si512_256si */ |
| 38272 | case 4872: /* avx512f_pd512_pd */ |
| 38273 | case 4871: /* avx512f_ps512_ps */ |
| 38274 | case 4870: /* avx512f_si512_si */ |
| 38275 | case 4832: /* avx512f_vgetmantv2df_round */ |
| 38276 | case 4831: /* avx512f_vgetmantv2df */ |
| 38277 | case 4830: /* avx512f_vgetmantv4sf_round */ |
| 38278 | case 4829: /* avx512f_vgetmantv4sf */ |
| 38279 | case 4828: /* avx512vl_getmantv2df_mask_round */ |
| 38280 | case 4827: /* avx512vl_getmantv2df_mask */ |
| 38281 | case 4826: /* avx512vl_getmantv2df_round */ |
| 38282 | case 4825: /* avx512vl_getmantv2df */ |
| 38283 | case 4824: /* avx512vl_getmantv4df_mask_round */ |
| 38284 | case 4823: /* avx512vl_getmantv4df_mask */ |
| 38285 | case 4822: /* avx512vl_getmantv4df_round */ |
| 38286 | case 4821: /* avx512vl_getmantv4df */ |
| 38287 | case 4820: /* avx512f_getmantv8df_mask_round */ |
| 38288 | case 4819: /* avx512f_getmantv8df_mask */ |
| 38289 | case 4818: /* avx512f_getmantv8df_round */ |
| 38290 | case 4817: /* avx512f_getmantv8df */ |
| 38291 | case 4816: /* avx512vl_getmantv4sf_mask_round */ |
| 38292 | case 4815: /* avx512vl_getmantv4sf_mask */ |
| 38293 | case 4814: /* avx512vl_getmantv4sf_round */ |
| 38294 | case 4813: /* avx512vl_getmantv4sf */ |
| 38295 | case 4812: /* avx512vl_getmantv8sf_mask_round */ |
| 38296 | case 4811: /* avx512vl_getmantv8sf_mask */ |
| 38297 | case 4810: /* avx512vl_getmantv8sf_round */ |
| 38298 | case 4809: /* avx512vl_getmantv8sf */ |
| 38299 | case 4808: /* avx512f_getmantv16sf_mask_round */ |
| 38300 | case 4807: /* avx512f_getmantv16sf_mask */ |
| 38301 | case 4806: /* avx512f_getmantv16sf_round */ |
| 38302 | case 4805: /* avx512f_getmantv16sf */ |
| 38303 | case 4435: /* avx_pd256_pd */ |
| 38304 | case 4434: /* avx_ps256_ps */ |
| 38305 | case 4433: /* avx_si256_si */ |
| 38306 | case 4252: /* *avx_vperm_broadcast_v4df */ |
| 38307 | case 4251: /* *avx_vperm_broadcast_v8sf */ |
| 38308 | case 3677: /* sse3_monitor_di */ |
| 38309 | case 3676: /* sse3_monitor_si */ |
| 38310 | case 3675: /* sse3_mwait */ |
| 38311 | case 3637: /* *vec_extractv4si_zext_mem */ |
| 38312 | case 3636: /* *vec_extractv4si_mem */ |
| 38313 | case 3633: /* *vec_extractv4si_0_zext */ |
| 38314 | case 3632: /* *vec_extractv4si_0_zext_sse4 */ |
| 38315 | case 3631: /* *vec_extractv2di_0_sse */ |
| 38316 | case 3630: /* *vec_extractv2di_0 */ |
| 38317 | case 3629: /* *vec_extractv4si_0 */ |
| 38318 | case 3628: /* *vec_extractv8hi_mem */ |
| 38319 | case 3627: /* *vec_extractv16qi_mem */ |
| 38320 | case 3503: /* avx512vl_testnmv2di3_mask */ |
| 38321 | case 3502: /* avx512vl_testnmv2di3 */ |
| 38322 | case 3501: /* avx512vl_testnmv4di3_mask */ |
| 38323 | case 3500: /* avx512vl_testnmv4di3 */ |
| 38324 | case 3499: /* avx512f_testnmv8di3_mask */ |
| 38325 | case 3498: /* avx512f_testnmv8di3 */ |
| 38326 | case 3497: /* avx512vl_testnmv4si3_mask */ |
| 38327 | case 3496: /* avx512vl_testnmv4si3 */ |
| 38328 | case 3495: /* avx512vl_testnmv8si3_mask */ |
| 38329 | case 3494: /* avx512vl_testnmv8si3 */ |
| 38330 | case 3493: /* avx512f_testnmv16si3_mask */ |
| 38331 | case 3492: /* avx512f_testnmv16si3 */ |
| 38332 | case 3491: /* avx512vl_testnmv8hi3_mask */ |
| 38333 | case 3490: /* avx512vl_testnmv8hi3 */ |
| 38334 | case 3489: /* avx512vl_testnmv16hi3_mask */ |
| 38335 | case 3488: /* avx512vl_testnmv16hi3 */ |
| 38336 | case 3487: /* avx512bw_testnmv32hi3_mask */ |
| 38337 | case 3486: /* avx512bw_testnmv32hi3 */ |
| 38338 | case 3485: /* avx512vl_testnmv32qi3_mask */ |
| 38339 | case 3484: /* avx512vl_testnmv32qi3 */ |
| 38340 | case 3483: /* avx512vl_testnmv16qi3_mask */ |
| 38341 | case 3482: /* avx512vl_testnmv16qi3 */ |
| 38342 | case 3481: /* avx512bw_testnmv64qi3_mask */ |
| 38343 | case 3480: /* avx512bw_testnmv64qi3 */ |
| 38344 | case 3479: /* avx512vl_testmv2di3_mask */ |
| 38345 | case 3478: /* avx512vl_testmv2di3 */ |
| 38346 | case 3477: /* avx512vl_testmv4di3_mask */ |
| 38347 | case 3476: /* avx512vl_testmv4di3 */ |
| 38348 | case 3475: /* avx512f_testmv8di3_mask */ |
| 38349 | case 3474: /* avx512f_testmv8di3 */ |
| 38350 | case 3473: /* avx512vl_testmv4si3_mask */ |
| 38351 | case 3472: /* avx512vl_testmv4si3 */ |
| 38352 | case 3471: /* avx512vl_testmv8si3_mask */ |
| 38353 | case 3470: /* avx512vl_testmv8si3 */ |
| 38354 | case 3469: /* avx512f_testmv16si3_mask */ |
| 38355 | case 3468: /* avx512f_testmv16si3 */ |
| 38356 | case 3467: /* avx512vl_testmv8hi3_mask */ |
| 38357 | case 3466: /* avx512vl_testmv8hi3 */ |
| 38358 | case 3465: /* avx512vl_testmv16hi3_mask */ |
| 38359 | case 3464: /* avx512vl_testmv16hi3 */ |
| 38360 | case 3463: /* avx512bw_testmv32hi3_mask */ |
| 38361 | case 3462: /* avx512bw_testmv32hi3 */ |
| 38362 | case 3461: /* avx512vl_testmv32qi3_mask */ |
| 38363 | case 3460: /* avx512vl_testmv32qi3 */ |
| 38364 | case 3459: /* avx512vl_testmv16qi3_mask */ |
| 38365 | case 3458: /* avx512vl_testmv16qi3 */ |
| 38366 | case 3457: /* avx512bw_testmv64qi3_mask */ |
| 38367 | case 3456: /* avx512bw_testmv64qi3 */ |
| 38368 | case 3191: /* avx512vl_rorv2di_mask */ |
| 38369 | case 3190: /* avx512vl_rorv2di */ |
| 38370 | case 3189: /* avx512vl_rolv2di_mask */ |
| 38371 | case 3188: /* avx512vl_rolv2di */ |
| 38372 | case 3187: /* avx512vl_rorv4di_mask */ |
| 38373 | case 3186: /* avx512vl_rorv4di */ |
| 38374 | case 3185: /* avx512vl_rolv4di_mask */ |
| 38375 | case 3184: /* avx512vl_rolv4di */ |
| 38376 | case 3183: /* avx512f_rorv8di_mask */ |
| 38377 | case 3182: /* avx512f_rorv8di */ |
| 38378 | case 3181: /* avx512f_rolv8di_mask */ |
| 38379 | case 3180: /* avx512f_rolv8di */ |
| 38380 | case 3179: /* avx512vl_rorv4si_mask */ |
| 38381 | case 3178: /* avx512vl_rorv4si */ |
| 38382 | case 3177: /* avx512vl_rolv4si_mask */ |
| 38383 | case 3176: /* avx512vl_rolv4si */ |
| 38384 | case 3175: /* avx512vl_rorv8si_mask */ |
| 38385 | case 3174: /* avx512vl_rorv8si */ |
| 38386 | case 3173: /* avx512vl_rolv8si_mask */ |
| 38387 | case 3172: /* avx512vl_rolv8si */ |
| 38388 | case 3171: /* avx512f_rorv16si_mask */ |
| 38389 | case 3170: /* avx512f_rorv16si */ |
| 38390 | case 3169: /* avx512f_rolv16si_mask */ |
| 38391 | case 3168: /* avx512f_rolv16si */ |
| 38392 | case 3167: /* avx512vl_rorvv2di_mask */ |
| 38393 | case 3166: /* avx512vl_rorvv2di */ |
| 38394 | case 3165: /* avx512vl_rolvv2di_mask */ |
| 38395 | case 3164: /* avx512vl_rolvv2di */ |
| 38396 | case 3163: /* avx512vl_rorvv4di_mask */ |
| 38397 | case 3162: /* avx512vl_rorvv4di */ |
| 38398 | case 3161: /* avx512vl_rolvv4di_mask */ |
| 38399 | case 3160: /* avx512vl_rolvv4di */ |
| 38400 | case 3159: /* avx512f_rorvv8di_mask */ |
| 38401 | case 3158: /* avx512f_rorvv8di */ |
| 38402 | case 3157: /* avx512f_rolvv8di_mask */ |
| 38403 | case 3156: /* avx512f_rolvv8di */ |
| 38404 | case 3155: /* avx512vl_rorvv4si_mask */ |
| 38405 | case 3154: /* avx512vl_rorvv4si */ |
| 38406 | case 3153: /* avx512vl_rolvv4si_mask */ |
| 38407 | case 3152: /* avx512vl_rolvv4si */ |
| 38408 | case 3151: /* avx512vl_rorvv8si_mask */ |
| 38409 | case 3150: /* avx512vl_rorvv8si */ |
| 38410 | case 3149: /* avx512vl_rolvv8si_mask */ |
| 38411 | case 3148: /* avx512vl_rolvv8si */ |
| 38412 | case 3147: /* avx512f_rorvv16si_mask */ |
| 38413 | case 3146: /* avx512f_rorvv16si */ |
| 38414 | case 3145: /* avx512f_rolvv16si_mask */ |
| 38415 | case 3144: /* avx512f_rolvv16si */ |
| 38416 | case 2704: /* avx512f_rndscalev2df_round */ |
| 38417 | case 2703: /* avx512f_rndscalev2df */ |
| 38418 | case 2702: /* avx512f_rndscalev4sf_round */ |
| 38419 | case 2701: /* avx512f_rndscalev4sf */ |
| 38420 | case 2700: /* avx512vl_rndscalev2df_mask_round */ |
| 38421 | case 2699: /* avx512vl_rndscalev2df_mask */ |
| 38422 | case 2698: /* avx512vl_rndscalev2df_round */ |
| 38423 | case 2697: /* avx512vl_rndscalev2df */ |
| 38424 | case 2696: /* avx512vl_rndscalev4df_mask_round */ |
| 38425 | case 2695: /* avx512vl_rndscalev4df_mask */ |
| 38426 | case 2694: /* avx512vl_rndscalev4df_round */ |
| 38427 | case 2693: /* avx512vl_rndscalev4df */ |
| 38428 | case 2692: /* avx512f_rndscalev8df_mask_round */ |
| 38429 | case 2691: /* avx512f_rndscalev8df_mask */ |
| 38430 | case 2690: /* avx512f_rndscalev8df_round */ |
| 38431 | case 2689: /* avx512f_rndscalev8df */ |
| 38432 | case 2688: /* avx512vl_rndscalev4sf_mask_round */ |
| 38433 | case 2687: /* avx512vl_rndscalev4sf_mask */ |
| 38434 | case 2686: /* avx512vl_rndscalev4sf_round */ |
| 38435 | case 2685: /* avx512vl_rndscalev4sf */ |
| 38436 | case 2684: /* avx512vl_rndscalev8sf_mask_round */ |
| 38437 | case 2683: /* avx512vl_rndscalev8sf_mask */ |
| 38438 | case 2682: /* avx512vl_rndscalev8sf_round */ |
| 38439 | case 2681: /* avx512vl_rndscalev8sf */ |
| 38440 | case 2680: /* avx512f_rndscalev16sf_mask_round */ |
| 38441 | case 2679: /* avx512f_rndscalev16sf_mask */ |
| 38442 | case 2678: /* avx512f_rndscalev16sf_round */ |
| 38443 | case 2677: /* avx512f_rndscalev16sf */ |
| 38444 | case 2676: /* avx512f_sfixupimmv2df_mask_round */ |
| 38445 | case 2675: /* avx512f_sfixupimmv2df_mask */ |
| 38446 | case 2674: /* avx512f_sfixupimmv4sf_mask_round */ |
| 38447 | case 2673: /* avx512f_sfixupimmv4sf_mask */ |
| 38448 | case 2672: /* avx512f_sfixupimmv2df_maskz_1_round */ |
| 38449 | case 2671: /* avx512f_sfixupimmv2df_maskz_1 */ |
| 38450 | case 2670: /* avx512f_sfixupimmv2df_round */ |
| 38451 | case 2669: /* avx512f_sfixupimmv2df */ |
| 38452 | case 2668: /* avx512f_sfixupimmv4sf_maskz_1_round */ |
| 38453 | case 2667: /* avx512f_sfixupimmv4sf_maskz_1 */ |
| 38454 | case 2666: /* avx512f_sfixupimmv4sf_round */ |
| 38455 | case 2665: /* avx512f_sfixupimmv4sf */ |
| 38456 | case 2664: /* avx512vl_fixupimmv2df_mask_round */ |
| 38457 | case 2663: /* avx512vl_fixupimmv2df_mask */ |
| 38458 | case 2662: /* avx512vl_fixupimmv4df_mask_round */ |
| 38459 | case 2661: /* avx512vl_fixupimmv4df_mask */ |
| 38460 | case 2660: /* avx512f_fixupimmv8df_mask_round */ |
| 38461 | case 2659: /* avx512f_fixupimmv8df_mask */ |
| 38462 | case 2658: /* avx512vl_fixupimmv4sf_mask_round */ |
| 38463 | case 2657: /* avx512vl_fixupimmv4sf_mask */ |
| 38464 | case 2656: /* avx512vl_fixupimmv8sf_mask_round */ |
| 38465 | case 2655: /* avx512vl_fixupimmv8sf_mask */ |
| 38466 | case 2654: /* avx512f_fixupimmv16sf_mask_round */ |
| 38467 | case 2653: /* avx512f_fixupimmv16sf_mask */ |
| 38468 | case 2652: /* avx512vl_fixupimmv2df_maskz_1_round */ |
| 38469 | case 2651: /* avx512vl_fixupimmv2df_maskz_1 */ |
| 38470 | case 2650: /* avx512vl_fixupimmv2df_round */ |
| 38471 | case 2649: /* avx512vl_fixupimmv2df */ |
| 38472 | case 2648: /* avx512vl_fixupimmv4df_maskz_1_round */ |
| 38473 | case 2647: /* avx512vl_fixupimmv4df_maskz_1 */ |
| 38474 | case 2646: /* avx512vl_fixupimmv4df_round */ |
| 38475 | case 2645: /* avx512vl_fixupimmv4df */ |
| 38476 | case 2644: /* avx512f_fixupimmv8df_maskz_1_round */ |
| 38477 | case 2643: /* avx512f_fixupimmv8df_maskz_1 */ |
| 38478 | case 2642: /* avx512f_fixupimmv8df_round */ |
| 38479 | case 2641: /* avx512f_fixupimmv8df */ |
| 38480 | case 2640: /* avx512vl_fixupimmv4sf_maskz_1_round */ |
| 38481 | case 2639: /* avx512vl_fixupimmv4sf_maskz_1 */ |
| 38482 | case 2638: /* avx512vl_fixupimmv4sf_round */ |
| 38483 | case 2637: /* avx512vl_fixupimmv4sf */ |
| 38484 | case 2636: /* avx512vl_fixupimmv8sf_maskz_1_round */ |
| 38485 | case 2635: /* avx512vl_fixupimmv8sf_maskz_1 */ |
| 38486 | case 2634: /* avx512vl_fixupimmv8sf_round */ |
| 38487 | case 2633: /* avx512vl_fixupimmv8sf */ |
| 38488 | case 2632: /* avx512f_fixupimmv16sf_maskz_1_round */ |
| 38489 | case 2631: /* avx512f_fixupimmv16sf_maskz_1 */ |
| 38490 | case 2630: /* avx512f_fixupimmv16sf_round */ |
| 38491 | case 2629: /* avx512f_fixupimmv16sf */ |
| 38492 | case 2628: /* avx512vl_alignv2di_mask */ |
| 38493 | case 2627: /* *avx512vl_alignv2di */ |
| 38494 | case 2626: /* avx512vl_alignv4di_mask */ |
| 38495 | case 2625: /* *avx512vl_alignv4di */ |
| 38496 | case 2624: /* avx512f_alignv8di_mask */ |
| 38497 | case 2623: /* *avx512f_alignv8di */ |
| 38498 | case 2622: /* avx512vl_alignv4si_mask */ |
| 38499 | case 2621: /* *avx512vl_alignv4si */ |
| 38500 | case 2620: /* avx512vl_alignv8si_mask */ |
| 38501 | case 2619: /* *avx512vl_alignv8si */ |
| 38502 | case 2618: /* avx512f_alignv16si_mask */ |
| 38503 | case 2617: /* *avx512f_alignv16si */ |
| 38504 | case 2616: /* avx512f_sgetexpv2df_round */ |
| 38505 | case 2615: /* avx512f_sgetexpv2df */ |
| 38506 | case 2614: /* avx512f_sgetexpv4sf_round */ |
| 38507 | case 2613: /* avx512f_sgetexpv4sf */ |
| 38508 | case 2612: /* avx512vl_getexpv2df_mask_round */ |
| 38509 | case 2611: /* avx512vl_getexpv2df_mask */ |
| 38510 | case 2610: /* avx512vl_getexpv2df_round */ |
| 38511 | case 2609: /* avx512vl_getexpv2df */ |
| 38512 | case 2608: /* avx512vl_getexpv4df_mask_round */ |
| 38513 | case 2607: /* avx512vl_getexpv4df_mask */ |
| 38514 | case 2606: /* avx512vl_getexpv4df_round */ |
| 38515 | case 2605: /* avx512vl_getexpv4df */ |
| 38516 | case 2604: /* avx512f_getexpv8df_mask_round */ |
| 38517 | case 2603: /* avx512f_getexpv8df_mask */ |
| 38518 | case 2602: /* avx512f_getexpv8df_round */ |
| 38519 | case 2601: /* avx512f_getexpv8df */ |
| 38520 | case 2600: /* avx512vl_getexpv4sf_mask_round */ |
| 38521 | case 2599: /* avx512vl_getexpv4sf_mask */ |
| 38522 | case 2598: /* avx512vl_getexpv4sf_round */ |
| 38523 | case 2597: /* avx512vl_getexpv4sf */ |
| 38524 | case 2596: /* avx512vl_getexpv8sf_mask_round */ |
| 38525 | case 2595: /* avx512vl_getexpv8sf_mask */ |
| 38526 | case 2594: /* avx512vl_getexpv8sf_round */ |
| 38527 | case 2593: /* avx512vl_getexpv8sf */ |
| 38528 | case 2592: /* avx512f_getexpv16sf_mask_round */ |
| 38529 | case 2591: /* avx512f_getexpv16sf_mask */ |
| 38530 | case 2590: /* avx512f_getexpv16sf_round */ |
| 38531 | case 2589: /* avx512f_getexpv16sf */ |
| 38532 | case 2570: /* avx512vl_scalefv2df_mask_round */ |
| 38533 | case 2569: /* avx512vl_scalefv2df_mask */ |
| 38534 | case 2568: /* avx512vl_scalefv2df_round */ |
| 38535 | case 2567: /* avx512vl_scalefv2df */ |
| 38536 | case 2566: /* avx512vl_scalefv4df_mask_round */ |
| 38537 | case 2565: /* avx512vl_scalefv4df_mask */ |
| 38538 | case 2564: /* avx512vl_scalefv4df_round */ |
| 38539 | case 2563: /* avx512vl_scalefv4df */ |
| 38540 | case 2562: /* avx512f_scalefv8df_mask_round */ |
| 38541 | case 2561: /* avx512f_scalefv8df_mask */ |
| 38542 | case 2560: /* avx512f_scalefv8df_round */ |
| 38543 | case 2559: /* avx512f_scalefv8df */ |
| 38544 | case 2558: /* avx512vl_scalefv4sf_mask_round */ |
| 38545 | case 2557: /* avx512vl_scalefv4sf_mask */ |
| 38546 | case 2556: /* avx512vl_scalefv4sf_round */ |
| 38547 | case 2555: /* avx512vl_scalefv4sf */ |
| 38548 | case 2554: /* avx512vl_scalefv8sf_mask_round */ |
| 38549 | case 2553: /* avx512vl_scalefv8sf_mask */ |
| 38550 | case 2552: /* avx512vl_scalefv8sf_round */ |
| 38551 | case 2551: /* avx512vl_scalefv8sf */ |
| 38552 | case 2550: /* avx512f_scalefv16sf_mask_round */ |
| 38553 | case 2549: /* avx512f_scalefv16sf_mask */ |
| 38554 | case 2548: /* avx512f_scalefv16sf_round */ |
| 38555 | case 2547: /* avx512f_scalefv16sf */ |
| 38556 | case 2546: /* avx512f_vmscalefv2df_round */ |
| 38557 | case 2545: /* avx512f_vmscalefv2df */ |
| 38558 | case 2544: /* avx512f_vmscalefv4sf_round */ |
| 38559 | case 2543: /* avx512f_vmscalefv4sf */ |
| 38560 | case 2529: /* vec_extract_lo_v32qi */ |
| 38561 | case 2527: /* vec_extract_lo_v64qi */ |
| 38562 | case 2525: /* vec_extract_lo_v16hi */ |
| 38563 | case 2523: /* vec_extract_lo_v32hi */ |
| 38564 | case 2502: /* vec_extract_lo_v16si_mask */ |
| 38565 | case 2501: /* vec_extract_lo_v16si */ |
| 38566 | case 2500: /* vec_extract_lo_v16sf_mask */ |
| 38567 | case 2499: /* vec_extract_lo_v16sf */ |
| 38568 | case 2468: /* *vec_extractv4sf_mem */ |
| 38569 | case 2466: /* *vec_extractv4sf_0 */ |
| 38570 | case 2415: /* *avx512vl_cvtmask2qv2di */ |
| 38571 | case 2414: /* *avx512vl_cvtmask2qv4di */ |
| 38572 | case 2413: /* *avx512f_cvtmask2qv8di */ |
| 38573 | case 2412: /* *avx512vl_cvtmask2dv4si */ |
| 38574 | case 2411: /* *avx512vl_cvtmask2dv8si */ |
| 38575 | case 2410: /* *avx512f_cvtmask2dv16si */ |
| 38576 | case 2409: /* *avx512vl_cvtmask2wv8hi */ |
| 38577 | case 2408: /* *avx512vl_cvtmask2wv16hi */ |
| 38578 | case 2407: /* *avx512bw_cvtmask2wv32hi */ |
| 38579 | case 2406: /* *avx512vl_cvtmask2bv32qi */ |
| 38580 | case 2405: /* *avx512vl_cvtmask2bv16qi */ |
| 38581 | case 2404: /* *avx512bw_cvtmask2bv64qi */ |
| 38582 | case 2403: /* avx512vl_cvtq2maskv2di */ |
| 38583 | case 2402: /* avx512vl_cvtq2maskv4di */ |
| 38584 | case 2401: /* avx512f_cvtq2maskv8di */ |
| 38585 | case 2400: /* avx512vl_cvtd2maskv4si */ |
| 38586 | case 2399: /* avx512vl_cvtd2maskv8si */ |
| 38587 | case 2398: /* avx512f_cvtd2maskv16si */ |
| 38588 | case 2397: /* avx512vl_cvtw2maskv8hi */ |
| 38589 | case 2396: /* avx512vl_cvtw2maskv16hi */ |
| 38590 | case 2395: /* avx512bw_cvtw2maskv32hi */ |
| 38591 | case 2394: /* avx512vl_cvtb2maskv32qi */ |
| 38592 | case 2393: /* avx512vl_cvtb2maskv16qi */ |
| 38593 | case 2392: /* avx512bw_cvtb2maskv64qi */ |
| 38594 | case 1360: /* *absnegv2df2 */ |
| 38595 | case 1359: /* *absnegv4df2 */ |
| 38596 | case 1358: /* *absnegv8df2 */ |
| 38597 | case 1357: /* *absnegv4sf2 */ |
| 38598 | case 1356: /* *absnegv8sf2 */ |
| 38599 | case 1355: /* *absnegv16sf2 */ |
| 38600 | case 1354: /* kunpckdi */ |
| 38601 | case 1353: /* kunpcksi */ |
| 38602 | case 1294: /* movdi_to_sse */ |
| 38603 | case 1209: /* *vec_extractv2si_zext_mem */ |
| 38604 | case 1207: /* *vec_extractv2si_0 */ |
| 38605 | case 1137: /* *vec_extractv2sf_0 */ |
| 38606 | case 1105: /* rdpid */ |
| 38607 | case 1104: /* *wrpkru */ |
| 38608 | case 1103: /* *rdpkru */ |
| 38609 | case 1086: /* clzero_di */ |
| 38610 | case 1085: /* clzero_si */ |
| 38611 | case 1084: /* monitorx_di */ |
| 38612 | case 1083: /* monitorx_si */ |
| 38613 | case 1082: /* mwaitx */ |
| 38614 | case 1079: /* xtest_1 */ |
| 38615 | case 1078: /* xabort */ |
| 38616 | case 1077: /* xend */ |
| 38617 | case 1076: /* xbegin_1 */ |
| 38618 | case 1075: /* *pause */ |
| 38619 | case 1074: /* rdseeddi_1 */ |
| 38620 | case 1073: /* rdseedsi_1 */ |
| 38621 | case 1072: /* rdseedhi_1 */ |
| 38622 | case 1071: /* rdranddi_1 */ |
| 38623 | case 1070: /* rdrandsi_1 */ |
| 38624 | case 1069: /* rdrandhi_1 */ |
| 38625 | case 1068: /* wrgsbasedi */ |
| 38626 | case 1067: /* wrfsbasedi */ |
| 38627 | case 1066: /* wrgsbasesi */ |
| 38628 | case 1065: /* wrfsbasesi */ |
| 38629 | case 1064: /* rdgsbasedi */ |
| 38630 | case 1063: /* rdfsbasedi */ |
| 38631 | case 1062: /* rdgsbasesi */ |
| 38632 | case 1061: /* rdfsbasesi */ |
| 38633 | case 1052: /* fnclex */ |
| 38634 | case 1051: /* fnstsw */ |
| 38635 | case 1050: /* fldenv */ |
| 38636 | case 1049: /* fnstenv */ |
| 38637 | case 1048: /* xrstors64 */ |
| 38638 | case 1047: /* xrstor64 */ |
| 38639 | case 1046: /* xrstors_rex64 */ |
| 38640 | case 1045: /* xrstor_rex64 */ |
| 38641 | case 1044: /* xrstors */ |
| 38642 | case 1043: /* xrstor */ |
| 38643 | case 1042: /* xsaves64 */ |
| 38644 | case 1041: /* xsavec64 */ |
| 38645 | case 1040: /* xsaveopt64 */ |
| 38646 | case 1039: /* xsave64 */ |
| 38647 | case 1038: /* xsaves_rex64 */ |
| 38648 | case 1037: /* xsavec_rex64 */ |
| 38649 | case 1036: /* xsaveopt_rex64 */ |
| 38650 | case 1035: /* xsave_rex64 */ |
| 38651 | case 1034: /* xsaves */ |
| 38652 | case 1033: /* xsavec */ |
| 38653 | case 1032: /* xsaveopt */ |
| 38654 | case 1031: /* xsave */ |
| 38655 | case 1030: /* fxrstor64 */ |
| 38656 | case 1029: /* fxrstor */ |
| 38657 | case 1028: /* fxsave64 */ |
| 38658 | case 1027: /* fxsave */ |
| 38659 | case 1026: /* rdtscp_rex64 */ |
| 38660 | case 1025: /* rdtscp */ |
| 38661 | case 1024: /* rdtsc_rex64 */ |
| 38662 | case 1023: /* rdtsc */ |
| 38663 | case 1022: /* rdpmc_rex64 */ |
| 38664 | case 1021: /* rdpmc */ |
| 38665 | case 1016: /* stack_tls_protect_test_di */ |
| 38666 | case 1015: /* stack_tls_protect_test_si */ |
| 38667 | case 1014: /* stack_protect_test_di */ |
| 38668 | case 1013: /* stack_protect_test_si */ |
| 38669 | case 1012: /* stack_tls_protect_set_di */ |
| 38670 | case 1011: /* stack_tls_protect_set_si */ |
| 38671 | case 1010: /* stack_protect_set_di */ |
| 38672 | case 1009: /* stack_protect_set_si */ |
| 38673 | case 1005: /* trap */ |
| 38674 | case 1004: /* probe_stack_rangedi */ |
| 38675 | case 1003: /* probe_stack_rangesi */ |
| 38676 | case 1002: /* adjust_stack_and_probedi */ |
| 38677 | case 1001: /* adjust_stack_and_probesi */ |
| 38678 | case 998: /* allocate_stack_worker_probe_di */ |
| 38679 | case 997: /* allocate_stack_worker_probe_si */ |
| 38680 | case 968: /* *strlenqi_1 */ |
| 38681 | case 967: /* *strlenqi_1 */ |
| 38682 | case 966: /* *cmpstrnqi_1 */ |
| 38683 | case 965: /* *cmpstrnqi_1 */ |
| 38684 | case 964: /* *cmpstrnqi_nz_1 */ |
| 38685 | case 963: /* *cmpstrnqi_nz_1 */ |
| 38686 | case 962: /* *rep_stosqi */ |
| 38687 | case 961: /* *rep_stosqi */ |
| 38688 | case 960: /* *rep_stossi */ |
| 38689 | case 959: /* *rep_stossi */ |
| 38690 | case 958: /* *rep_stosdi_rex64 */ |
| 38691 | case 957: /* *rep_stosdi_rex64 */ |
| 38692 | case 956: /* *strsetqi_1 */ |
| 38693 | case 955: /* *strsetqi_1 */ |
| 38694 | case 954: /* *strsethi_1 */ |
| 38695 | case 953: /* *strsethi_1 */ |
| 38696 | case 952: /* *strsetsi_1 */ |
| 38697 | case 951: /* *strsetsi_1 */ |
| 38698 | case 950: /* *strsetdi_rex_1 */ |
| 38699 | case 949: /* *strsetdi_rex_1 */ |
| 38700 | case 948: /* *rep_movqi */ |
| 38701 | case 947: /* *rep_movqi */ |
| 38702 | case 946: /* *rep_movsi */ |
| 38703 | case 945: /* *rep_movsi */ |
| 38704 | case 944: /* *rep_movdi_rex64 */ |
| 38705 | case 943: /* *rep_movdi_rex64 */ |
| 38706 | case 942: /* *strmovqi_1 */ |
| 38707 | case 941: /* *strmovqi_1 */ |
| 38708 | case 940: /* *strmovhi_1 */ |
| 38709 | case 939: /* *strmovhi_1 */ |
| 38710 | case 938: /* *strmovsi_1 */ |
| 38711 | case 937: /* *strmovsi_1 */ |
| 38712 | case 936: /* *strmovdi_rex_1 */ |
| 38713 | case 935: /* *strmovdi_rex_1 */ |
| 38714 | case 934: /* cld */ |
| 38715 | case 932: /* fxamdf2_i387_with_temp */ |
| 38716 | case 931: /* fxamsf2_i387_with_temp */ |
| 38717 | case 930: /* fxamxf2_i387 */ |
| 38718 | case 929: /* fxamdf2_i387 */ |
| 38719 | case 928: /* fxamsf2_i387 */ |
| 38720 | case 811: /* *tls_dynamic_gnu2_combine_64 */ |
| 38721 | case 808: /* *tls_dynamic_gnu2_combine_32 */ |
| 38722 | case 797: /* *tls_local_dynamic_32_once */ |
| 38723 | case 796: /* *tls_local_dynamic_base_64_largepic */ |
| 38724 | case 795: /* *tls_local_dynamic_base_64_di */ |
| 38725 | case 794: /* *tls_local_dynamic_base_64_si */ |
| 38726 | case 793: /* *tls_local_dynamic_base_32_gnu */ |
| 38727 | case 792: /* *tls_global_dynamic_64_largepic */ |
| 38728 | case 791: /* *tls_global_dynamic_64_di */ |
| 38729 | case 790: /* *tls_global_dynamic_64_si */ |
| 38730 | case 789: /* *tls_global_dynamic_32_gnu */ |
| 38731 | case 788: /* *parityhi2_cmp */ |
| 38732 | case 787: /* paritysi2_cmp */ |
| 38733 | case 786: /* paritydi2_cmp */ |
| 38734 | case 785: /* bswaphi_lowpart */ |
| 38735 | case 784: /* *bswaphi_lowpart_1 */ |
| 38736 | case 778: /* *popcounthi2_1 */ |
| 38737 | case 706: /* ffssi2_no_cmove */ |
| 38738 | case 705: /* split_stack_return */ |
| 38739 | case 702: /* eh_return_internal */ |
| 38740 | case 698: /* *set_got_labelled */ |
| 38741 | case 697: /* *set_got */ |
| 38742 | case 696: /* pad */ |
| 38743 | case 695: /* nops */ |
| 38744 | case 694: /* nop */ |
| 38745 | case 692: /* simple_return_pop_internal */ |
| 38746 | case 691: /* simple_return_internal_long */ |
| 38747 | case 690: /* interrupt_return */ |
| 38748 | case 689: /* simple_return_internal */ |
| 38749 | case 688: /* prologue_use */ |
| 38750 | case 687: /* *memory_blockage */ |
| 38751 | case 686: /* blockage */ |
| 38752 | case 658: /* *jccxf_si_r_i387 */ |
| 38753 | case 657: /* *jccdf_si_r_i387 */ |
| 38754 | case 656: /* *jccsf_si_r_i387 */ |
| 38755 | case 655: /* *jccxf_hi_r_i387 */ |
| 38756 | case 654: /* *jccdf_hi_r_i387 */ |
| 38757 | case 653: /* *jccsf_hi_r_i387 */ |
| 38758 | case 652: /* *jccxf_si_i387 */ |
| 38759 | case 651: /* *jccdf_si_i387 */ |
| 38760 | case 650: /* *jccsf_si_i387 */ |
| 38761 | case 649: /* *jccxf_hi_i387 */ |
| 38762 | case 648: /* *jccdf_hi_i387 */ |
| 38763 | case 647: /* *jccsf_hi_i387 */ |
| 38764 | case 646: /* *jccuxf_r_i387 */ |
| 38765 | case 645: /* *jccudf_r_i387 */ |
| 38766 | case 644: /* *jccusf_r_i387 */ |
| 38767 | case 643: /* *jccuxf_i387 */ |
| 38768 | case 642: /* *jccudf_i387 */ |
| 38769 | case 641: /* *jccusf_i387 */ |
| 38770 | case 640: /* *jccdf_r_i387 */ |
| 38771 | case 639: /* *jccsf_r_i387 */ |
| 38772 | case 638: /* *jccdf_i387 */ |
| 38773 | case 637: /* *jccsf_i387 */ |
| 38774 | case 636: /* *jccxf_r_i387 */ |
| 38775 | case 635: /* *jccxf_i387 */ |
| 38776 | case 634: /* *jccxf_0_r_i387 */ |
| 38777 | case 633: /* *jccdf_0_r_i387 */ |
| 38778 | case 632: /* *jccsf_0_r_i387 */ |
| 38779 | case 631: /* *jccxf_0_i387 */ |
| 38780 | case 630: /* *jccdf_0_i387 */ |
| 38781 | case 629: /* *jccsf_0_i387 */ |
| 38782 | case 622: /* *setcc_si_1_movzbl */ |
| 38783 | case 621: /* *setcc_si_1_and */ |
| 38784 | case 620: /* *setcc_di_1 */ |
| 38785 | case 619: /* *jcc_btdi_mask */ |
| 38786 | case 618: /* *jcc_btsi_mask */ |
| 38787 | case 617: /* *jcc_btdi_1 */ |
| 38788 | case 616: /* *jcc_btsi_1 */ |
| 38789 | case 615: /* *jcc_btdi */ |
| 38790 | case 614: /* *jcc_btsi */ |
| 38791 | case 593: /* ix86_rotrti3_doubleword */ |
| 38792 | case 592: /* ix86_rotrdi3_doubleword */ |
| 38793 | case 591: /* ix86_rotlti3_doubleword */ |
| 38794 | case 590: /* ix86_rotldi3_doubleword */ |
| 38795 | case 589: /* *rotrdi3_mask */ |
| 38796 | case 588: /* *rotldi3_mask */ |
| 38797 | case 587: /* *rotrsi3_mask */ |
| 38798 | case 586: /* *rotlsi3_mask */ |
| 38799 | case 544: /* *ashrti3_doubleword */ |
| 38800 | case 543: /* *lshrti3_doubleword */ |
| 38801 | case 542: /* *ashrdi3_doubleword */ |
| 38802 | case 541: /* *lshrdi3_doubleword */ |
| 38803 | case 540: /* *ashrdi3_mask */ |
| 38804 | case 539: /* *lshrdi3_mask */ |
| 38805 | case 538: /* *ashrsi3_mask */ |
| 38806 | case 537: /* *lshrsi3_mask */ |
| 38807 | case 518: /* *ashldi3_mask */ |
| 38808 | case 517: /* *ashlsi3_mask */ |
| 38809 | case 514: /* *ashlti3_doubleword */ |
| 38810 | case 513: /* *ashldi3_doubleword */ |
| 38811 | case 502: /* *one_cmpldi2_doubleword */ |
| 38812 | case 501: /* copysigntf3_var */ |
| 38813 | case 500: /* copysigndf3_var */ |
| 38814 | case 499: /* copysignsf3_var */ |
| 38815 | case 498: /* copysigntf3_const */ |
| 38816 | case 497: /* copysigndf3_const */ |
| 38817 | case 496: /* copysignsf3_const */ |
| 38818 | case 483: /* *absnegtf2_sse */ |
| 38819 | case 482: /* *absnegxf2_i387 */ |
| 38820 | case 481: /* *absnegdf2 */ |
| 38821 | case 480: /* *absnegsf2 */ |
| 38822 | case 465: /* *negti2_doubleword */ |
| 38823 | case 464: /* *negdi2_doubleword */ |
| 38824 | case 422: /* *xordi3_doubleword */ |
| 38825 | case 421: /* *iordi3_doubleword */ |
| 38826 | case 414: /* *andndi3_doubleword */ |
| 38827 | case 397: /* *anddi3_doubleword */ |
| 38828 | case 396: /* *testqi_ext_3 */ |
| 38829 | case 395: /* *testqi_ext_3 */ |
| 38830 | case 394: /* *testqi_ext_3 */ |
| 38831 | case 382: /* *udivmoddi4_pow2 */ |
| 38832 | case 381: /* *udivmodsi4_pow2 */ |
| 38833 | case 380: /* *udivmoddi4 */ |
| 38834 | case 379: /* *udivmodsi4 */ |
| 38835 | case 378: /* *udivmodhi4 */ |
| 38836 | case 377: /* udivmoddi4_1 */ |
| 38837 | case 376: /* udivmodsi4_1 */ |
| 38838 | case 371: /* *divmoddi4 */ |
| 38839 | case 370: /* *divmodsi4 */ |
| 38840 | case 369: /* *divmodhi4 */ |
| 38841 | case 368: /* divmoddi4_1 */ |
| 38842 | case 367: /* divmodsi4_1 */ |
| 38843 | case 270: /* *subti3_doubleword */ |
| 38844 | case 269: /* *subdi3_doubleword */ |
| 38845 | case 216: /* *addti3_doubleword */ |
| 38846 | case 215: /* *adddi3_doubleword */ |
| 38847 | case 212: /* *floatunssixf2_i387_with_xmm */ |
| 38848 | case 211: /* *floatunssidf2_i387_with_xmm */ |
| 38849 | case 210: /* *floatunssisf2_i387_with_xmm */ |
| 38850 | case 209: /* floatdixf2_i387_with_xmm */ |
| 38851 | case 208: /* floatdidf2_i387_with_xmm */ |
| 38852 | case 207: /* floatdisf2_i387_with_xmm */ |
| 38853 | case 193: /* x86_fldcw_1 */ |
| 38854 | case 192: /* x86_fnstcw_1 */ |
| 38855 | case 169: /* *fixuns_truncdf_1 */ |
| 38856 | case 168: /* *fixuns_truncsf_1 */ |
| 38857 | case 146: /* extendsidi2_1 */ |
| 38858 | case 144: /* *zextsi_doubleword */ |
| 38859 | case 143: /* *zexthi_doubleword */ |
| 38860 | case 142: /* *zextqi_doubleword */ |
| 38861 | case 141: /* *zexthi_doubleword_and */ |
| 38862 | case 140: /* *zextqi_doubleword_and */ |
| 38863 | case 121: /* *pushdf */ |
| 38864 | case 120: /* *pushxf */ |
| 38865 | case 119: /* *pushxf_rounded */ |
| 38866 | case 118: /* *pushxf_rounded */ |
| 38867 | case 117: /* *pushtf */ |
| 38868 | case 56: /* *pushti2 */ |
| 38869 | case 55: /* *pushdi2 */ |
| 38870 | case 48: /* x86_sahf_1 */ |
| 38871 | case 47: /* x86_fnstsw_1 */ |
| 38872 | case 46: /* *cmpxf_si_cc_i387 */ |
| 38873 | case 45: /* *cmpdf_si_cc_i387 */ |
| 38874 | case 44: /* *cmpsf_si_cc_i387 */ |
| 38875 | case 43: /* *cmpxf_hi_cc_i387 */ |
| 38876 | case 42: /* *cmpdf_hi_cc_i387 */ |
| 38877 | case 41: /* *cmpsf_hi_cc_i387 */ |
| 38878 | case 40: /* *cmpxf_si_i387 */ |
| 38879 | case 39: /* *cmpdf_si_i387 */ |
| 38880 | case 38: /* *cmpsf_si_i387 */ |
| 38881 | case 37: /* *cmpxf_hi_i387 */ |
| 38882 | case 36: /* *cmpdf_hi_i387 */ |
| 38883 | case 35: /* *cmpsf_hi_i387 */ |
| 38884 | case 34: /* *cmpuxf_cc_i387 */ |
| 38885 | case 33: /* *cmpudf_cc_i387 */ |
| 38886 | case 32: /* *cmpusf_cc_i387 */ |
| 38887 | case 31: /* *cmpuxf_i387 */ |
| 38888 | case 30: /* *cmpudf_i387 */ |
| 38889 | case 29: /* *cmpusf_i387 */ |
| 38890 | case 28: /* *cmpdf_cc_i387 */ |
| 38891 | case 27: /* *cmpsf_cc_i387 */ |
| 38892 | case 26: /* *cmpdf_i387 */ |
| 38893 | case 25: /* *cmpsf_i387 */ |
| 38894 | case 24: /* *cmpxf_cc_i387 */ |
| 38895 | case 23: /* *cmpxf_i387 */ |
| 38896 | case 22: /* *cmpxf_0_cc_i387 */ |
| 38897 | case 21: /* *cmpdf_0_cc_i387 */ |
| 38898 | case 20: /* *cmpsf_0_cc_i387 */ |
| 38899 | case 19: /* *cmpxf_0_i387 */ |
| 38900 | case 18: /* *cmpdf_0_i387 */ |
| 38901 | case 17: /* *cmpsf_0_i387 */ |
| 38902 | return 6; |
| 38903 | |
| 38904 | case 1178: /* mmx_gtv2si3 */ |
| 38905 | case 1177: /* mmx_gtv4hi3 */ |
| 38906 | case 1176: /* mmx_gtv8qi3 */ |
| 38907 | case 1175: /* *mmx_eqv2si3 */ |
| 38908 | case 1174: /* *mmx_eqv4hi3 */ |
| 38909 | case 1173: /* *mmx_eqv8qi3 */ |
| 38910 | case 1129: /* mmx_gev2sf3 */ |
| 38911 | case 1128: /* mmx_gtv2sf3 */ |
| 38912 | case 1127: /* *mmx_eqv2sf3 */ |
| 38913 | case 393: /* *testqi_ext_2 */ |
| 38914 | case 392: /* *testqi_ext_1 */ |
| 38915 | case 391: /* *testsi_1 */ |
| 38916 | case 390: /* *testhi_1 */ |
| 38917 | case 389: /* *testqi_1 */ |
| 38918 | case 388: /* *testqi_1_maybe_si */ |
| 38919 | case 387: /* *testdi_1 */ |
| 38920 | case 54: /* *cmpiuxf_i387 */ |
| 38921 | case 53: /* *cmpixf_i387 */ |
| 38922 | case 16: /* *cmpqi_ext_4 */ |
| 38923 | case 15: /* *cmpqi_ext_3 */ |
| 38924 | case 14: /* *cmpqi_ext_2 */ |
| 38925 | case 13: /* *cmpqi_ext_1 */ |
| 38926 | case 12: /* *cmpdi_minus_1 */ |
| 38927 | case 11: /* *cmpsi_minus_1 */ |
| 38928 | case 10: /* *cmphi_minus_1 */ |
| 38929 | case 9: /* *cmpqi_minus_1 */ |
| 38930 | case 8: /* *cmpdi_1 */ |
| 38931 | case 7: /* *cmpsi_1 */ |
| 38932 | case 6: /* *cmphi_1 */ |
| 38933 | case 5: /* *cmpqi_1 */ |
| 38934 | case 4: /* *cmpdi_ccno_1 */ |
| 38935 | case 3: /* *cmpsi_ccno_1 */ |
| 38936 | case 2: /* *cmphi_ccno_1 */ |
| 38937 | case 1: /* *cmpqi_ccno_1 */ |
| 38938 | if (((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) || (cached_memory == MEMORY_LOAD)) |
| 38939 | { |
| 38940 | return 1; |
| 38941 | } |
| 38942 | else |
| 38943 | { |
| 38944 | return 0; |
| 38945 | } |
| 38946 | |
| 38947 | case -1: |
| 38948 | if (GET_CODE (PATTERN (insn)) != ASM_INPUT |
| 38949 | && asm_noperands (PATTERN (insn)) < 0) |
| 38950 | fatal_insn_not_found (insn); |
| 38951 | /* FALLTHRU */ |
| 38952 | case 49: /* *cmpisf */ |
| 38953 | case 50: /* *cmpidf */ |
| 38954 | case 51: /* *cmpiusf */ |
| 38955 | case 52: /* *cmpiudf */ |
| 38956 | case 78: /* *movxi_internal_avx512f */ |
| 38957 | case 79: /* *movoi_internal_avx */ |
| 38958 | case 80: /* *movti_internal */ |
| 38959 | case 81: /* *movdi_internal */ |
| 38960 | case 82: /* *movsi_internal */ |
| 38961 | case 83: /* *movhi_internal */ |
| 38962 | case 84: /* *movqi_internal */ |
| 38963 | case 107: /* *extzvqi */ |
| 38964 | case 124: /* *movtf_internal */ |
| 38965 | case 125: /* *movxf_internal */ |
| 38966 | case 126: /* *movdf_internal */ |
| 38967 | case 127: /* *movsf_internal */ |
| 38968 | case 131: /* *zero_extendsidi2 */ |
| 38969 | case 154: /* *extendsfdf2 */ |
| 38970 | case 155: /* *extendsfxf2_i387 */ |
| 38971 | case 156: /* *extenddfxf2_i387 */ |
| 38972 | case 157: /* *truncdfsf_fast_mixed */ |
| 38973 | case 159: /* *truncdfsf_mixed */ |
| 38974 | case 160: /* *truncdfsf_i387 */ |
| 38975 | case 162: /* *truncxfsf2_mixed */ |
| 38976 | case 163: /* *truncxfdf2_mixed */ |
| 38977 | case 199: /* *floatsisf2_mixed */ |
| 38978 | case 200: /* *floatdisf2_mixed */ |
| 38979 | case 201: /* *floatsidf2_mixed */ |
| 38980 | case 202: /* *floatdidf2_mixed */ |
| 38981 | case 217: /* *addsi_1 */ |
| 38982 | case 218: /* *adddi_1 */ |
| 38983 | case 219: /* addsi_1_zext */ |
| 38984 | case 220: /* *addhi_1 */ |
| 38985 | case 221: /* *addqi_1 */ |
| 38986 | case 222: /* *addqi_1_slp */ |
| 38987 | case 223: /* *addqi_2 */ |
| 38988 | case 224: /* *addhi_2 */ |
| 38989 | case 225: /* *addsi_2 */ |
| 38990 | case 226: /* *adddi_2 */ |
| 38991 | case 227: /* *addsi_2_zext */ |
| 38992 | case 228: /* *addqi_3 */ |
| 38993 | case 229: /* *addhi_3 */ |
| 38994 | case 230: /* *addsi_3 */ |
| 38995 | case 231: /* *adddi_3 */ |
| 38996 | case 232: /* *addsi_3_zext */ |
| 38997 | case 233: /* *adddi_4 */ |
| 38998 | case 234: /* *addqi_4 */ |
| 38999 | case 235: /* *addhi_4 */ |
| 39000 | case 236: /* *addsi_4 */ |
| 39001 | case 237: /* *addqi_5 */ |
| 39002 | case 238: /* *addhi_5 */ |
| 39003 | case 239: /* *addsi_5 */ |
| 39004 | case 240: /* *adddi_5 */ |
| 39005 | case 241: /* addqi_ext_1 */ |
| 39006 | case 242: /* *addqi_ext_2 */ |
| 39007 | case 243: /* *addvqi4 */ |
| 39008 | case 244: /* *addvhi4 */ |
| 39009 | case 245: /* *addvsi4 */ |
| 39010 | case 246: /* *addvdi4 */ |
| 39011 | case 247: /* *addvqi4_1 */ |
| 39012 | case 248: /* *addvhi4_1 */ |
| 39013 | case 249: /* *addvsi4_1 */ |
| 39014 | case 250: /* *addvdi4_1 */ |
| 39015 | case 271: /* *subqi_1 */ |
| 39016 | case 272: /* *subhi_1 */ |
| 39017 | case 273: /* *subsi_1 */ |
| 39018 | case 274: /* *subdi_1 */ |
| 39019 | case 275: /* *subsi_1_zext */ |
| 39020 | case 277: /* *subqi_2 */ |
| 39021 | case 278: /* *subhi_2 */ |
| 39022 | case 279: /* *subsi_2 */ |
| 39023 | case 280: /* *subdi_2 */ |
| 39024 | case 281: /* *subsi_2_zext */ |
| 39025 | case 282: /* *subvqi4 */ |
| 39026 | case 283: /* *subvhi4 */ |
| 39027 | case 284: /* *subvsi4 */ |
| 39028 | case 285: /* *subvdi4 */ |
| 39029 | case 286: /* *subvqi4_1 */ |
| 39030 | case 287: /* *subvhi4_1 */ |
| 39031 | case 288: /* *subvsi4_1 */ |
| 39032 | case 289: /* *subvdi4_1 */ |
| 39033 | case 290: /* *subqi_3 */ |
| 39034 | case 291: /* *subhi_3 */ |
| 39035 | case 292: /* *subsi_3 */ |
| 39036 | case 293: /* *subdi_3 */ |
| 39037 | case 294: /* *subsi_3_zext */ |
| 39038 | case 295: /* addqi3_carry */ |
| 39039 | case 296: /* addhi3_carry */ |
| 39040 | case 297: /* addsi3_carry */ |
| 39041 | case 298: /* adddi3_carry */ |
| 39042 | case 299: /* *addqi3_carry_0 */ |
| 39043 | case 300: /* *addhi3_carry_0 */ |
| 39044 | case 301: /* *addsi3_carry_0 */ |
| 39045 | case 302: /* *adddi3_carry_0 */ |
| 39046 | case 303: /* *addsi3_carry_zext */ |
| 39047 | case 304: /* *addsi3_carry_zext_0 */ |
| 39048 | case 305: /* addcarrysi */ |
| 39049 | case 306: /* addcarrydi */ |
| 39050 | case 307: /* subqi3_carry */ |
| 39051 | case 308: /* subhi3_carry */ |
| 39052 | case 309: /* subsi3_carry */ |
| 39053 | case 310: /* subdi3_carry */ |
| 39054 | case 311: /* *subqi3_carry_0 */ |
| 39055 | case 312: /* *subhi3_carry_0 */ |
| 39056 | case 313: /* *subsi3_carry_0 */ |
| 39057 | case 314: /* *subdi3_carry_0 */ |
| 39058 | case 315: /* *subsi3_carry_zext */ |
| 39059 | case 316: /* *subsi3_carry_zext_0 */ |
| 39060 | case 317: /* subborrowsi */ |
| 39061 | case 318: /* subborrowdi */ |
| 39062 | case 319: /* *addqi3_cconly_overflow_1 */ |
| 39063 | case 320: /* *addhi3_cconly_overflow_1 */ |
| 39064 | case 321: /* *addsi3_cconly_overflow_1 */ |
| 39065 | case 322: /* *adddi3_cconly_overflow_1 */ |
| 39066 | case 323: /* *addqi3_cc_overflow_1 */ |
| 39067 | case 324: /* *addhi3_cc_overflow_1 */ |
| 39068 | case 325: /* *addsi3_cc_overflow_1 */ |
| 39069 | case 326: /* *adddi3_cc_overflow_1 */ |
| 39070 | case 327: /* *addsi3_zext_cc_overflow_1 */ |
| 39071 | case 328: /* *addqi3_cconly_overflow_2 */ |
| 39072 | case 329: /* *addhi3_cconly_overflow_2 */ |
| 39073 | case 330: /* *addsi3_cconly_overflow_2 */ |
| 39074 | case 331: /* *adddi3_cconly_overflow_2 */ |
| 39075 | case 332: /* *addqi3_cc_overflow_2 */ |
| 39076 | case 333: /* *addhi3_cc_overflow_2 */ |
| 39077 | case 334: /* *addsi3_cc_overflow_2 */ |
| 39078 | case 335: /* *adddi3_cc_overflow_2 */ |
| 39079 | case 336: /* *addsi3_zext_cc_overflow_2 */ |
| 39080 | case 398: /* *anddi_1 */ |
| 39081 | case 399: /* *andsi_1_zext */ |
| 39082 | case 400: /* *andhi_1 */ |
| 39083 | case 401: /* *andsi_1 */ |
| 39084 | case 402: /* *andqi_1 */ |
| 39085 | case 404: /* *anddi_2 */ |
| 39086 | case 405: /* *andsi_2_zext */ |
| 39087 | case 406: /* *andqi_2_maybe_si */ |
| 39088 | case 407: /* *andqi_2 */ |
| 39089 | case 408: /* *andhi_2 */ |
| 39090 | case 409: /* *andsi_2 */ |
| 39091 | case 411: /* andqi_ext_1 */ |
| 39092 | case 412: /* *andqi_ext_1_cc */ |
| 39093 | case 413: /* *andqi_ext_2 */ |
| 39094 | case 423: /* *iorhi_1 */ |
| 39095 | case 424: /* *xorhi_1 */ |
| 39096 | case 425: /* *iorsi_1 */ |
| 39097 | case 426: /* *xorsi_1 */ |
| 39098 | case 427: /* *iordi_1 */ |
| 39099 | case 428: /* *xordi_1 */ |
| 39100 | case 429: /* *iorsi_1_zext */ |
| 39101 | case 430: /* *xorsi_1_zext */ |
| 39102 | case 431: /* *iorsi_1_zext_imm */ |
| 39103 | case 432: /* *xorsi_1_zext_imm */ |
| 39104 | case 433: /* *iorqi_1 */ |
| 39105 | case 434: /* *xorqi_1 */ |
| 39106 | case 437: /* *iorqi_2 */ |
| 39107 | case 438: /* *xorqi_2 */ |
| 39108 | case 439: /* *iorhi_2 */ |
| 39109 | case 440: /* *xorhi_2 */ |
| 39110 | case 441: /* *iorsi_2 */ |
| 39111 | case 442: /* *xorsi_2 */ |
| 39112 | case 443: /* *iordi_2 */ |
| 39113 | case 444: /* *xordi_2 */ |
| 39114 | case 445: /* *iorsi_2_zext */ |
| 39115 | case 446: /* *xorsi_2_zext */ |
| 39116 | case 447: /* *iorsi_2_zext_imm */ |
| 39117 | case 448: /* *xorsi_2_zext_imm */ |
| 39118 | case 451: /* *iorqi_3 */ |
| 39119 | case 452: /* *xorqi_3 */ |
| 39120 | case 453: /* *iorhi_3 */ |
| 39121 | case 454: /* *xorhi_3 */ |
| 39122 | case 455: /* *iorsi_3 */ |
| 39123 | case 456: /* *xorsi_3 */ |
| 39124 | case 457: /* *iordi_3 */ |
| 39125 | case 458: /* *xordi_3 */ |
| 39126 | case 459: /* *iorqi_ext_1 */ |
| 39127 | case 460: /* *xorqi_ext_1 */ |
| 39128 | case 461: /* *iorqi_ext_2 */ |
| 39129 | case 462: /* *xorqi_ext_2 */ |
| 39130 | case 463: /* *xorqi_ext_1_cc */ |
| 39131 | case 521: /* *ashlsi3_1 */ |
| 39132 | case 522: /* *ashldi3_1 */ |
| 39133 | case 524: /* *ashlsi3_1_zext */ |
| 39134 | case 525: /* *ashlhi3_1 */ |
| 39135 | case 526: /* *ashlqi3_1 */ |
| 39136 | case 527: /* *ashlqi3_1_slp */ |
| 39137 | case 528: /* *ashlqi3_cmp */ |
| 39138 | case 529: /* *ashlhi3_cmp */ |
| 39139 | case 530: /* *ashlsi3_cmp */ |
| 39140 | case 531: /* *ashldi3_cmp */ |
| 39141 | case 532: /* *ashlsi3_cmp_zext */ |
| 39142 | case 533: /* *ashlqi3_cconly */ |
| 39143 | case 534: /* *ashlhi3_cconly */ |
| 39144 | case 535: /* *ashlsi3_cconly */ |
| 39145 | case 536: /* *ashldi3_cconly */ |
| 39146 | case 780: /* *bswapsi2_movbe */ |
| 39147 | case 781: /* *bswapdi2_movbe */ |
| 39148 | case 812: /* *fop_sf_comm */ |
| 39149 | case 813: /* *fop_df_comm */ |
| 39150 | case 815: /* *fop_sf_1 */ |
| 39151 | case 816: /* *fop_df_1 */ |
| 39152 | case 817: /* *fop_sf_2_i387 */ |
| 39153 | case 818: /* *fop_df_2_i387 */ |
| 39154 | case 819: /* *fop_sf_2_i387 */ |
| 39155 | case 820: /* *fop_df_2_i387 */ |
| 39156 | case 821: /* *fop_sf_3_i387 */ |
| 39157 | case 822: /* *fop_df_3_i387 */ |
| 39158 | case 823: /* *fop_sf_3_i387 */ |
| 39159 | case 824: /* *fop_df_3_i387 */ |
| 39160 | case 825: /* *fop_df_4_i387 */ |
| 39161 | case 826: /* *fop_df_5_i387 */ |
| 39162 | case 827: /* *fop_df_6_i387 */ |
| 39163 | case 828: /* *fop_xf_comm_i387 */ |
| 39164 | case 829: /* *fop_xf_1_i387 */ |
| 39165 | case 830: /* *fop_xf_2_i387 */ |
| 39166 | case 831: /* *fop_xf_2_i387 */ |
| 39167 | case 832: /* *fop_xf_3_i387 */ |
| 39168 | case 833: /* *fop_xf_3_i387 */ |
| 39169 | case 834: /* *fop_xf_4_i387 */ |
| 39170 | case 835: /* *fop_xf_4_i387 */ |
| 39171 | case 836: /* *fop_xf_5_i387 */ |
| 39172 | case 837: /* *fop_xf_5_i387 */ |
| 39173 | case 838: /* *fop_xf_6_i387 */ |
| 39174 | case 839: /* *fop_xf_6_i387 */ |
| 39175 | case 993: /* pro_epilogue_adjust_stack_si_add */ |
| 39176 | case 994: /* pro_epilogue_adjust_stack_di_add */ |
| 39177 | case 995: /* pro_epilogue_adjust_stack_si_sub */ |
| 39178 | case 996: /* pro_epilogue_adjust_stack_di_sub */ |
| 39179 | case 1106: /* *movv8qi_internal */ |
| 39180 | case 1107: /* *movv4hi_internal */ |
| 39181 | case 1108: /* *movv2si_internal */ |
| 39182 | case 1109: /* *movv1di_internal */ |
| 39183 | case 1110: /* *movv2sf_internal */ |
| 39184 | case 1119: /* mmx_rcpv2sf2 */ |
| 39185 | case 1120: /* mmx_rcpit1v2sf3 */ |
| 39186 | case 1121: /* mmx_rcpit2v2sf3 */ |
| 39187 | case 1122: /* mmx_rsqrtv2sf2 */ |
| 39188 | case 1123: /* mmx_rsqit1v2sf3 */ |
| 39189 | case 1138: /* *vec_extractv2sf_1 */ |
| 39190 | case 1208: /* *vec_extractv2si_1 */ |
| 39191 | case 1218: /* movv64qi_internal */ |
| 39192 | case 1219: /* movv32qi_internal */ |
| 39193 | case 1220: /* movv16qi_internal */ |
| 39194 | case 1221: /* movv32hi_internal */ |
| 39195 | case 1222: /* movv16hi_internal */ |
| 39196 | case 1223: /* movv8hi_internal */ |
| 39197 | case 1224: /* movv16si_internal */ |
| 39198 | case 1225: /* movv8si_internal */ |
| 39199 | case 1226: /* movv4si_internal */ |
| 39200 | case 1227: /* movv8di_internal */ |
| 39201 | case 1228: /* movv4di_internal */ |
| 39202 | case 1229: /* movv2di_internal */ |
| 39203 | case 1230: /* movv4ti_internal */ |
| 39204 | case 1231: /* movv2ti_internal */ |
| 39205 | case 1232: /* movv1ti_internal */ |
| 39206 | case 1233: /* movv16sf_internal */ |
| 39207 | case 1234: /* movv8sf_internal */ |
| 39208 | case 1235: /* movv4sf_internal */ |
| 39209 | case 1236: /* movv8df_internal */ |
| 39210 | case 1237: /* movv4df_internal */ |
| 39211 | case 1238: /* movv2df_internal */ |
| 39212 | case 2452: /* sse_loadlps */ |
| 39213 | case 2459: /* *vec_concatv2sf_sse4_1 */ |
| 39214 | case 2460: /* *vec_concatv2sf_sse */ |
| 39215 | case 2462: /* vec_setv4si_0 */ |
| 39216 | case 2463: /* vec_setv4sf_0 */ |
| 39217 | case 2536: /* *vec_interleave_highv2df */ |
| 39218 | case 2542: /* *vec_interleave_lowv2df */ |
| 39219 | case 2726: /* sse2_storehpd */ |
| 39220 | case 2728: /* sse2_storelpd */ |
| 39221 | case 2730: /* sse2_loadhpd */ |
| 39222 | case 2731: /* sse2_loadlpd */ |
| 39223 | case 2732: /* sse2_movsd */ |
| 39224 | case 2735: /* vec_concatv2df */ |
| 39225 | case 3080: /* *ashrv16hi3 */ |
| 39226 | case 3081: /* ashrv16hi3_mask */ |
| 39227 | case 3082: /* *ashrv8hi3 */ |
| 39228 | case 3083: /* ashrv8hi3_mask */ |
| 39229 | case 3084: /* *ashrv8si3 */ |
| 39230 | case 3085: /* ashrv8si3_mask */ |
| 39231 | case 3086: /* *ashrv4si3 */ |
| 39232 | case 3087: /* ashrv4si3_mask */ |
| 39233 | case 3088: /* ashrv16hi3 */ |
| 39234 | case 3089: /* ashrv8hi3 */ |
| 39235 | case 3090: /* ashrv8si3 */ |
| 39236 | case 3091: /* ashrv4si3 */ |
| 39237 | case 3092: /* *ashrv2di3 */ |
| 39238 | case 3093: /* ashrv2di3_mask */ |
| 39239 | case 3094: /* ashrv32hi3 */ |
| 39240 | case 3095: /* ashrv32hi3_mask */ |
| 39241 | case 3096: /* ashrv4di3 */ |
| 39242 | case 3097: /* ashrv4di3_mask */ |
| 39243 | case 3098: /* ashrv16si3 */ |
| 39244 | case 3099: /* ashrv16si3_mask */ |
| 39245 | case 3100: /* ashrv8di3 */ |
| 39246 | case 3101: /* ashrv8di3_mask */ |
| 39247 | case 3102: /* ashlv32hi3 */ |
| 39248 | case 3103: /* ashlv32hi3_mask */ |
| 39249 | case 3104: /* lshrv32hi3 */ |
| 39250 | case 3105: /* lshrv32hi3_mask */ |
| 39251 | case 3106: /* ashlv16hi3 */ |
| 39252 | case 3107: /* ashlv16hi3_mask */ |
| 39253 | case 3108: /* lshrv16hi3 */ |
| 39254 | case 3109: /* lshrv16hi3_mask */ |
| 39255 | case 3110: /* ashlv8hi3 */ |
| 39256 | case 3111: /* ashlv8hi3_mask */ |
| 39257 | case 3112: /* lshrv8hi3 */ |
| 39258 | case 3113: /* lshrv8hi3_mask */ |
| 39259 | case 3114: /* ashlv8si3 */ |
| 39260 | case 3115: /* ashlv8si3_mask */ |
| 39261 | case 3116: /* lshrv8si3 */ |
| 39262 | case 3117: /* lshrv8si3_mask */ |
| 39263 | case 3118: /* ashlv4si3 */ |
| 39264 | case 3119: /* ashlv4si3_mask */ |
| 39265 | case 3120: /* lshrv4si3 */ |
| 39266 | case 3121: /* lshrv4si3_mask */ |
| 39267 | case 3122: /* ashlv4di3 */ |
| 39268 | case 3123: /* ashlv4di3_mask */ |
| 39269 | case 3124: /* lshrv4di3 */ |
| 39270 | case 3125: /* lshrv4di3_mask */ |
| 39271 | case 3126: /* ashlv2di3 */ |
| 39272 | case 3127: /* ashlv2di3_mask */ |
| 39273 | case 3128: /* lshrv2di3 */ |
| 39274 | case 3129: /* lshrv2di3_mask */ |
| 39275 | case 3130: /* ashlv16si3 */ |
| 39276 | case 3131: /* ashlv16si3_mask */ |
| 39277 | case 3132: /* lshrv16si3 */ |
| 39278 | case 3133: /* lshrv16si3_mask */ |
| 39279 | case 3134: /* ashlv8di3 */ |
| 39280 | case 3135: /* ashlv8di3_mask */ |
| 39281 | case 3136: /* lshrv8di3 */ |
| 39282 | case 3137: /* lshrv8di3_mask */ |
| 39283 | case 3634: /* *vec_extractv4si */ |
| 39284 | case 3638: /* *vec_extractv2di_1 */ |
| 39285 | case 3639: /* *vec_concatv2si_sse4_1 */ |
| 39286 | case 3640: /* *vec_concatv2si */ |
| 39287 | case 3641: /* *vec_concatv4si */ |
| 39288 | case 3642: /* vec_concatv2di */ |
| 39289 | case 4195: /* vec_dupv4sf */ |
| 39290 | case 4196: /* *vec_dupv4si */ |
| 39291 | case 4197: /* *vec_dupv2di */ |
| 39292 | case 4212: /* avx_vbroadcastf128_v32qi */ |
| 39293 | case 4213: /* avx_vbroadcastf128_v16hi */ |
| 39294 | case 4214: /* avx_vbroadcastf128_v8si */ |
| 39295 | case 4215: /* avx_vbroadcastf128_v4di */ |
| 39296 | case 4216: /* avx_vbroadcastf128_v8sf */ |
| 39297 | case 4217: /* avx_vbroadcastf128_v4df */ |
| 39298 | case 4250: /* *avx_vperm_broadcast_v4sf */ |
| 39299 | case 4490: /* avx_vec_concatv32qi */ |
| 39300 | case 4491: /* avx_vec_concatv16hi */ |
| 39301 | case 4492: /* avx_vec_concatv8si */ |
| 39302 | case 4493: /* avx_vec_concatv4di */ |
| 39303 | case 4494: /* avx_vec_concatv8sf */ |
| 39304 | case 4495: /* avx_vec_concatv4df */ |
| 39305 | case 4496: /* avx_vec_concatv64qi */ |
| 39306 | case 4497: /* avx_vec_concatv32hi */ |
| 39307 | case 4498: /* avx_vec_concatv16si */ |
| 39308 | case 4499: /* avx_vec_concatv8di */ |
| 39309 | case 4500: /* avx_vec_concatv16sf */ |
| 39310 | case 4501: /* avx_vec_concatv8df */ |
| 39311 | if (((cached_type = get_attr_type (insn)) == TYPE_OTHER) || (cached_type == TYPE_MULTI) || (cached_type == TYPE_STR)) |
| 39312 | { |
| 39313 | return 6; |
| 39314 | } |
| 39315 | else if ((cached_type == TYPE_CALL) || (cached_type == TYPE_CALLV)) |
| 39316 | { |
| 39317 | return 1; |
| 39318 | } |
| 39319 | else if (((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) && ((cached_type == TYPE_IMOV) || (cached_type == TYPE_IMOVX))) |
| 39320 | { |
| 39321 | return 1; |
| 39322 | } |
| 39323 | else if ((cached_memory == MEMORY_LOAD) && ((cached_type == TYPE_IMOV) || (cached_type == TYPE_IMOVX))) |
| 39324 | { |
| 39325 | return 2; |
| 39326 | } |
| 39327 | else if ((cached_memory == MEMORY_STORE) && (cached_type == TYPE_IMOV)) |
| 39328 | { |
| 39329 | return 3; |
| 39330 | } |
| 39331 | else if ((cached_memory == MEMORY_NONE) && (cached_type == TYPE_ICMOV)) |
| 39332 | { |
| 39333 | return 2; |
| 39334 | } |
| 39335 | else if ((cached_memory == MEMORY_LOAD) && (cached_type == TYPE_ICMOV)) |
| 39336 | { |
| 39337 | return 2; |
| 39338 | } |
| 39339 | else if ((cached_memory == MEMORY_STORE) && (cached_type == TYPE_PUSH)) |
| 39340 | { |
| 39341 | return 3; |
| 39342 | } |
| 39343 | else if ((cached_memory == MEMORY_BOTH) && (cached_type == TYPE_PUSH)) |
| 39344 | { |
| 39345 | return 3; |
| 39346 | } |
| 39347 | else if ((cached_memory == MEMORY_NONE) && (cached_type == TYPE_LEA)) |
| 39348 | { |
| 39349 | return 1; |
| 39350 | } |
| 39351 | else if ((cached_memory == MEMORY_NONE) && ((cached_type == TYPE_ISHIFT) || (cached_type == TYPE_ISHIFT1) || (cached_type == TYPE_ROTATE) || (cached_type == TYPE_ROTATE1))) |
| 39352 | { |
| 39353 | return 1; |
| 39354 | } |
| 39355 | else if ((! (cached_memory == MEMORY_NONE)) && ((cached_type == TYPE_ISHIFT) || (cached_type == TYPE_ISHIFT1) || (cached_type == TYPE_ROTATE) || (cached_type == TYPE_ROTATE1))) |
| 39356 | { |
| 39357 | return 1; |
| 39358 | } |
| 39359 | else if ((cached_memory == MEMORY_NONE) && (cached_type == TYPE_IBR)) |
| 39360 | { |
| 39361 | return 1; |
| 39362 | } |
| 39363 | else if ((! (cached_memory == MEMORY_NONE)) && (cached_type == TYPE_IBR)) |
| 39364 | { |
| 39365 | return 2; |
| 39366 | } |
| 39367 | else if (cached_type == TYPE_LEAVE) |
| 39368 | { |
| 39369 | return 4; |
| 39370 | } |
| 39371 | else if ((cached_memory == MEMORY_NONE) && (cached_type == TYPE_IMUL)) |
| 39372 | { |
| 39373 | return 3; |
| 39374 | } |
| 39375 | else if ((! (cached_memory == MEMORY_NONE)) && (cached_type == TYPE_IMUL)) |
| 39376 | { |
| 39377 | return 3; |
| 39378 | } |
| 39379 | else if ((cached_memory == MEMORY_NONE) && (cached_type == TYPE_IMULX)) |
| 39380 | { |
| 39381 | return 4; |
| 39382 | } |
| 39383 | else if ((! (cached_memory == MEMORY_NONE)) && (cached_type == TYPE_IMULX)) |
| 39384 | { |
| 39385 | return 4; |
| 39386 | } |
| 39387 | else if ((cached_memory == MEMORY_NONE) && (cached_type == TYPE_IDIV)) |
| 39388 | { |
| 39389 | return 23 /* 0x17 */; |
| 39390 | } |
| 39391 | else if ((cached_memory == MEMORY_LOAD) && (cached_type == TYPE_IDIV)) |
| 39392 | { |
| 39393 | return 23 /* 0x17 */; |
| 39394 | } |
| 39395 | else if (cached_type == TYPE_FXCH) |
| 39396 | { |
| 39397 | return 0; |
| 39398 | } |
| 39399 | else if (((cached_memory == MEMORY_NONE) || (cached_memory == MEMORY_UNKNOWN)) && (cached_type == TYPE_FOP)) |
| 39400 | { |
| 39401 | return 3; |
| 39402 | } |
| 39403 | else if ((cached_memory == MEMORY_LOAD) && (cached_type == TYPE_FOP)) |
| 39404 | { |
| 39405 | return 5; |
| 39406 | } |
| 39407 | else if ((cached_memory == MEMORY_STORE) && (cached_type == TYPE_FOP)) |
| 39408 | { |
| 39409 | return 3; |
| 39410 | } |
| 39411 | else if ((cached_memory == MEMORY_BOTH) && (cached_type == TYPE_FOP)) |
| 39412 | { |
| 39413 | return 5; |
| 39414 | } |
| 39415 | else if (cached_type == TYPE_FSGN) |
| 39416 | { |
| 39417 | return 1; |
| 39418 | } |
| 39419 | else if (cached_type == TYPE_FISTP) |
| 39420 | { |
| 39421 | return 7; |
| 39422 | } |
| 39423 | else if (cached_type == TYPE_FCMOV) |
| 39424 | { |
| 39425 | return 2; |
| 39426 | } |
| 39427 | else if ((cached_memory == MEMORY_NONE) && (cached_type == TYPE_FCMP)) |
| 39428 | { |
| 39429 | return 1; |
| 39430 | } |
| 39431 | else if ((cached_memory == MEMORY_LOAD) && (cached_type == TYPE_FCMP)) |
| 39432 | { |
| 39433 | return 1; |
| 39434 | } |
| 39435 | else if ((cached_memory == MEMORY_NONE) && (cached_type == TYPE_FMOV)) |
| 39436 | { |
| 39437 | return 1; |
| 39438 | } |
| 39439 | else if ((cached_memory == MEMORY_LOAD) && (! ((cached_mode = get_attr_mode (insn)) == MODE_XF)) && (cached_type == TYPE_FMOV)) |
| 39440 | { |
| 39441 | return 3; |
| 39442 | } |
| 39443 | else if ((cached_memory == MEMORY_LOAD) && ((cached_mode = get_attr_mode (insn)) == MODE_XF) && (cached_type == TYPE_FMOV)) |
| 39444 | { |
| 39445 | return 3; |
| 39446 | } |
| 39447 | else if ((cached_memory == MEMORY_STORE) && (! ((cached_mode = get_attr_mode (insn)) == MODE_XF)) && (cached_type == TYPE_FMOV)) |
| 39448 | { |
| 39449 | return 1; |
| 39450 | } |
| 39451 | else if ((cached_memory == MEMORY_STORE) && ((cached_mode = get_attr_mode (insn)) == MODE_XF) && (cached_type == TYPE_FMOV)) |
| 39452 | { |
| 39453 | return 3; |
| 39454 | } |
| 39455 | else if ((cached_memory == MEMORY_NONE) && (cached_type == TYPE_FMUL)) |
| 39456 | { |
| 39457 | return 4; |
| 39458 | } |
| 39459 | else if ((cached_memory == MEMORY_LOAD) && (cached_type == TYPE_FMUL)) |
| 39460 | { |
| 39461 | return 4; |
| 39462 | } |
| 39463 | else if ((cached_memory == MEMORY_NONE) && ((cached_mode = get_attr_mode (insn)) == MODE_SF) && ((cached_type == TYPE_FDIV) || (cached_type == TYPE_FPSPC))) |
| 39464 | { |
| 39465 | return 18 /* 0x12 */; |
| 39466 | } |
| 39467 | else if ((cached_memory == MEMORY_LOAD) && ((cached_mode = get_attr_mode (insn)) == MODE_SF) && ((cached_type == TYPE_FDIV) || (cached_type == TYPE_FPSPC))) |
| 39468 | { |
| 39469 | return 19 /* 0x13 */; |
| 39470 | } |
| 39471 | else if ((cached_memory == MEMORY_NONE) && ((cached_mode = get_attr_mode (insn)) == MODE_DF) && ((cached_type == TYPE_FDIV) || (cached_type == TYPE_FPSPC))) |
| 39472 | { |
| 39473 | return 32 /* 0x20 */; |
| 39474 | } |
| 39475 | else if ((cached_memory == MEMORY_LOAD) && ((cached_mode = get_attr_mode (insn)) == MODE_DF) && ((cached_type == TYPE_FDIV) || (cached_type == TYPE_FPSPC))) |
| 39476 | { |
| 39477 | return 33 /* 0x21 */; |
| 39478 | } |
| 39479 | else if ((cached_memory == MEMORY_NONE) && ((cached_mode = get_attr_mode (insn)) == MODE_XF) && ((cached_type == TYPE_FDIV) || (cached_type == TYPE_FPSPC))) |
| 39480 | { |
| 39481 | return 38 /* 0x26 */; |
| 39482 | } |
| 39483 | else if ((cached_memory == MEMORY_LOAD) && ((cached_mode = get_attr_mode (insn)) == MODE_XF) && ((cached_type == TYPE_FDIV) || (cached_type == TYPE_FPSPC))) |
| 39484 | { |
| 39485 | return 39 /* 0x27 */; |
| 39486 | } |
| 39487 | else if ((cached_memory == MEMORY_NONE) && ((cached_type == TYPE_MMXADD) || (cached_type == TYPE_SSEIADD))) |
| 39488 | { |
| 39489 | return 1; |
| 39490 | } |
| 39491 | else if ((cached_memory == MEMORY_LOAD) && ((cached_type == TYPE_MMXADD) || (cached_type == TYPE_SSEIADD))) |
| 39492 | { |
| 39493 | return 2; |
| 39494 | } |
| 39495 | else if ((cached_memory == MEMORY_NONE) && (cached_type == TYPE_MMXSHFT)) |
| 39496 | { |
| 39497 | return 1; |
| 39498 | } |
| 39499 | else if ((cached_memory == MEMORY_LOAD) && (cached_type == TYPE_MMXSHFT)) |
| 39500 | { |
| 39501 | return 2; |
| 39502 | } |
| 39503 | else if ((cached_memory == MEMORY_NONE) && (cached_type == TYPE_SSEISHFT) && (! ((cached_length_immediate = get_attr_length_immediate (insn)) == 0))) |
| 39504 | { |
| 39505 | return 1; |
| 39506 | } |
| 39507 | else if ((cached_memory == MEMORY_LOAD) && (cached_type == TYPE_SSEISHFT) && (! ((cached_length_immediate = get_attr_length_immediate (insn)) == 0))) |
| 39508 | { |
| 39509 | return 2; |
| 39510 | } |
| 39511 | else if ((cached_memory == MEMORY_NONE) && (cached_type == TYPE_SSEISHFT) && ((cached_length_immediate = get_attr_length_immediate (insn)) == 0)) |
| 39512 | { |
| 39513 | return 2; |
| 39514 | } |
| 39515 | else if ((cached_memory == MEMORY_LOAD) && (cached_type == TYPE_SSEISHFT) && ((cached_length_immediate = get_attr_length_immediate (insn)) == 0)) |
| 39516 | { |
| 39517 | return 3; |
| 39518 | } |
| 39519 | else if ((cached_memory == MEMORY_NONE) && ((cached_type == TYPE_MMXMUL) || (cached_type == TYPE_SSEIMUL))) |
| 39520 | { |
| 39521 | return 5; |
| 39522 | } |
| 39523 | else if ((cached_memory == MEMORY_NONE) && ((cached_type == TYPE_MMXMUL) || (cached_type == TYPE_SSEIMUL))) |
| 39524 | { |
| 39525 | return 5; |
| 39526 | } |
| 39527 | else if (((cached_mode = get_attr_mode (insn)) == MODE_DI) && (cached_type == TYPE_MMXCVT)) |
| 39528 | { |
| 39529 | return 4; |
| 39530 | } |
| 39531 | else if ((cached_memory == MEMORY_UNKNOWN) && (cached_type == TYPE_SSE)) |
| 39532 | { |
| 39533 | return 2; |
| 39534 | } |
| 39535 | else if (((cached_mode == MODE_SF) || (cached_mode == MODE_DF)) && (cached_type == TYPE_SSE)) |
| 39536 | { |
| 39537 | return 3; |
| 39538 | } |
| 39539 | else if ((cached_mode == MODE_V4SF) && (cached_type == TYPE_SSE)) |
| 39540 | { |
| 39541 | return 4; |
| 39542 | } |
| 39543 | else if (((cached_mode == MODE_V8SF) || (cached_mode == MODE_V4DF)) && (cached_type == TYPE_SSE)) |
| 39544 | { |
| 39545 | return 4; |
| 39546 | } |
| 39547 | else if ((cached_memory == MEMORY_NONE) && ((cached_type == TYPE_SSEADD1) || (cached_type == TYPE_SSECMP) || (cached_type == TYPE_SSECOMI))) |
| 39548 | { |
| 39549 | return 3; |
| 39550 | } |
| 39551 | else if ((cached_memory == MEMORY_LOAD) && ((cached_type == TYPE_SSEADD1) || (cached_type == TYPE_SSECMP) || (cached_type == TYPE_SSECOMI))) |
| 39552 | { |
| 39553 | return 3; |
| 39554 | } |
| 39555 | else if ((cached_memory == MEMORY_NONE) && ((cached_type == TYPE_SSELOG) || (cached_type == TYPE_SSELOG1))) |
| 39556 | { |
| 39557 | return 1; |
| 39558 | } |
| 39559 | else if ((cached_memory == MEMORY_LOAD) && ((cached_type == TYPE_SSELOG) || (cached_type == TYPE_SSELOG1))) |
| 39560 | { |
| 39561 | return 2; |
| 39562 | } |
| 39563 | else if ((cached_memory == MEMORY_NONE) && (cached_type == TYPE_SSEADD)) |
| 39564 | { |
| 39565 | return 3; |
| 39566 | } |
| 39567 | else if ((cached_memory == MEMORY_LOAD) && (cached_type == TYPE_SSEADD)) |
| 39568 | { |
| 39569 | return 3; |
| 39570 | } |
| 39571 | else if ((cached_memory == MEMORY_NONE) && (cached_type == TYPE_SSEMUL)) |
| 39572 | { |
| 39573 | return 5; |
| 39574 | } |
| 39575 | else if ((cached_memory == MEMORY_LOAD) && (cached_type == TYPE_SSEMUL)) |
| 39576 | { |
| 39577 | return 5; |
| 39578 | } |
| 39579 | else if ((cached_memory == MEMORY_NONE) && (cached_type == TYPE_SSEMULADD)) |
| 39580 | { |
| 39581 | return 5; |
| 39582 | } |
| 39583 | else if ((cached_memory == MEMORY_LOAD) && (cached_type == TYPE_SSEMULADD)) |
| 39584 | { |
| 39585 | return 5; |
| 39586 | } |
| 39587 | else if ((cached_memory == MEMORY_NONE) && ((cached_mode == MODE_SF) || (cached_mode == MODE_V4SF) || (cached_mode == MODE_V8SF)) && (cached_type == TYPE_SSEDIV)) |
| 39588 | { |
| 39589 | return 18 /* 0x12 */; |
| 39590 | } |
| 39591 | else if ((cached_memory == MEMORY_NONE) && ((cached_mode == MODE_SF) || (cached_mode == MODE_V4SF) || (cached_mode == MODE_V8SF)) && (cached_type == TYPE_SSEDIV)) |
| 39592 | { |
| 39593 | return 18 /* 0x12 */; |
| 39594 | } |
| 39595 | else if ((cached_memory == MEMORY_NONE) && ((cached_mode == MODE_DF) || (cached_mode == MODE_V2DF) || (cached_mode == MODE_V4DF)) && (cached_type == TYPE_SSEDIV)) |
| 39596 | { |
| 39597 | return 28 /* 0x1c */; |
| 39598 | } |
| 39599 | else if ((cached_memory == MEMORY_NONE) && ((cached_mode == MODE_DF) || (cached_mode == MODE_V2DF) || (cached_mode == MODE_V4DF)) && (cached_type == TYPE_SSEDIV)) |
| 39600 | { |
| 39601 | return 28 /* 0x1c */; |
| 39602 | } |
| 39603 | else if ((cached_memory == MEMORY_NONE) && (cached_type == TYPE_SSEICVT)) |
| 39604 | { |
| 39605 | return 4; |
| 39606 | } |
| 39607 | else if ((! (cached_memory == MEMORY_NONE)) && (cached_type == TYPE_SSEICVT)) |
| 39608 | { |
| 39609 | return 4; |
| 39610 | } |
| 39611 | else if ((cached_memory == MEMORY_NONE) && (cached_type == TYPE_SSEMOV)) |
| 39612 | { |
| 39613 | return 1; |
| 39614 | } |
| 39615 | else if ((cached_memory == MEMORY_LOAD) && (cached_type == TYPE_SSEMOV)) |
| 39616 | { |
| 39617 | return 2; |
| 39618 | } |
| 39619 | else if ((cached_memory == MEMORY_STORE) && (cached_type == TYPE_SSEMOV)) |
| 39620 | { |
| 39621 | return 1; |
| 39622 | } |
| 39623 | else if (((cached_memory == MEMORY_NONE) || (cached_memory == MEMORY_UNKNOWN)) && ((cached_type == TYPE_ALU) || (cached_type == TYPE_ALU1) || (cached_type == TYPE_NEGNOT) || (cached_type == TYPE_INCDEC) || (cached_type == TYPE_ICMP) || (cached_type == TYPE_TEST) || (cached_type == TYPE_SETCC) || (cached_type == TYPE_SSEISHFT1) || (cached_type == TYPE_MMX) || (cached_type == TYPE_MMXCMP))) |
| 39624 | { |
| 39625 | return 1; |
| 39626 | } |
| 39627 | else if ((cached_memory == MEMORY_LOAD) && ((cached_type == TYPE_ALU) || (cached_type == TYPE_ALU1) || (cached_type == TYPE_NEGNOT) || (cached_type == TYPE_INCDEC) || (cached_type == TYPE_ICMP) || (cached_type == TYPE_TEST) || (cached_type == TYPE_SETCC) || (cached_type == TYPE_POP) || (cached_type == TYPE_SSEISHFT1) || (cached_type == TYPE_MMX) || (cached_type == TYPE_MMXCMP))) |
| 39628 | { |
| 39629 | return 1; |
| 39630 | } |
| 39631 | else if ((cached_memory == MEMORY_STORE) && ((cached_type == TYPE_ALU) || (cached_type == TYPE_ALU1) || (cached_type == TYPE_NEGNOT) || (cached_type == TYPE_INCDEC) || (cached_type == TYPE_ICMP) || (cached_type == TYPE_TEST) || (cached_type == TYPE_SETCC) || (cached_type == TYPE_SSEISHFT1) || (cached_type == TYPE_MMX) || (cached_type == TYPE_MMXCMP))) |
| 39632 | { |
| 39633 | return 1; |
| 39634 | } |
| 39635 | else if ((cached_memory == MEMORY_BOTH) && ((cached_type == TYPE_ALU) || (cached_type == TYPE_ALU1) || (cached_type == TYPE_NEGNOT) || (cached_type == TYPE_INCDEC) || (cached_type == TYPE_ICMP) || (cached_type == TYPE_TEST) || (cached_type == TYPE_SETCC) || (cached_type == TYPE_POP) || (cached_type == TYPE_SSEISHFT1) || (cached_type == TYPE_MMX) || (cached_type == TYPE_MMXCMP))) |
| 39636 | { |
| 39637 | return 4; |
| 39638 | } |
| 39639 | else |
| 39640 | { |
| 39641 | return 0; |
| 39642 | } |
| 39643 | |
| 39644 | default: |
| 39645 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) |
| 39646 | { |
| 39647 | return 1; |
| 39648 | } |
| 39649 | else if (cached_memory == MEMORY_LOAD) |
| 39650 | { |
| 39651 | return 2; |
| 39652 | } |
| 39653 | else |
| 39654 | { |
| 39655 | return 0; |
| 39656 | } |
| 39657 | |
| 39658 | } |
| 39659 | } |
| 39660 | |
| 39661 | int |
| 39662 | insn_default_latency_generic (rtx_insn *insn ATTRIBUTE_UNUSED) |
| 39663 | { |
| 39664 | enum attr_memory cached_memory ATTRIBUTE_UNUSED; |
| 39665 | enum attr_type cached_type ATTRIBUTE_UNUSED; |
| 39666 | enum attr_mode cached_mode ATTRIBUTE_UNUSED; |
| 39667 | enum attr_athlon_decode cached_athlon_decode ATTRIBUTE_UNUSED; |
| 39668 | enum attr_unit cached_unit ATTRIBUTE_UNUSED; |
| 39669 | |
| 39670 | switch (recog_memoized (insn)) |
| 39671 | { |
| 39672 | case 4217: /* avx_vbroadcastf128_v4df */ |
| 39673 | case 4216: /* avx_vbroadcastf128_v8sf */ |
| 39674 | case 4215: /* avx_vbroadcastf128_v4di */ |
| 39675 | case 4214: /* avx_vbroadcastf128_v8si */ |
| 39676 | case 4213: /* avx_vbroadcastf128_v16hi */ |
| 39677 | case 4212: /* avx_vbroadcastf128_v32qi */ |
| 39678 | extract_constrain_insn_cached (insn); |
| 39679 | if (((1 << which_alternative) & 0x29)) |
| 39680 | { |
| 39681 | return 2; |
| 39682 | } |
| 39683 | else if (get_attr_memory (insn) == MEMORY_LOAD) |
| 39684 | { |
| 39685 | return 5; |
| 39686 | } |
| 39687 | else |
| 39688 | { |
| 39689 | return 3; |
| 39690 | } |
| 39691 | |
| 39692 | case 3904: /* sse4_2_pcmpistr_cconly */ |
| 39693 | case 3900: /* sse4_2_pcmpestr_cconly */ |
| 39694 | extract_constrain_insn_cached (insn); |
| 39695 | if (!((1 << which_alternative) & 0x5)) |
| 39696 | { |
| 39697 | return 5; |
| 39698 | } |
| 39699 | else |
| 39700 | { |
| 39701 | return 3; |
| 39702 | } |
| 39703 | |
| 39704 | case 3903: /* sse4_2_pcmpistrm */ |
| 39705 | case 3902: /* sse4_2_pcmpistri */ |
| 39706 | case 3901: /* sse4_2_pcmpistr */ |
| 39707 | case 3899: /* sse4_2_pcmpestrm */ |
| 39708 | case 3898: /* sse4_2_pcmpestri */ |
| 39709 | case 3897: /* sse4_2_pcmpestr */ |
| 39710 | extract_constrain_insn_cached (insn); |
| 39711 | if (which_alternative != 0) |
| 39712 | { |
| 39713 | return 5; |
| 39714 | } |
| 39715 | else |
| 39716 | { |
| 39717 | return 3; |
| 39718 | } |
| 39719 | |
| 39720 | case 3634: /* *vec_extractv4si */ |
| 39721 | extract_constrain_insn_cached (insn); |
| 39722 | if ((((1 << which_alternative) & 0x3)) && (get_attr_memory (insn) == MEMORY_LOAD)) |
| 39723 | { |
| 39724 | return 5; |
| 39725 | } |
| 39726 | else if (((1 << which_alternative) & 0x3)) |
| 39727 | { |
| 39728 | return 3; |
| 39729 | } |
| 39730 | else |
| 39731 | { |
| 39732 | return 0; |
| 39733 | } |
| 39734 | |
| 39735 | case 2783: /* avx512vl_us_truncatev16hiv16qi2_mask */ |
| 39736 | case 2782: /* avx512vl_truncatev16hiv16qi2_mask */ |
| 39737 | case 2781: /* avx512vl_ss_truncatev16hiv16qi2_mask */ |
| 39738 | case 2780: /* avx512vl_us_truncatev8siv8hi2_mask */ |
| 39739 | case 2779: /* avx512vl_truncatev8siv8hi2_mask */ |
| 39740 | case 2778: /* avx512vl_ss_truncatev8siv8hi2_mask */ |
| 39741 | case 2777: /* avx512vl_us_truncatev4div4si2_mask */ |
| 39742 | case 2776: /* avx512vl_truncatev4div4si2_mask */ |
| 39743 | case 2775: /* avx512vl_ss_truncatev4div4si2_mask */ |
| 39744 | case 2774: /* *avx512vl_us_truncatev16hiv16qi2 */ |
| 39745 | case 2773: /* *avx512vl_truncatev16hiv16qi2 */ |
| 39746 | case 2772: /* *avx512vl_ss_truncatev16hiv16qi2 */ |
| 39747 | case 2771: /* *avx512vl_us_truncatev8siv8hi2 */ |
| 39748 | case 2770: /* *avx512vl_truncatev8siv8hi2 */ |
| 39749 | case 2769: /* *avx512vl_ss_truncatev8siv8hi2 */ |
| 39750 | case 2768: /* *avx512vl_us_truncatev4div4si2 */ |
| 39751 | case 2767: /* *avx512vl_truncatev4div4si2 */ |
| 39752 | case 2766: /* *avx512vl_ss_truncatev4div4si2 */ |
| 39753 | case 2759: /* avx512f_us_truncatev8div8hi2_mask */ |
| 39754 | case 2758: /* avx512f_truncatev8div8hi2_mask */ |
| 39755 | case 2757: /* avx512f_ss_truncatev8div8hi2_mask */ |
| 39756 | case 2750: /* avx512f_us_truncatev16siv16qi2_mask */ |
| 39757 | case 2749: /* avx512f_truncatev16siv16qi2_mask */ |
| 39758 | case 2748: /* avx512f_ss_truncatev16siv16qi2_mask */ |
| 39759 | case 2747: /* *avx512f_us_truncatev8div8hi2 */ |
| 39760 | case 2746: /* *avx512f_truncatev8div8hi2 */ |
| 39761 | case 2745: /* *avx512f_ss_truncatev8div8hi2 */ |
| 39762 | case 2738: /* *avx512f_us_truncatev16siv16qi2 */ |
| 39763 | case 2737: /* *avx512f_truncatev16siv16qi2 */ |
| 39764 | case 2736: /* *avx512f_ss_truncatev16siv16qi2 */ |
| 39765 | extract_constrain_insn_cached (insn); |
| 39766 | if (memory_operand (operands[1], DFmode)) |
| 39767 | { |
| 39768 | return 2; |
| 39769 | } |
| 39770 | else if (which_alternative != 0) |
| 39771 | { |
| 39772 | return 3; |
| 39773 | } |
| 39774 | else |
| 39775 | { |
| 39776 | return 2; |
| 39777 | } |
| 39778 | |
| 39779 | case 2732: /* sse2_movsd */ |
| 39780 | extract_constrain_insn_cached (insn); |
| 39781 | if (which_alternative != 5) |
| 39782 | { |
| 39783 | return 2; |
| 39784 | } |
| 39785 | else if (get_attr_memory (insn) == MEMORY_LOAD) |
| 39786 | { |
| 39787 | return 5; |
| 39788 | } |
| 39789 | else |
| 39790 | { |
| 39791 | return 3; |
| 39792 | } |
| 39793 | |
| 39794 | case 2542: /* *vec_interleave_lowv2df */ |
| 39795 | case 2536: /* *vec_interleave_highv2df */ |
| 39796 | extract_constrain_insn_cached (insn); |
| 39797 | if (!((1 << which_alternative) & 0x7)) |
| 39798 | { |
| 39799 | return 2; |
| 39800 | } |
| 39801 | else if (get_attr_memory (insn) == MEMORY_LOAD) |
| 39802 | { |
| 39803 | return 5; |
| 39804 | } |
| 39805 | else |
| 39806 | { |
| 39807 | return 3; |
| 39808 | } |
| 39809 | |
| 39810 | case 2372: /* *sse2_vd_cvtsd2ss */ |
| 39811 | case 2371: /* sse2_cvtsd2ss_round */ |
| 39812 | case 2370: /* sse2_cvtsd2ss */ |
| 39813 | extract_constrain_insn_cached (insn); |
| 39814 | if ((which_alternative == 1) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 39815 | { |
| 39816 | return 9; |
| 39817 | } |
| 39818 | else if ((which_alternative == 0) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 39819 | { |
| 39820 | return 12 /* 0xc */; |
| 39821 | } |
| 39822 | else |
| 39823 | { |
| 39824 | return 0; |
| 39825 | } |
| 39826 | |
| 39827 | case 2383: /* *sse2_cvtpd2ps_mask */ |
| 39828 | case 2382: /* *sse2_cvtpd2ps */ |
| 39829 | case 2369: /* sse2_cvttpd2dq_mask */ |
| 39830 | case 2368: /* sse2_cvttpd2dq */ |
| 39831 | case 2291: /* sse2_cvtpd2dq_mask */ |
| 39832 | case 2290: /* sse2_cvtpd2dq */ |
| 39833 | if (((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) || (cached_memory == MEMORY_NONE)) |
| 39834 | { |
| 39835 | return 8; |
| 39836 | } |
| 39837 | else |
| 39838 | { |
| 39839 | return 0; |
| 39840 | } |
| 39841 | |
| 39842 | case 2200: /* sse2_cvtsi2sdq_round */ |
| 39843 | case 2199: /* sse2_cvtsi2sdq */ |
| 39844 | case 2198: /* sse2_cvtsi2sd */ |
| 39845 | extract_constrain_insn_cached (insn); |
| 39846 | if ((which_alternative == 0) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 39847 | { |
| 39848 | return 9; |
| 39849 | } |
| 39850 | else if ((which_alternative == 0) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 39851 | { |
| 39852 | return 11 /* 0xb */; |
| 39853 | } |
| 39854 | else |
| 39855 | { |
| 39856 | return 0; |
| 39857 | } |
| 39858 | |
| 39859 | case 2195: /* sse2_cvtpi2pd */ |
| 39860 | extract_constrain_insn_cached (insn); |
| 39861 | if ((which_alternative == 0) && (get_attr_memory (insn) == MEMORY_LOAD)) |
| 39862 | { |
| 39863 | return 3; |
| 39864 | } |
| 39865 | else if (which_alternative == 0) |
| 39866 | { |
| 39867 | return 2; |
| 39868 | } |
| 39869 | else |
| 39870 | { |
| 39871 | return 0; |
| 39872 | } |
| 39873 | |
| 39874 | case 2226: /* sse2_cvttsd2siq_round */ |
| 39875 | case 2225: /* sse2_cvttsd2siq */ |
| 39876 | case 2224: /* sse2_cvttsd2si_round */ |
| 39877 | case 2223: /* sse2_cvttsd2si */ |
| 39878 | case 2222: /* sse2_cvtsd2siq_2 */ |
| 39879 | case 2221: /* sse2_cvtsd2siq_round */ |
| 39880 | case 2220: /* sse2_cvtsd2siq */ |
| 39881 | case 2219: /* sse2_cvtsd2si_2 */ |
| 39882 | case 2218: /* sse2_cvtsd2si_round */ |
| 39883 | case 2217: /* sse2_cvtsd2si */ |
| 39884 | case 2119: /* sse_cvttss2siq_round */ |
| 39885 | case 2118: /* sse_cvttss2siq */ |
| 39886 | case 2117: /* sse_cvttss2si_round */ |
| 39887 | case 2116: /* sse_cvttss2si */ |
| 39888 | case 2115: /* sse_cvtss2siq_2 */ |
| 39889 | case 2114: /* sse_cvtss2siq_round */ |
| 39890 | case 2113: /* sse_cvtss2siq */ |
| 39891 | case 2112: /* sse_cvtss2si_2 */ |
| 39892 | case 2111: /* sse_cvtss2si_round */ |
| 39893 | case 2110: /* sse_cvtss2si */ |
| 39894 | extract_constrain_insn_cached (insn); |
| 39895 | if (((which_alternative == 1) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) || ((which_alternative == 0) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE))) |
| 39896 | { |
| 39897 | return 9; |
| 39898 | } |
| 39899 | else |
| 39900 | { |
| 39901 | return 0; |
| 39902 | } |
| 39903 | |
| 39904 | case 1464: /* sse2_divv2df3_mask */ |
| 39905 | case 1463: /* sse2_divv2df3 */ |
| 39906 | case 1462: /* avx_divv4df3_mask */ |
| 39907 | case 1461: /* avx_divv4df3 */ |
| 39908 | case 1460: /* avx512f_divv8df3_mask_round */ |
| 39909 | case 1459: /* avx512f_divv8df3_mask */ |
| 39910 | case 1458: /* avx512f_divv8df3_round */ |
| 39911 | case 1457: /* avx512f_divv8df3 */ |
| 39912 | case 1456: /* sse_divv4sf3_mask */ |
| 39913 | case 1455: /* sse_divv4sf3 */ |
| 39914 | case 1454: /* avx_divv8sf3_mask */ |
| 39915 | case 1453: /* avx_divv8sf3 */ |
| 39916 | case 1452: /* avx512f_divv16sf3_mask_round */ |
| 39917 | case 1451: /* avx512f_divv16sf3_mask */ |
| 39918 | case 1450: /* avx512f_divv16sf3_round */ |
| 39919 | case 1449: /* avx512f_divv16sf3 */ |
| 39920 | if (get_attr_memory (insn) == MEMORY_LOAD) |
| 39921 | { |
| 39922 | return 35 /* 0x23 */; |
| 39923 | } |
| 39924 | else |
| 39925 | { |
| 39926 | return 39 /* 0x27 */; |
| 39927 | } |
| 39928 | |
| 39929 | case 1448: /* sse2_vmdivv2df3_round */ |
| 39930 | case 1447: /* sse2_vmdivv2df3 */ |
| 39931 | case 1444: /* sse_vmdivv4sf3_round */ |
| 39932 | case 1443: /* sse_vmdivv4sf3 */ |
| 39933 | if (get_attr_memory (insn) == MEMORY_LOAD) |
| 39934 | { |
| 39935 | return 22 /* 0x16 */; |
| 39936 | } |
| 39937 | else |
| 39938 | { |
| 39939 | return 20 /* 0x14 */; |
| 39940 | } |
| 39941 | |
| 39942 | case 3783: /* sse4_1_dppd */ |
| 39943 | case 3782: /* avx_dppd256 */ |
| 39944 | case 3781: /* sse4_1_dpps */ |
| 39945 | case 3780: /* avx_dpps256 */ |
| 39946 | case 1620: /* sse3_hsubv4sf3 */ |
| 39947 | case 1619: /* sse3_haddv4sf3 */ |
| 39948 | case 1618: /* avx_hsubv8sf3 */ |
| 39949 | case 1617: /* avx_haddv8sf3 */ |
| 39950 | case 1616: /* *sse3_hsubv2df3_low */ |
| 39951 | case 1615: /* *sse3_haddv2df3_low */ |
| 39952 | case 1614: /* sse3_hsubv2df3 */ |
| 39953 | case 1613: /* *sse3_haddv2df3 */ |
| 39954 | case 1612: /* avx_hsubv4df3 */ |
| 39955 | case 1611: /* avx_haddv4df3 */ |
| 39956 | case 1610: /* sse3_addsubv4sf3 */ |
| 39957 | case 1609: /* avx_addsubv8sf3 */ |
| 39958 | case 1608: /* sse3_addsubv2df3 */ |
| 39959 | case 1607: /* avx_addsubv4df3 */ |
| 39960 | case 1598: /* ieee_minv2df3_mask */ |
| 39961 | case 1597: /* ieee_minv2df3 */ |
| 39962 | case 1596: /* ieee_maxv2df3_mask */ |
| 39963 | case 1595: /* ieee_maxv2df3 */ |
| 39964 | case 1594: /* ieee_minv4df3_mask */ |
| 39965 | case 1593: /* ieee_minv4df3 */ |
| 39966 | case 1592: /* ieee_maxv4df3_mask */ |
| 39967 | case 1591: /* ieee_maxv4df3 */ |
| 39968 | case 1590: /* ieee_minv8df3_mask_round */ |
| 39969 | case 1589: /* ieee_minv8df3_mask */ |
| 39970 | case 1588: /* ieee_minv8df3_round */ |
| 39971 | case 1587: /* ieee_minv8df3 */ |
| 39972 | case 1586: /* ieee_maxv8df3_mask_round */ |
| 39973 | case 1585: /* ieee_maxv8df3_mask */ |
| 39974 | case 1584: /* ieee_maxv8df3_round */ |
| 39975 | case 1583: /* ieee_maxv8df3 */ |
| 39976 | case 1582: /* ieee_minv4sf3_mask */ |
| 39977 | case 1581: /* ieee_minv4sf3 */ |
| 39978 | case 1580: /* ieee_maxv4sf3_mask */ |
| 39979 | case 1579: /* ieee_maxv4sf3 */ |
| 39980 | case 1578: /* ieee_minv8sf3_mask */ |
| 39981 | case 1577: /* ieee_minv8sf3 */ |
| 39982 | case 1576: /* ieee_maxv8sf3_mask */ |
| 39983 | case 1575: /* ieee_maxv8sf3 */ |
| 39984 | case 1574: /* ieee_minv16sf3_mask_round */ |
| 39985 | case 1573: /* ieee_minv16sf3_mask */ |
| 39986 | case 1572: /* ieee_minv16sf3_round */ |
| 39987 | case 1571: /* ieee_minv16sf3 */ |
| 39988 | case 1570: /* ieee_maxv16sf3_mask_round */ |
| 39989 | case 1569: /* ieee_maxv16sf3_mask */ |
| 39990 | case 1568: /* ieee_maxv16sf3_round */ |
| 39991 | case 1567: /* ieee_maxv16sf3 */ |
| 39992 | case 1566: /* *sminv2df3_mask_round */ |
| 39993 | case 1565: /* *sminv2df3_mask */ |
| 39994 | case 1564: /* *sminv2df3_round */ |
| 39995 | case 1563: /* *sminv2df3 */ |
| 39996 | case 1562: /* *smaxv2df3_mask_round */ |
| 39997 | case 1561: /* *smaxv2df3_mask */ |
| 39998 | case 1560: /* *smaxv2df3_round */ |
| 39999 | case 1559: /* *smaxv2df3 */ |
| 40000 | case 1558: /* *sminv4df3_mask_round */ |
| 40001 | case 1557: /* *sminv4df3_mask */ |
| 40002 | case 1556: /* *sminv4df3_round */ |
| 40003 | case 1555: /* *sminv4df3 */ |
| 40004 | case 1554: /* *smaxv4df3_mask_round */ |
| 40005 | case 1553: /* *smaxv4df3_mask */ |
| 40006 | case 1552: /* *smaxv4df3_round */ |
| 40007 | case 1551: /* *smaxv4df3 */ |
| 40008 | case 1550: /* *sminv8df3_mask_round */ |
| 40009 | case 1549: /* *sminv8df3_mask */ |
| 40010 | case 1548: /* *sminv8df3_round */ |
| 40011 | case 1547: /* *sminv8df3 */ |
| 40012 | case 1546: /* *smaxv8df3_mask_round */ |
| 40013 | case 1545: /* *smaxv8df3_mask */ |
| 40014 | case 1544: /* *smaxv8df3_round */ |
| 40015 | case 1543: /* *smaxv8df3 */ |
| 40016 | case 1542: /* *sminv4sf3_mask_round */ |
| 40017 | case 1541: /* *sminv4sf3_mask */ |
| 40018 | case 1540: /* *sminv4sf3_round */ |
| 40019 | case 1539: /* *sminv4sf3 */ |
| 40020 | case 1538: /* *smaxv4sf3_mask_round */ |
| 40021 | case 1537: /* *smaxv4sf3_mask */ |
| 40022 | case 1536: /* *smaxv4sf3_round */ |
| 40023 | case 1535: /* *smaxv4sf3 */ |
| 40024 | case 1534: /* *sminv8sf3_mask_round */ |
| 40025 | case 1533: /* *sminv8sf3_mask */ |
| 40026 | case 1532: /* *sminv8sf3_round */ |
| 40027 | case 1531: /* *sminv8sf3 */ |
| 40028 | case 1530: /* *smaxv8sf3_mask_round */ |
| 40029 | case 1529: /* *smaxv8sf3_mask */ |
| 40030 | case 1528: /* *smaxv8sf3_round */ |
| 40031 | case 1527: /* *smaxv8sf3 */ |
| 40032 | case 1526: /* *sminv16sf3_mask_round */ |
| 40033 | case 1525: /* *sminv16sf3_mask */ |
| 40034 | case 1524: /* *sminv16sf3_round */ |
| 40035 | case 1523: /* *sminv16sf3 */ |
| 40036 | case 1522: /* *smaxv16sf3_mask_round */ |
| 40037 | case 1521: /* *smaxv16sf3_mask */ |
| 40038 | case 1520: /* *smaxv16sf3_round */ |
| 40039 | case 1519: /* *smaxv16sf3 */ |
| 40040 | case 1440: /* *mulv2df3_mask_round */ |
| 40041 | case 1439: /* *mulv2df3_mask */ |
| 40042 | case 1438: /* *mulv2df3_round */ |
| 40043 | case 1437: /* *mulv2df3 */ |
| 40044 | case 1436: /* *mulv4df3_mask_round */ |
| 40045 | case 1435: /* *mulv4df3_mask */ |
| 40046 | case 1434: /* *mulv4df3_round */ |
| 40047 | case 1433: /* *mulv4df3 */ |
| 40048 | case 1432: /* *mulv8df3_mask_round */ |
| 40049 | case 1431: /* *mulv8df3_mask */ |
| 40050 | case 1430: /* *mulv8df3_round */ |
| 40051 | case 1429: /* *mulv8df3 */ |
| 40052 | case 1428: /* *mulv4sf3_mask_round */ |
| 40053 | case 1427: /* *mulv4sf3_mask */ |
| 40054 | case 1426: /* *mulv4sf3_round */ |
| 40055 | case 1425: /* *mulv4sf3 */ |
| 40056 | case 1424: /* *mulv8sf3_mask_round */ |
| 40057 | case 1423: /* *mulv8sf3_mask */ |
| 40058 | case 1422: /* *mulv8sf3_round */ |
| 40059 | case 1421: /* *mulv8sf3 */ |
| 40060 | case 1420: /* *mulv16sf3_mask_round */ |
| 40061 | case 1419: /* *mulv16sf3_mask */ |
| 40062 | case 1418: /* *mulv16sf3_round */ |
| 40063 | case 1417: /* *mulv16sf3 */ |
| 40064 | case 1408: /* *subv2df3_mask_round */ |
| 40065 | case 1407: /* *subv2df3_mask */ |
| 40066 | case 1406: /* *subv2df3_round */ |
| 40067 | case 1405: /* *subv2df3 */ |
| 40068 | case 1404: /* *addv2df3_mask_round */ |
| 40069 | case 1403: /* *addv2df3_mask */ |
| 40070 | case 1402: /* *addv2df3_round */ |
| 40071 | case 1401: /* *addv2df3 */ |
| 40072 | case 1400: /* *subv4df3_mask_round */ |
| 40073 | case 1399: /* *subv4df3_mask */ |
| 40074 | case 1398: /* *subv4df3_round */ |
| 40075 | case 1397: /* *subv4df3 */ |
| 40076 | case 1396: /* *addv4df3_mask_round */ |
| 40077 | case 1395: /* *addv4df3_mask */ |
| 40078 | case 1394: /* *addv4df3_round */ |
| 40079 | case 1393: /* *addv4df3 */ |
| 40080 | case 1392: /* *subv8df3_mask_round */ |
| 40081 | case 1391: /* *subv8df3_mask */ |
| 40082 | case 1390: /* *subv8df3_round */ |
| 40083 | case 1389: /* *subv8df3 */ |
| 40084 | case 1388: /* *addv8df3_mask_round */ |
| 40085 | case 1387: /* *addv8df3_mask */ |
| 40086 | case 1386: /* *addv8df3_round */ |
| 40087 | case 1385: /* *addv8df3 */ |
| 40088 | case 1384: /* *subv4sf3_mask_round */ |
| 40089 | case 1383: /* *subv4sf3_mask */ |
| 40090 | case 1382: /* *subv4sf3_round */ |
| 40091 | case 1381: /* *subv4sf3 */ |
| 40092 | case 1380: /* *addv4sf3_mask_round */ |
| 40093 | case 1379: /* *addv4sf3_mask */ |
| 40094 | case 1378: /* *addv4sf3_round */ |
| 40095 | case 1377: /* *addv4sf3 */ |
| 40096 | case 1376: /* *subv8sf3_mask_round */ |
| 40097 | case 1375: /* *subv8sf3_mask */ |
| 40098 | case 1374: /* *subv8sf3_round */ |
| 40099 | case 1373: /* *subv8sf3 */ |
| 40100 | case 1372: /* *addv8sf3_mask_round */ |
| 40101 | case 1371: /* *addv8sf3_mask */ |
| 40102 | case 1370: /* *addv8sf3_round */ |
| 40103 | case 1369: /* *addv8sf3 */ |
| 40104 | case 1368: /* *subv16sf3_mask_round */ |
| 40105 | case 1367: /* *subv16sf3_mask */ |
| 40106 | case 1366: /* *subv16sf3_round */ |
| 40107 | case 1365: /* *subv16sf3 */ |
| 40108 | case 1364: /* *addv16sf3_mask_round */ |
| 40109 | case 1363: /* *addv16sf3_mask */ |
| 40110 | case 1362: /* *addv16sf3_round */ |
| 40111 | case 1361: /* *addv16sf3 */ |
| 40112 | if (get_attr_memory (insn) == MEMORY_LOAD) |
| 40113 | { |
| 40114 | return 7; |
| 40115 | } |
| 40116 | else |
| 40117 | { |
| 40118 | return 5; |
| 40119 | } |
| 40120 | |
| 40121 | case 4937: /* storedi_via_sse */ |
| 40122 | case 4936: /* loaddi_via_sse */ |
| 40123 | case 3766: /* sse4a_vmmovntv4sf */ |
| 40124 | case 3764: /* sse4a_movntsf */ |
| 40125 | case 2453: /* sse_movss */ |
| 40126 | case 1298: /* sse2_movntidi */ |
| 40127 | extract_insn_cached (insn); |
| 40128 | if (memory_operand (operands[1], DFmode)) |
| 40129 | { |
| 40130 | return 2; |
| 40131 | } |
| 40132 | else if (get_attr_memory (insn) == MEMORY_LOAD) |
| 40133 | { |
| 40134 | return 1; |
| 40135 | } |
| 40136 | else |
| 40137 | { |
| 40138 | return 2; |
| 40139 | } |
| 40140 | |
| 40141 | case 4758: /* avx512vl_compressstorev2df_mask */ |
| 40142 | case 4757: /* avx512vl_compressstorev2di_mask */ |
| 40143 | case 4756: /* avx512vl_compressstorev4sf_mask */ |
| 40144 | case 4755: /* avx512vl_compressstorev4si_mask */ |
| 40145 | case 2933: /* avx512f_us_truncatev8div16qi2_mask_store */ |
| 40146 | case 2932: /* avx512f_truncatev8div16qi2_mask_store */ |
| 40147 | case 2931: /* avx512f_ss_truncatev8div16qi2_mask_store */ |
| 40148 | case 2924: /* *avx512f_us_truncatev8div16qi2_store */ |
| 40149 | case 2923: /* *avx512f_truncatev8div16qi2_store */ |
| 40150 | case 2922: /* *avx512f_ss_truncatev8div16qi2_store */ |
| 40151 | case 2918: /* avx512vl_us_truncatev2div2si2_mask_store */ |
| 40152 | case 2917: /* avx512vl_truncatev2div2si2_mask_store */ |
| 40153 | case 2916: /* avx512vl_ss_truncatev2div2si2_mask_store */ |
| 40154 | case 2909: /* *avx512vl_us_truncatev2div2si2_store */ |
| 40155 | case 2908: /* *avx512vl_truncatev2div2si2_store */ |
| 40156 | case 2907: /* *avx512vl_ss_truncatev2div2si2_store */ |
| 40157 | case 2903: /* avx512vl_us_truncatev2div2hi2_mask_store */ |
| 40158 | case 2902: /* avx512vl_truncatev2div2hi2_mask_store */ |
| 40159 | case 2901: /* avx512vl_ss_truncatev2div2hi2_mask_store */ |
| 40160 | case 2894: /* *avx512vl_us_truncatev2div2hi2_store */ |
| 40161 | case 2893: /* *avx512vl_truncatev2div2hi2_store */ |
| 40162 | case 2892: /* *avx512vl_ss_truncatev2div2hi2_store */ |
| 40163 | case 2891: /* avx512vl_us_truncatev4div4hi2_mask_store */ |
| 40164 | case 2890: /* avx512vl_truncatev4div4hi2_mask_store */ |
| 40165 | case 2889: /* avx512vl_ss_truncatev4div4hi2_mask_store */ |
| 40166 | case 2888: /* avx512vl_us_truncatev4siv4hi2_mask_store */ |
| 40167 | case 2887: /* avx512vl_truncatev4siv4hi2_mask_store */ |
| 40168 | case 2886: /* avx512vl_ss_truncatev4siv4hi2_mask_store */ |
| 40169 | case 2873: /* *avx512vl_us_truncatev4div4hi2_store */ |
| 40170 | case 2872: /* *avx512vl_truncatev4div4hi2_store */ |
| 40171 | case 2871: /* *avx512vl_ss_truncatev4div4hi2_store */ |
| 40172 | case 2870: /* *avx512vl_us_truncatev4siv4hi2_store */ |
| 40173 | case 2869: /* *avx512vl_truncatev4siv4hi2_store */ |
| 40174 | case 2868: /* *avx512vl_ss_truncatev4siv4hi2_store */ |
| 40175 | case 2858: /* avx512vl_us_truncatev8siv8qi2_mask_store */ |
| 40176 | case 2857: /* avx512vl_truncatev8siv8qi2_mask_store */ |
| 40177 | case 2856: /* avx512vl_ss_truncatev8siv8qi2_mask_store */ |
| 40178 | case 2855: /* avx512vl_us_truncatev8hiv8qi2_mask_store */ |
| 40179 | case 2854: /* avx512vl_truncatev8hiv8qi2_mask_store */ |
| 40180 | case 2853: /* avx512vl_ss_truncatev8hiv8qi2_mask_store */ |
| 40181 | case 2840: /* *avx512vl_us_truncatev8siv8qi2_store */ |
| 40182 | case 2839: /* *avx512vl_truncatev8siv8qi2_store */ |
| 40183 | case 2838: /* *avx512vl_ss_truncatev8siv8qi2_store */ |
| 40184 | case 2837: /* *avx512vl_us_truncatev8hiv8qi2_store */ |
| 40185 | case 2836: /* *avx512vl_truncatev8hiv8qi2_store */ |
| 40186 | case 2835: /* *avx512vl_ss_truncatev8hiv8qi2_store */ |
| 40187 | case 2834: /* avx512vl_us_truncatev4div4qi2_mask_store */ |
| 40188 | case 2833: /* avx512vl_truncatev4div4qi2_mask_store */ |
| 40189 | case 2832: /* avx512vl_ss_truncatev4div4qi2_mask_store */ |
| 40190 | case 2831: /* avx512vl_us_truncatev4siv4qi2_mask_store */ |
| 40191 | case 2830: /* avx512vl_truncatev4siv4qi2_mask_store */ |
| 40192 | case 2829: /* avx512vl_ss_truncatev4siv4qi2_mask_store */ |
| 40193 | case 2816: /* *avx512vl_us_truncatev4div4qi2_store */ |
| 40194 | case 2815: /* *avx512vl_truncatev4div4qi2_store */ |
| 40195 | case 2814: /* *avx512vl_ss_truncatev4div4qi2_store */ |
| 40196 | case 2813: /* *avx512vl_us_truncatev4siv4qi2_store */ |
| 40197 | case 2812: /* *avx512vl_truncatev4siv4qi2_store */ |
| 40198 | case 2811: /* *avx512vl_ss_truncatev4siv4qi2_store */ |
| 40199 | case 2810: /* avx512vl_us_truncatev2div2qi2_mask_store */ |
| 40200 | case 2809: /* avx512vl_truncatev2div2qi2_mask_store */ |
| 40201 | case 2808: /* avx512vl_ss_truncatev2div2qi2_mask_store */ |
| 40202 | case 2801: /* *avx512vl_us_truncatev2div2qi2_store */ |
| 40203 | case 2800: /* *avx512vl_truncatev2div2qi2_store */ |
| 40204 | case 2799: /* *avx512vl_ss_truncatev2div2qi2_store */ |
| 40205 | case 1292: /* avx512vl_storev8hi_mask */ |
| 40206 | case 1288: /* avx512vl_storev16qi_mask */ |
| 40207 | case 1286: /* avx512vl_storev2df_mask */ |
| 40208 | case 1283: /* avx512vl_storev4sf_mask */ |
| 40209 | case 1280: /* avx512vl_storev2di_mask */ |
| 40210 | case 1277: /* avx512vl_storev4si_mask */ |
| 40211 | extract_insn_cached (insn); |
| 40212 | if (memory_operand (operands[1], DFmode)) |
| 40213 | { |
| 40214 | return 2; |
| 40215 | } |
| 40216 | else |
| 40217 | { |
| 40218 | return 3; |
| 40219 | } |
| 40220 | |
| 40221 | case 1160: /* *sse2_umulv1siv1di3 */ |
| 40222 | case 1159: /* *mmx_pmulhrwv4hi3 */ |
| 40223 | case 1158: /* *mmx_pmaddwd */ |
| 40224 | case 1157: /* *mmx_umulv4hi3_highpart */ |
| 40225 | case 1156: /* *mmx_smulv4hi3_highpart */ |
| 40226 | case 1155: /* *mmx_mulv4hi3 */ |
| 40227 | case 1114: /* *mmx_mulv2sf3 */ |
| 40228 | if (get_attr_memory (insn) == MEMORY_LOAD) |
| 40229 | { |
| 40230 | return 4; |
| 40231 | } |
| 40232 | else |
| 40233 | { |
| 40234 | return 3; |
| 40235 | } |
| 40236 | |
| 40237 | case 2197: /* sse2_cvttpd2pi */ |
| 40238 | case 2196: /* sse2_cvtpd2pi */ |
| 40239 | case 2105: /* sse_cvttps2pi */ |
| 40240 | case 2104: /* sse_cvtps2pi */ |
| 40241 | case 1215: /* *mmx_maskmovq */ |
| 40242 | case 1214: /* *mmx_maskmovq */ |
| 40243 | case 1213: /* mmx_pmovmskb */ |
| 40244 | case 1212: /* mmx_psadbw */ |
| 40245 | case 1211: /* *mmx_uavgv4hi3 */ |
| 40246 | case 1210: /* *mmx_uavgv8qi3 */ |
| 40247 | case 1205: /* *vec_dupv2si */ |
| 40248 | case 1204: /* *vec_dupv4hi */ |
| 40249 | case 1203: /* mmx_pswapdv2si2 */ |
| 40250 | case 1202: /* mmx_pshufw_1 */ |
| 40251 | case 1201: /* mmx_pextrw */ |
| 40252 | case 1200: /* *mmx_pinsrw */ |
| 40253 | case 1199: /* mmx_punpckldq */ |
| 40254 | case 1198: /* mmx_punpckhdq */ |
| 40255 | case 1197: /* mmx_punpcklwd */ |
| 40256 | case 1196: /* mmx_punpckhwd */ |
| 40257 | case 1195: /* mmx_punpcklbw */ |
| 40258 | case 1194: /* mmx_punpckhbw */ |
| 40259 | case 1193: /* mmx_packuswb */ |
| 40260 | case 1192: /* mmx_packssdw */ |
| 40261 | case 1191: /* mmx_packsswb */ |
| 40262 | case 1190: /* *mmx_xorv2si3 */ |
| 40263 | case 1189: /* *mmx_iorv2si3 */ |
| 40264 | case 1188: /* *mmx_andv2si3 */ |
| 40265 | case 1187: /* *mmx_xorv4hi3 */ |
| 40266 | case 1186: /* *mmx_iorv4hi3 */ |
| 40267 | case 1185: /* *mmx_andv4hi3 */ |
| 40268 | case 1184: /* *mmx_xorv8qi3 */ |
| 40269 | case 1183: /* *mmx_iorv8qi3 */ |
| 40270 | case 1182: /* *mmx_andv8qi3 */ |
| 40271 | case 1181: /* mmx_andnotv2si3 */ |
| 40272 | case 1180: /* mmx_andnotv4hi3 */ |
| 40273 | case 1179: /* mmx_andnotv8qi3 */ |
| 40274 | case 1178: /* mmx_gtv2si3 */ |
| 40275 | case 1177: /* mmx_gtv4hi3 */ |
| 40276 | case 1176: /* mmx_gtv8qi3 */ |
| 40277 | case 1175: /* *mmx_eqv2si3 */ |
| 40278 | case 1174: /* *mmx_eqv4hi3 */ |
| 40279 | case 1173: /* *mmx_eqv8qi3 */ |
| 40280 | case 1172: /* mmx_lshrv1di3 */ |
| 40281 | case 1171: /* mmx_ashlv1di3 */ |
| 40282 | case 1170: /* mmx_lshrv2si3 */ |
| 40283 | case 1169: /* mmx_ashlv2si3 */ |
| 40284 | case 1168: /* mmx_lshrv4hi3 */ |
| 40285 | case 1167: /* mmx_ashlv4hi3 */ |
| 40286 | case 1166: /* mmx_ashrv2si3 */ |
| 40287 | case 1165: /* mmx_ashrv4hi3 */ |
| 40288 | case 1164: /* *mmx_uminv8qi3 */ |
| 40289 | case 1163: /* *mmx_umaxv8qi3 */ |
| 40290 | case 1162: /* *mmx_sminv4hi3 */ |
| 40291 | case 1161: /* *mmx_smaxv4hi3 */ |
| 40292 | case 1154: /* *mmx_ussubv4hi3 */ |
| 40293 | case 1153: /* *mmx_sssubv4hi3 */ |
| 40294 | case 1152: /* *mmx_usaddv4hi3 */ |
| 40295 | case 1151: /* *mmx_ssaddv4hi3 */ |
| 40296 | case 1150: /* *mmx_ussubv8qi3 */ |
| 40297 | case 1149: /* *mmx_sssubv8qi3 */ |
| 40298 | case 1148: /* *mmx_usaddv8qi3 */ |
| 40299 | case 1147: /* *mmx_ssaddv8qi3 */ |
| 40300 | case 1146: /* *mmx_subv1di3 */ |
| 40301 | case 1145: /* *mmx_addv1di3 */ |
| 40302 | case 1144: /* *mmx_subv2si3 */ |
| 40303 | case 1143: /* *mmx_addv2si3 */ |
| 40304 | case 1142: /* *mmx_subv4hi3 */ |
| 40305 | case 1141: /* *mmx_addv4hi3 */ |
| 40306 | case 1140: /* *mmx_subv8qi3 */ |
| 40307 | case 1139: /* *mmx_addv8qi3 */ |
| 40308 | case 1135: /* *vec_dupv2sf */ |
| 40309 | case 1134: /* mmx_pswapdv2sf2 */ |
| 40310 | case 1133: /* mmx_floatv2si2 */ |
| 40311 | case 1132: /* mmx_pi2fw */ |
| 40312 | case 1131: /* mmx_pf2iw */ |
| 40313 | case 1130: /* mmx_pf2id */ |
| 40314 | case 1129: /* mmx_gev2sf3 */ |
| 40315 | case 1128: /* mmx_gtv2sf3 */ |
| 40316 | case 1127: /* *mmx_eqv2sf3 */ |
| 40317 | case 1126: /* mmx_addsubv2sf3 */ |
| 40318 | case 1125: /* mmx_hsubv2sf3 */ |
| 40319 | case 1124: /* mmx_haddv2sf3 */ |
| 40320 | case 1123: /* mmx_rsqit1v2sf3 */ |
| 40321 | case 1122: /* mmx_rsqrtv2sf2 */ |
| 40322 | case 1121: /* mmx_rcpit2v2sf3 */ |
| 40323 | case 1120: /* mmx_rcpit1v2sf3 */ |
| 40324 | case 1119: /* mmx_rcpv2sf2 */ |
| 40325 | case 1118: /* mmx_ieee_minv2sf3 */ |
| 40326 | case 1117: /* mmx_ieee_maxv2sf3 */ |
| 40327 | case 1116: /* *mmx_sminv2sf3 */ |
| 40328 | case 1115: /* *mmx_smaxv2sf3 */ |
| 40329 | case 1113: /* *mmx_subv2sf3 */ |
| 40330 | case 1112: /* *mmx_addv2sf3 */ |
| 40331 | if (get_attr_memory (insn) == MEMORY_LOAD) |
| 40332 | { |
| 40333 | return 3; |
| 40334 | } |
| 40335 | else |
| 40336 | { |
| 40337 | return 2; |
| 40338 | } |
| 40339 | |
| 40340 | case 3890: /* ptesttf2 */ |
| 40341 | case 3889: /* avx_ptestv4df */ |
| 40342 | case 3888: /* avx_ptestv8sf */ |
| 40343 | case 3887: /* avx_ptestv4di */ |
| 40344 | case 3886: /* avx_ptestv8si */ |
| 40345 | case 3885: /* avx_ptestv16hi */ |
| 40346 | case 3884: /* avx_ptestv32qi */ |
| 40347 | case 3883: /* sse4_1_ptestv2df */ |
| 40348 | case 3882: /* sse4_1_ptestv4sf */ |
| 40349 | case 3881: /* sse4_1_ptestv2di */ |
| 40350 | case 3880: /* sse4_1_ptestv4si */ |
| 40351 | case 3879: /* sse4_1_ptestv8hi */ |
| 40352 | case 3878: /* sse4_1_ptestv16qi */ |
| 40353 | case 3877: /* avx_vtestpd */ |
| 40354 | case 3876: /* avx_vtestpd256 */ |
| 40355 | case 3875: /* avx_vtestps */ |
| 40356 | case 3874: /* avx_vtestps256 */ |
| 40357 | case 1740: /* sse2_ucomi_round */ |
| 40358 | case 1739: /* sse2_ucomi */ |
| 40359 | case 1738: /* sse_ucomi_round */ |
| 40360 | case 1737: /* sse_ucomi */ |
| 40361 | case 1736: /* sse2_comi_round */ |
| 40362 | case 1735: /* sse2_comi */ |
| 40363 | case 1734: /* sse_comi_round */ |
| 40364 | case 1733: /* sse_comi */ |
| 40365 | case 1446: /* sse2_vmmulv2df3_round */ |
| 40366 | case 1445: /* sse2_vmmulv2df3 */ |
| 40367 | case 1442: /* sse_vmmulv4sf3_round */ |
| 40368 | case 1441: /* sse_vmmulv4sf3 */ |
| 40369 | case 1416: /* sse2_vmsubv2df3_round */ |
| 40370 | case 1415: /* sse2_vmsubv2df3 */ |
| 40371 | case 1414: /* sse2_vmaddv2df3_round */ |
| 40372 | case 1413: /* sse2_vmaddv2df3 */ |
| 40373 | case 1412: /* sse_vmsubv4sf3_round */ |
| 40374 | case 1411: /* sse_vmsubv4sf3 */ |
| 40375 | case 1410: /* sse_vmaddv4sf3_round */ |
| 40376 | case 1409: /* sse_vmaddv4sf3 */ |
| 40377 | case 992: /* *ieee_smindf3 */ |
| 40378 | case 991: /* *ieee_smaxdf3 */ |
| 40379 | case 990: /* *ieee_sminsf3 */ |
| 40380 | case 989: /* *ieee_smaxsf3 */ |
| 40381 | case 988: /* smindf3 */ |
| 40382 | case 987: /* smaxdf3 */ |
| 40383 | case 986: /* sminsf3 */ |
| 40384 | case 985: /* smaxsf3 */ |
| 40385 | if (get_attr_memory (insn) == MEMORY_LOAD) |
| 40386 | { |
| 40387 | return 6; |
| 40388 | } |
| 40389 | else |
| 40390 | { |
| 40391 | return 4; |
| 40392 | } |
| 40393 | |
| 40394 | case 980: /* *movxfcc_1 */ |
| 40395 | return 15 /* 0xf */; |
| 40396 | |
| 40397 | case 1050: /* fldenv */ |
| 40398 | case 1048: /* xrstors64 */ |
| 40399 | case 1047: /* xrstor64 */ |
| 40400 | case 1046: /* xrstors_rex64 */ |
| 40401 | case 1045: /* xrstor_rex64 */ |
| 40402 | case 1044: /* xrstors */ |
| 40403 | case 1043: /* xrstor */ |
| 40404 | case 1030: /* fxrstor64 */ |
| 40405 | case 1029: /* fxrstor */ |
| 40406 | case 962: /* *rep_stosqi */ |
| 40407 | case 961: /* *rep_stosqi */ |
| 40408 | case 960: /* *rep_stossi */ |
| 40409 | case 959: /* *rep_stossi */ |
| 40410 | case 958: /* *rep_stosdi_rex64 */ |
| 40411 | case 957: /* *rep_stosdi_rex64 */ |
| 40412 | case 956: /* *strsetqi_1 */ |
| 40413 | case 955: /* *strsetqi_1 */ |
| 40414 | case 954: /* *strsethi_1 */ |
| 40415 | case 953: /* *strsethi_1 */ |
| 40416 | case 952: /* *strsetsi_1 */ |
| 40417 | case 951: /* *strsetsi_1 */ |
| 40418 | case 950: /* *strsetdi_rex_1 */ |
| 40419 | case 949: /* *strsetdi_rex_1 */ |
| 40420 | case 948: /* *rep_movqi */ |
| 40421 | case 947: /* *rep_movqi */ |
| 40422 | case 946: /* *rep_movsi */ |
| 40423 | case 945: /* *rep_movsi */ |
| 40424 | case 944: /* *rep_movdi_rex64 */ |
| 40425 | case 943: /* *rep_movdi_rex64 */ |
| 40426 | case 942: /* *strmovqi_1 */ |
| 40427 | case 941: /* *strmovqi_1 */ |
| 40428 | case 940: /* *strmovhi_1 */ |
| 40429 | case 939: /* *strmovhi_1 */ |
| 40430 | case 938: /* *strmovsi_1 */ |
| 40431 | case 937: /* *strmovsi_1 */ |
| 40432 | case 936: /* *strmovdi_rex_1 */ |
| 40433 | case 935: /* *strmovdi_rex_1 */ |
| 40434 | return 6; |
| 40435 | |
| 40436 | case 889: /* fistsi2_with_temp */ |
| 40437 | case 888: /* fisthi2_with_temp */ |
| 40438 | case 887: /* fistsi2 */ |
| 40439 | case 886: /* fisthi2 */ |
| 40440 | case 885: /* *fistsi2_1 */ |
| 40441 | case 884: /* *fisthi2_1 */ |
| 40442 | case 883: /* fistdi2_with_temp */ |
| 40443 | case 882: /* fistdi2 */ |
| 40444 | case 881: /* *fistdi2_1 */ |
| 40445 | case 880: /* rintdf2_frndint */ |
| 40446 | case 879: /* rintsf2_frndint */ |
| 40447 | case 878: /* rintxf2 */ |
| 40448 | case 875: /* fscalexf4_i387 */ |
| 40449 | case 874: /* *f2xm1xf2_i387 */ |
| 40450 | case 873: /* fxtract_extenddfxf3_i387 */ |
| 40451 | case 872: /* fxtract_extendsfxf3_i387 */ |
| 40452 | case 871: /* fxtractxf3_i387 */ |
| 40453 | case 870: /* fyl2xp1_extenddfxf3_i387 */ |
| 40454 | case 869: /* fyl2xp1_extendsfxf3_i387 */ |
| 40455 | case 868: /* fyl2xp1xf3_i387 */ |
| 40456 | case 867: /* fyl2x_extenddfxf3_i387 */ |
| 40457 | case 866: /* fyl2x_extendsfxf3_i387 */ |
| 40458 | case 865: /* fyl2xxf3_i387 */ |
| 40459 | case 864: /* fpatan_extenddfxf3_i387 */ |
| 40460 | case 863: /* fpatan_extendsfxf3_i387 */ |
| 40461 | case 862: /* *fpatanxf3_i387 */ |
| 40462 | case 861: /* fptan_extenddfxf4_i387 */ |
| 40463 | case 860: /* fptan_extendsfxf4_i387 */ |
| 40464 | case 859: /* fptanxf4_i387 */ |
| 40465 | case 858: /* sincos_extenddfxf3_i387 */ |
| 40466 | case 857: /* sincos_extendsfxf3_i387 */ |
| 40467 | case 856: /* sincosxf3 */ |
| 40468 | case 855: /* *cos_extenddfxf2_i387 */ |
| 40469 | case 854: /* *sin_extenddfxf2_i387 */ |
| 40470 | case 853: /* *cos_extendsfxf2_i387 */ |
| 40471 | case 852: /* *sin_extendsfxf2_i387 */ |
| 40472 | case 851: /* *cosxf2_i387 */ |
| 40473 | case 850: /* *sinxf2_i387 */ |
| 40474 | case 849: /* fprem1xf4_i387 */ |
| 40475 | case 848: /* fpremxf4_i387 */ |
| 40476 | case 844: /* sqrt_extenddfxf2_i387 */ |
| 40477 | case 843: /* sqrt_extendsfxf2_i387 */ |
| 40478 | case 842: /* sqrtxf2 */ |
| 40479 | return 100 /* 0x64 */; |
| 40480 | |
| 40481 | case 4043: /* xop_pcom_tfv2di3 */ |
| 40482 | case 4042: /* xop_pcom_tfv4si3 */ |
| 40483 | case 4041: /* xop_pcom_tfv8hi3 */ |
| 40484 | case 4040: /* xop_pcom_tfv16qi3 */ |
| 40485 | case 4039: /* xop_maskcmp_uns2v2di3 */ |
| 40486 | case 4038: /* xop_maskcmp_uns2v4si3 */ |
| 40487 | case 4037: /* xop_maskcmp_uns2v8hi3 */ |
| 40488 | case 4036: /* xop_maskcmp_uns2v16qi3 */ |
| 40489 | case 4035: /* xop_maskcmp_unsv2di3 */ |
| 40490 | case 4034: /* xop_maskcmp_unsv4si3 */ |
| 40491 | case 4033: /* xop_maskcmp_unsv8hi3 */ |
| 40492 | case 4032: /* xop_maskcmp_unsv16qi3 */ |
| 40493 | case 3383: /* sse2_gtv4si3 */ |
| 40494 | case 3382: /* sse2_gtv8hi3 */ |
| 40495 | case 3381: /* sse2_gtv16qi3 */ |
| 40496 | case 3380: /* avx512vl_gtv8hi3_mask */ |
| 40497 | case 3379: /* avx512vl_gtv8hi3 */ |
| 40498 | case 3372: /* avx512vl_gtv16qi3_mask */ |
| 40499 | case 3371: /* avx512vl_gtv16qi3 */ |
| 40500 | case 3368: /* avx512vl_gtv2di3_mask */ |
| 40501 | case 3367: /* avx512vl_gtv2di3 */ |
| 40502 | case 3362: /* avx512vl_gtv4si3_mask */ |
| 40503 | case 3361: /* avx512vl_gtv4si3 */ |
| 40504 | case 3352: /* sse4_2_gtv2di3 */ |
| 40505 | case 3351: /* *sse2_eqv4si3 */ |
| 40506 | case 3350: /* *sse2_eqv8hi3 */ |
| 40507 | case 3349: /* *sse2_eqv16qi3 */ |
| 40508 | case 3348: /* *sse4_1_eqv2di3 */ |
| 40509 | case 3347: /* avx512vl_eqv2di3_mask_1 */ |
| 40510 | case 3346: /* avx512vl_eqv2di3_1 */ |
| 40511 | case 3341: /* avx512vl_eqv4si3_mask_1 */ |
| 40512 | case 3340: /* avx512vl_eqv4si3_1 */ |
| 40513 | case 3335: /* avx512vl_eqv8hi3_mask_1 */ |
| 40514 | case 3334: /* avx512vl_eqv8hi3_1 */ |
| 40515 | case 3327: /* avx512vl_eqv16qi3_mask_1 */ |
| 40516 | case 3326: /* avx512vl_eqv16qi3_1 */ |
| 40517 | case 2375: /* *sse2_vd_cvtss2sd */ |
| 40518 | case 2374: /* sse2_cvtss2sd_round */ |
| 40519 | case 2373: /* sse2_cvtss2sd */ |
| 40520 | case 1726: /* avx512f_vmcmpv2df3_mask_round */ |
| 40521 | case 1725: /* avx512f_vmcmpv2df3_mask */ |
| 40522 | case 1724: /* avx512f_vmcmpv4sf3_mask_round */ |
| 40523 | case 1723: /* avx512f_vmcmpv4sf3_mask */ |
| 40524 | case 1722: /* avx512f_vmcmpv2df3_round */ |
| 40525 | case 1721: /* avx512f_vmcmpv2df3 */ |
| 40526 | case 1720: /* avx512f_vmcmpv4sf3_round */ |
| 40527 | case 1719: /* avx512f_vmcmpv4sf3 */ |
| 40528 | case 1718: /* avx512vl_ucmpv2di3_mask */ |
| 40529 | case 1717: /* avx512vl_ucmpv2di3 */ |
| 40530 | case 1712: /* avx512vl_ucmpv4si3_mask */ |
| 40531 | case 1711: /* avx512vl_ucmpv4si3 */ |
| 40532 | case 1706: /* avx512vl_ucmpv8hi3_mask */ |
| 40533 | case 1705: /* avx512vl_ucmpv8hi3 */ |
| 40534 | case 1698: /* avx512vl_ucmpv16qi3_mask */ |
| 40535 | case 1697: /* avx512vl_ucmpv16qi3 */ |
| 40536 | case 1694: /* avx512vl_cmpv8hi3_mask */ |
| 40537 | case 1693: /* avx512vl_cmpv8hi3 */ |
| 40538 | case 1686: /* avx512vl_cmpv16qi3_mask */ |
| 40539 | case 1685: /* avx512vl_cmpv16qi3 */ |
| 40540 | case 1666: /* avx512vl_cmpv2di3_mask */ |
| 40541 | case 1665: /* avx512vl_cmpv2di3 */ |
| 40542 | case 1658: /* avx512vl_cmpv4si3_mask */ |
| 40543 | case 1657: /* avx512vl_cmpv4si3 */ |
| 40544 | case 1650: /* sse2_vmmaskcmpv2df3 */ |
| 40545 | case 1649: /* sse_vmmaskcmpv4sf3 */ |
| 40546 | case 1640: /* avx_vmcmpv2df3 */ |
| 40547 | case 1639: /* avx_vmcmpv4sf3 */ |
| 40548 | case 877: /* sse4_1_rounddf2 */ |
| 40549 | case 626: /* setcc_df_sse */ |
| 40550 | case 625: /* setcc_sf_sse */ |
| 40551 | if (get_attr_memory (insn) == MEMORY_LOAD) |
| 40552 | { |
| 40553 | return 4; |
| 40554 | } |
| 40555 | else |
| 40556 | { |
| 40557 | return 2; |
| 40558 | } |
| 40559 | |
| 40560 | case 624: /* *setcc_qi_slp */ |
| 40561 | case 623: /* *setcc_qi */ |
| 40562 | if (((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) || (cached_memory == MEMORY_STORE)) |
| 40563 | { |
| 40564 | return 1; |
| 40565 | } |
| 40566 | else |
| 40567 | { |
| 40568 | return 0; |
| 40569 | } |
| 40570 | |
| 40571 | case 202: /* *floatdidf2_mixed */ |
| 40572 | case 201: /* *floatsidf2_mixed */ |
| 40573 | case 200: /* *floatdisf2_mixed */ |
| 40574 | case 199: /* *floatsisf2_mixed */ |
| 40575 | extract_constrain_insn_cached (insn); |
| 40576 | if (which_alternative == 0) |
| 40577 | { |
| 40578 | return 2; |
| 40579 | } |
| 40580 | else if ((which_alternative == 1) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 40581 | { |
| 40582 | return 9; |
| 40583 | } |
| 40584 | else if ((which_alternative == 1) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 40585 | { |
| 40586 | return 11 /* 0xb */; |
| 40587 | } |
| 40588 | else |
| 40589 | { |
| 40590 | return 0; |
| 40591 | } |
| 40592 | |
| 40593 | case 163: /* *truncxfdf2_mixed */ |
| 40594 | case 162: /* *truncxfsf2_mixed */ |
| 40595 | case 160: /* *truncdfsf_i387 */ |
| 40596 | case 159: /* *truncdfsf_mixed */ |
| 40597 | case 157: /* *truncdfsf_fast_mixed */ |
| 40598 | extract_constrain_insn_cached (insn); |
| 40599 | if (which_alternative == 0) |
| 40600 | { |
| 40601 | return 2; |
| 40602 | } |
| 40603 | else |
| 40604 | { |
| 40605 | return 0; |
| 40606 | } |
| 40607 | |
| 40608 | case 121: /* *pushdf */ |
| 40609 | extract_constrain_insn_cached (insn); |
| 40610 | if (((1 << which_alternative) & 0x1e)) |
| 40611 | { |
| 40612 | return 2; |
| 40613 | } |
| 40614 | else |
| 40615 | { |
| 40616 | return 0; |
| 40617 | } |
| 40618 | |
| 40619 | case 120: /* *pushxf */ |
| 40620 | case 119: /* *pushxf_rounded */ |
| 40621 | case 118: /* *pushxf_rounded */ |
| 40622 | case 117: /* *pushtf */ |
| 40623 | extract_constrain_insn_cached (insn); |
| 40624 | if (which_alternative != 0) |
| 40625 | { |
| 40626 | return 2; |
| 40627 | } |
| 40628 | else |
| 40629 | { |
| 40630 | return 0; |
| 40631 | } |
| 40632 | |
| 40633 | case 4869: /* sha256rnds2 */ |
| 40634 | case 4868: /* sha256msg2 */ |
| 40635 | case 4867: /* sha256msg1 */ |
| 40636 | case 4866: /* sha1rnds4 */ |
| 40637 | case 4865: /* sha1nexte */ |
| 40638 | case 4864: /* sha1msg2 */ |
| 40639 | case 4863: /* sha1msg1 */ |
| 40640 | case 4838: /* avx512bw_dbpsadbwv32hi_mask */ |
| 40641 | case 4837: /* *avx512bw_dbpsadbwv32hi */ |
| 40642 | case 4836: /* avx512bw_dbpsadbwv16hi_mask */ |
| 40643 | case 4835: /* *avx512bw_dbpsadbwv16hi */ |
| 40644 | case 4834: /* avx512bw_dbpsadbwv8hi_mask */ |
| 40645 | case 4833: /* *avx512bw_dbpsadbwv8hi */ |
| 40646 | case 4432: /* avx2_maskstoreq256 */ |
| 40647 | case 4431: /* avx2_maskstored256 */ |
| 40648 | case 4430: /* avx2_maskstoreq */ |
| 40649 | case 4429: /* avx2_maskstored */ |
| 40650 | case 4428: /* avx_maskstorepd256 */ |
| 40651 | case 4427: /* avx_maskstoreps256 */ |
| 40652 | case 4426: /* avx_maskstorepd */ |
| 40653 | case 4425: /* avx_maskstoreps */ |
| 40654 | case 4424: /* avx2_maskloadq256 */ |
| 40655 | case 4423: /* avx2_maskloadd256 */ |
| 40656 | case 4422: /* avx2_maskloadq */ |
| 40657 | case 4421: /* avx2_maskloadd */ |
| 40658 | case 4420: /* avx_maskloadpd256 */ |
| 40659 | case 4419: /* avx_maskloadps256 */ |
| 40660 | case 4418: /* avx_maskloadpd */ |
| 40661 | case 4417: /* avx_maskloadps */ |
| 40662 | case 4110: /* avx2_vec_dupv4df */ |
| 40663 | case 4054: /* pclmulqdq */ |
| 40664 | case 4053: /* aeskeygenassist */ |
| 40665 | case 4052: /* aesimc */ |
| 40666 | case 4051: /* aesdeclast */ |
| 40667 | case 4050: /* aesdec */ |
| 40668 | case 4049: /* aesenclast */ |
| 40669 | case 4048: /* aesenc */ |
| 40670 | case 3801: /* sse4_1_phminposuw */ |
| 40671 | case 3788: /* sse4_1_mpsadbw */ |
| 40672 | case 3787: /* avx2_mpsadbw */ |
| 40673 | case 3763: /* absv2si2 */ |
| 40674 | case 3762: /* absv4hi2 */ |
| 40675 | case 3761: /* absv8qi2 */ |
| 40676 | case 3760: /* absv8hi2_mask */ |
| 40677 | case 3759: /* absv16hi2_mask */ |
| 40678 | case 3758: /* absv32hi2_mask */ |
| 40679 | case 3757: /* absv32qi2_mask */ |
| 40680 | case 3756: /* absv16qi2_mask */ |
| 40681 | case 3755: /* absv64qi2_mask */ |
| 40682 | case 3754: /* absv2di2_mask */ |
| 40683 | case 3753: /* absv4di2_mask */ |
| 40684 | case 3752: /* absv8di2_mask */ |
| 40685 | case 3751: /* absv4si2_mask */ |
| 40686 | case 3750: /* absv8si2_mask */ |
| 40687 | case 3749: /* absv16si2_mask */ |
| 40688 | case 3748: /* *absv2di2 */ |
| 40689 | case 3747: /* *absv4di2 */ |
| 40690 | case 3746: /* *absv8di2 */ |
| 40691 | case 3745: /* *absv4si2 */ |
| 40692 | case 3744: /* *absv8si2 */ |
| 40693 | case 3743: /* *absv16si2 */ |
| 40694 | case 3742: /* *absv8hi2 */ |
| 40695 | case 3741: /* *absv16hi2 */ |
| 40696 | case 3740: /* *absv32hi2 */ |
| 40697 | case 3739: /* *absv16qi2 */ |
| 40698 | case 3738: /* *absv32qi2 */ |
| 40699 | case 3737: /* *absv64qi2 */ |
| 40700 | case 3729: /* ssse3_psignv2si3 */ |
| 40701 | case 3728: /* ssse3_psignv4hi3 */ |
| 40702 | case 3727: /* ssse3_psignv8qi3 */ |
| 40703 | case 3726: /* ssse3_psignv4si3 */ |
| 40704 | case 3725: /* avx2_psignv8si3 */ |
| 40705 | case 3724: /* ssse3_psignv8hi3 */ |
| 40706 | case 3723: /* avx2_psignv16hi3 */ |
| 40707 | case 3722: /* ssse3_psignv16qi3 */ |
| 40708 | case 3721: /* avx2_psignv32qi3 */ |
| 40709 | case 3720: /* ssse3_pshufbv8qi3 */ |
| 40710 | case 3719: /* ssse3_pshufbv16qi3_mask */ |
| 40711 | case 3718: /* ssse3_pshufbv16qi3 */ |
| 40712 | case 3717: /* avx2_pshufbv32qi3_mask */ |
| 40713 | case 3716: /* avx2_pshufbv32qi3 */ |
| 40714 | case 3715: /* avx512bw_pshufbv64qi3_mask */ |
| 40715 | case 3714: /* avx512bw_pshufbv64qi3 */ |
| 40716 | case 3635: /* *vec_extractv4si_zext */ |
| 40717 | case 3626: /* *vec_extractv8hi_zext */ |
| 40718 | case 3625: /* *vec_extractv8hi_zext */ |
| 40719 | case 3624: /* *vec_extractv16qi_zext */ |
| 40720 | case 3623: /* *vec_extractv16qi_zext */ |
| 40721 | case 3622: /* *vec_extractv8hi */ |
| 40722 | case 3621: /* *vec_extractv16qi */ |
| 40723 | case 3607: /* sse2_pshufd_1_mask */ |
| 40724 | case 3606: /* sse2_pshufd_1 */ |
| 40725 | case 3605: /* avx2_pshufd_1_mask */ |
| 40726 | case 3604: /* avx2_pshufd_1 */ |
| 40727 | case 3603: /* avx512f_pshufd_1_mask */ |
| 40728 | case 3602: /* avx512f_pshufd_1 */ |
| 40729 | case 2734: /* vec_dupv2df_mask */ |
| 40730 | case 2733: /* vec_dupv2df */ |
| 40731 | case 2530: /* vec_extract_hi_v32qi */ |
| 40732 | case 2528: /* vec_extract_hi_v64qi */ |
| 40733 | case 2526: /* vec_extract_hi_v16hi */ |
| 40734 | case 2524: /* vec_extract_hi_v32hi */ |
| 40735 | case 2522: /* vec_extract_hi_v8sf */ |
| 40736 | case 2521: /* vec_extract_hi_v8si */ |
| 40737 | case 2520: /* vec_extract_hi_v8sf_mask */ |
| 40738 | case 2519: /* vec_extract_hi_v8si_mask */ |
| 40739 | case 2518: /* vec_extract_hi_v8sf_maskm */ |
| 40740 | case 2517: /* vec_extract_hi_v8si_maskm */ |
| 40741 | case 2516: /* vec_extract_lo_v8sf_maskm */ |
| 40742 | case 2515: /* vec_extract_lo_v8si_maskm */ |
| 40743 | case 2514: /* vec_extract_lo_v8sf_mask */ |
| 40744 | case 2513: /* vec_extract_lo_v8sf */ |
| 40745 | case 2512: /* vec_extract_lo_v8si_mask */ |
| 40746 | case 2511: /* vec_extract_lo_v8si */ |
| 40747 | case 2510: /* vec_extract_hi_v4df_mask */ |
| 40748 | case 2509: /* vec_extract_hi_v4df */ |
| 40749 | case 2508: /* vec_extract_hi_v4di_mask */ |
| 40750 | case 2507: /* vec_extract_hi_v4di */ |
| 40751 | case 2506: /* vec_extract_lo_v4df_mask */ |
| 40752 | case 2505: /* vec_extract_lo_v4df */ |
| 40753 | case 2504: /* vec_extract_lo_v4di_mask */ |
| 40754 | case 2503: /* vec_extract_lo_v4di */ |
| 40755 | case 2498: /* vec_extract_hi_v16si_mask */ |
| 40756 | case 2497: /* vec_extract_hi_v16si */ |
| 40757 | case 2496: /* vec_extract_hi_v16sf_mask */ |
| 40758 | case 2495: /* vec_extract_hi_v16sf */ |
| 40759 | case 2494: /* vec_extract_hi_v16si_maskm */ |
| 40760 | case 2493: /* vec_extract_hi_v16sf_maskm */ |
| 40761 | case 2492: /* vec_extract_hi_v8di_mask */ |
| 40762 | case 2491: /* vec_extract_hi_v8di */ |
| 40763 | case 2490: /* vec_extract_hi_v8df_mask */ |
| 40764 | case 2489: /* vec_extract_hi_v8df */ |
| 40765 | case 2488: /* vec_extract_hi_v8di_maskm */ |
| 40766 | case 2487: /* vec_extract_hi_v8df_maskm */ |
| 40767 | case 2486: /* vec_extract_lo_v8di_mask */ |
| 40768 | case 2485: /* vec_extract_lo_v8di */ |
| 40769 | case 2484: /* vec_extract_lo_v8df_mask */ |
| 40770 | case 2483: /* vec_extract_lo_v8df */ |
| 40771 | case 2482: /* vec_extract_lo_v8di_maskm */ |
| 40772 | case 2481: /* vec_extract_lo_v8df_maskm */ |
| 40773 | case 2480: /* avx512f_vextracti32x4_1_mask */ |
| 40774 | case 2479: /* *avx512f_vextracti32x4_1 */ |
| 40775 | case 2478: /* avx512f_vextractf32x4_1_mask */ |
| 40776 | case 2477: /* *avx512f_vextractf32x4_1 */ |
| 40777 | case 2476: /* avx512dq_vextracti64x2_1_mask */ |
| 40778 | case 2475: /* *avx512dq_vextracti64x2_1 */ |
| 40779 | case 2474: /* avx512dq_vextractf64x2_1_mask */ |
| 40780 | case 2473: /* *avx512dq_vextractf64x2_1 */ |
| 40781 | case 2472: /* avx512f_vextracti32x4_1_maskm */ |
| 40782 | case 2471: /* avx512f_vextractf32x4_1_maskm */ |
| 40783 | case 2470: /* avx512dq_vextracti64x2_1_maskm */ |
| 40784 | case 2469: /* avx512dq_vextractf64x2_1_maskm */ |
| 40785 | case 2458: /* avx512f_vec_dupv8df_1 */ |
| 40786 | case 2457: /* avx512f_vec_dupv16sf_1 */ |
| 40787 | case 2456: /* avx2_vec_dupv8sf_1 */ |
| 40788 | case 2455: /* avx2_vec_dupv4sf */ |
| 40789 | case 2454: /* avx2_vec_dupv8sf */ |
| 40790 | case 1020: /* sse4_2_crc32di */ |
| 40791 | case 1019: /* sse4_2_crc32si */ |
| 40792 | case 1018: /* sse4_2_crc32hi */ |
| 40793 | case 1017: /* sse4_2_crc32qi */ |
| 40794 | case 801: /* *load_tp_di */ |
| 40795 | case 800: /* *load_tp_si */ |
| 40796 | case 799: /* *load_tp_x32_zext */ |
| 40797 | case 798: /* *load_tp_x32 */ |
| 40798 | case 704: /* leave_rex64 */ |
| 40799 | case 703: /* leave */ |
| 40800 | case 92: /* *movabsdi_2 */ |
| 40801 | case 91: /* *movabssi_2 */ |
| 40802 | case 90: /* *movabshi_2 */ |
| 40803 | case 89: /* *movabsqi_2 */ |
| 40804 | return 3; |
| 40805 | |
| 40806 | case 1100: /* *bnd64_stx */ |
| 40807 | case 1099: /* *bnd32_stx */ |
| 40808 | case 1096: /* *bnd64_cn */ |
| 40809 | case 1095: /* *bnd64_cu */ |
| 40810 | case 1094: /* *bnd64_cl */ |
| 40811 | case 1093: /* *bnd32_cn */ |
| 40812 | case 1092: /* *bnd32_cu */ |
| 40813 | case 1091: /* *bnd32_cl */ |
| 40814 | case 1088: /* *bnd64_mk */ |
| 40815 | case 1087: /* *bnd32_mk */ |
| 40816 | case 1060: /* *lwp_lwpinsdi3_1 */ |
| 40817 | case 1059: /* *lwp_lwpinssi3_1 */ |
| 40818 | case 1058: /* *lwp_lwpvaldi3_1 */ |
| 40819 | case 1057: /* *lwp_lwpvalsi3_1 */ |
| 40820 | case 1056: /* lwp_slwpcbdi */ |
| 40821 | case 1055: /* lwp_slwpcbsi */ |
| 40822 | case 1054: /* *lwp_llwpcbdi1 */ |
| 40823 | case 1053: /* *lwp_llwpcbsi1 */ |
| 40824 | case 974: /* *x86_movdicc_0_m1_neg */ |
| 40825 | case 973: /* *x86_movsicc_0_m1_neg */ |
| 40826 | case 972: /* *x86_movdicc_0_m1_se */ |
| 40827 | case 971: /* *x86_movsicc_0_m1_se */ |
| 40828 | case 970: /* *x86_movdicc_0_m1 */ |
| 40829 | case 969: /* *x86_movsicc_0_m1 */ |
| 40830 | case 88: /* *movabsdi_1 */ |
| 40831 | case 87: /* *movabssi_1 */ |
| 40832 | case 86: /* *movabshi_1 */ |
| 40833 | case 85: /* *movabsqi_1 */ |
| 40834 | return 1; |
| 40835 | |
| 40836 | case 4501: /* avx_vec_concatv8df */ |
| 40837 | case 4500: /* avx_vec_concatv16sf */ |
| 40838 | case 4499: /* avx_vec_concatv8di */ |
| 40839 | case 4498: /* avx_vec_concatv16si */ |
| 40840 | case 4497: /* avx_vec_concatv32hi */ |
| 40841 | case 4496: /* avx_vec_concatv64qi */ |
| 40842 | case 4495: /* avx_vec_concatv4df */ |
| 40843 | case 4494: /* avx_vec_concatv8sf */ |
| 40844 | case 4493: /* avx_vec_concatv4di */ |
| 40845 | case 4492: /* avx_vec_concatv8si */ |
| 40846 | case 4491: /* avx_vec_concatv16hi */ |
| 40847 | case 4490: /* avx_vec_concatv32qi */ |
| 40848 | case 2452: /* sse_loadlps */ |
| 40849 | case 79: /* *movoi_internal_avx */ |
| 40850 | case 78: /* *movxi_internal_avx512f */ |
| 40851 | extract_constrain_insn_cached (insn); |
| 40852 | if (!((1 << which_alternative) & 0x3)) |
| 40853 | { |
| 40854 | return 2; |
| 40855 | } |
| 40856 | else if (get_attr_memory (insn) == MEMORY_LOAD) |
| 40857 | { |
| 40858 | return 5; |
| 40859 | } |
| 40860 | else |
| 40861 | { |
| 40862 | return 3; |
| 40863 | } |
| 40864 | |
| 40865 | case 1000: /* probe_stack_di */ |
| 40866 | case 999: /* probe_stack_si */ |
| 40867 | case 732: /* tzcnt_hi */ |
| 40868 | case 730: /* *tzcnt_di_falsedep */ |
| 40869 | case 728: /* *tzcnt_si_falsedep */ |
| 40870 | case 726: /* tzcnt_di */ |
| 40871 | case 724: /* tzcnt_si */ |
| 40872 | case 719: /* *bsrhi */ |
| 40873 | case 718: /* bsr */ |
| 40874 | case 717: /* bsr_rex64 */ |
| 40875 | case 716: /* *ctzdi2_falsedep */ |
| 40876 | case 715: /* *ctzsi2_falsedep */ |
| 40877 | case 714: /* ctzdi2 */ |
| 40878 | case 713: /* ctzsi2 */ |
| 40879 | case 712: /* *bsfdi_1 */ |
| 40880 | case 711: /* *bsfsi_1 */ |
| 40881 | case 710: /* *tzcntdi_1_falsedep */ |
| 40882 | case 709: /* *tzcntsi_1_falsedep */ |
| 40883 | case 708: /* *tzcntdi_1 */ |
| 40884 | case 707: /* *tzcntsi_1 */ |
| 40885 | case 613: /* *btdi */ |
| 40886 | case 612: /* *btsi */ |
| 40887 | case 611: /* *btcq */ |
| 40888 | case 610: /* *btrq */ |
| 40889 | case 609: /* *btsq */ |
| 40890 | case 608: /* *rotrqi3_1_slp */ |
| 40891 | case 607: /* *rotlqi3_1_slp */ |
| 40892 | case 567: /* *ashrqi3_1_slp */ |
| 40893 | case 566: /* *lshrqi3_1_slp */ |
| 40894 | case 512: /* *one_cmplsi2_2_zext */ |
| 40895 | case 511: /* *one_cmpldi2_2 */ |
| 40896 | case 510: /* *one_cmplsi2_2 */ |
| 40897 | case 509: /* *one_cmplhi2_2 */ |
| 40898 | case 508: /* *one_cmplqi2_2 */ |
| 40899 | case 507: /* *one_cmplqi2_1 */ |
| 40900 | case 506: /* *one_cmplsi2_1_zext */ |
| 40901 | case 505: /* *one_cmpldi2_1 */ |
| 40902 | case 504: /* *one_cmplsi2_1 */ |
| 40903 | case 503: /* *one_cmplhi2_1 */ |
| 40904 | case 479: /* *negvdi3 */ |
| 40905 | case 478: /* *negvsi3 */ |
| 40906 | case 477: /* *negvhi3 */ |
| 40907 | case 476: /* *negvqi3 */ |
| 40908 | case 475: /* *negsi2_cmpz_zext */ |
| 40909 | case 474: /* *negdi2_cmpz */ |
| 40910 | case 473: /* *negsi2_cmpz */ |
| 40911 | case 472: /* *neghi2_cmpz */ |
| 40912 | case 471: /* *negqi2_cmpz */ |
| 40913 | case 470: /* *negsi2_1_zext */ |
| 40914 | case 469: /* *negdi2_1 */ |
| 40915 | case 468: /* *negsi2_1 */ |
| 40916 | case 467: /* *neghi2_1 */ |
| 40917 | case 466: /* *negqi2_1 */ |
| 40918 | case 450: /* *xorqi_2_slp */ |
| 40919 | case 449: /* *iorqi_2_slp */ |
| 40920 | case 436: /* *xorqi_1_slp */ |
| 40921 | case 435: /* *iorqi_1_slp */ |
| 40922 | case 410: /* *andqi_2_slp */ |
| 40923 | case 403: /* *andqi_1_slp */ |
| 40924 | case 276: /* *subqi_1_slp */ |
| 40925 | case 138: /* zero_extendqihi2_and */ |
| 40926 | case 135: /* zero_extendhisi2_and */ |
| 40927 | case 134: /* zero_extendqisi2_and */ |
| 40928 | case 100: /* *movstricthi_xor */ |
| 40929 | case 99: /* *movstrictqi_xor */ |
| 40930 | case 77: /* *movdi_or */ |
| 40931 | case 76: /* *movsi_or */ |
| 40932 | case 75: /* *movdi_xor */ |
| 40933 | case 74: /* *movsi_xor */ |
| 40934 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) |
| 40935 | { |
| 40936 | return 1; |
| 40937 | } |
| 40938 | else if (cached_memory == MEMORY_BOTH) |
| 40939 | { |
| 40940 | return 4; |
| 40941 | } |
| 40942 | else if (cached_memory == MEMORY_STORE) |
| 40943 | { |
| 40944 | return 1; |
| 40945 | } |
| 40946 | else |
| 40947 | { |
| 40948 | return 0; |
| 40949 | } |
| 40950 | |
| 40951 | case 1098: /* *bnd64_ldx */ |
| 40952 | case 1097: /* *bnd32_ldx */ |
| 40953 | case 927: /* fistsi2_ceil_with_temp */ |
| 40954 | case 926: /* fistsi2_floor_with_temp */ |
| 40955 | case 925: /* fisthi2_ceil_with_temp */ |
| 40956 | case 924: /* fisthi2_floor_with_temp */ |
| 40957 | case 923: /* fistsi2_ceil */ |
| 40958 | case 922: /* fistsi2_floor */ |
| 40959 | case 921: /* fisthi2_ceil */ |
| 40960 | case 920: /* fisthi2_floor */ |
| 40961 | case 919: /* fistdi2_ceil_with_temp */ |
| 40962 | case 918: /* fistdi2_floor_with_temp */ |
| 40963 | case 917: /* fistdi2_ceil */ |
| 40964 | case 916: /* fistdi2_floor */ |
| 40965 | case 915: /* *fistdi2_ceil_1 */ |
| 40966 | case 914: /* *fistdi2_floor_1 */ |
| 40967 | case 913: /* *fistsi2_ceil_1 */ |
| 40968 | case 912: /* *fistsi2_floor_1 */ |
| 40969 | case 911: /* *fisthi2_ceil_1 */ |
| 40970 | case 910: /* *fisthi2_floor_1 */ |
| 40971 | case 805: /* *add_tp_di */ |
| 40972 | case 804: /* *add_tp_si */ |
| 40973 | case 803: /* *add_tp_x32_zext */ |
| 40974 | case 802: /* *add_tp_x32 */ |
| 40975 | case 191: /* fix_truncsi_i387_with_temp */ |
| 40976 | case 190: /* fix_trunchi_i387_with_temp */ |
| 40977 | case 189: /* fix_truncsi_i387 */ |
| 40978 | case 188: /* fix_trunchi_i387 */ |
| 40979 | case 187: /* fix_truncdi_i387_with_temp */ |
| 40980 | case 186: /* fix_truncdi_i387 */ |
| 40981 | case 185: /* *fix_truncdi_i387_1 */ |
| 40982 | case 184: /* *fix_truncsi_i387_1 */ |
| 40983 | case 183: /* *fix_trunchi_i387_1 */ |
| 40984 | case 182: /* fix_truncdi_i387_fisttp_with_temp */ |
| 40985 | case 181: /* fix_truncsi_i387_fisttp_with_temp */ |
| 40986 | case 180: /* fix_trunchi_i387_fisttp_with_temp */ |
| 40987 | case 179: /* fix_truncdi_i387_fisttp */ |
| 40988 | case 178: /* fix_truncsi_i387_fisttp */ |
| 40989 | case 177: /* fix_trunchi_i387_fisttp */ |
| 40990 | case 176: /* fix_truncdi_fisttp_i387_1 */ |
| 40991 | case 175: /* fix_truncsi_fisttp_i387_1 */ |
| 40992 | case 174: /* fix_trunchi_fisttp_i387_1 */ |
| 40993 | case 73: /* *popfldi1 */ |
| 40994 | case 72: /* *popflsi1 */ |
| 40995 | case 69: /* *popdi1_epilogue */ |
| 40996 | case 68: /* *popsi1_epilogue */ |
| 40997 | case 67: /* *popdi1 */ |
| 40998 | case 66: /* *popsi1 */ |
| 40999 | return 4; |
| 41000 | |
| 41001 | case 4899: /* vpmultishiftqbv32qi_mask */ |
| 41002 | case 4898: /* vpmultishiftqbv32qi */ |
| 41003 | case 4897: /* vpmultishiftqbv16qi_mask */ |
| 41004 | case 4896: /* vpmultishiftqbv16qi */ |
| 41005 | case 4895: /* vpmultishiftqbv64qi_mask */ |
| 41006 | case 4894: /* vpmultishiftqbv64qi */ |
| 41007 | case 4416: /* vec_set_hi_v32qi */ |
| 41008 | case 4415: /* vec_set_lo_v32qi */ |
| 41009 | case 4414: /* vec_set_hi_v16hi */ |
| 41010 | case 4413: /* vec_set_lo_v16hi */ |
| 41011 | case 4412: /* vec_set_hi_v8sf_mask */ |
| 41012 | case 4411: /* vec_set_hi_v8sf */ |
| 41013 | case 4410: /* vec_set_hi_v8si_mask */ |
| 41014 | case 4409: /* vec_set_hi_v8si */ |
| 41015 | case 4408: /* vec_set_lo_v8sf_mask */ |
| 41016 | case 4407: /* vec_set_lo_v8sf */ |
| 41017 | case 4406: /* vec_set_lo_v8si_mask */ |
| 41018 | case 4405: /* vec_set_lo_v8si */ |
| 41019 | case 4404: /* vec_set_hi_v4df_mask */ |
| 41020 | case 4403: /* vec_set_hi_v4df */ |
| 41021 | case 4402: /* vec_set_hi_v4di_mask */ |
| 41022 | case 4401: /* vec_set_hi_v4di */ |
| 41023 | case 4400: /* vec_set_lo_v4df_mask */ |
| 41024 | case 4399: /* vec_set_lo_v4df */ |
| 41025 | case 4398: /* vec_set_lo_v4di_mask */ |
| 41026 | case 4397: /* vec_set_lo_v4di */ |
| 41027 | case 4390: /* *avx_vperm2f128v4df_nozero */ |
| 41028 | case 4389: /* *avx_vperm2f128v8sf_nozero */ |
| 41029 | case 4388: /* *avx_vperm2f128v8si_nozero */ |
| 41030 | case 4387: /* *avx_vperm2f128v4df_full */ |
| 41031 | case 4386: /* *avx_vperm2f128v8sf_full */ |
| 41032 | case 4385: /* *avx_vperm2f128v8si_full */ |
| 41033 | case 4384: /* avx512bw_vpermt2varv32hi3_mask */ |
| 41034 | case 4383: /* avx512vl_vpermt2varv16hi3_mask */ |
| 41035 | case 4382: /* avx512vl_vpermt2varv8hi3_mask */ |
| 41036 | case 4381: /* avx512vl_vpermt2varv32qi3_mask */ |
| 41037 | case 4380: /* avx512vl_vpermt2varv16qi3_mask */ |
| 41038 | case 4379: /* avx512bw_vpermt2varv64qi3_mask */ |
| 41039 | case 4378: /* avx512vl_vpermt2varv2df3_mask */ |
| 41040 | case 4377: /* avx512vl_vpermt2varv2di3_mask */ |
| 41041 | case 4376: /* avx512vl_vpermt2varv4sf3_mask */ |
| 41042 | case 4375: /* avx512vl_vpermt2varv4si3_mask */ |
| 41043 | case 4374: /* avx512vl_vpermt2varv4df3_mask */ |
| 41044 | case 4373: /* avx512vl_vpermt2varv4di3_mask */ |
| 41045 | case 4372: /* avx512vl_vpermt2varv8sf3_mask */ |
| 41046 | case 4371: /* avx512vl_vpermt2varv8si3_mask */ |
| 41047 | case 4370: /* avx512f_vpermt2varv8df3_mask */ |
| 41048 | case 4369: /* avx512f_vpermt2varv8di3_mask */ |
| 41049 | case 4368: /* avx512f_vpermt2varv16sf3_mask */ |
| 41050 | case 4367: /* avx512f_vpermt2varv16si3_mask */ |
| 41051 | case 4366: /* avx512bw_vpermt2varv32hi3_maskz_1 */ |
| 41052 | case 4365: /* avx512bw_vpermt2varv32hi3 */ |
| 41053 | case 4364: /* avx512vl_vpermt2varv16hi3_maskz_1 */ |
| 41054 | case 4363: /* avx512vl_vpermt2varv16hi3 */ |
| 41055 | case 4362: /* avx512vl_vpermt2varv8hi3_maskz_1 */ |
| 41056 | case 4361: /* avx512vl_vpermt2varv8hi3 */ |
| 41057 | case 4360: /* avx512vl_vpermt2varv32qi3_maskz_1 */ |
| 41058 | case 4359: /* avx512vl_vpermt2varv32qi3 */ |
| 41059 | case 4358: /* avx512vl_vpermt2varv16qi3_maskz_1 */ |
| 41060 | case 4357: /* avx512vl_vpermt2varv16qi3 */ |
| 41061 | case 4356: /* avx512bw_vpermt2varv64qi3_maskz_1 */ |
| 41062 | case 4355: /* avx512bw_vpermt2varv64qi3 */ |
| 41063 | case 4354: /* avx512vl_vpermt2varv2df3_maskz_1 */ |
| 41064 | case 4353: /* avx512vl_vpermt2varv2df3 */ |
| 41065 | case 4352: /* avx512vl_vpermt2varv2di3_maskz_1 */ |
| 41066 | case 4351: /* avx512vl_vpermt2varv2di3 */ |
| 41067 | case 4350: /* avx512vl_vpermt2varv4sf3_maskz_1 */ |
| 41068 | case 4349: /* avx512vl_vpermt2varv4sf3 */ |
| 41069 | case 4348: /* avx512vl_vpermt2varv4si3_maskz_1 */ |
| 41070 | case 4347: /* avx512vl_vpermt2varv4si3 */ |
| 41071 | case 4346: /* avx512vl_vpermt2varv4df3_maskz_1 */ |
| 41072 | case 4345: /* avx512vl_vpermt2varv4df3 */ |
| 41073 | case 4344: /* avx512vl_vpermt2varv4di3_maskz_1 */ |
| 41074 | case 4343: /* avx512vl_vpermt2varv4di3 */ |
| 41075 | case 4342: /* avx512vl_vpermt2varv8sf3_maskz_1 */ |
| 41076 | case 4341: /* avx512vl_vpermt2varv8sf3 */ |
| 41077 | case 4340: /* avx512vl_vpermt2varv8si3_maskz_1 */ |
| 41078 | case 4339: /* avx512vl_vpermt2varv8si3 */ |
| 41079 | case 4338: /* avx512f_vpermt2varv8df3_maskz_1 */ |
| 41080 | case 4337: /* avx512f_vpermt2varv8df3 */ |
| 41081 | case 4336: /* avx512f_vpermt2varv8di3_maskz_1 */ |
| 41082 | case 4335: /* avx512f_vpermt2varv8di3 */ |
| 41083 | case 4334: /* avx512f_vpermt2varv16sf3_maskz_1 */ |
| 41084 | case 4333: /* avx512f_vpermt2varv16sf3 */ |
| 41085 | case 4332: /* avx512f_vpermt2varv16si3_maskz_1 */ |
| 41086 | case 4331: /* avx512f_vpermt2varv16si3 */ |
| 41087 | case 4330: /* avx512bw_vpermi2varv32hi3_mask */ |
| 41088 | case 4329: /* avx512vl_vpermi2varv16hi3_mask */ |
| 41089 | case 4328: /* avx512vl_vpermi2varv8hi3_mask */ |
| 41090 | case 4327: /* avx512vl_vpermi2varv32qi3_mask */ |
| 41091 | case 4326: /* avx512vl_vpermi2varv16qi3_mask */ |
| 41092 | case 4325: /* avx512bw_vpermi2varv64qi3_mask */ |
| 41093 | case 4324: /* avx512vl_vpermi2varv2df3_mask */ |
| 41094 | case 4323: /* avx512vl_vpermi2varv2di3_mask */ |
| 41095 | case 4322: /* avx512vl_vpermi2varv4sf3_mask */ |
| 41096 | case 4321: /* avx512vl_vpermi2varv4si3_mask */ |
| 41097 | case 4320: /* avx512vl_vpermi2varv4df3_mask */ |
| 41098 | case 4319: /* avx512vl_vpermi2varv4di3_mask */ |
| 41099 | case 4318: /* avx512vl_vpermi2varv8sf3_mask */ |
| 41100 | case 4317: /* avx512vl_vpermi2varv8si3_mask */ |
| 41101 | case 4316: /* avx512f_vpermi2varv8df3_mask */ |
| 41102 | case 4315: /* avx512f_vpermi2varv8di3_mask */ |
| 41103 | case 4314: /* avx512f_vpermi2varv16sf3_mask */ |
| 41104 | case 4313: /* avx512f_vpermi2varv16si3_mask */ |
| 41105 | case 4312: /* avx512bw_vpermi2varv32hi3_maskz_1 */ |
| 41106 | case 4311: /* avx512bw_vpermi2varv32hi3 */ |
| 41107 | case 4310: /* avx512vl_vpermi2varv16hi3_maskz_1 */ |
| 41108 | case 4309: /* avx512vl_vpermi2varv16hi3 */ |
| 41109 | case 4308: /* avx512vl_vpermi2varv8hi3_maskz_1 */ |
| 41110 | case 4307: /* avx512vl_vpermi2varv8hi3 */ |
| 41111 | case 4306: /* avx512vl_vpermi2varv32qi3_maskz_1 */ |
| 41112 | case 4305: /* avx512vl_vpermi2varv32qi3 */ |
| 41113 | case 4304: /* avx512vl_vpermi2varv16qi3_maskz_1 */ |
| 41114 | case 4303: /* avx512vl_vpermi2varv16qi3 */ |
| 41115 | case 4302: /* avx512bw_vpermi2varv64qi3_maskz_1 */ |
| 41116 | case 4301: /* avx512bw_vpermi2varv64qi3 */ |
| 41117 | case 4300: /* avx512vl_vpermi2varv2df3_maskz_1 */ |
| 41118 | case 4299: /* avx512vl_vpermi2varv2df3 */ |
| 41119 | case 4298: /* avx512vl_vpermi2varv2di3_maskz_1 */ |
| 41120 | case 4297: /* avx512vl_vpermi2varv2di3 */ |
| 41121 | case 4296: /* avx512vl_vpermi2varv4sf3_maskz_1 */ |
| 41122 | case 4295: /* avx512vl_vpermi2varv4sf3 */ |
| 41123 | case 4294: /* avx512vl_vpermi2varv4si3_maskz_1 */ |
| 41124 | case 4293: /* avx512vl_vpermi2varv4si3 */ |
| 41125 | case 4292: /* avx512vl_vpermi2varv4df3_maskz_1 */ |
| 41126 | case 4291: /* avx512vl_vpermi2varv4df3 */ |
| 41127 | case 4290: /* avx512vl_vpermi2varv4di3_maskz_1 */ |
| 41128 | case 4289: /* avx512vl_vpermi2varv4di3 */ |
| 41129 | case 4288: /* avx512vl_vpermi2varv8sf3_maskz_1 */ |
| 41130 | case 4287: /* avx512vl_vpermi2varv8sf3 */ |
| 41131 | case 4286: /* avx512vl_vpermi2varv8si3_maskz_1 */ |
| 41132 | case 4285: /* avx512vl_vpermi2varv8si3 */ |
| 41133 | case 4284: /* avx512f_vpermi2varv8df3_maskz_1 */ |
| 41134 | case 4283: /* avx512f_vpermi2varv8df3 */ |
| 41135 | case 4282: /* avx512f_vpermi2varv8di3_maskz_1 */ |
| 41136 | case 4281: /* avx512f_vpermi2varv8di3 */ |
| 41137 | case 4280: /* avx512f_vpermi2varv16sf3_maskz_1 */ |
| 41138 | case 4279: /* avx512f_vpermi2varv16sf3 */ |
| 41139 | case 4278: /* avx512f_vpermi2varv16si3_maskz_1 */ |
| 41140 | case 4277: /* avx512f_vpermi2varv16si3 */ |
| 41141 | case 4276: /* avx_vpermilvarv2df3_mask */ |
| 41142 | case 4275: /* avx_vpermilvarv2df3 */ |
| 41143 | case 4274: /* avx_vpermilvarv4df3_mask */ |
| 41144 | case 4273: /* avx_vpermilvarv4df3 */ |
| 41145 | case 4272: /* avx512f_vpermilvarv8df3_mask */ |
| 41146 | case 4271: /* avx512f_vpermilvarv8df3 */ |
| 41147 | case 4270: /* avx_vpermilvarv4sf3_mask */ |
| 41148 | case 4269: /* avx_vpermilvarv4sf3 */ |
| 41149 | case 4268: /* avx_vpermilvarv8sf3_mask */ |
| 41150 | case 4267: /* avx_vpermilvarv8sf3 */ |
| 41151 | case 4266: /* avx512f_vpermilvarv16sf3_mask */ |
| 41152 | case 4265: /* avx512f_vpermilvarv16sf3 */ |
| 41153 | case 4264: /* *avx_vpermilpv2df_mask */ |
| 41154 | case 4263: /* *avx_vpermilpv2df */ |
| 41155 | case 4262: /* *avx_vpermilpv4df_mask */ |
| 41156 | case 4261: /* *avx_vpermilpv4df */ |
| 41157 | case 4260: /* *avx512f_vpermilpv8df_mask */ |
| 41158 | case 4259: /* *avx512f_vpermilpv8df */ |
| 41159 | case 4258: /* *avx_vpermilpv4sf_mask */ |
| 41160 | case 4257: /* *avx_vpermilpv4sf */ |
| 41161 | case 4256: /* *avx_vpermilpv8sf_mask */ |
| 41162 | case 4255: /* *avx_vpermilpv8sf */ |
| 41163 | case 4254: /* *avx512f_vpermilpv16sf_mask */ |
| 41164 | case 4253: /* *avx512f_vpermilpv16sf */ |
| 41165 | case 4109: /* avx2_permv2ti */ |
| 41166 | case 4108: /* avx512f_permv8di_1_mask */ |
| 41167 | case 4107: /* avx512f_permv8di_1 */ |
| 41168 | case 4106: /* avx512f_permv8df_1_mask */ |
| 41169 | case 4105: /* avx512f_permv8df_1 */ |
| 41170 | case 4104: /* avx2_permv4df_1_mask */ |
| 41171 | case 4103: /* avx2_permv4df_1 */ |
| 41172 | case 4102: /* avx2_permv4di_1_mask */ |
| 41173 | case 4101: /* avx2_permv4di_1 */ |
| 41174 | case 4100: /* avx512bw_permvarv32hi_mask */ |
| 41175 | case 4099: /* avx512bw_permvarv32hi */ |
| 41176 | case 4098: /* avx512vl_permvarv16hi_mask */ |
| 41177 | case 4097: /* avx512vl_permvarv16hi */ |
| 41178 | case 4096: /* avx512vl_permvarv8hi_mask */ |
| 41179 | case 4095: /* avx512vl_permvarv8hi */ |
| 41180 | case 4094: /* avx512vl_permvarv32qi_mask */ |
| 41181 | case 4093: /* avx512vl_permvarv32qi */ |
| 41182 | case 4092: /* avx512vl_permvarv16qi_mask */ |
| 41183 | case 4091: /* avx512vl_permvarv16qi */ |
| 41184 | case 4090: /* avx512bw_permvarv64qi_mask */ |
| 41185 | case 4089: /* avx512bw_permvarv64qi */ |
| 41186 | case 4088: /* avx2_permvarv4df_mask */ |
| 41187 | case 4087: /* avx2_permvarv4df */ |
| 41188 | case 4086: /* avx2_permvarv4di_mask */ |
| 41189 | case 4085: /* avx2_permvarv4di */ |
| 41190 | case 4084: /* avx512f_permvarv8df_mask */ |
| 41191 | case 4083: /* avx512f_permvarv8df */ |
| 41192 | case 4082: /* avx512f_permvarv8di_mask */ |
| 41193 | case 4081: /* avx512f_permvarv8di */ |
| 41194 | case 4080: /* avx512f_permvarv16sf_mask */ |
| 41195 | case 4079: /* avx512f_permvarv16sf */ |
| 41196 | case 4078: /* avx512f_permvarv16si_mask */ |
| 41197 | case 4077: /* avx512f_permvarv16si */ |
| 41198 | case 4076: /* avx2_permvarv8sf_mask */ |
| 41199 | case 4075: /* avx2_permvarv8sf */ |
| 41200 | case 4074: /* avx2_permvarv8si_mask */ |
| 41201 | case 4073: /* avx2_permvarv8si */ |
| 41202 | case 3794: /* sse4_1_packusdw_mask */ |
| 41203 | case 3793: /* sse4_1_packusdw */ |
| 41204 | case 3792: /* avx2_packusdw_mask */ |
| 41205 | case 3791: /* avx2_packusdw */ |
| 41206 | case 3790: /* avx512bw_packusdw_mask */ |
| 41207 | case 3789: /* avx512bw_packusdw */ |
| 41208 | case 3619: /* sse2_pshufhw_1_mask */ |
| 41209 | case 3618: /* sse2_pshufhw_1 */ |
| 41210 | case 3617: /* avx2_pshufhw_1_mask */ |
| 41211 | case 3616: /* avx2_pshufhw_1 */ |
| 41212 | case 3615: /* avx512bw_pshufhwv32hi_mask */ |
| 41213 | case 3614: /* *avx512bw_pshufhwv32hi */ |
| 41214 | case 3613: /* sse2_pshuflw_1_mask */ |
| 41215 | case 3612: /* sse2_pshuflw_1 */ |
| 41216 | case 3611: /* avx2_pshuflw_1_mask */ |
| 41217 | case 3610: /* avx2_pshuflw_1 */ |
| 41218 | case 3609: /* avx512bw_pshuflwv32hi_mask */ |
| 41219 | case 3608: /* *avx512bw_pshuflwv32hi */ |
| 41220 | case 3601: /* avx512f_shuf_i32x4_1_mask */ |
| 41221 | case 3600: /* avx512f_shuf_i32x4_1 */ |
| 41222 | case 3599: /* avx512f_shuf_f32x4_1_mask */ |
| 41223 | case 3598: /* avx512f_shuf_f32x4_1 */ |
| 41224 | case 3597: /* avx512vl_shuf_f32x4_1_mask */ |
| 41225 | case 3596: /* avx512vl_shuf_f32x4_1 */ |
| 41226 | case 3595: /* avx512vl_shuf_i32x4_1_mask */ |
| 41227 | case 3594: /* avx512vl_shuf_i32x4_1 */ |
| 41228 | case 3593: /* avx512f_shuf_i64x2_1_mask */ |
| 41229 | case 3592: /* avx512f_shuf_i64x2_1 */ |
| 41230 | case 3591: /* avx512f_shuf_f64x2_1_mask */ |
| 41231 | case 3590: /* avx512f_shuf_f64x2_1 */ |
| 41232 | case 3589: /* avx512dq_shuf_f64x2_1_mask */ |
| 41233 | case 3588: /* *avx512dq_shuf_f64x2_1 */ |
| 41234 | case 3587: /* avx512dq_shuf_i64x2_1_mask */ |
| 41235 | case 3586: /* *avx512dq_shuf_i64x2_1 */ |
| 41236 | case 3585: /* vec_set_hi_v8di_mask */ |
| 41237 | case 3584: /* vec_set_hi_v8di */ |
| 41238 | case 3583: /* vec_set_hi_v8df_mask */ |
| 41239 | case 3582: /* vec_set_hi_v8df */ |
| 41240 | case 3581: /* vec_set_lo_v8di_mask */ |
| 41241 | case 3580: /* vec_set_lo_v8di */ |
| 41242 | case 3579: /* vec_set_lo_v8df_mask */ |
| 41243 | case 3578: /* vec_set_lo_v8df */ |
| 41244 | case 3577: /* vec_set_hi_v16si_mask */ |
| 41245 | case 3576: /* vec_set_hi_v16si */ |
| 41246 | case 3575: /* vec_set_hi_v16sf_mask */ |
| 41247 | case 3574: /* vec_set_hi_v16sf */ |
| 41248 | case 3573: /* vec_set_lo_v16si_mask */ |
| 41249 | case 3572: /* vec_set_lo_v16si */ |
| 41250 | case 3571: /* vec_set_lo_v16sf_mask */ |
| 41251 | case 3570: /* vec_set_lo_v16sf */ |
| 41252 | case 3569: /* avx512f_vinserti32x4_1_mask */ |
| 41253 | case 3568: /* *avx512f_vinserti32x4_1 */ |
| 41254 | case 3567: /* avx512f_vinsertf32x4_1_mask */ |
| 41255 | case 3566: /* *avx512f_vinsertf32x4_1 */ |
| 41256 | case 3565: /* avx512dq_vinserti64x2_1_mask */ |
| 41257 | case 3564: /* *avx512dq_vinserti64x2_1 */ |
| 41258 | case 3563: /* avx512dq_vinsertf64x2_1_mask */ |
| 41259 | case 3562: /* *avx512dq_vinsertf64x2_1 */ |
| 41260 | case 3561: /* sse4_1_pinsrq */ |
| 41261 | case 3560: /* sse4_1_pinsrd */ |
| 41262 | case 3559: /* sse2_pinsrw */ |
| 41263 | case 3558: /* sse4_1_pinsrb */ |
| 41264 | case 3557: /* vec_interleave_lowv4si_mask */ |
| 41265 | case 3556: /* vec_interleave_lowv4si */ |
| 41266 | case 3555: /* avx512f_interleave_lowv16si_mask */ |
| 41267 | case 3554: /* *avx512f_interleave_lowv16si */ |
| 41268 | case 3553: /* avx2_interleave_lowv8si_mask */ |
| 41269 | case 3552: /* avx2_interleave_lowv8si */ |
| 41270 | case 3551: /* vec_interleave_highv4si_mask */ |
| 41271 | case 3550: /* vec_interleave_highv4si */ |
| 41272 | case 3549: /* avx512f_interleave_highv16si_mask */ |
| 41273 | case 3548: /* *avx512f_interleave_highv16si */ |
| 41274 | case 3547: /* avx2_interleave_highv8si_mask */ |
| 41275 | case 3546: /* avx2_interleave_highv8si */ |
| 41276 | case 3545: /* vec_interleave_lowv8hi_mask */ |
| 41277 | case 3544: /* vec_interleave_lowv8hi */ |
| 41278 | case 3543: /* avx2_interleave_lowv16hi_mask */ |
| 41279 | case 3542: /* avx2_interleave_lowv16hi */ |
| 41280 | case 3541: /* avx512bw_interleave_lowv32hi_mask */ |
| 41281 | case 3540: /* *avx512bw_interleave_lowv32hi */ |
| 41282 | case 3539: /* vec_interleave_highv8hi_mask */ |
| 41283 | case 3538: /* vec_interleave_highv8hi */ |
| 41284 | case 3537: /* avx2_interleave_highv16hi_mask */ |
| 41285 | case 3536: /* avx2_interleave_highv16hi */ |
| 41286 | case 3535: /* avx512bw_interleave_highv32hi_mask */ |
| 41287 | case 3534: /* avx512bw_interleave_highv32hi */ |
| 41288 | case 3533: /* vec_interleave_lowv16qi_mask */ |
| 41289 | case 3532: /* vec_interleave_lowv16qi */ |
| 41290 | case 3531: /* avx2_interleave_lowv32qi_mask */ |
| 41291 | case 3530: /* avx2_interleave_lowv32qi */ |
| 41292 | case 3529: /* avx512bw_interleave_lowv64qi_mask */ |
| 41293 | case 3528: /* avx512bw_interleave_lowv64qi */ |
| 41294 | case 3527: /* vec_interleave_highv16qi_mask */ |
| 41295 | case 3526: /* vec_interleave_highv16qi */ |
| 41296 | case 3525: /* avx2_interleave_highv32qi_mask */ |
| 41297 | case 3524: /* avx2_interleave_highv32qi */ |
| 41298 | case 3523: /* avx512bw_interleave_highv64qi_mask */ |
| 41299 | case 3522: /* avx512bw_interleave_highv64qi */ |
| 41300 | case 3521: /* sse2_packuswb_mask */ |
| 41301 | case 3520: /* sse2_packuswb */ |
| 41302 | case 3519: /* avx2_packuswb_mask */ |
| 41303 | case 3518: /* avx2_packuswb */ |
| 41304 | case 3517: /* avx512bw_packuswb_mask */ |
| 41305 | case 3516: /* avx512bw_packuswb */ |
| 41306 | case 3515: /* sse2_packssdw_mask */ |
| 41307 | case 3514: /* sse2_packssdw */ |
| 41308 | case 3513: /* avx2_packssdw_mask */ |
| 41309 | case 3512: /* avx2_packssdw */ |
| 41310 | case 3511: /* avx512bw_packssdw_mask */ |
| 41311 | case 3510: /* avx512bw_packssdw */ |
| 41312 | case 3509: /* sse2_packsswb_mask */ |
| 41313 | case 3508: /* sse2_packsswb */ |
| 41314 | case 3507: /* avx2_packsswb_mask */ |
| 41315 | case 3506: /* avx2_packsswb */ |
| 41316 | case 3505: /* avx512bw_packsswb_mask */ |
| 41317 | case 3504: /* avx512bw_packsswb */ |
| 41318 | case 3455: /* *xorv8hi3 */ |
| 41319 | case 3454: /* *iorv8hi3 */ |
| 41320 | case 3453: /* *andv8hi3 */ |
| 41321 | case 3452: /* *xorv16hi3 */ |
| 41322 | case 3451: /* *iorv16hi3 */ |
| 41323 | case 3450: /* *andv16hi3 */ |
| 41324 | case 3449: /* *xorv32hi3 */ |
| 41325 | case 3448: /* *iorv32hi3 */ |
| 41326 | case 3447: /* *andv32hi3 */ |
| 41327 | case 3446: /* *xorv16qi3 */ |
| 41328 | case 3445: /* *iorv16qi3 */ |
| 41329 | case 3444: /* *andv16qi3 */ |
| 41330 | case 3443: /* *xorv32qi3 */ |
| 41331 | case 3442: /* *iorv32qi3 */ |
| 41332 | case 3441: /* *andv32qi3 */ |
| 41333 | case 3440: /* *xorv64qi3 */ |
| 41334 | case 3439: /* *iorv64qi3 */ |
| 41335 | case 3438: /* *andv64qi3 */ |
| 41336 | case 3437: /* xorv2di3_mask */ |
| 41337 | case 3436: /* *xorv2di3 */ |
| 41338 | case 3435: /* iorv2di3_mask */ |
| 41339 | case 3434: /* *iorv2di3 */ |
| 41340 | case 3433: /* andv2di3_mask */ |
| 41341 | case 3432: /* *andv2di3 */ |
| 41342 | case 3431: /* xorv4di3_mask */ |
| 41343 | case 3430: /* *xorv4di3 */ |
| 41344 | case 3429: /* iorv4di3_mask */ |
| 41345 | case 3428: /* *iorv4di3 */ |
| 41346 | case 3427: /* andv4di3_mask */ |
| 41347 | case 3426: /* *andv4di3 */ |
| 41348 | case 3425: /* xorv8di3_mask */ |
| 41349 | case 3424: /* *xorv8di3 */ |
| 41350 | case 3423: /* iorv8di3_mask */ |
| 41351 | case 3422: /* *iorv8di3 */ |
| 41352 | case 3421: /* andv8di3_mask */ |
| 41353 | case 3420: /* *andv8di3 */ |
| 41354 | case 3419: /* xorv4si3_mask */ |
| 41355 | case 3418: /* *xorv4si3 */ |
| 41356 | case 3417: /* iorv4si3_mask */ |
| 41357 | case 3416: /* *iorv4si3 */ |
| 41358 | case 3415: /* andv4si3_mask */ |
| 41359 | case 3414: /* *andv4si3 */ |
| 41360 | case 3413: /* xorv8si3_mask */ |
| 41361 | case 3412: /* *xorv8si3 */ |
| 41362 | case 3411: /* iorv8si3_mask */ |
| 41363 | case 3410: /* *iorv8si3 */ |
| 41364 | case 3409: /* andv8si3_mask */ |
| 41365 | case 3408: /* *andv8si3 */ |
| 41366 | case 3407: /* xorv16si3_mask */ |
| 41367 | case 3406: /* *xorv16si3 */ |
| 41368 | case 3405: /* iorv16si3_mask */ |
| 41369 | case 3404: /* *iorv16si3 */ |
| 41370 | case 3403: /* andv16si3_mask */ |
| 41371 | case 3402: /* *andv16si3 */ |
| 41372 | case 3401: /* *andnotv2di3_mask */ |
| 41373 | case 3400: /* *andnotv4di3_mask */ |
| 41374 | case 3399: /* *andnotv8di3_mask */ |
| 41375 | case 3398: /* *andnotv4si3_mask */ |
| 41376 | case 3397: /* *andnotv8si3_mask */ |
| 41377 | case 3396: /* *andnotv16si3_mask */ |
| 41378 | case 3395: /* *andnotv2di3 */ |
| 41379 | case 3394: /* *andnotv4di3 */ |
| 41380 | case 3393: /* *andnotv4si3 */ |
| 41381 | case 3392: /* *andnotv8si3 */ |
| 41382 | case 3391: /* *andnotv8hi3 */ |
| 41383 | case 3390: /* *andnotv16hi3 */ |
| 41384 | case 3389: /* *andnotv32hi3 */ |
| 41385 | case 3388: /* *andnotv16qi3 */ |
| 41386 | case 3387: /* *andnotv32qi3 */ |
| 41387 | case 3386: /* *andnotv64qi3 */ |
| 41388 | case 3385: /* *andnotv8di3 */ |
| 41389 | case 3384: /* *andnotv16si3 */ |
| 41390 | case 3378: /* avx512vl_gtv16hi3_mask */ |
| 41391 | case 3377: /* avx512vl_gtv16hi3 */ |
| 41392 | case 3376: /* avx512bw_gtv32hi3_mask */ |
| 41393 | case 3375: /* avx512bw_gtv32hi3 */ |
| 41394 | case 3374: /* avx512vl_gtv32qi3_mask */ |
| 41395 | case 3373: /* avx512vl_gtv32qi3 */ |
| 41396 | case 3370: /* avx512bw_gtv64qi3_mask */ |
| 41397 | case 3369: /* avx512bw_gtv64qi3 */ |
| 41398 | case 3366: /* avx512vl_gtv4di3_mask */ |
| 41399 | case 3365: /* avx512vl_gtv4di3 */ |
| 41400 | case 3364: /* avx512f_gtv8di3_mask */ |
| 41401 | case 3363: /* avx512f_gtv8di3 */ |
| 41402 | case 3360: /* avx512vl_gtv8si3_mask */ |
| 41403 | case 3359: /* avx512vl_gtv8si3 */ |
| 41404 | case 3358: /* avx512f_gtv16si3_mask */ |
| 41405 | case 3357: /* avx512f_gtv16si3 */ |
| 41406 | case 3356: /* avx2_gtv4di3 */ |
| 41407 | case 3355: /* avx2_gtv8si3 */ |
| 41408 | case 3354: /* avx2_gtv16hi3 */ |
| 41409 | case 3353: /* avx2_gtv32qi3 */ |
| 41410 | case 3345: /* avx512vl_eqv4di3_mask_1 */ |
| 41411 | case 3344: /* avx512vl_eqv4di3_1 */ |
| 41412 | case 3343: /* avx512f_eqv8di3_mask_1 */ |
| 41413 | case 3342: /* avx512f_eqv8di3_1 */ |
| 41414 | case 3339: /* avx512vl_eqv8si3_mask_1 */ |
| 41415 | case 3338: /* avx512vl_eqv8si3_1 */ |
| 41416 | case 3337: /* avx512f_eqv16si3_mask_1 */ |
| 41417 | case 3336: /* avx512f_eqv16si3_1 */ |
| 41418 | case 3333: /* avx512vl_eqv16hi3_mask_1 */ |
| 41419 | case 3332: /* avx512vl_eqv16hi3_1 */ |
| 41420 | case 3331: /* avx512bw_eqv32hi3_mask_1 */ |
| 41421 | case 3330: /* avx512bw_eqv32hi3_1 */ |
| 41422 | case 3329: /* avx512vl_eqv32qi3_mask_1 */ |
| 41423 | case 3328: /* avx512vl_eqv32qi3_1 */ |
| 41424 | case 3325: /* avx512bw_eqv64qi3_mask_1 */ |
| 41425 | case 3324: /* avx512bw_eqv64qi3_1 */ |
| 41426 | case 3323: /* *avx2_eqv4di3 */ |
| 41427 | case 3322: /* *avx2_eqv8si3 */ |
| 41428 | case 3321: /* *avx2_eqv16hi3 */ |
| 41429 | case 3320: /* *avx2_eqv32qi3 */ |
| 41430 | case 2725: /* sse2_shufpd_v2df */ |
| 41431 | case 2724: /* sse2_shufpd_v2di */ |
| 41432 | case 2723: /* vec_interleave_lowv2di_mask */ |
| 41433 | case 2722: /* vec_interleave_lowv2di */ |
| 41434 | case 2721: /* avx512f_interleave_lowv8di_mask */ |
| 41435 | case 2720: /* *avx512f_interleave_lowv8di */ |
| 41436 | case 2719: /* avx2_interleave_lowv4di_mask */ |
| 41437 | case 2718: /* avx2_interleave_lowv4di */ |
| 41438 | case 2717: /* vec_interleave_highv2di_mask */ |
| 41439 | case 2716: /* vec_interleave_highv2di */ |
| 41440 | case 2715: /* avx512f_interleave_highv8di_mask */ |
| 41441 | case 2714: /* *avx512f_interleave_highv8di */ |
| 41442 | case 2713: /* avx2_interleave_highv4di_mask */ |
| 41443 | case 2712: /* avx2_interleave_highv4di */ |
| 41444 | case 2711: /* sse2_shufpd_v2df_mask */ |
| 41445 | case 2710: /* avx_shufpd256_1_mask */ |
| 41446 | case 2709: /* avx_shufpd256_1 */ |
| 41447 | case 2708: /* avx512f_shufpd512_1_mask */ |
| 41448 | case 2707: /* avx512f_shufpd512_1 */ |
| 41449 | case 2706: /* avx512f_shufps512_1_mask */ |
| 41450 | case 2705: /* avx512f_shufps512_1 */ |
| 41451 | case 2588: /* avx512vl_vternlogv2di_mask */ |
| 41452 | case 2587: /* avx512vl_vternlogv4di_mask */ |
| 41453 | case 2586: /* avx512f_vternlogv8di_mask */ |
| 41454 | case 2585: /* avx512vl_vternlogv4si_mask */ |
| 41455 | case 2584: /* avx512vl_vternlogv8si_mask */ |
| 41456 | case 2583: /* avx512f_vternlogv16si_mask */ |
| 41457 | case 2582: /* avx512vl_vternlogv2di_maskz_1 */ |
| 41458 | case 2581: /* avx512vl_vternlogv2di */ |
| 41459 | case 2580: /* avx512vl_vternlogv4di_maskz_1 */ |
| 41460 | case 2579: /* avx512vl_vternlogv4di */ |
| 41461 | case 2578: /* avx512f_vternlogv8di_maskz_1 */ |
| 41462 | case 2577: /* avx512f_vternlogv8di */ |
| 41463 | case 2576: /* avx512vl_vternlogv4si_maskz_1 */ |
| 41464 | case 2575: /* avx512vl_vternlogv4si */ |
| 41465 | case 2574: /* avx512vl_vternlogv8si_maskz_1 */ |
| 41466 | case 2573: /* avx512vl_vternlogv8si */ |
| 41467 | case 2572: /* avx512f_vternlogv16si_maskz_1 */ |
| 41468 | case 2571: /* avx512f_vternlogv16si */ |
| 41469 | case 2541: /* avx512vl_unpcklpd128_mask */ |
| 41470 | case 2540: /* *avx_unpcklpd256_mask */ |
| 41471 | case 2539: /* *avx_unpcklpd256 */ |
| 41472 | case 2538: /* *avx512f_unpcklpd512_mask */ |
| 41473 | case 2537: /* *avx512f_unpcklpd512 */ |
| 41474 | case 2535: /* avx512vl_unpckhpd128_mask */ |
| 41475 | case 2534: /* avx_unpckhpd256_mask */ |
| 41476 | case 2533: /* avx_unpckhpd256 */ |
| 41477 | case 2532: /* avx512f_unpckhpd512_mask */ |
| 41478 | case 2531: /* *avx512f_unpckhpd512 */ |
| 41479 | case 2465: /* sse4_1_insertps */ |
| 41480 | case 2464: /* *vec_setv4sf_sse4_1 */ |
| 41481 | case 2448: /* sse_shufps_v4sf */ |
| 41482 | case 2447: /* sse_shufps_v4si */ |
| 41483 | case 2446: /* sse_shufps_v4sf_mask */ |
| 41484 | case 2445: /* avx_shufps256_1_mask */ |
| 41485 | case 2444: /* avx_shufps256_1 */ |
| 41486 | case 2431: /* vec_interleave_lowv4sf */ |
| 41487 | case 2430: /* unpcklps128_mask */ |
| 41488 | case 2429: /* avx_unpcklps256_mask */ |
| 41489 | case 2428: /* avx_unpcklps256 */ |
| 41490 | case 2427: /* avx512f_unpcklps512_mask */ |
| 41491 | case 2426: /* *avx512f_unpcklps512 */ |
| 41492 | case 2425: /* vec_interleave_highv4sf_mask */ |
| 41493 | case 2424: /* vec_interleave_highv4sf */ |
| 41494 | case 2423: /* avx_unpckhps256_mask */ |
| 41495 | case 2422: /* avx_unpckhps256 */ |
| 41496 | case 2421: /* avx512f_unpckhps512_mask */ |
| 41497 | case 2420: /* *avx512f_unpckhps512 */ |
| 41498 | case 2417: /* sse2_cvtps2pd_mask */ |
| 41499 | case 2416: /* sse2_cvtps2pd */ |
| 41500 | case 1800: /* *xortf3 */ |
| 41501 | case 1799: /* *iortf3 */ |
| 41502 | case 1798: /* *andtf3 */ |
| 41503 | case 1797: /* *xordf3 */ |
| 41504 | case 1796: /* *iordf3 */ |
| 41505 | case 1795: /* *anddf3 */ |
| 41506 | case 1794: /* *xorsf3 */ |
| 41507 | case 1793: /* *iorsf3 */ |
| 41508 | case 1792: /* *andsf3 */ |
| 41509 | case 1791: /* *andnottf3 */ |
| 41510 | case 1790: /* *andnotdf3 */ |
| 41511 | case 1789: /* *andnotsf3 */ |
| 41512 | case 1788: /* *xorv8df3_mask */ |
| 41513 | case 1787: /* *xorv8df3 */ |
| 41514 | case 1786: /* *iorv8df3_mask */ |
| 41515 | case 1785: /* *iorv8df3 */ |
| 41516 | case 1784: /* *andv8df3_mask */ |
| 41517 | case 1783: /* *andv8df3 */ |
| 41518 | case 1782: /* *xorv16sf3_mask */ |
| 41519 | case 1781: /* *xorv16sf3 */ |
| 41520 | case 1780: /* *iorv16sf3_mask */ |
| 41521 | case 1779: /* *iorv16sf3 */ |
| 41522 | case 1778: /* *andv16sf3_mask */ |
| 41523 | case 1777: /* *andv16sf3 */ |
| 41524 | case 1776: /* *xorv2df3_mask */ |
| 41525 | case 1775: /* *xorv2df3 */ |
| 41526 | case 1774: /* *iorv2df3_mask */ |
| 41527 | case 1773: /* *iorv2df3 */ |
| 41528 | case 1772: /* *andv2df3_mask */ |
| 41529 | case 1771: /* *andv2df3 */ |
| 41530 | case 1770: /* *xorv4df3_mask */ |
| 41531 | case 1769: /* *xorv4df3 */ |
| 41532 | case 1768: /* *iorv4df3_mask */ |
| 41533 | case 1767: /* *iorv4df3 */ |
| 41534 | case 1766: /* *andv4df3_mask */ |
| 41535 | case 1765: /* *andv4df3 */ |
| 41536 | case 1764: /* *xorv4sf3_mask */ |
| 41537 | case 1763: /* *xorv4sf3 */ |
| 41538 | case 1762: /* *iorv4sf3_mask */ |
| 41539 | case 1761: /* *iorv4sf3 */ |
| 41540 | case 1760: /* *andv4sf3_mask */ |
| 41541 | case 1759: /* *andv4sf3 */ |
| 41542 | case 1758: /* *xorv8sf3_mask */ |
| 41543 | case 1757: /* *xorv8sf3 */ |
| 41544 | case 1756: /* *iorv8sf3_mask */ |
| 41545 | case 1755: /* *iorv8sf3 */ |
| 41546 | case 1754: /* *andv8sf3_mask */ |
| 41547 | case 1753: /* *andv8sf3 */ |
| 41548 | case 1752: /* avx512f_andnotv8df3_mask */ |
| 41549 | case 1751: /* avx512f_andnotv8df3 */ |
| 41550 | case 1750: /* avx512f_andnotv16sf3_mask */ |
| 41551 | case 1749: /* avx512f_andnotv16sf3 */ |
| 41552 | case 1748: /* sse2_andnotv2df3_mask */ |
| 41553 | case 1747: /* sse2_andnotv2df3 */ |
| 41554 | case 1746: /* avx_andnotv4df3_mask */ |
| 41555 | case 1745: /* avx_andnotv4df3 */ |
| 41556 | case 1744: /* sse_andnotv4sf3_mask */ |
| 41557 | case 1743: /* sse_andnotv4sf3 */ |
| 41558 | case 1742: /* avx_andnotv8sf3_mask */ |
| 41559 | case 1741: /* avx_andnotv8sf3 */ |
| 41560 | case 1732: /* avx512f_maskcmpv2df3 */ |
| 41561 | case 1731: /* avx512f_maskcmpv4df3 */ |
| 41562 | case 1730: /* avx512f_maskcmpv8df3 */ |
| 41563 | case 1729: /* avx512f_maskcmpv4sf3 */ |
| 41564 | case 1728: /* avx512f_maskcmpv8sf3 */ |
| 41565 | case 1727: /* avx512f_maskcmpv16sf3 */ |
| 41566 | case 1716: /* avx512vl_ucmpv4di3_mask */ |
| 41567 | case 1715: /* avx512vl_ucmpv4di3 */ |
| 41568 | case 1714: /* avx512f_ucmpv8di3_mask */ |
| 41569 | case 1713: /* avx512f_ucmpv8di3 */ |
| 41570 | case 1710: /* avx512vl_ucmpv8si3_mask */ |
| 41571 | case 1709: /* avx512vl_ucmpv8si3 */ |
| 41572 | case 1708: /* avx512f_ucmpv16si3_mask */ |
| 41573 | case 1707: /* avx512f_ucmpv16si3 */ |
| 41574 | case 1704: /* avx512vl_ucmpv16hi3_mask */ |
| 41575 | case 1703: /* avx512vl_ucmpv16hi3 */ |
| 41576 | case 1702: /* avx512bw_ucmpv32hi3_mask */ |
| 41577 | case 1701: /* avx512bw_ucmpv32hi3 */ |
| 41578 | case 1700: /* avx512vl_ucmpv32qi3_mask */ |
| 41579 | case 1699: /* avx512vl_ucmpv32qi3 */ |
| 41580 | case 1696: /* avx512bw_ucmpv64qi3_mask */ |
| 41581 | case 1695: /* avx512bw_ucmpv64qi3 */ |
| 41582 | case 1692: /* avx512vl_cmpv16hi3_mask */ |
| 41583 | case 1691: /* avx512vl_cmpv16hi3 */ |
| 41584 | case 1690: /* avx512bw_cmpv32hi3_mask */ |
| 41585 | case 1689: /* avx512bw_cmpv32hi3 */ |
| 41586 | case 1688: /* avx512vl_cmpv32qi3_mask */ |
| 41587 | case 1687: /* avx512vl_cmpv32qi3 */ |
| 41588 | case 1684: /* avx512bw_cmpv64qi3_mask */ |
| 41589 | case 1683: /* avx512bw_cmpv64qi3 */ |
| 41590 | case 1682: /* avx512vl_cmpv2df3_mask */ |
| 41591 | case 1681: /* avx512vl_cmpv2df3 */ |
| 41592 | case 1680: /* avx512vl_cmpv4df3_mask */ |
| 41593 | case 1679: /* avx512vl_cmpv4df3 */ |
| 41594 | case 1678: /* avx512f_cmpv8df3_mask_round */ |
| 41595 | case 1677: /* avx512f_cmpv8df3_round */ |
| 41596 | case 1676: /* avx512f_cmpv8df3_mask */ |
| 41597 | case 1675: /* avx512f_cmpv8df3 */ |
| 41598 | case 1674: /* avx512vl_cmpv4sf3_mask */ |
| 41599 | case 1673: /* avx512vl_cmpv4sf3 */ |
| 41600 | case 1672: /* avx512vl_cmpv8sf3_mask */ |
| 41601 | case 1671: /* avx512vl_cmpv8sf3 */ |
| 41602 | case 1670: /* avx512f_cmpv16sf3_mask_round */ |
| 41603 | case 1669: /* avx512f_cmpv16sf3_round */ |
| 41604 | case 1668: /* avx512f_cmpv16sf3_mask */ |
| 41605 | case 1667: /* avx512f_cmpv16sf3 */ |
| 41606 | case 1664: /* avx512vl_cmpv4di3_mask */ |
| 41607 | case 1663: /* avx512vl_cmpv4di3 */ |
| 41608 | case 1662: /* avx512f_cmpv8di3_mask_round */ |
| 41609 | case 1661: /* avx512f_cmpv8di3_round */ |
| 41610 | case 1660: /* avx512f_cmpv8di3_mask */ |
| 41611 | case 1659: /* avx512f_cmpv8di3 */ |
| 41612 | case 1656: /* avx512vl_cmpv8si3_mask */ |
| 41613 | case 1655: /* avx512vl_cmpv8si3 */ |
| 41614 | case 1654: /* avx512f_cmpv16si3_mask_round */ |
| 41615 | case 1653: /* avx512f_cmpv16si3_round */ |
| 41616 | case 1652: /* avx512f_cmpv16si3_mask */ |
| 41617 | case 1651: /* avx512f_cmpv16si3 */ |
| 41618 | case 1648: /* sse2_maskcmpv2df3 */ |
| 41619 | case 1647: /* avx_maskcmpv4df3 */ |
| 41620 | case 1646: /* sse_maskcmpv4sf3 */ |
| 41621 | case 1645: /* avx_maskcmpv8sf3 */ |
| 41622 | case 1644: /* *sse2_maskcmpv2df3_comm */ |
| 41623 | case 1643: /* *avx_maskcmpv4df3_comm */ |
| 41624 | case 1642: /* *sse_maskcmpv4sf3_comm */ |
| 41625 | case 1641: /* *avx_maskcmpv8sf3_comm */ |
| 41626 | case 1638: /* avx_cmpv2df3 */ |
| 41627 | case 1637: /* avx_cmpv4df3 */ |
| 41628 | case 1636: /* avx_cmpv4sf3 */ |
| 41629 | case 1635: /* avx_cmpv8sf3 */ |
| 41630 | case 54: /* *cmpiuxf_i387 */ |
| 41631 | case 53: /* *cmpixf_i387 */ |
| 41632 | if (get_attr_memory (insn) == MEMORY_LOAD) |
| 41633 | { |
| 41634 | return 5; |
| 41635 | } |
| 41636 | else |
| 41637 | { |
| 41638 | return 3; |
| 41639 | } |
| 41640 | |
| 41641 | case 4984: /* atomic_bit_test_and_resetdi_1 */ |
| 41642 | case 4983: /* atomic_bit_test_and_resetsi_1 */ |
| 41643 | case 4982: /* atomic_bit_test_and_resethi_1 */ |
| 41644 | case 4981: /* atomic_bit_test_and_complementdi_1 */ |
| 41645 | case 4980: /* atomic_bit_test_and_complementsi_1 */ |
| 41646 | case 4979: /* atomic_bit_test_and_complementhi_1 */ |
| 41647 | case 4978: /* atomic_bit_test_and_setdi_1 */ |
| 41648 | case 4977: /* atomic_bit_test_and_setsi_1 */ |
| 41649 | case 4976: /* atomic_bit_test_and_sethi_1 */ |
| 41650 | case 4975: /* atomic_xordi */ |
| 41651 | case 4974: /* atomic_ordi */ |
| 41652 | case 4973: /* atomic_anddi */ |
| 41653 | case 4972: /* atomic_xorsi */ |
| 41654 | case 4971: /* atomic_orsi */ |
| 41655 | case 4970: /* atomic_andsi */ |
| 41656 | case 4969: /* atomic_xorhi */ |
| 41657 | case 4968: /* atomic_orhi */ |
| 41658 | case 4967: /* atomic_andhi */ |
| 41659 | case 4966: /* atomic_xorqi */ |
| 41660 | case 4965: /* atomic_orqi */ |
| 41661 | case 4964: /* atomic_andqi */ |
| 41662 | case 4963: /* atomic_subdi */ |
| 41663 | case 4962: /* atomic_subsi */ |
| 41664 | case 4961: /* atomic_subhi */ |
| 41665 | case 4960: /* atomic_subqi */ |
| 41666 | case 4959: /* atomic_adddi */ |
| 41667 | case 4958: /* atomic_addsi */ |
| 41668 | case 4957: /* atomic_addhi */ |
| 41669 | case 4956: /* atomic_addqi */ |
| 41670 | case 4955: /* atomic_exchangedi */ |
| 41671 | case 4954: /* atomic_exchangesi */ |
| 41672 | case 4953: /* atomic_exchangehi */ |
| 41673 | case 4952: /* atomic_exchangeqi */ |
| 41674 | case 4951: /* *atomic_fetch_add_cmpdi */ |
| 41675 | case 4950: /* *atomic_fetch_add_cmpsi */ |
| 41676 | case 4949: /* *atomic_fetch_add_cmphi */ |
| 41677 | case 4948: /* *atomic_fetch_add_cmpqi */ |
| 41678 | case 4947: /* atomic_fetch_adddi */ |
| 41679 | case 4946: /* atomic_fetch_addsi */ |
| 41680 | case 4945: /* atomic_fetch_addhi */ |
| 41681 | case 4944: /* atomic_fetch_addqi */ |
| 41682 | case 4943: /* atomic_compare_and_swapdi_1 */ |
| 41683 | case 4942: /* atomic_compare_and_swapsi_1 */ |
| 41684 | case 4941: /* atomic_compare_and_swaphi_1 */ |
| 41685 | case 4940: /* atomic_compare_and_swapqi_1 */ |
| 41686 | case 4939: /* atomic_compare_and_swapti_doubleword */ |
| 41687 | case 4938: /* atomic_compare_and_swapdi_doubleword */ |
| 41688 | case 4935: /* storedi_via_fpu */ |
| 41689 | case 4934: /* loaddi_via_fpu */ |
| 41690 | case 4933: /* atomic_storedi_fpu */ |
| 41691 | case 4932: /* atomic_storedi_1 */ |
| 41692 | case 4931: /* atomic_storesi_1 */ |
| 41693 | case 4930: /* atomic_storehi_1 */ |
| 41694 | case 4929: /* atomic_storeqi_1 */ |
| 41695 | case 4928: /* atomic_loaddi_fpu */ |
| 41696 | case 4927: /* mfence_nosse */ |
| 41697 | case 4923: /* vpopcountv8di_mask */ |
| 41698 | case 4922: /* vpopcountv8di */ |
| 41699 | case 4921: /* vpopcountv16si_mask */ |
| 41700 | case 4920: /* vpopcountv16si */ |
| 41701 | case 4901: /* *movv64si_internal */ |
| 41702 | case 4900: /* *movv64sf_internal */ |
| 41703 | case 4875: /* avx512f_pd512_256pd */ |
| 41704 | case 4874: /* avx512f_ps512_256ps */ |
| 41705 | case 4873: /* avx512f_si512_256si */ |
| 41706 | case 4872: /* avx512f_pd512_pd */ |
| 41707 | case 4871: /* avx512f_ps512_ps */ |
| 41708 | case 4870: /* avx512f_si512_si */ |
| 41709 | case 4832: /* avx512f_vgetmantv2df_round */ |
| 41710 | case 4831: /* avx512f_vgetmantv2df */ |
| 41711 | case 4830: /* avx512f_vgetmantv4sf_round */ |
| 41712 | case 4829: /* avx512f_vgetmantv4sf */ |
| 41713 | case 4828: /* avx512vl_getmantv2df_mask_round */ |
| 41714 | case 4827: /* avx512vl_getmantv2df_mask */ |
| 41715 | case 4826: /* avx512vl_getmantv2df_round */ |
| 41716 | case 4825: /* avx512vl_getmantv2df */ |
| 41717 | case 4824: /* avx512vl_getmantv4df_mask_round */ |
| 41718 | case 4823: /* avx512vl_getmantv4df_mask */ |
| 41719 | case 4822: /* avx512vl_getmantv4df_round */ |
| 41720 | case 4821: /* avx512vl_getmantv4df */ |
| 41721 | case 4820: /* avx512f_getmantv8df_mask_round */ |
| 41722 | case 4819: /* avx512f_getmantv8df_mask */ |
| 41723 | case 4818: /* avx512f_getmantv8df_round */ |
| 41724 | case 4817: /* avx512f_getmantv8df */ |
| 41725 | case 4816: /* avx512vl_getmantv4sf_mask_round */ |
| 41726 | case 4815: /* avx512vl_getmantv4sf_mask */ |
| 41727 | case 4814: /* avx512vl_getmantv4sf_round */ |
| 41728 | case 4813: /* avx512vl_getmantv4sf */ |
| 41729 | case 4812: /* avx512vl_getmantv8sf_mask_round */ |
| 41730 | case 4811: /* avx512vl_getmantv8sf_mask */ |
| 41731 | case 4810: /* avx512vl_getmantv8sf_round */ |
| 41732 | case 4809: /* avx512vl_getmantv8sf */ |
| 41733 | case 4808: /* avx512f_getmantv16sf_mask_round */ |
| 41734 | case 4807: /* avx512f_getmantv16sf_mask */ |
| 41735 | case 4806: /* avx512f_getmantv16sf_round */ |
| 41736 | case 4805: /* avx512f_getmantv16sf */ |
| 41737 | case 4770: /* avx512vl_expandv2df_mask */ |
| 41738 | case 4769: /* avx512vl_expandv2di_mask */ |
| 41739 | case 4768: /* avx512vl_expandv4sf_mask */ |
| 41740 | case 4767: /* avx512vl_expandv4si_mask */ |
| 41741 | case 4766: /* avx512vl_expandv4df_mask */ |
| 41742 | case 4765: /* avx512vl_expandv4di_mask */ |
| 41743 | case 4764: /* avx512vl_expandv8sf_mask */ |
| 41744 | case 4763: /* avx512vl_expandv8si_mask */ |
| 41745 | case 4762: /* avx512f_expandv8df_mask */ |
| 41746 | case 4761: /* avx512f_expandv8di_mask */ |
| 41747 | case 4760: /* avx512f_expandv16sf_mask */ |
| 41748 | case 4759: /* avx512f_expandv16si_mask */ |
| 41749 | case 4754: /* avx512vl_compressstorev4df_mask */ |
| 41750 | case 4753: /* avx512vl_compressstorev4di_mask */ |
| 41751 | case 4752: /* avx512vl_compressstorev8sf_mask */ |
| 41752 | case 4751: /* avx512vl_compressstorev8si_mask */ |
| 41753 | case 4750: /* avx512f_compressstorev8df_mask */ |
| 41754 | case 4749: /* avx512f_compressstorev8di_mask */ |
| 41755 | case 4748: /* avx512f_compressstorev16sf_mask */ |
| 41756 | case 4747: /* avx512f_compressstorev16si_mask */ |
| 41757 | case 4742: /* avx512vl_compressv4df_mask */ |
| 41758 | case 4741: /* avx512vl_compressv4di_mask */ |
| 41759 | case 4740: /* avx512vl_compressv8sf_mask */ |
| 41760 | case 4739: /* avx512vl_compressv8si_mask */ |
| 41761 | case 4738: /* avx512f_compressv8df_mask */ |
| 41762 | case 4737: /* avx512f_compressv8di_mask */ |
| 41763 | case 4736: /* avx512f_compressv16sf_mask */ |
| 41764 | case 4735: /* avx512f_compressv16si_mask */ |
| 41765 | case 4726: /* *avx512f_scatterdiv4df */ |
| 41766 | case 4725: /* *avx512f_scatterdiv4df */ |
| 41767 | case 4724: /* *avx512f_scatterdiv4di */ |
| 41768 | case 4723: /* *avx512f_scatterdiv4di */ |
| 41769 | case 4722: /* *avx512f_scatterdiv8sf */ |
| 41770 | case 4721: /* *avx512f_scatterdiv8sf */ |
| 41771 | case 4720: /* *avx512f_scatterdiv8si */ |
| 41772 | case 4719: /* *avx512f_scatterdiv8si */ |
| 41773 | case 4718: /* *avx512f_scatterdiv8df */ |
| 41774 | case 4717: /* *avx512f_scatterdiv8df */ |
| 41775 | case 4716: /* *avx512f_scatterdiv8di */ |
| 41776 | case 4715: /* *avx512f_scatterdiv8di */ |
| 41777 | case 4714: /* *avx512f_scatterdiv16sf */ |
| 41778 | case 4713: /* *avx512f_scatterdiv16sf */ |
| 41779 | case 4712: /* *avx512f_scatterdiv16si */ |
| 41780 | case 4711: /* *avx512f_scatterdiv16si */ |
| 41781 | case 4702: /* *avx512f_scattersiv4df */ |
| 41782 | case 4701: /* *avx512f_scattersiv4df */ |
| 41783 | case 4700: /* *avx512f_scattersiv4di */ |
| 41784 | case 4699: /* *avx512f_scattersiv4di */ |
| 41785 | case 4698: /* *avx512f_scattersiv8sf */ |
| 41786 | case 4697: /* *avx512f_scattersiv8sf */ |
| 41787 | case 4696: /* *avx512f_scattersiv8si */ |
| 41788 | case 4695: /* *avx512f_scattersiv8si */ |
| 41789 | case 4694: /* *avx512f_scattersiv8df */ |
| 41790 | case 4693: /* *avx512f_scattersiv8df */ |
| 41791 | case 4692: /* *avx512f_scattersiv8di */ |
| 41792 | case 4691: /* *avx512f_scattersiv8di */ |
| 41793 | case 4690: /* *avx512f_scattersiv16sf */ |
| 41794 | case 4689: /* *avx512f_scattersiv16sf */ |
| 41795 | case 4688: /* *avx512f_scattersiv16si */ |
| 41796 | case 4687: /* *avx512f_scattersiv16si */ |
| 41797 | case 4678: /* *avx512f_gatherdiv4df_2 */ |
| 41798 | case 4677: /* *avx512f_gatherdiv4df_2 */ |
| 41799 | case 4676: /* *avx512f_gatherdiv4di_2 */ |
| 41800 | case 4675: /* *avx512f_gatherdiv4di_2 */ |
| 41801 | case 4674: /* *avx512f_gatherdiv8sf_2 */ |
| 41802 | case 4673: /* *avx512f_gatherdiv8sf_2 */ |
| 41803 | case 4672: /* *avx512f_gatherdiv8si_2 */ |
| 41804 | case 4671: /* *avx512f_gatherdiv8si_2 */ |
| 41805 | case 4670: /* *avx512f_gatherdiv8df_2 */ |
| 41806 | case 4669: /* *avx512f_gatherdiv8df_2 */ |
| 41807 | case 4668: /* *avx512f_gatherdiv8di_2 */ |
| 41808 | case 4667: /* *avx512f_gatherdiv8di_2 */ |
| 41809 | case 4666: /* *avx512f_gatherdiv16sf_2 */ |
| 41810 | case 4665: /* *avx512f_gatherdiv16sf_2 */ |
| 41811 | case 4664: /* *avx512f_gatherdiv16si_2 */ |
| 41812 | case 4663: /* *avx512f_gatherdiv16si_2 */ |
| 41813 | case 4654: /* *avx512f_gatherdiv4df */ |
| 41814 | case 4653: /* *avx512f_gatherdiv4df */ |
| 41815 | case 4652: /* *avx512f_gatherdiv4di */ |
| 41816 | case 4651: /* *avx512f_gatherdiv4di */ |
| 41817 | case 4650: /* *avx512f_gatherdiv8sf */ |
| 41818 | case 4649: /* *avx512f_gatherdiv8sf */ |
| 41819 | case 4648: /* *avx512f_gatherdiv8si */ |
| 41820 | case 4647: /* *avx512f_gatherdiv8si */ |
| 41821 | case 4646: /* *avx512f_gatherdiv8df */ |
| 41822 | case 4645: /* *avx512f_gatherdiv8df */ |
| 41823 | case 4644: /* *avx512f_gatherdiv8di */ |
| 41824 | case 4643: /* *avx512f_gatherdiv8di */ |
| 41825 | case 4642: /* *avx512f_gatherdiv16sf */ |
| 41826 | case 4641: /* *avx512f_gatherdiv16sf */ |
| 41827 | case 4640: /* *avx512f_gatherdiv16si */ |
| 41828 | case 4639: /* *avx512f_gatherdiv16si */ |
| 41829 | case 4630: /* *avx512f_gathersiv4df_2 */ |
| 41830 | case 4629: /* *avx512f_gathersiv4df_2 */ |
| 41831 | case 4628: /* *avx512f_gathersiv4di_2 */ |
| 41832 | case 4627: /* *avx512f_gathersiv4di_2 */ |
| 41833 | case 4626: /* *avx512f_gathersiv8sf_2 */ |
| 41834 | case 4625: /* *avx512f_gathersiv8sf_2 */ |
| 41835 | case 4624: /* *avx512f_gathersiv8si_2 */ |
| 41836 | case 4623: /* *avx512f_gathersiv8si_2 */ |
| 41837 | case 4622: /* *avx512f_gathersiv8df_2 */ |
| 41838 | case 4621: /* *avx512f_gathersiv8df_2 */ |
| 41839 | case 4620: /* *avx512f_gathersiv8di_2 */ |
| 41840 | case 4619: /* *avx512f_gathersiv8di_2 */ |
| 41841 | case 4618: /* *avx512f_gathersiv16sf_2 */ |
| 41842 | case 4617: /* *avx512f_gathersiv16sf_2 */ |
| 41843 | case 4616: /* *avx512f_gathersiv16si_2 */ |
| 41844 | case 4615: /* *avx512f_gathersiv16si_2 */ |
| 41845 | case 4606: /* *avx512f_gathersiv4df */ |
| 41846 | case 4605: /* *avx512f_gathersiv4df */ |
| 41847 | case 4604: /* *avx512f_gathersiv4di */ |
| 41848 | case 4603: /* *avx512f_gathersiv4di */ |
| 41849 | case 4602: /* *avx512f_gathersiv8sf */ |
| 41850 | case 4601: /* *avx512f_gathersiv8sf */ |
| 41851 | case 4600: /* *avx512f_gathersiv8si */ |
| 41852 | case 4599: /* *avx512f_gathersiv8si */ |
| 41853 | case 4598: /* *avx512f_gathersiv8df */ |
| 41854 | case 4597: /* *avx512f_gathersiv8df */ |
| 41855 | case 4596: /* *avx512f_gathersiv8di */ |
| 41856 | case 4595: /* *avx512f_gathersiv8di */ |
| 41857 | case 4594: /* *avx512f_gathersiv16sf */ |
| 41858 | case 4593: /* *avx512f_gathersiv16sf */ |
| 41859 | case 4592: /* *avx512f_gathersiv16si */ |
| 41860 | case 4591: /* *avx512f_gathersiv16si */ |
| 41861 | case 4590: /* *avx2_gatherdiv8sf_4 */ |
| 41862 | case 4589: /* *avx2_gatherdiv8sf_4 */ |
| 41863 | case 4588: /* *avx2_gatherdiv8si_4 */ |
| 41864 | case 4587: /* *avx2_gatherdiv8si_4 */ |
| 41865 | case 4586: /* *avx2_gatherdiv8sf_3 */ |
| 41866 | case 4585: /* *avx2_gatherdiv8sf_3 */ |
| 41867 | case 4584: /* *avx2_gatherdiv8si_3 */ |
| 41868 | case 4583: /* *avx2_gatherdiv8si_3 */ |
| 41869 | case 4582: /* *avx2_gatherdiv8sf_2 */ |
| 41870 | case 4581: /* *avx2_gatherdiv8sf_2 */ |
| 41871 | case 4580: /* *avx2_gatherdiv8si_2 */ |
| 41872 | case 4579: /* *avx2_gatherdiv8si_2 */ |
| 41873 | case 4574: /* *avx2_gatherdiv4df_2 */ |
| 41874 | case 4573: /* *avx2_gatherdiv4df_2 */ |
| 41875 | case 4572: /* *avx2_gatherdiv4di_2 */ |
| 41876 | case 4571: /* *avx2_gatherdiv4di_2 */ |
| 41877 | case 4566: /* *avx2_gatherdiv8sf */ |
| 41878 | case 4565: /* *avx2_gatherdiv8sf */ |
| 41879 | case 4564: /* *avx2_gatherdiv8si */ |
| 41880 | case 4563: /* *avx2_gatherdiv8si */ |
| 41881 | case 4558: /* *avx2_gatherdiv4df */ |
| 41882 | case 4557: /* *avx2_gatherdiv4df */ |
| 41883 | case 4556: /* *avx2_gatherdiv4di */ |
| 41884 | case 4555: /* *avx2_gatherdiv4di */ |
| 41885 | case 4550: /* *avx2_gathersiv8sf_2 */ |
| 41886 | case 4549: /* *avx2_gathersiv8sf_2 */ |
| 41887 | case 4548: /* *avx2_gathersiv8si_2 */ |
| 41888 | case 4547: /* *avx2_gathersiv8si_2 */ |
| 41889 | case 4542: /* *avx2_gathersiv4df_2 */ |
| 41890 | case 4541: /* *avx2_gathersiv4df_2 */ |
| 41891 | case 4540: /* *avx2_gathersiv4di_2 */ |
| 41892 | case 4539: /* *avx2_gathersiv4di_2 */ |
| 41893 | case 4534: /* *avx2_gathersiv8sf */ |
| 41894 | case 4533: /* *avx2_gathersiv8sf */ |
| 41895 | case 4532: /* *avx2_gathersiv8si */ |
| 41896 | case 4531: /* *avx2_gathersiv8si */ |
| 41897 | case 4526: /* *avx2_gathersiv4df */ |
| 41898 | case 4525: /* *avx2_gathersiv4df */ |
| 41899 | case 4524: /* *avx2_gathersiv4di */ |
| 41900 | case 4523: /* *avx2_gathersiv4di */ |
| 41901 | case 4435: /* avx_pd256_pd */ |
| 41902 | case 4434: /* avx_ps256_ps */ |
| 41903 | case 4433: /* avx_si256_si */ |
| 41904 | case 4252: /* *avx_vperm_broadcast_v4df */ |
| 41905 | case 4251: /* *avx_vperm_broadcast_v8sf */ |
| 41906 | case 4243: /* avx512dq_broadcastv4df_mask_1 */ |
| 41907 | case 4242: /* *avx512dq_broadcastv4df_1 */ |
| 41908 | case 4241: /* avx512dq_broadcastv4di_mask_1 */ |
| 41909 | case 4240: /* *avx512dq_broadcastv4di_1 */ |
| 41910 | case 4239: /* avx512dq_broadcastv8df_mask_1 */ |
| 41911 | case 4238: /* *avx512dq_broadcastv8df_1 */ |
| 41912 | case 4237: /* avx512dq_broadcastv8di_mask_1 */ |
| 41913 | case 4236: /* *avx512dq_broadcastv8di_1 */ |
| 41914 | case 4235: /* avx512dq_broadcastv16si_mask_1 */ |
| 41915 | case 4234: /* *avx512dq_broadcastv16si_1 */ |
| 41916 | case 4233: /* avx512dq_broadcastv16sf_mask_1 */ |
| 41917 | case 4232: /* *avx512dq_broadcastv16sf_1 */ |
| 41918 | case 4231: /* avx512vl_broadcastv8sf_mask_1 */ |
| 41919 | case 4230: /* *avx512vl_broadcastv8sf_1 */ |
| 41920 | case 4229: /* avx512vl_broadcastv8si_mask_1 */ |
| 41921 | case 4228: /* *avx512vl_broadcastv8si_1 */ |
| 41922 | case 4227: /* avx512dq_broadcastv8sf_mask */ |
| 41923 | case 4226: /* *avx512dq_broadcastv8sf */ |
| 41924 | case 4225: /* avx512dq_broadcastv16sf_mask */ |
| 41925 | case 4224: /* *avx512dq_broadcastv16sf */ |
| 41926 | case 4221: /* avx512dq_broadcastv8si_mask */ |
| 41927 | case 4220: /* *avx512dq_broadcastv8si */ |
| 41928 | case 4219: /* avx512dq_broadcastv16si_mask */ |
| 41929 | case 4218: /* *avx512dq_broadcastv16si */ |
| 41930 | case 4211: /* vec_dupv4df */ |
| 41931 | case 4210: /* vec_dupv4di */ |
| 41932 | case 4209: /* vec_dupv8sf */ |
| 41933 | case 4208: /* vec_dupv8si */ |
| 41934 | case 4206: /* *vec_dupv8si */ |
| 41935 | case 4204: /* *vec_dupv16hi */ |
| 41936 | case 4202: /* *vec_dupv32qi */ |
| 41937 | case 4201: /* avx2_vbroadcasti128_v4di */ |
| 41938 | case 4200: /* avx2_vbroadcasti128_v8si */ |
| 41939 | case 4199: /* avx2_vbroadcasti128_v16hi */ |
| 41940 | case 4198: /* avx2_vbroadcasti128_v32qi */ |
| 41941 | case 4192: /* avx512vl_vec_dup_gprv4df_mask */ |
| 41942 | case 4191: /* *avx512vl_vec_dup_gprv4df */ |
| 41943 | case 4190: /* avx512f_vec_dup_gprv8df_mask */ |
| 41944 | case 4189: /* *avx512f_vec_dup_gprv8df */ |
| 41945 | case 4186: /* avx512vl_vec_dup_gprv8sf_mask */ |
| 41946 | case 4185: /* *avx512vl_vec_dup_gprv8sf */ |
| 41947 | case 4184: /* avx512f_vec_dup_gprv16sf_mask */ |
| 41948 | case 4183: /* *avx512f_vec_dup_gprv16sf */ |
| 41949 | case 4180: /* avx512vl_vec_dup_gprv4di_mask */ |
| 41950 | case 4179: /* *avx512vl_vec_dup_gprv4di */ |
| 41951 | case 4178: /* avx512f_vec_dup_gprv8di_mask */ |
| 41952 | case 4177: /* *avx512f_vec_dup_gprv8di */ |
| 41953 | case 4174: /* avx512vl_vec_dup_gprv8si_mask */ |
| 41954 | case 4173: /* *avx512vl_vec_dup_gprv8si */ |
| 41955 | case 4172: /* avx512f_vec_dup_gprv16si_mask */ |
| 41956 | case 4171: /* *avx512f_vec_dup_gprv16si */ |
| 41957 | case 4168: /* avx512vl_vec_dup_gprv16hi_mask */ |
| 41958 | case 4167: /* *avx512vl_vec_dup_gprv16hi */ |
| 41959 | case 4166: /* avx512bw_vec_dup_gprv32hi_mask */ |
| 41960 | case 4165: /* *avx512bw_vec_dup_gprv32hi */ |
| 41961 | case 4164: /* avx512vl_vec_dup_gprv32qi_mask */ |
| 41962 | case 4163: /* *avx512vl_vec_dup_gprv32qi */ |
| 41963 | case 4160: /* avx512bw_vec_dup_gprv64qi_mask */ |
| 41964 | case 4159: /* *avx512bw_vec_dup_gprv64qi */ |
| 41965 | case 4158: /* avx512f_broadcastv8di_mask */ |
| 41966 | case 4157: /* *avx512f_broadcastv8di */ |
| 41967 | case 4156: /* avx512f_broadcastv8df_mask */ |
| 41968 | case 4155: /* *avx512f_broadcastv8df */ |
| 41969 | case 4154: /* avx512f_broadcastv16si_mask */ |
| 41970 | case 4153: /* *avx512f_broadcastv16si */ |
| 41971 | case 4152: /* avx512f_broadcastv16sf_mask */ |
| 41972 | case 4151: /* *avx512f_broadcastv16sf */ |
| 41973 | case 4148: /* avx512vl_vec_dupv16hi_mask */ |
| 41974 | case 4147: /* avx512vl_vec_dupv16hi */ |
| 41975 | case 4146: /* avx512bw_vec_dupv32hi_mask */ |
| 41976 | case 4145: /* avx512bw_vec_dupv32hi */ |
| 41977 | case 4144: /* avx512vl_vec_dupv32qi_mask */ |
| 41978 | case 4143: /* avx512vl_vec_dupv32qi */ |
| 41979 | case 4140: /* avx512bw_vec_dupv64qi_mask */ |
| 41980 | case 4139: /* avx512bw_vec_dupv64qi */ |
| 41981 | case 4136: /* avx512vl_vec_dupv4df_mask */ |
| 41982 | case 4135: /* avx512vl_vec_dupv4df */ |
| 41983 | case 4134: /* avx512f_vec_dupv8df_mask */ |
| 41984 | case 4133: /* avx512f_vec_dupv8df */ |
| 41985 | case 4130: /* avx512vl_vec_dupv8sf_mask */ |
| 41986 | case 4129: /* avx512vl_vec_dupv8sf */ |
| 41987 | case 4128: /* avx512f_vec_dupv16sf_mask */ |
| 41988 | case 4127: /* avx512f_vec_dupv16sf */ |
| 41989 | case 4124: /* avx512vl_vec_dupv4di_mask */ |
| 41990 | case 4123: /* avx512vl_vec_dupv4di */ |
| 41991 | case 4122: /* avx512f_vec_dupv8di_mask */ |
| 41992 | case 4121: /* avx512f_vec_dupv8di */ |
| 41993 | case 4118: /* avx512vl_vec_dupv8si_mask */ |
| 41994 | case 4117: /* avx512vl_vec_dupv8si */ |
| 41995 | case 4116: /* avx512f_vec_dupv16si_mask */ |
| 41996 | case 4115: /* avx512f_vec_dupv16si */ |
| 41997 | case 4114: /* avx512bw_vec_dupv64qi_1 */ |
| 41998 | case 4113: /* avx512bw_vec_dupv32hi_1 */ |
| 41999 | case 4112: /* avx512f_vec_dupv8di_1 */ |
| 42000 | case 4111: /* avx512f_vec_dupv16si_1 */ |
| 42001 | case 4072: /* avx2_pbroadcastv4di_1 */ |
| 42002 | case 4071: /* avx2_pbroadcastv8si_1 */ |
| 42003 | case 4070: /* avx2_pbroadcastv16hi_1 */ |
| 42004 | case 4069: /* avx2_pbroadcastv32qi_1 */ |
| 42005 | case 4067: /* avx2_pbroadcastv4di */ |
| 42006 | case 4065: /* avx2_pbroadcastv8si */ |
| 42007 | case 4063: /* avx2_pbroadcastv16hi */ |
| 42008 | case 4062: /* avx2_pbroadcastv32hi */ |
| 42009 | case 4060: /* avx2_pbroadcastv32qi */ |
| 42010 | case 4059: /* avx2_pbroadcastv64qi */ |
| 42011 | case 4058: /* avx2_pbroadcastv8di */ |
| 42012 | case 4057: /* avx2_pbroadcastv16si */ |
| 42013 | case 3869: /* avx2_zero_extendv4siv4di2_mask */ |
| 42014 | case 3868: /* avx2_zero_extendv4siv4di2 */ |
| 42015 | case 3867: /* avx2_sign_extendv4siv4di2_mask */ |
| 42016 | case 3866: /* avx2_sign_extendv4siv4di2 */ |
| 42017 | case 3865: /* avx512f_zero_extendv8siv8di2_mask */ |
| 42018 | case 3864: /* avx512f_zero_extendv8siv8di2 */ |
| 42019 | case 3863: /* avx512f_sign_extendv8siv8di2_mask */ |
| 42020 | case 3862: /* avx512f_sign_extendv8siv8di2 */ |
| 42021 | case 3857: /* avx2_zero_extendv4hiv4di2_mask */ |
| 42022 | case 3856: /* avx2_zero_extendv4hiv4di2 */ |
| 42023 | case 3855: /* avx2_sign_extendv4hiv4di2_mask */ |
| 42024 | case 3854: /* avx2_sign_extendv4hiv4di2 */ |
| 42025 | case 3853: /* avx512f_zero_extendv8hiv8di2_mask */ |
| 42026 | case 3852: /* avx512f_zero_extendv8hiv8di2 */ |
| 42027 | case 3851: /* avx512f_sign_extendv8hiv8di2_mask */ |
| 42028 | case 3850: /* avx512f_sign_extendv8hiv8di2 */ |
| 42029 | case 3845: /* avx2_zero_extendv4qiv4di2_mask */ |
| 42030 | case 3844: /* avx2_zero_extendv4qiv4di2 */ |
| 42031 | case 3843: /* avx2_sign_extendv4qiv4di2_mask */ |
| 42032 | case 3842: /* avx2_sign_extendv4qiv4di2 */ |
| 42033 | case 3841: /* avx512f_zero_extendv8qiv8di2_mask */ |
| 42034 | case 3840: /* avx512f_zero_extendv8qiv8di2 */ |
| 42035 | case 3839: /* avx512f_sign_extendv8qiv8di2_mask */ |
| 42036 | case 3838: /* avx512f_sign_extendv8qiv8di2 */ |
| 42037 | case 3833: /* avx2_zero_extendv8hiv8si2_mask */ |
| 42038 | case 3832: /* avx2_zero_extendv8hiv8si2 */ |
| 42039 | case 3831: /* avx2_sign_extendv8hiv8si2_mask */ |
| 42040 | case 3830: /* avx2_sign_extendv8hiv8si2 */ |
| 42041 | case 3829: /* avx512f_zero_extendv16hiv16si2_mask */ |
| 42042 | case 3828: /* avx512f_zero_extendv16hiv16si2 */ |
| 42043 | case 3827: /* avx512f_sign_extendv16hiv16si2_mask */ |
| 42044 | case 3826: /* avx512f_sign_extendv16hiv16si2 */ |
| 42045 | case 3821: /* avx2_zero_extendv8qiv8si2_mask */ |
| 42046 | case 3820: /* avx2_zero_extendv8qiv8si2 */ |
| 42047 | case 3819: /* avx2_sign_extendv8qiv8si2_mask */ |
| 42048 | case 3818: /* avx2_sign_extendv8qiv8si2 */ |
| 42049 | case 3817: /* avx512f_zero_extendv16qiv16si2_mask */ |
| 42050 | case 3816: /* *avx512f_zero_extendv16qiv16si2 */ |
| 42051 | case 3815: /* avx512f_sign_extendv16qiv16si2_mask */ |
| 42052 | case 3814: /* *avx512f_sign_extendv16qiv16si2 */ |
| 42053 | case 3809: /* avx512bw_zero_extendv32qiv32hi2_mask */ |
| 42054 | case 3808: /* avx512bw_zero_extendv32qiv32hi2 */ |
| 42055 | case 3807: /* avx512bw_sign_extendv32qiv32hi2_mask */ |
| 42056 | case 3806: /* avx512bw_sign_extendv32qiv32hi2 */ |
| 42057 | case 3805: /* avx2_zero_extendv16qiv16hi2_mask */ |
| 42058 | case 3804: /* avx2_zero_extendv16qiv16hi2 */ |
| 42059 | case 3803: /* avx2_sign_extendv16qiv16hi2_mask */ |
| 42060 | case 3802: /* avx2_sign_extendv16qiv16hi2 */ |
| 42061 | case 3799: /* avx2_pblenddv8si */ |
| 42062 | case 3798: /* *avx2_pblendw */ |
| 42063 | case 3795: /* avx2_pblendvb */ |
| 42064 | case 3785: /* avx2_movntdqa */ |
| 42065 | case 3784: /* avx512f_movntdqa */ |
| 42066 | case 3778: /* avx_blendvpd256 */ |
| 42067 | case 3776: /* avx_blendvps256 */ |
| 42068 | case 3774: /* avx_blendpd256 */ |
| 42069 | case 3772: /* avx_blendps256 */ |
| 42070 | case 3767: /* sse4a_vmmovntv2df */ |
| 42071 | case 3765: /* sse4a_movntdf */ |
| 42072 | case 3677: /* sse3_monitor_di */ |
| 42073 | case 3676: /* sse3_monitor_si */ |
| 42074 | case 3675: /* sse3_mwait */ |
| 42075 | case 3669: /* *sse2_pmovmskb_zext */ |
| 42076 | case 3668: /* *avx2_pmovmskb_zext */ |
| 42077 | case 3667: /* sse2_pmovmskb */ |
| 42078 | case 3666: /* avx2_pmovmskb */ |
| 42079 | case 3664: /* *avx_movmskpd256_zext */ |
| 42080 | case 3662: /* *avx_movmskps256_zext */ |
| 42081 | case 3660: /* avx_movmskpd256 */ |
| 42082 | case 3658: /* avx_movmskps256 */ |
| 42083 | case 3637: /* *vec_extractv4si_zext_mem */ |
| 42084 | case 3636: /* *vec_extractv4si_mem */ |
| 42085 | case 3633: /* *vec_extractv4si_0_zext */ |
| 42086 | case 3632: /* *vec_extractv4si_0_zext_sse4 */ |
| 42087 | case 3631: /* *vec_extractv2di_0_sse */ |
| 42088 | case 3630: /* *vec_extractv2di_0 */ |
| 42089 | case 3629: /* *vec_extractv4si_0 */ |
| 42090 | case 3628: /* *vec_extractv8hi_mem */ |
| 42091 | case 3627: /* *vec_extractv16qi_mem */ |
| 42092 | case 3503: /* avx512vl_testnmv2di3_mask */ |
| 42093 | case 3502: /* avx512vl_testnmv2di3 */ |
| 42094 | case 3501: /* avx512vl_testnmv4di3_mask */ |
| 42095 | case 3500: /* avx512vl_testnmv4di3 */ |
| 42096 | case 3499: /* avx512f_testnmv8di3_mask */ |
| 42097 | case 3498: /* avx512f_testnmv8di3 */ |
| 42098 | case 3497: /* avx512vl_testnmv4si3_mask */ |
| 42099 | case 3496: /* avx512vl_testnmv4si3 */ |
| 42100 | case 3495: /* avx512vl_testnmv8si3_mask */ |
| 42101 | case 3494: /* avx512vl_testnmv8si3 */ |
| 42102 | case 3493: /* avx512f_testnmv16si3_mask */ |
| 42103 | case 3492: /* avx512f_testnmv16si3 */ |
| 42104 | case 3491: /* avx512vl_testnmv8hi3_mask */ |
| 42105 | case 3490: /* avx512vl_testnmv8hi3 */ |
| 42106 | case 3489: /* avx512vl_testnmv16hi3_mask */ |
| 42107 | case 3488: /* avx512vl_testnmv16hi3 */ |
| 42108 | case 3487: /* avx512bw_testnmv32hi3_mask */ |
| 42109 | case 3486: /* avx512bw_testnmv32hi3 */ |
| 42110 | case 3485: /* avx512vl_testnmv32qi3_mask */ |
| 42111 | case 3484: /* avx512vl_testnmv32qi3 */ |
| 42112 | case 3483: /* avx512vl_testnmv16qi3_mask */ |
| 42113 | case 3482: /* avx512vl_testnmv16qi3 */ |
| 42114 | case 3481: /* avx512bw_testnmv64qi3_mask */ |
| 42115 | case 3480: /* avx512bw_testnmv64qi3 */ |
| 42116 | case 3479: /* avx512vl_testmv2di3_mask */ |
| 42117 | case 3478: /* avx512vl_testmv2di3 */ |
| 42118 | case 3477: /* avx512vl_testmv4di3_mask */ |
| 42119 | case 3476: /* avx512vl_testmv4di3 */ |
| 42120 | case 3475: /* avx512f_testmv8di3_mask */ |
| 42121 | case 3474: /* avx512f_testmv8di3 */ |
| 42122 | case 3473: /* avx512vl_testmv4si3_mask */ |
| 42123 | case 3472: /* avx512vl_testmv4si3 */ |
| 42124 | case 3471: /* avx512vl_testmv8si3_mask */ |
| 42125 | case 3470: /* avx512vl_testmv8si3 */ |
| 42126 | case 3469: /* avx512f_testmv16si3_mask */ |
| 42127 | case 3468: /* avx512f_testmv16si3 */ |
| 42128 | case 3467: /* avx512vl_testmv8hi3_mask */ |
| 42129 | case 3466: /* avx512vl_testmv8hi3 */ |
| 42130 | case 3465: /* avx512vl_testmv16hi3_mask */ |
| 42131 | case 3464: /* avx512vl_testmv16hi3 */ |
| 42132 | case 3463: /* avx512bw_testmv32hi3_mask */ |
| 42133 | case 3462: /* avx512bw_testmv32hi3 */ |
| 42134 | case 3461: /* avx512vl_testmv32qi3_mask */ |
| 42135 | case 3460: /* avx512vl_testmv32qi3 */ |
| 42136 | case 3459: /* avx512vl_testmv16qi3_mask */ |
| 42137 | case 3458: /* avx512vl_testmv16qi3 */ |
| 42138 | case 3457: /* avx512bw_testmv64qi3_mask */ |
| 42139 | case 3456: /* avx512bw_testmv64qi3 */ |
| 42140 | case 3191: /* avx512vl_rorv2di_mask */ |
| 42141 | case 3190: /* avx512vl_rorv2di */ |
| 42142 | case 3189: /* avx512vl_rolv2di_mask */ |
| 42143 | case 3188: /* avx512vl_rolv2di */ |
| 42144 | case 3187: /* avx512vl_rorv4di_mask */ |
| 42145 | case 3186: /* avx512vl_rorv4di */ |
| 42146 | case 3185: /* avx512vl_rolv4di_mask */ |
| 42147 | case 3184: /* avx512vl_rolv4di */ |
| 42148 | case 3183: /* avx512f_rorv8di_mask */ |
| 42149 | case 3182: /* avx512f_rorv8di */ |
| 42150 | case 3181: /* avx512f_rolv8di_mask */ |
| 42151 | case 3180: /* avx512f_rolv8di */ |
| 42152 | case 3179: /* avx512vl_rorv4si_mask */ |
| 42153 | case 3178: /* avx512vl_rorv4si */ |
| 42154 | case 3177: /* avx512vl_rolv4si_mask */ |
| 42155 | case 3176: /* avx512vl_rolv4si */ |
| 42156 | case 3175: /* avx512vl_rorv8si_mask */ |
| 42157 | case 3174: /* avx512vl_rorv8si */ |
| 42158 | case 3173: /* avx512vl_rolv8si_mask */ |
| 42159 | case 3172: /* avx512vl_rolv8si */ |
| 42160 | case 3171: /* avx512f_rorv16si_mask */ |
| 42161 | case 3170: /* avx512f_rorv16si */ |
| 42162 | case 3169: /* avx512f_rolv16si_mask */ |
| 42163 | case 3168: /* avx512f_rolv16si */ |
| 42164 | case 3167: /* avx512vl_rorvv2di_mask */ |
| 42165 | case 3166: /* avx512vl_rorvv2di */ |
| 42166 | case 3165: /* avx512vl_rolvv2di_mask */ |
| 42167 | case 3164: /* avx512vl_rolvv2di */ |
| 42168 | case 3163: /* avx512vl_rorvv4di_mask */ |
| 42169 | case 3162: /* avx512vl_rorvv4di */ |
| 42170 | case 3161: /* avx512vl_rolvv4di_mask */ |
| 42171 | case 3160: /* avx512vl_rolvv4di */ |
| 42172 | case 3159: /* avx512f_rorvv8di_mask */ |
| 42173 | case 3158: /* avx512f_rorvv8di */ |
| 42174 | case 3157: /* avx512f_rolvv8di_mask */ |
| 42175 | case 3156: /* avx512f_rolvv8di */ |
| 42176 | case 3155: /* avx512vl_rorvv4si_mask */ |
| 42177 | case 3154: /* avx512vl_rorvv4si */ |
| 42178 | case 3153: /* avx512vl_rolvv4si_mask */ |
| 42179 | case 3152: /* avx512vl_rolvv4si */ |
| 42180 | case 3151: /* avx512vl_rorvv8si_mask */ |
| 42181 | case 3150: /* avx512vl_rorvv8si */ |
| 42182 | case 3149: /* avx512vl_rolvv8si_mask */ |
| 42183 | case 3148: /* avx512vl_rolvv8si */ |
| 42184 | case 3147: /* avx512f_rorvv16si_mask */ |
| 42185 | case 3146: /* avx512f_rorvv16si */ |
| 42186 | case 3145: /* avx512f_rolvv16si_mask */ |
| 42187 | case 3144: /* avx512f_rolvv16si */ |
| 42188 | case 2765: /* avx512bw_us_truncatev32hiv32qi2_mask */ |
| 42189 | case 2764: /* avx512bw_truncatev32hiv32qi2_mask */ |
| 42190 | case 2763: /* avx512bw_ss_truncatev32hiv32qi2_mask */ |
| 42191 | case 2762: /* avx512bw_us_truncatev32hiv32qi2 */ |
| 42192 | case 2761: /* avx512bw_truncatev32hiv32qi2 */ |
| 42193 | case 2760: /* avx512bw_ss_truncatev32hiv32qi2 */ |
| 42194 | case 2756: /* avx512f_us_truncatev8div8si2_mask */ |
| 42195 | case 2755: /* avx512f_truncatev8div8si2_mask */ |
| 42196 | case 2754: /* avx512f_ss_truncatev8div8si2_mask */ |
| 42197 | case 2753: /* avx512f_us_truncatev16siv16hi2_mask */ |
| 42198 | case 2752: /* avx512f_truncatev16siv16hi2_mask */ |
| 42199 | case 2751: /* avx512f_ss_truncatev16siv16hi2_mask */ |
| 42200 | case 2744: /* *avx512f_us_truncatev8div8si2 */ |
| 42201 | case 2743: /* *avx512f_truncatev8div8si2 */ |
| 42202 | case 2742: /* *avx512f_ss_truncatev8div8si2 */ |
| 42203 | case 2741: /* *avx512f_us_truncatev16siv16hi2 */ |
| 42204 | case 2740: /* *avx512f_truncatev16siv16hi2 */ |
| 42205 | case 2739: /* *avx512f_ss_truncatev16siv16hi2 */ |
| 42206 | case 2704: /* avx512f_rndscalev2df_round */ |
| 42207 | case 2703: /* avx512f_rndscalev2df */ |
| 42208 | case 2702: /* avx512f_rndscalev4sf_round */ |
| 42209 | case 2701: /* avx512f_rndscalev4sf */ |
| 42210 | case 2700: /* avx512vl_rndscalev2df_mask_round */ |
| 42211 | case 2699: /* avx512vl_rndscalev2df_mask */ |
| 42212 | case 2698: /* avx512vl_rndscalev2df_round */ |
| 42213 | case 2697: /* avx512vl_rndscalev2df */ |
| 42214 | case 2696: /* avx512vl_rndscalev4df_mask_round */ |
| 42215 | case 2695: /* avx512vl_rndscalev4df_mask */ |
| 42216 | case 2694: /* avx512vl_rndscalev4df_round */ |
| 42217 | case 2693: /* avx512vl_rndscalev4df */ |
| 42218 | case 2692: /* avx512f_rndscalev8df_mask_round */ |
| 42219 | case 2691: /* avx512f_rndscalev8df_mask */ |
| 42220 | case 2690: /* avx512f_rndscalev8df_round */ |
| 42221 | case 2689: /* avx512f_rndscalev8df */ |
| 42222 | case 2688: /* avx512vl_rndscalev4sf_mask_round */ |
| 42223 | case 2687: /* avx512vl_rndscalev4sf_mask */ |
| 42224 | case 2686: /* avx512vl_rndscalev4sf_round */ |
| 42225 | case 2685: /* avx512vl_rndscalev4sf */ |
| 42226 | case 2684: /* avx512vl_rndscalev8sf_mask_round */ |
| 42227 | case 2683: /* avx512vl_rndscalev8sf_mask */ |
| 42228 | case 2682: /* avx512vl_rndscalev8sf_round */ |
| 42229 | case 2681: /* avx512vl_rndscalev8sf */ |
| 42230 | case 2680: /* avx512f_rndscalev16sf_mask_round */ |
| 42231 | case 2679: /* avx512f_rndscalev16sf_mask */ |
| 42232 | case 2678: /* avx512f_rndscalev16sf_round */ |
| 42233 | case 2677: /* avx512f_rndscalev16sf */ |
| 42234 | case 2676: /* avx512f_sfixupimmv2df_mask_round */ |
| 42235 | case 2675: /* avx512f_sfixupimmv2df_mask */ |
| 42236 | case 2674: /* avx512f_sfixupimmv4sf_mask_round */ |
| 42237 | case 2673: /* avx512f_sfixupimmv4sf_mask */ |
| 42238 | case 2672: /* avx512f_sfixupimmv2df_maskz_1_round */ |
| 42239 | case 2671: /* avx512f_sfixupimmv2df_maskz_1 */ |
| 42240 | case 2670: /* avx512f_sfixupimmv2df_round */ |
| 42241 | case 2669: /* avx512f_sfixupimmv2df */ |
| 42242 | case 2668: /* avx512f_sfixupimmv4sf_maskz_1_round */ |
| 42243 | case 2667: /* avx512f_sfixupimmv4sf_maskz_1 */ |
| 42244 | case 2666: /* avx512f_sfixupimmv4sf_round */ |
| 42245 | case 2665: /* avx512f_sfixupimmv4sf */ |
| 42246 | case 2664: /* avx512vl_fixupimmv2df_mask_round */ |
| 42247 | case 2663: /* avx512vl_fixupimmv2df_mask */ |
| 42248 | case 2662: /* avx512vl_fixupimmv4df_mask_round */ |
| 42249 | case 2661: /* avx512vl_fixupimmv4df_mask */ |
| 42250 | case 2660: /* avx512f_fixupimmv8df_mask_round */ |
| 42251 | case 2659: /* avx512f_fixupimmv8df_mask */ |
| 42252 | case 2658: /* avx512vl_fixupimmv4sf_mask_round */ |
| 42253 | case 2657: /* avx512vl_fixupimmv4sf_mask */ |
| 42254 | case 2656: /* avx512vl_fixupimmv8sf_mask_round */ |
| 42255 | case 2655: /* avx512vl_fixupimmv8sf_mask */ |
| 42256 | case 2654: /* avx512f_fixupimmv16sf_mask_round */ |
| 42257 | case 2653: /* avx512f_fixupimmv16sf_mask */ |
| 42258 | case 2652: /* avx512vl_fixupimmv2df_maskz_1_round */ |
| 42259 | case 2651: /* avx512vl_fixupimmv2df_maskz_1 */ |
| 42260 | case 2650: /* avx512vl_fixupimmv2df_round */ |
| 42261 | case 2649: /* avx512vl_fixupimmv2df */ |
| 42262 | case 2648: /* avx512vl_fixupimmv4df_maskz_1_round */ |
| 42263 | case 2647: /* avx512vl_fixupimmv4df_maskz_1 */ |
| 42264 | case 2646: /* avx512vl_fixupimmv4df_round */ |
| 42265 | case 2645: /* avx512vl_fixupimmv4df */ |
| 42266 | case 2644: /* avx512f_fixupimmv8df_maskz_1_round */ |
| 42267 | case 2643: /* avx512f_fixupimmv8df_maskz_1 */ |
| 42268 | case 2642: /* avx512f_fixupimmv8df_round */ |
| 42269 | case 2641: /* avx512f_fixupimmv8df */ |
| 42270 | case 2640: /* avx512vl_fixupimmv4sf_maskz_1_round */ |
| 42271 | case 2639: /* avx512vl_fixupimmv4sf_maskz_1 */ |
| 42272 | case 2638: /* avx512vl_fixupimmv4sf_round */ |
| 42273 | case 2637: /* avx512vl_fixupimmv4sf */ |
| 42274 | case 2636: /* avx512vl_fixupimmv8sf_maskz_1_round */ |
| 42275 | case 2635: /* avx512vl_fixupimmv8sf_maskz_1 */ |
| 42276 | case 2634: /* avx512vl_fixupimmv8sf_round */ |
| 42277 | case 2633: /* avx512vl_fixupimmv8sf */ |
| 42278 | case 2632: /* avx512f_fixupimmv16sf_maskz_1_round */ |
| 42279 | case 2631: /* avx512f_fixupimmv16sf_maskz_1 */ |
| 42280 | case 2630: /* avx512f_fixupimmv16sf_round */ |
| 42281 | case 2629: /* avx512f_fixupimmv16sf */ |
| 42282 | case 2628: /* avx512vl_alignv2di_mask */ |
| 42283 | case 2627: /* *avx512vl_alignv2di */ |
| 42284 | case 2626: /* avx512vl_alignv4di_mask */ |
| 42285 | case 2625: /* *avx512vl_alignv4di */ |
| 42286 | case 2624: /* avx512f_alignv8di_mask */ |
| 42287 | case 2623: /* *avx512f_alignv8di */ |
| 42288 | case 2622: /* avx512vl_alignv4si_mask */ |
| 42289 | case 2621: /* *avx512vl_alignv4si */ |
| 42290 | case 2620: /* avx512vl_alignv8si_mask */ |
| 42291 | case 2619: /* *avx512vl_alignv8si */ |
| 42292 | case 2618: /* avx512f_alignv16si_mask */ |
| 42293 | case 2617: /* *avx512f_alignv16si */ |
| 42294 | case 2616: /* avx512f_sgetexpv2df_round */ |
| 42295 | case 2615: /* avx512f_sgetexpv2df */ |
| 42296 | case 2614: /* avx512f_sgetexpv4sf_round */ |
| 42297 | case 2613: /* avx512f_sgetexpv4sf */ |
| 42298 | case 2612: /* avx512vl_getexpv2df_mask_round */ |
| 42299 | case 2611: /* avx512vl_getexpv2df_mask */ |
| 42300 | case 2610: /* avx512vl_getexpv2df_round */ |
| 42301 | case 2609: /* avx512vl_getexpv2df */ |
| 42302 | case 2608: /* avx512vl_getexpv4df_mask_round */ |
| 42303 | case 2607: /* avx512vl_getexpv4df_mask */ |
| 42304 | case 2606: /* avx512vl_getexpv4df_round */ |
| 42305 | case 2605: /* avx512vl_getexpv4df */ |
| 42306 | case 2604: /* avx512f_getexpv8df_mask_round */ |
| 42307 | case 2603: /* avx512f_getexpv8df_mask */ |
| 42308 | case 2602: /* avx512f_getexpv8df_round */ |
| 42309 | case 2601: /* avx512f_getexpv8df */ |
| 42310 | case 2600: /* avx512vl_getexpv4sf_mask_round */ |
| 42311 | case 2599: /* avx512vl_getexpv4sf_mask */ |
| 42312 | case 2598: /* avx512vl_getexpv4sf_round */ |
| 42313 | case 2597: /* avx512vl_getexpv4sf */ |
| 42314 | case 2596: /* avx512vl_getexpv8sf_mask_round */ |
| 42315 | case 2595: /* avx512vl_getexpv8sf_mask */ |
| 42316 | case 2594: /* avx512vl_getexpv8sf_round */ |
| 42317 | case 2593: /* avx512vl_getexpv8sf */ |
| 42318 | case 2592: /* avx512f_getexpv16sf_mask_round */ |
| 42319 | case 2591: /* avx512f_getexpv16sf_mask */ |
| 42320 | case 2590: /* avx512f_getexpv16sf_round */ |
| 42321 | case 2589: /* avx512f_getexpv16sf */ |
| 42322 | case 2570: /* avx512vl_scalefv2df_mask_round */ |
| 42323 | case 2569: /* avx512vl_scalefv2df_mask */ |
| 42324 | case 2568: /* avx512vl_scalefv2df_round */ |
| 42325 | case 2567: /* avx512vl_scalefv2df */ |
| 42326 | case 2566: /* avx512vl_scalefv4df_mask_round */ |
| 42327 | case 2565: /* avx512vl_scalefv4df_mask */ |
| 42328 | case 2564: /* avx512vl_scalefv4df_round */ |
| 42329 | case 2563: /* avx512vl_scalefv4df */ |
| 42330 | case 2562: /* avx512f_scalefv8df_mask_round */ |
| 42331 | case 2561: /* avx512f_scalefv8df_mask */ |
| 42332 | case 2560: /* avx512f_scalefv8df_round */ |
| 42333 | case 2559: /* avx512f_scalefv8df */ |
| 42334 | case 2558: /* avx512vl_scalefv4sf_mask_round */ |
| 42335 | case 2557: /* avx512vl_scalefv4sf_mask */ |
| 42336 | case 2556: /* avx512vl_scalefv4sf_round */ |
| 42337 | case 2555: /* avx512vl_scalefv4sf */ |
| 42338 | case 2554: /* avx512vl_scalefv8sf_mask_round */ |
| 42339 | case 2553: /* avx512vl_scalefv8sf_mask */ |
| 42340 | case 2552: /* avx512vl_scalefv8sf_round */ |
| 42341 | case 2551: /* avx512vl_scalefv8sf */ |
| 42342 | case 2550: /* avx512f_scalefv16sf_mask_round */ |
| 42343 | case 2549: /* avx512f_scalefv16sf_mask */ |
| 42344 | case 2548: /* avx512f_scalefv16sf_round */ |
| 42345 | case 2547: /* avx512f_scalefv16sf */ |
| 42346 | case 2546: /* avx512f_vmscalefv2df_round */ |
| 42347 | case 2545: /* avx512f_vmscalefv2df */ |
| 42348 | case 2544: /* avx512f_vmscalefv4sf_round */ |
| 42349 | case 2543: /* avx512f_vmscalefv4sf */ |
| 42350 | case 2529: /* vec_extract_lo_v32qi */ |
| 42351 | case 2527: /* vec_extract_lo_v64qi */ |
| 42352 | case 2525: /* vec_extract_lo_v16hi */ |
| 42353 | case 2523: /* vec_extract_lo_v32hi */ |
| 42354 | case 2502: /* vec_extract_lo_v16si_mask */ |
| 42355 | case 2501: /* vec_extract_lo_v16si */ |
| 42356 | case 2500: /* vec_extract_lo_v16sf_mask */ |
| 42357 | case 2499: /* vec_extract_lo_v16sf */ |
| 42358 | case 2468: /* *vec_extractv4sf_mem */ |
| 42359 | case 2466: /* *vec_extractv4sf_0 */ |
| 42360 | case 2415: /* *avx512vl_cvtmask2qv2di */ |
| 42361 | case 2414: /* *avx512vl_cvtmask2qv4di */ |
| 42362 | case 2413: /* *avx512f_cvtmask2qv8di */ |
| 42363 | case 2412: /* *avx512vl_cvtmask2dv4si */ |
| 42364 | case 2411: /* *avx512vl_cvtmask2dv8si */ |
| 42365 | case 2410: /* *avx512f_cvtmask2dv16si */ |
| 42366 | case 2409: /* *avx512vl_cvtmask2wv8hi */ |
| 42367 | case 2408: /* *avx512vl_cvtmask2wv16hi */ |
| 42368 | case 2407: /* *avx512bw_cvtmask2wv32hi */ |
| 42369 | case 2406: /* *avx512vl_cvtmask2bv32qi */ |
| 42370 | case 2405: /* *avx512vl_cvtmask2bv16qi */ |
| 42371 | case 2404: /* *avx512bw_cvtmask2bv64qi */ |
| 42372 | case 2403: /* avx512vl_cvtq2maskv2di */ |
| 42373 | case 2402: /* avx512vl_cvtq2maskv4di */ |
| 42374 | case 2401: /* avx512f_cvtq2maskv8di */ |
| 42375 | case 2400: /* avx512vl_cvtd2maskv4si */ |
| 42376 | case 2399: /* avx512vl_cvtd2maskv8si */ |
| 42377 | case 2398: /* avx512f_cvtd2maskv16si */ |
| 42378 | case 2397: /* avx512vl_cvtw2maskv8hi */ |
| 42379 | case 2396: /* avx512vl_cvtw2maskv16hi */ |
| 42380 | case 2395: /* avx512bw_cvtw2maskv32hi */ |
| 42381 | case 2394: /* avx512vl_cvtb2maskv32qi */ |
| 42382 | case 2393: /* avx512vl_cvtb2maskv16qi */ |
| 42383 | case 2392: /* avx512bw_cvtb2maskv64qi */ |
| 42384 | case 1360: /* *absnegv2df2 */ |
| 42385 | case 1359: /* *absnegv4df2 */ |
| 42386 | case 1358: /* *absnegv8df2 */ |
| 42387 | case 1357: /* *absnegv4sf2 */ |
| 42388 | case 1356: /* *absnegv8sf2 */ |
| 42389 | case 1355: /* *absnegv16sf2 */ |
| 42390 | case 1354: /* kunpckdi */ |
| 42391 | case 1353: /* kunpcksi */ |
| 42392 | case 1303: /* avx_movntv4df */ |
| 42393 | case 1302: /* avx512f_movntv8df */ |
| 42394 | case 1300: /* avx_movntv8sf */ |
| 42395 | case 1299: /* avx512f_movntv16sf */ |
| 42396 | case 1297: /* sse2_movntisi */ |
| 42397 | case 1295: /* avx_lddqu256 */ |
| 42398 | case 1294: /* movdi_to_sse */ |
| 42399 | case 1291: /* avx512vl_storev16hi_mask */ |
| 42400 | case 1290: /* avx512bw_storev32hi_mask */ |
| 42401 | case 1289: /* avx512vl_storev32qi_mask */ |
| 42402 | case 1287: /* avx512bw_storev64qi_mask */ |
| 42403 | case 1285: /* avx512vl_storev4df_mask */ |
| 42404 | case 1284: /* avx512f_storev8df_mask */ |
| 42405 | case 1282: /* avx512vl_storev8sf_mask */ |
| 42406 | case 1281: /* avx512f_storev16sf_mask */ |
| 42407 | case 1279: /* avx512vl_storev4di_mask */ |
| 42408 | case 1278: /* avx512f_storev8di_mask */ |
| 42409 | case 1276: /* avx512vl_storev8si_mask */ |
| 42410 | case 1275: /* avx512f_storev16si_mask */ |
| 42411 | case 1273: /* avx512vl_blendmv16hi */ |
| 42412 | case 1272: /* avx512bw_blendmv32hi */ |
| 42413 | case 1271: /* avx512vl_blendmv32qi */ |
| 42414 | case 1269: /* avx512bw_blendmv64qi */ |
| 42415 | case 1267: /* avx512vl_blendmv4df */ |
| 42416 | case 1266: /* avx512f_blendmv8df */ |
| 42417 | case 1264: /* avx512vl_blendmv8sf */ |
| 42418 | case 1263: /* avx512f_blendmv16sf */ |
| 42419 | case 1261: /* avx512vl_blendmv4di */ |
| 42420 | case 1260: /* avx512f_blendmv8di */ |
| 42421 | case 1258: /* avx512vl_blendmv8si */ |
| 42422 | case 1257: /* avx512f_blendmv16si */ |
| 42423 | case 1256: /* avx512vl_loadv8hi_mask */ |
| 42424 | case 1255: /* avx512vl_loadv16hi_mask */ |
| 42425 | case 1254: /* avx512bw_loadv32hi_mask */ |
| 42426 | case 1253: /* avx512vl_loadv32qi_mask */ |
| 42427 | case 1252: /* avx512vl_loadv16qi_mask */ |
| 42428 | case 1251: /* avx512bw_loadv64qi_mask */ |
| 42429 | case 1250: /* avx512vl_loadv2df_mask */ |
| 42430 | case 1249: /* avx512vl_loadv4df_mask */ |
| 42431 | case 1248: /* avx512f_loadv8df_mask */ |
| 42432 | case 1247: /* avx512vl_loadv4sf_mask */ |
| 42433 | case 1246: /* avx512vl_loadv8sf_mask */ |
| 42434 | case 1245: /* avx512f_loadv16sf_mask */ |
| 42435 | case 1244: /* avx512vl_loadv2di_mask */ |
| 42436 | case 1243: /* avx512vl_loadv4di_mask */ |
| 42437 | case 1242: /* avx512f_loadv8di_mask */ |
| 42438 | case 1241: /* avx512vl_loadv4si_mask */ |
| 42439 | case 1240: /* avx512vl_loadv8si_mask */ |
| 42440 | case 1239: /* avx512f_loadv16si_mask */ |
| 42441 | case 1217: /* *mmx_femms */ |
| 42442 | case 1216: /* *mmx_emms */ |
| 42443 | case 1209: /* *vec_extractv2si_zext_mem */ |
| 42444 | case 1207: /* *vec_extractv2si_0 */ |
| 42445 | case 1137: /* *vec_extractv2sf_0 */ |
| 42446 | case 1111: /* sse_movntq */ |
| 42447 | case 1105: /* rdpid */ |
| 42448 | case 1104: /* *wrpkru */ |
| 42449 | case 1103: /* *rdpkru */ |
| 42450 | case 1086: /* clzero_di */ |
| 42451 | case 1085: /* clzero_si */ |
| 42452 | case 1084: /* monitorx_di */ |
| 42453 | case 1083: /* monitorx_si */ |
| 42454 | case 1082: /* mwaitx */ |
| 42455 | case 1079: /* xtest_1 */ |
| 42456 | case 1078: /* xabort */ |
| 42457 | case 1077: /* xend */ |
| 42458 | case 1076: /* xbegin_1 */ |
| 42459 | case 1075: /* *pause */ |
| 42460 | case 1074: /* rdseeddi_1 */ |
| 42461 | case 1073: /* rdseedsi_1 */ |
| 42462 | case 1072: /* rdseedhi_1 */ |
| 42463 | case 1071: /* rdranddi_1 */ |
| 42464 | case 1070: /* rdrandsi_1 */ |
| 42465 | case 1069: /* rdrandhi_1 */ |
| 42466 | case 1068: /* wrgsbasedi */ |
| 42467 | case 1067: /* wrfsbasedi */ |
| 42468 | case 1066: /* wrgsbasesi */ |
| 42469 | case 1065: /* wrfsbasesi */ |
| 42470 | case 1064: /* rdgsbasedi */ |
| 42471 | case 1063: /* rdfsbasedi */ |
| 42472 | case 1062: /* rdgsbasesi */ |
| 42473 | case 1061: /* rdfsbasesi */ |
| 42474 | case 1052: /* fnclex */ |
| 42475 | case 1051: /* fnstsw */ |
| 42476 | case 1049: /* fnstenv */ |
| 42477 | case 1042: /* xsaves64 */ |
| 42478 | case 1041: /* xsavec64 */ |
| 42479 | case 1040: /* xsaveopt64 */ |
| 42480 | case 1039: /* xsave64 */ |
| 42481 | case 1038: /* xsaves_rex64 */ |
| 42482 | case 1037: /* xsavec_rex64 */ |
| 42483 | case 1036: /* xsaveopt_rex64 */ |
| 42484 | case 1035: /* xsave_rex64 */ |
| 42485 | case 1034: /* xsaves */ |
| 42486 | case 1033: /* xsavec */ |
| 42487 | case 1032: /* xsaveopt */ |
| 42488 | case 1031: /* xsave */ |
| 42489 | case 1028: /* fxsave64 */ |
| 42490 | case 1027: /* fxsave */ |
| 42491 | case 1026: /* rdtscp_rex64 */ |
| 42492 | case 1025: /* rdtscp */ |
| 42493 | case 1024: /* rdtsc_rex64 */ |
| 42494 | case 1023: /* rdtsc */ |
| 42495 | case 1022: /* rdpmc_rex64 */ |
| 42496 | case 1021: /* rdpmc */ |
| 42497 | case 1016: /* stack_tls_protect_test_di */ |
| 42498 | case 1015: /* stack_tls_protect_test_si */ |
| 42499 | case 1014: /* stack_protect_test_di */ |
| 42500 | case 1013: /* stack_protect_test_si */ |
| 42501 | case 1012: /* stack_tls_protect_set_di */ |
| 42502 | case 1011: /* stack_tls_protect_set_si */ |
| 42503 | case 1010: /* stack_protect_set_di */ |
| 42504 | case 1009: /* stack_protect_set_si */ |
| 42505 | case 1007: /* *prefetch_3dnow */ |
| 42506 | case 1005: /* trap */ |
| 42507 | case 1004: /* probe_stack_rangedi */ |
| 42508 | case 1003: /* probe_stack_rangesi */ |
| 42509 | case 1002: /* adjust_stack_and_probedi */ |
| 42510 | case 1001: /* adjust_stack_and_probesi */ |
| 42511 | case 998: /* allocate_stack_worker_probe_di */ |
| 42512 | case 997: /* allocate_stack_worker_probe_si */ |
| 42513 | case 968: /* *strlenqi_1 */ |
| 42514 | case 967: /* *strlenqi_1 */ |
| 42515 | case 966: /* *cmpstrnqi_1 */ |
| 42516 | case 965: /* *cmpstrnqi_1 */ |
| 42517 | case 964: /* *cmpstrnqi_nz_1 */ |
| 42518 | case 963: /* *cmpstrnqi_nz_1 */ |
| 42519 | case 934: /* cld */ |
| 42520 | case 933: /* movmsk_df */ |
| 42521 | case 841: /* truncxfdf2_i387_noop_unspec */ |
| 42522 | case 840: /* truncxfsf2_i387_noop_unspec */ |
| 42523 | case 811: /* *tls_dynamic_gnu2_combine_64 */ |
| 42524 | case 809: /* *tls_dynamic_gnu2_lea_64 */ |
| 42525 | case 808: /* *tls_dynamic_gnu2_combine_32 */ |
| 42526 | case 806: /* *tls_dynamic_gnu2_lea_32 */ |
| 42527 | case 797: /* *tls_local_dynamic_32_once */ |
| 42528 | case 796: /* *tls_local_dynamic_base_64_largepic */ |
| 42529 | case 795: /* *tls_local_dynamic_base_64_di */ |
| 42530 | case 794: /* *tls_local_dynamic_base_64_si */ |
| 42531 | case 793: /* *tls_local_dynamic_base_32_gnu */ |
| 42532 | case 792: /* *tls_global_dynamic_64_largepic */ |
| 42533 | case 791: /* *tls_global_dynamic_64_di */ |
| 42534 | case 790: /* *tls_global_dynamic_64_si */ |
| 42535 | case 789: /* *tls_global_dynamic_32_gnu */ |
| 42536 | case 788: /* *parityhi2_cmp */ |
| 42537 | case 787: /* paritysi2_cmp */ |
| 42538 | case 786: /* paritydi2_cmp */ |
| 42539 | case 785: /* bswaphi_lowpart */ |
| 42540 | case 784: /* *bswaphi_lowpart_1 */ |
| 42541 | case 778: /* *popcounthi2_1 */ |
| 42542 | case 706: /* ffssi2_no_cmove */ |
| 42543 | case 705: /* split_stack_return */ |
| 42544 | case 702: /* eh_return_internal */ |
| 42545 | case 700: /* set_rip_rex64 */ |
| 42546 | case 699: /* set_got_rex64 */ |
| 42547 | case 698: /* *set_got_labelled */ |
| 42548 | case 697: /* *set_got */ |
| 42549 | case 696: /* pad */ |
| 42550 | case 695: /* nops */ |
| 42551 | case 694: /* nop */ |
| 42552 | case 692: /* simple_return_pop_internal */ |
| 42553 | case 691: /* simple_return_internal_long */ |
| 42554 | case 690: /* interrupt_return */ |
| 42555 | case 689: /* simple_return_internal */ |
| 42556 | case 688: /* prologue_use */ |
| 42557 | case 687: /* *memory_blockage */ |
| 42558 | case 686: /* blockage */ |
| 42559 | case 658: /* *jccxf_si_r_i387 */ |
| 42560 | case 657: /* *jccdf_si_r_i387 */ |
| 42561 | case 656: /* *jccsf_si_r_i387 */ |
| 42562 | case 655: /* *jccxf_hi_r_i387 */ |
| 42563 | case 654: /* *jccdf_hi_r_i387 */ |
| 42564 | case 653: /* *jccsf_hi_r_i387 */ |
| 42565 | case 652: /* *jccxf_si_i387 */ |
| 42566 | case 651: /* *jccdf_si_i387 */ |
| 42567 | case 650: /* *jccsf_si_i387 */ |
| 42568 | case 649: /* *jccxf_hi_i387 */ |
| 42569 | case 648: /* *jccdf_hi_i387 */ |
| 42570 | case 647: /* *jccsf_hi_i387 */ |
| 42571 | case 646: /* *jccuxf_r_i387 */ |
| 42572 | case 645: /* *jccudf_r_i387 */ |
| 42573 | case 644: /* *jccusf_r_i387 */ |
| 42574 | case 643: /* *jccuxf_i387 */ |
| 42575 | case 642: /* *jccudf_i387 */ |
| 42576 | case 641: /* *jccusf_i387 */ |
| 42577 | case 640: /* *jccdf_r_i387 */ |
| 42578 | case 639: /* *jccsf_r_i387 */ |
| 42579 | case 638: /* *jccdf_i387 */ |
| 42580 | case 637: /* *jccsf_i387 */ |
| 42581 | case 636: /* *jccxf_r_i387 */ |
| 42582 | case 635: /* *jccxf_i387 */ |
| 42583 | case 634: /* *jccxf_0_r_i387 */ |
| 42584 | case 633: /* *jccdf_0_r_i387 */ |
| 42585 | case 632: /* *jccsf_0_r_i387 */ |
| 42586 | case 631: /* *jccxf_0_i387 */ |
| 42587 | case 630: /* *jccdf_0_i387 */ |
| 42588 | case 629: /* *jccsf_0_i387 */ |
| 42589 | case 622: /* *setcc_si_1_movzbl */ |
| 42590 | case 621: /* *setcc_si_1_and */ |
| 42591 | case 620: /* *setcc_di_1 */ |
| 42592 | case 619: /* *jcc_btdi_mask */ |
| 42593 | case 618: /* *jcc_btsi_mask */ |
| 42594 | case 617: /* *jcc_btdi_1 */ |
| 42595 | case 616: /* *jcc_btsi_1 */ |
| 42596 | case 615: /* *jcc_btdi */ |
| 42597 | case 614: /* *jcc_btsi */ |
| 42598 | case 593: /* ix86_rotrti3_doubleword */ |
| 42599 | case 592: /* ix86_rotrdi3_doubleword */ |
| 42600 | case 591: /* ix86_rotlti3_doubleword */ |
| 42601 | case 590: /* ix86_rotldi3_doubleword */ |
| 42602 | case 589: /* *rotrdi3_mask */ |
| 42603 | case 588: /* *rotldi3_mask */ |
| 42604 | case 587: /* *rotrsi3_mask */ |
| 42605 | case 586: /* *rotlsi3_mask */ |
| 42606 | case 544: /* *ashrti3_doubleword */ |
| 42607 | case 543: /* *lshrti3_doubleword */ |
| 42608 | case 542: /* *ashrdi3_doubleword */ |
| 42609 | case 541: /* *lshrdi3_doubleword */ |
| 42610 | case 540: /* *ashrdi3_mask */ |
| 42611 | case 539: /* *lshrdi3_mask */ |
| 42612 | case 538: /* *ashrsi3_mask */ |
| 42613 | case 537: /* *lshrsi3_mask */ |
| 42614 | case 518: /* *ashldi3_mask */ |
| 42615 | case 517: /* *ashlsi3_mask */ |
| 42616 | case 514: /* *ashlti3_doubleword */ |
| 42617 | case 513: /* *ashldi3_doubleword */ |
| 42618 | case 502: /* *one_cmpldi2_doubleword */ |
| 42619 | case 501: /* copysigntf3_var */ |
| 42620 | case 500: /* copysigndf3_var */ |
| 42621 | case 499: /* copysignsf3_var */ |
| 42622 | case 498: /* copysigntf3_const */ |
| 42623 | case 497: /* copysigndf3_const */ |
| 42624 | case 496: /* copysignsf3_const */ |
| 42625 | case 495: /* *negextenddfxf2 */ |
| 42626 | case 494: /* *absextenddfxf2 */ |
| 42627 | case 493: /* *negextendsfxf2 */ |
| 42628 | case 492: /* *absextendsfxf2 */ |
| 42629 | case 491: /* *negextendsfdf2 */ |
| 42630 | case 490: /* *absextendsfdf2 */ |
| 42631 | case 489: /* *negxf2_1 */ |
| 42632 | case 488: /* *absxf2_1 */ |
| 42633 | case 487: /* *negdf2_1 */ |
| 42634 | case 486: /* *absdf2_1 */ |
| 42635 | case 485: /* *negsf2_1 */ |
| 42636 | case 484: /* *abssf2_1 */ |
| 42637 | case 483: /* *absnegtf2_sse */ |
| 42638 | case 482: /* *absnegxf2_i387 */ |
| 42639 | case 481: /* *absnegdf2 */ |
| 42640 | case 480: /* *absnegsf2 */ |
| 42641 | case 465: /* *negti2_doubleword */ |
| 42642 | case 464: /* *negdi2_doubleword */ |
| 42643 | case 422: /* *xordi3_doubleword */ |
| 42644 | case 421: /* *iordi3_doubleword */ |
| 42645 | case 414: /* *andndi3_doubleword */ |
| 42646 | case 397: /* *anddi3_doubleword */ |
| 42647 | case 396: /* *testqi_ext_3 */ |
| 42648 | case 395: /* *testqi_ext_3 */ |
| 42649 | case 394: /* *testqi_ext_3 */ |
| 42650 | case 382: /* *udivmoddi4_pow2 */ |
| 42651 | case 381: /* *udivmodsi4_pow2 */ |
| 42652 | case 380: /* *udivmoddi4 */ |
| 42653 | case 379: /* *udivmodsi4 */ |
| 42654 | case 378: /* *udivmodhi4 */ |
| 42655 | case 377: /* udivmoddi4_1 */ |
| 42656 | case 376: /* udivmodsi4_1 */ |
| 42657 | case 371: /* *divmoddi4 */ |
| 42658 | case 370: /* *divmodsi4 */ |
| 42659 | case 369: /* *divmodhi4 */ |
| 42660 | case 368: /* divmoddi4_1 */ |
| 42661 | case 367: /* divmodsi4_1 */ |
| 42662 | case 270: /* *subti3_doubleword */ |
| 42663 | case 269: /* *subdi3_doubleword */ |
| 42664 | case 268: /* *leadi_general_4 */ |
| 42665 | case 267: /* *leadi_general_4 */ |
| 42666 | case 266: /* *leasi_general_4 */ |
| 42667 | case 265: /* *leasi_general_4 */ |
| 42668 | case 264: /* *leahi_general_4 */ |
| 42669 | case 263: /* *leahi_general_4 */ |
| 42670 | case 262: /* *leaqi_general_4 */ |
| 42671 | case 261: /* *leaqi_general_4 */ |
| 42672 | case 260: /* *leahi_general_3b */ |
| 42673 | case 259: /* *leaqi_general_3b */ |
| 42674 | case 258: /* *leahi_general_3 */ |
| 42675 | case 257: /* *leaqi_general_3 */ |
| 42676 | case 256: /* *leahi_general_2b */ |
| 42677 | case 255: /* *leaqi_general_2b */ |
| 42678 | case 254: /* *leahi_general_2 */ |
| 42679 | case 253: /* *leaqi_general_2 */ |
| 42680 | case 252: /* *leahi_general_1 */ |
| 42681 | case 251: /* *leaqi_general_1 */ |
| 42682 | case 216: /* *addti3_doubleword */ |
| 42683 | case 215: /* *adddi3_doubleword */ |
| 42684 | case 214: /* *leadi */ |
| 42685 | case 213: /* *leasi */ |
| 42686 | case 212: /* *floatunssixf2_i387_with_xmm */ |
| 42687 | case 211: /* *floatunssidf2_i387_with_xmm */ |
| 42688 | case 210: /* *floatunssisf2_i387_with_xmm */ |
| 42689 | case 206: /* *floatdidf2_i387 */ |
| 42690 | case 205: /* *floatdisf2_i387 */ |
| 42691 | case 204: /* *floatsidf2_i387 */ |
| 42692 | case 203: /* *floatsisf2_i387 */ |
| 42693 | case 195: /* floathidf2 */ |
| 42694 | case 194: /* floathisf2 */ |
| 42695 | case 169: /* *fixuns_truncdf_1 */ |
| 42696 | case 168: /* *fixuns_truncsf_1 */ |
| 42697 | case 167: /* *truncxfdf2_i387 */ |
| 42698 | case 166: /* *truncxfsf2_i387 */ |
| 42699 | case 165: /* truncxfdf2_i387_noop */ |
| 42700 | case 164: /* truncxfsf2_i387_noop */ |
| 42701 | case 161: /* *truncdfsf2_i387_1 */ |
| 42702 | case 158: /* *truncdfsf_fast_i387 */ |
| 42703 | case 146: /* extendsidi2_1 */ |
| 42704 | case 144: /* *zextsi_doubleword */ |
| 42705 | case 143: /* *zexthi_doubleword */ |
| 42706 | case 142: /* *zextqi_doubleword */ |
| 42707 | case 141: /* *zexthi_doubleword_and */ |
| 42708 | case 140: /* *zextqi_doubleword_and */ |
| 42709 | case 71: /* *pushfldi2 */ |
| 42710 | case 70: /* *pushflsi2 */ |
| 42711 | case 65: /* *pushdi2_prologue */ |
| 42712 | case 64: /* *pushsi2_prologue */ |
| 42713 | case 63: /* *pushhi2 */ |
| 42714 | case 62: /* *pushqi2 */ |
| 42715 | case 61: /* *pushsi2_rex64 */ |
| 42716 | case 60: /* *pushhi2_rex64 */ |
| 42717 | case 59: /* *pushqi2_rex64 */ |
| 42718 | case 58: /* *pushsi2 */ |
| 42719 | case 56: /* *pushti2 */ |
| 42720 | case 55: /* *pushdi2 */ |
| 42721 | case 48: /* x86_sahf_1 */ |
| 42722 | return 2; |
| 42723 | |
| 42724 | case 393: /* *testqi_ext_2 */ |
| 42725 | case 392: /* *testqi_ext_1 */ |
| 42726 | case 391: /* *testsi_1 */ |
| 42727 | case 390: /* *testhi_1 */ |
| 42728 | case 389: /* *testqi_1 */ |
| 42729 | case 388: /* *testqi_1_maybe_si */ |
| 42730 | case 387: /* *testdi_1 */ |
| 42731 | case 222: /* *addqi_1_slp */ |
| 42732 | case 16: /* *cmpqi_ext_4 */ |
| 42733 | case 15: /* *cmpqi_ext_3 */ |
| 42734 | case 14: /* *cmpqi_ext_2 */ |
| 42735 | case 13: /* *cmpqi_ext_1 */ |
| 42736 | case 12: /* *cmpdi_minus_1 */ |
| 42737 | case 11: /* *cmpsi_minus_1 */ |
| 42738 | case 10: /* *cmphi_minus_1 */ |
| 42739 | case 9: /* *cmpqi_minus_1 */ |
| 42740 | case 8: /* *cmpdi_1 */ |
| 42741 | case 7: /* *cmpsi_1 */ |
| 42742 | case 6: /* *cmphi_1 */ |
| 42743 | case 5: /* *cmpqi_1 */ |
| 42744 | case 4: /* *cmpdi_ccno_1 */ |
| 42745 | case 3: /* *cmpsi_ccno_1 */ |
| 42746 | case 2: /* *cmphi_ccno_1 */ |
| 42747 | case 1: /* *cmpqi_ccno_1 */ |
| 42748 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) |
| 42749 | { |
| 42750 | return 1; |
| 42751 | } |
| 42752 | else if (cached_memory == MEMORY_LOAD) |
| 42753 | { |
| 42754 | return 4; |
| 42755 | } |
| 42756 | else |
| 42757 | { |
| 42758 | return 0; |
| 42759 | } |
| 42760 | |
| 42761 | case -1: |
| 42762 | if (GET_CODE (PATTERN (insn)) != ASM_INPUT |
| 42763 | && asm_noperands (PATTERN (insn)) < 0) |
| 42764 | fatal_insn_not_found (insn); |
| 42765 | /* FALLTHRU */ |
| 42766 | case 49: /* *cmpisf */ |
| 42767 | case 50: /* *cmpidf */ |
| 42768 | case 51: /* *cmpiusf */ |
| 42769 | case 52: /* *cmpiudf */ |
| 42770 | case 57: /* *pushdi2_rex64 */ |
| 42771 | case 80: /* *movti_internal */ |
| 42772 | case 81: /* *movdi_internal */ |
| 42773 | case 82: /* *movsi_internal */ |
| 42774 | case 83: /* *movhi_internal */ |
| 42775 | case 84: /* *movqi_internal */ |
| 42776 | case 93: /* *swapsi */ |
| 42777 | case 94: /* *swapdi */ |
| 42778 | case 95: /* *swapqi */ |
| 42779 | case 96: /* *swaphi */ |
| 42780 | case 97: /* *movstrictqi_1 */ |
| 42781 | case 98: /* *movstricthi_1 */ |
| 42782 | case 101: /* *extvhi */ |
| 42783 | case 102: /* *extvsi */ |
| 42784 | case 103: /* *extzvhi */ |
| 42785 | case 104: /* *extzvsi */ |
| 42786 | case 105: /* *extzvdi */ |
| 42787 | case 106: /* *extzvqi_mem_rex64 */ |
| 42788 | case 107: /* *extzvqi */ |
| 42789 | case 108: /* insvhi_1 */ |
| 42790 | case 109: /* insvsi_1 */ |
| 42791 | case 110: /* insvdi_1 */ |
| 42792 | case 111: /* *insvqi_1_mem_rex64 */ |
| 42793 | case 112: /* *insvqi_1 */ |
| 42794 | case 113: /* *insvqi_2 */ |
| 42795 | case 114: /* *insvqi_2 */ |
| 42796 | case 115: /* *insvqi_3 */ |
| 42797 | case 116: /* *insvqi_3 */ |
| 42798 | case 122: /* *pushsf_rex64 */ |
| 42799 | case 123: /* *pushsf */ |
| 42800 | case 124: /* *movtf_internal */ |
| 42801 | case 125: /* *movxf_internal */ |
| 42802 | case 126: /* *movdf_internal */ |
| 42803 | case 127: /* *movsf_internal */ |
| 42804 | case 131: /* *zero_extendsidi2 */ |
| 42805 | case 132: /* zero_extendqidi2 */ |
| 42806 | case 133: /* zero_extendhidi2 */ |
| 42807 | case 136: /* *zero_extendqisi2 */ |
| 42808 | case 137: /* *zero_extendhisi2 */ |
| 42809 | case 139: /* *zero_extendqihi2 */ |
| 42810 | case 145: /* *extendsidi2_rex64 */ |
| 42811 | case 147: /* extendqidi2 */ |
| 42812 | case 148: /* extendhidi2 */ |
| 42813 | case 149: /* extendhisi2 */ |
| 42814 | case 150: /* *extendhisi2_zext */ |
| 42815 | case 151: /* extendqisi2 */ |
| 42816 | case 152: /* *extendqisi2_zext */ |
| 42817 | case 153: /* extendqihi2 */ |
| 42818 | case 154: /* *extendsfdf2 */ |
| 42819 | case 155: /* *extendsfxf2_i387 */ |
| 42820 | case 156: /* *extenddfxf2_i387 */ |
| 42821 | case 170: /* fix_truncsfsi_sse */ |
| 42822 | case 171: /* fix_truncsfdi_sse */ |
| 42823 | case 172: /* fix_truncdfsi_sse */ |
| 42824 | case 173: /* fix_truncdfdi_sse */ |
| 42825 | case 196: /* floathixf2 */ |
| 42826 | case 197: /* floatsixf2 */ |
| 42827 | case 198: /* floatdixf2 */ |
| 42828 | case 217: /* *addsi_1 */ |
| 42829 | case 218: /* *adddi_1 */ |
| 42830 | case 219: /* addsi_1_zext */ |
| 42831 | case 220: /* *addhi_1 */ |
| 42832 | case 221: /* *addqi_1 */ |
| 42833 | case 223: /* *addqi_2 */ |
| 42834 | case 224: /* *addhi_2 */ |
| 42835 | case 225: /* *addsi_2 */ |
| 42836 | case 226: /* *adddi_2 */ |
| 42837 | case 227: /* *addsi_2_zext */ |
| 42838 | case 228: /* *addqi_3 */ |
| 42839 | case 229: /* *addhi_3 */ |
| 42840 | case 230: /* *addsi_3 */ |
| 42841 | case 231: /* *adddi_3 */ |
| 42842 | case 232: /* *addsi_3_zext */ |
| 42843 | case 233: /* *adddi_4 */ |
| 42844 | case 234: /* *addqi_4 */ |
| 42845 | case 235: /* *addhi_4 */ |
| 42846 | case 236: /* *addsi_4 */ |
| 42847 | case 237: /* *addqi_5 */ |
| 42848 | case 238: /* *addhi_5 */ |
| 42849 | case 239: /* *addsi_5 */ |
| 42850 | case 240: /* *adddi_5 */ |
| 42851 | case 241: /* addqi_ext_1 */ |
| 42852 | case 242: /* *addqi_ext_2 */ |
| 42853 | case 243: /* *addvqi4 */ |
| 42854 | case 244: /* *addvhi4 */ |
| 42855 | case 245: /* *addvsi4 */ |
| 42856 | case 246: /* *addvdi4 */ |
| 42857 | case 247: /* *addvqi4_1 */ |
| 42858 | case 248: /* *addvhi4_1 */ |
| 42859 | case 249: /* *addvsi4_1 */ |
| 42860 | case 250: /* *addvdi4_1 */ |
| 42861 | case 271: /* *subqi_1 */ |
| 42862 | case 272: /* *subhi_1 */ |
| 42863 | case 273: /* *subsi_1 */ |
| 42864 | case 274: /* *subdi_1 */ |
| 42865 | case 275: /* *subsi_1_zext */ |
| 42866 | case 277: /* *subqi_2 */ |
| 42867 | case 278: /* *subhi_2 */ |
| 42868 | case 279: /* *subsi_2 */ |
| 42869 | case 280: /* *subdi_2 */ |
| 42870 | case 281: /* *subsi_2_zext */ |
| 42871 | case 282: /* *subvqi4 */ |
| 42872 | case 283: /* *subvhi4 */ |
| 42873 | case 284: /* *subvsi4 */ |
| 42874 | case 285: /* *subvdi4 */ |
| 42875 | case 286: /* *subvqi4_1 */ |
| 42876 | case 287: /* *subvhi4_1 */ |
| 42877 | case 288: /* *subvsi4_1 */ |
| 42878 | case 289: /* *subvdi4_1 */ |
| 42879 | case 290: /* *subqi_3 */ |
| 42880 | case 291: /* *subhi_3 */ |
| 42881 | case 292: /* *subsi_3 */ |
| 42882 | case 293: /* *subdi_3 */ |
| 42883 | case 294: /* *subsi_3_zext */ |
| 42884 | case 295: /* addqi3_carry */ |
| 42885 | case 296: /* addhi3_carry */ |
| 42886 | case 297: /* addsi3_carry */ |
| 42887 | case 298: /* adddi3_carry */ |
| 42888 | case 299: /* *addqi3_carry_0 */ |
| 42889 | case 300: /* *addhi3_carry_0 */ |
| 42890 | case 301: /* *addsi3_carry_0 */ |
| 42891 | case 302: /* *adddi3_carry_0 */ |
| 42892 | case 303: /* *addsi3_carry_zext */ |
| 42893 | case 304: /* *addsi3_carry_zext_0 */ |
| 42894 | case 305: /* addcarrysi */ |
| 42895 | case 306: /* addcarrydi */ |
| 42896 | case 307: /* subqi3_carry */ |
| 42897 | case 308: /* subhi3_carry */ |
| 42898 | case 309: /* subsi3_carry */ |
| 42899 | case 310: /* subdi3_carry */ |
| 42900 | case 311: /* *subqi3_carry_0 */ |
| 42901 | case 312: /* *subhi3_carry_0 */ |
| 42902 | case 313: /* *subsi3_carry_0 */ |
| 42903 | case 314: /* *subdi3_carry_0 */ |
| 42904 | case 315: /* *subsi3_carry_zext */ |
| 42905 | case 316: /* *subsi3_carry_zext_0 */ |
| 42906 | case 317: /* subborrowsi */ |
| 42907 | case 318: /* subborrowdi */ |
| 42908 | case 319: /* *addqi3_cconly_overflow_1 */ |
| 42909 | case 320: /* *addhi3_cconly_overflow_1 */ |
| 42910 | case 321: /* *addsi3_cconly_overflow_1 */ |
| 42911 | case 322: /* *adddi3_cconly_overflow_1 */ |
| 42912 | case 323: /* *addqi3_cc_overflow_1 */ |
| 42913 | case 324: /* *addhi3_cc_overflow_1 */ |
| 42914 | case 325: /* *addsi3_cc_overflow_1 */ |
| 42915 | case 326: /* *adddi3_cc_overflow_1 */ |
| 42916 | case 327: /* *addsi3_zext_cc_overflow_1 */ |
| 42917 | case 328: /* *addqi3_cconly_overflow_2 */ |
| 42918 | case 329: /* *addhi3_cconly_overflow_2 */ |
| 42919 | case 330: /* *addsi3_cconly_overflow_2 */ |
| 42920 | case 331: /* *adddi3_cconly_overflow_2 */ |
| 42921 | case 332: /* *addqi3_cc_overflow_2 */ |
| 42922 | case 333: /* *addhi3_cc_overflow_2 */ |
| 42923 | case 334: /* *addsi3_cc_overflow_2 */ |
| 42924 | case 335: /* *adddi3_cc_overflow_2 */ |
| 42925 | case 336: /* *addsi3_zext_cc_overflow_2 */ |
| 42926 | case 337: /* *mulhi3_1 */ |
| 42927 | case 338: /* *mulsi3_1 */ |
| 42928 | case 339: /* *muldi3_1 */ |
| 42929 | case 340: /* *mulsi3_1_zext */ |
| 42930 | case 341: /* *mulqi3_1 */ |
| 42931 | case 342: /* *mulvsi4 */ |
| 42932 | case 343: /* *mulvdi4 */ |
| 42933 | case 344: /* *mulvhi4 */ |
| 42934 | case 345: /* *mulvhi4_1 */ |
| 42935 | case 346: /* *mulvsi4_1 */ |
| 42936 | case 347: /* *mulvdi4_1 */ |
| 42937 | case 348: /* *umulvhi4 */ |
| 42938 | case 349: /* *umulvsi4 */ |
| 42939 | case 350: /* *umulvdi4 */ |
| 42940 | case 351: /* *mulvqi4 */ |
| 42941 | case 352: /* *umulvqi4 */ |
| 42942 | case 353: /* *bmi2_umulsidi3_1 */ |
| 42943 | case 354: /* *bmi2_umulditi3_1 */ |
| 42944 | case 355: /* *umulsidi3_1 */ |
| 42945 | case 356: /* *umulditi3_1 */ |
| 42946 | case 357: /* *mulsidi3_1 */ |
| 42947 | case 358: /* *mulditi3_1 */ |
| 42948 | case 359: /* *mulqihi3_1 */ |
| 42949 | case 360: /* *umulqihi3_1 */ |
| 42950 | case 361: /* *smuldi3_highpart_1 */ |
| 42951 | case 362: /* *umuldi3_highpart_1 */ |
| 42952 | case 363: /* *smulsi3_highpart_zext */ |
| 42953 | case 364: /* *umulsi3_highpart_zext */ |
| 42954 | case 365: /* *smulsi3_highpart_1 */ |
| 42955 | case 366: /* *umulsi3_highpart_1 */ |
| 42956 | case 372: /* *divmodhi4_noext */ |
| 42957 | case 373: /* *divmodsi4_noext */ |
| 42958 | case 374: /* *divmoddi4_noext */ |
| 42959 | case 375: /* divmodhiqi3 */ |
| 42960 | case 383: /* *udivmodhi4_noext */ |
| 42961 | case 384: /* *udivmodsi4_noext */ |
| 42962 | case 385: /* *udivmoddi4_noext */ |
| 42963 | case 386: /* udivmodhiqi3 */ |
| 42964 | case 398: /* *anddi_1 */ |
| 42965 | case 399: /* *andsi_1_zext */ |
| 42966 | case 400: /* *andhi_1 */ |
| 42967 | case 401: /* *andsi_1 */ |
| 42968 | case 402: /* *andqi_1 */ |
| 42969 | case 404: /* *anddi_2 */ |
| 42970 | case 405: /* *andsi_2_zext */ |
| 42971 | case 406: /* *andqi_2_maybe_si */ |
| 42972 | case 407: /* *andqi_2 */ |
| 42973 | case 408: /* *andhi_2 */ |
| 42974 | case 409: /* *andsi_2 */ |
| 42975 | case 411: /* andqi_ext_1 */ |
| 42976 | case 412: /* *andqi_ext_1_cc */ |
| 42977 | case 413: /* *andqi_ext_2 */ |
| 42978 | case 415: /* *andnsi_1 */ |
| 42979 | case 416: /* *andndi_1 */ |
| 42980 | case 417: /* *andnqi_1 */ |
| 42981 | case 418: /* *andnhi_1 */ |
| 42982 | case 419: /* *andn_si_ccno */ |
| 42983 | case 420: /* *andn_di_ccno */ |
| 42984 | case 423: /* *iorhi_1 */ |
| 42985 | case 424: /* *xorhi_1 */ |
| 42986 | case 425: /* *iorsi_1 */ |
| 42987 | case 426: /* *xorsi_1 */ |
| 42988 | case 427: /* *iordi_1 */ |
| 42989 | case 428: /* *xordi_1 */ |
| 42990 | case 429: /* *iorsi_1_zext */ |
| 42991 | case 430: /* *xorsi_1_zext */ |
| 42992 | case 431: /* *iorsi_1_zext_imm */ |
| 42993 | case 432: /* *xorsi_1_zext_imm */ |
| 42994 | case 433: /* *iorqi_1 */ |
| 42995 | case 434: /* *xorqi_1 */ |
| 42996 | case 437: /* *iorqi_2 */ |
| 42997 | case 438: /* *xorqi_2 */ |
| 42998 | case 439: /* *iorhi_2 */ |
| 42999 | case 440: /* *xorhi_2 */ |
| 43000 | case 441: /* *iorsi_2 */ |
| 43001 | case 442: /* *xorsi_2 */ |
| 43002 | case 443: /* *iordi_2 */ |
| 43003 | case 444: /* *xordi_2 */ |
| 43004 | case 445: /* *iorsi_2_zext */ |
| 43005 | case 446: /* *xorsi_2_zext */ |
| 43006 | case 447: /* *iorsi_2_zext_imm */ |
| 43007 | case 448: /* *xorsi_2_zext_imm */ |
| 43008 | case 451: /* *iorqi_3 */ |
| 43009 | case 452: /* *xorqi_3 */ |
| 43010 | case 453: /* *iorhi_3 */ |
| 43011 | case 454: /* *xorhi_3 */ |
| 43012 | case 455: /* *iorsi_3 */ |
| 43013 | case 456: /* *xorsi_3 */ |
| 43014 | case 457: /* *iordi_3 */ |
| 43015 | case 458: /* *xordi_3 */ |
| 43016 | case 459: /* *iorqi_ext_1 */ |
| 43017 | case 460: /* *xorqi_ext_1 */ |
| 43018 | case 461: /* *iorqi_ext_2 */ |
| 43019 | case 462: /* *xorqi_ext_2 */ |
| 43020 | case 463: /* *xorqi_ext_1_cc */ |
| 43021 | case 515: /* x86_64_shld */ |
| 43022 | case 516: /* x86_shld */ |
| 43023 | case 519: /* *bmi2_ashlsi3_1 */ |
| 43024 | case 520: /* *bmi2_ashldi3_1 */ |
| 43025 | case 521: /* *ashlsi3_1 */ |
| 43026 | case 522: /* *ashldi3_1 */ |
| 43027 | case 523: /* *bmi2_ashlsi3_1_zext */ |
| 43028 | case 524: /* *ashlsi3_1_zext */ |
| 43029 | case 525: /* *ashlhi3_1 */ |
| 43030 | case 526: /* *ashlqi3_1 */ |
| 43031 | case 527: /* *ashlqi3_1_slp */ |
| 43032 | case 528: /* *ashlqi3_cmp */ |
| 43033 | case 529: /* *ashlhi3_cmp */ |
| 43034 | case 530: /* *ashlsi3_cmp */ |
| 43035 | case 531: /* *ashldi3_cmp */ |
| 43036 | case 532: /* *ashlsi3_cmp_zext */ |
| 43037 | case 533: /* *ashlqi3_cconly */ |
| 43038 | case 534: /* *ashlhi3_cconly */ |
| 43039 | case 535: /* *ashlsi3_cconly */ |
| 43040 | case 536: /* *ashldi3_cconly */ |
| 43041 | case 545: /* x86_64_shrd */ |
| 43042 | case 546: /* x86_shrd */ |
| 43043 | case 547: /* ashrdi3_cvt */ |
| 43044 | case 548: /* *ashrsi3_cvt_zext */ |
| 43045 | case 549: /* ashrsi3_cvt */ |
| 43046 | case 550: /* *bmi2_lshrsi3_1 */ |
| 43047 | case 551: /* *bmi2_ashrsi3_1 */ |
| 43048 | case 552: /* *bmi2_lshrdi3_1 */ |
| 43049 | case 553: /* *bmi2_ashrdi3_1 */ |
| 43050 | case 554: /* *lshrsi3_1 */ |
| 43051 | case 555: /* *ashrsi3_1 */ |
| 43052 | case 556: /* *lshrdi3_1 */ |
| 43053 | case 557: /* *ashrdi3_1 */ |
| 43054 | case 558: /* *bmi2_lshrsi3_1_zext */ |
| 43055 | case 559: /* *bmi2_ashrsi3_1_zext */ |
| 43056 | case 560: /* *lshrsi3_1_zext */ |
| 43057 | case 561: /* *ashrsi3_1_zext */ |
| 43058 | case 562: /* *lshrqi3_1 */ |
| 43059 | case 563: /* *ashrqi3_1 */ |
| 43060 | case 564: /* *lshrhi3_1 */ |
| 43061 | case 565: /* *ashrhi3_1 */ |
| 43062 | case 568: /* *lshrqi3_cmp */ |
| 43063 | case 569: /* *ashrqi3_cmp */ |
| 43064 | case 570: /* *lshrhi3_cmp */ |
| 43065 | case 571: /* *ashrhi3_cmp */ |
| 43066 | case 572: /* *lshrsi3_cmp */ |
| 43067 | case 573: /* *ashrsi3_cmp */ |
| 43068 | case 574: /* *lshrdi3_cmp */ |
| 43069 | case 575: /* *ashrdi3_cmp */ |
| 43070 | case 576: /* *lshrsi3_cmp_zext */ |
| 43071 | case 577: /* *ashrsi3_cmp_zext */ |
| 43072 | case 578: /* *lshrqi3_cconly */ |
| 43073 | case 579: /* *ashrqi3_cconly */ |
| 43074 | case 580: /* *lshrhi3_cconly */ |
| 43075 | case 581: /* *ashrhi3_cconly */ |
| 43076 | case 582: /* *lshrsi3_cconly */ |
| 43077 | case 583: /* *ashrsi3_cconly */ |
| 43078 | case 584: /* *lshrdi3_cconly */ |
| 43079 | case 585: /* *ashrdi3_cconly */ |
| 43080 | case 594: /* *bmi2_rorxsi3_1 */ |
| 43081 | case 595: /* *bmi2_rorxdi3_1 */ |
| 43082 | case 596: /* *rotlsi3_1 */ |
| 43083 | case 597: /* *rotrsi3_1 */ |
| 43084 | case 598: /* *rotldi3_1 */ |
| 43085 | case 599: /* *rotrdi3_1 */ |
| 43086 | case 600: /* *bmi2_rorxsi3_1_zext */ |
| 43087 | case 601: /* *rotlsi3_1_zext */ |
| 43088 | case 602: /* *rotrsi3_1_zext */ |
| 43089 | case 603: /* *rotlqi3_1 */ |
| 43090 | case 604: /* *rotrqi3_1 */ |
| 43091 | case 605: /* *rotlhi3_1 */ |
| 43092 | case 606: /* *rotrhi3_1 */ |
| 43093 | case 660: /* *indirect_jump */ |
| 43094 | case 661: /* *indirect_jump */ |
| 43095 | case 662: /* *tablejump_1 */ |
| 43096 | case 663: /* *tablejump_1 */ |
| 43097 | case 693: /* simple_return_indirect_internal */ |
| 43098 | case 701: /* set_got_offset_rex64 */ |
| 43099 | case 720: /* clzsi2_lzcnt */ |
| 43100 | case 721: /* clzdi2_lzcnt */ |
| 43101 | case 722: /* *clzsi2_lzcnt_falsedep */ |
| 43102 | case 723: /* *clzdi2_lzcnt_falsedep */ |
| 43103 | case 725: /* lzcnt_si */ |
| 43104 | case 727: /* lzcnt_di */ |
| 43105 | case 729: /* *lzcnt_si_falsedep */ |
| 43106 | case 731: /* *lzcnt_di_falsedep */ |
| 43107 | case 733: /* lzcnt_hi */ |
| 43108 | case 734: /* bmi_bextr_si */ |
| 43109 | case 735: /* bmi_bextr_di */ |
| 43110 | case 736: /* *bmi_bextr_si_ccz */ |
| 43111 | case 737: /* *bmi_bextr_di_ccz */ |
| 43112 | case 738: /* *bmi_blsi_si */ |
| 43113 | case 739: /* *bmi_blsi_di */ |
| 43114 | case 740: /* *bmi_blsmsk_si */ |
| 43115 | case 741: /* *bmi_blsmsk_di */ |
| 43116 | case 742: /* *bmi_blsr_si */ |
| 43117 | case 743: /* *bmi_blsr_di */ |
| 43118 | case 744: /* *bmi2_bzhi_si3 */ |
| 43119 | case 745: /* *bmi2_bzhi_di3 */ |
| 43120 | case 746: /* *bmi2_bzhi_si3_1 */ |
| 43121 | case 747: /* *bmi2_bzhi_di3_1 */ |
| 43122 | case 748: /* *bmi2_bzhi_si3_1_ccz */ |
| 43123 | case 749: /* *bmi2_bzhi_di3_1_ccz */ |
| 43124 | case 750: /* bmi2_pdep_si3 */ |
| 43125 | case 751: /* bmi2_pdep_di3 */ |
| 43126 | case 752: /* bmi2_pext_si3 */ |
| 43127 | case 753: /* bmi2_pext_di3 */ |
| 43128 | case 754: /* tbm_bextri_si */ |
| 43129 | case 755: /* tbm_bextri_di */ |
| 43130 | case 756: /* *tbm_blcfill_si */ |
| 43131 | case 757: /* *tbm_blcfill_di */ |
| 43132 | case 758: /* *tbm_blci_si */ |
| 43133 | case 759: /* *tbm_blci_di */ |
| 43134 | case 760: /* *tbm_blcic_si */ |
| 43135 | case 761: /* *tbm_blcic_di */ |
| 43136 | case 762: /* *tbm_blcmsk_si */ |
| 43137 | case 763: /* *tbm_blcmsk_di */ |
| 43138 | case 764: /* *tbm_blcs_si */ |
| 43139 | case 765: /* *tbm_blcs_di */ |
| 43140 | case 766: /* *tbm_blsfill_si */ |
| 43141 | case 767: /* *tbm_blsfill_di */ |
| 43142 | case 768: /* *tbm_blsic_si */ |
| 43143 | case 769: /* *tbm_blsic_di */ |
| 43144 | case 770: /* *tbm_t1mskc_si */ |
| 43145 | case 771: /* *tbm_t1mskc_di */ |
| 43146 | case 772: /* *tbm_tzmsk_si */ |
| 43147 | case 773: /* *tbm_tzmsk_di */ |
| 43148 | case 774: /* popcountsi2 */ |
| 43149 | case 775: /* popcountdi2 */ |
| 43150 | case 776: /* *popcountsi2_falsedep */ |
| 43151 | case 777: /* *popcountdi2_falsedep */ |
| 43152 | case 779: /* popcounthi2 */ |
| 43153 | case 780: /* *bswapsi2_movbe */ |
| 43154 | case 781: /* *bswapdi2_movbe */ |
| 43155 | case 782: /* *bswapsi2 */ |
| 43156 | case 783: /* *bswapdi2 */ |
| 43157 | case 812: /* *fop_sf_comm */ |
| 43158 | case 813: /* *fop_df_comm */ |
| 43159 | case 815: /* *fop_sf_1 */ |
| 43160 | case 816: /* *fop_df_1 */ |
| 43161 | case 817: /* *fop_sf_2_i387 */ |
| 43162 | case 818: /* *fop_df_2_i387 */ |
| 43163 | case 819: /* *fop_sf_2_i387 */ |
| 43164 | case 820: /* *fop_df_2_i387 */ |
| 43165 | case 821: /* *fop_sf_3_i387 */ |
| 43166 | case 822: /* *fop_df_3_i387 */ |
| 43167 | case 823: /* *fop_sf_3_i387 */ |
| 43168 | case 824: /* *fop_df_3_i387 */ |
| 43169 | case 825: /* *fop_df_4_i387 */ |
| 43170 | case 826: /* *fop_df_5_i387 */ |
| 43171 | case 827: /* *fop_df_6_i387 */ |
| 43172 | case 828: /* *fop_xf_comm_i387 */ |
| 43173 | case 829: /* *fop_xf_1_i387 */ |
| 43174 | case 830: /* *fop_xf_2_i387 */ |
| 43175 | case 831: /* *fop_xf_2_i387 */ |
| 43176 | case 832: /* *fop_xf_3_i387 */ |
| 43177 | case 833: /* *fop_xf_3_i387 */ |
| 43178 | case 834: /* *fop_xf_4_i387 */ |
| 43179 | case 835: /* *fop_xf_4_i387 */ |
| 43180 | case 836: /* *fop_xf_5_i387 */ |
| 43181 | case 837: /* *fop_xf_5_i387 */ |
| 43182 | case 838: /* *fop_xf_6_i387 */ |
| 43183 | case 839: /* *fop_xf_6_i387 */ |
| 43184 | case 975: /* *movhicc_noc */ |
| 43185 | case 976: /* *movsicc_noc */ |
| 43186 | case 977: /* *movdicc_noc */ |
| 43187 | case 978: /* *movsicc_noc_zext */ |
| 43188 | case 979: /* *movqicc_noc */ |
| 43189 | case 981: /* *movdfcc_1 */ |
| 43190 | case 982: /* *movsfcc_1_387 */ |
| 43191 | case 993: /* pro_epilogue_adjust_stack_si_add */ |
| 43192 | case 994: /* pro_epilogue_adjust_stack_di_add */ |
| 43193 | case 995: /* pro_epilogue_adjust_stack_si_sub */ |
| 43194 | case 996: /* pro_epilogue_adjust_stack_di_sub */ |
| 43195 | case 1089: /* *movbnd32_internal_mpx */ |
| 43196 | case 1090: /* *movbnd64_internal_mpx */ |
| 43197 | case 1101: /* move_size_reloc_si */ |
| 43198 | case 1102: /* move_size_reloc_di */ |
| 43199 | case 1106: /* *movv8qi_internal */ |
| 43200 | case 1107: /* *movv4hi_internal */ |
| 43201 | case 1108: /* *movv2si_internal */ |
| 43202 | case 1109: /* *movv1di_internal */ |
| 43203 | case 1110: /* *movv2sf_internal */ |
| 43204 | case 1136: /* *mmx_concatv2sf */ |
| 43205 | case 1138: /* *vec_extractv2sf_1 */ |
| 43206 | case 1206: /* *mmx_concatv2si */ |
| 43207 | case 1208: /* *vec_extractv2si_1 */ |
| 43208 | case 1218: /* movv64qi_internal */ |
| 43209 | case 1219: /* movv32qi_internal */ |
| 43210 | case 1220: /* movv16qi_internal */ |
| 43211 | case 1221: /* movv32hi_internal */ |
| 43212 | case 1222: /* movv16hi_internal */ |
| 43213 | case 1223: /* movv8hi_internal */ |
| 43214 | case 1224: /* movv16si_internal */ |
| 43215 | case 1225: /* movv8si_internal */ |
| 43216 | case 1226: /* movv4si_internal */ |
| 43217 | case 1227: /* movv8di_internal */ |
| 43218 | case 1228: /* movv4di_internal */ |
| 43219 | case 1229: /* movv2di_internal */ |
| 43220 | case 1230: /* movv4ti_internal */ |
| 43221 | case 1231: /* movv2ti_internal */ |
| 43222 | case 1232: /* movv1ti_internal */ |
| 43223 | case 1233: /* movv16sf_internal */ |
| 43224 | case 1234: /* movv8sf_internal */ |
| 43225 | case 1235: /* movv4sf_internal */ |
| 43226 | case 1236: /* movv8df_internal */ |
| 43227 | case 1237: /* movv4df_internal */ |
| 43228 | case 1238: /* movv2df_internal */ |
| 43229 | case 1259: /* avx512vl_blendmv4si */ |
| 43230 | case 1262: /* avx512vl_blendmv2di */ |
| 43231 | case 1265: /* avx512vl_blendmv4sf */ |
| 43232 | case 1268: /* avx512vl_blendmv2df */ |
| 43233 | case 1270: /* avx512vl_blendmv16qi */ |
| 43234 | case 1274: /* avx512vl_blendmv8hi */ |
| 43235 | case 1293: /* sse2_movq128 */ |
| 43236 | case 1296: /* sse3_lddqu */ |
| 43237 | case 1301: /* sse_movntv4sf */ |
| 43238 | case 1304: /* sse2_movntv2df */ |
| 43239 | case 1308: /* kandqi */ |
| 43240 | case 1309: /* kiorqi */ |
| 43241 | case 1310: /* kxorqi */ |
| 43242 | case 1311: /* kandhi */ |
| 43243 | case 1312: /* kiorhi */ |
| 43244 | case 1313: /* kxorhi */ |
| 43245 | case 1314: /* kandsi */ |
| 43246 | case 1315: /* kiorsi */ |
| 43247 | case 1316: /* kxorsi */ |
| 43248 | case 1317: /* kanddi */ |
| 43249 | case 1318: /* kiordi */ |
| 43250 | case 1319: /* kxordi */ |
| 43251 | case 1320: /* kandnqi */ |
| 43252 | case 1321: /* kandnhi */ |
| 43253 | case 1322: /* kandnsi */ |
| 43254 | case 1323: /* kandndi */ |
| 43255 | case 1324: /* kxnorqi */ |
| 43256 | case 1325: /* kxnorhi */ |
| 43257 | case 1326: /* kxnorsi */ |
| 43258 | case 1327: /* kxnordi */ |
| 43259 | case 1328: /* knotqi */ |
| 43260 | case 1329: /* knothi */ |
| 43261 | case 1330: /* knotsi */ |
| 43262 | case 1331: /* knotdi */ |
| 43263 | case 1332: /* kaddqi */ |
| 43264 | case 1333: /* kaddhi */ |
| 43265 | case 1334: /* kaddsi */ |
| 43266 | case 1335: /* kadddi */ |
| 43267 | case 1336: /* kashiftqi */ |
| 43268 | case 1337: /* klshiftrtqi */ |
| 43269 | case 1338: /* kashifthi */ |
| 43270 | case 1339: /* klshiftrthi */ |
| 43271 | case 1340: /* kashiftsi */ |
| 43272 | case 1341: /* klshiftrtsi */ |
| 43273 | case 1342: /* kashiftdi */ |
| 43274 | case 1343: /* klshiftrtdi */ |
| 43275 | case 1344: /* ktestqi */ |
| 43276 | case 1345: /* ktesthi */ |
| 43277 | case 1346: /* ktestsi */ |
| 43278 | case 1347: /* ktestdi */ |
| 43279 | case 1348: /* kortestqi */ |
| 43280 | case 1349: /* kortesthi */ |
| 43281 | case 1350: /* kortestsi */ |
| 43282 | case 1351: /* kortestdi */ |
| 43283 | case 1352: /* kunpckhi */ |
| 43284 | case 2106: /* sse_cvtsi2ss */ |
| 43285 | case 2107: /* sse_cvtsi2ss_round */ |
| 43286 | case 2108: /* sse_cvtsi2ssq */ |
| 43287 | case 2109: /* sse_cvtsi2ssq_round */ |
| 43288 | case 2418: /* sse_movhlps */ |
| 43289 | case 2419: /* sse_movlhps */ |
| 43290 | case 2449: /* sse_storehps */ |
| 43291 | case 2450: /* sse_loadhps */ |
| 43292 | case 2451: /* sse_storelps */ |
| 43293 | case 2459: /* *vec_concatv2sf_sse4_1 */ |
| 43294 | case 2460: /* *vec_concatv2sf_sse */ |
| 43295 | case 2461: /* *vec_concatv4sf */ |
| 43296 | case 2462: /* vec_setv4si_0 */ |
| 43297 | case 2463: /* vec_setv4sf_0 */ |
| 43298 | case 2467: /* *sse4_1_extractps */ |
| 43299 | case 2726: /* sse2_storehpd */ |
| 43300 | case 2727: /* *vec_extractv2df_1_sse */ |
| 43301 | case 2728: /* sse2_storelpd */ |
| 43302 | case 2729: /* *vec_extractv2df_0_sse */ |
| 43303 | case 2730: /* sse2_loadhpd */ |
| 43304 | case 2731: /* sse2_loadlpd */ |
| 43305 | case 2735: /* vec_concatv2df */ |
| 43306 | case 2784: /* *avx512vl_ss_truncatev4div4qi2 */ |
| 43307 | case 2785: /* *avx512vl_truncatev4div4qi2 */ |
| 43308 | case 2786: /* *avx512vl_us_truncatev4div4qi2 */ |
| 43309 | case 2787: /* *avx512vl_ss_truncatev2div2qi2 */ |
| 43310 | case 2788: /* *avx512vl_truncatev2div2qi2 */ |
| 43311 | case 2789: /* *avx512vl_us_truncatev2div2qi2 */ |
| 43312 | case 2790: /* *avx512vl_ss_truncatev8siv8qi2 */ |
| 43313 | case 2791: /* *avx512vl_truncatev8siv8qi2 */ |
| 43314 | case 2792: /* *avx512vl_us_truncatev8siv8qi2 */ |
| 43315 | case 2793: /* *avx512vl_ss_truncatev4siv4qi2 */ |
| 43316 | case 2794: /* *avx512vl_truncatev4siv4qi2 */ |
| 43317 | case 2795: /* *avx512vl_us_truncatev4siv4qi2 */ |
| 43318 | case 2796: /* *avx512vl_ss_truncatev8hiv8qi2 */ |
| 43319 | case 2797: /* *avx512vl_truncatev8hiv8qi2 */ |
| 43320 | case 2798: /* *avx512vl_us_truncatev8hiv8qi2 */ |
| 43321 | case 2802: /* avx512vl_ss_truncatev2div2qi2_mask */ |
| 43322 | case 2803: /* avx512vl_truncatev2div2qi2_mask */ |
| 43323 | case 2804: /* avx512vl_us_truncatev2div2qi2_mask */ |
| 43324 | case 2805: /* *avx512vl_ss_truncatev2div2qi2_mask_1 */ |
| 43325 | case 2806: /* *avx512vl_truncatev2div2qi2_mask_1 */ |
| 43326 | case 2807: /* *avx512vl_us_truncatev2div2qi2_mask_1 */ |
| 43327 | case 2817: /* avx512vl_ss_truncatev4siv4qi2_mask */ |
| 43328 | case 2818: /* avx512vl_truncatev4siv4qi2_mask */ |
| 43329 | case 2819: /* avx512vl_us_truncatev4siv4qi2_mask */ |
| 43330 | case 2820: /* avx512vl_ss_truncatev4div4qi2_mask */ |
| 43331 | case 2821: /* avx512vl_truncatev4div4qi2_mask */ |
| 43332 | case 2822: /* avx512vl_us_truncatev4div4qi2_mask */ |
| 43333 | case 2823: /* *avx512vl_ss_truncatev4siv4qi2_mask_1 */ |
| 43334 | case 2824: /* *avx512vl_truncatev4siv4qi2_mask_1 */ |
| 43335 | case 2825: /* *avx512vl_us_truncatev4siv4qi2_mask_1 */ |
| 43336 | case 2826: /* *avx512vl_ss_truncatev4div4qi2_mask_1 */ |
| 43337 | case 2827: /* *avx512vl_truncatev4div4qi2_mask_1 */ |
| 43338 | case 2828: /* *avx512vl_us_truncatev4div4qi2_mask_1 */ |
| 43339 | case 2841: /* avx512vl_ss_truncatev8hiv8qi2_mask */ |
| 43340 | case 2842: /* avx512vl_truncatev8hiv8qi2_mask */ |
| 43341 | case 2843: /* avx512vl_us_truncatev8hiv8qi2_mask */ |
| 43342 | case 2844: /* avx512vl_ss_truncatev8siv8qi2_mask */ |
| 43343 | case 2845: /* avx512vl_truncatev8siv8qi2_mask */ |
| 43344 | case 2846: /* avx512vl_us_truncatev8siv8qi2_mask */ |
| 43345 | case 2847: /* *avx512vl_ss_truncatev8hiv8qi2_mask_1 */ |
| 43346 | case 2848: /* *avx512vl_truncatev8hiv8qi2_mask_1 */ |
| 43347 | case 2849: /* *avx512vl_us_truncatev8hiv8qi2_mask_1 */ |
| 43348 | case 2850: /* *avx512vl_ss_truncatev8siv8qi2_mask_1 */ |
| 43349 | case 2851: /* *avx512vl_truncatev8siv8qi2_mask_1 */ |
| 43350 | case 2852: /* *avx512vl_us_truncatev8siv8qi2_mask_1 */ |
| 43351 | case 2859: /* *avx512vl_ss_truncatev4div4hi2 */ |
| 43352 | case 2860: /* *avx512vl_truncatev4div4hi2 */ |
| 43353 | case 2861: /* *avx512vl_us_truncatev4div4hi2 */ |
| 43354 | case 2862: /* *avx512vl_ss_truncatev2div2hi2 */ |
| 43355 | case 2863: /* *avx512vl_truncatev2div2hi2 */ |
| 43356 | case 2864: /* *avx512vl_us_truncatev2div2hi2 */ |
| 43357 | case 2865: /* *avx512vl_ss_truncatev4siv4hi2 */ |
| 43358 | case 2866: /* *avx512vl_truncatev4siv4hi2 */ |
| 43359 | case 2867: /* *avx512vl_us_truncatev4siv4hi2 */ |
| 43360 | case 2874: /* avx512vl_ss_truncatev4siv4hi2_mask */ |
| 43361 | case 2875: /* avx512vl_truncatev4siv4hi2_mask */ |
| 43362 | case 2876: /* avx512vl_us_truncatev4siv4hi2_mask */ |
| 43363 | case 2877: /* avx512vl_ss_truncatev4div4hi2_mask */ |
| 43364 | case 2878: /* avx512vl_truncatev4div4hi2_mask */ |
| 43365 | case 2879: /* avx512vl_us_truncatev4div4hi2_mask */ |
| 43366 | case 2880: /* *avx512vl_ss_truncatev4siv4hi2_mask_1 */ |
| 43367 | case 2881: /* *avx512vl_truncatev4siv4hi2_mask_1 */ |
| 43368 | case 2882: /* *avx512vl_us_truncatev4siv4hi2_mask_1 */ |
| 43369 | case 2883: /* *avx512vl_ss_truncatev4div4hi2_mask_1 */ |
| 43370 | case 2884: /* *avx512vl_truncatev4div4hi2_mask_1 */ |
| 43371 | case 2885: /* *avx512vl_us_truncatev4div4hi2_mask_1 */ |
| 43372 | case 2895: /* avx512vl_ss_truncatev2div2hi2_mask */ |
| 43373 | case 2896: /* avx512vl_truncatev2div2hi2_mask */ |
| 43374 | case 2897: /* avx512vl_us_truncatev2div2hi2_mask */ |
| 43375 | case 2898: /* *avx512vl_ss_truncatev2div2hi2_mask_1 */ |
| 43376 | case 2899: /* *avx512vl_truncatev2div2hi2_mask_1 */ |
| 43377 | case 2900: /* *avx512vl_us_truncatev2div2hi2_mask_1 */ |
| 43378 | case 2904: /* *avx512vl_ss_truncatev2div2si2 */ |
| 43379 | case 2905: /* *avx512vl_truncatev2div2si2 */ |
| 43380 | case 2906: /* *avx512vl_us_truncatev2div2si2 */ |
| 43381 | case 2910: /* avx512vl_ss_truncatev2div2si2_mask */ |
| 43382 | case 2911: /* avx512vl_truncatev2div2si2_mask */ |
| 43383 | case 2912: /* avx512vl_us_truncatev2div2si2_mask */ |
| 43384 | case 2913: /* *avx512vl_ss_truncatev2div2si2_mask_1 */ |
| 43385 | case 2914: /* *avx512vl_truncatev2div2si2_mask_1 */ |
| 43386 | case 2915: /* *avx512vl_us_truncatev2div2si2_mask_1 */ |
| 43387 | case 2919: /* *avx512f_ss_truncatev8div16qi2 */ |
| 43388 | case 2920: /* *avx512f_truncatev8div16qi2 */ |
| 43389 | case 2921: /* *avx512f_us_truncatev8div16qi2 */ |
| 43390 | case 2925: /* avx512f_ss_truncatev8div16qi2_mask */ |
| 43391 | case 2926: /* avx512f_truncatev8div16qi2_mask */ |
| 43392 | case 2927: /* avx512f_us_truncatev8div16qi2_mask */ |
| 43393 | case 2928: /* *avx512f_ss_truncatev8div16qi2_mask_1 */ |
| 43394 | case 2929: /* *avx512f_truncatev8div16qi2_mask_1 */ |
| 43395 | case 2930: /* *avx512f_us_truncatev8div16qi2_mask_1 */ |
| 43396 | case 3620: /* sse2_loadld */ |
| 43397 | case 3638: /* *vec_extractv2di_1 */ |
| 43398 | case 3639: /* *vec_concatv2si_sse4_1 */ |
| 43399 | case 3640: /* *vec_concatv2si */ |
| 43400 | case 3641: /* *vec_concatv4si */ |
| 43401 | case 3642: /* vec_concatv2di */ |
| 43402 | case 3659: /* sse_movmskps */ |
| 43403 | case 3661: /* sse2_movmskpd */ |
| 43404 | case 3663: /* *sse_movmskps_zext */ |
| 43405 | case 3665: /* *sse2_movmskpd_zext */ |
| 43406 | case 3670: /* *sse2_maskmovdqu */ |
| 43407 | case 3671: /* *sse2_maskmovdqu */ |
| 43408 | case 3773: /* sse4_1_blendps */ |
| 43409 | case 3775: /* sse4_1_blendpd */ |
| 43410 | case 3777: /* sse4_1_blendvps */ |
| 43411 | case 3779: /* sse4_1_blendvpd */ |
| 43412 | case 3786: /* sse4_1_movntdqa */ |
| 43413 | case 3796: /* sse4_1_pblendvb */ |
| 43414 | case 3797: /* sse4_1_pblendw */ |
| 43415 | case 3800: /* avx2_pblenddv4si */ |
| 43416 | case 3810: /* sse4_1_sign_extendv8qiv8hi2 */ |
| 43417 | case 3811: /* sse4_1_sign_extendv8qiv8hi2_mask */ |
| 43418 | case 3812: /* sse4_1_zero_extendv8qiv8hi2 */ |
| 43419 | case 3813: /* sse4_1_zero_extendv8qiv8hi2_mask */ |
| 43420 | case 3822: /* sse4_1_sign_extendv4qiv4si2 */ |
| 43421 | case 3823: /* sse4_1_sign_extendv4qiv4si2_mask */ |
| 43422 | case 3824: /* sse4_1_zero_extendv4qiv4si2 */ |
| 43423 | case 3825: /* sse4_1_zero_extendv4qiv4si2_mask */ |
| 43424 | case 3834: /* sse4_1_sign_extendv4hiv4si2 */ |
| 43425 | case 3835: /* sse4_1_sign_extendv4hiv4si2_mask */ |
| 43426 | case 3836: /* sse4_1_zero_extendv4hiv4si2 */ |
| 43427 | case 3837: /* sse4_1_zero_extendv4hiv4si2_mask */ |
| 43428 | case 3846: /* sse4_1_sign_extendv2qiv2di2 */ |
| 43429 | case 3847: /* sse4_1_sign_extendv2qiv2di2_mask */ |
| 43430 | case 3848: /* sse4_1_zero_extendv2qiv2di2 */ |
| 43431 | case 3849: /* sse4_1_zero_extendv2qiv2di2_mask */ |
| 43432 | case 3858: /* sse4_1_sign_extendv2hiv2di2 */ |
| 43433 | case 3859: /* sse4_1_sign_extendv2hiv2di2_mask */ |
| 43434 | case 3860: /* sse4_1_zero_extendv2hiv2di2 */ |
| 43435 | case 3861: /* sse4_1_zero_extendv2hiv2di2_mask */ |
| 43436 | case 3870: /* sse4_1_sign_extendv2siv2di2 */ |
| 43437 | case 3871: /* sse4_1_sign_extendv2siv2di2_mask */ |
| 43438 | case 3872: /* sse4_1_zero_extendv2siv2di2 */ |
| 43439 | case 3873: /* sse4_1_zero_extendv2siv2di2_mask */ |
| 43440 | case 4061: /* avx2_pbroadcastv16qi */ |
| 43441 | case 4064: /* avx2_pbroadcastv8hi */ |
| 43442 | case 4066: /* avx2_pbroadcastv4si */ |
| 43443 | case 4068: /* avx2_pbroadcastv2di */ |
| 43444 | case 4119: /* avx512vl_vec_dupv4si */ |
| 43445 | case 4120: /* avx512vl_vec_dupv4si_mask */ |
| 43446 | case 4125: /* avx512vl_vec_dupv2di */ |
| 43447 | case 4126: /* avx512vl_vec_dupv2di_mask */ |
| 43448 | case 4131: /* avx512vl_vec_dupv4sf */ |
| 43449 | case 4132: /* avx512vl_vec_dupv4sf_mask */ |
| 43450 | case 4137: /* avx512vl_vec_dupv2df */ |
| 43451 | case 4138: /* avx512vl_vec_dupv2df_mask */ |
| 43452 | case 4141: /* avx512vl_vec_dupv16qi */ |
| 43453 | case 4142: /* avx512vl_vec_dupv16qi_mask */ |
| 43454 | case 4149: /* avx512vl_vec_dupv8hi */ |
| 43455 | case 4150: /* avx512vl_vec_dupv8hi_mask */ |
| 43456 | case 4161: /* *avx512vl_vec_dup_gprv16qi */ |
| 43457 | case 4162: /* avx512vl_vec_dup_gprv16qi_mask */ |
| 43458 | case 4169: /* *avx512vl_vec_dup_gprv8hi */ |
| 43459 | case 4170: /* avx512vl_vec_dup_gprv8hi_mask */ |
| 43460 | case 4175: /* *avx512vl_vec_dup_gprv4si */ |
| 43461 | case 4176: /* avx512vl_vec_dup_gprv4si_mask */ |
| 43462 | case 4181: /* *avx512vl_vec_dup_gprv2di */ |
| 43463 | case 4182: /* avx512vl_vec_dup_gprv2di_mask */ |
| 43464 | case 4187: /* *avx512vl_vec_dup_gprv4sf */ |
| 43465 | case 4188: /* avx512vl_vec_dup_gprv4sf_mask */ |
| 43466 | case 4193: /* *avx512vl_vec_dup_gprv2df */ |
| 43467 | case 4194: /* avx512vl_vec_dup_gprv2df_mask */ |
| 43468 | case 4195: /* vec_dupv4sf */ |
| 43469 | case 4196: /* *vec_dupv4si */ |
| 43470 | case 4197: /* *vec_dupv2di */ |
| 43471 | case 4203: /* *vec_dupv16qi */ |
| 43472 | case 4205: /* *vec_dupv8hi */ |
| 43473 | case 4207: /* *vec_dupv4si */ |
| 43474 | case 4222: /* *avx512dq_broadcastv4si */ |
| 43475 | case 4223: /* avx512dq_broadcastv4si_mask */ |
| 43476 | case 4250: /* *avx_vperm_broadcast_v4sf */ |
| 43477 | case 4519: /* *avx2_gathersiv2di */ |
| 43478 | case 4520: /* *avx2_gathersiv2di */ |
| 43479 | case 4521: /* *avx2_gathersiv2df */ |
| 43480 | case 4522: /* *avx2_gathersiv2df */ |
| 43481 | case 4527: /* *avx2_gathersiv4si */ |
| 43482 | case 4528: /* *avx2_gathersiv4si */ |
| 43483 | case 4529: /* *avx2_gathersiv4sf */ |
| 43484 | case 4530: /* *avx2_gathersiv4sf */ |
| 43485 | case 4535: /* *avx2_gathersiv2di_2 */ |
| 43486 | case 4536: /* *avx2_gathersiv2di_2 */ |
| 43487 | case 4537: /* *avx2_gathersiv2df_2 */ |
| 43488 | case 4538: /* *avx2_gathersiv2df_2 */ |
| 43489 | case 4543: /* *avx2_gathersiv4si_2 */ |
| 43490 | case 4544: /* *avx2_gathersiv4si_2 */ |
| 43491 | case 4545: /* *avx2_gathersiv4sf_2 */ |
| 43492 | case 4546: /* *avx2_gathersiv4sf_2 */ |
| 43493 | case 4551: /* *avx2_gatherdiv2di */ |
| 43494 | case 4552: /* *avx2_gatherdiv2di */ |
| 43495 | case 4553: /* *avx2_gatherdiv2df */ |
| 43496 | case 4554: /* *avx2_gatherdiv2df */ |
| 43497 | case 4559: /* *avx2_gatherdiv4si */ |
| 43498 | case 4560: /* *avx2_gatherdiv4si */ |
| 43499 | case 4561: /* *avx2_gatherdiv4sf */ |
| 43500 | case 4562: /* *avx2_gatherdiv4sf */ |
| 43501 | case 4567: /* *avx2_gatherdiv2di_2 */ |
| 43502 | case 4568: /* *avx2_gatherdiv2di_2 */ |
| 43503 | case 4569: /* *avx2_gatherdiv2df_2 */ |
| 43504 | case 4570: /* *avx2_gatherdiv2df_2 */ |
| 43505 | case 4575: /* *avx2_gatherdiv4si_2 */ |
| 43506 | case 4576: /* *avx2_gatherdiv4si_2 */ |
| 43507 | case 4577: /* *avx2_gatherdiv4sf_2 */ |
| 43508 | case 4578: /* *avx2_gatherdiv4sf_2 */ |
| 43509 | case 4607: /* *avx512f_gathersiv4si */ |
| 43510 | case 4608: /* *avx512f_gathersiv4si */ |
| 43511 | case 4609: /* *avx512f_gathersiv4sf */ |
| 43512 | case 4610: /* *avx512f_gathersiv4sf */ |
| 43513 | case 4611: /* *avx512f_gathersiv2di */ |
| 43514 | case 4612: /* *avx512f_gathersiv2di */ |
| 43515 | case 4613: /* *avx512f_gathersiv2df */ |
| 43516 | case 4614: /* *avx512f_gathersiv2df */ |
| 43517 | case 4631: /* *avx512f_gathersiv4si_2 */ |
| 43518 | case 4632: /* *avx512f_gathersiv4si_2 */ |
| 43519 | case 4633: /* *avx512f_gathersiv4sf_2 */ |
| 43520 | case 4634: /* *avx512f_gathersiv4sf_2 */ |
| 43521 | case 4635: /* *avx512f_gathersiv2di_2 */ |
| 43522 | case 4636: /* *avx512f_gathersiv2di_2 */ |
| 43523 | case 4637: /* *avx512f_gathersiv2df_2 */ |
| 43524 | case 4638: /* *avx512f_gathersiv2df_2 */ |
| 43525 | case 4655: /* *avx512f_gatherdiv4si */ |
| 43526 | case 4656: /* *avx512f_gatherdiv4si */ |
| 43527 | case 4657: /* *avx512f_gatherdiv4sf */ |
| 43528 | case 4658: /* *avx512f_gatherdiv4sf */ |
| 43529 | case 4659: /* *avx512f_gatherdiv2di */ |
| 43530 | case 4660: /* *avx512f_gatherdiv2di */ |
| 43531 | case 4661: /* *avx512f_gatherdiv2df */ |
| 43532 | case 4662: /* *avx512f_gatherdiv2df */ |
| 43533 | case 4679: /* *avx512f_gatherdiv4si_2 */ |
| 43534 | case 4680: /* *avx512f_gatherdiv4si_2 */ |
| 43535 | case 4681: /* *avx512f_gatherdiv4sf_2 */ |
| 43536 | case 4682: /* *avx512f_gatherdiv4sf_2 */ |
| 43537 | case 4683: /* *avx512f_gatherdiv2di_2 */ |
| 43538 | case 4684: /* *avx512f_gatherdiv2di_2 */ |
| 43539 | case 4685: /* *avx512f_gatherdiv2df_2 */ |
| 43540 | case 4686: /* *avx512f_gatherdiv2df_2 */ |
| 43541 | case 4703: /* *avx512f_scattersiv4si */ |
| 43542 | case 4704: /* *avx512f_scattersiv4si */ |
| 43543 | case 4705: /* *avx512f_scattersiv4sf */ |
| 43544 | case 4706: /* *avx512f_scattersiv4sf */ |
| 43545 | case 4707: /* *avx512f_scattersiv2di */ |
| 43546 | case 4708: /* *avx512f_scattersiv2di */ |
| 43547 | case 4709: /* *avx512f_scattersiv2df */ |
| 43548 | case 4710: /* *avx512f_scattersiv2df */ |
| 43549 | case 4727: /* *avx512f_scatterdiv4si */ |
| 43550 | case 4728: /* *avx512f_scatterdiv4si */ |
| 43551 | case 4729: /* *avx512f_scatterdiv4sf */ |
| 43552 | case 4730: /* *avx512f_scatterdiv4sf */ |
| 43553 | case 4731: /* *avx512f_scatterdiv2di */ |
| 43554 | case 4732: /* *avx512f_scatterdiv2di */ |
| 43555 | case 4733: /* *avx512f_scatterdiv2df */ |
| 43556 | case 4734: /* *avx512f_scatterdiv2df */ |
| 43557 | case 4743: /* avx512vl_compressv4si_mask */ |
| 43558 | case 4744: /* avx512vl_compressv4sf_mask */ |
| 43559 | case 4745: /* avx512vl_compressv2di_mask */ |
| 43560 | case 4746: /* avx512vl_compressv2df_mask */ |
| 43561 | extract_insn_cached (insn); |
| 43562 | if ((cached_type = get_attr_type (insn)) == TYPE_IBR) |
| 43563 | { |
| 43564 | return 0; |
| 43565 | } |
| 43566 | else if ((cached_type == TYPE_CALL) || (cached_type == TYPE_CALLV)) |
| 43567 | { |
| 43568 | return 0; |
| 43569 | } |
| 43570 | else if (cached_type == TYPE_PUSH) |
| 43571 | { |
| 43572 | return 2; |
| 43573 | } |
| 43574 | else if (cached_type == TYPE_POP) |
| 43575 | { |
| 43576 | return 4; |
| 43577 | } |
| 43578 | else if (cached_type == TYPE_LEAVE) |
| 43579 | { |
| 43580 | return 3; |
| 43581 | } |
| 43582 | else if (cached_type == TYPE_LEA) |
| 43583 | { |
| 43584 | return 2; |
| 43585 | } |
| 43586 | else if ((cached_type == TYPE_IMUL) && ((cached_mode = get_attr_mode (insn)) == MODE_DI) && (((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) || (cached_memory == MEMORY_UNKNOWN))) |
| 43587 | { |
| 43588 | return 4; |
| 43589 | } |
| 43590 | else if ((cached_type == TYPE_IMUL) && (((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) || (cached_memory == MEMORY_UNKNOWN))) |
| 43591 | { |
| 43592 | return 3; |
| 43593 | } |
| 43594 | else if ((cached_type == TYPE_IMUL) && ((cached_mode = get_attr_mode (insn)) == MODE_DI) && (((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) || (cached_memory == MEMORY_BOTH))) |
| 43595 | { |
| 43596 | return 7; |
| 43597 | } |
| 43598 | else if ((cached_type == TYPE_IMUL) && (((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) || (cached_memory == MEMORY_BOTH))) |
| 43599 | { |
| 43600 | return 6; |
| 43601 | } |
| 43602 | else if ((cached_type == TYPE_IDIV) && (((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) || (cached_memory == MEMORY_UNKNOWN))) |
| 43603 | { |
| 43604 | return 6; |
| 43605 | } |
| 43606 | else if ((cached_type == TYPE_IDIV) && (((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) || (cached_memory == MEMORY_BOTH))) |
| 43607 | { |
| 43608 | return 9; |
| 43609 | } |
| 43610 | else if ((cached_type == TYPE_STR) && (((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) || (cached_memory == MEMORY_BOTH) || (cached_memory == MEMORY_STORE))) |
| 43611 | { |
| 43612 | return 6; |
| 43613 | } |
| 43614 | else if (((cached_athlon_decode = get_attr_athlon_decode (insn)) == ATHLON_DECODE_DIRECT) && (((cached_unit = get_attr_unit (insn)) == UNIT_INTEGER) || (cached_unit == UNIT_UNKNOWN)) && (((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) || (cached_memory == MEMORY_UNKNOWN))) |
| 43615 | { |
| 43616 | return 1; |
| 43617 | } |
| 43618 | else if ((cached_athlon_decode == ATHLON_DECODE_VECTOR) && (((cached_unit = get_attr_unit (insn)) == UNIT_INTEGER) || (cached_unit == UNIT_UNKNOWN)) && (((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) || (cached_memory == MEMORY_UNKNOWN))) |
| 43619 | { |
| 43620 | return 2; |
| 43621 | } |
| 43622 | else if ((cached_type == TYPE_IMOV) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 43623 | { |
| 43624 | return 3; |
| 43625 | } |
| 43626 | else if ((cached_athlon_decode == ATHLON_DECODE_DIRECT) && (((cached_unit = get_attr_unit (insn)) == UNIT_INTEGER) || (cached_unit == UNIT_UNKNOWN)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 43627 | { |
| 43628 | return 4; |
| 43629 | } |
| 43630 | else if ((cached_athlon_decode == ATHLON_DECODE_VECTOR) && (((cached_unit = get_attr_unit (insn)) == UNIT_INTEGER) || (cached_unit == UNIT_UNKNOWN)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 43631 | { |
| 43632 | return 6; |
| 43633 | } |
| 43634 | else if ((cached_type == TYPE_IMOV) && ((cached_memory = get_attr_memory (insn)) == MEMORY_STORE)) |
| 43635 | { |
| 43636 | return 1; |
| 43637 | } |
| 43638 | else if ((cached_athlon_decode == ATHLON_DECODE_DIRECT) && (((cached_unit = get_attr_unit (insn)) == UNIT_INTEGER) || (cached_unit == UNIT_UNKNOWN)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_BOTH)) |
| 43639 | { |
| 43640 | return 4; |
| 43641 | } |
| 43642 | else if ((cached_athlon_decode == ATHLON_DECODE_VECTOR) && (((cached_unit = get_attr_unit (insn)) == UNIT_INTEGER) || (cached_unit == UNIT_UNKNOWN)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_BOTH)) |
| 43643 | { |
| 43644 | return 6; |
| 43645 | } |
| 43646 | else if ((cached_athlon_decode == ATHLON_DECODE_DIRECT) && (((cached_unit = get_attr_unit (insn)) == UNIT_INTEGER) || (cached_unit == UNIT_UNKNOWN)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_STORE)) |
| 43647 | { |
| 43648 | return 1; |
| 43649 | } |
| 43650 | else if ((cached_athlon_decode == ATHLON_DECODE_VECTOR) && (((cached_unit = get_attr_unit (insn)) == UNIT_INTEGER) || (cached_unit == UNIT_UNKNOWN)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_STORE)) |
| 43651 | { |
| 43652 | return 2; |
| 43653 | } |
| 43654 | else if ((cached_type == TYPE_FMOV) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) && ((cached_mode = get_attr_mode (insn)) == MODE_XF)) |
| 43655 | { |
| 43656 | return 13 /* 0xd */; |
| 43657 | } |
| 43658 | else if ((cached_type == TYPE_FMOV) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 43659 | { |
| 43660 | return 2; |
| 43661 | } |
| 43662 | else if ((cached_type == TYPE_FMOV) && (((cached_memory = get_attr_memory (insn)) == MEMORY_STORE) || (cached_memory == MEMORY_BOTH)) && ((cached_mode = get_attr_mode (insn)) == MODE_XF)) |
| 43663 | { |
| 43664 | return 8; |
| 43665 | } |
| 43666 | else if ((cached_type == TYPE_FMOV) && (((cached_memory = get_attr_memory (insn)) == MEMORY_STORE) || (cached_memory == MEMORY_BOTH))) |
| 43667 | { |
| 43668 | return 2; |
| 43669 | } |
| 43670 | else if ((cached_type == TYPE_FISTP) || (cached_type == TYPE_FISTTP)) |
| 43671 | { |
| 43672 | return 4; |
| 43673 | } |
| 43674 | else if (cached_type == TYPE_FMOV) |
| 43675 | { |
| 43676 | return 2; |
| 43677 | } |
| 43678 | else if ((cached_type == TYPE_FOP) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 43679 | { |
| 43680 | return 6; |
| 43681 | } |
| 43682 | else if (cached_type == TYPE_FOP) |
| 43683 | { |
| 43684 | return 4; |
| 43685 | } |
| 43686 | else if ((cached_type == TYPE_FMUL) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 43687 | { |
| 43688 | return 6; |
| 43689 | } |
| 43690 | else if (cached_type == TYPE_FMUL) |
| 43691 | { |
| 43692 | return 4; |
| 43693 | } |
| 43694 | else if (cached_type == TYPE_FSGN) |
| 43695 | { |
| 43696 | return 2; |
| 43697 | } |
| 43698 | else if ((cached_type == TYPE_FDIV) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 43699 | { |
| 43700 | return 13 /* 0xd */; |
| 43701 | } |
| 43702 | else if (cached_type == TYPE_FDIV) |
| 43703 | { |
| 43704 | return 11 /* 0xb */; |
| 43705 | } |
| 43706 | else if ((cached_type == TYPE_FPSPC) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 43707 | { |
| 43708 | return 103 /* 0x67 */; |
| 43709 | } |
| 43710 | else if (cached_type == TYPE_FPSPC) |
| 43711 | { |
| 43712 | return 100 /* 0x64 */; |
| 43713 | } |
| 43714 | else if ((cached_type == TYPE_FCMOV) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 43715 | { |
| 43716 | return 17 /* 0x11 */; |
| 43717 | } |
| 43718 | else if (cached_type == TYPE_FCMOV) |
| 43719 | { |
| 43720 | return 15 /* 0xf */; |
| 43721 | } |
| 43722 | else if ((cached_type == TYPE_FCMP) && (cached_athlon_decode == ATHLON_DECODE_VECTOR) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 43723 | { |
| 43724 | return 5; |
| 43725 | } |
| 43726 | else if ((cached_athlon_decode == ATHLON_DECODE_VECTOR) && (cached_type == TYPE_FCMP)) |
| 43727 | { |
| 43728 | return 3; |
| 43729 | } |
| 43730 | else if ((cached_type == TYPE_FCMP) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 43731 | { |
| 43732 | return 4; |
| 43733 | } |
| 43734 | else if (cached_type == TYPE_FCMP) |
| 43735 | { |
| 43736 | return 2; |
| 43737 | } |
| 43738 | else if ((cached_type == TYPE_SSEMOV) && (memory_operand (operands[1], DFmode))) |
| 43739 | { |
| 43740 | return 2; |
| 43741 | } |
| 43742 | else if ((cached_type == TYPE_SSEMOV) && (((cached_mode = get_attr_mode (insn)) == MODE_V4SF) || (cached_mode == MODE_V2DF) || (cached_mode == MODE_TI)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 43743 | { |
| 43744 | return 2; |
| 43745 | } |
| 43746 | else if ((cached_type == TYPE_SSEMOV) && (((cached_mode = get_attr_mode (insn)) == MODE_SF) || (cached_mode == MODE_DI)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 43747 | { |
| 43748 | return 1; |
| 43749 | } |
| 43750 | else if (((cached_type == TYPE_MMXMOV) || (cached_type == TYPE_SSEMOV)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 43751 | { |
| 43752 | return 2; |
| 43753 | } |
| 43754 | else if (((cached_type == TYPE_MMXMOV) || (cached_type == TYPE_SSEMOV)) && (((cached_mode = get_attr_mode (insn)) == MODE_V4SF) || (cached_mode == MODE_V2DF) || (cached_mode == MODE_TI)) && (((cached_memory = get_attr_memory (insn)) == MEMORY_STORE) || (cached_memory == MEMORY_BOTH))) |
| 43755 | { |
| 43756 | return 3; |
| 43757 | } |
| 43758 | else if (((cached_type == TYPE_MMXMOV) || (cached_type == TYPE_SSEMOV)) && (((cached_mode = get_attr_mode (insn)) == MODE_V4SF) || (cached_mode == MODE_V2DF) || (cached_mode == MODE_TI)) && (((cached_memory = get_attr_memory (insn)) == MEMORY_STORE) || (cached_memory == MEMORY_BOTH))) |
| 43759 | { |
| 43760 | return 3; |
| 43761 | } |
| 43762 | else if (((cached_type == TYPE_MMXMOV) || (cached_type == TYPE_SSEMOV)) && (((cached_memory = get_attr_memory (insn)) == MEMORY_STORE) || (cached_memory == MEMORY_BOTH))) |
| 43763 | { |
| 43764 | return 2; |
| 43765 | } |
| 43766 | else if ((cached_type == TYPE_SSEMOV) && (((cached_mode = get_attr_mode (insn)) == MODE_V4SF) || (cached_mode == MODE_V2DF) || (cached_mode == MODE_TI))) |
| 43767 | { |
| 43768 | return 2; |
| 43769 | } |
| 43770 | else if ((cached_type == TYPE_MMXMOV) || (cached_type == TYPE_SSEMOV)) |
| 43771 | { |
| 43772 | return 2; |
| 43773 | } |
| 43774 | else if ((cached_type == TYPE_MMXMUL) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 43775 | { |
| 43776 | return 4; |
| 43777 | } |
| 43778 | else if (cached_type == TYPE_MMXMUL) |
| 43779 | { |
| 43780 | return 3; |
| 43781 | } |
| 43782 | else if (((cached_unit = get_attr_unit (insn)) == UNIT_MMX) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 43783 | { |
| 43784 | return 3; |
| 43785 | } |
| 43786 | else if (cached_unit == UNIT_MMX) |
| 43787 | { |
| 43788 | return 2; |
| 43789 | } |
| 43790 | else if (((cached_type == TYPE_SSELOG) || (cached_type == TYPE_SSELOG1) || (cached_type == TYPE_SSESHUF) || (cached_type == TYPE_SSESHUF1)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 43791 | { |
| 43792 | return 5; |
| 43793 | } |
| 43794 | else if ((cached_type == TYPE_SSELOG) || (cached_type == TYPE_SSELOG1) || (cached_type == TYPE_SSESHUF) || (cached_type == TYPE_SSESHUF1)) |
| 43795 | { |
| 43796 | return 3; |
| 43797 | } |
| 43798 | else if ((cached_type == TYPE_SSECMP) && (((cached_mode = get_attr_mode (insn)) == MODE_SF) || (cached_mode == MODE_DF) || (cached_mode == MODE_DI) || (cached_mode == MODE_TI)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 43799 | { |
| 43800 | return 4; |
| 43801 | } |
| 43802 | else if ((cached_type == TYPE_SSECMP) && (((cached_mode = get_attr_mode (insn)) == MODE_SF) || (cached_mode == MODE_DF) || (cached_mode == MODE_DI) || (cached_mode == MODE_TI))) |
| 43803 | { |
| 43804 | return 2; |
| 43805 | } |
| 43806 | else if ((cached_type == TYPE_SSECMP) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 43807 | { |
| 43808 | return 5; |
| 43809 | } |
| 43810 | else if (cached_type == TYPE_SSECMP) |
| 43811 | { |
| 43812 | return 3; |
| 43813 | } |
| 43814 | else if ((cached_type == TYPE_SSECOMI) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 43815 | { |
| 43816 | return 6; |
| 43817 | } |
| 43818 | else if (cached_type == TYPE_SSECOMI) |
| 43819 | { |
| 43820 | return 4; |
| 43821 | } |
| 43822 | else if (((cached_type == TYPE_SSEADD) || (cached_type == TYPE_SSEADD1)) && (((cached_mode = get_attr_mode (insn)) == MODE_SF) || (cached_mode == MODE_DF) || (cached_mode == MODE_DI)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 43823 | { |
| 43824 | return 6; |
| 43825 | } |
| 43826 | else if (((cached_type == TYPE_SSEADD) || (cached_type == TYPE_SSEADD1)) && (((cached_mode = get_attr_mode (insn)) == MODE_SF) || (cached_mode == MODE_DF) || (cached_mode == MODE_DI))) |
| 43827 | { |
| 43828 | return 4; |
| 43829 | } |
| 43830 | else if (((cached_type == TYPE_SSEADD) || (cached_type == TYPE_SSEADD1)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 43831 | { |
| 43832 | return 7; |
| 43833 | } |
| 43834 | else if ((cached_type == TYPE_SSEADD) || (cached_type == TYPE_SSEADD1)) |
| 43835 | { |
| 43836 | return 5; |
| 43837 | } |
| 43838 | else if ((cached_type == TYPE_SSECVT) && (cached_athlon_decode == ATHLON_DECODE_DIRECT) && ((cached_mode = get_attr_mode (insn)) == MODE_DF) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 43839 | { |
| 43840 | return 4; |
| 43841 | } |
| 43842 | else if ((cached_type == TYPE_SSECVT) && (cached_athlon_decode == ATHLON_DECODE_DIRECT) && ((cached_mode = get_attr_mode (insn)) == MODE_DF)) |
| 43843 | { |
| 43844 | return 2; |
| 43845 | } |
| 43846 | else if ((cached_type == TYPE_SSECVT) && (cached_athlon_decode == ATHLON_DECODE_DOUBLE) && (((cached_mode = get_attr_mode (insn)) == MODE_V2DF) || (cached_mode == MODE_V4SF) || (cached_mode == MODE_TI)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 43847 | { |
| 43848 | return 5; |
| 43849 | } |
| 43850 | else if ((cached_type == TYPE_SSECVT) && (cached_athlon_decode == ATHLON_DECODE_DOUBLE) && (((cached_mode = get_attr_mode (insn)) == MODE_V2DF) || (cached_mode == MODE_V4SF) || (cached_mode == MODE_TI))) |
| 43851 | { |
| 43852 | return 3; |
| 43853 | } |
| 43854 | else if ((cached_type == TYPE_SSEICVT) && (cached_athlon_decode == ATHLON_DECODE_DOUBLE) && (((cached_mode = get_attr_mode (insn)) == MODE_SF) || (cached_mode == MODE_DF)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 43855 | { |
| 43856 | return 9; |
| 43857 | } |
| 43858 | else if ((cached_type == TYPE_SSEICVT) && (cached_athlon_decode == ATHLON_DECODE_DOUBLE) && (((cached_mode = get_attr_mode (insn)) == MODE_SF) || (cached_mode == MODE_DF)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 43859 | { |
| 43860 | return 11 /* 0xb */; |
| 43861 | } |
| 43862 | else if ((cached_type == TYPE_SSEICVT) && (cached_athlon_decode == ATHLON_DECODE_VECTOR) && (((cached_mode = get_attr_mode (insn)) == MODE_SF) || (cached_mode == MODE_DF)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 43863 | { |
| 43864 | return 14 /* 0xe */; |
| 43865 | } |
| 43866 | else if ((cached_type == TYPE_SSECVT) && (cached_athlon_decode == ATHLON_DECODE_DOUBLE) && ((cached_mode = get_attr_mode (insn)) == MODE_SF) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 43867 | { |
| 43868 | return 9; |
| 43869 | } |
| 43870 | else if ((cached_type == TYPE_SSECVT) && (cached_athlon_decode == ATHLON_DECODE_VECTOR) && ((cached_mode = get_attr_mode (insn)) == MODE_SF) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 43871 | { |
| 43872 | return 12 /* 0xc */; |
| 43873 | } |
| 43874 | else if ((cached_type == TYPE_SSECVT) && (cached_athlon_decode == ATHLON_DECODE_VECTOR) && (((cached_mode = get_attr_mode (insn)) == MODE_V4SF) || (cached_mode == MODE_V2DF) || (cached_mode == MODE_TI)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 43875 | { |
| 43876 | return 8; |
| 43877 | } |
| 43878 | else if ((cached_type == TYPE_SSECVT) && (cached_athlon_decode == ATHLON_DECODE_VECTOR) && (((cached_mode = get_attr_mode (insn)) == MODE_V4SF) || (cached_mode == MODE_V2DF) || (cached_mode == MODE_TI)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 43879 | { |
| 43880 | return 8; |
| 43881 | } |
| 43882 | else if ((cached_type == TYPE_SSEICVT) && (cached_athlon_decode == ATHLON_DECODE_VECTOR) && (((cached_mode = get_attr_mode (insn)) == MODE_SI) || (cached_mode == MODE_DI)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 43883 | { |
| 43884 | return 9; |
| 43885 | } |
| 43886 | else if ((cached_type == TYPE_SSEICVT) && (cached_athlon_decode == ATHLON_DECODE_DOUBLE) && (((cached_mode = get_attr_mode (insn)) == MODE_SI) || (cached_mode == MODE_DI)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 43887 | { |
| 43888 | return 9; |
| 43889 | } |
| 43890 | else if ((cached_type == TYPE_SSEMUL) && (((cached_mode = get_attr_mode (insn)) == MODE_SF) || (cached_mode == MODE_DF)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 43891 | { |
| 43892 | return 6; |
| 43893 | } |
| 43894 | else if ((cached_type == TYPE_SSEMUL) && (((cached_mode = get_attr_mode (insn)) == MODE_SF) || (cached_mode == MODE_DF))) |
| 43895 | { |
| 43896 | return 4; |
| 43897 | } |
| 43898 | else if ((cached_type == TYPE_SSEMUL) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 43899 | { |
| 43900 | return 7; |
| 43901 | } |
| 43902 | else if (cached_type == TYPE_SSEMUL) |
| 43903 | { |
| 43904 | return 5; |
| 43905 | } |
| 43906 | else if ((cached_type == TYPE_SSEDIV) && (((cached_mode = get_attr_mode (insn)) == MODE_SF) || (cached_mode == MODE_DF)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 43907 | { |
| 43908 | return 22 /* 0x16 */; |
| 43909 | } |
| 43910 | else if ((cached_type == TYPE_SSEDIV) && (((cached_mode = get_attr_mode (insn)) == MODE_SF) || (cached_mode == MODE_DF))) |
| 43911 | { |
| 43912 | return 20 /* 0x14 */; |
| 43913 | } |
| 43914 | else if ((cached_type == TYPE_SSEDIV) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 43915 | { |
| 43916 | return 35 /* 0x23 */; |
| 43917 | } |
| 43918 | else if (cached_type == TYPE_SSEDIV) |
| 43919 | { |
| 43920 | return 39 /* 0x27 */; |
| 43921 | } |
| 43922 | else |
| 43923 | { |
| 43924 | return 0; |
| 43925 | } |
| 43926 | |
| 43927 | default: |
| 43928 | return 0; |
| 43929 | |
| 43930 | } |
| 43931 | } |
| 43932 | |
| 43933 | int |
| 43934 | insn_default_latency_amdfam10 (rtx_insn *insn ATTRIBUTE_UNUSED) |
| 43935 | { |
| 43936 | enum attr_memory cached_memory ATTRIBUTE_UNUSED; |
| 43937 | enum attr_type cached_type ATTRIBUTE_UNUSED; |
| 43938 | enum attr_mode cached_mode ATTRIBUTE_UNUSED; |
| 43939 | enum attr_amdfam10_decode cached_amdfam10_decode ATTRIBUTE_UNUSED; |
| 43940 | enum attr_unit cached_unit ATTRIBUTE_UNUSED; |
| 43941 | enum attr_athlon_decode cached_athlon_decode ATTRIBUTE_UNUSED; |
| 43942 | |
| 43943 | switch (recog_memoized (insn)) |
| 43944 | { |
| 43945 | case 3904: /* sse4_2_pcmpistr_cconly */ |
| 43946 | case 3900: /* sse4_2_pcmpestr_cconly */ |
| 43947 | extract_constrain_insn_cached (insn); |
| 43948 | if (!((1 << which_alternative) & 0x5)) |
| 43949 | { |
| 43950 | return 4; |
| 43951 | } |
| 43952 | else |
| 43953 | { |
| 43954 | return 2; |
| 43955 | } |
| 43956 | |
| 43957 | case 3903: /* sse4_2_pcmpistrm */ |
| 43958 | case 3902: /* sse4_2_pcmpistri */ |
| 43959 | case 3901: /* sse4_2_pcmpistr */ |
| 43960 | case 3899: /* sse4_2_pcmpestrm */ |
| 43961 | case 3898: /* sse4_2_pcmpestri */ |
| 43962 | case 3897: /* sse4_2_pcmpestr */ |
| 43963 | extract_constrain_insn_cached (insn); |
| 43964 | if (which_alternative != 0) |
| 43965 | { |
| 43966 | return 4; |
| 43967 | } |
| 43968 | else |
| 43969 | { |
| 43970 | return 2; |
| 43971 | } |
| 43972 | |
| 43973 | case 3771: /* sse4a_insertq */ |
| 43974 | case 3770: /* sse4a_insertqi */ |
| 43975 | return 5; |
| 43976 | |
| 43977 | case 3634: /* *vec_extractv4si */ |
| 43978 | extract_constrain_insn_cached (insn); |
| 43979 | if ((((1 << which_alternative) & 0x3)) && (get_attr_memory (insn) == MEMORY_LOAD)) |
| 43980 | { |
| 43981 | return 4; |
| 43982 | } |
| 43983 | else if (((1 << which_alternative) & 0x3)) |
| 43984 | { |
| 43985 | return 2; |
| 43986 | } |
| 43987 | else |
| 43988 | { |
| 43989 | return 0; |
| 43990 | } |
| 43991 | |
| 43992 | case 2375: /* *sse2_vd_cvtss2sd */ |
| 43993 | case 2374: /* sse2_cvtss2sd_round */ |
| 43994 | case 2373: /* sse2_cvtss2sd */ |
| 43995 | extract_constrain_insn_cached (insn); |
| 43996 | if (((which_alternative == 1) && (get_attr_memory (insn) == MEMORY_LOAD)) || (which_alternative == 0)) |
| 43997 | { |
| 43998 | return 7; |
| 43999 | } |
| 44000 | else |
| 44001 | { |
| 44002 | return 0; |
| 44003 | } |
| 44004 | |
| 44005 | case 2372: /* *sse2_vd_cvtsd2ss */ |
| 44006 | case 2371: /* sse2_cvtsd2ss_round */ |
| 44007 | case 2370: /* sse2_cvtsd2ss */ |
| 44008 | extract_constrain_insn_cached (insn); |
| 44009 | if ((which_alternative == 1) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 44010 | { |
| 44011 | return 9; |
| 44012 | } |
| 44013 | else if ((which_alternative == 0) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 44014 | { |
| 44015 | return 8; |
| 44016 | } |
| 44017 | else |
| 44018 | { |
| 44019 | return 0; |
| 44020 | } |
| 44021 | |
| 44022 | case 2383: /* *sse2_cvtpd2ps_mask */ |
| 44023 | case 2382: /* *sse2_cvtpd2ps */ |
| 44024 | case 2369: /* sse2_cvttpd2dq_mask */ |
| 44025 | case 2368: /* sse2_cvttpd2dq */ |
| 44026 | case 2291: /* sse2_cvtpd2dq_mask */ |
| 44027 | case 2290: /* sse2_cvtpd2dq */ |
| 44028 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) |
| 44029 | { |
| 44030 | return 9; |
| 44031 | } |
| 44032 | else if (cached_memory == MEMORY_NONE) |
| 44033 | { |
| 44034 | return 7; |
| 44035 | } |
| 44036 | else |
| 44037 | { |
| 44038 | return 0; |
| 44039 | } |
| 44040 | |
| 44041 | case 2226: /* sse2_cvttsd2siq_round */ |
| 44042 | case 2225: /* sse2_cvttsd2siq */ |
| 44043 | case 2224: /* sse2_cvttsd2si_round */ |
| 44044 | case 2223: /* sse2_cvttsd2si */ |
| 44045 | case 2222: /* sse2_cvtsd2siq_2 */ |
| 44046 | case 2219: /* sse2_cvtsd2si_2 */ |
| 44047 | case 2119: /* sse_cvttss2siq_round */ |
| 44048 | case 2118: /* sse_cvttss2siq */ |
| 44049 | case 2117: /* sse_cvttss2si_round */ |
| 44050 | case 2116: /* sse_cvttss2si */ |
| 44051 | case 2115: /* sse_cvtss2siq_2 */ |
| 44052 | case 2112: /* sse_cvtss2si_2 */ |
| 44053 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) |
| 44054 | { |
| 44055 | return 10 /* 0xa */; |
| 44056 | } |
| 44057 | else if (cached_memory == MEMORY_NONE) |
| 44058 | { |
| 44059 | return 8; |
| 44060 | } |
| 44061 | else |
| 44062 | { |
| 44063 | return 0; |
| 44064 | } |
| 44065 | |
| 44066 | case 2200: /* sse2_cvtsi2sdq_round */ |
| 44067 | case 2199: /* sse2_cvtsi2sdq */ |
| 44068 | case 2198: /* sse2_cvtsi2sd */ |
| 44069 | case 2109: /* sse_cvtsi2ssq_round */ |
| 44070 | case 2108: /* sse_cvtsi2ssq */ |
| 44071 | case 2107: /* sse_cvtsi2ss_round */ |
| 44072 | case 2106: /* sse_cvtsi2ss */ |
| 44073 | extract_constrain_insn_cached (insn); |
| 44074 | if ((which_alternative == 1) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 44075 | { |
| 44076 | return 9; |
| 44077 | } |
| 44078 | else if ((which_alternative == 0) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 44079 | { |
| 44080 | return 14 /* 0xe */; |
| 44081 | } |
| 44082 | else |
| 44083 | { |
| 44084 | return 0; |
| 44085 | } |
| 44086 | |
| 44087 | case 1464: /* sse2_divv2df3_mask */ |
| 44088 | case 1463: /* sse2_divv2df3 */ |
| 44089 | case 1462: /* avx_divv4df3_mask */ |
| 44090 | case 1461: /* avx_divv4df3 */ |
| 44091 | case 1460: /* avx512f_divv8df3_mask_round */ |
| 44092 | case 1459: /* avx512f_divv8df3_mask */ |
| 44093 | case 1458: /* avx512f_divv8df3_round */ |
| 44094 | case 1457: /* avx512f_divv8df3 */ |
| 44095 | case 1456: /* sse_divv4sf3_mask */ |
| 44096 | case 1455: /* sse_divv4sf3 */ |
| 44097 | case 1454: /* avx_divv8sf3_mask */ |
| 44098 | case 1453: /* avx_divv8sf3 */ |
| 44099 | case 1452: /* avx512f_divv16sf3_mask_round */ |
| 44100 | case 1451: /* avx512f_divv16sf3_mask */ |
| 44101 | case 1450: /* avx512f_divv16sf3_round */ |
| 44102 | case 1449: /* avx512f_divv16sf3 */ |
| 44103 | case 1448: /* sse2_vmdivv2df3_round */ |
| 44104 | case 1447: /* sse2_vmdivv2df3 */ |
| 44105 | case 1444: /* sse_vmdivv4sf3_round */ |
| 44106 | case 1443: /* sse_vmdivv4sf3 */ |
| 44107 | if (get_attr_memory (insn) == MEMORY_LOAD) |
| 44108 | { |
| 44109 | return 22 /* 0x16 */; |
| 44110 | } |
| 44111 | else |
| 44112 | { |
| 44113 | return 20 /* 0x14 */; |
| 44114 | } |
| 44115 | |
| 44116 | case 4770: /* avx512vl_expandv2df_mask */ |
| 44117 | case 4769: /* avx512vl_expandv2di_mask */ |
| 44118 | case 4768: /* avx512vl_expandv4sf_mask */ |
| 44119 | case 4767: /* avx512vl_expandv4si_mask */ |
| 44120 | case 4766: /* avx512vl_expandv4df_mask */ |
| 44121 | case 4765: /* avx512vl_expandv4di_mask */ |
| 44122 | case 4764: /* avx512vl_expandv8sf_mask */ |
| 44123 | case 4763: /* avx512vl_expandv8si_mask */ |
| 44124 | case 4762: /* avx512f_expandv8df_mask */ |
| 44125 | case 4761: /* avx512f_expandv8di_mask */ |
| 44126 | case 4760: /* avx512f_expandv16sf_mask */ |
| 44127 | case 4759: /* avx512f_expandv16si_mask */ |
| 44128 | case 2783: /* avx512vl_us_truncatev16hiv16qi2_mask */ |
| 44129 | case 2782: /* avx512vl_truncatev16hiv16qi2_mask */ |
| 44130 | case 2781: /* avx512vl_ss_truncatev16hiv16qi2_mask */ |
| 44131 | case 2780: /* avx512vl_us_truncatev8siv8hi2_mask */ |
| 44132 | case 2779: /* avx512vl_truncatev8siv8hi2_mask */ |
| 44133 | case 2778: /* avx512vl_ss_truncatev8siv8hi2_mask */ |
| 44134 | case 2777: /* avx512vl_us_truncatev4div4si2_mask */ |
| 44135 | case 2776: /* avx512vl_truncatev4div4si2_mask */ |
| 44136 | case 2775: /* avx512vl_ss_truncatev4div4si2_mask */ |
| 44137 | case 2774: /* *avx512vl_us_truncatev16hiv16qi2 */ |
| 44138 | case 2773: /* *avx512vl_truncatev16hiv16qi2 */ |
| 44139 | case 2772: /* *avx512vl_ss_truncatev16hiv16qi2 */ |
| 44140 | case 2771: /* *avx512vl_us_truncatev8siv8hi2 */ |
| 44141 | case 2770: /* *avx512vl_truncatev8siv8hi2 */ |
| 44142 | case 2769: /* *avx512vl_ss_truncatev8siv8hi2 */ |
| 44143 | case 2768: /* *avx512vl_us_truncatev4div4si2 */ |
| 44144 | case 2767: /* *avx512vl_truncatev4div4si2 */ |
| 44145 | case 2766: /* *avx512vl_ss_truncatev4div4si2 */ |
| 44146 | case 2765: /* avx512bw_us_truncatev32hiv32qi2_mask */ |
| 44147 | case 2764: /* avx512bw_truncatev32hiv32qi2_mask */ |
| 44148 | case 2763: /* avx512bw_ss_truncatev32hiv32qi2_mask */ |
| 44149 | case 2762: /* avx512bw_us_truncatev32hiv32qi2 */ |
| 44150 | case 2761: /* avx512bw_truncatev32hiv32qi2 */ |
| 44151 | case 2760: /* avx512bw_ss_truncatev32hiv32qi2 */ |
| 44152 | case 2759: /* avx512f_us_truncatev8div8hi2_mask */ |
| 44153 | case 2758: /* avx512f_truncatev8div8hi2_mask */ |
| 44154 | case 2757: /* avx512f_ss_truncatev8div8hi2_mask */ |
| 44155 | case 2756: /* avx512f_us_truncatev8div8si2_mask */ |
| 44156 | case 2755: /* avx512f_truncatev8div8si2_mask */ |
| 44157 | case 2754: /* avx512f_ss_truncatev8div8si2_mask */ |
| 44158 | case 2753: /* avx512f_us_truncatev16siv16hi2_mask */ |
| 44159 | case 2752: /* avx512f_truncatev16siv16hi2_mask */ |
| 44160 | case 2751: /* avx512f_ss_truncatev16siv16hi2_mask */ |
| 44161 | case 2750: /* avx512f_us_truncatev16siv16qi2_mask */ |
| 44162 | case 2749: /* avx512f_truncatev16siv16qi2_mask */ |
| 44163 | case 2748: /* avx512f_ss_truncatev16siv16qi2_mask */ |
| 44164 | case 2747: /* *avx512f_us_truncatev8div8hi2 */ |
| 44165 | case 2746: /* *avx512f_truncatev8div8hi2 */ |
| 44166 | case 2745: /* *avx512f_ss_truncatev8div8hi2 */ |
| 44167 | case 2744: /* *avx512f_us_truncatev8div8si2 */ |
| 44168 | case 2743: /* *avx512f_truncatev8div8si2 */ |
| 44169 | case 2742: /* *avx512f_ss_truncatev8div8si2 */ |
| 44170 | case 2741: /* *avx512f_us_truncatev16siv16hi2 */ |
| 44171 | case 2740: /* *avx512f_truncatev16siv16hi2 */ |
| 44172 | case 2739: /* *avx512f_ss_truncatev16siv16hi2 */ |
| 44173 | case 2738: /* *avx512f_us_truncatev16siv16qi2 */ |
| 44174 | case 2737: /* *avx512f_truncatev16siv16qi2 */ |
| 44175 | case 2736: /* *avx512f_ss_truncatev16siv16qi2 */ |
| 44176 | case 1256: /* avx512vl_loadv8hi_mask */ |
| 44177 | case 1255: /* avx512vl_loadv16hi_mask */ |
| 44178 | case 1254: /* avx512bw_loadv32hi_mask */ |
| 44179 | case 1253: /* avx512vl_loadv32qi_mask */ |
| 44180 | case 1252: /* avx512vl_loadv16qi_mask */ |
| 44181 | case 1251: /* avx512bw_loadv64qi_mask */ |
| 44182 | case 1250: /* avx512vl_loadv2df_mask */ |
| 44183 | case 1249: /* avx512vl_loadv4df_mask */ |
| 44184 | case 1248: /* avx512f_loadv8df_mask */ |
| 44185 | case 1247: /* avx512vl_loadv4sf_mask */ |
| 44186 | case 1246: /* avx512vl_loadv8sf_mask */ |
| 44187 | case 1245: /* avx512f_loadv16sf_mask */ |
| 44188 | case 1244: /* avx512vl_loadv2di_mask */ |
| 44189 | case 1243: /* avx512vl_loadv4di_mask */ |
| 44190 | case 1242: /* avx512f_loadv8di_mask */ |
| 44191 | case 1241: /* avx512vl_loadv4si_mask */ |
| 44192 | case 1240: /* avx512vl_loadv8si_mask */ |
| 44193 | case 1239: /* avx512f_loadv16si_mask */ |
| 44194 | extract_constrain_insn_cached (insn); |
| 44195 | if (which_alternative != 0) |
| 44196 | { |
| 44197 | return 2; |
| 44198 | } |
| 44199 | else |
| 44200 | { |
| 44201 | return 0; |
| 44202 | } |
| 44203 | |
| 44204 | case 1206: /* *mmx_concatv2si */ |
| 44205 | case 1136: /* *mmx_concatv2sf */ |
| 44206 | extract_constrain_insn_cached (insn); |
| 44207 | if ((which_alternative == 1) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 44208 | { |
| 44209 | return 4; |
| 44210 | } |
| 44211 | else if ((which_alternative == 1) && (((cached_memory = get_attr_memory (insn)) == MEMORY_STORE) || (cached_memory == MEMORY_BOTH))) |
| 44212 | { |
| 44213 | return 2; |
| 44214 | } |
| 44215 | else |
| 44216 | { |
| 44217 | return 0; |
| 44218 | } |
| 44219 | |
| 44220 | case 1111: /* sse_movntq */ |
| 44221 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) |
| 44222 | { |
| 44223 | return 4; |
| 44224 | } |
| 44225 | else if ((cached_memory == MEMORY_STORE) || (cached_memory == MEMORY_BOTH)) |
| 44226 | { |
| 44227 | return 2; |
| 44228 | } |
| 44229 | else |
| 44230 | { |
| 44231 | return 0; |
| 44232 | } |
| 44233 | |
| 44234 | case 3783: /* sse4_1_dppd */ |
| 44235 | case 3782: /* avx_dppd256 */ |
| 44236 | case 3781: /* sse4_1_dpps */ |
| 44237 | case 3780: /* avx_dpps256 */ |
| 44238 | case 1620: /* sse3_hsubv4sf3 */ |
| 44239 | case 1619: /* sse3_haddv4sf3 */ |
| 44240 | case 1618: /* avx_hsubv8sf3 */ |
| 44241 | case 1617: /* avx_haddv8sf3 */ |
| 44242 | case 1616: /* *sse3_hsubv2df3_low */ |
| 44243 | case 1615: /* *sse3_haddv2df3_low */ |
| 44244 | case 1614: /* sse3_hsubv2df3 */ |
| 44245 | case 1613: /* *sse3_haddv2df3 */ |
| 44246 | case 1612: /* avx_hsubv4df3 */ |
| 44247 | case 1611: /* avx_haddv4df3 */ |
| 44248 | case 1610: /* sse3_addsubv4sf3 */ |
| 44249 | case 1609: /* avx_addsubv8sf3 */ |
| 44250 | case 1608: /* sse3_addsubv2df3 */ |
| 44251 | case 1607: /* avx_addsubv4df3 */ |
| 44252 | case 1598: /* ieee_minv2df3_mask */ |
| 44253 | case 1597: /* ieee_minv2df3 */ |
| 44254 | case 1596: /* ieee_maxv2df3_mask */ |
| 44255 | case 1595: /* ieee_maxv2df3 */ |
| 44256 | case 1594: /* ieee_minv4df3_mask */ |
| 44257 | case 1593: /* ieee_minv4df3 */ |
| 44258 | case 1592: /* ieee_maxv4df3_mask */ |
| 44259 | case 1591: /* ieee_maxv4df3 */ |
| 44260 | case 1590: /* ieee_minv8df3_mask_round */ |
| 44261 | case 1589: /* ieee_minv8df3_mask */ |
| 44262 | case 1588: /* ieee_minv8df3_round */ |
| 44263 | case 1587: /* ieee_minv8df3 */ |
| 44264 | case 1586: /* ieee_maxv8df3_mask_round */ |
| 44265 | case 1585: /* ieee_maxv8df3_mask */ |
| 44266 | case 1584: /* ieee_maxv8df3_round */ |
| 44267 | case 1583: /* ieee_maxv8df3 */ |
| 44268 | case 1582: /* ieee_minv4sf3_mask */ |
| 44269 | case 1581: /* ieee_minv4sf3 */ |
| 44270 | case 1580: /* ieee_maxv4sf3_mask */ |
| 44271 | case 1579: /* ieee_maxv4sf3 */ |
| 44272 | case 1578: /* ieee_minv8sf3_mask */ |
| 44273 | case 1577: /* ieee_minv8sf3 */ |
| 44274 | case 1576: /* ieee_maxv8sf3_mask */ |
| 44275 | case 1575: /* ieee_maxv8sf3 */ |
| 44276 | case 1574: /* ieee_minv16sf3_mask_round */ |
| 44277 | case 1573: /* ieee_minv16sf3_mask */ |
| 44278 | case 1572: /* ieee_minv16sf3_round */ |
| 44279 | case 1571: /* ieee_minv16sf3 */ |
| 44280 | case 1570: /* ieee_maxv16sf3_mask_round */ |
| 44281 | case 1569: /* ieee_maxv16sf3_mask */ |
| 44282 | case 1568: /* ieee_maxv16sf3_round */ |
| 44283 | case 1567: /* ieee_maxv16sf3 */ |
| 44284 | case 1566: /* *sminv2df3_mask_round */ |
| 44285 | case 1565: /* *sminv2df3_mask */ |
| 44286 | case 1564: /* *sminv2df3_round */ |
| 44287 | case 1563: /* *sminv2df3 */ |
| 44288 | case 1562: /* *smaxv2df3_mask_round */ |
| 44289 | case 1561: /* *smaxv2df3_mask */ |
| 44290 | case 1560: /* *smaxv2df3_round */ |
| 44291 | case 1559: /* *smaxv2df3 */ |
| 44292 | case 1558: /* *sminv4df3_mask_round */ |
| 44293 | case 1557: /* *sminv4df3_mask */ |
| 44294 | case 1556: /* *sminv4df3_round */ |
| 44295 | case 1555: /* *sminv4df3 */ |
| 44296 | case 1554: /* *smaxv4df3_mask_round */ |
| 44297 | case 1553: /* *smaxv4df3_mask */ |
| 44298 | case 1552: /* *smaxv4df3_round */ |
| 44299 | case 1551: /* *smaxv4df3 */ |
| 44300 | case 1550: /* *sminv8df3_mask_round */ |
| 44301 | case 1549: /* *sminv8df3_mask */ |
| 44302 | case 1548: /* *sminv8df3_round */ |
| 44303 | case 1547: /* *sminv8df3 */ |
| 44304 | case 1546: /* *smaxv8df3_mask_round */ |
| 44305 | case 1545: /* *smaxv8df3_mask */ |
| 44306 | case 1544: /* *smaxv8df3_round */ |
| 44307 | case 1543: /* *smaxv8df3 */ |
| 44308 | case 1542: /* *sminv4sf3_mask_round */ |
| 44309 | case 1541: /* *sminv4sf3_mask */ |
| 44310 | case 1540: /* *sminv4sf3_round */ |
| 44311 | case 1539: /* *sminv4sf3 */ |
| 44312 | case 1538: /* *smaxv4sf3_mask_round */ |
| 44313 | case 1537: /* *smaxv4sf3_mask */ |
| 44314 | case 1536: /* *smaxv4sf3_round */ |
| 44315 | case 1535: /* *smaxv4sf3 */ |
| 44316 | case 1534: /* *sminv8sf3_mask_round */ |
| 44317 | case 1533: /* *sminv8sf3_mask */ |
| 44318 | case 1532: /* *sminv8sf3_round */ |
| 44319 | case 1531: /* *sminv8sf3 */ |
| 44320 | case 1530: /* *smaxv8sf3_mask_round */ |
| 44321 | case 1529: /* *smaxv8sf3_mask */ |
| 44322 | case 1528: /* *smaxv8sf3_round */ |
| 44323 | case 1527: /* *smaxv8sf3 */ |
| 44324 | case 1526: /* *sminv16sf3_mask_round */ |
| 44325 | case 1525: /* *sminv16sf3_mask */ |
| 44326 | case 1524: /* *sminv16sf3_round */ |
| 44327 | case 1523: /* *sminv16sf3 */ |
| 44328 | case 1522: /* *smaxv16sf3_mask_round */ |
| 44329 | case 1521: /* *smaxv16sf3_mask */ |
| 44330 | case 1520: /* *smaxv16sf3_round */ |
| 44331 | case 1519: /* *smaxv16sf3 */ |
| 44332 | case 1446: /* sse2_vmmulv2df3_round */ |
| 44333 | case 1445: /* sse2_vmmulv2df3 */ |
| 44334 | case 1442: /* sse_vmmulv4sf3_round */ |
| 44335 | case 1441: /* sse_vmmulv4sf3 */ |
| 44336 | case 1440: /* *mulv2df3_mask_round */ |
| 44337 | case 1439: /* *mulv2df3_mask */ |
| 44338 | case 1438: /* *mulv2df3_round */ |
| 44339 | case 1437: /* *mulv2df3 */ |
| 44340 | case 1436: /* *mulv4df3_mask_round */ |
| 44341 | case 1435: /* *mulv4df3_mask */ |
| 44342 | case 1434: /* *mulv4df3_round */ |
| 44343 | case 1433: /* *mulv4df3 */ |
| 44344 | case 1432: /* *mulv8df3_mask_round */ |
| 44345 | case 1431: /* *mulv8df3_mask */ |
| 44346 | case 1430: /* *mulv8df3_round */ |
| 44347 | case 1429: /* *mulv8df3 */ |
| 44348 | case 1428: /* *mulv4sf3_mask_round */ |
| 44349 | case 1427: /* *mulv4sf3_mask */ |
| 44350 | case 1426: /* *mulv4sf3_round */ |
| 44351 | case 1425: /* *mulv4sf3 */ |
| 44352 | case 1424: /* *mulv8sf3_mask_round */ |
| 44353 | case 1423: /* *mulv8sf3_mask */ |
| 44354 | case 1422: /* *mulv8sf3_round */ |
| 44355 | case 1421: /* *mulv8sf3 */ |
| 44356 | case 1420: /* *mulv16sf3_mask_round */ |
| 44357 | case 1419: /* *mulv16sf3_mask */ |
| 44358 | case 1418: /* *mulv16sf3_round */ |
| 44359 | case 1417: /* *mulv16sf3 */ |
| 44360 | case 1416: /* sse2_vmsubv2df3_round */ |
| 44361 | case 1415: /* sse2_vmsubv2df3 */ |
| 44362 | case 1414: /* sse2_vmaddv2df3_round */ |
| 44363 | case 1413: /* sse2_vmaddv2df3 */ |
| 44364 | case 1412: /* sse_vmsubv4sf3_round */ |
| 44365 | case 1411: /* sse_vmsubv4sf3 */ |
| 44366 | case 1410: /* sse_vmaddv4sf3_round */ |
| 44367 | case 1409: /* sse_vmaddv4sf3 */ |
| 44368 | case 1408: /* *subv2df3_mask_round */ |
| 44369 | case 1407: /* *subv2df3_mask */ |
| 44370 | case 1406: /* *subv2df3_round */ |
| 44371 | case 1405: /* *subv2df3 */ |
| 44372 | case 1404: /* *addv2df3_mask_round */ |
| 44373 | case 1403: /* *addv2df3_mask */ |
| 44374 | case 1402: /* *addv2df3_round */ |
| 44375 | case 1401: /* *addv2df3 */ |
| 44376 | case 1400: /* *subv4df3_mask_round */ |
| 44377 | case 1399: /* *subv4df3_mask */ |
| 44378 | case 1398: /* *subv4df3_round */ |
| 44379 | case 1397: /* *subv4df3 */ |
| 44380 | case 1396: /* *addv4df3_mask_round */ |
| 44381 | case 1395: /* *addv4df3_mask */ |
| 44382 | case 1394: /* *addv4df3_round */ |
| 44383 | case 1393: /* *addv4df3 */ |
| 44384 | case 1392: /* *subv8df3_mask_round */ |
| 44385 | case 1391: /* *subv8df3_mask */ |
| 44386 | case 1390: /* *subv8df3_round */ |
| 44387 | case 1389: /* *subv8df3 */ |
| 44388 | case 1388: /* *addv8df3_mask_round */ |
| 44389 | case 1387: /* *addv8df3_mask */ |
| 44390 | case 1386: /* *addv8df3_round */ |
| 44391 | case 1385: /* *addv8df3 */ |
| 44392 | case 1384: /* *subv4sf3_mask_round */ |
| 44393 | case 1383: /* *subv4sf3_mask */ |
| 44394 | case 1382: /* *subv4sf3_round */ |
| 44395 | case 1381: /* *subv4sf3 */ |
| 44396 | case 1380: /* *addv4sf3_mask_round */ |
| 44397 | case 1379: /* *addv4sf3_mask */ |
| 44398 | case 1378: /* *addv4sf3_round */ |
| 44399 | case 1377: /* *addv4sf3 */ |
| 44400 | case 1376: /* *subv8sf3_mask_round */ |
| 44401 | case 1375: /* *subv8sf3_mask */ |
| 44402 | case 1374: /* *subv8sf3_round */ |
| 44403 | case 1373: /* *subv8sf3 */ |
| 44404 | case 1372: /* *addv8sf3_mask_round */ |
| 44405 | case 1371: /* *addv8sf3_mask */ |
| 44406 | case 1370: /* *addv8sf3_round */ |
| 44407 | case 1369: /* *addv8sf3 */ |
| 44408 | case 1368: /* *subv16sf3_mask_round */ |
| 44409 | case 1367: /* *subv16sf3_mask */ |
| 44410 | case 1366: /* *subv16sf3_round */ |
| 44411 | case 1365: /* *subv16sf3 */ |
| 44412 | case 1364: /* *addv16sf3_mask_round */ |
| 44413 | case 1363: /* *addv16sf3_mask */ |
| 44414 | case 1362: /* *addv16sf3_round */ |
| 44415 | case 1361: /* *addv16sf3 */ |
| 44416 | case 992: /* *ieee_smindf3 */ |
| 44417 | case 991: /* *ieee_smaxdf3 */ |
| 44418 | case 990: /* *ieee_sminsf3 */ |
| 44419 | case 989: /* *ieee_smaxsf3 */ |
| 44420 | case 988: /* smindf3 */ |
| 44421 | case 987: /* smaxdf3 */ |
| 44422 | case 986: /* sminsf3 */ |
| 44423 | case 985: /* smaxsf3 */ |
| 44424 | if (get_attr_memory (insn) == MEMORY_LOAD) |
| 44425 | { |
| 44426 | return 6; |
| 44427 | } |
| 44428 | else |
| 44429 | { |
| 44430 | return 4; |
| 44431 | } |
| 44432 | |
| 44433 | case 980: /* *movxfcc_1 */ |
| 44434 | return 15 /* 0xf */; |
| 44435 | |
| 44436 | case 962: /* *rep_stosqi */ |
| 44437 | case 961: /* *rep_stosqi */ |
| 44438 | case 960: /* *rep_stossi */ |
| 44439 | case 959: /* *rep_stossi */ |
| 44440 | case 958: /* *rep_stosdi_rex64 */ |
| 44441 | case 957: /* *rep_stosdi_rex64 */ |
| 44442 | case 956: /* *strsetqi_1 */ |
| 44443 | case 955: /* *strsetqi_1 */ |
| 44444 | case 954: /* *strsethi_1 */ |
| 44445 | case 953: /* *strsethi_1 */ |
| 44446 | case 952: /* *strsetsi_1 */ |
| 44447 | case 951: /* *strsetsi_1 */ |
| 44448 | case 950: /* *strsetdi_rex_1 */ |
| 44449 | case 949: /* *strsetdi_rex_1 */ |
| 44450 | case 948: /* *rep_movqi */ |
| 44451 | case 947: /* *rep_movqi */ |
| 44452 | case 946: /* *rep_movsi */ |
| 44453 | case 945: /* *rep_movsi */ |
| 44454 | case 944: /* *rep_movdi_rex64 */ |
| 44455 | case 943: /* *rep_movdi_rex64 */ |
| 44456 | case 942: /* *strmovqi_1 */ |
| 44457 | case 941: /* *strmovqi_1 */ |
| 44458 | case 940: /* *strmovhi_1 */ |
| 44459 | case 939: /* *strmovhi_1 */ |
| 44460 | case 938: /* *strmovsi_1 */ |
| 44461 | case 937: /* *strmovsi_1 */ |
| 44462 | case 936: /* *strmovdi_rex_1 */ |
| 44463 | case 935: /* *strmovdi_rex_1 */ |
| 44464 | return 6; |
| 44465 | |
| 44466 | case 4937: /* storedi_via_sse */ |
| 44467 | case 4936: /* loaddi_via_sse */ |
| 44468 | case 4746: /* avx512vl_compressv2df_mask */ |
| 44469 | case 4745: /* avx512vl_compressv2di_mask */ |
| 44470 | case 4744: /* avx512vl_compressv4sf_mask */ |
| 44471 | case 4743: /* avx512vl_compressv4si_mask */ |
| 44472 | case 4742: /* avx512vl_compressv4df_mask */ |
| 44473 | case 4741: /* avx512vl_compressv4di_mask */ |
| 44474 | case 4740: /* avx512vl_compressv8sf_mask */ |
| 44475 | case 4739: /* avx512vl_compressv8si_mask */ |
| 44476 | case 4738: /* avx512f_compressv8df_mask */ |
| 44477 | case 4737: /* avx512f_compressv8di_mask */ |
| 44478 | case 4736: /* avx512f_compressv16sf_mask */ |
| 44479 | case 4735: /* avx512f_compressv16si_mask */ |
| 44480 | case 4734: /* *avx512f_scatterdiv2df */ |
| 44481 | case 4733: /* *avx512f_scatterdiv2df */ |
| 44482 | case 4732: /* *avx512f_scatterdiv2di */ |
| 44483 | case 4731: /* *avx512f_scatterdiv2di */ |
| 44484 | case 4730: /* *avx512f_scatterdiv4sf */ |
| 44485 | case 4729: /* *avx512f_scatterdiv4sf */ |
| 44486 | case 4728: /* *avx512f_scatterdiv4si */ |
| 44487 | case 4727: /* *avx512f_scatterdiv4si */ |
| 44488 | case 4726: /* *avx512f_scatterdiv4df */ |
| 44489 | case 4725: /* *avx512f_scatterdiv4df */ |
| 44490 | case 4724: /* *avx512f_scatterdiv4di */ |
| 44491 | case 4723: /* *avx512f_scatterdiv4di */ |
| 44492 | case 4722: /* *avx512f_scatterdiv8sf */ |
| 44493 | case 4721: /* *avx512f_scatterdiv8sf */ |
| 44494 | case 4720: /* *avx512f_scatterdiv8si */ |
| 44495 | case 4719: /* *avx512f_scatterdiv8si */ |
| 44496 | case 4718: /* *avx512f_scatterdiv8df */ |
| 44497 | case 4717: /* *avx512f_scatterdiv8df */ |
| 44498 | case 4716: /* *avx512f_scatterdiv8di */ |
| 44499 | case 4715: /* *avx512f_scatterdiv8di */ |
| 44500 | case 4714: /* *avx512f_scatterdiv16sf */ |
| 44501 | case 4713: /* *avx512f_scatterdiv16sf */ |
| 44502 | case 4712: /* *avx512f_scatterdiv16si */ |
| 44503 | case 4711: /* *avx512f_scatterdiv16si */ |
| 44504 | case 4710: /* *avx512f_scattersiv2df */ |
| 44505 | case 4709: /* *avx512f_scattersiv2df */ |
| 44506 | case 4708: /* *avx512f_scattersiv2di */ |
| 44507 | case 4707: /* *avx512f_scattersiv2di */ |
| 44508 | case 4706: /* *avx512f_scattersiv4sf */ |
| 44509 | case 4705: /* *avx512f_scattersiv4sf */ |
| 44510 | case 4704: /* *avx512f_scattersiv4si */ |
| 44511 | case 4703: /* *avx512f_scattersiv4si */ |
| 44512 | case 4702: /* *avx512f_scattersiv4df */ |
| 44513 | case 4701: /* *avx512f_scattersiv4df */ |
| 44514 | case 4700: /* *avx512f_scattersiv4di */ |
| 44515 | case 4699: /* *avx512f_scattersiv4di */ |
| 44516 | case 4698: /* *avx512f_scattersiv8sf */ |
| 44517 | case 4697: /* *avx512f_scattersiv8sf */ |
| 44518 | case 4696: /* *avx512f_scattersiv8si */ |
| 44519 | case 4695: /* *avx512f_scattersiv8si */ |
| 44520 | case 4694: /* *avx512f_scattersiv8df */ |
| 44521 | case 4693: /* *avx512f_scattersiv8df */ |
| 44522 | case 4692: /* *avx512f_scattersiv8di */ |
| 44523 | case 4691: /* *avx512f_scattersiv8di */ |
| 44524 | case 4690: /* *avx512f_scattersiv16sf */ |
| 44525 | case 4689: /* *avx512f_scattersiv16sf */ |
| 44526 | case 4688: /* *avx512f_scattersiv16si */ |
| 44527 | case 4687: /* *avx512f_scattersiv16si */ |
| 44528 | case 4686: /* *avx512f_gatherdiv2df_2 */ |
| 44529 | case 4685: /* *avx512f_gatherdiv2df_2 */ |
| 44530 | case 4684: /* *avx512f_gatherdiv2di_2 */ |
| 44531 | case 4683: /* *avx512f_gatherdiv2di_2 */ |
| 44532 | case 4682: /* *avx512f_gatherdiv4sf_2 */ |
| 44533 | case 4681: /* *avx512f_gatherdiv4sf_2 */ |
| 44534 | case 4680: /* *avx512f_gatherdiv4si_2 */ |
| 44535 | case 4679: /* *avx512f_gatherdiv4si_2 */ |
| 44536 | case 4678: /* *avx512f_gatherdiv4df_2 */ |
| 44537 | case 4677: /* *avx512f_gatherdiv4df_2 */ |
| 44538 | case 4676: /* *avx512f_gatherdiv4di_2 */ |
| 44539 | case 4675: /* *avx512f_gatherdiv4di_2 */ |
| 44540 | case 4674: /* *avx512f_gatherdiv8sf_2 */ |
| 44541 | case 4673: /* *avx512f_gatherdiv8sf_2 */ |
| 44542 | case 4672: /* *avx512f_gatherdiv8si_2 */ |
| 44543 | case 4671: /* *avx512f_gatherdiv8si_2 */ |
| 44544 | case 4670: /* *avx512f_gatherdiv8df_2 */ |
| 44545 | case 4669: /* *avx512f_gatherdiv8df_2 */ |
| 44546 | case 4668: /* *avx512f_gatherdiv8di_2 */ |
| 44547 | case 4667: /* *avx512f_gatherdiv8di_2 */ |
| 44548 | case 4666: /* *avx512f_gatherdiv16sf_2 */ |
| 44549 | case 4665: /* *avx512f_gatherdiv16sf_2 */ |
| 44550 | case 4664: /* *avx512f_gatherdiv16si_2 */ |
| 44551 | case 4663: /* *avx512f_gatherdiv16si_2 */ |
| 44552 | case 4662: /* *avx512f_gatherdiv2df */ |
| 44553 | case 4661: /* *avx512f_gatherdiv2df */ |
| 44554 | case 4660: /* *avx512f_gatherdiv2di */ |
| 44555 | case 4659: /* *avx512f_gatherdiv2di */ |
| 44556 | case 4658: /* *avx512f_gatherdiv4sf */ |
| 44557 | case 4657: /* *avx512f_gatherdiv4sf */ |
| 44558 | case 4656: /* *avx512f_gatherdiv4si */ |
| 44559 | case 4655: /* *avx512f_gatherdiv4si */ |
| 44560 | case 4654: /* *avx512f_gatherdiv4df */ |
| 44561 | case 4653: /* *avx512f_gatherdiv4df */ |
| 44562 | case 4652: /* *avx512f_gatherdiv4di */ |
| 44563 | case 4651: /* *avx512f_gatherdiv4di */ |
| 44564 | case 4650: /* *avx512f_gatherdiv8sf */ |
| 44565 | case 4649: /* *avx512f_gatherdiv8sf */ |
| 44566 | case 4648: /* *avx512f_gatherdiv8si */ |
| 44567 | case 4647: /* *avx512f_gatherdiv8si */ |
| 44568 | case 4646: /* *avx512f_gatherdiv8df */ |
| 44569 | case 4645: /* *avx512f_gatherdiv8df */ |
| 44570 | case 4644: /* *avx512f_gatherdiv8di */ |
| 44571 | case 4643: /* *avx512f_gatherdiv8di */ |
| 44572 | case 4642: /* *avx512f_gatherdiv16sf */ |
| 44573 | case 4641: /* *avx512f_gatherdiv16sf */ |
| 44574 | case 4640: /* *avx512f_gatherdiv16si */ |
| 44575 | case 4639: /* *avx512f_gatherdiv16si */ |
| 44576 | case 4638: /* *avx512f_gathersiv2df_2 */ |
| 44577 | case 4637: /* *avx512f_gathersiv2df_2 */ |
| 44578 | case 4636: /* *avx512f_gathersiv2di_2 */ |
| 44579 | case 4635: /* *avx512f_gathersiv2di_2 */ |
| 44580 | case 4634: /* *avx512f_gathersiv4sf_2 */ |
| 44581 | case 4633: /* *avx512f_gathersiv4sf_2 */ |
| 44582 | case 4632: /* *avx512f_gathersiv4si_2 */ |
| 44583 | case 4631: /* *avx512f_gathersiv4si_2 */ |
| 44584 | case 4630: /* *avx512f_gathersiv4df_2 */ |
| 44585 | case 4629: /* *avx512f_gathersiv4df_2 */ |
| 44586 | case 4628: /* *avx512f_gathersiv4di_2 */ |
| 44587 | case 4627: /* *avx512f_gathersiv4di_2 */ |
| 44588 | case 4626: /* *avx512f_gathersiv8sf_2 */ |
| 44589 | case 4625: /* *avx512f_gathersiv8sf_2 */ |
| 44590 | case 4624: /* *avx512f_gathersiv8si_2 */ |
| 44591 | case 4623: /* *avx512f_gathersiv8si_2 */ |
| 44592 | case 4622: /* *avx512f_gathersiv8df_2 */ |
| 44593 | case 4621: /* *avx512f_gathersiv8df_2 */ |
| 44594 | case 4620: /* *avx512f_gathersiv8di_2 */ |
| 44595 | case 4619: /* *avx512f_gathersiv8di_2 */ |
| 44596 | case 4618: /* *avx512f_gathersiv16sf_2 */ |
| 44597 | case 4617: /* *avx512f_gathersiv16sf_2 */ |
| 44598 | case 4616: /* *avx512f_gathersiv16si_2 */ |
| 44599 | case 4615: /* *avx512f_gathersiv16si_2 */ |
| 44600 | case 4614: /* *avx512f_gathersiv2df */ |
| 44601 | case 4613: /* *avx512f_gathersiv2df */ |
| 44602 | case 4612: /* *avx512f_gathersiv2di */ |
| 44603 | case 4611: /* *avx512f_gathersiv2di */ |
| 44604 | case 4610: /* *avx512f_gathersiv4sf */ |
| 44605 | case 4609: /* *avx512f_gathersiv4sf */ |
| 44606 | case 4608: /* *avx512f_gathersiv4si */ |
| 44607 | case 4607: /* *avx512f_gathersiv4si */ |
| 44608 | case 4606: /* *avx512f_gathersiv4df */ |
| 44609 | case 4605: /* *avx512f_gathersiv4df */ |
| 44610 | case 4604: /* *avx512f_gathersiv4di */ |
| 44611 | case 4603: /* *avx512f_gathersiv4di */ |
| 44612 | case 4602: /* *avx512f_gathersiv8sf */ |
| 44613 | case 4601: /* *avx512f_gathersiv8sf */ |
| 44614 | case 4600: /* *avx512f_gathersiv8si */ |
| 44615 | case 4599: /* *avx512f_gathersiv8si */ |
| 44616 | case 4598: /* *avx512f_gathersiv8df */ |
| 44617 | case 4597: /* *avx512f_gathersiv8df */ |
| 44618 | case 4596: /* *avx512f_gathersiv8di */ |
| 44619 | case 4595: /* *avx512f_gathersiv8di */ |
| 44620 | case 4594: /* *avx512f_gathersiv16sf */ |
| 44621 | case 4593: /* *avx512f_gathersiv16sf */ |
| 44622 | case 4592: /* *avx512f_gathersiv16si */ |
| 44623 | case 4591: /* *avx512f_gathersiv16si */ |
| 44624 | case 4590: /* *avx2_gatherdiv8sf_4 */ |
| 44625 | case 4589: /* *avx2_gatherdiv8sf_4 */ |
| 44626 | case 4588: /* *avx2_gatherdiv8si_4 */ |
| 44627 | case 4587: /* *avx2_gatherdiv8si_4 */ |
| 44628 | case 4586: /* *avx2_gatherdiv8sf_3 */ |
| 44629 | case 4585: /* *avx2_gatherdiv8sf_3 */ |
| 44630 | case 4584: /* *avx2_gatherdiv8si_3 */ |
| 44631 | case 4583: /* *avx2_gatherdiv8si_3 */ |
| 44632 | case 4582: /* *avx2_gatherdiv8sf_2 */ |
| 44633 | case 4581: /* *avx2_gatherdiv8sf_2 */ |
| 44634 | case 4580: /* *avx2_gatherdiv8si_2 */ |
| 44635 | case 4579: /* *avx2_gatherdiv8si_2 */ |
| 44636 | case 4578: /* *avx2_gatherdiv4sf_2 */ |
| 44637 | case 4577: /* *avx2_gatherdiv4sf_2 */ |
| 44638 | case 4576: /* *avx2_gatherdiv4si_2 */ |
| 44639 | case 4575: /* *avx2_gatherdiv4si_2 */ |
| 44640 | case 4574: /* *avx2_gatherdiv4df_2 */ |
| 44641 | case 4573: /* *avx2_gatherdiv4df_2 */ |
| 44642 | case 4572: /* *avx2_gatherdiv4di_2 */ |
| 44643 | case 4571: /* *avx2_gatherdiv4di_2 */ |
| 44644 | case 4570: /* *avx2_gatherdiv2df_2 */ |
| 44645 | case 4569: /* *avx2_gatherdiv2df_2 */ |
| 44646 | case 4568: /* *avx2_gatherdiv2di_2 */ |
| 44647 | case 4567: /* *avx2_gatherdiv2di_2 */ |
| 44648 | case 4566: /* *avx2_gatherdiv8sf */ |
| 44649 | case 4565: /* *avx2_gatherdiv8sf */ |
| 44650 | case 4564: /* *avx2_gatherdiv8si */ |
| 44651 | case 4563: /* *avx2_gatherdiv8si */ |
| 44652 | case 4562: /* *avx2_gatherdiv4sf */ |
| 44653 | case 4561: /* *avx2_gatherdiv4sf */ |
| 44654 | case 4560: /* *avx2_gatherdiv4si */ |
| 44655 | case 4559: /* *avx2_gatherdiv4si */ |
| 44656 | case 4558: /* *avx2_gatherdiv4df */ |
| 44657 | case 4557: /* *avx2_gatherdiv4df */ |
| 44658 | case 4556: /* *avx2_gatherdiv4di */ |
| 44659 | case 4555: /* *avx2_gatherdiv4di */ |
| 44660 | case 4554: /* *avx2_gatherdiv2df */ |
| 44661 | case 4553: /* *avx2_gatherdiv2df */ |
| 44662 | case 4552: /* *avx2_gatherdiv2di */ |
| 44663 | case 4551: /* *avx2_gatherdiv2di */ |
| 44664 | case 4550: /* *avx2_gathersiv8sf_2 */ |
| 44665 | case 4549: /* *avx2_gathersiv8sf_2 */ |
| 44666 | case 4548: /* *avx2_gathersiv8si_2 */ |
| 44667 | case 4547: /* *avx2_gathersiv8si_2 */ |
| 44668 | case 4546: /* *avx2_gathersiv4sf_2 */ |
| 44669 | case 4545: /* *avx2_gathersiv4sf_2 */ |
| 44670 | case 4544: /* *avx2_gathersiv4si_2 */ |
| 44671 | case 4543: /* *avx2_gathersiv4si_2 */ |
| 44672 | case 4542: /* *avx2_gathersiv4df_2 */ |
| 44673 | case 4541: /* *avx2_gathersiv4df_2 */ |
| 44674 | case 4540: /* *avx2_gathersiv4di_2 */ |
| 44675 | case 4539: /* *avx2_gathersiv4di_2 */ |
| 44676 | case 4538: /* *avx2_gathersiv2df_2 */ |
| 44677 | case 4537: /* *avx2_gathersiv2df_2 */ |
| 44678 | case 4536: /* *avx2_gathersiv2di_2 */ |
| 44679 | case 4535: /* *avx2_gathersiv2di_2 */ |
| 44680 | case 4534: /* *avx2_gathersiv8sf */ |
| 44681 | case 4533: /* *avx2_gathersiv8sf */ |
| 44682 | case 4532: /* *avx2_gathersiv8si */ |
| 44683 | case 4531: /* *avx2_gathersiv8si */ |
| 44684 | case 4530: /* *avx2_gathersiv4sf */ |
| 44685 | case 4529: /* *avx2_gathersiv4sf */ |
| 44686 | case 4528: /* *avx2_gathersiv4si */ |
| 44687 | case 4527: /* *avx2_gathersiv4si */ |
| 44688 | case 4526: /* *avx2_gathersiv4df */ |
| 44689 | case 4525: /* *avx2_gathersiv4df */ |
| 44690 | case 4524: /* *avx2_gathersiv4di */ |
| 44691 | case 4523: /* *avx2_gathersiv4di */ |
| 44692 | case 4522: /* *avx2_gathersiv2df */ |
| 44693 | case 4521: /* *avx2_gathersiv2df */ |
| 44694 | case 4520: /* *avx2_gathersiv2di */ |
| 44695 | case 4519: /* *avx2_gathersiv2di */ |
| 44696 | case 4243: /* avx512dq_broadcastv4df_mask_1 */ |
| 44697 | case 4242: /* *avx512dq_broadcastv4df_1 */ |
| 44698 | case 4241: /* avx512dq_broadcastv4di_mask_1 */ |
| 44699 | case 4240: /* *avx512dq_broadcastv4di_1 */ |
| 44700 | case 4239: /* avx512dq_broadcastv8df_mask_1 */ |
| 44701 | case 4238: /* *avx512dq_broadcastv8df_1 */ |
| 44702 | case 4237: /* avx512dq_broadcastv8di_mask_1 */ |
| 44703 | case 4236: /* *avx512dq_broadcastv8di_1 */ |
| 44704 | case 4235: /* avx512dq_broadcastv16si_mask_1 */ |
| 44705 | case 4234: /* *avx512dq_broadcastv16si_1 */ |
| 44706 | case 4233: /* avx512dq_broadcastv16sf_mask_1 */ |
| 44707 | case 4232: /* *avx512dq_broadcastv16sf_1 */ |
| 44708 | case 4231: /* avx512vl_broadcastv8sf_mask_1 */ |
| 44709 | case 4230: /* *avx512vl_broadcastv8sf_1 */ |
| 44710 | case 4229: /* avx512vl_broadcastv8si_mask_1 */ |
| 44711 | case 4228: /* *avx512vl_broadcastv8si_1 */ |
| 44712 | case 4227: /* avx512dq_broadcastv8sf_mask */ |
| 44713 | case 4226: /* *avx512dq_broadcastv8sf */ |
| 44714 | case 4225: /* avx512dq_broadcastv16sf_mask */ |
| 44715 | case 4224: /* *avx512dq_broadcastv16sf */ |
| 44716 | case 4223: /* avx512dq_broadcastv4si_mask */ |
| 44717 | case 4222: /* *avx512dq_broadcastv4si */ |
| 44718 | case 4221: /* avx512dq_broadcastv8si_mask */ |
| 44719 | case 4220: /* *avx512dq_broadcastv8si */ |
| 44720 | case 4219: /* avx512dq_broadcastv16si_mask */ |
| 44721 | case 4218: /* *avx512dq_broadcastv16si */ |
| 44722 | case 4211: /* vec_dupv4df */ |
| 44723 | case 4210: /* vec_dupv4di */ |
| 44724 | case 4209: /* vec_dupv8sf */ |
| 44725 | case 4208: /* vec_dupv8si */ |
| 44726 | case 4207: /* *vec_dupv4si */ |
| 44727 | case 4206: /* *vec_dupv8si */ |
| 44728 | case 4205: /* *vec_dupv8hi */ |
| 44729 | case 4204: /* *vec_dupv16hi */ |
| 44730 | case 4203: /* *vec_dupv16qi */ |
| 44731 | case 4202: /* *vec_dupv32qi */ |
| 44732 | case 4201: /* avx2_vbroadcasti128_v4di */ |
| 44733 | case 4200: /* avx2_vbroadcasti128_v8si */ |
| 44734 | case 4199: /* avx2_vbroadcasti128_v16hi */ |
| 44735 | case 4198: /* avx2_vbroadcasti128_v32qi */ |
| 44736 | case 4194: /* avx512vl_vec_dup_gprv2df_mask */ |
| 44737 | case 4193: /* *avx512vl_vec_dup_gprv2df */ |
| 44738 | case 4192: /* avx512vl_vec_dup_gprv4df_mask */ |
| 44739 | case 4191: /* *avx512vl_vec_dup_gprv4df */ |
| 44740 | case 4190: /* avx512f_vec_dup_gprv8df_mask */ |
| 44741 | case 4189: /* *avx512f_vec_dup_gprv8df */ |
| 44742 | case 4188: /* avx512vl_vec_dup_gprv4sf_mask */ |
| 44743 | case 4187: /* *avx512vl_vec_dup_gprv4sf */ |
| 44744 | case 4186: /* avx512vl_vec_dup_gprv8sf_mask */ |
| 44745 | case 4185: /* *avx512vl_vec_dup_gprv8sf */ |
| 44746 | case 4184: /* avx512f_vec_dup_gprv16sf_mask */ |
| 44747 | case 4183: /* *avx512f_vec_dup_gprv16sf */ |
| 44748 | case 4182: /* avx512vl_vec_dup_gprv2di_mask */ |
| 44749 | case 4181: /* *avx512vl_vec_dup_gprv2di */ |
| 44750 | case 4180: /* avx512vl_vec_dup_gprv4di_mask */ |
| 44751 | case 4179: /* *avx512vl_vec_dup_gprv4di */ |
| 44752 | case 4178: /* avx512f_vec_dup_gprv8di_mask */ |
| 44753 | case 4177: /* *avx512f_vec_dup_gprv8di */ |
| 44754 | case 4176: /* avx512vl_vec_dup_gprv4si_mask */ |
| 44755 | case 4175: /* *avx512vl_vec_dup_gprv4si */ |
| 44756 | case 4174: /* avx512vl_vec_dup_gprv8si_mask */ |
| 44757 | case 4173: /* *avx512vl_vec_dup_gprv8si */ |
| 44758 | case 4172: /* avx512f_vec_dup_gprv16si_mask */ |
| 44759 | case 4171: /* *avx512f_vec_dup_gprv16si */ |
| 44760 | case 4170: /* avx512vl_vec_dup_gprv8hi_mask */ |
| 44761 | case 4169: /* *avx512vl_vec_dup_gprv8hi */ |
| 44762 | case 4168: /* avx512vl_vec_dup_gprv16hi_mask */ |
| 44763 | case 4167: /* *avx512vl_vec_dup_gprv16hi */ |
| 44764 | case 4166: /* avx512bw_vec_dup_gprv32hi_mask */ |
| 44765 | case 4165: /* *avx512bw_vec_dup_gprv32hi */ |
| 44766 | case 4164: /* avx512vl_vec_dup_gprv32qi_mask */ |
| 44767 | case 4163: /* *avx512vl_vec_dup_gprv32qi */ |
| 44768 | case 4162: /* avx512vl_vec_dup_gprv16qi_mask */ |
| 44769 | case 4161: /* *avx512vl_vec_dup_gprv16qi */ |
| 44770 | case 4160: /* avx512bw_vec_dup_gprv64qi_mask */ |
| 44771 | case 4159: /* *avx512bw_vec_dup_gprv64qi */ |
| 44772 | case 4158: /* avx512f_broadcastv8di_mask */ |
| 44773 | case 4157: /* *avx512f_broadcastv8di */ |
| 44774 | case 4156: /* avx512f_broadcastv8df_mask */ |
| 44775 | case 4155: /* *avx512f_broadcastv8df */ |
| 44776 | case 4154: /* avx512f_broadcastv16si_mask */ |
| 44777 | case 4153: /* *avx512f_broadcastv16si */ |
| 44778 | case 4152: /* avx512f_broadcastv16sf_mask */ |
| 44779 | case 4151: /* *avx512f_broadcastv16sf */ |
| 44780 | case 4150: /* avx512vl_vec_dupv8hi_mask */ |
| 44781 | case 4149: /* avx512vl_vec_dupv8hi */ |
| 44782 | case 4148: /* avx512vl_vec_dupv16hi_mask */ |
| 44783 | case 4147: /* avx512vl_vec_dupv16hi */ |
| 44784 | case 4146: /* avx512bw_vec_dupv32hi_mask */ |
| 44785 | case 4145: /* avx512bw_vec_dupv32hi */ |
| 44786 | case 4144: /* avx512vl_vec_dupv32qi_mask */ |
| 44787 | case 4143: /* avx512vl_vec_dupv32qi */ |
| 44788 | case 4142: /* avx512vl_vec_dupv16qi_mask */ |
| 44789 | case 4141: /* avx512vl_vec_dupv16qi */ |
| 44790 | case 4140: /* avx512bw_vec_dupv64qi_mask */ |
| 44791 | case 4139: /* avx512bw_vec_dupv64qi */ |
| 44792 | case 4138: /* avx512vl_vec_dupv2df_mask */ |
| 44793 | case 4137: /* avx512vl_vec_dupv2df */ |
| 44794 | case 4136: /* avx512vl_vec_dupv4df_mask */ |
| 44795 | case 4135: /* avx512vl_vec_dupv4df */ |
| 44796 | case 4134: /* avx512f_vec_dupv8df_mask */ |
| 44797 | case 4133: /* avx512f_vec_dupv8df */ |
| 44798 | case 4132: /* avx512vl_vec_dupv4sf_mask */ |
| 44799 | case 4131: /* avx512vl_vec_dupv4sf */ |
| 44800 | case 4130: /* avx512vl_vec_dupv8sf_mask */ |
| 44801 | case 4129: /* avx512vl_vec_dupv8sf */ |
| 44802 | case 4128: /* avx512f_vec_dupv16sf_mask */ |
| 44803 | case 4127: /* avx512f_vec_dupv16sf */ |
| 44804 | case 4126: /* avx512vl_vec_dupv2di_mask */ |
| 44805 | case 4125: /* avx512vl_vec_dupv2di */ |
| 44806 | case 4124: /* avx512vl_vec_dupv4di_mask */ |
| 44807 | case 4123: /* avx512vl_vec_dupv4di */ |
| 44808 | case 4122: /* avx512f_vec_dupv8di_mask */ |
| 44809 | case 4121: /* avx512f_vec_dupv8di */ |
| 44810 | case 4120: /* avx512vl_vec_dupv4si_mask */ |
| 44811 | case 4119: /* avx512vl_vec_dupv4si */ |
| 44812 | case 4118: /* avx512vl_vec_dupv8si_mask */ |
| 44813 | case 4117: /* avx512vl_vec_dupv8si */ |
| 44814 | case 4116: /* avx512f_vec_dupv16si_mask */ |
| 44815 | case 4115: /* avx512f_vec_dupv16si */ |
| 44816 | case 4114: /* avx512bw_vec_dupv64qi_1 */ |
| 44817 | case 4113: /* avx512bw_vec_dupv32hi_1 */ |
| 44818 | case 4112: /* avx512f_vec_dupv8di_1 */ |
| 44819 | case 4111: /* avx512f_vec_dupv16si_1 */ |
| 44820 | case 4072: /* avx2_pbroadcastv4di_1 */ |
| 44821 | case 4071: /* avx2_pbroadcastv8si_1 */ |
| 44822 | case 4070: /* avx2_pbroadcastv16hi_1 */ |
| 44823 | case 4069: /* avx2_pbroadcastv32qi_1 */ |
| 44824 | case 4068: /* avx2_pbroadcastv2di */ |
| 44825 | case 4067: /* avx2_pbroadcastv4di */ |
| 44826 | case 4066: /* avx2_pbroadcastv4si */ |
| 44827 | case 4065: /* avx2_pbroadcastv8si */ |
| 44828 | case 4064: /* avx2_pbroadcastv8hi */ |
| 44829 | case 4063: /* avx2_pbroadcastv16hi */ |
| 44830 | case 4062: /* avx2_pbroadcastv32hi */ |
| 44831 | case 4061: /* avx2_pbroadcastv16qi */ |
| 44832 | case 4060: /* avx2_pbroadcastv32qi */ |
| 44833 | case 4059: /* avx2_pbroadcastv64qi */ |
| 44834 | case 4058: /* avx2_pbroadcastv8di */ |
| 44835 | case 4057: /* avx2_pbroadcastv16si */ |
| 44836 | case 3873: /* sse4_1_zero_extendv2siv2di2_mask */ |
| 44837 | case 3872: /* sse4_1_zero_extendv2siv2di2 */ |
| 44838 | case 3871: /* sse4_1_sign_extendv2siv2di2_mask */ |
| 44839 | case 3870: /* sse4_1_sign_extendv2siv2di2 */ |
| 44840 | case 3869: /* avx2_zero_extendv4siv4di2_mask */ |
| 44841 | case 3868: /* avx2_zero_extendv4siv4di2 */ |
| 44842 | case 3867: /* avx2_sign_extendv4siv4di2_mask */ |
| 44843 | case 3866: /* avx2_sign_extendv4siv4di2 */ |
| 44844 | case 3865: /* avx512f_zero_extendv8siv8di2_mask */ |
| 44845 | case 3864: /* avx512f_zero_extendv8siv8di2 */ |
| 44846 | case 3863: /* avx512f_sign_extendv8siv8di2_mask */ |
| 44847 | case 3862: /* avx512f_sign_extendv8siv8di2 */ |
| 44848 | case 3861: /* sse4_1_zero_extendv2hiv2di2_mask */ |
| 44849 | case 3860: /* sse4_1_zero_extendv2hiv2di2 */ |
| 44850 | case 3859: /* sse4_1_sign_extendv2hiv2di2_mask */ |
| 44851 | case 3858: /* sse4_1_sign_extendv2hiv2di2 */ |
| 44852 | case 3857: /* avx2_zero_extendv4hiv4di2_mask */ |
| 44853 | case 3856: /* avx2_zero_extendv4hiv4di2 */ |
| 44854 | case 3855: /* avx2_sign_extendv4hiv4di2_mask */ |
| 44855 | case 3854: /* avx2_sign_extendv4hiv4di2 */ |
| 44856 | case 3853: /* avx512f_zero_extendv8hiv8di2_mask */ |
| 44857 | case 3852: /* avx512f_zero_extendv8hiv8di2 */ |
| 44858 | case 3851: /* avx512f_sign_extendv8hiv8di2_mask */ |
| 44859 | case 3850: /* avx512f_sign_extendv8hiv8di2 */ |
| 44860 | case 3849: /* sse4_1_zero_extendv2qiv2di2_mask */ |
| 44861 | case 3848: /* sse4_1_zero_extendv2qiv2di2 */ |
| 44862 | case 3847: /* sse4_1_sign_extendv2qiv2di2_mask */ |
| 44863 | case 3846: /* sse4_1_sign_extendv2qiv2di2 */ |
| 44864 | case 3845: /* avx2_zero_extendv4qiv4di2_mask */ |
| 44865 | case 3844: /* avx2_zero_extendv4qiv4di2 */ |
| 44866 | case 3843: /* avx2_sign_extendv4qiv4di2_mask */ |
| 44867 | case 3842: /* avx2_sign_extendv4qiv4di2 */ |
| 44868 | case 3841: /* avx512f_zero_extendv8qiv8di2_mask */ |
| 44869 | case 3840: /* avx512f_zero_extendv8qiv8di2 */ |
| 44870 | case 3839: /* avx512f_sign_extendv8qiv8di2_mask */ |
| 44871 | case 3838: /* avx512f_sign_extendv8qiv8di2 */ |
| 44872 | case 3837: /* sse4_1_zero_extendv4hiv4si2_mask */ |
| 44873 | case 3836: /* sse4_1_zero_extendv4hiv4si2 */ |
| 44874 | case 3835: /* sse4_1_sign_extendv4hiv4si2_mask */ |
| 44875 | case 3834: /* sse4_1_sign_extendv4hiv4si2 */ |
| 44876 | case 3833: /* avx2_zero_extendv8hiv8si2_mask */ |
| 44877 | case 3832: /* avx2_zero_extendv8hiv8si2 */ |
| 44878 | case 3831: /* avx2_sign_extendv8hiv8si2_mask */ |
| 44879 | case 3830: /* avx2_sign_extendv8hiv8si2 */ |
| 44880 | case 3829: /* avx512f_zero_extendv16hiv16si2_mask */ |
| 44881 | case 3828: /* avx512f_zero_extendv16hiv16si2 */ |
| 44882 | case 3827: /* avx512f_sign_extendv16hiv16si2_mask */ |
| 44883 | case 3826: /* avx512f_sign_extendv16hiv16si2 */ |
| 44884 | case 3825: /* sse4_1_zero_extendv4qiv4si2_mask */ |
| 44885 | case 3824: /* sse4_1_zero_extendv4qiv4si2 */ |
| 44886 | case 3823: /* sse4_1_sign_extendv4qiv4si2_mask */ |
| 44887 | case 3822: /* sse4_1_sign_extendv4qiv4si2 */ |
| 44888 | case 3821: /* avx2_zero_extendv8qiv8si2_mask */ |
| 44889 | case 3820: /* avx2_zero_extendv8qiv8si2 */ |
| 44890 | case 3819: /* avx2_sign_extendv8qiv8si2_mask */ |
| 44891 | case 3818: /* avx2_sign_extendv8qiv8si2 */ |
| 44892 | case 3817: /* avx512f_zero_extendv16qiv16si2_mask */ |
| 44893 | case 3816: /* *avx512f_zero_extendv16qiv16si2 */ |
| 44894 | case 3815: /* avx512f_sign_extendv16qiv16si2_mask */ |
| 44895 | case 3814: /* *avx512f_sign_extendv16qiv16si2 */ |
| 44896 | case 3813: /* sse4_1_zero_extendv8qiv8hi2_mask */ |
| 44897 | case 3812: /* sse4_1_zero_extendv8qiv8hi2 */ |
| 44898 | case 3811: /* sse4_1_sign_extendv8qiv8hi2_mask */ |
| 44899 | case 3810: /* sse4_1_sign_extendv8qiv8hi2 */ |
| 44900 | case 3809: /* avx512bw_zero_extendv32qiv32hi2_mask */ |
| 44901 | case 3808: /* avx512bw_zero_extendv32qiv32hi2 */ |
| 44902 | case 3807: /* avx512bw_sign_extendv32qiv32hi2_mask */ |
| 44903 | case 3806: /* avx512bw_sign_extendv32qiv32hi2 */ |
| 44904 | case 3805: /* avx2_zero_extendv16qiv16hi2_mask */ |
| 44905 | case 3804: /* avx2_zero_extendv16qiv16hi2 */ |
| 44906 | case 3803: /* avx2_sign_extendv16qiv16hi2_mask */ |
| 44907 | case 3802: /* avx2_sign_extendv16qiv16hi2 */ |
| 44908 | case 3800: /* avx2_pblenddv4si */ |
| 44909 | case 3799: /* avx2_pblenddv8si */ |
| 44910 | case 3798: /* *avx2_pblendw */ |
| 44911 | case 3797: /* sse4_1_pblendw */ |
| 44912 | case 3796: /* sse4_1_pblendvb */ |
| 44913 | case 3795: /* avx2_pblendvb */ |
| 44914 | case 3786: /* sse4_1_movntdqa */ |
| 44915 | case 3785: /* avx2_movntdqa */ |
| 44916 | case 3784: /* avx512f_movntdqa */ |
| 44917 | case 3779: /* sse4_1_blendvpd */ |
| 44918 | case 3778: /* avx_blendvpd256 */ |
| 44919 | case 3777: /* sse4_1_blendvps */ |
| 44920 | case 3776: /* avx_blendvps256 */ |
| 44921 | case 3775: /* sse4_1_blendpd */ |
| 44922 | case 3774: /* avx_blendpd256 */ |
| 44923 | case 3773: /* sse4_1_blendps */ |
| 44924 | case 3772: /* avx_blendps256 */ |
| 44925 | case 3767: /* sse4a_vmmovntv2df */ |
| 44926 | case 3766: /* sse4a_vmmovntv4sf */ |
| 44927 | case 3765: /* sse4a_movntdf */ |
| 44928 | case 3764: /* sse4a_movntsf */ |
| 44929 | case 3671: /* *sse2_maskmovdqu */ |
| 44930 | case 3670: /* *sse2_maskmovdqu */ |
| 44931 | case 3669: /* *sse2_pmovmskb_zext */ |
| 44932 | case 3668: /* *avx2_pmovmskb_zext */ |
| 44933 | case 3667: /* sse2_pmovmskb */ |
| 44934 | case 3666: /* avx2_pmovmskb */ |
| 44935 | case 3665: /* *sse2_movmskpd_zext */ |
| 44936 | case 3664: /* *avx_movmskpd256_zext */ |
| 44937 | case 3663: /* *sse_movmskps_zext */ |
| 44938 | case 3662: /* *avx_movmskps256_zext */ |
| 44939 | case 3661: /* sse2_movmskpd */ |
| 44940 | case 3660: /* avx_movmskpd256 */ |
| 44941 | case 3659: /* sse_movmskps */ |
| 44942 | case 3658: /* avx_movmskps256 */ |
| 44943 | case 2930: /* *avx512f_us_truncatev8div16qi2_mask_1 */ |
| 44944 | case 2929: /* *avx512f_truncatev8div16qi2_mask_1 */ |
| 44945 | case 2928: /* *avx512f_ss_truncatev8div16qi2_mask_1 */ |
| 44946 | case 2927: /* avx512f_us_truncatev8div16qi2_mask */ |
| 44947 | case 2926: /* avx512f_truncatev8div16qi2_mask */ |
| 44948 | case 2925: /* avx512f_ss_truncatev8div16qi2_mask */ |
| 44949 | case 2921: /* *avx512f_us_truncatev8div16qi2 */ |
| 44950 | case 2920: /* *avx512f_truncatev8div16qi2 */ |
| 44951 | case 2919: /* *avx512f_ss_truncatev8div16qi2 */ |
| 44952 | case 2915: /* *avx512vl_us_truncatev2div2si2_mask_1 */ |
| 44953 | case 2914: /* *avx512vl_truncatev2div2si2_mask_1 */ |
| 44954 | case 2913: /* *avx512vl_ss_truncatev2div2si2_mask_1 */ |
| 44955 | case 2912: /* avx512vl_us_truncatev2div2si2_mask */ |
| 44956 | case 2911: /* avx512vl_truncatev2div2si2_mask */ |
| 44957 | case 2910: /* avx512vl_ss_truncatev2div2si2_mask */ |
| 44958 | case 2906: /* *avx512vl_us_truncatev2div2si2 */ |
| 44959 | case 2905: /* *avx512vl_truncatev2div2si2 */ |
| 44960 | case 2904: /* *avx512vl_ss_truncatev2div2si2 */ |
| 44961 | case 2900: /* *avx512vl_us_truncatev2div2hi2_mask_1 */ |
| 44962 | case 2899: /* *avx512vl_truncatev2div2hi2_mask_1 */ |
| 44963 | case 2898: /* *avx512vl_ss_truncatev2div2hi2_mask_1 */ |
| 44964 | case 2897: /* avx512vl_us_truncatev2div2hi2_mask */ |
| 44965 | case 2896: /* avx512vl_truncatev2div2hi2_mask */ |
| 44966 | case 2895: /* avx512vl_ss_truncatev2div2hi2_mask */ |
| 44967 | case 2885: /* *avx512vl_us_truncatev4div4hi2_mask_1 */ |
| 44968 | case 2884: /* *avx512vl_truncatev4div4hi2_mask_1 */ |
| 44969 | case 2883: /* *avx512vl_ss_truncatev4div4hi2_mask_1 */ |
| 44970 | case 2882: /* *avx512vl_us_truncatev4siv4hi2_mask_1 */ |
| 44971 | case 2881: /* *avx512vl_truncatev4siv4hi2_mask_1 */ |
| 44972 | case 2880: /* *avx512vl_ss_truncatev4siv4hi2_mask_1 */ |
| 44973 | case 2879: /* avx512vl_us_truncatev4div4hi2_mask */ |
| 44974 | case 2878: /* avx512vl_truncatev4div4hi2_mask */ |
| 44975 | case 2877: /* avx512vl_ss_truncatev4div4hi2_mask */ |
| 44976 | case 2876: /* avx512vl_us_truncatev4siv4hi2_mask */ |
| 44977 | case 2875: /* avx512vl_truncatev4siv4hi2_mask */ |
| 44978 | case 2874: /* avx512vl_ss_truncatev4siv4hi2_mask */ |
| 44979 | case 2867: /* *avx512vl_us_truncatev4siv4hi2 */ |
| 44980 | case 2866: /* *avx512vl_truncatev4siv4hi2 */ |
| 44981 | case 2865: /* *avx512vl_ss_truncatev4siv4hi2 */ |
| 44982 | case 2864: /* *avx512vl_us_truncatev2div2hi2 */ |
| 44983 | case 2863: /* *avx512vl_truncatev2div2hi2 */ |
| 44984 | case 2862: /* *avx512vl_ss_truncatev2div2hi2 */ |
| 44985 | case 2861: /* *avx512vl_us_truncatev4div4hi2 */ |
| 44986 | case 2860: /* *avx512vl_truncatev4div4hi2 */ |
| 44987 | case 2859: /* *avx512vl_ss_truncatev4div4hi2 */ |
| 44988 | case 2852: /* *avx512vl_us_truncatev8siv8qi2_mask_1 */ |
| 44989 | case 2851: /* *avx512vl_truncatev8siv8qi2_mask_1 */ |
| 44990 | case 2850: /* *avx512vl_ss_truncatev8siv8qi2_mask_1 */ |
| 44991 | case 2849: /* *avx512vl_us_truncatev8hiv8qi2_mask_1 */ |
| 44992 | case 2848: /* *avx512vl_truncatev8hiv8qi2_mask_1 */ |
| 44993 | case 2847: /* *avx512vl_ss_truncatev8hiv8qi2_mask_1 */ |
| 44994 | case 2846: /* avx512vl_us_truncatev8siv8qi2_mask */ |
| 44995 | case 2845: /* avx512vl_truncatev8siv8qi2_mask */ |
| 44996 | case 2844: /* avx512vl_ss_truncatev8siv8qi2_mask */ |
| 44997 | case 2843: /* avx512vl_us_truncatev8hiv8qi2_mask */ |
| 44998 | case 2842: /* avx512vl_truncatev8hiv8qi2_mask */ |
| 44999 | case 2841: /* avx512vl_ss_truncatev8hiv8qi2_mask */ |
| 45000 | case 2828: /* *avx512vl_us_truncatev4div4qi2_mask_1 */ |
| 45001 | case 2827: /* *avx512vl_truncatev4div4qi2_mask_1 */ |
| 45002 | case 2826: /* *avx512vl_ss_truncatev4div4qi2_mask_1 */ |
| 45003 | case 2825: /* *avx512vl_us_truncatev4siv4qi2_mask_1 */ |
| 45004 | case 2824: /* *avx512vl_truncatev4siv4qi2_mask_1 */ |
| 45005 | case 2823: /* *avx512vl_ss_truncatev4siv4qi2_mask_1 */ |
| 45006 | case 2822: /* avx512vl_us_truncatev4div4qi2_mask */ |
| 45007 | case 2821: /* avx512vl_truncatev4div4qi2_mask */ |
| 45008 | case 2820: /* avx512vl_ss_truncatev4div4qi2_mask */ |
| 45009 | case 2819: /* avx512vl_us_truncatev4siv4qi2_mask */ |
| 45010 | case 2818: /* avx512vl_truncatev4siv4qi2_mask */ |
| 45011 | case 2817: /* avx512vl_ss_truncatev4siv4qi2_mask */ |
| 45012 | case 2807: /* *avx512vl_us_truncatev2div2qi2_mask_1 */ |
| 45013 | case 2806: /* *avx512vl_truncatev2div2qi2_mask_1 */ |
| 45014 | case 2805: /* *avx512vl_ss_truncatev2div2qi2_mask_1 */ |
| 45015 | case 2804: /* avx512vl_us_truncatev2div2qi2_mask */ |
| 45016 | case 2803: /* avx512vl_truncatev2div2qi2_mask */ |
| 45017 | case 2802: /* avx512vl_ss_truncatev2div2qi2_mask */ |
| 45018 | case 2798: /* *avx512vl_us_truncatev8hiv8qi2 */ |
| 45019 | case 2797: /* *avx512vl_truncatev8hiv8qi2 */ |
| 45020 | case 2796: /* *avx512vl_ss_truncatev8hiv8qi2 */ |
| 45021 | case 2795: /* *avx512vl_us_truncatev4siv4qi2 */ |
| 45022 | case 2794: /* *avx512vl_truncatev4siv4qi2 */ |
| 45023 | case 2793: /* *avx512vl_ss_truncatev4siv4qi2 */ |
| 45024 | case 2792: /* *avx512vl_us_truncatev8siv8qi2 */ |
| 45025 | case 2791: /* *avx512vl_truncatev8siv8qi2 */ |
| 45026 | case 2790: /* *avx512vl_ss_truncatev8siv8qi2 */ |
| 45027 | case 2789: /* *avx512vl_us_truncatev2div2qi2 */ |
| 45028 | case 2788: /* *avx512vl_truncatev2div2qi2 */ |
| 45029 | case 2787: /* *avx512vl_ss_truncatev2div2qi2 */ |
| 45030 | case 2786: /* *avx512vl_us_truncatev4div4qi2 */ |
| 45031 | case 2785: /* *avx512vl_truncatev4div4qi2 */ |
| 45032 | case 2784: /* *avx512vl_ss_truncatev4div4qi2 */ |
| 45033 | case 2453: /* sse_movss */ |
| 45034 | case 1304: /* sse2_movntv2df */ |
| 45035 | case 1303: /* avx_movntv4df */ |
| 45036 | case 1302: /* avx512f_movntv8df */ |
| 45037 | case 1301: /* sse_movntv4sf */ |
| 45038 | case 1300: /* avx_movntv8sf */ |
| 45039 | case 1299: /* avx512f_movntv16sf */ |
| 45040 | case 1298: /* sse2_movntidi */ |
| 45041 | case 1297: /* sse2_movntisi */ |
| 45042 | case 1296: /* sse3_lddqu */ |
| 45043 | case 1295: /* avx_lddqu256 */ |
| 45044 | case 1293: /* sse2_movq128 */ |
| 45045 | case 1274: /* avx512vl_blendmv8hi */ |
| 45046 | case 1273: /* avx512vl_blendmv16hi */ |
| 45047 | case 1272: /* avx512bw_blendmv32hi */ |
| 45048 | case 1271: /* avx512vl_blendmv32qi */ |
| 45049 | case 1270: /* avx512vl_blendmv16qi */ |
| 45050 | case 1269: /* avx512bw_blendmv64qi */ |
| 45051 | case 1268: /* avx512vl_blendmv2df */ |
| 45052 | case 1267: /* avx512vl_blendmv4df */ |
| 45053 | case 1266: /* avx512f_blendmv8df */ |
| 45054 | case 1265: /* avx512vl_blendmv4sf */ |
| 45055 | case 1264: /* avx512vl_blendmv8sf */ |
| 45056 | case 1263: /* avx512f_blendmv16sf */ |
| 45057 | case 1262: /* avx512vl_blendmv2di */ |
| 45058 | case 1261: /* avx512vl_blendmv4di */ |
| 45059 | case 1260: /* avx512f_blendmv8di */ |
| 45060 | case 1259: /* avx512vl_blendmv4si */ |
| 45061 | case 1258: /* avx512vl_blendmv8si */ |
| 45062 | case 1257: /* avx512f_blendmv16si */ |
| 45063 | case 933: /* movmsk_df */ |
| 45064 | if (((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) || (cached_memory == MEMORY_STORE) || (cached_memory == MEMORY_BOTH)) |
| 45065 | { |
| 45066 | return 2; |
| 45067 | } |
| 45068 | else |
| 45069 | { |
| 45070 | return 0; |
| 45071 | } |
| 45072 | |
| 45073 | case 889: /* fistsi2_with_temp */ |
| 45074 | case 888: /* fisthi2_with_temp */ |
| 45075 | case 887: /* fistsi2 */ |
| 45076 | case 886: /* fisthi2 */ |
| 45077 | case 885: /* *fistsi2_1 */ |
| 45078 | case 884: /* *fisthi2_1 */ |
| 45079 | case 883: /* fistdi2_with_temp */ |
| 45080 | case 882: /* fistdi2 */ |
| 45081 | case 881: /* *fistdi2_1 */ |
| 45082 | case 880: /* rintdf2_frndint */ |
| 45083 | case 879: /* rintsf2_frndint */ |
| 45084 | case 878: /* rintxf2 */ |
| 45085 | case 875: /* fscalexf4_i387 */ |
| 45086 | case 874: /* *f2xm1xf2_i387 */ |
| 45087 | case 873: /* fxtract_extenddfxf3_i387 */ |
| 45088 | case 872: /* fxtract_extendsfxf3_i387 */ |
| 45089 | case 871: /* fxtractxf3_i387 */ |
| 45090 | case 870: /* fyl2xp1_extenddfxf3_i387 */ |
| 45091 | case 869: /* fyl2xp1_extendsfxf3_i387 */ |
| 45092 | case 868: /* fyl2xp1xf3_i387 */ |
| 45093 | case 867: /* fyl2x_extenddfxf3_i387 */ |
| 45094 | case 866: /* fyl2x_extendsfxf3_i387 */ |
| 45095 | case 865: /* fyl2xxf3_i387 */ |
| 45096 | case 864: /* fpatan_extenddfxf3_i387 */ |
| 45097 | case 863: /* fpatan_extendsfxf3_i387 */ |
| 45098 | case 862: /* *fpatanxf3_i387 */ |
| 45099 | case 861: /* fptan_extenddfxf4_i387 */ |
| 45100 | case 860: /* fptan_extendsfxf4_i387 */ |
| 45101 | case 859: /* fptanxf4_i387 */ |
| 45102 | case 858: /* sincos_extenddfxf3_i387 */ |
| 45103 | case 857: /* sincos_extendsfxf3_i387 */ |
| 45104 | case 856: /* sincosxf3 */ |
| 45105 | case 855: /* *cos_extenddfxf2_i387 */ |
| 45106 | case 854: /* *sin_extenddfxf2_i387 */ |
| 45107 | case 853: /* *cos_extendsfxf2_i387 */ |
| 45108 | case 852: /* *sin_extendsfxf2_i387 */ |
| 45109 | case 851: /* *cosxf2_i387 */ |
| 45110 | case 850: /* *sinxf2_i387 */ |
| 45111 | case 849: /* fprem1xf4_i387 */ |
| 45112 | case 848: /* fpremxf4_i387 */ |
| 45113 | case 844: /* sqrt_extenddfxf2_i387 */ |
| 45114 | case 843: /* sqrt_extendsfxf2_i387 */ |
| 45115 | case 842: /* sqrtxf2 */ |
| 45116 | return 100 /* 0x64 */; |
| 45117 | |
| 45118 | case 693: /* simple_return_indirect_internal */ |
| 45119 | case 663: /* *tablejump_1 */ |
| 45120 | case 662: /* *tablejump_1 */ |
| 45121 | case 661: /* *indirect_jump */ |
| 45122 | case 660: /* *indirect_jump */ |
| 45123 | extract_constrain_insn_cached (insn); |
| 45124 | if (! ( |
| 45125 | #line 12442 "/___NETBSD_SRC___/tools/gcc/../../external/gpl3/gcc/dist/gcc/config/i386/i386.md" |
| 45126 | ((cfun->machine->indirect_branch_type |
| 45127 | != indirect_branch_keep)))) |
| 45128 | { |
| 45129 | return 0; |
| 45130 | } |
| 45131 | else |
| 45132 | { |
| 45133 | return 1; |
| 45134 | } |
| 45135 | |
| 45136 | case 4899: /* vpmultishiftqbv32qi_mask */ |
| 45137 | case 4898: /* vpmultishiftqbv32qi */ |
| 45138 | case 4897: /* vpmultishiftqbv16qi_mask */ |
| 45139 | case 4896: /* vpmultishiftqbv16qi */ |
| 45140 | case 4895: /* vpmultishiftqbv64qi_mask */ |
| 45141 | case 4894: /* vpmultishiftqbv64qi */ |
| 45142 | case 4514: /* *vcvtps2ph_store */ |
| 45143 | case 4513: /* *vcvtps2ph_mask */ |
| 45144 | case 4512: /* *vcvtps2ph */ |
| 45145 | case 4503: /* vcvtph2ps_mask */ |
| 45146 | case 4502: /* vcvtph2ps */ |
| 45147 | case 4416: /* vec_set_hi_v32qi */ |
| 45148 | case 4415: /* vec_set_lo_v32qi */ |
| 45149 | case 4414: /* vec_set_hi_v16hi */ |
| 45150 | case 4413: /* vec_set_lo_v16hi */ |
| 45151 | case 4412: /* vec_set_hi_v8sf_mask */ |
| 45152 | case 4411: /* vec_set_hi_v8sf */ |
| 45153 | case 4410: /* vec_set_hi_v8si_mask */ |
| 45154 | case 4409: /* vec_set_hi_v8si */ |
| 45155 | case 4408: /* vec_set_lo_v8sf_mask */ |
| 45156 | case 4407: /* vec_set_lo_v8sf */ |
| 45157 | case 4406: /* vec_set_lo_v8si_mask */ |
| 45158 | case 4405: /* vec_set_lo_v8si */ |
| 45159 | case 4404: /* vec_set_hi_v4df_mask */ |
| 45160 | case 4403: /* vec_set_hi_v4df */ |
| 45161 | case 4402: /* vec_set_hi_v4di_mask */ |
| 45162 | case 4401: /* vec_set_hi_v4di */ |
| 45163 | case 4400: /* vec_set_lo_v4df_mask */ |
| 45164 | case 4399: /* vec_set_lo_v4df */ |
| 45165 | case 4398: /* vec_set_lo_v4di_mask */ |
| 45166 | case 4397: /* vec_set_lo_v4di */ |
| 45167 | case 4390: /* *avx_vperm2f128v4df_nozero */ |
| 45168 | case 4389: /* *avx_vperm2f128v8sf_nozero */ |
| 45169 | case 4388: /* *avx_vperm2f128v8si_nozero */ |
| 45170 | case 4387: /* *avx_vperm2f128v4df_full */ |
| 45171 | case 4386: /* *avx_vperm2f128v8sf_full */ |
| 45172 | case 4385: /* *avx_vperm2f128v8si_full */ |
| 45173 | case 4384: /* avx512bw_vpermt2varv32hi3_mask */ |
| 45174 | case 4383: /* avx512vl_vpermt2varv16hi3_mask */ |
| 45175 | case 4382: /* avx512vl_vpermt2varv8hi3_mask */ |
| 45176 | case 4381: /* avx512vl_vpermt2varv32qi3_mask */ |
| 45177 | case 4380: /* avx512vl_vpermt2varv16qi3_mask */ |
| 45178 | case 4379: /* avx512bw_vpermt2varv64qi3_mask */ |
| 45179 | case 4378: /* avx512vl_vpermt2varv2df3_mask */ |
| 45180 | case 4377: /* avx512vl_vpermt2varv2di3_mask */ |
| 45181 | case 4376: /* avx512vl_vpermt2varv4sf3_mask */ |
| 45182 | case 4375: /* avx512vl_vpermt2varv4si3_mask */ |
| 45183 | case 4374: /* avx512vl_vpermt2varv4df3_mask */ |
| 45184 | case 4373: /* avx512vl_vpermt2varv4di3_mask */ |
| 45185 | case 4372: /* avx512vl_vpermt2varv8sf3_mask */ |
| 45186 | case 4371: /* avx512vl_vpermt2varv8si3_mask */ |
| 45187 | case 4370: /* avx512f_vpermt2varv8df3_mask */ |
| 45188 | case 4369: /* avx512f_vpermt2varv8di3_mask */ |
| 45189 | case 4368: /* avx512f_vpermt2varv16sf3_mask */ |
| 45190 | case 4367: /* avx512f_vpermt2varv16si3_mask */ |
| 45191 | case 4366: /* avx512bw_vpermt2varv32hi3_maskz_1 */ |
| 45192 | case 4365: /* avx512bw_vpermt2varv32hi3 */ |
| 45193 | case 4364: /* avx512vl_vpermt2varv16hi3_maskz_1 */ |
| 45194 | case 4363: /* avx512vl_vpermt2varv16hi3 */ |
| 45195 | case 4362: /* avx512vl_vpermt2varv8hi3_maskz_1 */ |
| 45196 | case 4361: /* avx512vl_vpermt2varv8hi3 */ |
| 45197 | case 4360: /* avx512vl_vpermt2varv32qi3_maskz_1 */ |
| 45198 | case 4359: /* avx512vl_vpermt2varv32qi3 */ |
| 45199 | case 4358: /* avx512vl_vpermt2varv16qi3_maskz_1 */ |
| 45200 | case 4357: /* avx512vl_vpermt2varv16qi3 */ |
| 45201 | case 4356: /* avx512bw_vpermt2varv64qi3_maskz_1 */ |
| 45202 | case 4355: /* avx512bw_vpermt2varv64qi3 */ |
| 45203 | case 4354: /* avx512vl_vpermt2varv2df3_maskz_1 */ |
| 45204 | case 4353: /* avx512vl_vpermt2varv2df3 */ |
| 45205 | case 4352: /* avx512vl_vpermt2varv2di3_maskz_1 */ |
| 45206 | case 4351: /* avx512vl_vpermt2varv2di3 */ |
| 45207 | case 4350: /* avx512vl_vpermt2varv4sf3_maskz_1 */ |
| 45208 | case 4349: /* avx512vl_vpermt2varv4sf3 */ |
| 45209 | case 4348: /* avx512vl_vpermt2varv4si3_maskz_1 */ |
| 45210 | case 4347: /* avx512vl_vpermt2varv4si3 */ |
| 45211 | case 4346: /* avx512vl_vpermt2varv4df3_maskz_1 */ |
| 45212 | case 4345: /* avx512vl_vpermt2varv4df3 */ |
| 45213 | case 4344: /* avx512vl_vpermt2varv4di3_maskz_1 */ |
| 45214 | case 4343: /* avx512vl_vpermt2varv4di3 */ |
| 45215 | case 4342: /* avx512vl_vpermt2varv8sf3_maskz_1 */ |
| 45216 | case 4341: /* avx512vl_vpermt2varv8sf3 */ |
| 45217 | case 4340: /* avx512vl_vpermt2varv8si3_maskz_1 */ |
| 45218 | case 4339: /* avx512vl_vpermt2varv8si3 */ |
| 45219 | case 4338: /* avx512f_vpermt2varv8df3_maskz_1 */ |
| 45220 | case 4337: /* avx512f_vpermt2varv8df3 */ |
| 45221 | case 4336: /* avx512f_vpermt2varv8di3_maskz_1 */ |
| 45222 | case 4335: /* avx512f_vpermt2varv8di3 */ |
| 45223 | case 4334: /* avx512f_vpermt2varv16sf3_maskz_1 */ |
| 45224 | case 4333: /* avx512f_vpermt2varv16sf3 */ |
| 45225 | case 4332: /* avx512f_vpermt2varv16si3_maskz_1 */ |
| 45226 | case 4331: /* avx512f_vpermt2varv16si3 */ |
| 45227 | case 4330: /* avx512bw_vpermi2varv32hi3_mask */ |
| 45228 | case 4329: /* avx512vl_vpermi2varv16hi3_mask */ |
| 45229 | case 4328: /* avx512vl_vpermi2varv8hi3_mask */ |
| 45230 | case 4327: /* avx512vl_vpermi2varv32qi3_mask */ |
| 45231 | case 4326: /* avx512vl_vpermi2varv16qi3_mask */ |
| 45232 | case 4325: /* avx512bw_vpermi2varv64qi3_mask */ |
| 45233 | case 4324: /* avx512vl_vpermi2varv2df3_mask */ |
| 45234 | case 4323: /* avx512vl_vpermi2varv2di3_mask */ |
| 45235 | case 4322: /* avx512vl_vpermi2varv4sf3_mask */ |
| 45236 | case 4321: /* avx512vl_vpermi2varv4si3_mask */ |
| 45237 | case 4320: /* avx512vl_vpermi2varv4df3_mask */ |
| 45238 | case 4319: /* avx512vl_vpermi2varv4di3_mask */ |
| 45239 | case 4318: /* avx512vl_vpermi2varv8sf3_mask */ |
| 45240 | case 4317: /* avx512vl_vpermi2varv8si3_mask */ |
| 45241 | case 4316: /* avx512f_vpermi2varv8df3_mask */ |
| 45242 | case 4315: /* avx512f_vpermi2varv8di3_mask */ |
| 45243 | case 4314: /* avx512f_vpermi2varv16sf3_mask */ |
| 45244 | case 4313: /* avx512f_vpermi2varv16si3_mask */ |
| 45245 | case 4312: /* avx512bw_vpermi2varv32hi3_maskz_1 */ |
| 45246 | case 4311: /* avx512bw_vpermi2varv32hi3 */ |
| 45247 | case 4310: /* avx512vl_vpermi2varv16hi3_maskz_1 */ |
| 45248 | case 4309: /* avx512vl_vpermi2varv16hi3 */ |
| 45249 | case 4308: /* avx512vl_vpermi2varv8hi3_maskz_1 */ |
| 45250 | case 4307: /* avx512vl_vpermi2varv8hi3 */ |
| 45251 | case 4306: /* avx512vl_vpermi2varv32qi3_maskz_1 */ |
| 45252 | case 4305: /* avx512vl_vpermi2varv32qi3 */ |
| 45253 | case 4304: /* avx512vl_vpermi2varv16qi3_maskz_1 */ |
| 45254 | case 4303: /* avx512vl_vpermi2varv16qi3 */ |
| 45255 | case 4302: /* avx512bw_vpermi2varv64qi3_maskz_1 */ |
| 45256 | case 4301: /* avx512bw_vpermi2varv64qi3 */ |
| 45257 | case 4300: /* avx512vl_vpermi2varv2df3_maskz_1 */ |
| 45258 | case 4299: /* avx512vl_vpermi2varv2df3 */ |
| 45259 | case 4298: /* avx512vl_vpermi2varv2di3_maskz_1 */ |
| 45260 | case 4297: /* avx512vl_vpermi2varv2di3 */ |
| 45261 | case 4296: /* avx512vl_vpermi2varv4sf3_maskz_1 */ |
| 45262 | case 4295: /* avx512vl_vpermi2varv4sf3 */ |
| 45263 | case 4294: /* avx512vl_vpermi2varv4si3_maskz_1 */ |
| 45264 | case 4293: /* avx512vl_vpermi2varv4si3 */ |
| 45265 | case 4292: /* avx512vl_vpermi2varv4df3_maskz_1 */ |
| 45266 | case 4291: /* avx512vl_vpermi2varv4df3 */ |
| 45267 | case 4290: /* avx512vl_vpermi2varv4di3_maskz_1 */ |
| 45268 | case 4289: /* avx512vl_vpermi2varv4di3 */ |
| 45269 | case 4288: /* avx512vl_vpermi2varv8sf3_maskz_1 */ |
| 45270 | case 4287: /* avx512vl_vpermi2varv8sf3 */ |
| 45271 | case 4286: /* avx512vl_vpermi2varv8si3_maskz_1 */ |
| 45272 | case 4285: /* avx512vl_vpermi2varv8si3 */ |
| 45273 | case 4284: /* avx512f_vpermi2varv8df3_maskz_1 */ |
| 45274 | case 4283: /* avx512f_vpermi2varv8df3 */ |
| 45275 | case 4282: /* avx512f_vpermi2varv8di3_maskz_1 */ |
| 45276 | case 4281: /* avx512f_vpermi2varv8di3 */ |
| 45277 | case 4280: /* avx512f_vpermi2varv16sf3_maskz_1 */ |
| 45278 | case 4279: /* avx512f_vpermi2varv16sf3 */ |
| 45279 | case 4278: /* avx512f_vpermi2varv16si3_maskz_1 */ |
| 45280 | case 4277: /* avx512f_vpermi2varv16si3 */ |
| 45281 | case 4276: /* avx_vpermilvarv2df3_mask */ |
| 45282 | case 4275: /* avx_vpermilvarv2df3 */ |
| 45283 | case 4274: /* avx_vpermilvarv4df3_mask */ |
| 45284 | case 4273: /* avx_vpermilvarv4df3 */ |
| 45285 | case 4272: /* avx512f_vpermilvarv8df3_mask */ |
| 45286 | case 4271: /* avx512f_vpermilvarv8df3 */ |
| 45287 | case 4270: /* avx_vpermilvarv4sf3_mask */ |
| 45288 | case 4269: /* avx_vpermilvarv4sf3 */ |
| 45289 | case 4268: /* avx_vpermilvarv8sf3_mask */ |
| 45290 | case 4267: /* avx_vpermilvarv8sf3 */ |
| 45291 | case 4266: /* avx512f_vpermilvarv16sf3_mask */ |
| 45292 | case 4265: /* avx512f_vpermilvarv16sf3 */ |
| 45293 | case 4264: /* *avx_vpermilpv2df_mask */ |
| 45294 | case 4263: /* *avx_vpermilpv2df */ |
| 45295 | case 4262: /* *avx_vpermilpv4df_mask */ |
| 45296 | case 4261: /* *avx_vpermilpv4df */ |
| 45297 | case 4260: /* *avx512f_vpermilpv8df_mask */ |
| 45298 | case 4259: /* *avx512f_vpermilpv8df */ |
| 45299 | case 4258: /* *avx_vpermilpv4sf_mask */ |
| 45300 | case 4257: /* *avx_vpermilpv4sf */ |
| 45301 | case 4256: /* *avx_vpermilpv8sf_mask */ |
| 45302 | case 4255: /* *avx_vpermilpv8sf */ |
| 45303 | case 4254: /* *avx512f_vpermilpv16sf_mask */ |
| 45304 | case 4253: /* *avx512f_vpermilpv16sf */ |
| 45305 | case 4109: /* avx2_permv2ti */ |
| 45306 | case 4108: /* avx512f_permv8di_1_mask */ |
| 45307 | case 4107: /* avx512f_permv8di_1 */ |
| 45308 | case 4106: /* avx512f_permv8df_1_mask */ |
| 45309 | case 4105: /* avx512f_permv8df_1 */ |
| 45310 | case 4104: /* avx2_permv4df_1_mask */ |
| 45311 | case 4103: /* avx2_permv4df_1 */ |
| 45312 | case 4102: /* avx2_permv4di_1_mask */ |
| 45313 | case 4101: /* avx2_permv4di_1 */ |
| 45314 | case 4100: /* avx512bw_permvarv32hi_mask */ |
| 45315 | case 4099: /* avx512bw_permvarv32hi */ |
| 45316 | case 4098: /* avx512vl_permvarv16hi_mask */ |
| 45317 | case 4097: /* avx512vl_permvarv16hi */ |
| 45318 | case 4096: /* avx512vl_permvarv8hi_mask */ |
| 45319 | case 4095: /* avx512vl_permvarv8hi */ |
| 45320 | case 4094: /* avx512vl_permvarv32qi_mask */ |
| 45321 | case 4093: /* avx512vl_permvarv32qi */ |
| 45322 | case 4092: /* avx512vl_permvarv16qi_mask */ |
| 45323 | case 4091: /* avx512vl_permvarv16qi */ |
| 45324 | case 4090: /* avx512bw_permvarv64qi_mask */ |
| 45325 | case 4089: /* avx512bw_permvarv64qi */ |
| 45326 | case 4088: /* avx2_permvarv4df_mask */ |
| 45327 | case 4087: /* avx2_permvarv4df */ |
| 45328 | case 4086: /* avx2_permvarv4di_mask */ |
| 45329 | case 4085: /* avx2_permvarv4di */ |
| 45330 | case 4084: /* avx512f_permvarv8df_mask */ |
| 45331 | case 4083: /* avx512f_permvarv8df */ |
| 45332 | case 4082: /* avx512f_permvarv8di_mask */ |
| 45333 | case 4081: /* avx512f_permvarv8di */ |
| 45334 | case 4080: /* avx512f_permvarv16sf_mask */ |
| 45335 | case 4079: /* avx512f_permvarv16sf */ |
| 45336 | case 4078: /* avx512f_permvarv16si_mask */ |
| 45337 | case 4077: /* avx512f_permvarv16si */ |
| 45338 | case 4076: /* avx2_permvarv8sf_mask */ |
| 45339 | case 4075: /* avx2_permvarv8sf */ |
| 45340 | case 4074: /* avx2_permvarv8si_mask */ |
| 45341 | case 4073: /* avx2_permvarv8si */ |
| 45342 | case 4043: /* xop_pcom_tfv2di3 */ |
| 45343 | case 4042: /* xop_pcom_tfv4si3 */ |
| 45344 | case 4041: /* xop_pcom_tfv8hi3 */ |
| 45345 | case 4040: /* xop_pcom_tfv16qi3 */ |
| 45346 | case 4039: /* xop_maskcmp_uns2v2di3 */ |
| 45347 | case 4038: /* xop_maskcmp_uns2v4si3 */ |
| 45348 | case 4037: /* xop_maskcmp_uns2v8hi3 */ |
| 45349 | case 4036: /* xop_maskcmp_uns2v16qi3 */ |
| 45350 | case 4035: /* xop_maskcmp_unsv2di3 */ |
| 45351 | case 4034: /* xop_maskcmp_unsv4si3 */ |
| 45352 | case 4033: /* xop_maskcmp_unsv8hi3 */ |
| 45353 | case 4032: /* xop_maskcmp_unsv16qi3 */ |
| 45354 | case 3896: /* sse4_1_roundsd */ |
| 45355 | case 3895: /* sse4_1_roundss */ |
| 45356 | case 3894: /* sse4_1_roundpd */ |
| 45357 | case 3892: /* sse4_1_roundps */ |
| 45358 | case 3794: /* sse4_1_packusdw_mask */ |
| 45359 | case 3793: /* sse4_1_packusdw */ |
| 45360 | case 3792: /* avx2_packusdw_mask */ |
| 45361 | case 3791: /* avx2_packusdw */ |
| 45362 | case 3790: /* avx512bw_packusdw_mask */ |
| 45363 | case 3789: /* avx512bw_packusdw */ |
| 45364 | case 3619: /* sse2_pshufhw_1_mask */ |
| 45365 | case 3618: /* sse2_pshufhw_1 */ |
| 45366 | case 3617: /* avx2_pshufhw_1_mask */ |
| 45367 | case 3616: /* avx2_pshufhw_1 */ |
| 45368 | case 3615: /* avx512bw_pshufhwv32hi_mask */ |
| 45369 | case 3614: /* *avx512bw_pshufhwv32hi */ |
| 45370 | case 3613: /* sse2_pshuflw_1_mask */ |
| 45371 | case 3612: /* sse2_pshuflw_1 */ |
| 45372 | case 3611: /* avx2_pshuflw_1_mask */ |
| 45373 | case 3610: /* avx2_pshuflw_1 */ |
| 45374 | case 3609: /* avx512bw_pshuflwv32hi_mask */ |
| 45375 | case 3608: /* *avx512bw_pshuflwv32hi */ |
| 45376 | case 3601: /* avx512f_shuf_i32x4_1_mask */ |
| 45377 | case 3600: /* avx512f_shuf_i32x4_1 */ |
| 45378 | case 3599: /* avx512f_shuf_f32x4_1_mask */ |
| 45379 | case 3598: /* avx512f_shuf_f32x4_1 */ |
| 45380 | case 3597: /* avx512vl_shuf_f32x4_1_mask */ |
| 45381 | case 3596: /* avx512vl_shuf_f32x4_1 */ |
| 45382 | case 3595: /* avx512vl_shuf_i32x4_1_mask */ |
| 45383 | case 3594: /* avx512vl_shuf_i32x4_1 */ |
| 45384 | case 3593: /* avx512f_shuf_i64x2_1_mask */ |
| 45385 | case 3592: /* avx512f_shuf_i64x2_1 */ |
| 45386 | case 3591: /* avx512f_shuf_f64x2_1_mask */ |
| 45387 | case 3590: /* avx512f_shuf_f64x2_1 */ |
| 45388 | case 3589: /* avx512dq_shuf_f64x2_1_mask */ |
| 45389 | case 3588: /* *avx512dq_shuf_f64x2_1 */ |
| 45390 | case 3587: /* avx512dq_shuf_i64x2_1_mask */ |
| 45391 | case 3586: /* *avx512dq_shuf_i64x2_1 */ |
| 45392 | case 3585: /* vec_set_hi_v8di_mask */ |
| 45393 | case 3584: /* vec_set_hi_v8di */ |
| 45394 | case 3583: /* vec_set_hi_v8df_mask */ |
| 45395 | case 3582: /* vec_set_hi_v8df */ |
| 45396 | case 3581: /* vec_set_lo_v8di_mask */ |
| 45397 | case 3580: /* vec_set_lo_v8di */ |
| 45398 | case 3579: /* vec_set_lo_v8df_mask */ |
| 45399 | case 3578: /* vec_set_lo_v8df */ |
| 45400 | case 3577: /* vec_set_hi_v16si_mask */ |
| 45401 | case 3576: /* vec_set_hi_v16si */ |
| 45402 | case 3575: /* vec_set_hi_v16sf_mask */ |
| 45403 | case 3574: /* vec_set_hi_v16sf */ |
| 45404 | case 3573: /* vec_set_lo_v16si_mask */ |
| 45405 | case 3572: /* vec_set_lo_v16si */ |
| 45406 | case 3571: /* vec_set_lo_v16sf_mask */ |
| 45407 | case 3570: /* vec_set_lo_v16sf */ |
| 45408 | case 3569: /* avx512f_vinserti32x4_1_mask */ |
| 45409 | case 3568: /* *avx512f_vinserti32x4_1 */ |
| 45410 | case 3567: /* avx512f_vinsertf32x4_1_mask */ |
| 45411 | case 3566: /* *avx512f_vinsertf32x4_1 */ |
| 45412 | case 3565: /* avx512dq_vinserti64x2_1_mask */ |
| 45413 | case 3564: /* *avx512dq_vinserti64x2_1 */ |
| 45414 | case 3563: /* avx512dq_vinsertf64x2_1_mask */ |
| 45415 | case 3562: /* *avx512dq_vinsertf64x2_1 */ |
| 45416 | case 3561: /* sse4_1_pinsrq */ |
| 45417 | case 3560: /* sse4_1_pinsrd */ |
| 45418 | case 3559: /* sse2_pinsrw */ |
| 45419 | case 3558: /* sse4_1_pinsrb */ |
| 45420 | case 3557: /* vec_interleave_lowv4si_mask */ |
| 45421 | case 3556: /* vec_interleave_lowv4si */ |
| 45422 | case 3555: /* avx512f_interleave_lowv16si_mask */ |
| 45423 | case 3554: /* *avx512f_interleave_lowv16si */ |
| 45424 | case 3553: /* avx2_interleave_lowv8si_mask */ |
| 45425 | case 3552: /* avx2_interleave_lowv8si */ |
| 45426 | case 3551: /* vec_interleave_highv4si_mask */ |
| 45427 | case 3550: /* vec_interleave_highv4si */ |
| 45428 | case 3549: /* avx512f_interleave_highv16si_mask */ |
| 45429 | case 3548: /* *avx512f_interleave_highv16si */ |
| 45430 | case 3547: /* avx2_interleave_highv8si_mask */ |
| 45431 | case 3546: /* avx2_interleave_highv8si */ |
| 45432 | case 3545: /* vec_interleave_lowv8hi_mask */ |
| 45433 | case 3544: /* vec_interleave_lowv8hi */ |
| 45434 | case 3543: /* avx2_interleave_lowv16hi_mask */ |
| 45435 | case 3542: /* avx2_interleave_lowv16hi */ |
| 45436 | case 3541: /* avx512bw_interleave_lowv32hi_mask */ |
| 45437 | case 3540: /* *avx512bw_interleave_lowv32hi */ |
| 45438 | case 3539: /* vec_interleave_highv8hi_mask */ |
| 45439 | case 3538: /* vec_interleave_highv8hi */ |
| 45440 | case 3537: /* avx2_interleave_highv16hi_mask */ |
| 45441 | case 3536: /* avx2_interleave_highv16hi */ |
| 45442 | case 3535: /* avx512bw_interleave_highv32hi_mask */ |
| 45443 | case 3534: /* avx512bw_interleave_highv32hi */ |
| 45444 | case 3533: /* vec_interleave_lowv16qi_mask */ |
| 45445 | case 3532: /* vec_interleave_lowv16qi */ |
| 45446 | case 3531: /* avx2_interleave_lowv32qi_mask */ |
| 45447 | case 3530: /* avx2_interleave_lowv32qi */ |
| 45448 | case 3529: /* avx512bw_interleave_lowv64qi_mask */ |
| 45449 | case 3528: /* avx512bw_interleave_lowv64qi */ |
| 45450 | case 3527: /* vec_interleave_highv16qi_mask */ |
| 45451 | case 3526: /* vec_interleave_highv16qi */ |
| 45452 | case 3525: /* avx2_interleave_highv32qi_mask */ |
| 45453 | case 3524: /* avx2_interleave_highv32qi */ |
| 45454 | case 3523: /* avx512bw_interleave_highv64qi_mask */ |
| 45455 | case 3522: /* avx512bw_interleave_highv64qi */ |
| 45456 | case 3521: /* sse2_packuswb_mask */ |
| 45457 | case 3520: /* sse2_packuswb */ |
| 45458 | case 3519: /* avx2_packuswb_mask */ |
| 45459 | case 3518: /* avx2_packuswb */ |
| 45460 | case 3517: /* avx512bw_packuswb_mask */ |
| 45461 | case 3516: /* avx512bw_packuswb */ |
| 45462 | case 3515: /* sse2_packssdw_mask */ |
| 45463 | case 3514: /* sse2_packssdw */ |
| 45464 | case 3513: /* avx2_packssdw_mask */ |
| 45465 | case 3512: /* avx2_packssdw */ |
| 45466 | case 3511: /* avx512bw_packssdw_mask */ |
| 45467 | case 3510: /* avx512bw_packssdw */ |
| 45468 | case 3509: /* sse2_packsswb_mask */ |
| 45469 | case 3508: /* sse2_packsswb */ |
| 45470 | case 3507: /* avx2_packsswb_mask */ |
| 45471 | case 3506: /* avx2_packsswb */ |
| 45472 | case 3505: /* avx512bw_packsswb_mask */ |
| 45473 | case 3504: /* avx512bw_packsswb */ |
| 45474 | case 3455: /* *xorv8hi3 */ |
| 45475 | case 3454: /* *iorv8hi3 */ |
| 45476 | case 3453: /* *andv8hi3 */ |
| 45477 | case 3452: /* *xorv16hi3 */ |
| 45478 | case 3451: /* *iorv16hi3 */ |
| 45479 | case 3450: /* *andv16hi3 */ |
| 45480 | case 3449: /* *xorv32hi3 */ |
| 45481 | case 3448: /* *iorv32hi3 */ |
| 45482 | case 3447: /* *andv32hi3 */ |
| 45483 | case 3446: /* *xorv16qi3 */ |
| 45484 | case 3445: /* *iorv16qi3 */ |
| 45485 | case 3444: /* *andv16qi3 */ |
| 45486 | case 3443: /* *xorv32qi3 */ |
| 45487 | case 3442: /* *iorv32qi3 */ |
| 45488 | case 3441: /* *andv32qi3 */ |
| 45489 | case 3440: /* *xorv64qi3 */ |
| 45490 | case 3439: /* *iorv64qi3 */ |
| 45491 | case 3438: /* *andv64qi3 */ |
| 45492 | case 3437: /* xorv2di3_mask */ |
| 45493 | case 3436: /* *xorv2di3 */ |
| 45494 | case 3435: /* iorv2di3_mask */ |
| 45495 | case 3434: /* *iorv2di3 */ |
| 45496 | case 3433: /* andv2di3_mask */ |
| 45497 | case 3432: /* *andv2di3 */ |
| 45498 | case 3431: /* xorv4di3_mask */ |
| 45499 | case 3430: /* *xorv4di3 */ |
| 45500 | case 3429: /* iorv4di3_mask */ |
| 45501 | case 3428: /* *iorv4di3 */ |
| 45502 | case 3427: /* andv4di3_mask */ |
| 45503 | case 3426: /* *andv4di3 */ |
| 45504 | case 3425: /* xorv8di3_mask */ |
| 45505 | case 3424: /* *xorv8di3 */ |
| 45506 | case 3423: /* iorv8di3_mask */ |
| 45507 | case 3422: /* *iorv8di3 */ |
| 45508 | case 3421: /* andv8di3_mask */ |
| 45509 | case 3420: /* *andv8di3 */ |
| 45510 | case 3419: /* xorv4si3_mask */ |
| 45511 | case 3418: /* *xorv4si3 */ |
| 45512 | case 3417: /* iorv4si3_mask */ |
| 45513 | case 3416: /* *iorv4si3 */ |
| 45514 | case 3415: /* andv4si3_mask */ |
| 45515 | case 3414: /* *andv4si3 */ |
| 45516 | case 3413: /* xorv8si3_mask */ |
| 45517 | case 3412: /* *xorv8si3 */ |
| 45518 | case 3411: /* iorv8si3_mask */ |
| 45519 | case 3410: /* *iorv8si3 */ |
| 45520 | case 3409: /* andv8si3_mask */ |
| 45521 | case 3408: /* *andv8si3 */ |
| 45522 | case 3407: /* xorv16si3_mask */ |
| 45523 | case 3406: /* *xorv16si3 */ |
| 45524 | case 3405: /* iorv16si3_mask */ |
| 45525 | case 3404: /* *iorv16si3 */ |
| 45526 | case 3403: /* andv16si3_mask */ |
| 45527 | case 3402: /* *andv16si3 */ |
| 45528 | case 3401: /* *andnotv2di3_mask */ |
| 45529 | case 3400: /* *andnotv4di3_mask */ |
| 45530 | case 3399: /* *andnotv8di3_mask */ |
| 45531 | case 3398: /* *andnotv4si3_mask */ |
| 45532 | case 3397: /* *andnotv8si3_mask */ |
| 45533 | case 3396: /* *andnotv16si3_mask */ |
| 45534 | case 3395: /* *andnotv2di3 */ |
| 45535 | case 3394: /* *andnotv4di3 */ |
| 45536 | case 3393: /* *andnotv4si3 */ |
| 45537 | case 3392: /* *andnotv8si3 */ |
| 45538 | case 3391: /* *andnotv8hi3 */ |
| 45539 | case 3390: /* *andnotv16hi3 */ |
| 45540 | case 3389: /* *andnotv32hi3 */ |
| 45541 | case 3388: /* *andnotv16qi3 */ |
| 45542 | case 3387: /* *andnotv32qi3 */ |
| 45543 | case 3386: /* *andnotv64qi3 */ |
| 45544 | case 3385: /* *andnotv8di3 */ |
| 45545 | case 3384: /* *andnotv16si3 */ |
| 45546 | case 3383: /* sse2_gtv4si3 */ |
| 45547 | case 3382: /* sse2_gtv8hi3 */ |
| 45548 | case 3381: /* sse2_gtv16qi3 */ |
| 45549 | case 3380: /* avx512vl_gtv8hi3_mask */ |
| 45550 | case 3379: /* avx512vl_gtv8hi3 */ |
| 45551 | case 3378: /* avx512vl_gtv16hi3_mask */ |
| 45552 | case 3377: /* avx512vl_gtv16hi3 */ |
| 45553 | case 3376: /* avx512bw_gtv32hi3_mask */ |
| 45554 | case 3375: /* avx512bw_gtv32hi3 */ |
| 45555 | case 3374: /* avx512vl_gtv32qi3_mask */ |
| 45556 | case 3373: /* avx512vl_gtv32qi3 */ |
| 45557 | case 3372: /* avx512vl_gtv16qi3_mask */ |
| 45558 | case 3371: /* avx512vl_gtv16qi3 */ |
| 45559 | case 3370: /* avx512bw_gtv64qi3_mask */ |
| 45560 | case 3369: /* avx512bw_gtv64qi3 */ |
| 45561 | case 3368: /* avx512vl_gtv2di3_mask */ |
| 45562 | case 3367: /* avx512vl_gtv2di3 */ |
| 45563 | case 3366: /* avx512vl_gtv4di3_mask */ |
| 45564 | case 3365: /* avx512vl_gtv4di3 */ |
| 45565 | case 3364: /* avx512f_gtv8di3_mask */ |
| 45566 | case 3363: /* avx512f_gtv8di3 */ |
| 45567 | case 3362: /* avx512vl_gtv4si3_mask */ |
| 45568 | case 3361: /* avx512vl_gtv4si3 */ |
| 45569 | case 3360: /* avx512vl_gtv8si3_mask */ |
| 45570 | case 3359: /* avx512vl_gtv8si3 */ |
| 45571 | case 3358: /* avx512f_gtv16si3_mask */ |
| 45572 | case 3357: /* avx512f_gtv16si3 */ |
| 45573 | case 3356: /* avx2_gtv4di3 */ |
| 45574 | case 3355: /* avx2_gtv8si3 */ |
| 45575 | case 3354: /* avx2_gtv16hi3 */ |
| 45576 | case 3353: /* avx2_gtv32qi3 */ |
| 45577 | case 3352: /* sse4_2_gtv2di3 */ |
| 45578 | case 3351: /* *sse2_eqv4si3 */ |
| 45579 | case 3350: /* *sse2_eqv8hi3 */ |
| 45580 | case 3349: /* *sse2_eqv16qi3 */ |
| 45581 | case 3348: /* *sse4_1_eqv2di3 */ |
| 45582 | case 3347: /* avx512vl_eqv2di3_mask_1 */ |
| 45583 | case 3346: /* avx512vl_eqv2di3_1 */ |
| 45584 | case 3345: /* avx512vl_eqv4di3_mask_1 */ |
| 45585 | case 3344: /* avx512vl_eqv4di3_1 */ |
| 45586 | case 3343: /* avx512f_eqv8di3_mask_1 */ |
| 45587 | case 3342: /* avx512f_eqv8di3_1 */ |
| 45588 | case 3341: /* avx512vl_eqv4si3_mask_1 */ |
| 45589 | case 3340: /* avx512vl_eqv4si3_1 */ |
| 45590 | case 3339: /* avx512vl_eqv8si3_mask_1 */ |
| 45591 | case 3338: /* avx512vl_eqv8si3_1 */ |
| 45592 | case 3337: /* avx512f_eqv16si3_mask_1 */ |
| 45593 | case 3336: /* avx512f_eqv16si3_1 */ |
| 45594 | case 3335: /* avx512vl_eqv8hi3_mask_1 */ |
| 45595 | case 3334: /* avx512vl_eqv8hi3_1 */ |
| 45596 | case 3333: /* avx512vl_eqv16hi3_mask_1 */ |
| 45597 | case 3332: /* avx512vl_eqv16hi3_1 */ |
| 45598 | case 3331: /* avx512bw_eqv32hi3_mask_1 */ |
| 45599 | case 3330: /* avx512bw_eqv32hi3_1 */ |
| 45600 | case 3329: /* avx512vl_eqv32qi3_mask_1 */ |
| 45601 | case 3328: /* avx512vl_eqv32qi3_1 */ |
| 45602 | case 3327: /* avx512vl_eqv16qi3_mask_1 */ |
| 45603 | case 3326: /* avx512vl_eqv16qi3_1 */ |
| 45604 | case 3325: /* avx512bw_eqv64qi3_mask_1 */ |
| 45605 | case 3324: /* avx512bw_eqv64qi3_1 */ |
| 45606 | case 3323: /* *avx2_eqv4di3 */ |
| 45607 | case 3322: /* *avx2_eqv8si3 */ |
| 45608 | case 3321: /* *avx2_eqv16hi3 */ |
| 45609 | case 3320: /* *avx2_eqv32qi3 */ |
| 45610 | case 2725: /* sse2_shufpd_v2df */ |
| 45611 | case 2724: /* sse2_shufpd_v2di */ |
| 45612 | case 2723: /* vec_interleave_lowv2di_mask */ |
| 45613 | case 2722: /* vec_interleave_lowv2di */ |
| 45614 | case 2721: /* avx512f_interleave_lowv8di_mask */ |
| 45615 | case 2720: /* *avx512f_interleave_lowv8di */ |
| 45616 | case 2719: /* avx2_interleave_lowv4di_mask */ |
| 45617 | case 2718: /* avx2_interleave_lowv4di */ |
| 45618 | case 2717: /* vec_interleave_highv2di_mask */ |
| 45619 | case 2716: /* vec_interleave_highv2di */ |
| 45620 | case 2715: /* avx512f_interleave_highv8di_mask */ |
| 45621 | case 2714: /* *avx512f_interleave_highv8di */ |
| 45622 | case 2713: /* avx2_interleave_highv4di_mask */ |
| 45623 | case 2712: /* avx2_interleave_highv4di */ |
| 45624 | case 2711: /* sse2_shufpd_v2df_mask */ |
| 45625 | case 2710: /* avx_shufpd256_1_mask */ |
| 45626 | case 2709: /* avx_shufpd256_1 */ |
| 45627 | case 2708: /* avx512f_shufpd512_1_mask */ |
| 45628 | case 2707: /* avx512f_shufpd512_1 */ |
| 45629 | case 2706: /* avx512f_shufps512_1_mask */ |
| 45630 | case 2705: /* avx512f_shufps512_1 */ |
| 45631 | case 2588: /* avx512vl_vternlogv2di_mask */ |
| 45632 | case 2587: /* avx512vl_vternlogv4di_mask */ |
| 45633 | case 2586: /* avx512f_vternlogv8di_mask */ |
| 45634 | case 2585: /* avx512vl_vternlogv4si_mask */ |
| 45635 | case 2584: /* avx512vl_vternlogv8si_mask */ |
| 45636 | case 2583: /* avx512f_vternlogv16si_mask */ |
| 45637 | case 2582: /* avx512vl_vternlogv2di_maskz_1 */ |
| 45638 | case 2581: /* avx512vl_vternlogv2di */ |
| 45639 | case 2580: /* avx512vl_vternlogv4di_maskz_1 */ |
| 45640 | case 2579: /* avx512vl_vternlogv4di */ |
| 45641 | case 2578: /* avx512f_vternlogv8di_maskz_1 */ |
| 45642 | case 2577: /* avx512f_vternlogv8di */ |
| 45643 | case 2576: /* avx512vl_vternlogv4si_maskz_1 */ |
| 45644 | case 2575: /* avx512vl_vternlogv4si */ |
| 45645 | case 2574: /* avx512vl_vternlogv8si_maskz_1 */ |
| 45646 | case 2573: /* avx512vl_vternlogv8si */ |
| 45647 | case 2572: /* avx512f_vternlogv16si_maskz_1 */ |
| 45648 | case 2571: /* avx512f_vternlogv16si */ |
| 45649 | case 2541: /* avx512vl_unpcklpd128_mask */ |
| 45650 | case 2540: /* *avx_unpcklpd256_mask */ |
| 45651 | case 2539: /* *avx_unpcklpd256 */ |
| 45652 | case 2538: /* *avx512f_unpcklpd512_mask */ |
| 45653 | case 2537: /* *avx512f_unpcklpd512 */ |
| 45654 | case 2535: /* avx512vl_unpckhpd128_mask */ |
| 45655 | case 2534: /* avx_unpckhpd256_mask */ |
| 45656 | case 2533: /* avx_unpckhpd256 */ |
| 45657 | case 2532: /* avx512f_unpckhpd512_mask */ |
| 45658 | case 2531: /* *avx512f_unpckhpd512 */ |
| 45659 | case 2465: /* sse4_1_insertps */ |
| 45660 | case 2464: /* *vec_setv4sf_sse4_1 */ |
| 45661 | case 2448: /* sse_shufps_v4sf */ |
| 45662 | case 2447: /* sse_shufps_v4si */ |
| 45663 | case 2446: /* sse_shufps_v4sf_mask */ |
| 45664 | case 2445: /* avx_shufps256_1_mask */ |
| 45665 | case 2444: /* avx_shufps256_1 */ |
| 45666 | case 2431: /* vec_interleave_lowv4sf */ |
| 45667 | case 2430: /* unpcklps128_mask */ |
| 45668 | case 2429: /* avx_unpcklps256_mask */ |
| 45669 | case 2428: /* avx_unpcklps256 */ |
| 45670 | case 2427: /* avx512f_unpcklps512_mask */ |
| 45671 | case 2426: /* *avx512f_unpcklps512 */ |
| 45672 | case 2425: /* vec_interleave_highv4sf_mask */ |
| 45673 | case 2424: /* vec_interleave_highv4sf */ |
| 45674 | case 2423: /* avx_unpckhps256_mask */ |
| 45675 | case 2422: /* avx_unpckhps256 */ |
| 45676 | case 2421: /* avx512f_unpckhps512_mask */ |
| 45677 | case 2420: /* *avx512f_unpckhps512 */ |
| 45678 | case 2417: /* sse2_cvtps2pd_mask */ |
| 45679 | case 2416: /* sse2_cvtps2pd */ |
| 45680 | case 2381: /* avx_cvtpd2ps256_mask */ |
| 45681 | case 2380: /* avx_cvtpd2ps256 */ |
| 45682 | case 2367: /* ufix_truncv4sfv4si2_mask */ |
| 45683 | case 2366: /* ufix_truncv4sfv4si2 */ |
| 45684 | case 2363: /* ufix_truncv2sfv2di2_mask */ |
| 45685 | case 2362: /* ufix_truncv2sfv2di2 */ |
| 45686 | case 2361: /* fix_truncv2sfv2di2_mask */ |
| 45687 | case 2360: /* fix_truncv2sfv2di2 */ |
| 45688 | case 2347: /* ufix_notruncv2dfv2di2_mask */ |
| 45689 | case 2346: /* ufix_notruncv2dfv2di2 */ |
| 45690 | case 2339: /* fix_notruncv2dfv2di2_mask */ |
| 45691 | case 2338: /* fix_notruncv2dfv2di2 */ |
| 45692 | case 2331: /* ufix_truncv2dfv2di2_mask */ |
| 45693 | case 2330: /* ufix_truncv2dfv2di2 */ |
| 45694 | case 2329: /* fix_truncv2dfv2di2_mask */ |
| 45695 | case 2328: /* fix_truncv2dfv2di2 */ |
| 45696 | case 2311: /* ufix_truncv2dfv2si2_mask */ |
| 45697 | case 2310: /* ufix_truncv2dfv2si2 */ |
| 45698 | case 2301: /* ufix_notruncv2dfv2si2_mask */ |
| 45699 | case 2300: /* ufix_notruncv2dfv2si2 */ |
| 45700 | case 2282: /* sse2_cvtdq2pd_mask */ |
| 45701 | case 2281: /* sse2_cvtdq2pd */ |
| 45702 | case 2278: /* ufloatv2siv2df2_mask */ |
| 45703 | case 2277: /* ufloatv2siv2df2 */ |
| 45704 | case 2272: /* *ufloatv2div2sf2_mask_1 */ |
| 45705 | case 2271: /* *floatv2div2sf2_mask_1 */ |
| 45706 | case 2270: /* ufloatv2div2sf2_mask */ |
| 45707 | case 2269: /* floatv2div2sf2_mask */ |
| 45708 | case 2268: /* *ufloatv2div2sf2 */ |
| 45709 | case 2267: /* *floatv2div2sf2 */ |
| 45710 | case 2266: /* ufloatv4div4sf2_mask */ |
| 45711 | case 2265: /* ufloatv4div4sf2 */ |
| 45712 | case 2264: /* floatv4div4sf2_mask */ |
| 45713 | case 2263: /* floatv4div4sf2 */ |
| 45714 | case 2254: /* ufloatv2div2df2_mask_round */ |
| 45715 | case 2253: /* ufloatv2div2df2_mask */ |
| 45716 | case 2252: /* ufloatv2div2df2_round */ |
| 45717 | case 2251: /* ufloatv2div2df2 */ |
| 45718 | case 2250: /* floatv2div2df2_mask_round */ |
| 45719 | case 2249: /* floatv2div2df2_mask */ |
| 45720 | case 2248: /* floatv2div2df2_round */ |
| 45721 | case 2247: /* floatv2div2df2 */ |
| 45722 | case 2197: /* sse2_cvttpd2pi */ |
| 45723 | case 2195: /* sse2_cvtpi2pd */ |
| 45724 | case 2194: /* fix_truncv4sfv4si2_mask */ |
| 45725 | case 2193: /* fix_truncv4sfv4si2 */ |
| 45726 | case 2182: /* avx512dq_cvtps2uqqv2di_mask */ |
| 45727 | case 2181: /* *avx512dq_cvtps2uqqv2di */ |
| 45728 | case 2174: /* avx512dq_cvtps2qqv2di_mask */ |
| 45729 | case 2173: /* *avx512dq_cvtps2qqv2di */ |
| 45730 | case 2166: /* avx512vl_ufix_notruncv4sfv4si_mask_round */ |
| 45731 | case 2165: /* avx512vl_ufix_notruncv4sfv4si_mask */ |
| 45732 | case 2164: /* *avx512vl_ufix_notruncv4sfv4si_round */ |
| 45733 | case 2163: /* *avx512vl_ufix_notruncv4sfv4si */ |
| 45734 | case 2150: /* sse2_fix_notruncv4sfv4si_mask */ |
| 45735 | case 2149: /* sse2_fix_notruncv4sfv4si */ |
| 45736 | case 2146: /* ufloatv4siv4sf2_mask_round */ |
| 45737 | case 2145: /* ufloatv4siv4sf2_mask */ |
| 45738 | case 2144: /* ufloatv4siv4sf2_round */ |
| 45739 | case 2143: /* ufloatv4siv4sf2 */ |
| 45740 | case 2134: /* floatv4siv4sf2_mask */ |
| 45741 | case 2133: /* floatv4siv4sf2 */ |
| 45742 | case 2103: /* sse_cvtpi2ps */ |
| 45743 | case 1800: /* *xortf3 */ |
| 45744 | case 1799: /* *iortf3 */ |
| 45745 | case 1798: /* *andtf3 */ |
| 45746 | case 1797: /* *xordf3 */ |
| 45747 | case 1796: /* *iordf3 */ |
| 45748 | case 1795: /* *anddf3 */ |
| 45749 | case 1794: /* *xorsf3 */ |
| 45750 | case 1793: /* *iorsf3 */ |
| 45751 | case 1792: /* *andsf3 */ |
| 45752 | case 1791: /* *andnottf3 */ |
| 45753 | case 1790: /* *andnotdf3 */ |
| 45754 | case 1789: /* *andnotsf3 */ |
| 45755 | case 1788: /* *xorv8df3_mask */ |
| 45756 | case 1787: /* *xorv8df3 */ |
| 45757 | case 1786: /* *iorv8df3_mask */ |
| 45758 | case 1785: /* *iorv8df3 */ |
| 45759 | case 1784: /* *andv8df3_mask */ |
| 45760 | case 1783: /* *andv8df3 */ |
| 45761 | case 1782: /* *xorv16sf3_mask */ |
| 45762 | case 1781: /* *xorv16sf3 */ |
| 45763 | case 1780: /* *iorv16sf3_mask */ |
| 45764 | case 1779: /* *iorv16sf3 */ |
| 45765 | case 1778: /* *andv16sf3_mask */ |
| 45766 | case 1777: /* *andv16sf3 */ |
| 45767 | case 1776: /* *xorv2df3_mask */ |
| 45768 | case 1775: /* *xorv2df3 */ |
| 45769 | case 1774: /* *iorv2df3_mask */ |
| 45770 | case 1773: /* *iorv2df3 */ |
| 45771 | case 1772: /* *andv2df3_mask */ |
| 45772 | case 1771: /* *andv2df3 */ |
| 45773 | case 1770: /* *xorv4df3_mask */ |
| 45774 | case 1769: /* *xorv4df3 */ |
| 45775 | case 1768: /* *iorv4df3_mask */ |
| 45776 | case 1767: /* *iorv4df3 */ |
| 45777 | case 1766: /* *andv4df3_mask */ |
| 45778 | case 1765: /* *andv4df3 */ |
| 45779 | case 1764: /* *xorv4sf3_mask */ |
| 45780 | case 1763: /* *xorv4sf3 */ |
| 45781 | case 1762: /* *iorv4sf3_mask */ |
| 45782 | case 1761: /* *iorv4sf3 */ |
| 45783 | case 1760: /* *andv4sf3_mask */ |
| 45784 | case 1759: /* *andv4sf3 */ |
| 45785 | case 1758: /* *xorv8sf3_mask */ |
| 45786 | case 1757: /* *xorv8sf3 */ |
| 45787 | case 1756: /* *iorv8sf3_mask */ |
| 45788 | case 1755: /* *iorv8sf3 */ |
| 45789 | case 1754: /* *andv8sf3_mask */ |
| 45790 | case 1753: /* *andv8sf3 */ |
| 45791 | case 1752: /* avx512f_andnotv8df3_mask */ |
| 45792 | case 1751: /* avx512f_andnotv8df3 */ |
| 45793 | case 1750: /* avx512f_andnotv16sf3_mask */ |
| 45794 | case 1749: /* avx512f_andnotv16sf3 */ |
| 45795 | case 1748: /* sse2_andnotv2df3_mask */ |
| 45796 | case 1747: /* sse2_andnotv2df3 */ |
| 45797 | case 1746: /* avx_andnotv4df3_mask */ |
| 45798 | case 1745: /* avx_andnotv4df3 */ |
| 45799 | case 1744: /* sse_andnotv4sf3_mask */ |
| 45800 | case 1743: /* sse_andnotv4sf3 */ |
| 45801 | case 1742: /* avx_andnotv8sf3_mask */ |
| 45802 | case 1741: /* avx_andnotv8sf3 */ |
| 45803 | case 1732: /* avx512f_maskcmpv2df3 */ |
| 45804 | case 1731: /* avx512f_maskcmpv4df3 */ |
| 45805 | case 1730: /* avx512f_maskcmpv8df3 */ |
| 45806 | case 1729: /* avx512f_maskcmpv4sf3 */ |
| 45807 | case 1728: /* avx512f_maskcmpv8sf3 */ |
| 45808 | case 1727: /* avx512f_maskcmpv16sf3 */ |
| 45809 | case 1726: /* avx512f_vmcmpv2df3_mask_round */ |
| 45810 | case 1725: /* avx512f_vmcmpv2df3_mask */ |
| 45811 | case 1724: /* avx512f_vmcmpv4sf3_mask_round */ |
| 45812 | case 1723: /* avx512f_vmcmpv4sf3_mask */ |
| 45813 | case 1722: /* avx512f_vmcmpv2df3_round */ |
| 45814 | case 1721: /* avx512f_vmcmpv2df3 */ |
| 45815 | case 1720: /* avx512f_vmcmpv4sf3_round */ |
| 45816 | case 1719: /* avx512f_vmcmpv4sf3 */ |
| 45817 | case 1718: /* avx512vl_ucmpv2di3_mask */ |
| 45818 | case 1717: /* avx512vl_ucmpv2di3 */ |
| 45819 | case 1716: /* avx512vl_ucmpv4di3_mask */ |
| 45820 | case 1715: /* avx512vl_ucmpv4di3 */ |
| 45821 | case 1714: /* avx512f_ucmpv8di3_mask */ |
| 45822 | case 1713: /* avx512f_ucmpv8di3 */ |
| 45823 | case 1712: /* avx512vl_ucmpv4si3_mask */ |
| 45824 | case 1711: /* avx512vl_ucmpv4si3 */ |
| 45825 | case 1710: /* avx512vl_ucmpv8si3_mask */ |
| 45826 | case 1709: /* avx512vl_ucmpv8si3 */ |
| 45827 | case 1708: /* avx512f_ucmpv16si3_mask */ |
| 45828 | case 1707: /* avx512f_ucmpv16si3 */ |
| 45829 | case 1706: /* avx512vl_ucmpv8hi3_mask */ |
| 45830 | case 1705: /* avx512vl_ucmpv8hi3 */ |
| 45831 | case 1704: /* avx512vl_ucmpv16hi3_mask */ |
| 45832 | case 1703: /* avx512vl_ucmpv16hi3 */ |
| 45833 | case 1702: /* avx512bw_ucmpv32hi3_mask */ |
| 45834 | case 1701: /* avx512bw_ucmpv32hi3 */ |
| 45835 | case 1700: /* avx512vl_ucmpv32qi3_mask */ |
| 45836 | case 1699: /* avx512vl_ucmpv32qi3 */ |
| 45837 | case 1698: /* avx512vl_ucmpv16qi3_mask */ |
| 45838 | case 1697: /* avx512vl_ucmpv16qi3 */ |
| 45839 | case 1696: /* avx512bw_ucmpv64qi3_mask */ |
| 45840 | case 1695: /* avx512bw_ucmpv64qi3 */ |
| 45841 | case 1694: /* avx512vl_cmpv8hi3_mask */ |
| 45842 | case 1693: /* avx512vl_cmpv8hi3 */ |
| 45843 | case 1692: /* avx512vl_cmpv16hi3_mask */ |
| 45844 | case 1691: /* avx512vl_cmpv16hi3 */ |
| 45845 | case 1690: /* avx512bw_cmpv32hi3_mask */ |
| 45846 | case 1689: /* avx512bw_cmpv32hi3 */ |
| 45847 | case 1688: /* avx512vl_cmpv32qi3_mask */ |
| 45848 | case 1687: /* avx512vl_cmpv32qi3 */ |
| 45849 | case 1686: /* avx512vl_cmpv16qi3_mask */ |
| 45850 | case 1685: /* avx512vl_cmpv16qi3 */ |
| 45851 | case 1684: /* avx512bw_cmpv64qi3_mask */ |
| 45852 | case 1683: /* avx512bw_cmpv64qi3 */ |
| 45853 | case 1682: /* avx512vl_cmpv2df3_mask */ |
| 45854 | case 1681: /* avx512vl_cmpv2df3 */ |
| 45855 | case 1680: /* avx512vl_cmpv4df3_mask */ |
| 45856 | case 1679: /* avx512vl_cmpv4df3 */ |
| 45857 | case 1678: /* avx512f_cmpv8df3_mask_round */ |
| 45858 | case 1677: /* avx512f_cmpv8df3_round */ |
| 45859 | case 1676: /* avx512f_cmpv8df3_mask */ |
| 45860 | case 1675: /* avx512f_cmpv8df3 */ |
| 45861 | case 1674: /* avx512vl_cmpv4sf3_mask */ |
| 45862 | case 1673: /* avx512vl_cmpv4sf3 */ |
| 45863 | case 1672: /* avx512vl_cmpv8sf3_mask */ |
| 45864 | case 1671: /* avx512vl_cmpv8sf3 */ |
| 45865 | case 1670: /* avx512f_cmpv16sf3_mask_round */ |
| 45866 | case 1669: /* avx512f_cmpv16sf3_round */ |
| 45867 | case 1668: /* avx512f_cmpv16sf3_mask */ |
| 45868 | case 1667: /* avx512f_cmpv16sf3 */ |
| 45869 | case 1666: /* avx512vl_cmpv2di3_mask */ |
| 45870 | case 1665: /* avx512vl_cmpv2di3 */ |
| 45871 | case 1664: /* avx512vl_cmpv4di3_mask */ |
| 45872 | case 1663: /* avx512vl_cmpv4di3 */ |
| 45873 | case 1662: /* avx512f_cmpv8di3_mask_round */ |
| 45874 | case 1661: /* avx512f_cmpv8di3_round */ |
| 45875 | case 1660: /* avx512f_cmpv8di3_mask */ |
| 45876 | case 1659: /* avx512f_cmpv8di3 */ |
| 45877 | case 1658: /* avx512vl_cmpv4si3_mask */ |
| 45878 | case 1657: /* avx512vl_cmpv4si3 */ |
| 45879 | case 1656: /* avx512vl_cmpv8si3_mask */ |
| 45880 | case 1655: /* avx512vl_cmpv8si3 */ |
| 45881 | case 1654: /* avx512f_cmpv16si3_mask_round */ |
| 45882 | case 1653: /* avx512f_cmpv16si3_round */ |
| 45883 | case 1652: /* avx512f_cmpv16si3_mask */ |
| 45884 | case 1651: /* avx512f_cmpv16si3 */ |
| 45885 | case 1650: /* sse2_vmmaskcmpv2df3 */ |
| 45886 | case 1649: /* sse_vmmaskcmpv4sf3 */ |
| 45887 | case 1648: /* sse2_maskcmpv2df3 */ |
| 45888 | case 1647: /* avx_maskcmpv4df3 */ |
| 45889 | case 1646: /* sse_maskcmpv4sf3 */ |
| 45890 | case 1645: /* avx_maskcmpv8sf3 */ |
| 45891 | case 1644: /* *sse2_maskcmpv2df3_comm */ |
| 45892 | case 1643: /* *avx_maskcmpv4df3_comm */ |
| 45893 | case 1642: /* *sse_maskcmpv4sf3_comm */ |
| 45894 | case 1641: /* *avx_maskcmpv8sf3_comm */ |
| 45895 | case 1640: /* avx_vmcmpv2df3 */ |
| 45896 | case 1639: /* avx_vmcmpv4sf3 */ |
| 45897 | case 1638: /* avx_cmpv2df3 */ |
| 45898 | case 1637: /* avx_cmpv4df3 */ |
| 45899 | case 1636: /* avx_cmpv4sf3 */ |
| 45900 | case 1635: /* avx_cmpv8sf3 */ |
| 45901 | case 1307: /* sse2_movntv2di */ |
| 45902 | case 626: /* setcc_df_sse */ |
| 45903 | case 625: /* setcc_sf_sse */ |
| 45904 | if (get_attr_memory (insn) == MEMORY_LOAD) |
| 45905 | { |
| 45906 | return 4; |
| 45907 | } |
| 45908 | else |
| 45909 | { |
| 45910 | return 2; |
| 45911 | } |
| 45912 | |
| 45913 | case 624: /* *setcc_qi_slp */ |
| 45914 | case 623: /* *setcc_qi */ |
| 45915 | if (((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) || (cached_memory == MEMORY_STORE)) |
| 45916 | { |
| 45917 | return 1; |
| 45918 | } |
| 45919 | else |
| 45920 | { |
| 45921 | return 0; |
| 45922 | } |
| 45923 | |
| 45924 | case 366: /* *umulsi3_highpart_1 */ |
| 45925 | case 365: /* *smulsi3_highpart_1 */ |
| 45926 | case 364: /* *umulsi3_highpart_zext */ |
| 45927 | case 363: /* *smulsi3_highpart_zext */ |
| 45928 | case 357: /* *mulsidi3_1 */ |
| 45929 | case 349: /* *umulvsi4 */ |
| 45930 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) |
| 45931 | { |
| 45932 | return 3; |
| 45933 | } |
| 45934 | else if ((cached_memory == MEMORY_LOAD) || (cached_memory == MEMORY_BOTH)) |
| 45935 | { |
| 45936 | return 6; |
| 45937 | } |
| 45938 | else |
| 45939 | { |
| 45940 | return 0; |
| 45941 | } |
| 45942 | |
| 45943 | case 202: /* *floatdidf2_mixed */ |
| 45944 | case 201: /* *floatsidf2_mixed */ |
| 45945 | case 200: /* *floatdisf2_mixed */ |
| 45946 | case 199: /* *floatsisf2_mixed */ |
| 45947 | extract_constrain_insn_cached (insn); |
| 45948 | if (which_alternative == 0) |
| 45949 | { |
| 45950 | return 2; |
| 45951 | } |
| 45952 | else if ((which_alternative == 2) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 45953 | { |
| 45954 | return 9; |
| 45955 | } |
| 45956 | else if ((which_alternative == 1) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 45957 | { |
| 45958 | return 14 /* 0xe */; |
| 45959 | } |
| 45960 | else |
| 45961 | { |
| 45962 | return 0; |
| 45963 | } |
| 45964 | |
| 45965 | case 1098: /* *bnd64_ldx */ |
| 45966 | case 1097: /* *bnd32_ldx */ |
| 45967 | case 1050: /* fldenv */ |
| 45968 | case 1048: /* xrstors64 */ |
| 45969 | case 1047: /* xrstor64 */ |
| 45970 | case 1046: /* xrstors_rex64 */ |
| 45971 | case 1045: /* xrstor_rex64 */ |
| 45972 | case 1044: /* xrstors */ |
| 45973 | case 1043: /* xrstor */ |
| 45974 | case 1030: /* fxrstor64 */ |
| 45975 | case 1029: /* fxrstor */ |
| 45976 | case 927: /* fistsi2_ceil_with_temp */ |
| 45977 | case 926: /* fistsi2_floor_with_temp */ |
| 45978 | case 925: /* fisthi2_ceil_with_temp */ |
| 45979 | case 924: /* fisthi2_floor_with_temp */ |
| 45980 | case 923: /* fistsi2_ceil */ |
| 45981 | case 922: /* fistsi2_floor */ |
| 45982 | case 921: /* fisthi2_ceil */ |
| 45983 | case 920: /* fisthi2_floor */ |
| 45984 | case 919: /* fistdi2_ceil_with_temp */ |
| 45985 | case 918: /* fistdi2_floor_with_temp */ |
| 45986 | case 917: /* fistdi2_ceil */ |
| 45987 | case 916: /* fistdi2_floor */ |
| 45988 | case 915: /* *fistdi2_ceil_1 */ |
| 45989 | case 914: /* *fistdi2_floor_1 */ |
| 45990 | case 913: /* *fistsi2_ceil_1 */ |
| 45991 | case 912: /* *fistsi2_floor_1 */ |
| 45992 | case 911: /* *fisthi2_ceil_1 */ |
| 45993 | case 910: /* *fisthi2_floor_1 */ |
| 45994 | case 805: /* *add_tp_di */ |
| 45995 | case 804: /* *add_tp_si */ |
| 45996 | case 803: /* *add_tp_x32_zext */ |
| 45997 | case 802: /* *add_tp_x32 */ |
| 45998 | case 191: /* fix_truncsi_i387_with_temp */ |
| 45999 | case 190: /* fix_trunchi_i387_with_temp */ |
| 46000 | case 189: /* fix_truncsi_i387 */ |
| 46001 | case 188: /* fix_trunchi_i387 */ |
| 46002 | case 187: /* fix_truncdi_i387_with_temp */ |
| 46003 | case 186: /* fix_truncdi_i387 */ |
| 46004 | case 185: /* *fix_truncdi_i387_1 */ |
| 46005 | case 184: /* *fix_truncsi_i387_1 */ |
| 46006 | case 183: /* *fix_trunchi_i387_1 */ |
| 46007 | case 182: /* fix_truncdi_i387_fisttp_with_temp */ |
| 46008 | case 181: /* fix_truncsi_i387_fisttp_with_temp */ |
| 46009 | case 180: /* fix_trunchi_i387_fisttp_with_temp */ |
| 46010 | case 179: /* fix_truncdi_i387_fisttp */ |
| 46011 | case 178: /* fix_truncsi_i387_fisttp */ |
| 46012 | case 177: /* fix_trunchi_i387_fisttp */ |
| 46013 | case 176: /* fix_truncdi_fisttp_i387_1 */ |
| 46014 | case 175: /* fix_truncsi_fisttp_i387_1 */ |
| 46015 | case 174: /* fix_trunchi_fisttp_i387_1 */ |
| 46016 | return 4; |
| 46017 | |
| 46018 | case 173: /* fix_truncdfdi_sse */ |
| 46019 | case 172: /* fix_truncdfsi_sse */ |
| 46020 | case 171: /* fix_truncsfdi_sse */ |
| 46021 | case 170: /* fix_truncsfsi_sse */ |
| 46022 | if (get_attr_memory (insn) == MEMORY_LOAD) |
| 46023 | { |
| 46024 | return 9; |
| 46025 | } |
| 46026 | else |
| 46027 | { |
| 46028 | return 0; |
| 46029 | } |
| 46030 | |
| 46031 | case 163: /* *truncxfdf2_mixed */ |
| 46032 | case 162: /* *truncxfsf2_mixed */ |
| 46033 | case 160: /* *truncdfsf_i387 */ |
| 46034 | case 159: /* *truncdfsf_mixed */ |
| 46035 | case 157: /* *truncdfsf_fast_mixed */ |
| 46036 | extract_constrain_insn_cached (insn); |
| 46037 | if (which_alternative == 0) |
| 46038 | { |
| 46039 | return 2; |
| 46040 | } |
| 46041 | else |
| 46042 | { |
| 46043 | return 0; |
| 46044 | } |
| 46045 | |
| 46046 | case 123: /* *pushsf */ |
| 46047 | case 122: /* *pushsf_rex64 */ |
| 46048 | extract_constrain_insn_cached (insn); |
| 46049 | if (which_alternative == 1) |
| 46050 | { |
| 46051 | return 2; |
| 46052 | } |
| 46053 | else if (!((1 << which_alternative) & 0x3)) |
| 46054 | { |
| 46055 | return 1; |
| 46056 | } |
| 46057 | else |
| 46058 | { |
| 46059 | return 0; |
| 46060 | } |
| 46061 | |
| 46062 | case 121: /* *pushdf */ |
| 46063 | extract_constrain_insn_cached (insn); |
| 46064 | if (((1 << which_alternative) & 0x1e)) |
| 46065 | { |
| 46066 | return 1; |
| 46067 | } |
| 46068 | else |
| 46069 | { |
| 46070 | return 0; |
| 46071 | } |
| 46072 | |
| 46073 | case 120: /* *pushxf */ |
| 46074 | case 119: /* *pushxf_rounded */ |
| 46075 | case 118: /* *pushxf_rounded */ |
| 46076 | case 117: /* *pushtf */ |
| 46077 | extract_constrain_insn_cached (insn); |
| 46078 | if (which_alternative != 0) |
| 46079 | { |
| 46080 | return 1; |
| 46081 | } |
| 46082 | else |
| 46083 | { |
| 46084 | return 0; |
| 46085 | } |
| 46086 | |
| 46087 | case 96: /* *swaphi */ |
| 46088 | case 95: /* *swapqi */ |
| 46089 | case 94: /* *swapdi */ |
| 46090 | case 93: /* *swapsi */ |
| 46091 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) |
| 46092 | { |
| 46093 | return 3; |
| 46094 | } |
| 46095 | else if (cached_memory == MEMORY_STORE) |
| 46096 | { |
| 46097 | return 1; |
| 46098 | } |
| 46099 | else |
| 46100 | { |
| 46101 | return 0; |
| 46102 | } |
| 46103 | |
| 46104 | case 1000: /* probe_stack_di */ |
| 46105 | case 999: /* probe_stack_si */ |
| 46106 | case 732: /* tzcnt_hi */ |
| 46107 | case 730: /* *tzcnt_di_falsedep */ |
| 46108 | case 728: /* *tzcnt_si_falsedep */ |
| 46109 | case 726: /* tzcnt_di */ |
| 46110 | case 724: /* tzcnt_si */ |
| 46111 | case 719: /* *bsrhi */ |
| 46112 | case 718: /* bsr */ |
| 46113 | case 717: /* bsr_rex64 */ |
| 46114 | case 716: /* *ctzdi2_falsedep */ |
| 46115 | case 715: /* *ctzsi2_falsedep */ |
| 46116 | case 714: /* ctzdi2 */ |
| 46117 | case 713: /* ctzsi2 */ |
| 46118 | case 712: /* *bsfdi_1 */ |
| 46119 | case 711: /* *bsfsi_1 */ |
| 46120 | case 710: /* *tzcntdi_1_falsedep */ |
| 46121 | case 709: /* *tzcntsi_1_falsedep */ |
| 46122 | case 708: /* *tzcntdi_1 */ |
| 46123 | case 707: /* *tzcntsi_1 */ |
| 46124 | case 613: /* *btdi */ |
| 46125 | case 612: /* *btsi */ |
| 46126 | case 611: /* *btcq */ |
| 46127 | case 610: /* *btrq */ |
| 46128 | case 609: /* *btsq */ |
| 46129 | case 608: /* *rotrqi3_1_slp */ |
| 46130 | case 607: /* *rotlqi3_1_slp */ |
| 46131 | case 567: /* *ashrqi3_1_slp */ |
| 46132 | case 566: /* *lshrqi3_1_slp */ |
| 46133 | case 512: /* *one_cmplsi2_2_zext */ |
| 46134 | case 511: /* *one_cmpldi2_2 */ |
| 46135 | case 510: /* *one_cmplsi2_2 */ |
| 46136 | case 509: /* *one_cmplhi2_2 */ |
| 46137 | case 508: /* *one_cmplqi2_2 */ |
| 46138 | case 507: /* *one_cmplqi2_1 */ |
| 46139 | case 506: /* *one_cmplsi2_1_zext */ |
| 46140 | case 505: /* *one_cmpldi2_1 */ |
| 46141 | case 504: /* *one_cmplsi2_1 */ |
| 46142 | case 503: /* *one_cmplhi2_1 */ |
| 46143 | case 479: /* *negvdi3 */ |
| 46144 | case 478: /* *negvsi3 */ |
| 46145 | case 477: /* *negvhi3 */ |
| 46146 | case 476: /* *negvqi3 */ |
| 46147 | case 475: /* *negsi2_cmpz_zext */ |
| 46148 | case 474: /* *negdi2_cmpz */ |
| 46149 | case 473: /* *negsi2_cmpz */ |
| 46150 | case 472: /* *neghi2_cmpz */ |
| 46151 | case 471: /* *negqi2_cmpz */ |
| 46152 | case 470: /* *negsi2_1_zext */ |
| 46153 | case 469: /* *negdi2_1 */ |
| 46154 | case 468: /* *negsi2_1 */ |
| 46155 | case 467: /* *neghi2_1 */ |
| 46156 | case 466: /* *negqi2_1 */ |
| 46157 | case 450: /* *xorqi_2_slp */ |
| 46158 | case 449: /* *iorqi_2_slp */ |
| 46159 | case 436: /* *xorqi_1_slp */ |
| 46160 | case 435: /* *iorqi_1_slp */ |
| 46161 | case 410: /* *andqi_2_slp */ |
| 46162 | case 403: /* *andqi_1_slp */ |
| 46163 | case 276: /* *subqi_1_slp */ |
| 46164 | case 138: /* zero_extendqihi2_and */ |
| 46165 | case 135: /* zero_extendhisi2_and */ |
| 46166 | case 134: /* zero_extendqisi2_and */ |
| 46167 | case 100: /* *movstricthi_xor */ |
| 46168 | case 99: /* *movstrictqi_xor */ |
| 46169 | case 77: /* *movdi_or */ |
| 46170 | case 76: /* *movsi_or */ |
| 46171 | case 75: /* *movdi_xor */ |
| 46172 | case 74: /* *movsi_xor */ |
| 46173 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) |
| 46174 | { |
| 46175 | return 1; |
| 46176 | } |
| 46177 | else if (cached_memory == MEMORY_BOTH) |
| 46178 | { |
| 46179 | return 4; |
| 46180 | } |
| 46181 | else if (cached_memory == MEMORY_STORE) |
| 46182 | { |
| 46183 | return 1; |
| 46184 | } |
| 46185 | else |
| 46186 | { |
| 46187 | return 0; |
| 46188 | } |
| 46189 | |
| 46190 | case 801: /* *load_tp_di */ |
| 46191 | case 800: /* *load_tp_si */ |
| 46192 | case 799: /* *load_tp_x32_zext */ |
| 46193 | case 798: /* *load_tp_x32 */ |
| 46194 | case 704: /* leave_rex64 */ |
| 46195 | case 703: /* leave */ |
| 46196 | case 92: /* *movabsdi_2 */ |
| 46197 | case 91: /* *movabssi_2 */ |
| 46198 | case 90: /* *movabshi_2 */ |
| 46199 | case 89: /* *movabsqi_2 */ |
| 46200 | case 73: /* *popfldi1 */ |
| 46201 | case 72: /* *popflsi1 */ |
| 46202 | case 69: /* *popdi1_epilogue */ |
| 46203 | case 68: /* *popsi1_epilogue */ |
| 46204 | case 67: /* *popdi1 */ |
| 46205 | case 66: /* *popsi1 */ |
| 46206 | return 3; |
| 46207 | |
| 46208 | case 4935: /* storedi_via_fpu */ |
| 46209 | case 4934: /* loaddi_via_fpu */ |
| 46210 | case 4869: /* sha256rnds2 */ |
| 46211 | case 4868: /* sha256msg2 */ |
| 46212 | case 4867: /* sha256msg1 */ |
| 46213 | case 4866: /* sha1rnds4 */ |
| 46214 | case 4865: /* sha1nexte */ |
| 46215 | case 4864: /* sha1msg2 */ |
| 46216 | case 4863: /* sha1msg1 */ |
| 46217 | case 4838: /* avx512bw_dbpsadbwv32hi_mask */ |
| 46218 | case 4837: /* *avx512bw_dbpsadbwv32hi */ |
| 46219 | case 4836: /* avx512bw_dbpsadbwv16hi_mask */ |
| 46220 | case 4835: /* *avx512bw_dbpsadbwv16hi */ |
| 46221 | case 4834: /* avx512bw_dbpsadbwv8hi_mask */ |
| 46222 | case 4833: /* *avx512bw_dbpsadbwv8hi */ |
| 46223 | case 4758: /* avx512vl_compressstorev2df_mask */ |
| 46224 | case 4757: /* avx512vl_compressstorev2di_mask */ |
| 46225 | case 4756: /* avx512vl_compressstorev4sf_mask */ |
| 46226 | case 4755: /* avx512vl_compressstorev4si_mask */ |
| 46227 | case 4754: /* avx512vl_compressstorev4df_mask */ |
| 46228 | case 4753: /* avx512vl_compressstorev4di_mask */ |
| 46229 | case 4752: /* avx512vl_compressstorev8sf_mask */ |
| 46230 | case 4751: /* avx512vl_compressstorev8si_mask */ |
| 46231 | case 4750: /* avx512f_compressstorev8df_mask */ |
| 46232 | case 4749: /* avx512f_compressstorev8di_mask */ |
| 46233 | case 4748: /* avx512f_compressstorev16sf_mask */ |
| 46234 | case 4747: /* avx512f_compressstorev16si_mask */ |
| 46235 | case 4432: /* avx2_maskstoreq256 */ |
| 46236 | case 4431: /* avx2_maskstored256 */ |
| 46237 | case 4430: /* avx2_maskstoreq */ |
| 46238 | case 4429: /* avx2_maskstored */ |
| 46239 | case 4428: /* avx_maskstorepd256 */ |
| 46240 | case 4427: /* avx_maskstoreps256 */ |
| 46241 | case 4426: /* avx_maskstorepd */ |
| 46242 | case 4425: /* avx_maskstoreps */ |
| 46243 | case 4424: /* avx2_maskloadq256 */ |
| 46244 | case 4423: /* avx2_maskloadd256 */ |
| 46245 | case 4422: /* avx2_maskloadq */ |
| 46246 | case 4421: /* avx2_maskloadd */ |
| 46247 | case 4420: /* avx_maskloadpd256 */ |
| 46248 | case 4419: /* avx_maskloadps256 */ |
| 46249 | case 4418: /* avx_maskloadpd */ |
| 46250 | case 4417: /* avx_maskloadps */ |
| 46251 | case 4110: /* avx2_vec_dupv4df */ |
| 46252 | case 4054: /* pclmulqdq */ |
| 46253 | case 4053: /* aeskeygenassist */ |
| 46254 | case 4052: /* aesimc */ |
| 46255 | case 4051: /* aesdeclast */ |
| 46256 | case 4050: /* aesdec */ |
| 46257 | case 4049: /* aesenclast */ |
| 46258 | case 4048: /* aesenc */ |
| 46259 | case 3801: /* sse4_1_phminposuw */ |
| 46260 | case 3788: /* sse4_1_mpsadbw */ |
| 46261 | case 3787: /* avx2_mpsadbw */ |
| 46262 | case 3763: /* absv2si2 */ |
| 46263 | case 3762: /* absv4hi2 */ |
| 46264 | case 3761: /* absv8qi2 */ |
| 46265 | case 3760: /* absv8hi2_mask */ |
| 46266 | case 3759: /* absv16hi2_mask */ |
| 46267 | case 3758: /* absv32hi2_mask */ |
| 46268 | case 3757: /* absv32qi2_mask */ |
| 46269 | case 3756: /* absv16qi2_mask */ |
| 46270 | case 3755: /* absv64qi2_mask */ |
| 46271 | case 3754: /* absv2di2_mask */ |
| 46272 | case 3753: /* absv4di2_mask */ |
| 46273 | case 3752: /* absv8di2_mask */ |
| 46274 | case 3751: /* absv4si2_mask */ |
| 46275 | case 3750: /* absv8si2_mask */ |
| 46276 | case 3749: /* absv16si2_mask */ |
| 46277 | case 3748: /* *absv2di2 */ |
| 46278 | case 3747: /* *absv4di2 */ |
| 46279 | case 3746: /* *absv8di2 */ |
| 46280 | case 3745: /* *absv4si2 */ |
| 46281 | case 3744: /* *absv8si2 */ |
| 46282 | case 3743: /* *absv16si2 */ |
| 46283 | case 3742: /* *absv8hi2 */ |
| 46284 | case 3741: /* *absv16hi2 */ |
| 46285 | case 3740: /* *absv32hi2 */ |
| 46286 | case 3739: /* *absv16qi2 */ |
| 46287 | case 3738: /* *absv32qi2 */ |
| 46288 | case 3737: /* *absv64qi2 */ |
| 46289 | case 3729: /* ssse3_psignv2si3 */ |
| 46290 | case 3728: /* ssse3_psignv4hi3 */ |
| 46291 | case 3727: /* ssse3_psignv8qi3 */ |
| 46292 | case 3726: /* ssse3_psignv4si3 */ |
| 46293 | case 3725: /* avx2_psignv8si3 */ |
| 46294 | case 3724: /* ssse3_psignv8hi3 */ |
| 46295 | case 3723: /* avx2_psignv16hi3 */ |
| 46296 | case 3722: /* ssse3_psignv16qi3 */ |
| 46297 | case 3721: /* avx2_psignv32qi3 */ |
| 46298 | case 3720: /* ssse3_pshufbv8qi3 */ |
| 46299 | case 3719: /* ssse3_pshufbv16qi3_mask */ |
| 46300 | case 3718: /* ssse3_pshufbv16qi3 */ |
| 46301 | case 3717: /* avx2_pshufbv32qi3_mask */ |
| 46302 | case 3716: /* avx2_pshufbv32qi3 */ |
| 46303 | case 3715: /* avx512bw_pshufbv64qi3_mask */ |
| 46304 | case 3714: /* avx512bw_pshufbv64qi3 */ |
| 46305 | case 3635: /* *vec_extractv4si_zext */ |
| 46306 | case 3626: /* *vec_extractv8hi_zext */ |
| 46307 | case 3625: /* *vec_extractv8hi_zext */ |
| 46308 | case 3624: /* *vec_extractv16qi_zext */ |
| 46309 | case 3623: /* *vec_extractv16qi_zext */ |
| 46310 | case 3622: /* *vec_extractv8hi */ |
| 46311 | case 3621: /* *vec_extractv16qi */ |
| 46312 | case 3607: /* sse2_pshufd_1_mask */ |
| 46313 | case 3606: /* sse2_pshufd_1 */ |
| 46314 | case 3605: /* avx2_pshufd_1_mask */ |
| 46315 | case 3604: /* avx2_pshufd_1 */ |
| 46316 | case 3603: /* avx512f_pshufd_1_mask */ |
| 46317 | case 3602: /* avx512f_pshufd_1 */ |
| 46318 | case 2933: /* avx512f_us_truncatev8div16qi2_mask_store */ |
| 46319 | case 2932: /* avx512f_truncatev8div16qi2_mask_store */ |
| 46320 | case 2931: /* avx512f_ss_truncatev8div16qi2_mask_store */ |
| 46321 | case 2924: /* *avx512f_us_truncatev8div16qi2_store */ |
| 46322 | case 2923: /* *avx512f_truncatev8div16qi2_store */ |
| 46323 | case 2922: /* *avx512f_ss_truncatev8div16qi2_store */ |
| 46324 | case 2918: /* avx512vl_us_truncatev2div2si2_mask_store */ |
| 46325 | case 2917: /* avx512vl_truncatev2div2si2_mask_store */ |
| 46326 | case 2916: /* avx512vl_ss_truncatev2div2si2_mask_store */ |
| 46327 | case 2909: /* *avx512vl_us_truncatev2div2si2_store */ |
| 46328 | case 2908: /* *avx512vl_truncatev2div2si2_store */ |
| 46329 | case 2907: /* *avx512vl_ss_truncatev2div2si2_store */ |
| 46330 | case 2903: /* avx512vl_us_truncatev2div2hi2_mask_store */ |
| 46331 | case 2902: /* avx512vl_truncatev2div2hi2_mask_store */ |
| 46332 | case 2901: /* avx512vl_ss_truncatev2div2hi2_mask_store */ |
| 46333 | case 2894: /* *avx512vl_us_truncatev2div2hi2_store */ |
| 46334 | case 2893: /* *avx512vl_truncatev2div2hi2_store */ |
| 46335 | case 2892: /* *avx512vl_ss_truncatev2div2hi2_store */ |
| 46336 | case 2891: /* avx512vl_us_truncatev4div4hi2_mask_store */ |
| 46337 | case 2890: /* avx512vl_truncatev4div4hi2_mask_store */ |
| 46338 | case 2889: /* avx512vl_ss_truncatev4div4hi2_mask_store */ |
| 46339 | case 2888: /* avx512vl_us_truncatev4siv4hi2_mask_store */ |
| 46340 | case 2887: /* avx512vl_truncatev4siv4hi2_mask_store */ |
| 46341 | case 2886: /* avx512vl_ss_truncatev4siv4hi2_mask_store */ |
| 46342 | case 2873: /* *avx512vl_us_truncatev4div4hi2_store */ |
| 46343 | case 2872: /* *avx512vl_truncatev4div4hi2_store */ |
| 46344 | case 2871: /* *avx512vl_ss_truncatev4div4hi2_store */ |
| 46345 | case 2870: /* *avx512vl_us_truncatev4siv4hi2_store */ |
| 46346 | case 2869: /* *avx512vl_truncatev4siv4hi2_store */ |
| 46347 | case 2868: /* *avx512vl_ss_truncatev4siv4hi2_store */ |
| 46348 | case 2858: /* avx512vl_us_truncatev8siv8qi2_mask_store */ |
| 46349 | case 2857: /* avx512vl_truncatev8siv8qi2_mask_store */ |
| 46350 | case 2856: /* avx512vl_ss_truncatev8siv8qi2_mask_store */ |
| 46351 | case 2855: /* avx512vl_us_truncatev8hiv8qi2_mask_store */ |
| 46352 | case 2854: /* avx512vl_truncatev8hiv8qi2_mask_store */ |
| 46353 | case 2853: /* avx512vl_ss_truncatev8hiv8qi2_mask_store */ |
| 46354 | case 2840: /* *avx512vl_us_truncatev8siv8qi2_store */ |
| 46355 | case 2839: /* *avx512vl_truncatev8siv8qi2_store */ |
| 46356 | case 2838: /* *avx512vl_ss_truncatev8siv8qi2_store */ |
| 46357 | case 2837: /* *avx512vl_us_truncatev8hiv8qi2_store */ |
| 46358 | case 2836: /* *avx512vl_truncatev8hiv8qi2_store */ |
| 46359 | case 2835: /* *avx512vl_ss_truncatev8hiv8qi2_store */ |
| 46360 | case 2834: /* avx512vl_us_truncatev4div4qi2_mask_store */ |
| 46361 | case 2833: /* avx512vl_truncatev4div4qi2_mask_store */ |
| 46362 | case 2832: /* avx512vl_ss_truncatev4div4qi2_mask_store */ |
| 46363 | case 2831: /* avx512vl_us_truncatev4siv4qi2_mask_store */ |
| 46364 | case 2830: /* avx512vl_truncatev4siv4qi2_mask_store */ |
| 46365 | case 2829: /* avx512vl_ss_truncatev4siv4qi2_mask_store */ |
| 46366 | case 2816: /* *avx512vl_us_truncatev4div4qi2_store */ |
| 46367 | case 2815: /* *avx512vl_truncatev4div4qi2_store */ |
| 46368 | case 2814: /* *avx512vl_ss_truncatev4div4qi2_store */ |
| 46369 | case 2813: /* *avx512vl_us_truncatev4siv4qi2_store */ |
| 46370 | case 2812: /* *avx512vl_truncatev4siv4qi2_store */ |
| 46371 | case 2811: /* *avx512vl_ss_truncatev4siv4qi2_store */ |
| 46372 | case 2810: /* avx512vl_us_truncatev2div2qi2_mask_store */ |
| 46373 | case 2809: /* avx512vl_truncatev2div2qi2_mask_store */ |
| 46374 | case 2808: /* avx512vl_ss_truncatev2div2qi2_mask_store */ |
| 46375 | case 2801: /* *avx512vl_us_truncatev2div2qi2_store */ |
| 46376 | case 2800: /* *avx512vl_truncatev2div2qi2_store */ |
| 46377 | case 2799: /* *avx512vl_ss_truncatev2div2qi2_store */ |
| 46378 | case 2734: /* vec_dupv2df_mask */ |
| 46379 | case 2733: /* vec_dupv2df */ |
| 46380 | case 2530: /* vec_extract_hi_v32qi */ |
| 46381 | case 2528: /* vec_extract_hi_v64qi */ |
| 46382 | case 2526: /* vec_extract_hi_v16hi */ |
| 46383 | case 2524: /* vec_extract_hi_v32hi */ |
| 46384 | case 2522: /* vec_extract_hi_v8sf */ |
| 46385 | case 2521: /* vec_extract_hi_v8si */ |
| 46386 | case 2520: /* vec_extract_hi_v8sf_mask */ |
| 46387 | case 2519: /* vec_extract_hi_v8si_mask */ |
| 46388 | case 2518: /* vec_extract_hi_v8sf_maskm */ |
| 46389 | case 2517: /* vec_extract_hi_v8si_maskm */ |
| 46390 | case 2516: /* vec_extract_lo_v8sf_maskm */ |
| 46391 | case 2515: /* vec_extract_lo_v8si_maskm */ |
| 46392 | case 2514: /* vec_extract_lo_v8sf_mask */ |
| 46393 | case 2513: /* vec_extract_lo_v8sf */ |
| 46394 | case 2512: /* vec_extract_lo_v8si_mask */ |
| 46395 | case 2511: /* vec_extract_lo_v8si */ |
| 46396 | case 2510: /* vec_extract_hi_v4df_mask */ |
| 46397 | case 2509: /* vec_extract_hi_v4df */ |
| 46398 | case 2508: /* vec_extract_hi_v4di_mask */ |
| 46399 | case 2507: /* vec_extract_hi_v4di */ |
| 46400 | case 2506: /* vec_extract_lo_v4df_mask */ |
| 46401 | case 2505: /* vec_extract_lo_v4df */ |
| 46402 | case 2504: /* vec_extract_lo_v4di_mask */ |
| 46403 | case 2503: /* vec_extract_lo_v4di */ |
| 46404 | case 2498: /* vec_extract_hi_v16si_mask */ |
| 46405 | case 2497: /* vec_extract_hi_v16si */ |
| 46406 | case 2496: /* vec_extract_hi_v16sf_mask */ |
| 46407 | case 2495: /* vec_extract_hi_v16sf */ |
| 46408 | case 2494: /* vec_extract_hi_v16si_maskm */ |
| 46409 | case 2493: /* vec_extract_hi_v16sf_maskm */ |
| 46410 | case 2492: /* vec_extract_hi_v8di_mask */ |
| 46411 | case 2491: /* vec_extract_hi_v8di */ |
| 46412 | case 2490: /* vec_extract_hi_v8df_mask */ |
| 46413 | case 2489: /* vec_extract_hi_v8df */ |
| 46414 | case 2488: /* vec_extract_hi_v8di_maskm */ |
| 46415 | case 2487: /* vec_extract_hi_v8df_maskm */ |
| 46416 | case 2486: /* vec_extract_lo_v8di_mask */ |
| 46417 | case 2485: /* vec_extract_lo_v8di */ |
| 46418 | case 2484: /* vec_extract_lo_v8df_mask */ |
| 46419 | case 2483: /* vec_extract_lo_v8df */ |
| 46420 | case 2482: /* vec_extract_lo_v8di_maskm */ |
| 46421 | case 2481: /* vec_extract_lo_v8df_maskm */ |
| 46422 | case 2480: /* avx512f_vextracti32x4_1_mask */ |
| 46423 | case 2479: /* *avx512f_vextracti32x4_1 */ |
| 46424 | case 2478: /* avx512f_vextractf32x4_1_mask */ |
| 46425 | case 2477: /* *avx512f_vextractf32x4_1 */ |
| 46426 | case 2476: /* avx512dq_vextracti64x2_1_mask */ |
| 46427 | case 2475: /* *avx512dq_vextracti64x2_1 */ |
| 46428 | case 2474: /* avx512dq_vextractf64x2_1_mask */ |
| 46429 | case 2473: /* *avx512dq_vextractf64x2_1 */ |
| 46430 | case 2472: /* avx512f_vextracti32x4_1_maskm */ |
| 46431 | case 2471: /* avx512f_vextractf32x4_1_maskm */ |
| 46432 | case 2470: /* avx512dq_vextracti64x2_1_maskm */ |
| 46433 | case 2469: /* avx512dq_vextractf64x2_1_maskm */ |
| 46434 | case 2458: /* avx512f_vec_dupv8df_1 */ |
| 46435 | case 2457: /* avx512f_vec_dupv16sf_1 */ |
| 46436 | case 2456: /* avx2_vec_dupv8sf_1 */ |
| 46437 | case 2455: /* avx2_vec_dupv4sf */ |
| 46438 | case 2454: /* avx2_vec_dupv8sf */ |
| 46439 | case 1292: /* avx512vl_storev8hi_mask */ |
| 46440 | case 1291: /* avx512vl_storev16hi_mask */ |
| 46441 | case 1290: /* avx512bw_storev32hi_mask */ |
| 46442 | case 1289: /* avx512vl_storev32qi_mask */ |
| 46443 | case 1288: /* avx512vl_storev16qi_mask */ |
| 46444 | case 1287: /* avx512bw_storev64qi_mask */ |
| 46445 | case 1286: /* avx512vl_storev2df_mask */ |
| 46446 | case 1285: /* avx512vl_storev4df_mask */ |
| 46447 | case 1284: /* avx512f_storev8df_mask */ |
| 46448 | case 1283: /* avx512vl_storev4sf_mask */ |
| 46449 | case 1282: /* avx512vl_storev8sf_mask */ |
| 46450 | case 1281: /* avx512f_storev16sf_mask */ |
| 46451 | case 1280: /* avx512vl_storev2di_mask */ |
| 46452 | case 1279: /* avx512vl_storev4di_mask */ |
| 46453 | case 1278: /* avx512f_storev8di_mask */ |
| 46454 | case 1277: /* avx512vl_storev4si_mask */ |
| 46455 | case 1276: /* avx512vl_storev8si_mask */ |
| 46456 | case 1275: /* avx512f_storev16si_mask */ |
| 46457 | case 1020: /* sse4_2_crc32di */ |
| 46458 | case 1019: /* sse4_2_crc32si */ |
| 46459 | case 1018: /* sse4_2_crc32hi */ |
| 46460 | case 1017: /* sse4_2_crc32qi */ |
| 46461 | case 841: /* truncxfdf2_i387_noop_unspec */ |
| 46462 | case 840: /* truncxfsf2_i387_noop_unspec */ |
| 46463 | case 495: /* *negextenddfxf2 */ |
| 46464 | case 494: /* *absextenddfxf2 */ |
| 46465 | case 493: /* *negextendsfxf2 */ |
| 46466 | case 492: /* *absextendsfxf2 */ |
| 46467 | case 491: /* *negextendsfdf2 */ |
| 46468 | case 490: /* *absextendsfdf2 */ |
| 46469 | case 489: /* *negxf2_1 */ |
| 46470 | case 488: /* *absxf2_1 */ |
| 46471 | case 487: /* *negdf2_1 */ |
| 46472 | case 486: /* *absdf2_1 */ |
| 46473 | case 485: /* *negsf2_1 */ |
| 46474 | case 484: /* *abssf2_1 */ |
| 46475 | case 206: /* *floatdidf2_i387 */ |
| 46476 | case 205: /* *floatdisf2_i387 */ |
| 46477 | case 204: /* *floatsidf2_i387 */ |
| 46478 | case 203: /* *floatsisf2_i387 */ |
| 46479 | case 195: /* floathidf2 */ |
| 46480 | case 194: /* floathisf2 */ |
| 46481 | case 167: /* *truncxfdf2_i387 */ |
| 46482 | case 166: /* *truncxfsf2_i387 */ |
| 46483 | case 165: /* truncxfdf2_i387_noop */ |
| 46484 | case 164: /* truncxfsf2_i387_noop */ |
| 46485 | case 161: /* *truncdfsf2_i387_1 */ |
| 46486 | case 158: /* *truncdfsf_fast_i387 */ |
| 46487 | case 71: /* *pushfldi2 */ |
| 46488 | case 70: /* *pushflsi2 */ |
| 46489 | case 65: /* *pushdi2_prologue */ |
| 46490 | case 64: /* *pushsi2_prologue */ |
| 46491 | case 63: /* *pushhi2 */ |
| 46492 | case 62: /* *pushqi2 */ |
| 46493 | case 61: /* *pushsi2_rex64 */ |
| 46494 | case 60: /* *pushhi2_rex64 */ |
| 46495 | case 59: /* *pushqi2_rex64 */ |
| 46496 | case 58: /* *pushsi2 */ |
| 46497 | return 2; |
| 46498 | |
| 46499 | case 57: /* *pushdi2_rex64 */ |
| 46500 | extract_constrain_insn_cached (insn); |
| 46501 | if (which_alternative == 0) |
| 46502 | { |
| 46503 | return 2; |
| 46504 | } |
| 46505 | else |
| 46506 | { |
| 46507 | return 1; |
| 46508 | } |
| 46509 | |
| 46510 | case 3890: /* ptesttf2 */ |
| 46511 | case 3889: /* avx_ptestv4df */ |
| 46512 | case 3888: /* avx_ptestv8sf */ |
| 46513 | case 3887: /* avx_ptestv4di */ |
| 46514 | case 3886: /* avx_ptestv8si */ |
| 46515 | case 3885: /* avx_ptestv16hi */ |
| 46516 | case 3884: /* avx_ptestv32qi */ |
| 46517 | case 3883: /* sse4_1_ptestv2df */ |
| 46518 | case 3882: /* sse4_1_ptestv4sf */ |
| 46519 | case 3881: /* sse4_1_ptestv2di */ |
| 46520 | case 3880: /* sse4_1_ptestv4si */ |
| 46521 | case 3879: /* sse4_1_ptestv8hi */ |
| 46522 | case 3878: /* sse4_1_ptestv16qi */ |
| 46523 | case 3877: /* avx_vtestpd */ |
| 46524 | case 3876: /* avx_vtestpd256 */ |
| 46525 | case 3875: /* avx_vtestps */ |
| 46526 | case 3874: /* avx_vtestps256 */ |
| 46527 | case 1740: /* sse2_ucomi_round */ |
| 46528 | case 1739: /* sse2_ucomi */ |
| 46529 | case 1738: /* sse_ucomi_round */ |
| 46530 | case 1737: /* sse_ucomi */ |
| 46531 | case 1736: /* sse2_comi_round */ |
| 46532 | case 1735: /* sse2_comi */ |
| 46533 | case 1734: /* sse_comi_round */ |
| 46534 | case 1733: /* sse_comi */ |
| 46535 | case 54: /* *cmpiuxf_i387 */ |
| 46536 | case 53: /* *cmpixf_i387 */ |
| 46537 | if (get_attr_memory (insn) == MEMORY_LOAD) |
| 46538 | { |
| 46539 | return 5; |
| 46540 | } |
| 46541 | else |
| 46542 | { |
| 46543 | return 3; |
| 46544 | } |
| 46545 | |
| 46546 | case 4984: /* atomic_bit_test_and_resetdi_1 */ |
| 46547 | case 4983: /* atomic_bit_test_and_resetsi_1 */ |
| 46548 | case 4982: /* atomic_bit_test_and_resethi_1 */ |
| 46549 | case 4981: /* atomic_bit_test_and_complementdi_1 */ |
| 46550 | case 4980: /* atomic_bit_test_and_complementsi_1 */ |
| 46551 | case 4979: /* atomic_bit_test_and_complementhi_1 */ |
| 46552 | case 4978: /* atomic_bit_test_and_setdi_1 */ |
| 46553 | case 4977: /* atomic_bit_test_and_setsi_1 */ |
| 46554 | case 4976: /* atomic_bit_test_and_sethi_1 */ |
| 46555 | case 4975: /* atomic_xordi */ |
| 46556 | case 4974: /* atomic_ordi */ |
| 46557 | case 4973: /* atomic_anddi */ |
| 46558 | case 4972: /* atomic_xorsi */ |
| 46559 | case 4971: /* atomic_orsi */ |
| 46560 | case 4970: /* atomic_andsi */ |
| 46561 | case 4969: /* atomic_xorhi */ |
| 46562 | case 4968: /* atomic_orhi */ |
| 46563 | case 4967: /* atomic_andhi */ |
| 46564 | case 4966: /* atomic_xorqi */ |
| 46565 | case 4965: /* atomic_orqi */ |
| 46566 | case 4964: /* atomic_andqi */ |
| 46567 | case 4963: /* atomic_subdi */ |
| 46568 | case 4962: /* atomic_subsi */ |
| 46569 | case 4961: /* atomic_subhi */ |
| 46570 | case 4960: /* atomic_subqi */ |
| 46571 | case 4959: /* atomic_adddi */ |
| 46572 | case 4958: /* atomic_addsi */ |
| 46573 | case 4957: /* atomic_addhi */ |
| 46574 | case 4956: /* atomic_addqi */ |
| 46575 | case 4955: /* atomic_exchangedi */ |
| 46576 | case 4954: /* atomic_exchangesi */ |
| 46577 | case 4953: /* atomic_exchangehi */ |
| 46578 | case 4952: /* atomic_exchangeqi */ |
| 46579 | case 4951: /* *atomic_fetch_add_cmpdi */ |
| 46580 | case 4950: /* *atomic_fetch_add_cmpsi */ |
| 46581 | case 4949: /* *atomic_fetch_add_cmphi */ |
| 46582 | case 4948: /* *atomic_fetch_add_cmpqi */ |
| 46583 | case 4947: /* atomic_fetch_adddi */ |
| 46584 | case 4946: /* atomic_fetch_addsi */ |
| 46585 | case 4945: /* atomic_fetch_addhi */ |
| 46586 | case 4944: /* atomic_fetch_addqi */ |
| 46587 | case 4943: /* atomic_compare_and_swapdi_1 */ |
| 46588 | case 4942: /* atomic_compare_and_swapsi_1 */ |
| 46589 | case 4941: /* atomic_compare_and_swaphi_1 */ |
| 46590 | case 4940: /* atomic_compare_and_swapqi_1 */ |
| 46591 | case 4939: /* atomic_compare_and_swapti_doubleword */ |
| 46592 | case 4938: /* atomic_compare_and_swapdi_doubleword */ |
| 46593 | case 4933: /* atomic_storedi_fpu */ |
| 46594 | case 4932: /* atomic_storedi_1 */ |
| 46595 | case 4931: /* atomic_storesi_1 */ |
| 46596 | case 4930: /* atomic_storehi_1 */ |
| 46597 | case 4929: /* atomic_storeqi_1 */ |
| 46598 | case 4928: /* atomic_loaddi_fpu */ |
| 46599 | case 4927: /* mfence_nosse */ |
| 46600 | case 4923: /* vpopcountv8di_mask */ |
| 46601 | case 4922: /* vpopcountv8di */ |
| 46602 | case 4921: /* vpopcountv16si_mask */ |
| 46603 | case 4920: /* vpopcountv16si */ |
| 46604 | case 4901: /* *movv64si_internal */ |
| 46605 | case 4900: /* *movv64sf_internal */ |
| 46606 | case 4875: /* avx512f_pd512_256pd */ |
| 46607 | case 4874: /* avx512f_ps512_256ps */ |
| 46608 | case 4873: /* avx512f_si512_256si */ |
| 46609 | case 4872: /* avx512f_pd512_pd */ |
| 46610 | case 4871: /* avx512f_ps512_ps */ |
| 46611 | case 4870: /* avx512f_si512_si */ |
| 46612 | case 4832: /* avx512f_vgetmantv2df_round */ |
| 46613 | case 4831: /* avx512f_vgetmantv2df */ |
| 46614 | case 4830: /* avx512f_vgetmantv4sf_round */ |
| 46615 | case 4829: /* avx512f_vgetmantv4sf */ |
| 46616 | case 4828: /* avx512vl_getmantv2df_mask_round */ |
| 46617 | case 4827: /* avx512vl_getmantv2df_mask */ |
| 46618 | case 4826: /* avx512vl_getmantv2df_round */ |
| 46619 | case 4825: /* avx512vl_getmantv2df */ |
| 46620 | case 4824: /* avx512vl_getmantv4df_mask_round */ |
| 46621 | case 4823: /* avx512vl_getmantv4df_mask */ |
| 46622 | case 4822: /* avx512vl_getmantv4df_round */ |
| 46623 | case 4821: /* avx512vl_getmantv4df */ |
| 46624 | case 4820: /* avx512f_getmantv8df_mask_round */ |
| 46625 | case 4819: /* avx512f_getmantv8df_mask */ |
| 46626 | case 4818: /* avx512f_getmantv8df_round */ |
| 46627 | case 4817: /* avx512f_getmantv8df */ |
| 46628 | case 4816: /* avx512vl_getmantv4sf_mask_round */ |
| 46629 | case 4815: /* avx512vl_getmantv4sf_mask */ |
| 46630 | case 4814: /* avx512vl_getmantv4sf_round */ |
| 46631 | case 4813: /* avx512vl_getmantv4sf */ |
| 46632 | case 4812: /* avx512vl_getmantv8sf_mask_round */ |
| 46633 | case 4811: /* avx512vl_getmantv8sf_mask */ |
| 46634 | case 4810: /* avx512vl_getmantv8sf_round */ |
| 46635 | case 4809: /* avx512vl_getmantv8sf */ |
| 46636 | case 4808: /* avx512f_getmantv16sf_mask_round */ |
| 46637 | case 4807: /* avx512f_getmantv16sf_mask */ |
| 46638 | case 4806: /* avx512f_getmantv16sf_round */ |
| 46639 | case 4805: /* avx512f_getmantv16sf */ |
| 46640 | case 4435: /* avx_pd256_pd */ |
| 46641 | case 4434: /* avx_ps256_ps */ |
| 46642 | case 4433: /* avx_si256_si */ |
| 46643 | case 4252: /* *avx_vperm_broadcast_v4df */ |
| 46644 | case 4251: /* *avx_vperm_broadcast_v8sf */ |
| 46645 | case 3677: /* sse3_monitor_di */ |
| 46646 | case 3676: /* sse3_monitor_si */ |
| 46647 | case 3675: /* sse3_mwait */ |
| 46648 | case 3637: /* *vec_extractv4si_zext_mem */ |
| 46649 | case 3636: /* *vec_extractv4si_mem */ |
| 46650 | case 3633: /* *vec_extractv4si_0_zext */ |
| 46651 | case 3632: /* *vec_extractv4si_0_zext_sse4 */ |
| 46652 | case 3631: /* *vec_extractv2di_0_sse */ |
| 46653 | case 3630: /* *vec_extractv2di_0 */ |
| 46654 | case 3629: /* *vec_extractv4si_0 */ |
| 46655 | case 3628: /* *vec_extractv8hi_mem */ |
| 46656 | case 3627: /* *vec_extractv16qi_mem */ |
| 46657 | case 3503: /* avx512vl_testnmv2di3_mask */ |
| 46658 | case 3502: /* avx512vl_testnmv2di3 */ |
| 46659 | case 3501: /* avx512vl_testnmv4di3_mask */ |
| 46660 | case 3500: /* avx512vl_testnmv4di3 */ |
| 46661 | case 3499: /* avx512f_testnmv8di3_mask */ |
| 46662 | case 3498: /* avx512f_testnmv8di3 */ |
| 46663 | case 3497: /* avx512vl_testnmv4si3_mask */ |
| 46664 | case 3496: /* avx512vl_testnmv4si3 */ |
| 46665 | case 3495: /* avx512vl_testnmv8si3_mask */ |
| 46666 | case 3494: /* avx512vl_testnmv8si3 */ |
| 46667 | case 3493: /* avx512f_testnmv16si3_mask */ |
| 46668 | case 3492: /* avx512f_testnmv16si3 */ |
| 46669 | case 3491: /* avx512vl_testnmv8hi3_mask */ |
| 46670 | case 3490: /* avx512vl_testnmv8hi3 */ |
| 46671 | case 3489: /* avx512vl_testnmv16hi3_mask */ |
| 46672 | case 3488: /* avx512vl_testnmv16hi3 */ |
| 46673 | case 3487: /* avx512bw_testnmv32hi3_mask */ |
| 46674 | case 3486: /* avx512bw_testnmv32hi3 */ |
| 46675 | case 3485: /* avx512vl_testnmv32qi3_mask */ |
| 46676 | case 3484: /* avx512vl_testnmv32qi3 */ |
| 46677 | case 3483: /* avx512vl_testnmv16qi3_mask */ |
| 46678 | case 3482: /* avx512vl_testnmv16qi3 */ |
| 46679 | case 3481: /* avx512bw_testnmv64qi3_mask */ |
| 46680 | case 3480: /* avx512bw_testnmv64qi3 */ |
| 46681 | case 3479: /* avx512vl_testmv2di3_mask */ |
| 46682 | case 3478: /* avx512vl_testmv2di3 */ |
| 46683 | case 3477: /* avx512vl_testmv4di3_mask */ |
| 46684 | case 3476: /* avx512vl_testmv4di3 */ |
| 46685 | case 3475: /* avx512f_testmv8di3_mask */ |
| 46686 | case 3474: /* avx512f_testmv8di3 */ |
| 46687 | case 3473: /* avx512vl_testmv4si3_mask */ |
| 46688 | case 3472: /* avx512vl_testmv4si3 */ |
| 46689 | case 3471: /* avx512vl_testmv8si3_mask */ |
| 46690 | case 3470: /* avx512vl_testmv8si3 */ |
| 46691 | case 3469: /* avx512f_testmv16si3_mask */ |
| 46692 | case 3468: /* avx512f_testmv16si3 */ |
| 46693 | case 3467: /* avx512vl_testmv8hi3_mask */ |
| 46694 | case 3466: /* avx512vl_testmv8hi3 */ |
| 46695 | case 3465: /* avx512vl_testmv16hi3_mask */ |
| 46696 | case 3464: /* avx512vl_testmv16hi3 */ |
| 46697 | case 3463: /* avx512bw_testmv32hi3_mask */ |
| 46698 | case 3462: /* avx512bw_testmv32hi3 */ |
| 46699 | case 3461: /* avx512vl_testmv32qi3_mask */ |
| 46700 | case 3460: /* avx512vl_testmv32qi3 */ |
| 46701 | case 3459: /* avx512vl_testmv16qi3_mask */ |
| 46702 | case 3458: /* avx512vl_testmv16qi3 */ |
| 46703 | case 3457: /* avx512bw_testmv64qi3_mask */ |
| 46704 | case 3456: /* avx512bw_testmv64qi3 */ |
| 46705 | case 3191: /* avx512vl_rorv2di_mask */ |
| 46706 | case 3190: /* avx512vl_rorv2di */ |
| 46707 | case 3189: /* avx512vl_rolv2di_mask */ |
| 46708 | case 3188: /* avx512vl_rolv2di */ |
| 46709 | case 3187: /* avx512vl_rorv4di_mask */ |
| 46710 | case 3186: /* avx512vl_rorv4di */ |
| 46711 | case 3185: /* avx512vl_rolv4di_mask */ |
| 46712 | case 3184: /* avx512vl_rolv4di */ |
| 46713 | case 3183: /* avx512f_rorv8di_mask */ |
| 46714 | case 3182: /* avx512f_rorv8di */ |
| 46715 | case 3181: /* avx512f_rolv8di_mask */ |
| 46716 | case 3180: /* avx512f_rolv8di */ |
| 46717 | case 3179: /* avx512vl_rorv4si_mask */ |
| 46718 | case 3178: /* avx512vl_rorv4si */ |
| 46719 | case 3177: /* avx512vl_rolv4si_mask */ |
| 46720 | case 3176: /* avx512vl_rolv4si */ |
| 46721 | case 3175: /* avx512vl_rorv8si_mask */ |
| 46722 | case 3174: /* avx512vl_rorv8si */ |
| 46723 | case 3173: /* avx512vl_rolv8si_mask */ |
| 46724 | case 3172: /* avx512vl_rolv8si */ |
| 46725 | case 3171: /* avx512f_rorv16si_mask */ |
| 46726 | case 3170: /* avx512f_rorv16si */ |
| 46727 | case 3169: /* avx512f_rolv16si_mask */ |
| 46728 | case 3168: /* avx512f_rolv16si */ |
| 46729 | case 3167: /* avx512vl_rorvv2di_mask */ |
| 46730 | case 3166: /* avx512vl_rorvv2di */ |
| 46731 | case 3165: /* avx512vl_rolvv2di_mask */ |
| 46732 | case 3164: /* avx512vl_rolvv2di */ |
| 46733 | case 3163: /* avx512vl_rorvv4di_mask */ |
| 46734 | case 3162: /* avx512vl_rorvv4di */ |
| 46735 | case 3161: /* avx512vl_rolvv4di_mask */ |
| 46736 | case 3160: /* avx512vl_rolvv4di */ |
| 46737 | case 3159: /* avx512f_rorvv8di_mask */ |
| 46738 | case 3158: /* avx512f_rorvv8di */ |
| 46739 | case 3157: /* avx512f_rolvv8di_mask */ |
| 46740 | case 3156: /* avx512f_rolvv8di */ |
| 46741 | case 3155: /* avx512vl_rorvv4si_mask */ |
| 46742 | case 3154: /* avx512vl_rorvv4si */ |
| 46743 | case 3153: /* avx512vl_rolvv4si_mask */ |
| 46744 | case 3152: /* avx512vl_rolvv4si */ |
| 46745 | case 3151: /* avx512vl_rorvv8si_mask */ |
| 46746 | case 3150: /* avx512vl_rorvv8si */ |
| 46747 | case 3149: /* avx512vl_rolvv8si_mask */ |
| 46748 | case 3148: /* avx512vl_rolvv8si */ |
| 46749 | case 3147: /* avx512f_rorvv16si_mask */ |
| 46750 | case 3146: /* avx512f_rorvv16si */ |
| 46751 | case 3145: /* avx512f_rolvv16si_mask */ |
| 46752 | case 3144: /* avx512f_rolvv16si */ |
| 46753 | case 2704: /* avx512f_rndscalev2df_round */ |
| 46754 | case 2703: /* avx512f_rndscalev2df */ |
| 46755 | case 2702: /* avx512f_rndscalev4sf_round */ |
| 46756 | case 2701: /* avx512f_rndscalev4sf */ |
| 46757 | case 2700: /* avx512vl_rndscalev2df_mask_round */ |
| 46758 | case 2699: /* avx512vl_rndscalev2df_mask */ |
| 46759 | case 2698: /* avx512vl_rndscalev2df_round */ |
| 46760 | case 2697: /* avx512vl_rndscalev2df */ |
| 46761 | case 2696: /* avx512vl_rndscalev4df_mask_round */ |
| 46762 | case 2695: /* avx512vl_rndscalev4df_mask */ |
| 46763 | case 2694: /* avx512vl_rndscalev4df_round */ |
| 46764 | case 2693: /* avx512vl_rndscalev4df */ |
| 46765 | case 2692: /* avx512f_rndscalev8df_mask_round */ |
| 46766 | case 2691: /* avx512f_rndscalev8df_mask */ |
| 46767 | case 2690: /* avx512f_rndscalev8df_round */ |
| 46768 | case 2689: /* avx512f_rndscalev8df */ |
| 46769 | case 2688: /* avx512vl_rndscalev4sf_mask_round */ |
| 46770 | case 2687: /* avx512vl_rndscalev4sf_mask */ |
| 46771 | case 2686: /* avx512vl_rndscalev4sf_round */ |
| 46772 | case 2685: /* avx512vl_rndscalev4sf */ |
| 46773 | case 2684: /* avx512vl_rndscalev8sf_mask_round */ |
| 46774 | case 2683: /* avx512vl_rndscalev8sf_mask */ |
| 46775 | case 2682: /* avx512vl_rndscalev8sf_round */ |
| 46776 | case 2681: /* avx512vl_rndscalev8sf */ |
| 46777 | case 2680: /* avx512f_rndscalev16sf_mask_round */ |
| 46778 | case 2679: /* avx512f_rndscalev16sf_mask */ |
| 46779 | case 2678: /* avx512f_rndscalev16sf_round */ |
| 46780 | case 2677: /* avx512f_rndscalev16sf */ |
| 46781 | case 2676: /* avx512f_sfixupimmv2df_mask_round */ |
| 46782 | case 2675: /* avx512f_sfixupimmv2df_mask */ |
| 46783 | case 2674: /* avx512f_sfixupimmv4sf_mask_round */ |
| 46784 | case 2673: /* avx512f_sfixupimmv4sf_mask */ |
| 46785 | case 2672: /* avx512f_sfixupimmv2df_maskz_1_round */ |
| 46786 | case 2671: /* avx512f_sfixupimmv2df_maskz_1 */ |
| 46787 | case 2670: /* avx512f_sfixupimmv2df_round */ |
| 46788 | case 2669: /* avx512f_sfixupimmv2df */ |
| 46789 | case 2668: /* avx512f_sfixupimmv4sf_maskz_1_round */ |
| 46790 | case 2667: /* avx512f_sfixupimmv4sf_maskz_1 */ |
| 46791 | case 2666: /* avx512f_sfixupimmv4sf_round */ |
| 46792 | case 2665: /* avx512f_sfixupimmv4sf */ |
| 46793 | case 2664: /* avx512vl_fixupimmv2df_mask_round */ |
| 46794 | case 2663: /* avx512vl_fixupimmv2df_mask */ |
| 46795 | case 2662: /* avx512vl_fixupimmv4df_mask_round */ |
| 46796 | case 2661: /* avx512vl_fixupimmv4df_mask */ |
| 46797 | case 2660: /* avx512f_fixupimmv8df_mask_round */ |
| 46798 | case 2659: /* avx512f_fixupimmv8df_mask */ |
| 46799 | case 2658: /* avx512vl_fixupimmv4sf_mask_round */ |
| 46800 | case 2657: /* avx512vl_fixupimmv4sf_mask */ |
| 46801 | case 2656: /* avx512vl_fixupimmv8sf_mask_round */ |
| 46802 | case 2655: /* avx512vl_fixupimmv8sf_mask */ |
| 46803 | case 2654: /* avx512f_fixupimmv16sf_mask_round */ |
| 46804 | case 2653: /* avx512f_fixupimmv16sf_mask */ |
| 46805 | case 2652: /* avx512vl_fixupimmv2df_maskz_1_round */ |
| 46806 | case 2651: /* avx512vl_fixupimmv2df_maskz_1 */ |
| 46807 | case 2650: /* avx512vl_fixupimmv2df_round */ |
| 46808 | case 2649: /* avx512vl_fixupimmv2df */ |
| 46809 | case 2648: /* avx512vl_fixupimmv4df_maskz_1_round */ |
| 46810 | case 2647: /* avx512vl_fixupimmv4df_maskz_1 */ |
| 46811 | case 2646: /* avx512vl_fixupimmv4df_round */ |
| 46812 | case 2645: /* avx512vl_fixupimmv4df */ |
| 46813 | case 2644: /* avx512f_fixupimmv8df_maskz_1_round */ |
| 46814 | case 2643: /* avx512f_fixupimmv8df_maskz_1 */ |
| 46815 | case 2642: /* avx512f_fixupimmv8df_round */ |
| 46816 | case 2641: /* avx512f_fixupimmv8df */ |
| 46817 | case 2640: /* avx512vl_fixupimmv4sf_maskz_1_round */ |
| 46818 | case 2639: /* avx512vl_fixupimmv4sf_maskz_1 */ |
| 46819 | case 2638: /* avx512vl_fixupimmv4sf_round */ |
| 46820 | case 2637: /* avx512vl_fixupimmv4sf */ |
| 46821 | case 2636: /* avx512vl_fixupimmv8sf_maskz_1_round */ |
| 46822 | case 2635: /* avx512vl_fixupimmv8sf_maskz_1 */ |
| 46823 | case 2634: /* avx512vl_fixupimmv8sf_round */ |
| 46824 | case 2633: /* avx512vl_fixupimmv8sf */ |
| 46825 | case 2632: /* avx512f_fixupimmv16sf_maskz_1_round */ |
| 46826 | case 2631: /* avx512f_fixupimmv16sf_maskz_1 */ |
| 46827 | case 2630: /* avx512f_fixupimmv16sf_round */ |
| 46828 | case 2629: /* avx512f_fixupimmv16sf */ |
| 46829 | case 2628: /* avx512vl_alignv2di_mask */ |
| 46830 | case 2627: /* *avx512vl_alignv2di */ |
| 46831 | case 2626: /* avx512vl_alignv4di_mask */ |
| 46832 | case 2625: /* *avx512vl_alignv4di */ |
| 46833 | case 2624: /* avx512f_alignv8di_mask */ |
| 46834 | case 2623: /* *avx512f_alignv8di */ |
| 46835 | case 2622: /* avx512vl_alignv4si_mask */ |
| 46836 | case 2621: /* *avx512vl_alignv4si */ |
| 46837 | case 2620: /* avx512vl_alignv8si_mask */ |
| 46838 | case 2619: /* *avx512vl_alignv8si */ |
| 46839 | case 2618: /* avx512f_alignv16si_mask */ |
| 46840 | case 2617: /* *avx512f_alignv16si */ |
| 46841 | case 2616: /* avx512f_sgetexpv2df_round */ |
| 46842 | case 2615: /* avx512f_sgetexpv2df */ |
| 46843 | case 2614: /* avx512f_sgetexpv4sf_round */ |
| 46844 | case 2613: /* avx512f_sgetexpv4sf */ |
| 46845 | case 2612: /* avx512vl_getexpv2df_mask_round */ |
| 46846 | case 2611: /* avx512vl_getexpv2df_mask */ |
| 46847 | case 2610: /* avx512vl_getexpv2df_round */ |
| 46848 | case 2609: /* avx512vl_getexpv2df */ |
| 46849 | case 2608: /* avx512vl_getexpv4df_mask_round */ |
| 46850 | case 2607: /* avx512vl_getexpv4df_mask */ |
| 46851 | case 2606: /* avx512vl_getexpv4df_round */ |
| 46852 | case 2605: /* avx512vl_getexpv4df */ |
| 46853 | case 2604: /* avx512f_getexpv8df_mask_round */ |
| 46854 | case 2603: /* avx512f_getexpv8df_mask */ |
| 46855 | case 2602: /* avx512f_getexpv8df_round */ |
| 46856 | case 2601: /* avx512f_getexpv8df */ |
| 46857 | case 2600: /* avx512vl_getexpv4sf_mask_round */ |
| 46858 | case 2599: /* avx512vl_getexpv4sf_mask */ |
| 46859 | case 2598: /* avx512vl_getexpv4sf_round */ |
| 46860 | case 2597: /* avx512vl_getexpv4sf */ |
| 46861 | case 2596: /* avx512vl_getexpv8sf_mask_round */ |
| 46862 | case 2595: /* avx512vl_getexpv8sf_mask */ |
| 46863 | case 2594: /* avx512vl_getexpv8sf_round */ |
| 46864 | case 2593: /* avx512vl_getexpv8sf */ |
| 46865 | case 2592: /* avx512f_getexpv16sf_mask_round */ |
| 46866 | case 2591: /* avx512f_getexpv16sf_mask */ |
| 46867 | case 2590: /* avx512f_getexpv16sf_round */ |
| 46868 | case 2589: /* avx512f_getexpv16sf */ |
| 46869 | case 2570: /* avx512vl_scalefv2df_mask_round */ |
| 46870 | case 2569: /* avx512vl_scalefv2df_mask */ |
| 46871 | case 2568: /* avx512vl_scalefv2df_round */ |
| 46872 | case 2567: /* avx512vl_scalefv2df */ |
| 46873 | case 2566: /* avx512vl_scalefv4df_mask_round */ |
| 46874 | case 2565: /* avx512vl_scalefv4df_mask */ |
| 46875 | case 2564: /* avx512vl_scalefv4df_round */ |
| 46876 | case 2563: /* avx512vl_scalefv4df */ |
| 46877 | case 2562: /* avx512f_scalefv8df_mask_round */ |
| 46878 | case 2561: /* avx512f_scalefv8df_mask */ |
| 46879 | case 2560: /* avx512f_scalefv8df_round */ |
| 46880 | case 2559: /* avx512f_scalefv8df */ |
| 46881 | case 2558: /* avx512vl_scalefv4sf_mask_round */ |
| 46882 | case 2557: /* avx512vl_scalefv4sf_mask */ |
| 46883 | case 2556: /* avx512vl_scalefv4sf_round */ |
| 46884 | case 2555: /* avx512vl_scalefv4sf */ |
| 46885 | case 2554: /* avx512vl_scalefv8sf_mask_round */ |
| 46886 | case 2553: /* avx512vl_scalefv8sf_mask */ |
| 46887 | case 2552: /* avx512vl_scalefv8sf_round */ |
| 46888 | case 2551: /* avx512vl_scalefv8sf */ |
| 46889 | case 2550: /* avx512f_scalefv16sf_mask_round */ |
| 46890 | case 2549: /* avx512f_scalefv16sf_mask */ |
| 46891 | case 2548: /* avx512f_scalefv16sf_round */ |
| 46892 | case 2547: /* avx512f_scalefv16sf */ |
| 46893 | case 2546: /* avx512f_vmscalefv2df_round */ |
| 46894 | case 2545: /* avx512f_vmscalefv2df */ |
| 46895 | case 2544: /* avx512f_vmscalefv4sf_round */ |
| 46896 | case 2543: /* avx512f_vmscalefv4sf */ |
| 46897 | case 2529: /* vec_extract_lo_v32qi */ |
| 46898 | case 2527: /* vec_extract_lo_v64qi */ |
| 46899 | case 2525: /* vec_extract_lo_v16hi */ |
| 46900 | case 2523: /* vec_extract_lo_v32hi */ |
| 46901 | case 2502: /* vec_extract_lo_v16si_mask */ |
| 46902 | case 2501: /* vec_extract_lo_v16si */ |
| 46903 | case 2500: /* vec_extract_lo_v16sf_mask */ |
| 46904 | case 2499: /* vec_extract_lo_v16sf */ |
| 46905 | case 2468: /* *vec_extractv4sf_mem */ |
| 46906 | case 2466: /* *vec_extractv4sf_0 */ |
| 46907 | case 2415: /* *avx512vl_cvtmask2qv2di */ |
| 46908 | case 2414: /* *avx512vl_cvtmask2qv4di */ |
| 46909 | case 2413: /* *avx512f_cvtmask2qv8di */ |
| 46910 | case 2412: /* *avx512vl_cvtmask2dv4si */ |
| 46911 | case 2411: /* *avx512vl_cvtmask2dv8si */ |
| 46912 | case 2410: /* *avx512f_cvtmask2dv16si */ |
| 46913 | case 2409: /* *avx512vl_cvtmask2wv8hi */ |
| 46914 | case 2408: /* *avx512vl_cvtmask2wv16hi */ |
| 46915 | case 2407: /* *avx512bw_cvtmask2wv32hi */ |
| 46916 | case 2406: /* *avx512vl_cvtmask2bv32qi */ |
| 46917 | case 2405: /* *avx512vl_cvtmask2bv16qi */ |
| 46918 | case 2404: /* *avx512bw_cvtmask2bv64qi */ |
| 46919 | case 2403: /* avx512vl_cvtq2maskv2di */ |
| 46920 | case 2402: /* avx512vl_cvtq2maskv4di */ |
| 46921 | case 2401: /* avx512f_cvtq2maskv8di */ |
| 46922 | case 2400: /* avx512vl_cvtd2maskv4si */ |
| 46923 | case 2399: /* avx512vl_cvtd2maskv8si */ |
| 46924 | case 2398: /* avx512f_cvtd2maskv16si */ |
| 46925 | case 2397: /* avx512vl_cvtw2maskv8hi */ |
| 46926 | case 2396: /* avx512vl_cvtw2maskv16hi */ |
| 46927 | case 2395: /* avx512bw_cvtw2maskv32hi */ |
| 46928 | case 2394: /* avx512vl_cvtb2maskv32qi */ |
| 46929 | case 2393: /* avx512vl_cvtb2maskv16qi */ |
| 46930 | case 2392: /* avx512bw_cvtb2maskv64qi */ |
| 46931 | case 1360: /* *absnegv2df2 */ |
| 46932 | case 1359: /* *absnegv4df2 */ |
| 46933 | case 1358: /* *absnegv8df2 */ |
| 46934 | case 1357: /* *absnegv4sf2 */ |
| 46935 | case 1356: /* *absnegv8sf2 */ |
| 46936 | case 1355: /* *absnegv16sf2 */ |
| 46937 | case 1354: /* kunpckdi */ |
| 46938 | case 1353: /* kunpcksi */ |
| 46939 | case 1294: /* movdi_to_sse */ |
| 46940 | case 1209: /* *vec_extractv2si_zext_mem */ |
| 46941 | case 1207: /* *vec_extractv2si_0 */ |
| 46942 | case 1137: /* *vec_extractv2sf_0 */ |
| 46943 | case 1105: /* rdpid */ |
| 46944 | case 1104: /* *wrpkru */ |
| 46945 | case 1103: /* *rdpkru */ |
| 46946 | case 1100: /* *bnd64_stx */ |
| 46947 | case 1099: /* *bnd32_stx */ |
| 46948 | case 1096: /* *bnd64_cn */ |
| 46949 | case 1095: /* *bnd64_cu */ |
| 46950 | case 1094: /* *bnd64_cl */ |
| 46951 | case 1093: /* *bnd32_cn */ |
| 46952 | case 1092: /* *bnd32_cu */ |
| 46953 | case 1091: /* *bnd32_cl */ |
| 46954 | case 1088: /* *bnd64_mk */ |
| 46955 | case 1087: /* *bnd32_mk */ |
| 46956 | case 1086: /* clzero_di */ |
| 46957 | case 1085: /* clzero_si */ |
| 46958 | case 1084: /* monitorx_di */ |
| 46959 | case 1083: /* monitorx_si */ |
| 46960 | case 1082: /* mwaitx */ |
| 46961 | case 1079: /* xtest_1 */ |
| 46962 | case 1078: /* xabort */ |
| 46963 | case 1077: /* xend */ |
| 46964 | case 1076: /* xbegin_1 */ |
| 46965 | case 1075: /* *pause */ |
| 46966 | case 1074: /* rdseeddi_1 */ |
| 46967 | case 1073: /* rdseedsi_1 */ |
| 46968 | case 1072: /* rdseedhi_1 */ |
| 46969 | case 1071: /* rdranddi_1 */ |
| 46970 | case 1070: /* rdrandsi_1 */ |
| 46971 | case 1069: /* rdrandhi_1 */ |
| 46972 | case 1068: /* wrgsbasedi */ |
| 46973 | case 1067: /* wrfsbasedi */ |
| 46974 | case 1066: /* wrgsbasesi */ |
| 46975 | case 1065: /* wrfsbasesi */ |
| 46976 | case 1064: /* rdgsbasedi */ |
| 46977 | case 1063: /* rdfsbasedi */ |
| 46978 | case 1062: /* rdgsbasesi */ |
| 46979 | case 1061: /* rdfsbasesi */ |
| 46980 | case 1060: /* *lwp_lwpinsdi3_1 */ |
| 46981 | case 1059: /* *lwp_lwpinssi3_1 */ |
| 46982 | case 1058: /* *lwp_lwpvaldi3_1 */ |
| 46983 | case 1057: /* *lwp_lwpvalsi3_1 */ |
| 46984 | case 1056: /* lwp_slwpcbdi */ |
| 46985 | case 1055: /* lwp_slwpcbsi */ |
| 46986 | case 1054: /* *lwp_llwpcbdi1 */ |
| 46987 | case 1053: /* *lwp_llwpcbsi1 */ |
| 46988 | case 1052: /* fnclex */ |
| 46989 | case 1051: /* fnstsw */ |
| 46990 | case 1049: /* fnstenv */ |
| 46991 | case 1042: /* xsaves64 */ |
| 46992 | case 1041: /* xsavec64 */ |
| 46993 | case 1040: /* xsaveopt64 */ |
| 46994 | case 1039: /* xsave64 */ |
| 46995 | case 1038: /* xsaves_rex64 */ |
| 46996 | case 1037: /* xsavec_rex64 */ |
| 46997 | case 1036: /* xsaveopt_rex64 */ |
| 46998 | case 1035: /* xsave_rex64 */ |
| 46999 | case 1034: /* xsaves */ |
| 47000 | case 1033: /* xsavec */ |
| 47001 | case 1032: /* xsaveopt */ |
| 47002 | case 1031: /* xsave */ |
| 47003 | case 1028: /* fxsave64 */ |
| 47004 | case 1027: /* fxsave */ |
| 47005 | case 1026: /* rdtscp_rex64 */ |
| 47006 | case 1025: /* rdtscp */ |
| 47007 | case 1024: /* rdtsc_rex64 */ |
| 47008 | case 1023: /* rdtsc */ |
| 47009 | case 1022: /* rdpmc_rex64 */ |
| 47010 | case 1021: /* rdpmc */ |
| 47011 | case 1016: /* stack_tls_protect_test_di */ |
| 47012 | case 1015: /* stack_tls_protect_test_si */ |
| 47013 | case 1014: /* stack_protect_test_di */ |
| 47014 | case 1013: /* stack_protect_test_si */ |
| 47015 | case 1012: /* stack_tls_protect_set_di */ |
| 47016 | case 1011: /* stack_tls_protect_set_si */ |
| 47017 | case 1010: /* stack_protect_set_di */ |
| 47018 | case 1009: /* stack_protect_set_si */ |
| 47019 | case 1005: /* trap */ |
| 47020 | case 1004: /* probe_stack_rangedi */ |
| 47021 | case 1003: /* probe_stack_rangesi */ |
| 47022 | case 1002: /* adjust_stack_and_probedi */ |
| 47023 | case 1001: /* adjust_stack_and_probesi */ |
| 47024 | case 998: /* allocate_stack_worker_probe_di */ |
| 47025 | case 997: /* allocate_stack_worker_probe_si */ |
| 47026 | case 974: /* *x86_movdicc_0_m1_neg */ |
| 47027 | case 973: /* *x86_movsicc_0_m1_neg */ |
| 47028 | case 972: /* *x86_movdicc_0_m1_se */ |
| 47029 | case 971: /* *x86_movsicc_0_m1_se */ |
| 47030 | case 970: /* *x86_movdicc_0_m1 */ |
| 47031 | case 969: /* *x86_movsicc_0_m1 */ |
| 47032 | case 968: /* *strlenqi_1 */ |
| 47033 | case 967: /* *strlenqi_1 */ |
| 47034 | case 966: /* *cmpstrnqi_1 */ |
| 47035 | case 965: /* *cmpstrnqi_1 */ |
| 47036 | case 964: /* *cmpstrnqi_nz_1 */ |
| 47037 | case 963: /* *cmpstrnqi_nz_1 */ |
| 47038 | case 934: /* cld */ |
| 47039 | case 811: /* *tls_dynamic_gnu2_combine_64 */ |
| 47040 | case 809: /* *tls_dynamic_gnu2_lea_64 */ |
| 47041 | case 808: /* *tls_dynamic_gnu2_combine_32 */ |
| 47042 | case 806: /* *tls_dynamic_gnu2_lea_32 */ |
| 47043 | case 797: /* *tls_local_dynamic_32_once */ |
| 47044 | case 796: /* *tls_local_dynamic_base_64_largepic */ |
| 47045 | case 795: /* *tls_local_dynamic_base_64_di */ |
| 47046 | case 794: /* *tls_local_dynamic_base_64_si */ |
| 47047 | case 793: /* *tls_local_dynamic_base_32_gnu */ |
| 47048 | case 792: /* *tls_global_dynamic_64_largepic */ |
| 47049 | case 791: /* *tls_global_dynamic_64_di */ |
| 47050 | case 790: /* *tls_global_dynamic_64_si */ |
| 47051 | case 789: /* *tls_global_dynamic_32_gnu */ |
| 47052 | case 788: /* *parityhi2_cmp */ |
| 47053 | case 787: /* paritysi2_cmp */ |
| 47054 | case 786: /* paritydi2_cmp */ |
| 47055 | case 785: /* bswaphi_lowpart */ |
| 47056 | case 784: /* *bswaphi_lowpart_1 */ |
| 47057 | case 778: /* *popcounthi2_1 */ |
| 47058 | case 706: /* ffssi2_no_cmove */ |
| 47059 | case 705: /* split_stack_return */ |
| 47060 | case 702: /* eh_return_internal */ |
| 47061 | case 700: /* set_rip_rex64 */ |
| 47062 | case 699: /* set_got_rex64 */ |
| 47063 | case 698: /* *set_got_labelled */ |
| 47064 | case 697: /* *set_got */ |
| 47065 | case 696: /* pad */ |
| 47066 | case 695: /* nops */ |
| 47067 | case 694: /* nop */ |
| 47068 | case 692: /* simple_return_pop_internal */ |
| 47069 | case 691: /* simple_return_internal_long */ |
| 47070 | case 690: /* interrupt_return */ |
| 47071 | case 689: /* simple_return_internal */ |
| 47072 | case 688: /* prologue_use */ |
| 47073 | case 687: /* *memory_blockage */ |
| 47074 | case 686: /* blockage */ |
| 47075 | case 658: /* *jccxf_si_r_i387 */ |
| 47076 | case 657: /* *jccdf_si_r_i387 */ |
| 47077 | case 656: /* *jccsf_si_r_i387 */ |
| 47078 | case 655: /* *jccxf_hi_r_i387 */ |
| 47079 | case 654: /* *jccdf_hi_r_i387 */ |
| 47080 | case 653: /* *jccsf_hi_r_i387 */ |
| 47081 | case 652: /* *jccxf_si_i387 */ |
| 47082 | case 651: /* *jccdf_si_i387 */ |
| 47083 | case 650: /* *jccsf_si_i387 */ |
| 47084 | case 649: /* *jccxf_hi_i387 */ |
| 47085 | case 648: /* *jccdf_hi_i387 */ |
| 47086 | case 647: /* *jccsf_hi_i387 */ |
| 47087 | case 646: /* *jccuxf_r_i387 */ |
| 47088 | case 645: /* *jccudf_r_i387 */ |
| 47089 | case 644: /* *jccusf_r_i387 */ |
| 47090 | case 643: /* *jccuxf_i387 */ |
| 47091 | case 642: /* *jccudf_i387 */ |
| 47092 | case 641: /* *jccusf_i387 */ |
| 47093 | case 640: /* *jccdf_r_i387 */ |
| 47094 | case 639: /* *jccsf_r_i387 */ |
| 47095 | case 638: /* *jccdf_i387 */ |
| 47096 | case 637: /* *jccsf_i387 */ |
| 47097 | case 636: /* *jccxf_r_i387 */ |
| 47098 | case 635: /* *jccxf_i387 */ |
| 47099 | case 634: /* *jccxf_0_r_i387 */ |
| 47100 | case 633: /* *jccdf_0_r_i387 */ |
| 47101 | case 632: /* *jccsf_0_r_i387 */ |
| 47102 | case 631: /* *jccxf_0_i387 */ |
| 47103 | case 630: /* *jccdf_0_i387 */ |
| 47104 | case 629: /* *jccsf_0_i387 */ |
| 47105 | case 622: /* *setcc_si_1_movzbl */ |
| 47106 | case 621: /* *setcc_si_1_and */ |
| 47107 | case 620: /* *setcc_di_1 */ |
| 47108 | case 619: /* *jcc_btdi_mask */ |
| 47109 | case 618: /* *jcc_btsi_mask */ |
| 47110 | case 617: /* *jcc_btdi_1 */ |
| 47111 | case 616: /* *jcc_btsi_1 */ |
| 47112 | case 615: /* *jcc_btdi */ |
| 47113 | case 614: /* *jcc_btsi */ |
| 47114 | case 593: /* ix86_rotrti3_doubleword */ |
| 47115 | case 592: /* ix86_rotrdi3_doubleword */ |
| 47116 | case 591: /* ix86_rotlti3_doubleword */ |
| 47117 | case 590: /* ix86_rotldi3_doubleword */ |
| 47118 | case 589: /* *rotrdi3_mask */ |
| 47119 | case 588: /* *rotldi3_mask */ |
| 47120 | case 587: /* *rotrsi3_mask */ |
| 47121 | case 586: /* *rotlsi3_mask */ |
| 47122 | case 544: /* *ashrti3_doubleword */ |
| 47123 | case 543: /* *lshrti3_doubleword */ |
| 47124 | case 542: /* *ashrdi3_doubleword */ |
| 47125 | case 541: /* *lshrdi3_doubleword */ |
| 47126 | case 540: /* *ashrdi3_mask */ |
| 47127 | case 539: /* *lshrdi3_mask */ |
| 47128 | case 538: /* *ashrsi3_mask */ |
| 47129 | case 537: /* *lshrsi3_mask */ |
| 47130 | case 518: /* *ashldi3_mask */ |
| 47131 | case 517: /* *ashlsi3_mask */ |
| 47132 | case 514: /* *ashlti3_doubleword */ |
| 47133 | case 513: /* *ashldi3_doubleword */ |
| 47134 | case 502: /* *one_cmpldi2_doubleword */ |
| 47135 | case 501: /* copysigntf3_var */ |
| 47136 | case 500: /* copysigndf3_var */ |
| 47137 | case 499: /* copysignsf3_var */ |
| 47138 | case 498: /* copysigntf3_const */ |
| 47139 | case 497: /* copysigndf3_const */ |
| 47140 | case 496: /* copysignsf3_const */ |
| 47141 | case 483: /* *absnegtf2_sse */ |
| 47142 | case 482: /* *absnegxf2_i387 */ |
| 47143 | case 481: /* *absnegdf2 */ |
| 47144 | case 480: /* *absnegsf2 */ |
| 47145 | case 465: /* *negti2_doubleword */ |
| 47146 | case 464: /* *negdi2_doubleword */ |
| 47147 | case 422: /* *xordi3_doubleword */ |
| 47148 | case 421: /* *iordi3_doubleword */ |
| 47149 | case 414: /* *andndi3_doubleword */ |
| 47150 | case 397: /* *anddi3_doubleword */ |
| 47151 | case 396: /* *testqi_ext_3 */ |
| 47152 | case 395: /* *testqi_ext_3 */ |
| 47153 | case 394: /* *testqi_ext_3 */ |
| 47154 | case 382: /* *udivmoddi4_pow2 */ |
| 47155 | case 381: /* *udivmodsi4_pow2 */ |
| 47156 | case 380: /* *udivmoddi4 */ |
| 47157 | case 379: /* *udivmodsi4 */ |
| 47158 | case 378: /* *udivmodhi4 */ |
| 47159 | case 377: /* udivmoddi4_1 */ |
| 47160 | case 376: /* udivmodsi4_1 */ |
| 47161 | case 371: /* *divmoddi4 */ |
| 47162 | case 370: /* *divmodsi4 */ |
| 47163 | case 369: /* *divmodhi4 */ |
| 47164 | case 368: /* divmoddi4_1 */ |
| 47165 | case 367: /* divmodsi4_1 */ |
| 47166 | case 270: /* *subti3_doubleword */ |
| 47167 | case 269: /* *subdi3_doubleword */ |
| 47168 | case 268: /* *leadi_general_4 */ |
| 47169 | case 267: /* *leadi_general_4 */ |
| 47170 | case 266: /* *leasi_general_4 */ |
| 47171 | case 265: /* *leasi_general_4 */ |
| 47172 | case 264: /* *leahi_general_4 */ |
| 47173 | case 263: /* *leahi_general_4 */ |
| 47174 | case 262: /* *leaqi_general_4 */ |
| 47175 | case 261: /* *leaqi_general_4 */ |
| 47176 | case 260: /* *leahi_general_3b */ |
| 47177 | case 259: /* *leaqi_general_3b */ |
| 47178 | case 258: /* *leahi_general_3 */ |
| 47179 | case 257: /* *leaqi_general_3 */ |
| 47180 | case 256: /* *leahi_general_2b */ |
| 47181 | case 255: /* *leaqi_general_2b */ |
| 47182 | case 254: /* *leahi_general_2 */ |
| 47183 | case 253: /* *leaqi_general_2 */ |
| 47184 | case 252: /* *leahi_general_1 */ |
| 47185 | case 251: /* *leaqi_general_1 */ |
| 47186 | case 216: /* *addti3_doubleword */ |
| 47187 | case 215: /* *adddi3_doubleword */ |
| 47188 | case 214: /* *leadi */ |
| 47189 | case 213: /* *leasi */ |
| 47190 | case 212: /* *floatunssixf2_i387_with_xmm */ |
| 47191 | case 211: /* *floatunssidf2_i387_with_xmm */ |
| 47192 | case 210: /* *floatunssisf2_i387_with_xmm */ |
| 47193 | case 169: /* *fixuns_truncdf_1 */ |
| 47194 | case 168: /* *fixuns_truncsf_1 */ |
| 47195 | case 146: /* extendsidi2_1 */ |
| 47196 | case 144: /* *zextsi_doubleword */ |
| 47197 | case 143: /* *zexthi_doubleword */ |
| 47198 | case 142: /* *zextqi_doubleword */ |
| 47199 | case 141: /* *zexthi_doubleword_and */ |
| 47200 | case 140: /* *zextqi_doubleword_and */ |
| 47201 | case 88: /* *movabsdi_1 */ |
| 47202 | case 87: /* *movabssi_1 */ |
| 47203 | case 86: /* *movabshi_1 */ |
| 47204 | case 85: /* *movabsqi_1 */ |
| 47205 | case 56: /* *pushti2 */ |
| 47206 | case 55: /* *pushdi2 */ |
| 47207 | case 48: /* x86_sahf_1 */ |
| 47208 | return 1; |
| 47209 | |
| 47210 | case 393: /* *testqi_ext_2 */ |
| 47211 | case 392: /* *testqi_ext_1 */ |
| 47212 | case 391: /* *testsi_1 */ |
| 47213 | case 390: /* *testhi_1 */ |
| 47214 | case 389: /* *testqi_1 */ |
| 47215 | case 388: /* *testqi_1_maybe_si */ |
| 47216 | case 387: /* *testdi_1 */ |
| 47217 | case 222: /* *addqi_1_slp */ |
| 47218 | case 16: /* *cmpqi_ext_4 */ |
| 47219 | case 15: /* *cmpqi_ext_3 */ |
| 47220 | case 14: /* *cmpqi_ext_2 */ |
| 47221 | case 13: /* *cmpqi_ext_1 */ |
| 47222 | case 12: /* *cmpdi_minus_1 */ |
| 47223 | case 11: /* *cmpsi_minus_1 */ |
| 47224 | case 10: /* *cmphi_minus_1 */ |
| 47225 | case 9: /* *cmpqi_minus_1 */ |
| 47226 | case 8: /* *cmpdi_1 */ |
| 47227 | case 7: /* *cmpsi_1 */ |
| 47228 | case 6: /* *cmphi_1 */ |
| 47229 | case 5: /* *cmpqi_1 */ |
| 47230 | case 4: /* *cmpdi_ccno_1 */ |
| 47231 | case 3: /* *cmpsi_ccno_1 */ |
| 47232 | case 2: /* *cmphi_ccno_1 */ |
| 47233 | case 1: /* *cmpqi_ccno_1 */ |
| 47234 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) |
| 47235 | { |
| 47236 | return 1; |
| 47237 | } |
| 47238 | else if (cached_memory == MEMORY_LOAD) |
| 47239 | { |
| 47240 | return 4; |
| 47241 | } |
| 47242 | else |
| 47243 | { |
| 47244 | return 0; |
| 47245 | } |
| 47246 | |
| 47247 | case -1: |
| 47248 | if (GET_CODE (PATTERN (insn)) != ASM_INPUT |
| 47249 | && asm_noperands (PATTERN (insn)) < 0) |
| 47250 | fatal_insn_not_found (insn); |
| 47251 | /* FALLTHRU */ |
| 47252 | case 49: /* *cmpisf */ |
| 47253 | case 50: /* *cmpidf */ |
| 47254 | case 51: /* *cmpiusf */ |
| 47255 | case 52: /* *cmpiudf */ |
| 47256 | case 78: /* *movxi_internal_avx512f */ |
| 47257 | case 79: /* *movoi_internal_avx */ |
| 47258 | case 80: /* *movti_internal */ |
| 47259 | case 81: /* *movdi_internal */ |
| 47260 | case 82: /* *movsi_internal */ |
| 47261 | case 83: /* *movhi_internal */ |
| 47262 | case 84: /* *movqi_internal */ |
| 47263 | case 97: /* *movstrictqi_1 */ |
| 47264 | case 98: /* *movstricthi_1 */ |
| 47265 | case 101: /* *extvhi */ |
| 47266 | case 102: /* *extvsi */ |
| 47267 | case 103: /* *extzvhi */ |
| 47268 | case 104: /* *extzvsi */ |
| 47269 | case 105: /* *extzvdi */ |
| 47270 | case 106: /* *extzvqi_mem_rex64 */ |
| 47271 | case 107: /* *extzvqi */ |
| 47272 | case 108: /* insvhi_1 */ |
| 47273 | case 109: /* insvsi_1 */ |
| 47274 | case 110: /* insvdi_1 */ |
| 47275 | case 111: /* *insvqi_1_mem_rex64 */ |
| 47276 | case 112: /* *insvqi_1 */ |
| 47277 | case 113: /* *insvqi_2 */ |
| 47278 | case 114: /* *insvqi_2 */ |
| 47279 | case 115: /* *insvqi_3 */ |
| 47280 | case 116: /* *insvqi_3 */ |
| 47281 | case 124: /* *movtf_internal */ |
| 47282 | case 125: /* *movxf_internal */ |
| 47283 | case 126: /* *movdf_internal */ |
| 47284 | case 127: /* *movsf_internal */ |
| 47285 | case 131: /* *zero_extendsidi2 */ |
| 47286 | case 132: /* zero_extendqidi2 */ |
| 47287 | case 133: /* zero_extendhidi2 */ |
| 47288 | case 136: /* *zero_extendqisi2 */ |
| 47289 | case 137: /* *zero_extendhisi2 */ |
| 47290 | case 139: /* *zero_extendqihi2 */ |
| 47291 | case 145: /* *extendsidi2_rex64 */ |
| 47292 | case 147: /* extendqidi2 */ |
| 47293 | case 148: /* extendhidi2 */ |
| 47294 | case 149: /* extendhisi2 */ |
| 47295 | case 150: /* *extendhisi2_zext */ |
| 47296 | case 151: /* extendqisi2 */ |
| 47297 | case 152: /* *extendqisi2_zext */ |
| 47298 | case 153: /* extendqihi2 */ |
| 47299 | case 154: /* *extendsfdf2 */ |
| 47300 | case 155: /* *extendsfxf2_i387 */ |
| 47301 | case 156: /* *extenddfxf2_i387 */ |
| 47302 | case 196: /* floathixf2 */ |
| 47303 | case 197: /* floatsixf2 */ |
| 47304 | case 198: /* floatdixf2 */ |
| 47305 | case 217: /* *addsi_1 */ |
| 47306 | case 218: /* *adddi_1 */ |
| 47307 | case 219: /* addsi_1_zext */ |
| 47308 | case 220: /* *addhi_1 */ |
| 47309 | case 221: /* *addqi_1 */ |
| 47310 | case 223: /* *addqi_2 */ |
| 47311 | case 224: /* *addhi_2 */ |
| 47312 | case 225: /* *addsi_2 */ |
| 47313 | case 226: /* *adddi_2 */ |
| 47314 | case 227: /* *addsi_2_zext */ |
| 47315 | case 228: /* *addqi_3 */ |
| 47316 | case 229: /* *addhi_3 */ |
| 47317 | case 230: /* *addsi_3 */ |
| 47318 | case 231: /* *adddi_3 */ |
| 47319 | case 232: /* *addsi_3_zext */ |
| 47320 | case 233: /* *adddi_4 */ |
| 47321 | case 234: /* *addqi_4 */ |
| 47322 | case 235: /* *addhi_4 */ |
| 47323 | case 236: /* *addsi_4 */ |
| 47324 | case 237: /* *addqi_5 */ |
| 47325 | case 238: /* *addhi_5 */ |
| 47326 | case 239: /* *addsi_5 */ |
| 47327 | case 240: /* *adddi_5 */ |
| 47328 | case 241: /* addqi_ext_1 */ |
| 47329 | case 242: /* *addqi_ext_2 */ |
| 47330 | case 243: /* *addvqi4 */ |
| 47331 | case 244: /* *addvhi4 */ |
| 47332 | case 245: /* *addvsi4 */ |
| 47333 | case 246: /* *addvdi4 */ |
| 47334 | case 247: /* *addvqi4_1 */ |
| 47335 | case 248: /* *addvhi4_1 */ |
| 47336 | case 249: /* *addvsi4_1 */ |
| 47337 | case 250: /* *addvdi4_1 */ |
| 47338 | case 271: /* *subqi_1 */ |
| 47339 | case 272: /* *subhi_1 */ |
| 47340 | case 273: /* *subsi_1 */ |
| 47341 | case 274: /* *subdi_1 */ |
| 47342 | case 275: /* *subsi_1_zext */ |
| 47343 | case 277: /* *subqi_2 */ |
| 47344 | case 278: /* *subhi_2 */ |
| 47345 | case 279: /* *subsi_2 */ |
| 47346 | case 280: /* *subdi_2 */ |
| 47347 | case 281: /* *subsi_2_zext */ |
| 47348 | case 282: /* *subvqi4 */ |
| 47349 | case 283: /* *subvhi4 */ |
| 47350 | case 284: /* *subvsi4 */ |
| 47351 | case 285: /* *subvdi4 */ |
| 47352 | case 286: /* *subvqi4_1 */ |
| 47353 | case 287: /* *subvhi4_1 */ |
| 47354 | case 288: /* *subvsi4_1 */ |
| 47355 | case 289: /* *subvdi4_1 */ |
| 47356 | case 290: /* *subqi_3 */ |
| 47357 | case 291: /* *subhi_3 */ |
| 47358 | case 292: /* *subsi_3 */ |
| 47359 | case 293: /* *subdi_3 */ |
| 47360 | case 294: /* *subsi_3_zext */ |
| 47361 | case 295: /* addqi3_carry */ |
| 47362 | case 296: /* addhi3_carry */ |
| 47363 | case 297: /* addsi3_carry */ |
| 47364 | case 298: /* adddi3_carry */ |
| 47365 | case 299: /* *addqi3_carry_0 */ |
| 47366 | case 300: /* *addhi3_carry_0 */ |
| 47367 | case 301: /* *addsi3_carry_0 */ |
| 47368 | case 302: /* *adddi3_carry_0 */ |
| 47369 | case 303: /* *addsi3_carry_zext */ |
| 47370 | case 304: /* *addsi3_carry_zext_0 */ |
| 47371 | case 305: /* addcarrysi */ |
| 47372 | case 306: /* addcarrydi */ |
| 47373 | case 307: /* subqi3_carry */ |
| 47374 | case 308: /* subhi3_carry */ |
| 47375 | case 309: /* subsi3_carry */ |
| 47376 | case 310: /* subdi3_carry */ |
| 47377 | case 311: /* *subqi3_carry_0 */ |
| 47378 | case 312: /* *subhi3_carry_0 */ |
| 47379 | case 313: /* *subsi3_carry_0 */ |
| 47380 | case 314: /* *subdi3_carry_0 */ |
| 47381 | case 315: /* *subsi3_carry_zext */ |
| 47382 | case 316: /* *subsi3_carry_zext_0 */ |
| 47383 | case 317: /* subborrowsi */ |
| 47384 | case 318: /* subborrowdi */ |
| 47385 | case 319: /* *addqi3_cconly_overflow_1 */ |
| 47386 | case 320: /* *addhi3_cconly_overflow_1 */ |
| 47387 | case 321: /* *addsi3_cconly_overflow_1 */ |
| 47388 | case 322: /* *adddi3_cconly_overflow_1 */ |
| 47389 | case 323: /* *addqi3_cc_overflow_1 */ |
| 47390 | case 324: /* *addhi3_cc_overflow_1 */ |
| 47391 | case 325: /* *addsi3_cc_overflow_1 */ |
| 47392 | case 326: /* *adddi3_cc_overflow_1 */ |
| 47393 | case 327: /* *addsi3_zext_cc_overflow_1 */ |
| 47394 | case 328: /* *addqi3_cconly_overflow_2 */ |
| 47395 | case 329: /* *addhi3_cconly_overflow_2 */ |
| 47396 | case 330: /* *addsi3_cconly_overflow_2 */ |
| 47397 | case 331: /* *adddi3_cconly_overflow_2 */ |
| 47398 | case 332: /* *addqi3_cc_overflow_2 */ |
| 47399 | case 333: /* *addhi3_cc_overflow_2 */ |
| 47400 | case 334: /* *addsi3_cc_overflow_2 */ |
| 47401 | case 335: /* *adddi3_cc_overflow_2 */ |
| 47402 | case 336: /* *addsi3_zext_cc_overflow_2 */ |
| 47403 | case 337: /* *mulhi3_1 */ |
| 47404 | case 338: /* *mulsi3_1 */ |
| 47405 | case 339: /* *muldi3_1 */ |
| 47406 | case 340: /* *mulsi3_1_zext */ |
| 47407 | case 341: /* *mulqi3_1 */ |
| 47408 | case 342: /* *mulvsi4 */ |
| 47409 | case 343: /* *mulvdi4 */ |
| 47410 | case 344: /* *mulvhi4 */ |
| 47411 | case 345: /* *mulvhi4_1 */ |
| 47412 | case 346: /* *mulvsi4_1 */ |
| 47413 | case 347: /* *mulvdi4_1 */ |
| 47414 | case 348: /* *umulvhi4 */ |
| 47415 | case 350: /* *umulvdi4 */ |
| 47416 | case 351: /* *mulvqi4 */ |
| 47417 | case 352: /* *umulvqi4 */ |
| 47418 | case 353: /* *bmi2_umulsidi3_1 */ |
| 47419 | case 354: /* *bmi2_umulditi3_1 */ |
| 47420 | case 355: /* *umulsidi3_1 */ |
| 47421 | case 356: /* *umulditi3_1 */ |
| 47422 | case 358: /* *mulditi3_1 */ |
| 47423 | case 359: /* *mulqihi3_1 */ |
| 47424 | case 360: /* *umulqihi3_1 */ |
| 47425 | case 361: /* *smuldi3_highpart_1 */ |
| 47426 | case 362: /* *umuldi3_highpart_1 */ |
| 47427 | case 372: /* *divmodhi4_noext */ |
| 47428 | case 373: /* *divmodsi4_noext */ |
| 47429 | case 374: /* *divmoddi4_noext */ |
| 47430 | case 375: /* divmodhiqi3 */ |
| 47431 | case 383: /* *udivmodhi4_noext */ |
| 47432 | case 384: /* *udivmodsi4_noext */ |
| 47433 | case 385: /* *udivmoddi4_noext */ |
| 47434 | case 386: /* udivmodhiqi3 */ |
| 47435 | case 398: /* *anddi_1 */ |
| 47436 | case 399: /* *andsi_1_zext */ |
| 47437 | case 400: /* *andhi_1 */ |
| 47438 | case 401: /* *andsi_1 */ |
| 47439 | case 402: /* *andqi_1 */ |
| 47440 | case 404: /* *anddi_2 */ |
| 47441 | case 405: /* *andsi_2_zext */ |
| 47442 | case 406: /* *andqi_2_maybe_si */ |
| 47443 | case 407: /* *andqi_2 */ |
| 47444 | case 408: /* *andhi_2 */ |
| 47445 | case 409: /* *andsi_2 */ |
| 47446 | case 411: /* andqi_ext_1 */ |
| 47447 | case 412: /* *andqi_ext_1_cc */ |
| 47448 | case 413: /* *andqi_ext_2 */ |
| 47449 | case 415: /* *andnsi_1 */ |
| 47450 | case 416: /* *andndi_1 */ |
| 47451 | case 417: /* *andnqi_1 */ |
| 47452 | case 418: /* *andnhi_1 */ |
| 47453 | case 419: /* *andn_si_ccno */ |
| 47454 | case 420: /* *andn_di_ccno */ |
| 47455 | case 423: /* *iorhi_1 */ |
| 47456 | case 424: /* *xorhi_1 */ |
| 47457 | case 425: /* *iorsi_1 */ |
| 47458 | case 426: /* *xorsi_1 */ |
| 47459 | case 427: /* *iordi_1 */ |
| 47460 | case 428: /* *xordi_1 */ |
| 47461 | case 429: /* *iorsi_1_zext */ |
| 47462 | case 430: /* *xorsi_1_zext */ |
| 47463 | case 431: /* *iorsi_1_zext_imm */ |
| 47464 | case 432: /* *xorsi_1_zext_imm */ |
| 47465 | case 433: /* *iorqi_1 */ |
| 47466 | case 434: /* *xorqi_1 */ |
| 47467 | case 437: /* *iorqi_2 */ |
| 47468 | case 438: /* *xorqi_2 */ |
| 47469 | case 439: /* *iorhi_2 */ |
| 47470 | case 440: /* *xorhi_2 */ |
| 47471 | case 441: /* *iorsi_2 */ |
| 47472 | case 442: /* *xorsi_2 */ |
| 47473 | case 443: /* *iordi_2 */ |
| 47474 | case 444: /* *xordi_2 */ |
| 47475 | case 445: /* *iorsi_2_zext */ |
| 47476 | case 446: /* *xorsi_2_zext */ |
| 47477 | case 447: /* *iorsi_2_zext_imm */ |
| 47478 | case 448: /* *xorsi_2_zext_imm */ |
| 47479 | case 451: /* *iorqi_3 */ |
| 47480 | case 452: /* *xorqi_3 */ |
| 47481 | case 453: /* *iorhi_3 */ |
| 47482 | case 454: /* *xorhi_3 */ |
| 47483 | case 455: /* *iorsi_3 */ |
| 47484 | case 456: /* *xorsi_3 */ |
| 47485 | case 457: /* *iordi_3 */ |
| 47486 | case 458: /* *xordi_3 */ |
| 47487 | case 459: /* *iorqi_ext_1 */ |
| 47488 | case 460: /* *xorqi_ext_1 */ |
| 47489 | case 461: /* *iorqi_ext_2 */ |
| 47490 | case 462: /* *xorqi_ext_2 */ |
| 47491 | case 463: /* *xorqi_ext_1_cc */ |
| 47492 | case 515: /* x86_64_shld */ |
| 47493 | case 516: /* x86_shld */ |
| 47494 | case 519: /* *bmi2_ashlsi3_1 */ |
| 47495 | case 520: /* *bmi2_ashldi3_1 */ |
| 47496 | case 521: /* *ashlsi3_1 */ |
| 47497 | case 522: /* *ashldi3_1 */ |
| 47498 | case 523: /* *bmi2_ashlsi3_1_zext */ |
| 47499 | case 524: /* *ashlsi3_1_zext */ |
| 47500 | case 525: /* *ashlhi3_1 */ |
| 47501 | case 526: /* *ashlqi3_1 */ |
| 47502 | case 527: /* *ashlqi3_1_slp */ |
| 47503 | case 528: /* *ashlqi3_cmp */ |
| 47504 | case 529: /* *ashlhi3_cmp */ |
| 47505 | case 530: /* *ashlsi3_cmp */ |
| 47506 | case 531: /* *ashldi3_cmp */ |
| 47507 | case 532: /* *ashlsi3_cmp_zext */ |
| 47508 | case 533: /* *ashlqi3_cconly */ |
| 47509 | case 534: /* *ashlhi3_cconly */ |
| 47510 | case 535: /* *ashlsi3_cconly */ |
| 47511 | case 536: /* *ashldi3_cconly */ |
| 47512 | case 545: /* x86_64_shrd */ |
| 47513 | case 546: /* x86_shrd */ |
| 47514 | case 547: /* ashrdi3_cvt */ |
| 47515 | case 548: /* *ashrsi3_cvt_zext */ |
| 47516 | case 549: /* ashrsi3_cvt */ |
| 47517 | case 550: /* *bmi2_lshrsi3_1 */ |
| 47518 | case 551: /* *bmi2_ashrsi3_1 */ |
| 47519 | case 552: /* *bmi2_lshrdi3_1 */ |
| 47520 | case 553: /* *bmi2_ashrdi3_1 */ |
| 47521 | case 554: /* *lshrsi3_1 */ |
| 47522 | case 555: /* *ashrsi3_1 */ |
| 47523 | case 556: /* *lshrdi3_1 */ |
| 47524 | case 557: /* *ashrdi3_1 */ |
| 47525 | case 558: /* *bmi2_lshrsi3_1_zext */ |
| 47526 | case 559: /* *bmi2_ashrsi3_1_zext */ |
| 47527 | case 560: /* *lshrsi3_1_zext */ |
| 47528 | case 561: /* *ashrsi3_1_zext */ |
| 47529 | case 562: /* *lshrqi3_1 */ |
| 47530 | case 563: /* *ashrqi3_1 */ |
| 47531 | case 564: /* *lshrhi3_1 */ |
| 47532 | case 565: /* *ashrhi3_1 */ |
| 47533 | case 568: /* *lshrqi3_cmp */ |
| 47534 | case 569: /* *ashrqi3_cmp */ |
| 47535 | case 570: /* *lshrhi3_cmp */ |
| 47536 | case 571: /* *ashrhi3_cmp */ |
| 47537 | case 572: /* *lshrsi3_cmp */ |
| 47538 | case 573: /* *ashrsi3_cmp */ |
| 47539 | case 574: /* *lshrdi3_cmp */ |
| 47540 | case 575: /* *ashrdi3_cmp */ |
| 47541 | case 576: /* *lshrsi3_cmp_zext */ |
| 47542 | case 577: /* *ashrsi3_cmp_zext */ |
| 47543 | case 578: /* *lshrqi3_cconly */ |
| 47544 | case 579: /* *ashrqi3_cconly */ |
| 47545 | case 580: /* *lshrhi3_cconly */ |
| 47546 | case 581: /* *ashrhi3_cconly */ |
| 47547 | case 582: /* *lshrsi3_cconly */ |
| 47548 | case 583: /* *ashrsi3_cconly */ |
| 47549 | case 584: /* *lshrdi3_cconly */ |
| 47550 | case 585: /* *ashrdi3_cconly */ |
| 47551 | case 594: /* *bmi2_rorxsi3_1 */ |
| 47552 | case 595: /* *bmi2_rorxdi3_1 */ |
| 47553 | case 596: /* *rotlsi3_1 */ |
| 47554 | case 597: /* *rotrsi3_1 */ |
| 47555 | case 598: /* *rotldi3_1 */ |
| 47556 | case 599: /* *rotrdi3_1 */ |
| 47557 | case 600: /* *bmi2_rorxsi3_1_zext */ |
| 47558 | case 601: /* *rotlsi3_1_zext */ |
| 47559 | case 602: /* *rotrsi3_1_zext */ |
| 47560 | case 603: /* *rotlqi3_1 */ |
| 47561 | case 604: /* *rotrqi3_1 */ |
| 47562 | case 605: /* *rotlhi3_1 */ |
| 47563 | case 606: /* *rotrhi3_1 */ |
| 47564 | case 701: /* set_got_offset_rex64 */ |
| 47565 | case 720: /* clzsi2_lzcnt */ |
| 47566 | case 721: /* clzdi2_lzcnt */ |
| 47567 | case 722: /* *clzsi2_lzcnt_falsedep */ |
| 47568 | case 723: /* *clzdi2_lzcnt_falsedep */ |
| 47569 | case 725: /* lzcnt_si */ |
| 47570 | case 727: /* lzcnt_di */ |
| 47571 | case 729: /* *lzcnt_si_falsedep */ |
| 47572 | case 731: /* *lzcnt_di_falsedep */ |
| 47573 | case 733: /* lzcnt_hi */ |
| 47574 | case 734: /* bmi_bextr_si */ |
| 47575 | case 735: /* bmi_bextr_di */ |
| 47576 | case 736: /* *bmi_bextr_si_ccz */ |
| 47577 | case 737: /* *bmi_bextr_di_ccz */ |
| 47578 | case 738: /* *bmi_blsi_si */ |
| 47579 | case 739: /* *bmi_blsi_di */ |
| 47580 | case 740: /* *bmi_blsmsk_si */ |
| 47581 | case 741: /* *bmi_blsmsk_di */ |
| 47582 | case 742: /* *bmi_blsr_si */ |
| 47583 | case 743: /* *bmi_blsr_di */ |
| 47584 | case 744: /* *bmi2_bzhi_si3 */ |
| 47585 | case 745: /* *bmi2_bzhi_di3 */ |
| 47586 | case 746: /* *bmi2_bzhi_si3_1 */ |
| 47587 | case 747: /* *bmi2_bzhi_di3_1 */ |
| 47588 | case 748: /* *bmi2_bzhi_si3_1_ccz */ |
| 47589 | case 749: /* *bmi2_bzhi_di3_1_ccz */ |
| 47590 | case 750: /* bmi2_pdep_si3 */ |
| 47591 | case 751: /* bmi2_pdep_di3 */ |
| 47592 | case 752: /* bmi2_pext_si3 */ |
| 47593 | case 753: /* bmi2_pext_di3 */ |
| 47594 | case 754: /* tbm_bextri_si */ |
| 47595 | case 755: /* tbm_bextri_di */ |
| 47596 | case 756: /* *tbm_blcfill_si */ |
| 47597 | case 757: /* *tbm_blcfill_di */ |
| 47598 | case 758: /* *tbm_blci_si */ |
| 47599 | case 759: /* *tbm_blci_di */ |
| 47600 | case 760: /* *tbm_blcic_si */ |
| 47601 | case 761: /* *tbm_blcic_di */ |
| 47602 | case 762: /* *tbm_blcmsk_si */ |
| 47603 | case 763: /* *tbm_blcmsk_di */ |
| 47604 | case 764: /* *tbm_blcs_si */ |
| 47605 | case 765: /* *tbm_blcs_di */ |
| 47606 | case 766: /* *tbm_blsfill_si */ |
| 47607 | case 767: /* *tbm_blsfill_di */ |
| 47608 | case 768: /* *tbm_blsic_si */ |
| 47609 | case 769: /* *tbm_blsic_di */ |
| 47610 | case 770: /* *tbm_t1mskc_si */ |
| 47611 | case 771: /* *tbm_t1mskc_di */ |
| 47612 | case 772: /* *tbm_tzmsk_si */ |
| 47613 | case 773: /* *tbm_tzmsk_di */ |
| 47614 | case 774: /* popcountsi2 */ |
| 47615 | case 775: /* popcountdi2 */ |
| 47616 | case 776: /* *popcountsi2_falsedep */ |
| 47617 | case 777: /* *popcountdi2_falsedep */ |
| 47618 | case 779: /* popcounthi2 */ |
| 47619 | case 780: /* *bswapsi2_movbe */ |
| 47620 | case 781: /* *bswapdi2_movbe */ |
| 47621 | case 782: /* *bswapsi2 */ |
| 47622 | case 783: /* *bswapdi2 */ |
| 47623 | case 812: /* *fop_sf_comm */ |
| 47624 | case 813: /* *fop_df_comm */ |
| 47625 | case 815: /* *fop_sf_1 */ |
| 47626 | case 816: /* *fop_df_1 */ |
| 47627 | case 817: /* *fop_sf_2_i387 */ |
| 47628 | case 818: /* *fop_df_2_i387 */ |
| 47629 | case 819: /* *fop_sf_2_i387 */ |
| 47630 | case 820: /* *fop_df_2_i387 */ |
| 47631 | case 821: /* *fop_sf_3_i387 */ |
| 47632 | case 822: /* *fop_df_3_i387 */ |
| 47633 | case 823: /* *fop_sf_3_i387 */ |
| 47634 | case 824: /* *fop_df_3_i387 */ |
| 47635 | case 825: /* *fop_df_4_i387 */ |
| 47636 | case 826: /* *fop_df_5_i387 */ |
| 47637 | case 827: /* *fop_df_6_i387 */ |
| 47638 | case 828: /* *fop_xf_comm_i387 */ |
| 47639 | case 829: /* *fop_xf_1_i387 */ |
| 47640 | case 830: /* *fop_xf_2_i387 */ |
| 47641 | case 831: /* *fop_xf_2_i387 */ |
| 47642 | case 832: /* *fop_xf_3_i387 */ |
| 47643 | case 833: /* *fop_xf_3_i387 */ |
| 47644 | case 834: /* *fop_xf_4_i387 */ |
| 47645 | case 835: /* *fop_xf_4_i387 */ |
| 47646 | case 836: /* *fop_xf_5_i387 */ |
| 47647 | case 837: /* *fop_xf_5_i387 */ |
| 47648 | case 838: /* *fop_xf_6_i387 */ |
| 47649 | case 839: /* *fop_xf_6_i387 */ |
| 47650 | case 975: /* *movhicc_noc */ |
| 47651 | case 976: /* *movsicc_noc */ |
| 47652 | case 977: /* *movdicc_noc */ |
| 47653 | case 978: /* *movsicc_noc_zext */ |
| 47654 | case 979: /* *movqicc_noc */ |
| 47655 | case 981: /* *movdfcc_1 */ |
| 47656 | case 982: /* *movsfcc_1_387 */ |
| 47657 | case 993: /* pro_epilogue_adjust_stack_si_add */ |
| 47658 | case 994: /* pro_epilogue_adjust_stack_di_add */ |
| 47659 | case 995: /* pro_epilogue_adjust_stack_si_sub */ |
| 47660 | case 996: /* pro_epilogue_adjust_stack_di_sub */ |
| 47661 | case 1089: /* *movbnd32_internal_mpx */ |
| 47662 | case 1090: /* *movbnd64_internal_mpx */ |
| 47663 | case 1101: /* move_size_reloc_si */ |
| 47664 | case 1102: /* move_size_reloc_di */ |
| 47665 | case 1106: /* *movv8qi_internal */ |
| 47666 | case 1107: /* *movv4hi_internal */ |
| 47667 | case 1108: /* *movv2si_internal */ |
| 47668 | case 1109: /* *movv1di_internal */ |
| 47669 | case 1110: /* *movv2sf_internal */ |
| 47670 | case 1138: /* *vec_extractv2sf_1 */ |
| 47671 | case 1208: /* *vec_extractv2si_1 */ |
| 47672 | case 1218: /* movv64qi_internal */ |
| 47673 | case 1219: /* movv32qi_internal */ |
| 47674 | case 1220: /* movv16qi_internal */ |
| 47675 | case 1221: /* movv32hi_internal */ |
| 47676 | case 1222: /* movv16hi_internal */ |
| 47677 | case 1223: /* movv8hi_internal */ |
| 47678 | case 1224: /* movv16si_internal */ |
| 47679 | case 1225: /* movv8si_internal */ |
| 47680 | case 1226: /* movv4si_internal */ |
| 47681 | case 1227: /* movv8di_internal */ |
| 47682 | case 1228: /* movv4di_internal */ |
| 47683 | case 1229: /* movv2di_internal */ |
| 47684 | case 1230: /* movv4ti_internal */ |
| 47685 | case 1231: /* movv2ti_internal */ |
| 47686 | case 1232: /* movv1ti_internal */ |
| 47687 | case 1233: /* movv16sf_internal */ |
| 47688 | case 1234: /* movv8sf_internal */ |
| 47689 | case 1235: /* movv4sf_internal */ |
| 47690 | case 1236: /* movv8df_internal */ |
| 47691 | case 1237: /* movv4df_internal */ |
| 47692 | case 1238: /* movv2df_internal */ |
| 47693 | case 1308: /* kandqi */ |
| 47694 | case 1309: /* kiorqi */ |
| 47695 | case 1310: /* kxorqi */ |
| 47696 | case 1311: /* kandhi */ |
| 47697 | case 1312: /* kiorhi */ |
| 47698 | case 1313: /* kxorhi */ |
| 47699 | case 1314: /* kandsi */ |
| 47700 | case 1315: /* kiorsi */ |
| 47701 | case 1316: /* kxorsi */ |
| 47702 | case 1317: /* kanddi */ |
| 47703 | case 1318: /* kiordi */ |
| 47704 | case 1319: /* kxordi */ |
| 47705 | case 1320: /* kandnqi */ |
| 47706 | case 1321: /* kandnhi */ |
| 47707 | case 1322: /* kandnsi */ |
| 47708 | case 1323: /* kandndi */ |
| 47709 | case 1324: /* kxnorqi */ |
| 47710 | case 1325: /* kxnorhi */ |
| 47711 | case 1326: /* kxnorsi */ |
| 47712 | case 1327: /* kxnordi */ |
| 47713 | case 1328: /* knotqi */ |
| 47714 | case 1329: /* knothi */ |
| 47715 | case 1330: /* knotsi */ |
| 47716 | case 1331: /* knotdi */ |
| 47717 | case 1332: /* kaddqi */ |
| 47718 | case 1333: /* kaddhi */ |
| 47719 | case 1334: /* kaddsi */ |
| 47720 | case 1335: /* kadddi */ |
| 47721 | case 1336: /* kashiftqi */ |
| 47722 | case 1337: /* klshiftrtqi */ |
| 47723 | case 1338: /* kashifthi */ |
| 47724 | case 1339: /* klshiftrthi */ |
| 47725 | case 1340: /* kashiftsi */ |
| 47726 | case 1341: /* klshiftrtsi */ |
| 47727 | case 1342: /* kashiftdi */ |
| 47728 | case 1343: /* klshiftrtdi */ |
| 47729 | case 1344: /* ktestqi */ |
| 47730 | case 1345: /* ktesthi */ |
| 47731 | case 1346: /* ktestsi */ |
| 47732 | case 1347: /* ktestdi */ |
| 47733 | case 1348: /* kortestqi */ |
| 47734 | case 1349: /* kortesthi */ |
| 47735 | case 1350: /* kortestsi */ |
| 47736 | case 1351: /* kortestdi */ |
| 47737 | case 1352: /* kunpckhi */ |
| 47738 | case 2418: /* sse_movhlps */ |
| 47739 | case 2419: /* sse_movlhps */ |
| 47740 | case 2449: /* sse_storehps */ |
| 47741 | case 2450: /* sse_loadhps */ |
| 47742 | case 2451: /* sse_storelps */ |
| 47743 | case 2452: /* sse_loadlps */ |
| 47744 | case 2459: /* *vec_concatv2sf_sse4_1 */ |
| 47745 | case 2460: /* *vec_concatv2sf_sse */ |
| 47746 | case 2461: /* *vec_concatv4sf */ |
| 47747 | case 2462: /* vec_setv4si_0 */ |
| 47748 | case 2463: /* vec_setv4sf_0 */ |
| 47749 | case 2467: /* *sse4_1_extractps */ |
| 47750 | case 2536: /* *vec_interleave_highv2df */ |
| 47751 | case 2542: /* *vec_interleave_lowv2df */ |
| 47752 | case 2726: /* sse2_storehpd */ |
| 47753 | case 2727: /* *vec_extractv2df_1_sse */ |
| 47754 | case 2728: /* sse2_storelpd */ |
| 47755 | case 2729: /* *vec_extractv2df_0_sse */ |
| 47756 | case 2730: /* sse2_loadhpd */ |
| 47757 | case 2731: /* sse2_loadlpd */ |
| 47758 | case 2732: /* sse2_movsd */ |
| 47759 | case 2735: /* vec_concatv2df */ |
| 47760 | case 3620: /* sse2_loadld */ |
| 47761 | case 3638: /* *vec_extractv2di_1 */ |
| 47762 | case 3639: /* *vec_concatv2si_sse4_1 */ |
| 47763 | case 3640: /* *vec_concatv2si */ |
| 47764 | case 3641: /* *vec_concatv4si */ |
| 47765 | case 3642: /* vec_concatv2di */ |
| 47766 | case 4195: /* vec_dupv4sf */ |
| 47767 | case 4196: /* *vec_dupv4si */ |
| 47768 | case 4197: /* *vec_dupv2di */ |
| 47769 | case 4212: /* avx_vbroadcastf128_v32qi */ |
| 47770 | case 4213: /* avx_vbroadcastf128_v16hi */ |
| 47771 | case 4214: /* avx_vbroadcastf128_v8si */ |
| 47772 | case 4215: /* avx_vbroadcastf128_v4di */ |
| 47773 | case 4216: /* avx_vbroadcastf128_v8sf */ |
| 47774 | case 4217: /* avx_vbroadcastf128_v4df */ |
| 47775 | case 4250: /* *avx_vperm_broadcast_v4sf */ |
| 47776 | case 4490: /* avx_vec_concatv32qi */ |
| 47777 | case 4491: /* avx_vec_concatv16hi */ |
| 47778 | case 4492: /* avx_vec_concatv8si */ |
| 47779 | case 4493: /* avx_vec_concatv4di */ |
| 47780 | case 4494: /* avx_vec_concatv8sf */ |
| 47781 | case 4495: /* avx_vec_concatv4df */ |
| 47782 | case 4496: /* avx_vec_concatv64qi */ |
| 47783 | case 4497: /* avx_vec_concatv32hi */ |
| 47784 | case 4498: /* avx_vec_concatv16si */ |
| 47785 | case 4499: /* avx_vec_concatv8di */ |
| 47786 | case 4500: /* avx_vec_concatv16sf */ |
| 47787 | case 4501: /* avx_vec_concatv8df */ |
| 47788 | if ((cached_type = get_attr_type (insn)) == TYPE_IBR) |
| 47789 | { |
| 47790 | return 0; |
| 47791 | } |
| 47792 | else if ((cached_type == TYPE_CALL) || (cached_type == TYPE_CALLV)) |
| 47793 | { |
| 47794 | return 0; |
| 47795 | } |
| 47796 | else if (cached_type == TYPE_PUSH) |
| 47797 | { |
| 47798 | return 2; |
| 47799 | } |
| 47800 | else if (cached_type == TYPE_POP) |
| 47801 | { |
| 47802 | return 3; |
| 47803 | } |
| 47804 | else if (cached_type == TYPE_LEAVE) |
| 47805 | { |
| 47806 | return 3; |
| 47807 | } |
| 47808 | else if (cached_type == TYPE_LEA) |
| 47809 | { |
| 47810 | return 1; |
| 47811 | } |
| 47812 | else if ((cached_type == TYPE_IMUL) && ((cached_mode = get_attr_mode (insn)) == MODE_DI) && (((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) || (cached_memory == MEMORY_UNKNOWN))) |
| 47813 | { |
| 47814 | return 4; |
| 47815 | } |
| 47816 | else if ((cached_type == TYPE_IMUL) && (((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) || (cached_memory == MEMORY_UNKNOWN))) |
| 47817 | { |
| 47818 | return 3; |
| 47819 | } |
| 47820 | else if ((cached_type == TYPE_IMUL) && ((cached_mode = get_attr_mode (insn)) == MODE_HI) && (((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) || (cached_memory == MEMORY_UNKNOWN))) |
| 47821 | { |
| 47822 | return 4; |
| 47823 | } |
| 47824 | else if ((cached_type == TYPE_IMUL) && ((cached_mode = get_attr_mode (insn)) == MODE_DI) && (((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) || (cached_memory == MEMORY_BOTH))) |
| 47825 | { |
| 47826 | return 7; |
| 47827 | } |
| 47828 | else if ((cached_type == TYPE_IMUL) && (((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) || (cached_memory == MEMORY_BOTH))) |
| 47829 | { |
| 47830 | return 6; |
| 47831 | } |
| 47832 | else if ((cached_type == TYPE_IDIV) && (((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) || (cached_memory == MEMORY_UNKNOWN))) |
| 47833 | { |
| 47834 | return 6; |
| 47835 | } |
| 47836 | else if ((cached_type == TYPE_IDIV) && (((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) || (cached_memory == MEMORY_BOTH))) |
| 47837 | { |
| 47838 | return 9; |
| 47839 | } |
| 47840 | else if ((cached_type == TYPE_STR) && (((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) || (cached_memory == MEMORY_BOTH) || (cached_memory == MEMORY_STORE))) |
| 47841 | { |
| 47842 | return 6; |
| 47843 | } |
| 47844 | else if (((cached_amdfam10_decode = get_attr_amdfam10_decode (insn)) == AMDFAM10_DECODE_DIRECT) && (((cached_unit = get_attr_unit (insn)) == UNIT_INTEGER) || (cached_unit == UNIT_UNKNOWN)) && (((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) || (cached_memory == MEMORY_UNKNOWN))) |
| 47845 | { |
| 47846 | return 1; |
| 47847 | } |
| 47848 | else if ((cached_amdfam10_decode == AMDFAM10_DECODE_VECTOR) && (((cached_unit = get_attr_unit (insn)) == UNIT_INTEGER) || (cached_unit == UNIT_UNKNOWN)) && (((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) || (cached_memory == MEMORY_UNKNOWN))) |
| 47849 | { |
| 47850 | return 2; |
| 47851 | } |
| 47852 | else if ((cached_type == TYPE_IMOV) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 47853 | { |
| 47854 | return 3; |
| 47855 | } |
| 47856 | else if ((cached_amdfam10_decode == AMDFAM10_DECODE_DIRECT) && (((cached_unit = get_attr_unit (insn)) == UNIT_INTEGER) || (cached_unit == UNIT_UNKNOWN)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 47857 | { |
| 47858 | return 4; |
| 47859 | } |
| 47860 | else if ((cached_amdfam10_decode == AMDFAM10_DECODE_VECTOR) && (((cached_unit = get_attr_unit (insn)) == UNIT_INTEGER) || (cached_unit == UNIT_UNKNOWN)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 47861 | { |
| 47862 | return 6; |
| 47863 | } |
| 47864 | else if ((cached_type == TYPE_IMOV) && ((cached_memory = get_attr_memory (insn)) == MEMORY_STORE)) |
| 47865 | { |
| 47866 | return 1; |
| 47867 | } |
| 47868 | else if ((cached_amdfam10_decode == AMDFAM10_DECODE_DIRECT) && (((cached_unit = get_attr_unit (insn)) == UNIT_INTEGER) || (cached_unit == UNIT_UNKNOWN)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_BOTH)) |
| 47869 | { |
| 47870 | return 4; |
| 47871 | } |
| 47872 | else if ((cached_amdfam10_decode == AMDFAM10_DECODE_VECTOR) && (((cached_unit = get_attr_unit (insn)) == UNIT_INTEGER) || (cached_unit == UNIT_UNKNOWN)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_BOTH)) |
| 47873 | { |
| 47874 | return 6; |
| 47875 | } |
| 47876 | else if ((cached_amdfam10_decode == AMDFAM10_DECODE_DIRECT) && (((cached_unit = get_attr_unit (insn)) == UNIT_INTEGER) || (cached_unit == UNIT_UNKNOWN)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_STORE)) |
| 47877 | { |
| 47878 | return 1; |
| 47879 | } |
| 47880 | else if ((cached_amdfam10_decode == AMDFAM10_DECODE_VECTOR) && (((cached_unit = get_attr_unit (insn)) == UNIT_INTEGER) || (cached_unit == UNIT_UNKNOWN)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_STORE)) |
| 47881 | { |
| 47882 | return 2; |
| 47883 | } |
| 47884 | else if ((cached_type == TYPE_FMOV) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) && ((cached_mode = get_attr_mode (insn)) == MODE_XF)) |
| 47885 | { |
| 47886 | return 13 /* 0xd */; |
| 47887 | } |
| 47888 | else if ((cached_type == TYPE_FMOV) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 47889 | { |
| 47890 | return 2; |
| 47891 | } |
| 47892 | else if ((cached_type == TYPE_FMOV) && (((cached_memory = get_attr_memory (insn)) == MEMORY_STORE) || (cached_memory == MEMORY_BOTH)) && ((cached_mode = get_attr_mode (insn)) == MODE_XF)) |
| 47893 | { |
| 47894 | return 8; |
| 47895 | } |
| 47896 | else if ((cached_type == TYPE_FMOV) && (((cached_memory = get_attr_memory (insn)) == MEMORY_STORE) || (cached_memory == MEMORY_BOTH))) |
| 47897 | { |
| 47898 | return 2; |
| 47899 | } |
| 47900 | else if ((cached_type == TYPE_FISTP) || (cached_type == TYPE_FISTTP)) |
| 47901 | { |
| 47902 | return 4; |
| 47903 | } |
| 47904 | else if (cached_type == TYPE_FMOV) |
| 47905 | { |
| 47906 | return 2; |
| 47907 | } |
| 47908 | else if ((cached_type == TYPE_FOP) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 47909 | { |
| 47910 | return 6; |
| 47911 | } |
| 47912 | else if (cached_type == TYPE_FOP) |
| 47913 | { |
| 47914 | return 4; |
| 47915 | } |
| 47916 | else if ((cached_type == TYPE_FMUL) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 47917 | { |
| 47918 | return 6; |
| 47919 | } |
| 47920 | else if (cached_type == TYPE_FMUL) |
| 47921 | { |
| 47922 | return 4; |
| 47923 | } |
| 47924 | else if (cached_type == TYPE_FSGN) |
| 47925 | { |
| 47926 | return 2; |
| 47927 | } |
| 47928 | else if ((cached_type == TYPE_FDIV) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 47929 | { |
| 47930 | return 13 /* 0xd */; |
| 47931 | } |
| 47932 | else if (cached_type == TYPE_FDIV) |
| 47933 | { |
| 47934 | return 11 /* 0xb */; |
| 47935 | } |
| 47936 | else if ((cached_type == TYPE_FPSPC) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 47937 | { |
| 47938 | return 103 /* 0x67 */; |
| 47939 | } |
| 47940 | else if (cached_type == TYPE_FPSPC) |
| 47941 | { |
| 47942 | return 100 /* 0x64 */; |
| 47943 | } |
| 47944 | else if ((cached_type == TYPE_FCMOV) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 47945 | { |
| 47946 | return 17 /* 0x11 */; |
| 47947 | } |
| 47948 | else if (cached_type == TYPE_FCMOV) |
| 47949 | { |
| 47950 | return 15 /* 0xf */; |
| 47951 | } |
| 47952 | else if ((cached_type == TYPE_FCMP) && ((cached_athlon_decode = get_attr_athlon_decode (insn)) == ATHLON_DECODE_VECTOR) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 47953 | { |
| 47954 | return 5; |
| 47955 | } |
| 47956 | else if (((cached_athlon_decode = get_attr_athlon_decode (insn)) == ATHLON_DECODE_VECTOR) && (cached_type == TYPE_FCMP)) |
| 47957 | { |
| 47958 | return 3; |
| 47959 | } |
| 47960 | else if ((cached_type == TYPE_FCMP) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 47961 | { |
| 47962 | return 4; |
| 47963 | } |
| 47964 | else if (cached_type == TYPE_FCMP) |
| 47965 | { |
| 47966 | return 2; |
| 47967 | } |
| 47968 | else if ((cached_type == TYPE_SSEMOV) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 47969 | { |
| 47970 | return 2; |
| 47971 | } |
| 47972 | else if ((cached_type == TYPE_MMXMOV) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 47973 | { |
| 47974 | return 4; |
| 47975 | } |
| 47976 | else if ((cached_type == TYPE_SSEMOV) && (((cached_mode = get_attr_mode (insn)) == MODE_V4SF) || (cached_mode == MODE_V2DF) || (cached_mode == MODE_TI)) && (((cached_memory = get_attr_memory (insn)) == MEMORY_STORE) || (cached_memory == MEMORY_BOTH))) |
| 47977 | { |
| 47978 | return 2; |
| 47979 | } |
| 47980 | else if (((cached_type == TYPE_MMXMOV) || (cached_type == TYPE_SSEMOV)) && (((cached_memory = get_attr_memory (insn)) == MEMORY_STORE) || (cached_memory == MEMORY_BOTH))) |
| 47981 | { |
| 47982 | return 2; |
| 47983 | } |
| 47984 | else if (((cached_type == TYPE_SSELOG) || (cached_type == TYPE_SSELOG1) || (cached_type == TYPE_SSESHUF) || (cached_type == TYPE_SSESHUF1)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 47985 | { |
| 47986 | return 4; |
| 47987 | } |
| 47988 | else if ((cached_type == TYPE_SSELOG) || (cached_type == TYPE_SSELOG1) || (cached_type == TYPE_SSESHUF) || (cached_type == TYPE_SSESHUF1)) |
| 47989 | { |
| 47990 | return 2; |
| 47991 | } |
| 47992 | else if ((cached_type == TYPE_SSECMP) && (((cached_mode = get_attr_mode (insn)) == MODE_SF) || (cached_mode == MODE_DF) || (cached_mode == MODE_DI) || (cached_mode == MODE_TI)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 47993 | { |
| 47994 | return 4; |
| 47995 | } |
| 47996 | else if ((cached_type == TYPE_SSECMP) && (((cached_mode = get_attr_mode (insn)) == MODE_SF) || (cached_mode == MODE_DF) || (cached_mode == MODE_DI) || (cached_mode == MODE_TI))) |
| 47997 | { |
| 47998 | return 2; |
| 47999 | } |
| 48000 | else if ((cached_type == TYPE_SSECMP) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 48001 | { |
| 48002 | return 4; |
| 48003 | } |
| 48004 | else if (cached_type == TYPE_SSECMP) |
| 48005 | { |
| 48006 | return 2; |
| 48007 | } |
| 48008 | else if ((cached_type == TYPE_SSECOMI) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 48009 | { |
| 48010 | return 5; |
| 48011 | } |
| 48012 | else if (cached_type == TYPE_SSECOMI) |
| 48013 | { |
| 48014 | return 3; |
| 48015 | } |
| 48016 | else if (((cached_type == TYPE_SSEADD) || (cached_type == TYPE_SSEADD1)) && (((cached_mode = get_attr_mode (insn)) == MODE_SF) || (cached_mode == MODE_DF) || (cached_mode == MODE_DI)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 48017 | { |
| 48018 | return 6; |
| 48019 | } |
| 48020 | else if (((cached_type == TYPE_SSEADD) || (cached_type == TYPE_SSEADD1)) && (((cached_mode = get_attr_mode (insn)) == MODE_SF) || (cached_mode == MODE_DF) || (cached_mode == MODE_DI))) |
| 48021 | { |
| 48022 | return 4; |
| 48023 | } |
| 48024 | else if (((cached_type == TYPE_SSEADD) || (cached_type == TYPE_SSEADD1)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 48025 | { |
| 48026 | return 6; |
| 48027 | } |
| 48028 | else if ((cached_type == TYPE_SSEADD) || (cached_type == TYPE_SSEADD1)) |
| 48029 | { |
| 48030 | return 4; |
| 48031 | } |
| 48032 | else if ((cached_type == TYPE_SSECVT) && (cached_amdfam10_decode == AMDFAM10_DECODE_DOUBLE) && ((cached_mode = get_attr_mode (insn)) == MODE_DF) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 48033 | { |
| 48034 | return 7; |
| 48035 | } |
| 48036 | else if ((cached_type == TYPE_SSECVT) && (cached_amdfam10_decode == AMDFAM10_DECODE_VECTOR) && ((cached_mode = get_attr_mode (insn)) == MODE_DF)) |
| 48037 | { |
| 48038 | return 7; |
| 48039 | } |
| 48040 | else if ((cached_type == TYPE_SSECVT) && (cached_amdfam10_decode == AMDFAM10_DECODE_DIRECT) && (((cached_mode = get_attr_mode (insn)) == MODE_V2DF) || (cached_mode == MODE_V4SF) || (cached_mode == MODE_TI)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 48041 | { |
| 48042 | return 4; |
| 48043 | } |
| 48044 | else if ((cached_type == TYPE_SSECVT) && (cached_amdfam10_decode == AMDFAM10_DECODE_DIRECT) && (((cached_mode = get_attr_mode (insn)) == MODE_V2DF) || (cached_mode == MODE_V4SF) || (cached_mode == MODE_TI))) |
| 48045 | { |
| 48046 | return 2; |
| 48047 | } |
| 48048 | else if ((cached_type == TYPE_SSEICVT) && (cached_amdfam10_decode == AMDFAM10_DECODE_DOUBLE) && (((cached_mode = get_attr_mode (insn)) == MODE_SF) || (cached_mode == MODE_DF)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 48049 | { |
| 48050 | return 9; |
| 48051 | } |
| 48052 | else if ((cached_type == TYPE_SSEICVT) && (cached_amdfam10_decode == AMDFAM10_DECODE_DOUBLE) && (((cached_mode = get_attr_mode (insn)) == MODE_SF) || (cached_mode == MODE_DF)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 48053 | { |
| 48054 | return 9; |
| 48055 | } |
| 48056 | else if ((cached_type == TYPE_SSEICVT) && (cached_amdfam10_decode == AMDFAM10_DECODE_VECTOR) && (((cached_mode = get_attr_mode (insn)) == MODE_SF) || (cached_mode == MODE_DF)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 48057 | { |
| 48058 | return 14 /* 0xe */; |
| 48059 | } |
| 48060 | else if ((cached_type == TYPE_SSEICVT) && (cached_amdfam10_decode == AMDFAM10_DECODE_VECTOR) && (((cached_mode = get_attr_mode (insn)) == MODE_SF) || (cached_mode == MODE_DF)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 48061 | { |
| 48062 | return 14 /* 0xe */; |
| 48063 | } |
| 48064 | else if ((cached_type == TYPE_SSECVT) && (cached_amdfam10_decode == AMDFAM10_DECODE_DOUBLE) && ((cached_mode = get_attr_mode (insn)) == MODE_SF) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 48065 | { |
| 48066 | return 9; |
| 48067 | } |
| 48068 | else if ((cached_type == TYPE_SSECVT) && (cached_amdfam10_decode == AMDFAM10_DECODE_VECTOR) && ((cached_mode = get_attr_mode (insn)) == MODE_SF) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 48069 | { |
| 48070 | return 8; |
| 48071 | } |
| 48072 | else if ((cached_type == TYPE_SSECVT) && (cached_amdfam10_decode == AMDFAM10_DECODE_DOUBLE) && (((cached_mode = get_attr_mode (insn)) == MODE_V4SF) || (cached_mode == MODE_V2DF) || (cached_mode == MODE_TI)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 48073 | { |
| 48074 | return 9; |
| 48075 | } |
| 48076 | else if ((cached_type == TYPE_SSECVT) && (cached_amdfam10_decode == AMDFAM10_DECODE_DOUBLE) && (((cached_mode = get_attr_mode (insn)) == MODE_V4SF) || (cached_mode == MODE_V2DF) || (cached_mode == MODE_TI)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 48077 | { |
| 48078 | return 7; |
| 48079 | } |
| 48080 | else if ((cached_type == TYPE_SSEICVT) && (cached_amdfam10_decode == AMDFAM10_DECODE_DOUBLE) && (((cached_mode = get_attr_mode (insn)) == MODE_SI) || (cached_mode == MODE_DI)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 48081 | { |
| 48082 | return 10 /* 0xa */; |
| 48083 | } |
| 48084 | else if ((cached_type == TYPE_SSEICVT) && (cached_amdfam10_decode == AMDFAM10_DECODE_DOUBLE) && (((cached_mode = get_attr_mode (insn)) == MODE_SI) || (cached_mode == MODE_DI)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 48085 | { |
| 48086 | return 8; |
| 48087 | } |
| 48088 | else if ((cached_type == TYPE_SSEICVT) && (cached_amdfam10_decode == AMDFAM10_DECODE_DOUBLE) && ((cached_mode = get_attr_mode (insn)) == MODE_TI) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 48089 | { |
| 48090 | return 9; |
| 48091 | } |
| 48092 | else if ((cached_type == TYPE_SSEICVT) && (cached_amdfam10_decode == AMDFAM10_DECODE_DOUBLE) && ((cached_mode = get_attr_mode (insn)) == MODE_TI) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 48093 | { |
| 48094 | return 7; |
| 48095 | } |
| 48096 | else if ((cached_type == TYPE_SSEMUL) && (((cached_mode = get_attr_mode (insn)) == MODE_SF) || (cached_mode == MODE_DF)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 48097 | { |
| 48098 | return 6; |
| 48099 | } |
| 48100 | else if ((cached_type == TYPE_SSEMUL) && (((cached_mode = get_attr_mode (insn)) == MODE_SF) || (cached_mode == MODE_DF))) |
| 48101 | { |
| 48102 | return 4; |
| 48103 | } |
| 48104 | else if ((cached_type == TYPE_SSEMUL) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 48105 | { |
| 48106 | return 6; |
| 48107 | } |
| 48108 | else if (cached_type == TYPE_SSEMUL) |
| 48109 | { |
| 48110 | return 4; |
| 48111 | } |
| 48112 | else if ((cached_type == TYPE_SSEDIV) && (((cached_mode = get_attr_mode (insn)) == MODE_SF) || (cached_mode == MODE_DF)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 48113 | { |
| 48114 | return 22 /* 0x16 */; |
| 48115 | } |
| 48116 | else if ((cached_type == TYPE_SSEDIV) && (((cached_mode = get_attr_mode (insn)) == MODE_SF) || (cached_mode == MODE_DF))) |
| 48117 | { |
| 48118 | return 20 /* 0x14 */; |
| 48119 | } |
| 48120 | else if ((cached_type == TYPE_SSEDIV) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 48121 | { |
| 48122 | return 22 /* 0x16 */; |
| 48123 | } |
| 48124 | else if (cached_type == TYPE_SSEDIV) |
| 48125 | { |
| 48126 | return 20 /* 0x14 */; |
| 48127 | } |
| 48128 | else if ((cached_type == TYPE_SSEINS) && ((cached_mode = get_attr_mode (insn)) == MODE_TI)) |
| 48129 | { |
| 48130 | return 5; |
| 48131 | } |
| 48132 | else |
| 48133 | { |
| 48134 | return 0; |
| 48135 | } |
| 48136 | |
| 48137 | default: |
| 48138 | return 0; |
| 48139 | |
| 48140 | } |
| 48141 | } |
| 48142 | |
| 48143 | int |
| 48144 | insn_default_latency_bdver1 (rtx_insn *insn ATTRIBUTE_UNUSED) |
| 48145 | { |
| 48146 | enum attr_memory cached_memory ATTRIBUTE_UNUSED; |
| 48147 | enum attr_type cached_type ATTRIBUTE_UNUSED; |
| 48148 | enum attr_mode cached_mode ATTRIBUTE_UNUSED; |
| 48149 | enum attr_bdver1_decode cached_bdver1_decode ATTRIBUTE_UNUSED; |
| 48150 | enum attr_unit cached_unit ATTRIBUTE_UNUSED; |
| 48151 | enum attr_prefix cached_prefix ATTRIBUTE_UNUSED; |
| 48152 | enum attr_movu cached_movu ATTRIBUTE_UNUSED; |
| 48153 | |
| 48154 | switch (recog_memoized (insn)) |
| 48155 | { |
| 48156 | case 3904: /* sse4_2_pcmpistr_cconly */ |
| 48157 | case 3900: /* sse4_2_pcmpestr_cconly */ |
| 48158 | extract_constrain_insn_cached (insn); |
| 48159 | if (!((1 << which_alternative) & 0x5)) |
| 48160 | { |
| 48161 | return 6; |
| 48162 | } |
| 48163 | else |
| 48164 | { |
| 48165 | return 2; |
| 48166 | } |
| 48167 | |
| 48168 | case 3903: /* sse4_2_pcmpistrm */ |
| 48169 | case 3902: /* sse4_2_pcmpistri */ |
| 48170 | case 3901: /* sse4_2_pcmpistr */ |
| 48171 | case 3899: /* sse4_2_pcmpestrm */ |
| 48172 | case 3898: /* sse4_2_pcmpestri */ |
| 48173 | case 3897: /* sse4_2_pcmpestr */ |
| 48174 | extract_constrain_insn_cached (insn); |
| 48175 | if (which_alternative != 0) |
| 48176 | { |
| 48177 | return 6; |
| 48178 | } |
| 48179 | else |
| 48180 | { |
| 48181 | return 2; |
| 48182 | } |
| 48183 | |
| 48184 | case 3634: /* *vec_extractv4si */ |
| 48185 | extract_constrain_insn_cached (insn); |
| 48186 | if ((((1 << which_alternative) & 0x3)) && (get_attr_memory (insn) == MEMORY_LOAD)) |
| 48187 | { |
| 48188 | return 6; |
| 48189 | } |
| 48190 | else if (((1 << which_alternative) & 0x3)) |
| 48191 | { |
| 48192 | return 2; |
| 48193 | } |
| 48194 | else |
| 48195 | { |
| 48196 | return 0; |
| 48197 | } |
| 48198 | |
| 48199 | case 3706: /* ssse3_pmaddubsw */ |
| 48200 | case 3705: /* ssse3_pmaddubsw128 */ |
| 48201 | case 3702: /* avx512bw_pmaddubsw512v32hi_mask */ |
| 48202 | case 3701: /* avx512bw_pmaddubsw512v32hi */ |
| 48203 | case 3700: /* avx512bw_pmaddubsw512v16hi_mask */ |
| 48204 | case 3699: /* avx512bw_pmaddubsw512v16hi */ |
| 48205 | case 3698: /* avx512bw_pmaddubsw512v8hi_mask */ |
| 48206 | case 3697: /* avx512bw_pmaddubsw512v8hi */ |
| 48207 | case 3696: /* avx2_pmaddubsw256 */ |
| 48208 | case 3695: /* ssse3_phsubdv2si3 */ |
| 48209 | case 3694: /* ssse3_phadddv2si3 */ |
| 48210 | case 3693: /* ssse3_phsubdv4si3 */ |
| 48211 | case 3692: /* ssse3_phadddv4si3 */ |
| 48212 | case 3691: /* avx2_phsubdv8si3 */ |
| 48213 | case 3690: /* avx2_phadddv8si3 */ |
| 48214 | case 3689: /* ssse3_phsubswv4hi3 */ |
| 48215 | case 3688: /* ssse3_phsubwv4hi3 */ |
| 48216 | case 3687: /* ssse3_phaddswv4hi3 */ |
| 48217 | case 3686: /* ssse3_phaddwv4hi3 */ |
| 48218 | case 3685: /* ssse3_phsubswv8hi3 */ |
| 48219 | case 3684: /* ssse3_phsubwv8hi3 */ |
| 48220 | case 3683: /* ssse3_phaddswv8hi3 */ |
| 48221 | case 3682: /* ssse3_phaddwv8hi3 */ |
| 48222 | case 3681: /* avx2_phsubswv16hi3 */ |
| 48223 | case 3680: /* avx2_phsubwv16hi3 */ |
| 48224 | case 3679: /* avx2_phaddswv16hi3 */ |
| 48225 | case 3678: /* avx2_phaddwv16hi3 */ |
| 48226 | case 3657: /* sse2_psadbw */ |
| 48227 | case 3656: /* avx2_psadbw */ |
| 48228 | case 3655: /* avx512f_psadbw */ |
| 48229 | case 3654: /* *sse2_uavgv8hi3_mask */ |
| 48230 | case 3653: /* *sse2_uavgv8hi3 */ |
| 48231 | case 3652: /* *avx2_uavgv16hi3_mask */ |
| 48232 | case 3651: /* *avx2_uavgv16hi3 */ |
| 48233 | case 3650: /* *avx512bw_uavgv32hi3_mask */ |
| 48234 | case 3649: /* *avx512bw_uavgv32hi3 */ |
| 48235 | case 3648: /* *sse2_uavgv16qi3_mask */ |
| 48236 | case 3647: /* *sse2_uavgv16qi3 */ |
| 48237 | case 3646: /* *avx2_uavgv32qi3_mask */ |
| 48238 | case 3645: /* *avx2_uavgv32qi3 */ |
| 48239 | case 3644: /* *avx512bw_uavgv64qi3_mask */ |
| 48240 | case 3643: /* *avx512bw_uavgv64qi3 */ |
| 48241 | case 3319: /* *uminv16qi3 */ |
| 48242 | case 3318: /* *umaxv16qi3 */ |
| 48243 | case 3317: /* *sse4_1_uminv4si3_mask */ |
| 48244 | case 3316: /* *sse4_1_uminv4si3 */ |
| 48245 | case 3315: /* *sse4_1_umaxv4si3_mask */ |
| 48246 | case 3314: /* *sse4_1_umaxv4si3 */ |
| 48247 | case 3313: /* *sse4_1_uminv8hi3_mask */ |
| 48248 | case 3312: /* *sse4_1_uminv8hi3 */ |
| 48249 | case 3311: /* *sse4_1_umaxv8hi3_mask */ |
| 48250 | case 3310: /* *sse4_1_umaxv8hi3 */ |
| 48251 | case 3309: /* *sminv8hi3 */ |
| 48252 | case 3308: /* *smaxv8hi3 */ |
| 48253 | case 3307: /* *sse4_1_sminv4si3_mask */ |
| 48254 | case 3306: /* *sse4_1_sminv4si3 */ |
| 48255 | case 3305: /* *sse4_1_smaxv4si3_mask */ |
| 48256 | case 3304: /* *sse4_1_smaxv4si3 */ |
| 48257 | case 3303: /* *sse4_1_sminv16qi3_mask */ |
| 48258 | case 3302: /* *sse4_1_sminv16qi3 */ |
| 48259 | case 3301: /* *sse4_1_smaxv16qi3_mask */ |
| 48260 | case 3300: /* *sse4_1_smaxv16qi3 */ |
| 48261 | case 3299: /* uminv8hi3_mask */ |
| 48262 | case 3298: /* *uminv8hi3 */ |
| 48263 | case 3297: /* umaxv8hi3_mask */ |
| 48264 | case 3296: /* *umaxv8hi3 */ |
| 48265 | case 3295: /* sminv8hi3_mask */ |
| 48266 | case 3294: /* *sminv8hi3 */ |
| 48267 | case 3293: /* smaxv8hi3_mask */ |
| 48268 | case 3292: /* *smaxv8hi3 */ |
| 48269 | case 3291: /* uminv16hi3_mask */ |
| 48270 | case 3290: /* *uminv16hi3 */ |
| 48271 | case 3289: /* umaxv16hi3_mask */ |
| 48272 | case 3288: /* *umaxv16hi3 */ |
| 48273 | case 3287: /* sminv16hi3_mask */ |
| 48274 | case 3286: /* *sminv16hi3 */ |
| 48275 | case 3285: /* smaxv16hi3_mask */ |
| 48276 | case 3284: /* *smaxv16hi3 */ |
| 48277 | case 3283: /* uminv32hi3_mask */ |
| 48278 | case 3282: /* *uminv32hi3 */ |
| 48279 | case 3281: /* umaxv32hi3_mask */ |
| 48280 | case 3280: /* *umaxv32hi3 */ |
| 48281 | case 3279: /* sminv32hi3_mask */ |
| 48282 | case 3278: /* *sminv32hi3 */ |
| 48283 | case 3277: /* smaxv32hi3_mask */ |
| 48284 | case 3276: /* *smaxv32hi3 */ |
| 48285 | case 3275: /* uminv32qi3_mask */ |
| 48286 | case 3274: /* *uminv32qi3 */ |
| 48287 | case 3273: /* umaxv32qi3_mask */ |
| 48288 | case 3272: /* *umaxv32qi3 */ |
| 48289 | case 3271: /* sminv32qi3_mask */ |
| 48290 | case 3270: /* *sminv32qi3 */ |
| 48291 | case 3269: /* smaxv32qi3_mask */ |
| 48292 | case 3268: /* *smaxv32qi3 */ |
| 48293 | case 3267: /* uminv16qi3_mask */ |
| 48294 | case 3266: /* *uminv16qi3 */ |
| 48295 | case 3265: /* umaxv16qi3_mask */ |
| 48296 | case 3264: /* *umaxv16qi3 */ |
| 48297 | case 3263: /* sminv16qi3_mask */ |
| 48298 | case 3262: /* *sminv16qi3 */ |
| 48299 | case 3261: /* smaxv16qi3_mask */ |
| 48300 | case 3260: /* *smaxv16qi3 */ |
| 48301 | case 3259: /* uminv64qi3_mask */ |
| 48302 | case 3258: /* *uminv64qi3 */ |
| 48303 | case 3257: /* umaxv64qi3_mask */ |
| 48304 | case 3256: /* *umaxv64qi3 */ |
| 48305 | case 3255: /* sminv64qi3_mask */ |
| 48306 | case 3254: /* *sminv64qi3 */ |
| 48307 | case 3253: /* smaxv64qi3_mask */ |
| 48308 | case 3252: /* *smaxv64qi3 */ |
| 48309 | case 3251: /* *avx512f_uminv2di3_mask */ |
| 48310 | case 3250: /* *avx512f_uminv2di3 */ |
| 48311 | case 3249: /* *avx512f_umaxv2di3_mask */ |
| 48312 | case 3248: /* *avx512f_umaxv2di3 */ |
| 48313 | case 3247: /* *avx512f_sminv2di3_mask */ |
| 48314 | case 3246: /* *avx512f_sminv2di3 */ |
| 48315 | case 3245: /* *avx512f_smaxv2di3_mask */ |
| 48316 | case 3244: /* *avx512f_smaxv2di3 */ |
| 48317 | case 3243: /* *avx512f_uminv4di3_mask */ |
| 48318 | case 3242: /* *avx512f_uminv4di3 */ |
| 48319 | case 3241: /* *avx512f_umaxv4di3_mask */ |
| 48320 | case 3240: /* *avx512f_umaxv4di3 */ |
| 48321 | case 3239: /* *avx512f_sminv4di3_mask */ |
| 48322 | case 3238: /* *avx512f_sminv4di3 */ |
| 48323 | case 3237: /* *avx512f_smaxv4di3_mask */ |
| 48324 | case 3236: /* *avx512f_smaxv4di3 */ |
| 48325 | case 3235: /* *avx512f_uminv8di3_mask */ |
| 48326 | case 3234: /* *avx512f_uminv8di3 */ |
| 48327 | case 3233: /* *avx512f_umaxv8di3_mask */ |
| 48328 | case 3232: /* *avx512f_umaxv8di3 */ |
| 48329 | case 3231: /* *avx512f_sminv8di3_mask */ |
| 48330 | case 3230: /* *avx512f_sminv8di3 */ |
| 48331 | case 3229: /* *avx512f_smaxv8di3_mask */ |
| 48332 | case 3228: /* *avx512f_smaxv8di3 */ |
| 48333 | case 3227: /* *avx512f_uminv4si3_mask */ |
| 48334 | case 3226: /* *avx512f_uminv4si3 */ |
| 48335 | case 3225: /* *avx512f_umaxv4si3_mask */ |
| 48336 | case 3224: /* *avx512f_umaxv4si3 */ |
| 48337 | case 3223: /* *avx512f_sminv4si3_mask */ |
| 48338 | case 3222: /* *avx512f_sminv4si3 */ |
| 48339 | case 3221: /* *avx512f_smaxv4si3_mask */ |
| 48340 | case 3220: /* *avx512f_smaxv4si3 */ |
| 48341 | case 3219: /* *avx512f_uminv8si3_mask */ |
| 48342 | case 3218: /* *avx512f_uminv8si3 */ |
| 48343 | case 3217: /* *avx512f_umaxv8si3_mask */ |
| 48344 | case 3216: /* *avx512f_umaxv8si3 */ |
| 48345 | case 3215: /* *avx512f_sminv8si3_mask */ |
| 48346 | case 3214: /* *avx512f_sminv8si3 */ |
| 48347 | case 3213: /* *avx512f_smaxv8si3_mask */ |
| 48348 | case 3212: /* *avx512f_smaxv8si3 */ |
| 48349 | case 3211: /* *avx512f_uminv16si3_mask */ |
| 48350 | case 3210: /* *avx512f_uminv16si3 */ |
| 48351 | case 3209: /* *avx512f_umaxv16si3_mask */ |
| 48352 | case 3208: /* *avx512f_umaxv16si3 */ |
| 48353 | case 3207: /* *avx512f_sminv16si3_mask */ |
| 48354 | case 3206: /* *avx512f_sminv16si3 */ |
| 48355 | case 3205: /* *avx512f_smaxv16si3_mask */ |
| 48356 | case 3204: /* *avx512f_smaxv16si3 */ |
| 48357 | case 3203: /* *avx2_uminv8si3 */ |
| 48358 | case 3202: /* *avx2_umaxv8si3 */ |
| 48359 | case 3201: /* *avx2_sminv8si3 */ |
| 48360 | case 3200: /* *avx2_smaxv8si3 */ |
| 48361 | case 3199: /* *avx2_uminv16hi3 */ |
| 48362 | case 3198: /* *avx2_umaxv16hi3 */ |
| 48363 | case 3197: /* *avx2_sminv16hi3 */ |
| 48364 | case 3196: /* *avx2_smaxv16hi3 */ |
| 48365 | case 3195: /* *avx2_uminv32qi3 */ |
| 48366 | case 3194: /* *avx2_umaxv32qi3 */ |
| 48367 | case 3193: /* *avx2_sminv32qi3 */ |
| 48368 | case 3192: /* *avx2_smaxv32qi3 */ |
| 48369 | case 3067: /* *sse2_pmaddwd */ |
| 48370 | case 3066: /* *avx2_pmaddwd */ |
| 48371 | case 3065: /* avx512bw_pmaddwd512v8hi_mask */ |
| 48372 | case 3064: /* avx512bw_pmaddwd512v8hi */ |
| 48373 | case 3063: /* avx512bw_pmaddwd512v16hi_mask */ |
| 48374 | case 3062: /* avx512bw_pmaddwd512v16hi */ |
| 48375 | case 3061: /* avx512bw_pmaddwd512v32hi_mask */ |
| 48376 | case 3060: /* avx512bw_pmaddwd512v32hi */ |
| 48377 | case 3029: /* *sse2_ussubv8hi3_mask */ |
| 48378 | case 3028: /* *sse2_ussubv8hi3 */ |
| 48379 | case 3027: /* *sse2_sssubv8hi3_mask */ |
| 48380 | case 3026: /* *sse2_sssubv8hi3 */ |
| 48381 | case 3025: /* *sse2_usaddv8hi3_mask */ |
| 48382 | case 3024: /* *sse2_usaddv8hi3 */ |
| 48383 | case 3023: /* *sse2_ssaddv8hi3_mask */ |
| 48384 | case 3022: /* *sse2_ssaddv8hi3 */ |
| 48385 | case 3021: /* *avx2_ussubv16hi3_mask */ |
| 48386 | case 3020: /* *avx2_ussubv16hi3 */ |
| 48387 | case 3019: /* *avx2_sssubv16hi3_mask */ |
| 48388 | case 3018: /* *avx2_sssubv16hi3 */ |
| 48389 | case 3017: /* *avx2_usaddv16hi3_mask */ |
| 48390 | case 3016: /* *avx2_usaddv16hi3 */ |
| 48391 | case 3015: /* *avx2_ssaddv16hi3_mask */ |
| 48392 | case 3014: /* *avx2_ssaddv16hi3 */ |
| 48393 | case 3013: /* *avx512bw_ussubv32hi3_mask */ |
| 48394 | case 3012: /* *avx512bw_ussubv32hi3 */ |
| 48395 | case 3011: /* *avx512bw_sssubv32hi3_mask */ |
| 48396 | case 3010: /* *avx512bw_sssubv32hi3 */ |
| 48397 | case 3009: /* *avx512bw_usaddv32hi3_mask */ |
| 48398 | case 3008: /* *avx512bw_usaddv32hi3 */ |
| 48399 | case 3007: /* *avx512bw_ssaddv32hi3_mask */ |
| 48400 | case 3006: /* *avx512bw_ssaddv32hi3 */ |
| 48401 | case 3005: /* *sse2_ussubv16qi3_mask */ |
| 48402 | case 3004: /* *sse2_ussubv16qi3 */ |
| 48403 | case 3003: /* *sse2_sssubv16qi3_mask */ |
| 48404 | case 3002: /* *sse2_sssubv16qi3 */ |
| 48405 | case 3001: /* *sse2_usaddv16qi3_mask */ |
| 48406 | case 3000: /* *sse2_usaddv16qi3 */ |
| 48407 | case 2999: /* *sse2_ssaddv16qi3_mask */ |
| 48408 | case 2998: /* *sse2_ssaddv16qi3 */ |
| 48409 | case 2997: /* *avx2_ussubv32qi3_mask */ |
| 48410 | case 2996: /* *avx2_ussubv32qi3 */ |
| 48411 | case 2995: /* *avx2_sssubv32qi3_mask */ |
| 48412 | case 2994: /* *avx2_sssubv32qi3 */ |
| 48413 | case 2993: /* *avx2_usaddv32qi3_mask */ |
| 48414 | case 2992: /* *avx2_usaddv32qi3 */ |
| 48415 | case 2991: /* *avx2_ssaddv32qi3_mask */ |
| 48416 | case 2990: /* *avx2_ssaddv32qi3 */ |
| 48417 | case 2989: /* *avx512bw_ussubv64qi3_mask */ |
| 48418 | case 2988: /* *avx512bw_ussubv64qi3 */ |
| 48419 | case 2987: /* *avx512bw_sssubv64qi3_mask */ |
| 48420 | case 2986: /* *avx512bw_sssubv64qi3 */ |
| 48421 | case 2985: /* *avx512bw_usaddv64qi3_mask */ |
| 48422 | case 2984: /* *avx512bw_usaddv64qi3 */ |
| 48423 | case 2983: /* *avx512bw_ssaddv64qi3_mask */ |
| 48424 | case 2982: /* *avx512bw_ssaddv64qi3 */ |
| 48425 | case 2981: /* *subv8hi3_mask */ |
| 48426 | case 2980: /* *addv8hi3_mask */ |
| 48427 | case 2979: /* *subv16hi3_mask */ |
| 48428 | case 2978: /* *addv16hi3_mask */ |
| 48429 | case 2977: /* *subv32hi3_mask */ |
| 48430 | case 2976: /* *addv32hi3_mask */ |
| 48431 | case 2975: /* *subv32qi3_mask */ |
| 48432 | case 2974: /* *addv32qi3_mask */ |
| 48433 | case 2973: /* *subv16qi3_mask */ |
| 48434 | case 2972: /* *addv16qi3_mask */ |
| 48435 | case 2971: /* *subv64qi3_mask */ |
| 48436 | case 2970: /* *addv64qi3_mask */ |
| 48437 | case 2969: /* *subv2di3_mask */ |
| 48438 | case 2968: /* *addv2di3_mask */ |
| 48439 | case 2967: /* *subv4di3_mask */ |
| 48440 | case 2966: /* *addv4di3_mask */ |
| 48441 | case 2965: /* *subv8di3_mask */ |
| 48442 | case 2964: /* *addv8di3_mask */ |
| 48443 | case 2963: /* *subv4si3_mask */ |
| 48444 | case 2962: /* *addv4si3_mask */ |
| 48445 | case 2961: /* *subv8si3_mask */ |
| 48446 | case 2960: /* *addv8si3_mask */ |
| 48447 | case 2959: /* *subv16si3_mask */ |
| 48448 | case 2958: /* *addv16si3_mask */ |
| 48449 | case 2957: /* *subv2di3 */ |
| 48450 | case 2956: /* *addv2di3 */ |
| 48451 | case 2955: /* *subv4di3 */ |
| 48452 | case 2954: /* *addv4di3 */ |
| 48453 | case 2953: /* *subv8di3 */ |
| 48454 | case 2952: /* *addv8di3 */ |
| 48455 | case 2951: /* *subv4si3 */ |
| 48456 | case 2950: /* *addv4si3 */ |
| 48457 | case 2949: /* *subv8si3 */ |
| 48458 | case 2948: /* *addv8si3 */ |
| 48459 | case 2947: /* *subv16si3 */ |
| 48460 | case 2946: /* *addv16si3 */ |
| 48461 | case 2945: /* *subv8hi3 */ |
| 48462 | case 2944: /* *addv8hi3 */ |
| 48463 | case 2943: /* *subv16hi3 */ |
| 48464 | case 2942: /* *addv16hi3 */ |
| 48465 | case 2941: /* *subv32hi3 */ |
| 48466 | case 2940: /* *addv32hi3 */ |
| 48467 | case 2939: /* *subv16qi3 */ |
| 48468 | case 2938: /* *addv16qi3 */ |
| 48469 | case 2937: /* *subv32qi3 */ |
| 48470 | case 2936: /* *addv32qi3 */ |
| 48471 | case 2935: /* *subv64qi3 */ |
| 48472 | case 2934: /* *addv64qi3 */ |
| 48473 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) |
| 48474 | { |
| 48475 | return 6; |
| 48476 | } |
| 48477 | else if (cached_memory == MEMORY_NONE) |
| 48478 | { |
| 48479 | return 2; |
| 48480 | } |
| 48481 | else |
| 48482 | { |
| 48483 | return 0; |
| 48484 | } |
| 48485 | |
| 48486 | case 4412: /* vec_set_hi_v8sf_mask */ |
| 48487 | case 4411: /* vec_set_hi_v8sf */ |
| 48488 | case 4408: /* vec_set_lo_v8sf_mask */ |
| 48489 | case 4407: /* vec_set_lo_v8sf */ |
| 48490 | case 4389: /* *avx_vperm2f128v8sf_nozero */ |
| 48491 | case 4386: /* *avx_vperm2f128v8sf_full */ |
| 48492 | case 4372: /* avx512vl_vpermt2varv8sf3_mask */ |
| 48493 | case 4342: /* avx512vl_vpermt2varv8sf3_maskz_1 */ |
| 48494 | case 4341: /* avx512vl_vpermt2varv8sf3 */ |
| 48495 | case 4318: /* avx512vl_vpermi2varv8sf3_mask */ |
| 48496 | case 4288: /* avx512vl_vpermi2varv8sf3_maskz_1 */ |
| 48497 | case 4287: /* avx512vl_vpermi2varv8sf3 */ |
| 48498 | case 4268: /* avx_vpermilvarv8sf3_mask */ |
| 48499 | case 4267: /* avx_vpermilvarv8sf3 */ |
| 48500 | case 4256: /* *avx_vpermilpv8sf_mask */ |
| 48501 | case 4255: /* *avx_vpermilpv8sf */ |
| 48502 | case 4076: /* avx2_permvarv8sf_mask */ |
| 48503 | case 4075: /* avx2_permvarv8sf */ |
| 48504 | case 3597: /* avx512vl_shuf_f32x4_1_mask */ |
| 48505 | case 3596: /* avx512vl_shuf_f32x4_1 */ |
| 48506 | case 2445: /* avx_shufps256_1_mask */ |
| 48507 | case 2444: /* avx_shufps256_1 */ |
| 48508 | case 2429: /* avx_unpcklps256_mask */ |
| 48509 | case 2428: /* avx_unpcklps256 */ |
| 48510 | case 2423: /* avx_unpckhps256_mask */ |
| 48511 | case 2422: /* avx_unpckhps256 */ |
| 48512 | if (get_attr_memory (insn) == MEMORY_LOAD) |
| 48513 | { |
| 48514 | return 7; |
| 48515 | } |
| 48516 | else |
| 48517 | { |
| 48518 | return 3; |
| 48519 | } |
| 48520 | |
| 48521 | case 1464: /* sse2_divv2df3_mask */ |
| 48522 | case 1463: /* sse2_divv2df3 */ |
| 48523 | case 1462: /* avx_divv4df3_mask */ |
| 48524 | case 1461: /* avx_divv4df3 */ |
| 48525 | case 1448: /* sse2_vmdivv2df3_round */ |
| 48526 | case 1447: /* sse2_vmdivv2df3 */ |
| 48527 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) |
| 48528 | { |
| 48529 | return 31 /* 0x1f */; |
| 48530 | } |
| 48531 | else if (cached_memory == MEMORY_NONE) |
| 48532 | { |
| 48533 | return 27 /* 0x1b */; |
| 48534 | } |
| 48535 | else |
| 48536 | { |
| 48537 | return 0; |
| 48538 | } |
| 48539 | |
| 48540 | case 1456: /* sse_divv4sf3_mask */ |
| 48541 | case 1455: /* sse_divv4sf3 */ |
| 48542 | case 1454: /* avx_divv8sf3_mask */ |
| 48543 | case 1453: /* avx_divv8sf3 */ |
| 48544 | case 1444: /* sse_vmdivv4sf3_round */ |
| 48545 | case 1443: /* sse_vmdivv4sf3 */ |
| 48546 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) |
| 48547 | { |
| 48548 | return 28 /* 0x1c */; |
| 48549 | } |
| 48550 | else if (cached_memory == MEMORY_NONE) |
| 48551 | { |
| 48552 | return 24 /* 0x18 */; |
| 48553 | } |
| 48554 | else |
| 48555 | { |
| 48556 | return 0; |
| 48557 | } |
| 48558 | |
| 48559 | case 4766: /* avx512vl_expandv4df_mask */ |
| 48560 | case 4765: /* avx512vl_expandv4di_mask */ |
| 48561 | case 4764: /* avx512vl_expandv8sf_mask */ |
| 48562 | case 4763: /* avx512vl_expandv8si_mask */ |
| 48563 | case 2756: /* avx512f_us_truncatev8div8si2_mask */ |
| 48564 | case 2755: /* avx512f_truncatev8div8si2_mask */ |
| 48565 | case 2754: /* avx512f_ss_truncatev8div8si2_mask */ |
| 48566 | case 2753: /* avx512f_us_truncatev16siv16hi2_mask */ |
| 48567 | case 2752: /* avx512f_truncatev16siv16hi2_mask */ |
| 48568 | case 2751: /* avx512f_ss_truncatev16siv16hi2_mask */ |
| 48569 | case 2744: /* *avx512f_us_truncatev8div8si2 */ |
| 48570 | case 2743: /* *avx512f_truncatev8div8si2 */ |
| 48571 | case 2742: /* *avx512f_ss_truncatev8div8si2 */ |
| 48572 | case 2741: /* *avx512f_us_truncatev16siv16hi2 */ |
| 48573 | case 2740: /* *avx512f_truncatev16siv16hi2 */ |
| 48574 | case 2739: /* *avx512f_ss_truncatev16siv16hi2 */ |
| 48575 | case 1255: /* avx512vl_loadv16hi_mask */ |
| 48576 | case 1253: /* avx512vl_loadv32qi_mask */ |
| 48577 | case 1249: /* avx512vl_loadv4df_mask */ |
| 48578 | case 1246: /* avx512vl_loadv8sf_mask */ |
| 48579 | case 1243: /* avx512vl_loadv4di_mask */ |
| 48580 | case 1240: /* avx512vl_loadv8si_mask */ |
| 48581 | extract_constrain_insn_cached (insn); |
| 48582 | if (which_alternative != 0) |
| 48583 | { |
| 48584 | return 5; |
| 48585 | } |
| 48586 | else |
| 48587 | { |
| 48588 | return 3; |
| 48589 | } |
| 48590 | |
| 48591 | case 4770: /* avx512vl_expandv2df_mask */ |
| 48592 | case 4769: /* avx512vl_expandv2di_mask */ |
| 48593 | case 4768: /* avx512vl_expandv4sf_mask */ |
| 48594 | case 4767: /* avx512vl_expandv4si_mask */ |
| 48595 | case 4762: /* avx512f_expandv8df_mask */ |
| 48596 | case 4761: /* avx512f_expandv8di_mask */ |
| 48597 | case 4760: /* avx512f_expandv16sf_mask */ |
| 48598 | case 4759: /* avx512f_expandv16si_mask */ |
| 48599 | case 2783: /* avx512vl_us_truncatev16hiv16qi2_mask */ |
| 48600 | case 2782: /* avx512vl_truncatev16hiv16qi2_mask */ |
| 48601 | case 2781: /* avx512vl_ss_truncatev16hiv16qi2_mask */ |
| 48602 | case 2780: /* avx512vl_us_truncatev8siv8hi2_mask */ |
| 48603 | case 2779: /* avx512vl_truncatev8siv8hi2_mask */ |
| 48604 | case 2778: /* avx512vl_ss_truncatev8siv8hi2_mask */ |
| 48605 | case 2777: /* avx512vl_us_truncatev4div4si2_mask */ |
| 48606 | case 2776: /* avx512vl_truncatev4div4si2_mask */ |
| 48607 | case 2775: /* avx512vl_ss_truncatev4div4si2_mask */ |
| 48608 | case 2774: /* *avx512vl_us_truncatev16hiv16qi2 */ |
| 48609 | case 2773: /* *avx512vl_truncatev16hiv16qi2 */ |
| 48610 | case 2772: /* *avx512vl_ss_truncatev16hiv16qi2 */ |
| 48611 | case 2771: /* *avx512vl_us_truncatev8siv8hi2 */ |
| 48612 | case 2770: /* *avx512vl_truncatev8siv8hi2 */ |
| 48613 | case 2769: /* *avx512vl_ss_truncatev8siv8hi2 */ |
| 48614 | case 2768: /* *avx512vl_us_truncatev4div4si2 */ |
| 48615 | case 2767: /* *avx512vl_truncatev4div4si2 */ |
| 48616 | case 2766: /* *avx512vl_ss_truncatev4div4si2 */ |
| 48617 | case 2765: /* avx512bw_us_truncatev32hiv32qi2_mask */ |
| 48618 | case 2764: /* avx512bw_truncatev32hiv32qi2_mask */ |
| 48619 | case 2763: /* avx512bw_ss_truncatev32hiv32qi2_mask */ |
| 48620 | case 2762: /* avx512bw_us_truncatev32hiv32qi2 */ |
| 48621 | case 2761: /* avx512bw_truncatev32hiv32qi2 */ |
| 48622 | case 2760: /* avx512bw_ss_truncatev32hiv32qi2 */ |
| 48623 | case 2759: /* avx512f_us_truncatev8div8hi2_mask */ |
| 48624 | case 2758: /* avx512f_truncatev8div8hi2_mask */ |
| 48625 | case 2757: /* avx512f_ss_truncatev8div8hi2_mask */ |
| 48626 | case 2750: /* avx512f_us_truncatev16siv16qi2_mask */ |
| 48627 | case 2749: /* avx512f_truncatev16siv16qi2_mask */ |
| 48628 | case 2748: /* avx512f_ss_truncatev16siv16qi2_mask */ |
| 48629 | case 2747: /* *avx512f_us_truncatev8div8hi2 */ |
| 48630 | case 2746: /* *avx512f_truncatev8div8hi2 */ |
| 48631 | case 2745: /* *avx512f_ss_truncatev8div8hi2 */ |
| 48632 | case 2738: /* *avx512f_us_truncatev16siv16qi2 */ |
| 48633 | case 2737: /* *avx512f_truncatev16siv16qi2 */ |
| 48634 | case 2736: /* *avx512f_ss_truncatev16siv16qi2 */ |
| 48635 | case 1256: /* avx512vl_loadv8hi_mask */ |
| 48636 | case 1254: /* avx512bw_loadv32hi_mask */ |
| 48637 | case 1252: /* avx512vl_loadv16qi_mask */ |
| 48638 | case 1251: /* avx512bw_loadv64qi_mask */ |
| 48639 | case 1250: /* avx512vl_loadv2df_mask */ |
| 48640 | case 1248: /* avx512f_loadv8df_mask */ |
| 48641 | case 1247: /* avx512vl_loadv4sf_mask */ |
| 48642 | case 1245: /* avx512f_loadv16sf_mask */ |
| 48643 | case 1244: /* avx512vl_loadv2di_mask */ |
| 48644 | case 1242: /* avx512f_loadv8di_mask */ |
| 48645 | case 1241: /* avx512vl_loadv4si_mask */ |
| 48646 | case 1239: /* avx512f_loadv16si_mask */ |
| 48647 | extract_constrain_insn_cached (insn); |
| 48648 | if (which_alternative != 0) |
| 48649 | { |
| 48650 | return 4; |
| 48651 | } |
| 48652 | else |
| 48653 | { |
| 48654 | return 2; |
| 48655 | } |
| 48656 | |
| 48657 | case 1051: /* fnstsw */ |
| 48658 | extract_constrain_insn_cached (insn); |
| 48659 | if (which_alternative == 0) |
| 48660 | { |
| 48661 | return 1; |
| 48662 | } |
| 48663 | else |
| 48664 | { |
| 48665 | return 4; |
| 48666 | } |
| 48667 | |
| 48668 | case 4919: /* avx5124vnniw_vp4dpwssds_maskz */ |
| 48669 | case 4918: /* avx5124vnniw_vp4dpwssds_mask */ |
| 48670 | case 4917: /* avx5124vnniw_vp4dpwssds */ |
| 48671 | case 4916: /* avx5124vnniw_vp4dpwssd_maskz */ |
| 48672 | case 4915: /* avx5124vnniw_vp4dpwssd_mask */ |
| 48673 | case 4914: /* avx5124vnniw_vp4dpwssd */ |
| 48674 | case 4913: /* avx5124fmaddps_4fnmaddss_maskz */ |
| 48675 | case 4912: /* avx5124fmaddps_4fnmaddss_mask */ |
| 48676 | case 4911: /* avx5124fmaddps_4fnmaddss */ |
| 48677 | case 4910: /* avx5124fmaddps_4fnmaddps_maskz */ |
| 48678 | case 4909: /* avx5124fmaddps_4fnmaddps_mask */ |
| 48679 | case 4908: /* avx5124fmaddps_4fnmaddps */ |
| 48680 | case 4907: /* avx5124fmaddps_4fmaddss_maskz */ |
| 48681 | case 4906: /* avx5124fmaddps_4fmaddss_mask */ |
| 48682 | case 4905: /* avx5124fmaddps_4fmaddss */ |
| 48683 | case 4904: /* avx5124fmaddps_4fmaddps_maskz */ |
| 48684 | case 4903: /* avx5124fmaddps_4fmaddps_mask */ |
| 48685 | case 4902: /* avx5124fmaddps_4fmaddps */ |
| 48686 | case 4893: /* vpamdd52huqv2di_mask */ |
| 48687 | case 4892: /* vpamdd52luqv2di_mask */ |
| 48688 | case 4891: /* vpamdd52huqv4di_mask */ |
| 48689 | case 4890: /* vpamdd52luqv4di_mask */ |
| 48690 | case 4889: /* vpamdd52huqv8di_mask */ |
| 48691 | case 4888: /* vpamdd52luqv8di_mask */ |
| 48692 | case 4887: /* vpamdd52huqv2di_maskz_1 */ |
| 48693 | case 4886: /* vpamdd52huqv2di */ |
| 48694 | case 4885: /* vpamdd52luqv2di_maskz_1 */ |
| 48695 | case 4884: /* vpamdd52luqv2di */ |
| 48696 | case 4883: /* vpamdd52huqv4di_maskz_1 */ |
| 48697 | case 4882: /* vpamdd52huqv4di */ |
| 48698 | case 4881: /* vpamdd52luqv4di_maskz_1 */ |
| 48699 | case 4880: /* vpamdd52luqv4di */ |
| 48700 | case 4879: /* vpamdd52huqv8di_maskz_1 */ |
| 48701 | case 4878: /* vpamdd52huqv8di */ |
| 48702 | case 4877: /* vpamdd52luqv8di_maskz_1 */ |
| 48703 | case 4876: /* vpamdd52luqv8di */ |
| 48704 | case 3964: /* xop_pmadcsswd */ |
| 48705 | case 3963: /* xop_pmadcswd */ |
| 48706 | case 3962: /* xop_pmacsswd */ |
| 48707 | case 3961: /* xop_pmacswd */ |
| 48708 | case 3960: /* xop_pmacssdqh */ |
| 48709 | case 3959: /* xop_pmacsdqh */ |
| 48710 | case 3958: /* xop_pmacssdql */ |
| 48711 | case 3957: /* xop_pmacsdql */ |
| 48712 | case 3956: /* xop_pmacssdd */ |
| 48713 | case 3955: /* xop_pmacsdd */ |
| 48714 | case 3954: /* xop_pmacssww */ |
| 48715 | case 3953: /* xop_pmacsww */ |
| 48716 | case 3783: /* sse4_1_dppd */ |
| 48717 | case 3781: /* sse4_1_dpps */ |
| 48718 | case 2102: /* *fma4i_vmfnmsub_v2df */ |
| 48719 | case 2101: /* *fma4i_vmfnmsub_v4sf */ |
| 48720 | case 2100: /* *fma4i_vmfnmadd_v2df */ |
| 48721 | case 2099: /* *fma4i_vmfnmadd_v4sf */ |
| 48722 | case 2098: /* *fma4i_vmfmsub_v2df */ |
| 48723 | case 2097: /* *fma4i_vmfmsub_v4sf */ |
| 48724 | case 2096: /* *fma4i_vmfmadd_v2df */ |
| 48725 | case 2095: /* *fma4i_vmfmadd_v4sf */ |
| 48726 | case 2094: /* *fmai_fnmsub_v2df_round */ |
| 48727 | case 2093: /* *fmai_fnmsub_v2df */ |
| 48728 | case 2092: /* *fmai_fnmsub_v4sf_round */ |
| 48729 | case 2091: /* *fmai_fnmsub_v4sf */ |
| 48730 | case 2090: /* *fmai_fnmadd_v2df_round */ |
| 48731 | case 2089: /* *fmai_fnmadd_v2df */ |
| 48732 | case 2088: /* *fmai_fnmadd_v4sf_round */ |
| 48733 | case 2087: /* *fmai_fnmadd_v4sf */ |
| 48734 | case 2086: /* *fmai_fmsub_v2df */ |
| 48735 | case 2085: /* *fmai_fmsub_v2df */ |
| 48736 | case 2084: /* *fmai_fmsub_v4sf */ |
| 48737 | case 2083: /* *fmai_fmsub_v4sf */ |
| 48738 | case 2082: /* *fmai_fmadd_v2df */ |
| 48739 | case 2081: /* *fmai_fmadd_v2df */ |
| 48740 | case 2080: /* *fmai_fmadd_v4sf */ |
| 48741 | case 2079: /* *fmai_fmadd_v4sf */ |
| 48742 | case 2078: /* avx512vl_fmsubadd_v2df_mask3_round */ |
| 48743 | case 2077: /* avx512vl_fmsubadd_v2df_mask3 */ |
| 48744 | case 2074: /* avx512f_fmsubadd_v8df_mask3_round */ |
| 48745 | case 2073: /* avx512f_fmsubadd_v8df_mask3 */ |
| 48746 | case 2072: /* avx512vl_fmsubadd_v4sf_mask3_round */ |
| 48747 | case 2071: /* avx512vl_fmsubadd_v4sf_mask3 */ |
| 48748 | case 2068: /* avx512f_fmsubadd_v16sf_mask3_round */ |
| 48749 | case 2067: /* avx512f_fmsubadd_v16sf_mask3 */ |
| 48750 | case 2066: /* avx512vl_fmsubadd_v2df_mask_round */ |
| 48751 | case 2065: /* avx512vl_fmsubadd_v2df_mask */ |
| 48752 | case 2062: /* avx512f_fmsubadd_v8df_mask_round */ |
| 48753 | case 2061: /* avx512f_fmsubadd_v8df_mask */ |
| 48754 | case 2060: /* avx512vl_fmsubadd_v4sf_mask_round */ |
| 48755 | case 2059: /* avx512vl_fmsubadd_v4sf_mask */ |
| 48756 | case 2056: /* avx512f_fmsubadd_v16sf_mask_round */ |
| 48757 | case 2055: /* avx512f_fmsubadd_v16sf_mask */ |
| 48758 | case 2054: /* fma_fmsubadd_v2df_maskz_1 */ |
| 48759 | case 2053: /* *fma_fmsubadd_v2df */ |
| 48760 | case 2050: /* fma_fmsubadd_v8df_maskz_1_round */ |
| 48761 | case 2049: /* fma_fmsubadd_v8df_maskz_1 */ |
| 48762 | case 2048: /* *fma_fmsubadd_v8df_round */ |
| 48763 | case 2047: /* *fma_fmsubadd_v8df */ |
| 48764 | case 2046: /* *fma_fmsubadd_df */ |
| 48765 | case 2045: /* fma_fmsubadd_v4sf_maskz_1 */ |
| 48766 | case 2044: /* *fma_fmsubadd_v4sf */ |
| 48767 | case 2041: /* fma_fmsubadd_v16sf_maskz_1_round */ |
| 48768 | case 2040: /* fma_fmsubadd_v16sf_maskz_1 */ |
| 48769 | case 2039: /* *fma_fmsubadd_v16sf_round */ |
| 48770 | case 2038: /* *fma_fmsubadd_v16sf */ |
| 48771 | case 2037: /* *fma_fmsubadd_sf */ |
| 48772 | case 2036: /* *fma_fmsubadd_v2df */ |
| 48773 | case 2034: /* *fma_fmsubadd_v4sf */ |
| 48774 | case 2032: /* avx512vl_fmaddsub_v2df_mask3_round */ |
| 48775 | case 2031: /* avx512vl_fmaddsub_v2df_mask3 */ |
| 48776 | case 2028: /* avx512f_fmaddsub_v8df_mask3_round */ |
| 48777 | case 2027: /* avx512f_fmaddsub_v8df_mask3 */ |
| 48778 | case 2026: /* avx512vl_fmaddsub_v4sf_mask3_round */ |
| 48779 | case 2025: /* avx512vl_fmaddsub_v4sf_mask3 */ |
| 48780 | case 2022: /* avx512f_fmaddsub_v16sf_mask3_round */ |
| 48781 | case 2021: /* avx512f_fmaddsub_v16sf_mask3 */ |
| 48782 | case 2020: /* avx512vl_fmaddsub_v2df_mask_round */ |
| 48783 | case 2019: /* avx512vl_fmaddsub_v2df_mask */ |
| 48784 | case 2016: /* avx512f_fmaddsub_v8df_mask_round */ |
| 48785 | case 2015: /* avx512f_fmaddsub_v8df_mask */ |
| 48786 | case 2014: /* avx512vl_fmaddsub_v4sf_mask_round */ |
| 48787 | case 2013: /* avx512vl_fmaddsub_v4sf_mask */ |
| 48788 | case 2010: /* avx512f_fmaddsub_v16sf_mask_round */ |
| 48789 | case 2009: /* avx512f_fmaddsub_v16sf_mask */ |
| 48790 | case 2008: /* fma_fmaddsub_v2df_maskz_1 */ |
| 48791 | case 2007: /* *fma_fmaddsub_v2df */ |
| 48792 | case 2004: /* fma_fmaddsub_v8df_maskz_1_round */ |
| 48793 | case 2003: /* fma_fmaddsub_v8df_maskz_1 */ |
| 48794 | case 2002: /* *fma_fmaddsub_v8df_round */ |
| 48795 | case 2001: /* *fma_fmaddsub_v8df */ |
| 48796 | case 2000: /* *fma_fmaddsub_df */ |
| 48797 | case 1999: /* fma_fmaddsub_v4sf_maskz_1 */ |
| 48798 | case 1998: /* *fma_fmaddsub_v4sf */ |
| 48799 | case 1995: /* fma_fmaddsub_v16sf_maskz_1_round */ |
| 48800 | case 1994: /* fma_fmaddsub_v16sf_maskz_1 */ |
| 48801 | case 1993: /* *fma_fmaddsub_v16sf_round */ |
| 48802 | case 1992: /* *fma_fmaddsub_v16sf */ |
| 48803 | case 1991: /* *fma_fmaddsub_sf */ |
| 48804 | case 1990: /* *fma_fmaddsub_v2df */ |
| 48805 | case 1988: /* *fma_fmaddsub_v4sf */ |
| 48806 | case 1986: /* avx512vl_fnmsub_v2df_mask3_round */ |
| 48807 | case 1985: /* avx512vl_fnmsub_v2df_mask3 */ |
| 48808 | case 1982: /* avx512f_fnmsub_v8df_mask3_round */ |
| 48809 | case 1981: /* avx512f_fnmsub_v8df_mask3 */ |
| 48810 | case 1980: /* avx512vl_fnmsub_v4sf_mask3_round */ |
| 48811 | case 1979: /* avx512vl_fnmsub_v4sf_mask3 */ |
| 48812 | case 1976: /* avx512f_fnmsub_v16sf_mask3_round */ |
| 48813 | case 1975: /* avx512f_fnmsub_v16sf_mask3 */ |
| 48814 | case 1974: /* avx512vl_fnmsub_v2df_mask */ |
| 48815 | case 1972: /* avx512f_fnmsub_v8df_mask_round */ |
| 48816 | case 1971: /* avx512f_fnmsub_v8df_mask */ |
| 48817 | case 1970: /* avx512vl_fnmsub_v4sf_mask */ |
| 48818 | case 1968: /* avx512f_fnmsub_v16sf_mask_round */ |
| 48819 | case 1967: /* avx512f_fnmsub_v16sf_mask */ |
| 48820 | case 1966: /* fma_fnmsub_v2df_maskz_1 */ |
| 48821 | case 1965: /* *fma_fnmsub_v2df */ |
| 48822 | case 1962: /* fma_fnmsub_v8df_maskz_1_round */ |
| 48823 | case 1961: /* fma_fnmsub_v8df_maskz_1 */ |
| 48824 | case 1960: /* *fma_fnmsub_v8df_round */ |
| 48825 | case 1959: /* *fma_fnmsub_v8df */ |
| 48826 | case 1958: /* *fma_fnmsub_df */ |
| 48827 | case 1957: /* fma_fnmsub_v4sf_maskz_1 */ |
| 48828 | case 1956: /* *fma_fnmsub_v4sf */ |
| 48829 | case 1953: /* fma_fnmsub_v16sf_maskz_1_round */ |
| 48830 | case 1952: /* fma_fnmsub_v16sf_maskz_1 */ |
| 48831 | case 1951: /* *fma_fnmsub_v16sf_round */ |
| 48832 | case 1950: /* *fma_fnmsub_v16sf */ |
| 48833 | case 1949: /* *fma_fnmsub_sf */ |
| 48834 | case 1940: /* *fma_fnmsub_v2df */ |
| 48835 | case 1939: /* *fma_fnmsub_v2df */ |
| 48836 | case 1938: /* *fma_fnmsub_v2df */ |
| 48837 | case 1937: /* *fma_fnmsub_v2df */ |
| 48838 | case 1936: /* *fma_fnmsub_v4sf */ |
| 48839 | case 1935: /* *fma_fnmsub_v4sf */ |
| 48840 | case 1934: /* *fma_fnmsub_v4sf */ |
| 48841 | case 1933: /* *fma_fnmsub_v4sf */ |
| 48842 | case 1932: /* *fma_fnmsub_df */ |
| 48843 | case 1931: /* *fma_fnmsub_df */ |
| 48844 | case 1930: /* *fma_fnmsub_sf */ |
| 48845 | case 1929: /* *fma_fnmsub_sf */ |
| 48846 | case 1928: /* avx512vl_fnmadd_v2df_mask3 */ |
| 48847 | case 1926: /* avx512f_fnmadd_v8df_mask3_round */ |
| 48848 | case 1925: /* avx512f_fnmadd_v8df_mask3 */ |
| 48849 | case 1924: /* avx512vl_fnmadd_v4sf_mask3 */ |
| 48850 | case 1922: /* avx512f_fnmadd_v16sf_mask3_round */ |
| 48851 | case 1921: /* avx512f_fnmadd_v16sf_mask3 */ |
| 48852 | case 1920: /* avx512vl_fnmadd_v2df_mask */ |
| 48853 | case 1918: /* avx512f_fnmadd_v8df_mask_round */ |
| 48854 | case 1917: /* avx512f_fnmadd_v8df_mask */ |
| 48855 | case 1916: /* avx512vl_fnmadd_v4sf_mask */ |
| 48856 | case 1914: /* avx512f_fnmadd_v16sf_mask_round */ |
| 48857 | case 1913: /* avx512f_fnmadd_v16sf_mask */ |
| 48858 | case 1912: /* fma_fnmadd_v2df_maskz_1 */ |
| 48859 | case 1911: /* *fma_fnmadd_v2df */ |
| 48860 | case 1908: /* fma_fnmadd_v8df_maskz_1_round */ |
| 48861 | case 1907: /* fma_fnmadd_v8df_maskz_1 */ |
| 48862 | case 1906: /* *fma_fnmadd_v8df_round */ |
| 48863 | case 1905: /* *fma_fnmadd_v8df */ |
| 48864 | case 1904: /* *fma_fnmadd_df */ |
| 48865 | case 1903: /* fma_fnmadd_v4sf_maskz_1 */ |
| 48866 | case 1902: /* *fma_fnmadd_v4sf */ |
| 48867 | case 1899: /* fma_fnmadd_v16sf_maskz_1_round */ |
| 48868 | case 1898: /* fma_fnmadd_v16sf_maskz_1 */ |
| 48869 | case 1897: /* *fma_fnmadd_v16sf_round */ |
| 48870 | case 1896: /* *fma_fnmadd_v16sf */ |
| 48871 | case 1895: /* *fma_fnmadd_sf */ |
| 48872 | case 1892: /* *fma_fnmadd_v2df */ |
| 48873 | case 1891: /* *fma_fnmadd_v4sf */ |
| 48874 | case 1890: /* *fma_fnmadd_df */ |
| 48875 | case 1889: /* *fma_fnmadd_sf */ |
| 48876 | case 1888: /* avx512vl_fmsub_v2df_mask3 */ |
| 48877 | case 1886: /* avx512f_fmsub_v8df_mask3_round */ |
| 48878 | case 1885: /* avx512f_fmsub_v8df_mask3 */ |
| 48879 | case 1884: /* avx512vl_fmsub_v4sf_mask3 */ |
| 48880 | case 1882: /* avx512f_fmsub_v16sf_mask3_round */ |
| 48881 | case 1881: /* avx512f_fmsub_v16sf_mask3 */ |
| 48882 | case 1880: /* avx512vl_fmsub_v2df_mask_round */ |
| 48883 | case 1879: /* avx512vl_fmsub_v2df_mask */ |
| 48884 | case 1876: /* avx512f_fmsub_v8df_mask_round */ |
| 48885 | case 1875: /* avx512f_fmsub_v8df_mask */ |
| 48886 | case 1874: /* avx512vl_fmsub_v4sf_mask_round */ |
| 48887 | case 1873: /* avx512vl_fmsub_v4sf_mask */ |
| 48888 | case 1870: /* avx512f_fmsub_v16sf_mask_round */ |
| 48889 | case 1869: /* avx512f_fmsub_v16sf_mask */ |
| 48890 | case 1868: /* fma_fmsub_v2df_maskz_1 */ |
| 48891 | case 1867: /* *fma_fmsub_v2df */ |
| 48892 | case 1864: /* fma_fmsub_v8df_maskz_1_round */ |
| 48893 | case 1863: /* fma_fmsub_v8df_maskz_1 */ |
| 48894 | case 1862: /* *fma_fmsub_v8df_round */ |
| 48895 | case 1861: /* *fma_fmsub_v8df */ |
| 48896 | case 1860: /* *fma_fmsub_df */ |
| 48897 | case 1859: /* fma_fmsub_v4sf_maskz_1 */ |
| 48898 | case 1858: /* *fma_fmsub_v4sf */ |
| 48899 | case 1855: /* fma_fmsub_v16sf_maskz_1_round */ |
| 48900 | case 1854: /* fma_fmsub_v16sf_maskz_1 */ |
| 48901 | case 1853: /* *fma_fmsub_v16sf_round */ |
| 48902 | case 1852: /* *fma_fmsub_v16sf */ |
| 48903 | case 1851: /* *fma_fmsub_sf */ |
| 48904 | case 1848: /* *fma_fmsub_v2df */ |
| 48905 | case 1847: /* *fma_fmsub_v4sf */ |
| 48906 | case 1846: /* *fma_fmsub_df */ |
| 48907 | case 1845: /* *fma_fmsub_sf */ |
| 48908 | case 1844: /* avx512vl_fmadd_v2df_mask3_round */ |
| 48909 | case 1843: /* avx512vl_fmadd_v2df_mask3 */ |
| 48910 | case 1840: /* avx512f_fmadd_v8df_mask3_round */ |
| 48911 | case 1839: /* avx512f_fmadd_v8df_mask3 */ |
| 48912 | case 1838: /* avx512vl_fmadd_v4sf_mask3_round */ |
| 48913 | case 1837: /* avx512vl_fmadd_v4sf_mask3 */ |
| 48914 | case 1834: /* avx512f_fmadd_v16sf_mask3_round */ |
| 48915 | case 1833: /* avx512f_fmadd_v16sf_mask3 */ |
| 48916 | case 1832: /* avx512vl_fmadd_v2df_mask */ |
| 48917 | case 1830: /* avx512f_fmadd_v8df_mask_round */ |
| 48918 | case 1829: /* avx512f_fmadd_v8df_mask */ |
| 48919 | case 1828: /* avx512vl_fmadd_v4sf_mask */ |
| 48920 | case 1826: /* avx512f_fmadd_v16sf_mask_round */ |
| 48921 | case 1825: /* avx512f_fmadd_v16sf_mask */ |
| 48922 | case 1824: /* fma_fmadd_v2df_maskz_1 */ |
| 48923 | case 1823: /* *fma_fmadd_v2df */ |
| 48924 | case 1820: /* fma_fmadd_v8df_maskz_1_round */ |
| 48925 | case 1819: /* fma_fmadd_v8df_maskz_1 */ |
| 48926 | case 1818: /* *fma_fmadd_v8df_round */ |
| 48927 | case 1817: /* *fma_fmadd_v8df */ |
| 48928 | case 1816: /* *fma_fmadd_df */ |
| 48929 | case 1815: /* fma_fmadd_v4sf_maskz_1 */ |
| 48930 | case 1814: /* *fma_fmadd_v4sf */ |
| 48931 | case 1811: /* fma_fmadd_v16sf_maskz_1_round */ |
| 48932 | case 1810: /* fma_fmadd_v16sf_maskz_1 */ |
| 48933 | case 1809: /* *fma_fmadd_v16sf_round */ |
| 48934 | case 1808: /* *fma_fmadd_v16sf */ |
| 48935 | case 1807: /* *fma_fmadd_sf */ |
| 48936 | case 1804: /* *fma_fmadd_v2df */ |
| 48937 | case 1803: /* *fma_fmadd_v4sf */ |
| 48938 | case 1802: /* *fma_fmadd_df */ |
| 48939 | case 1801: /* *fma_fmadd_sf */ |
| 48940 | case 1620: /* sse3_hsubv4sf3 */ |
| 48941 | case 1619: /* sse3_haddv4sf3 */ |
| 48942 | case 1616: /* *sse3_hsubv2df3_low */ |
| 48943 | case 1615: /* *sse3_haddv2df3_low */ |
| 48944 | case 1614: /* sse3_hsubv2df3 */ |
| 48945 | case 1613: /* *sse3_haddv2df3 */ |
| 48946 | case 1610: /* sse3_addsubv4sf3 */ |
| 48947 | case 1608: /* sse3_addsubv2df3 */ |
| 48948 | case 1598: /* ieee_minv2df3_mask */ |
| 48949 | case 1597: /* ieee_minv2df3 */ |
| 48950 | case 1596: /* ieee_maxv2df3_mask */ |
| 48951 | case 1595: /* ieee_maxv2df3 */ |
| 48952 | case 1590: /* ieee_minv8df3_mask_round */ |
| 48953 | case 1589: /* ieee_minv8df3_mask */ |
| 48954 | case 1588: /* ieee_minv8df3_round */ |
| 48955 | case 1587: /* ieee_minv8df3 */ |
| 48956 | case 1586: /* ieee_maxv8df3_mask_round */ |
| 48957 | case 1585: /* ieee_maxv8df3_mask */ |
| 48958 | case 1584: /* ieee_maxv8df3_round */ |
| 48959 | case 1583: /* ieee_maxv8df3 */ |
| 48960 | case 1582: /* ieee_minv4sf3_mask */ |
| 48961 | case 1581: /* ieee_minv4sf3 */ |
| 48962 | case 1580: /* ieee_maxv4sf3_mask */ |
| 48963 | case 1579: /* ieee_maxv4sf3 */ |
| 48964 | case 1574: /* ieee_minv16sf3_mask_round */ |
| 48965 | case 1573: /* ieee_minv16sf3_mask */ |
| 48966 | case 1572: /* ieee_minv16sf3_round */ |
| 48967 | case 1571: /* ieee_minv16sf3 */ |
| 48968 | case 1570: /* ieee_maxv16sf3_mask_round */ |
| 48969 | case 1569: /* ieee_maxv16sf3_mask */ |
| 48970 | case 1568: /* ieee_maxv16sf3_round */ |
| 48971 | case 1567: /* ieee_maxv16sf3 */ |
| 48972 | case 1566: /* *sminv2df3_mask_round */ |
| 48973 | case 1565: /* *sminv2df3_mask */ |
| 48974 | case 1564: /* *sminv2df3_round */ |
| 48975 | case 1563: /* *sminv2df3 */ |
| 48976 | case 1562: /* *smaxv2df3_mask_round */ |
| 48977 | case 1561: /* *smaxv2df3_mask */ |
| 48978 | case 1560: /* *smaxv2df3_round */ |
| 48979 | case 1559: /* *smaxv2df3 */ |
| 48980 | case 1550: /* *sminv8df3_mask_round */ |
| 48981 | case 1549: /* *sminv8df3_mask */ |
| 48982 | case 1548: /* *sminv8df3_round */ |
| 48983 | case 1547: /* *sminv8df3 */ |
| 48984 | case 1546: /* *smaxv8df3_mask_round */ |
| 48985 | case 1545: /* *smaxv8df3_mask */ |
| 48986 | case 1544: /* *smaxv8df3_round */ |
| 48987 | case 1543: /* *smaxv8df3 */ |
| 48988 | case 1542: /* *sminv4sf3_mask_round */ |
| 48989 | case 1541: /* *sminv4sf3_mask */ |
| 48990 | case 1540: /* *sminv4sf3_round */ |
| 48991 | case 1539: /* *sminv4sf3 */ |
| 48992 | case 1538: /* *smaxv4sf3_mask_round */ |
| 48993 | case 1537: /* *smaxv4sf3_mask */ |
| 48994 | case 1536: /* *smaxv4sf3_round */ |
| 48995 | case 1535: /* *smaxv4sf3 */ |
| 48996 | case 1526: /* *sminv16sf3_mask_round */ |
| 48997 | case 1525: /* *sminv16sf3_mask */ |
| 48998 | case 1524: /* *sminv16sf3_round */ |
| 48999 | case 1523: /* *sminv16sf3 */ |
| 49000 | case 1522: /* *smaxv16sf3_mask_round */ |
| 49001 | case 1521: /* *smaxv16sf3_mask */ |
| 49002 | case 1520: /* *smaxv16sf3_round */ |
| 49003 | case 1519: /* *smaxv16sf3 */ |
| 49004 | case 1446: /* sse2_vmmulv2df3_round */ |
| 49005 | case 1445: /* sse2_vmmulv2df3 */ |
| 49006 | case 1442: /* sse_vmmulv4sf3_round */ |
| 49007 | case 1441: /* sse_vmmulv4sf3 */ |
| 49008 | case 1440: /* *mulv2df3_mask_round */ |
| 49009 | case 1439: /* *mulv2df3_mask */ |
| 49010 | case 1438: /* *mulv2df3_round */ |
| 49011 | case 1437: /* *mulv2df3 */ |
| 49012 | case 1432: /* *mulv8df3_mask_round */ |
| 49013 | case 1431: /* *mulv8df3_mask */ |
| 49014 | case 1430: /* *mulv8df3_round */ |
| 49015 | case 1429: /* *mulv8df3 */ |
| 49016 | case 1428: /* *mulv4sf3_mask_round */ |
| 49017 | case 1427: /* *mulv4sf3_mask */ |
| 49018 | case 1426: /* *mulv4sf3_round */ |
| 49019 | case 1425: /* *mulv4sf3 */ |
| 49020 | case 1420: /* *mulv16sf3_mask_round */ |
| 49021 | case 1419: /* *mulv16sf3_mask */ |
| 49022 | case 1418: /* *mulv16sf3_round */ |
| 49023 | case 1417: /* *mulv16sf3 */ |
| 49024 | case 1416: /* sse2_vmsubv2df3_round */ |
| 49025 | case 1415: /* sse2_vmsubv2df3 */ |
| 49026 | case 1414: /* sse2_vmaddv2df3_round */ |
| 49027 | case 1413: /* sse2_vmaddv2df3 */ |
| 49028 | case 1412: /* sse_vmsubv4sf3_round */ |
| 49029 | case 1411: /* sse_vmsubv4sf3 */ |
| 49030 | case 1410: /* sse_vmaddv4sf3_round */ |
| 49031 | case 1409: /* sse_vmaddv4sf3 */ |
| 49032 | case 1408: /* *subv2df3_mask_round */ |
| 49033 | case 1407: /* *subv2df3_mask */ |
| 49034 | case 1406: /* *subv2df3_round */ |
| 49035 | case 1405: /* *subv2df3 */ |
| 49036 | case 1404: /* *addv2df3_mask_round */ |
| 49037 | case 1403: /* *addv2df3_mask */ |
| 49038 | case 1402: /* *addv2df3_round */ |
| 49039 | case 1401: /* *addv2df3 */ |
| 49040 | case 1392: /* *subv8df3_mask_round */ |
| 49041 | case 1391: /* *subv8df3_mask */ |
| 49042 | case 1390: /* *subv8df3_round */ |
| 49043 | case 1389: /* *subv8df3 */ |
| 49044 | case 1388: /* *addv8df3_mask_round */ |
| 49045 | case 1387: /* *addv8df3_mask */ |
| 49046 | case 1386: /* *addv8df3_round */ |
| 49047 | case 1385: /* *addv8df3 */ |
| 49048 | case 1384: /* *subv4sf3_mask_round */ |
| 49049 | case 1383: /* *subv4sf3_mask */ |
| 49050 | case 1382: /* *subv4sf3_round */ |
| 49051 | case 1381: /* *subv4sf3 */ |
| 49052 | case 1380: /* *addv4sf3_mask_round */ |
| 49053 | case 1379: /* *addv4sf3_mask */ |
| 49054 | case 1378: /* *addv4sf3_round */ |
| 49055 | case 1377: /* *addv4sf3 */ |
| 49056 | case 1368: /* *subv16sf3_mask_round */ |
| 49057 | case 1367: /* *subv16sf3_mask */ |
| 49058 | case 1366: /* *subv16sf3_round */ |
| 49059 | case 1365: /* *subv16sf3 */ |
| 49060 | case 1364: /* *addv16sf3_mask_round */ |
| 49061 | case 1363: /* *addv16sf3_mask */ |
| 49062 | case 1362: /* *addv16sf3_round */ |
| 49063 | case 1361: /* *addv16sf3 */ |
| 49064 | case 992: /* *ieee_smindf3 */ |
| 49065 | case 991: /* *ieee_smaxdf3 */ |
| 49066 | case 990: /* *ieee_sminsf3 */ |
| 49067 | case 989: /* *ieee_smaxsf3 */ |
| 49068 | case 988: /* smindf3 */ |
| 49069 | case 987: /* smaxdf3 */ |
| 49070 | case 986: /* sminsf3 */ |
| 49071 | case 985: /* smaxsf3 */ |
| 49072 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) |
| 49073 | { |
| 49074 | return 10 /* 0xa */; |
| 49075 | } |
| 49076 | else if (cached_memory == MEMORY_NONE) |
| 49077 | { |
| 49078 | return 6; |
| 49079 | } |
| 49080 | else |
| 49081 | { |
| 49082 | return 0; |
| 49083 | } |
| 49084 | |
| 49085 | case 980: /* *movxfcc_1 */ |
| 49086 | return 15 /* 0xf */; |
| 49087 | |
| 49088 | case 962: /* *rep_stosqi */ |
| 49089 | case 961: /* *rep_stosqi */ |
| 49090 | case 960: /* *rep_stossi */ |
| 49091 | case 959: /* *rep_stossi */ |
| 49092 | case 958: /* *rep_stosdi_rex64 */ |
| 49093 | case 957: /* *rep_stosdi_rex64 */ |
| 49094 | case 956: /* *strsetqi_1 */ |
| 49095 | case 955: /* *strsetqi_1 */ |
| 49096 | case 954: /* *strsethi_1 */ |
| 49097 | case 953: /* *strsethi_1 */ |
| 49098 | case 952: /* *strsetsi_1 */ |
| 49099 | case 951: /* *strsetsi_1 */ |
| 49100 | case 950: /* *strsetdi_rex_1 */ |
| 49101 | case 949: /* *strsetdi_rex_1 */ |
| 49102 | case 948: /* *rep_movqi */ |
| 49103 | case 947: /* *rep_movqi */ |
| 49104 | case 946: /* *rep_movsi */ |
| 49105 | case 945: /* *rep_movsi */ |
| 49106 | case 944: /* *rep_movdi_rex64 */ |
| 49107 | case 943: /* *rep_movdi_rex64 */ |
| 49108 | case 942: /* *strmovqi_1 */ |
| 49109 | case 941: /* *strmovqi_1 */ |
| 49110 | case 940: /* *strmovhi_1 */ |
| 49111 | case 939: /* *strmovhi_1 */ |
| 49112 | case 938: /* *strmovsi_1 */ |
| 49113 | case 937: /* *strmovsi_1 */ |
| 49114 | case 936: /* *strmovdi_rex_1 */ |
| 49115 | case 935: /* *strmovdi_rex_1 */ |
| 49116 | return 6; |
| 49117 | |
| 49118 | case 4754: /* avx512vl_compressstorev4df_mask */ |
| 49119 | case 4753: /* avx512vl_compressstorev4di_mask */ |
| 49120 | case 4752: /* avx512vl_compressstorev8sf_mask */ |
| 49121 | case 4751: /* avx512vl_compressstorev8si_mask */ |
| 49122 | case 1291: /* avx512vl_storev16hi_mask */ |
| 49123 | case 1289: /* avx512vl_storev32qi_mask */ |
| 49124 | case 1285: /* avx512vl_storev4df_mask */ |
| 49125 | case 1282: /* avx512vl_storev8sf_mask */ |
| 49126 | case 1279: /* avx512vl_storev4di_mask */ |
| 49127 | case 1276: /* avx512vl_storev8si_mask */ |
| 49128 | case 1098: /* *bnd64_ldx */ |
| 49129 | case 1097: /* *bnd32_ldx */ |
| 49130 | case 1050: /* fldenv */ |
| 49131 | case 1048: /* xrstors64 */ |
| 49132 | case 1047: /* xrstor64 */ |
| 49133 | case 1046: /* xrstors_rex64 */ |
| 49134 | case 1045: /* xrstor_rex64 */ |
| 49135 | case 1044: /* xrstors */ |
| 49136 | case 1043: /* xrstor */ |
| 49137 | case 1030: /* fxrstor64 */ |
| 49138 | case 1029: /* fxrstor */ |
| 49139 | case 805: /* *add_tp_di */ |
| 49140 | case 804: /* *add_tp_si */ |
| 49141 | case 803: /* *add_tp_x32_zext */ |
| 49142 | case 802: /* *add_tp_x32 */ |
| 49143 | return 5; |
| 49144 | |
| 49145 | case 4427: /* avx_maskstoreps256 */ |
| 49146 | case 4419: /* avx_maskloadps256 */ |
| 49147 | case 3771: /* sse4a_insertq */ |
| 49148 | case 3770: /* sse4a_insertqi */ |
| 49149 | case 2522: /* vec_extract_hi_v8sf */ |
| 49150 | case 2520: /* vec_extract_hi_v8sf_mask */ |
| 49151 | case 2518: /* vec_extract_hi_v8sf_maskm */ |
| 49152 | case 2516: /* vec_extract_lo_v8sf_maskm */ |
| 49153 | case 2514: /* vec_extract_lo_v8sf_mask */ |
| 49154 | case 2513: /* vec_extract_lo_v8sf */ |
| 49155 | case 2456: /* avx2_vec_dupv8sf_1 */ |
| 49156 | case 2454: /* avx2_vec_dupv8sf */ |
| 49157 | case 704: /* leave_rex64 */ |
| 49158 | case 703: /* leave */ |
| 49159 | return 3; |
| 49160 | |
| 49161 | case 693: /* simple_return_indirect_internal */ |
| 49162 | case 663: /* *tablejump_1 */ |
| 49163 | case 662: /* *tablejump_1 */ |
| 49164 | case 661: /* *indirect_jump */ |
| 49165 | case 660: /* *indirect_jump */ |
| 49166 | extract_constrain_insn_cached (insn); |
| 49167 | if (((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) || ( |
| 49168 | #line 12442 "/___NETBSD_SRC___/tools/gcc/../../external/gpl3/gcc/dist/gcc/config/i386/i386.md" |
| 49169 | ((cfun->machine->indirect_branch_type |
| 49170 | != indirect_branch_keep)))) |
| 49171 | { |
| 49172 | return 1; |
| 49173 | } |
| 49174 | else if (cached_memory == MEMORY_LOAD) |
| 49175 | { |
| 49176 | return 5; |
| 49177 | } |
| 49178 | else |
| 49179 | { |
| 49180 | return 0; |
| 49181 | } |
| 49182 | |
| 49183 | case 624: /* *setcc_qi_slp */ |
| 49184 | case 623: /* *setcc_qi */ |
| 49185 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) |
| 49186 | { |
| 49187 | return 1; |
| 49188 | } |
| 49189 | else if (cached_memory == MEMORY_STORE) |
| 49190 | { |
| 49191 | return 4; |
| 49192 | } |
| 49193 | else |
| 49194 | { |
| 49195 | return 0; |
| 49196 | } |
| 49197 | |
| 49198 | case 344: /* *mulvhi4 */ |
| 49199 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) |
| 49200 | { |
| 49201 | return 4; |
| 49202 | } |
| 49203 | else if ((cached_memory == MEMORY_LOAD) || (cached_memory == MEMORY_BOTH)) |
| 49204 | { |
| 49205 | return 8; |
| 49206 | } |
| 49207 | else |
| 49208 | { |
| 49209 | return 0; |
| 49210 | } |
| 49211 | |
| 49212 | case 3713: /* *ssse3_pmulhrswv4hi3 */ |
| 49213 | case 3712: /* *ssse3_pmulhrswv8hi3_mask */ |
| 49214 | case 3711: /* *ssse3_pmulhrswv8hi3 */ |
| 49215 | case 3710: /* *avx2_pmulhrswv16hi3_mask */ |
| 49216 | case 3709: /* *avx2_pmulhrswv16hi3 */ |
| 49217 | case 3708: /* *avx512bw_pmulhrswv32hi3_mask */ |
| 49218 | case 3707: /* *avx512bw_pmulhrswv32hi3 */ |
| 49219 | case 3704: /* avx512bw_umulhrswv32hi3_mask */ |
| 49220 | case 3703: /* avx512bw_umulhrswv32hi3 */ |
| 49221 | case 3079: /* *sse4_1_mulv4si3_mask */ |
| 49222 | case 3078: /* *sse4_1_mulv4si3 */ |
| 49223 | case 3077: /* *avx2_mulv8si3_mask */ |
| 49224 | case 3076: /* *avx2_mulv8si3 */ |
| 49225 | case 3075: /* *avx512f_mulv16si3_mask */ |
| 49226 | case 3074: /* *avx512f_mulv16si3 */ |
| 49227 | case 3073: /* avx512dq_mulv2di3_mask */ |
| 49228 | case 3072: /* avx512dq_mulv2di3 */ |
| 49229 | case 3071: /* avx512dq_mulv4di3_mask */ |
| 49230 | case 3070: /* avx512dq_mulv4di3 */ |
| 49231 | case 3069: /* avx512dq_mulv8di3_mask */ |
| 49232 | case 3068: /* avx512dq_mulv8di3 */ |
| 49233 | case 3059: /* *sse4_1_mulv2siv2di3_mask */ |
| 49234 | case 3058: /* *sse4_1_mulv2siv2di3 */ |
| 49235 | case 3057: /* *vec_widen_smult_even_v8si_mask */ |
| 49236 | case 3056: /* *vec_widen_smult_even_v8si */ |
| 49237 | case 3055: /* *vec_widen_smult_even_v16si_mask */ |
| 49238 | case 3054: /* *vec_widen_smult_even_v16si */ |
| 49239 | case 3053: /* *vec_widen_umult_even_v4si_mask */ |
| 49240 | case 3052: /* *vec_widen_umult_even_v4si */ |
| 49241 | case 3051: /* *vec_widen_umult_even_v8si_mask */ |
| 49242 | case 3050: /* *vec_widen_umult_even_v8si */ |
| 49243 | case 3049: /* *vec_widen_umult_even_v16si_mask */ |
| 49244 | case 3048: /* *vec_widen_umult_even_v16si */ |
| 49245 | case 3047: /* *umulv8hi3_highpart_mask */ |
| 49246 | case 3046: /* *umulv8hi3_highpart */ |
| 49247 | case 3045: /* *smulv8hi3_highpart_mask */ |
| 49248 | case 3044: /* *smulv8hi3_highpart */ |
| 49249 | case 3043: /* *umulv16hi3_highpart_mask */ |
| 49250 | case 3042: /* *umulv16hi3_highpart */ |
| 49251 | case 3041: /* *smulv16hi3_highpart_mask */ |
| 49252 | case 3040: /* *smulv16hi3_highpart */ |
| 49253 | case 3039: /* *umulv32hi3_highpart_mask */ |
| 49254 | case 3038: /* *umulv32hi3_highpart */ |
| 49255 | case 3037: /* *smulv32hi3_highpart_mask */ |
| 49256 | case 3036: /* *smulv32hi3_highpart */ |
| 49257 | case 3035: /* *mulv8hi3_mask */ |
| 49258 | case 3034: /* *mulv8hi3 */ |
| 49259 | case 3033: /* *mulv16hi3_mask */ |
| 49260 | case 3032: /* *mulv16hi3 */ |
| 49261 | case 3031: /* *mulv32hi3_mask */ |
| 49262 | case 3030: /* *mulv32hi3 */ |
| 49263 | case 2226: /* sse2_cvttsd2siq_round */ |
| 49264 | case 2225: /* sse2_cvttsd2siq */ |
| 49265 | case 2224: /* sse2_cvttsd2si_round */ |
| 49266 | case 2223: /* sse2_cvttsd2si */ |
| 49267 | case 2222: /* sse2_cvtsd2siq_2 */ |
| 49268 | case 2221: /* sse2_cvtsd2siq_round */ |
| 49269 | case 2220: /* sse2_cvtsd2siq */ |
| 49270 | case 2219: /* sse2_cvtsd2si_2 */ |
| 49271 | case 2218: /* sse2_cvtsd2si_round */ |
| 49272 | case 2217: /* sse2_cvtsd2si */ |
| 49273 | case 2216: /* avx512f_vcvttsd2usiq_round */ |
| 49274 | case 2215: /* avx512f_vcvttsd2usiq */ |
| 49275 | case 2214: /* avx512f_vcvttsd2usi_round */ |
| 49276 | case 2213: /* avx512f_vcvttsd2usi */ |
| 49277 | case 2212: /* avx512f_vcvtsd2usiq_round */ |
| 49278 | case 2211: /* avx512f_vcvtsd2usiq */ |
| 49279 | case 2210: /* avx512f_vcvtsd2usi_round */ |
| 49280 | case 2209: /* avx512f_vcvtsd2usi */ |
| 49281 | case 2208: /* avx512f_vcvttss2usiq_round */ |
| 49282 | case 2207: /* avx512f_vcvttss2usiq */ |
| 49283 | case 2206: /* avx512f_vcvttss2usi_round */ |
| 49284 | case 2205: /* avx512f_vcvttss2usi */ |
| 49285 | case 2204: /* avx512f_vcvtss2usiq_round */ |
| 49286 | case 2203: /* avx512f_vcvtss2usiq */ |
| 49287 | case 2202: /* avx512f_vcvtss2usi_round */ |
| 49288 | case 2201: /* avx512f_vcvtss2usi */ |
| 49289 | case 2200: /* sse2_cvtsi2sdq_round */ |
| 49290 | case 2199: /* sse2_cvtsi2sdq */ |
| 49291 | case 2198: /* sse2_cvtsi2sd */ |
| 49292 | case 2126: /* cvtusi2sd64_round */ |
| 49293 | case 2125: /* cvtusi2sd64 */ |
| 49294 | case 2124: /* cvtusi2ss64_round */ |
| 49295 | case 2123: /* cvtusi2ss64 */ |
| 49296 | case 2122: /* cvtusi2sd32 */ |
| 49297 | case 2121: /* cvtusi2ss32_round */ |
| 49298 | case 2120: /* cvtusi2ss32 */ |
| 49299 | case 2119: /* sse_cvttss2siq_round */ |
| 49300 | case 2118: /* sse_cvttss2siq */ |
| 49301 | case 2117: /* sse_cvttss2si_round */ |
| 49302 | case 2116: /* sse_cvttss2si */ |
| 49303 | case 2115: /* sse_cvtss2siq_2 */ |
| 49304 | case 2114: /* sse_cvtss2siq_round */ |
| 49305 | case 2113: /* sse_cvtss2siq */ |
| 49306 | case 2112: /* sse_cvtss2si_2 */ |
| 49307 | case 2111: /* sse_cvtss2si_round */ |
| 49308 | case 2110: /* sse_cvtss2si */ |
| 49309 | case 2109: /* sse_cvtsi2ssq_round */ |
| 49310 | case 2108: /* sse_cvtsi2ssq */ |
| 49311 | case 2107: /* sse_cvtsi2ss_round */ |
| 49312 | case 2106: /* sse_cvtsi2ss */ |
| 49313 | case 173: /* fix_truncdfdi_sse */ |
| 49314 | case 172: /* fix_truncdfsi_sse */ |
| 49315 | case 171: /* fix_truncsfdi_sse */ |
| 49316 | case 170: /* fix_truncsfsi_sse */ |
| 49317 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) |
| 49318 | { |
| 49319 | return 8; |
| 49320 | } |
| 49321 | else if (cached_memory == MEMORY_NONE) |
| 49322 | { |
| 49323 | return 4; |
| 49324 | } |
| 49325 | else |
| 49326 | { |
| 49327 | return 0; |
| 49328 | } |
| 49329 | |
| 49330 | case 163: /* *truncxfdf2_mixed */ |
| 49331 | case 162: /* *truncxfsf2_mixed */ |
| 49332 | case 160: /* *truncdfsf_i387 */ |
| 49333 | extract_constrain_insn_cached (insn); |
| 49334 | if ((which_alternative == 0) && (get_attr_memory (insn) == MEMORY_LOAD)) |
| 49335 | { |
| 49336 | return 5; |
| 49337 | } |
| 49338 | else if (which_alternative == 0) |
| 49339 | { |
| 49340 | return 2; |
| 49341 | } |
| 49342 | else |
| 49343 | { |
| 49344 | return 0; |
| 49345 | } |
| 49346 | |
| 49347 | case 4935: /* storedi_via_fpu */ |
| 49348 | case 4934: /* loaddi_via_fpu */ |
| 49349 | case 841: /* truncxfdf2_i387_noop_unspec */ |
| 49350 | case 840: /* truncxfsf2_i387_noop_unspec */ |
| 49351 | case 206: /* *floatdidf2_i387 */ |
| 49352 | case 205: /* *floatdisf2_i387 */ |
| 49353 | case 204: /* *floatsidf2_i387 */ |
| 49354 | case 203: /* *floatsisf2_i387 */ |
| 49355 | case 195: /* floathidf2 */ |
| 49356 | case 194: /* floathisf2 */ |
| 49357 | case 167: /* *truncxfdf2_i387 */ |
| 49358 | case 166: /* *truncxfsf2_i387 */ |
| 49359 | case 165: /* truncxfdf2_i387_noop */ |
| 49360 | case 164: /* truncxfsf2_i387_noop */ |
| 49361 | case 161: /* *truncdfsf2_i387_1 */ |
| 49362 | case 158: /* *truncdfsf_fast_i387 */ |
| 49363 | if (get_attr_memory (insn) == MEMORY_LOAD) |
| 49364 | { |
| 49365 | return 5; |
| 49366 | } |
| 49367 | else |
| 49368 | { |
| 49369 | return 2; |
| 49370 | } |
| 49371 | |
| 49372 | case 4869: /* sha256rnds2 */ |
| 49373 | case 4868: /* sha256msg2 */ |
| 49374 | case 4867: /* sha256msg1 */ |
| 49375 | case 4866: /* sha1rnds4 */ |
| 49376 | case 4865: /* sha1nexte */ |
| 49377 | case 4864: /* sha1msg2 */ |
| 49378 | case 4863: /* sha1msg1 */ |
| 49379 | case 4838: /* avx512bw_dbpsadbwv32hi_mask */ |
| 49380 | case 4837: /* *avx512bw_dbpsadbwv32hi */ |
| 49381 | case 4836: /* avx512bw_dbpsadbwv16hi_mask */ |
| 49382 | case 4835: /* *avx512bw_dbpsadbwv16hi */ |
| 49383 | case 4834: /* avx512bw_dbpsadbwv8hi_mask */ |
| 49384 | case 4833: /* *avx512bw_dbpsadbwv8hi */ |
| 49385 | case 4432: /* avx2_maskstoreq256 */ |
| 49386 | case 4431: /* avx2_maskstored256 */ |
| 49387 | case 4430: /* avx2_maskstoreq */ |
| 49388 | case 4429: /* avx2_maskstored */ |
| 49389 | case 4428: /* avx_maskstorepd256 */ |
| 49390 | case 4426: /* avx_maskstorepd */ |
| 49391 | case 4425: /* avx_maskstoreps */ |
| 49392 | case 4424: /* avx2_maskloadq256 */ |
| 49393 | case 4423: /* avx2_maskloadd256 */ |
| 49394 | case 4422: /* avx2_maskloadq */ |
| 49395 | case 4421: /* avx2_maskloadd */ |
| 49396 | case 4420: /* avx_maskloadpd256 */ |
| 49397 | case 4418: /* avx_maskloadpd */ |
| 49398 | case 4417: /* avx_maskloadps */ |
| 49399 | case 4110: /* avx2_vec_dupv4df */ |
| 49400 | case 4054: /* pclmulqdq */ |
| 49401 | case 4053: /* aeskeygenassist */ |
| 49402 | case 4052: /* aesimc */ |
| 49403 | case 4051: /* aesdeclast */ |
| 49404 | case 4050: /* aesdec */ |
| 49405 | case 4049: /* aesenclast */ |
| 49406 | case 4048: /* aesenc */ |
| 49407 | case 3801: /* sse4_1_phminposuw */ |
| 49408 | case 3788: /* sse4_1_mpsadbw */ |
| 49409 | case 3787: /* avx2_mpsadbw */ |
| 49410 | case 3763: /* absv2si2 */ |
| 49411 | case 3762: /* absv4hi2 */ |
| 49412 | case 3761: /* absv8qi2 */ |
| 49413 | case 3760: /* absv8hi2_mask */ |
| 49414 | case 3759: /* absv16hi2_mask */ |
| 49415 | case 3758: /* absv32hi2_mask */ |
| 49416 | case 3757: /* absv32qi2_mask */ |
| 49417 | case 3756: /* absv16qi2_mask */ |
| 49418 | case 3755: /* absv64qi2_mask */ |
| 49419 | case 3754: /* absv2di2_mask */ |
| 49420 | case 3753: /* absv4di2_mask */ |
| 49421 | case 3752: /* absv8di2_mask */ |
| 49422 | case 3751: /* absv4si2_mask */ |
| 49423 | case 3750: /* absv8si2_mask */ |
| 49424 | case 3749: /* absv16si2_mask */ |
| 49425 | case 3748: /* *absv2di2 */ |
| 49426 | case 3747: /* *absv4di2 */ |
| 49427 | case 3746: /* *absv8di2 */ |
| 49428 | case 3745: /* *absv4si2 */ |
| 49429 | case 3744: /* *absv8si2 */ |
| 49430 | case 3743: /* *absv16si2 */ |
| 49431 | case 3742: /* *absv8hi2 */ |
| 49432 | case 3741: /* *absv16hi2 */ |
| 49433 | case 3740: /* *absv32hi2 */ |
| 49434 | case 3739: /* *absv16qi2 */ |
| 49435 | case 3738: /* *absv32qi2 */ |
| 49436 | case 3737: /* *absv64qi2 */ |
| 49437 | case 3729: /* ssse3_psignv2si3 */ |
| 49438 | case 3728: /* ssse3_psignv4hi3 */ |
| 49439 | case 3727: /* ssse3_psignv8qi3 */ |
| 49440 | case 3726: /* ssse3_psignv4si3 */ |
| 49441 | case 3725: /* avx2_psignv8si3 */ |
| 49442 | case 3724: /* ssse3_psignv8hi3 */ |
| 49443 | case 3723: /* avx2_psignv16hi3 */ |
| 49444 | case 3722: /* ssse3_psignv16qi3 */ |
| 49445 | case 3721: /* avx2_psignv32qi3 */ |
| 49446 | case 3720: /* ssse3_pshufbv8qi3 */ |
| 49447 | case 3719: /* ssse3_pshufbv16qi3_mask */ |
| 49448 | case 3718: /* ssse3_pshufbv16qi3 */ |
| 49449 | case 3717: /* avx2_pshufbv32qi3_mask */ |
| 49450 | case 3716: /* avx2_pshufbv32qi3 */ |
| 49451 | case 3715: /* avx512bw_pshufbv64qi3_mask */ |
| 49452 | case 3714: /* avx512bw_pshufbv64qi3 */ |
| 49453 | case 3635: /* *vec_extractv4si_zext */ |
| 49454 | case 3626: /* *vec_extractv8hi_zext */ |
| 49455 | case 3625: /* *vec_extractv8hi_zext */ |
| 49456 | case 3624: /* *vec_extractv16qi_zext */ |
| 49457 | case 3623: /* *vec_extractv16qi_zext */ |
| 49458 | case 3622: /* *vec_extractv8hi */ |
| 49459 | case 3621: /* *vec_extractv16qi */ |
| 49460 | case 3607: /* sse2_pshufd_1_mask */ |
| 49461 | case 3606: /* sse2_pshufd_1 */ |
| 49462 | case 3605: /* avx2_pshufd_1_mask */ |
| 49463 | case 3604: /* avx2_pshufd_1 */ |
| 49464 | case 3603: /* avx512f_pshufd_1_mask */ |
| 49465 | case 3602: /* avx512f_pshufd_1 */ |
| 49466 | case 2734: /* vec_dupv2df_mask */ |
| 49467 | case 2733: /* vec_dupv2df */ |
| 49468 | case 2530: /* vec_extract_hi_v32qi */ |
| 49469 | case 2528: /* vec_extract_hi_v64qi */ |
| 49470 | case 2526: /* vec_extract_hi_v16hi */ |
| 49471 | case 2524: /* vec_extract_hi_v32hi */ |
| 49472 | case 2521: /* vec_extract_hi_v8si */ |
| 49473 | case 2519: /* vec_extract_hi_v8si_mask */ |
| 49474 | case 2517: /* vec_extract_hi_v8si_maskm */ |
| 49475 | case 2515: /* vec_extract_lo_v8si_maskm */ |
| 49476 | case 2512: /* vec_extract_lo_v8si_mask */ |
| 49477 | case 2511: /* vec_extract_lo_v8si */ |
| 49478 | case 2510: /* vec_extract_hi_v4df_mask */ |
| 49479 | case 2509: /* vec_extract_hi_v4df */ |
| 49480 | case 2508: /* vec_extract_hi_v4di_mask */ |
| 49481 | case 2507: /* vec_extract_hi_v4di */ |
| 49482 | case 2506: /* vec_extract_lo_v4df_mask */ |
| 49483 | case 2505: /* vec_extract_lo_v4df */ |
| 49484 | case 2504: /* vec_extract_lo_v4di_mask */ |
| 49485 | case 2503: /* vec_extract_lo_v4di */ |
| 49486 | case 2498: /* vec_extract_hi_v16si_mask */ |
| 49487 | case 2497: /* vec_extract_hi_v16si */ |
| 49488 | case 2496: /* vec_extract_hi_v16sf_mask */ |
| 49489 | case 2495: /* vec_extract_hi_v16sf */ |
| 49490 | case 2494: /* vec_extract_hi_v16si_maskm */ |
| 49491 | case 2493: /* vec_extract_hi_v16sf_maskm */ |
| 49492 | case 2492: /* vec_extract_hi_v8di_mask */ |
| 49493 | case 2491: /* vec_extract_hi_v8di */ |
| 49494 | case 2490: /* vec_extract_hi_v8df_mask */ |
| 49495 | case 2489: /* vec_extract_hi_v8df */ |
| 49496 | case 2488: /* vec_extract_hi_v8di_maskm */ |
| 49497 | case 2487: /* vec_extract_hi_v8df_maskm */ |
| 49498 | case 2486: /* vec_extract_lo_v8di_mask */ |
| 49499 | case 2485: /* vec_extract_lo_v8di */ |
| 49500 | case 2484: /* vec_extract_lo_v8df_mask */ |
| 49501 | case 2483: /* vec_extract_lo_v8df */ |
| 49502 | case 2482: /* vec_extract_lo_v8di_maskm */ |
| 49503 | case 2481: /* vec_extract_lo_v8df_maskm */ |
| 49504 | case 2480: /* avx512f_vextracti32x4_1_mask */ |
| 49505 | case 2479: /* *avx512f_vextracti32x4_1 */ |
| 49506 | case 2478: /* avx512f_vextractf32x4_1_mask */ |
| 49507 | case 2477: /* *avx512f_vextractf32x4_1 */ |
| 49508 | case 2476: /* avx512dq_vextracti64x2_1_mask */ |
| 49509 | case 2475: /* *avx512dq_vextracti64x2_1 */ |
| 49510 | case 2474: /* avx512dq_vextractf64x2_1_mask */ |
| 49511 | case 2473: /* *avx512dq_vextractf64x2_1 */ |
| 49512 | case 2472: /* avx512f_vextracti32x4_1_maskm */ |
| 49513 | case 2471: /* avx512f_vextractf32x4_1_maskm */ |
| 49514 | case 2470: /* avx512dq_vextracti64x2_1_maskm */ |
| 49515 | case 2469: /* avx512dq_vextractf64x2_1_maskm */ |
| 49516 | case 2458: /* avx512f_vec_dupv8df_1 */ |
| 49517 | case 2457: /* avx512f_vec_dupv16sf_1 */ |
| 49518 | case 2455: /* avx2_vec_dupv4sf */ |
| 49519 | case 1020: /* sse4_2_crc32di */ |
| 49520 | case 1019: /* sse4_2_crc32si */ |
| 49521 | case 1018: /* sse4_2_crc32hi */ |
| 49522 | case 1017: /* sse4_2_crc32qi */ |
| 49523 | case 927: /* fistsi2_ceil_with_temp */ |
| 49524 | case 926: /* fistsi2_floor_with_temp */ |
| 49525 | case 925: /* fisthi2_ceil_with_temp */ |
| 49526 | case 924: /* fisthi2_floor_with_temp */ |
| 49527 | case 923: /* fistsi2_ceil */ |
| 49528 | case 922: /* fistsi2_floor */ |
| 49529 | case 921: /* fisthi2_ceil */ |
| 49530 | case 920: /* fisthi2_floor */ |
| 49531 | case 919: /* fistdi2_ceil_with_temp */ |
| 49532 | case 918: /* fistdi2_floor_with_temp */ |
| 49533 | case 917: /* fistdi2_ceil */ |
| 49534 | case 916: /* fistdi2_floor */ |
| 49535 | case 915: /* *fistdi2_ceil_1 */ |
| 49536 | case 914: /* *fistdi2_floor_1 */ |
| 49537 | case 913: /* *fistsi2_ceil_1 */ |
| 49538 | case 912: /* *fistsi2_floor_1 */ |
| 49539 | case 911: /* *fisthi2_ceil_1 */ |
| 49540 | case 910: /* *fisthi2_floor_1 */ |
| 49541 | case 495: /* *negextenddfxf2 */ |
| 49542 | case 494: /* *absextenddfxf2 */ |
| 49543 | case 493: /* *negextendsfxf2 */ |
| 49544 | case 492: /* *absextendsfxf2 */ |
| 49545 | case 491: /* *negextendsfdf2 */ |
| 49546 | case 490: /* *absextendsfdf2 */ |
| 49547 | case 489: /* *negxf2_1 */ |
| 49548 | case 488: /* *absxf2_1 */ |
| 49549 | case 487: /* *negdf2_1 */ |
| 49550 | case 486: /* *absdf2_1 */ |
| 49551 | case 485: /* *negsf2_1 */ |
| 49552 | case 484: /* *abssf2_1 */ |
| 49553 | case 191: /* fix_truncsi_i387_with_temp */ |
| 49554 | case 190: /* fix_trunchi_i387_with_temp */ |
| 49555 | case 189: /* fix_truncsi_i387 */ |
| 49556 | case 188: /* fix_trunchi_i387 */ |
| 49557 | case 187: /* fix_truncdi_i387_with_temp */ |
| 49558 | case 186: /* fix_truncdi_i387 */ |
| 49559 | case 185: /* *fix_truncdi_i387_1 */ |
| 49560 | case 184: /* *fix_truncsi_i387_1 */ |
| 49561 | case 183: /* *fix_trunchi_i387_1 */ |
| 49562 | case 182: /* fix_truncdi_i387_fisttp_with_temp */ |
| 49563 | case 181: /* fix_truncsi_i387_fisttp_with_temp */ |
| 49564 | case 180: /* fix_trunchi_i387_fisttp_with_temp */ |
| 49565 | case 179: /* fix_truncdi_i387_fisttp */ |
| 49566 | case 178: /* fix_truncsi_i387_fisttp */ |
| 49567 | case 177: /* fix_trunchi_i387_fisttp */ |
| 49568 | case 176: /* fix_truncdi_fisttp_i387_1 */ |
| 49569 | case 175: /* fix_truncsi_fisttp_i387_1 */ |
| 49570 | case 174: /* fix_trunchi_fisttp_i387_1 */ |
| 49571 | case 130: /* *swapdf */ |
| 49572 | case 129: /* *swapsf */ |
| 49573 | case 128: /* swapxf */ |
| 49574 | return 2; |
| 49575 | |
| 49576 | case 123: /* *pushsf */ |
| 49577 | case 122: /* *pushsf_rex64 */ |
| 49578 | extract_constrain_insn_cached (insn); |
| 49579 | if (which_alternative != 0) |
| 49580 | { |
| 49581 | return 1; |
| 49582 | } |
| 49583 | else |
| 49584 | { |
| 49585 | return 0; |
| 49586 | } |
| 49587 | |
| 49588 | case 121: /* *pushdf */ |
| 49589 | extract_constrain_insn_cached (insn); |
| 49590 | if (((1 << which_alternative) & 0x1e)) |
| 49591 | { |
| 49592 | return 1; |
| 49593 | } |
| 49594 | else |
| 49595 | { |
| 49596 | return 0; |
| 49597 | } |
| 49598 | |
| 49599 | case 120: /* *pushxf */ |
| 49600 | case 119: /* *pushxf_rounded */ |
| 49601 | case 118: /* *pushxf_rounded */ |
| 49602 | case 117: /* *pushtf */ |
| 49603 | extract_constrain_insn_cached (insn); |
| 49604 | if (which_alternative != 0) |
| 49605 | { |
| 49606 | return 1; |
| 49607 | } |
| 49608 | else |
| 49609 | { |
| 49610 | return 0; |
| 49611 | } |
| 49612 | |
| 49613 | case 96: /* *swaphi */ |
| 49614 | case 95: /* *swapqi */ |
| 49615 | case 94: /* *swapdi */ |
| 49616 | case 93: /* *swapsi */ |
| 49617 | if (((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) || (cached_memory == MEMORY_STORE)) |
| 49618 | { |
| 49619 | return 4; |
| 49620 | } |
| 49621 | else |
| 49622 | { |
| 49623 | return 0; |
| 49624 | } |
| 49625 | |
| 49626 | case 4758: /* avx512vl_compressstorev2df_mask */ |
| 49627 | case 4757: /* avx512vl_compressstorev2di_mask */ |
| 49628 | case 4756: /* avx512vl_compressstorev4sf_mask */ |
| 49629 | case 4755: /* avx512vl_compressstorev4si_mask */ |
| 49630 | case 4750: /* avx512f_compressstorev8df_mask */ |
| 49631 | case 4749: /* avx512f_compressstorev8di_mask */ |
| 49632 | case 4748: /* avx512f_compressstorev16sf_mask */ |
| 49633 | case 4747: /* avx512f_compressstorev16si_mask */ |
| 49634 | case 2933: /* avx512f_us_truncatev8div16qi2_mask_store */ |
| 49635 | case 2932: /* avx512f_truncatev8div16qi2_mask_store */ |
| 49636 | case 2931: /* avx512f_ss_truncatev8div16qi2_mask_store */ |
| 49637 | case 2924: /* *avx512f_us_truncatev8div16qi2_store */ |
| 49638 | case 2923: /* *avx512f_truncatev8div16qi2_store */ |
| 49639 | case 2922: /* *avx512f_ss_truncatev8div16qi2_store */ |
| 49640 | case 2918: /* avx512vl_us_truncatev2div2si2_mask_store */ |
| 49641 | case 2917: /* avx512vl_truncatev2div2si2_mask_store */ |
| 49642 | case 2916: /* avx512vl_ss_truncatev2div2si2_mask_store */ |
| 49643 | case 2909: /* *avx512vl_us_truncatev2div2si2_store */ |
| 49644 | case 2908: /* *avx512vl_truncatev2div2si2_store */ |
| 49645 | case 2907: /* *avx512vl_ss_truncatev2div2si2_store */ |
| 49646 | case 2903: /* avx512vl_us_truncatev2div2hi2_mask_store */ |
| 49647 | case 2902: /* avx512vl_truncatev2div2hi2_mask_store */ |
| 49648 | case 2901: /* avx512vl_ss_truncatev2div2hi2_mask_store */ |
| 49649 | case 2894: /* *avx512vl_us_truncatev2div2hi2_store */ |
| 49650 | case 2893: /* *avx512vl_truncatev2div2hi2_store */ |
| 49651 | case 2892: /* *avx512vl_ss_truncatev2div2hi2_store */ |
| 49652 | case 2891: /* avx512vl_us_truncatev4div4hi2_mask_store */ |
| 49653 | case 2890: /* avx512vl_truncatev4div4hi2_mask_store */ |
| 49654 | case 2889: /* avx512vl_ss_truncatev4div4hi2_mask_store */ |
| 49655 | case 2888: /* avx512vl_us_truncatev4siv4hi2_mask_store */ |
| 49656 | case 2887: /* avx512vl_truncatev4siv4hi2_mask_store */ |
| 49657 | case 2886: /* avx512vl_ss_truncatev4siv4hi2_mask_store */ |
| 49658 | case 2873: /* *avx512vl_us_truncatev4div4hi2_store */ |
| 49659 | case 2872: /* *avx512vl_truncatev4div4hi2_store */ |
| 49660 | case 2871: /* *avx512vl_ss_truncatev4div4hi2_store */ |
| 49661 | case 2870: /* *avx512vl_us_truncatev4siv4hi2_store */ |
| 49662 | case 2869: /* *avx512vl_truncatev4siv4hi2_store */ |
| 49663 | case 2868: /* *avx512vl_ss_truncatev4siv4hi2_store */ |
| 49664 | case 2858: /* avx512vl_us_truncatev8siv8qi2_mask_store */ |
| 49665 | case 2857: /* avx512vl_truncatev8siv8qi2_mask_store */ |
| 49666 | case 2856: /* avx512vl_ss_truncatev8siv8qi2_mask_store */ |
| 49667 | case 2855: /* avx512vl_us_truncatev8hiv8qi2_mask_store */ |
| 49668 | case 2854: /* avx512vl_truncatev8hiv8qi2_mask_store */ |
| 49669 | case 2853: /* avx512vl_ss_truncatev8hiv8qi2_mask_store */ |
| 49670 | case 2840: /* *avx512vl_us_truncatev8siv8qi2_store */ |
| 49671 | case 2839: /* *avx512vl_truncatev8siv8qi2_store */ |
| 49672 | case 2838: /* *avx512vl_ss_truncatev8siv8qi2_store */ |
| 49673 | case 2837: /* *avx512vl_us_truncatev8hiv8qi2_store */ |
| 49674 | case 2836: /* *avx512vl_truncatev8hiv8qi2_store */ |
| 49675 | case 2835: /* *avx512vl_ss_truncatev8hiv8qi2_store */ |
| 49676 | case 2834: /* avx512vl_us_truncatev4div4qi2_mask_store */ |
| 49677 | case 2833: /* avx512vl_truncatev4div4qi2_mask_store */ |
| 49678 | case 2832: /* avx512vl_ss_truncatev4div4qi2_mask_store */ |
| 49679 | case 2831: /* avx512vl_us_truncatev4siv4qi2_mask_store */ |
| 49680 | case 2830: /* avx512vl_truncatev4siv4qi2_mask_store */ |
| 49681 | case 2829: /* avx512vl_ss_truncatev4siv4qi2_mask_store */ |
| 49682 | case 2816: /* *avx512vl_us_truncatev4div4qi2_store */ |
| 49683 | case 2815: /* *avx512vl_truncatev4div4qi2_store */ |
| 49684 | case 2814: /* *avx512vl_ss_truncatev4div4qi2_store */ |
| 49685 | case 2813: /* *avx512vl_us_truncatev4siv4qi2_store */ |
| 49686 | case 2812: /* *avx512vl_truncatev4siv4qi2_store */ |
| 49687 | case 2811: /* *avx512vl_ss_truncatev4siv4qi2_store */ |
| 49688 | case 2810: /* avx512vl_us_truncatev2div2qi2_mask_store */ |
| 49689 | case 2809: /* avx512vl_truncatev2div2qi2_mask_store */ |
| 49690 | case 2808: /* avx512vl_ss_truncatev2div2qi2_mask_store */ |
| 49691 | case 2801: /* *avx512vl_us_truncatev2div2qi2_store */ |
| 49692 | case 2800: /* *avx512vl_truncatev2div2qi2_store */ |
| 49693 | case 2799: /* *avx512vl_ss_truncatev2div2qi2_store */ |
| 49694 | case 1292: /* avx512vl_storev8hi_mask */ |
| 49695 | case 1290: /* avx512bw_storev32hi_mask */ |
| 49696 | case 1288: /* avx512vl_storev16qi_mask */ |
| 49697 | case 1287: /* avx512bw_storev64qi_mask */ |
| 49698 | case 1286: /* avx512vl_storev2df_mask */ |
| 49699 | case 1284: /* avx512f_storev8df_mask */ |
| 49700 | case 1283: /* avx512vl_storev4sf_mask */ |
| 49701 | case 1281: /* avx512f_storev16sf_mask */ |
| 49702 | case 1280: /* avx512vl_storev2di_mask */ |
| 49703 | case 1278: /* avx512f_storev8di_mask */ |
| 49704 | case 1277: /* avx512vl_storev4si_mask */ |
| 49705 | case 1275: /* avx512f_storev16si_mask */ |
| 49706 | case 1100: /* *bnd64_stx */ |
| 49707 | case 1099: /* *bnd32_stx */ |
| 49708 | case 1049: /* fnstenv */ |
| 49709 | case 1042: /* xsaves64 */ |
| 49710 | case 1041: /* xsavec64 */ |
| 49711 | case 1040: /* xsaveopt64 */ |
| 49712 | case 1039: /* xsave64 */ |
| 49713 | case 1038: /* xsaves_rex64 */ |
| 49714 | case 1037: /* xsavec_rex64 */ |
| 49715 | case 1036: /* xsaveopt_rex64 */ |
| 49716 | case 1035: /* xsave_rex64 */ |
| 49717 | case 1034: /* xsaves */ |
| 49718 | case 1033: /* xsavec */ |
| 49719 | case 1032: /* xsaveopt */ |
| 49720 | case 1031: /* xsave */ |
| 49721 | case 1028: /* fxsave64 */ |
| 49722 | case 1027: /* fxsave */ |
| 49723 | case 801: /* *load_tp_di */ |
| 49724 | case 800: /* *load_tp_si */ |
| 49725 | case 799: /* *load_tp_x32_zext */ |
| 49726 | case 798: /* *load_tp_x32 */ |
| 49727 | case 92: /* *movabsdi_2 */ |
| 49728 | case 91: /* *movabssi_2 */ |
| 49729 | case 90: /* *movabshi_2 */ |
| 49730 | case 89: /* *movabsqi_2 */ |
| 49731 | case 88: /* *movabsdi_1 */ |
| 49732 | case 87: /* *movabssi_1 */ |
| 49733 | case 86: /* *movabshi_1 */ |
| 49734 | case 85: /* *movabsqi_1 */ |
| 49735 | return 4; |
| 49736 | |
| 49737 | case 1000: /* probe_stack_di */ |
| 49738 | case 999: /* probe_stack_si */ |
| 49739 | case 732: /* tzcnt_hi */ |
| 49740 | case 730: /* *tzcnt_di_falsedep */ |
| 49741 | case 728: /* *tzcnt_si_falsedep */ |
| 49742 | case 726: /* tzcnt_di */ |
| 49743 | case 724: /* tzcnt_si */ |
| 49744 | case 719: /* *bsrhi */ |
| 49745 | case 718: /* bsr */ |
| 49746 | case 717: /* bsr_rex64 */ |
| 49747 | case 716: /* *ctzdi2_falsedep */ |
| 49748 | case 715: /* *ctzsi2_falsedep */ |
| 49749 | case 714: /* ctzdi2 */ |
| 49750 | case 713: /* ctzsi2 */ |
| 49751 | case 712: /* *bsfdi_1 */ |
| 49752 | case 711: /* *bsfsi_1 */ |
| 49753 | case 710: /* *tzcntdi_1_falsedep */ |
| 49754 | case 709: /* *tzcntsi_1_falsedep */ |
| 49755 | case 708: /* *tzcntdi_1 */ |
| 49756 | case 707: /* *tzcntsi_1 */ |
| 49757 | case 613: /* *btdi */ |
| 49758 | case 612: /* *btsi */ |
| 49759 | case 611: /* *btcq */ |
| 49760 | case 610: /* *btrq */ |
| 49761 | case 609: /* *btsq */ |
| 49762 | case 608: /* *rotrqi3_1_slp */ |
| 49763 | case 607: /* *rotlqi3_1_slp */ |
| 49764 | case 567: /* *ashrqi3_1_slp */ |
| 49765 | case 566: /* *lshrqi3_1_slp */ |
| 49766 | case 512: /* *one_cmplsi2_2_zext */ |
| 49767 | case 511: /* *one_cmpldi2_2 */ |
| 49768 | case 510: /* *one_cmplsi2_2 */ |
| 49769 | case 509: /* *one_cmplhi2_2 */ |
| 49770 | case 508: /* *one_cmplqi2_2 */ |
| 49771 | case 507: /* *one_cmplqi2_1 */ |
| 49772 | case 506: /* *one_cmplsi2_1_zext */ |
| 49773 | case 505: /* *one_cmpldi2_1 */ |
| 49774 | case 504: /* *one_cmplsi2_1 */ |
| 49775 | case 503: /* *one_cmplhi2_1 */ |
| 49776 | case 479: /* *negvdi3 */ |
| 49777 | case 478: /* *negvsi3 */ |
| 49778 | case 477: /* *negvhi3 */ |
| 49779 | case 476: /* *negvqi3 */ |
| 49780 | case 475: /* *negsi2_cmpz_zext */ |
| 49781 | case 474: /* *negdi2_cmpz */ |
| 49782 | case 473: /* *negsi2_cmpz */ |
| 49783 | case 472: /* *neghi2_cmpz */ |
| 49784 | case 471: /* *negqi2_cmpz */ |
| 49785 | case 470: /* *negsi2_1_zext */ |
| 49786 | case 469: /* *negdi2_1 */ |
| 49787 | case 468: /* *negsi2_1 */ |
| 49788 | case 467: /* *neghi2_1 */ |
| 49789 | case 466: /* *negqi2_1 */ |
| 49790 | case 450: /* *xorqi_2_slp */ |
| 49791 | case 449: /* *iorqi_2_slp */ |
| 49792 | case 436: /* *xorqi_1_slp */ |
| 49793 | case 435: /* *iorqi_1_slp */ |
| 49794 | case 410: /* *andqi_2_slp */ |
| 49795 | case 403: /* *andqi_1_slp */ |
| 49796 | case 276: /* *subqi_1_slp */ |
| 49797 | case 138: /* zero_extendqihi2_and */ |
| 49798 | case 135: /* zero_extendhisi2_and */ |
| 49799 | case 134: /* zero_extendqisi2_and */ |
| 49800 | case 100: /* *movstricthi_xor */ |
| 49801 | case 99: /* *movstrictqi_xor */ |
| 49802 | case 77: /* *movdi_or */ |
| 49803 | case 76: /* *movsi_or */ |
| 49804 | case 75: /* *movdi_xor */ |
| 49805 | case 74: /* *movsi_xor */ |
| 49806 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) |
| 49807 | { |
| 49808 | return 1; |
| 49809 | } |
| 49810 | else if ((cached_memory == MEMORY_BOTH) || (cached_memory == MEMORY_STORE)) |
| 49811 | { |
| 49812 | return 4; |
| 49813 | } |
| 49814 | else |
| 49815 | { |
| 49816 | return 0; |
| 49817 | } |
| 49818 | |
| 49819 | case 4899: /* vpmultishiftqbv32qi_mask */ |
| 49820 | case 4898: /* vpmultishiftqbv32qi */ |
| 49821 | case 4897: /* vpmultishiftqbv16qi_mask */ |
| 49822 | case 4896: /* vpmultishiftqbv16qi */ |
| 49823 | case 4895: /* vpmultishiftqbv64qi_mask */ |
| 49824 | case 4894: /* vpmultishiftqbv64qi */ |
| 49825 | case 4416: /* vec_set_hi_v32qi */ |
| 49826 | case 4415: /* vec_set_lo_v32qi */ |
| 49827 | case 4414: /* vec_set_hi_v16hi */ |
| 49828 | case 4413: /* vec_set_lo_v16hi */ |
| 49829 | case 4410: /* vec_set_hi_v8si_mask */ |
| 49830 | case 4409: /* vec_set_hi_v8si */ |
| 49831 | case 4406: /* vec_set_lo_v8si_mask */ |
| 49832 | case 4405: /* vec_set_lo_v8si */ |
| 49833 | case 4404: /* vec_set_hi_v4df_mask */ |
| 49834 | case 4403: /* vec_set_hi_v4df */ |
| 49835 | case 4402: /* vec_set_hi_v4di_mask */ |
| 49836 | case 4401: /* vec_set_hi_v4di */ |
| 49837 | case 4400: /* vec_set_lo_v4df_mask */ |
| 49838 | case 4399: /* vec_set_lo_v4df */ |
| 49839 | case 4398: /* vec_set_lo_v4di_mask */ |
| 49840 | case 4397: /* vec_set_lo_v4di */ |
| 49841 | case 4390: /* *avx_vperm2f128v4df_nozero */ |
| 49842 | case 4388: /* *avx_vperm2f128v8si_nozero */ |
| 49843 | case 4387: /* *avx_vperm2f128v4df_full */ |
| 49844 | case 4385: /* *avx_vperm2f128v8si_full */ |
| 49845 | case 4384: /* avx512bw_vpermt2varv32hi3_mask */ |
| 49846 | case 4383: /* avx512vl_vpermt2varv16hi3_mask */ |
| 49847 | case 4382: /* avx512vl_vpermt2varv8hi3_mask */ |
| 49848 | case 4381: /* avx512vl_vpermt2varv32qi3_mask */ |
| 49849 | case 4380: /* avx512vl_vpermt2varv16qi3_mask */ |
| 49850 | case 4379: /* avx512bw_vpermt2varv64qi3_mask */ |
| 49851 | case 4378: /* avx512vl_vpermt2varv2df3_mask */ |
| 49852 | case 4377: /* avx512vl_vpermt2varv2di3_mask */ |
| 49853 | case 4376: /* avx512vl_vpermt2varv4sf3_mask */ |
| 49854 | case 4375: /* avx512vl_vpermt2varv4si3_mask */ |
| 49855 | case 4374: /* avx512vl_vpermt2varv4df3_mask */ |
| 49856 | case 4373: /* avx512vl_vpermt2varv4di3_mask */ |
| 49857 | case 4371: /* avx512vl_vpermt2varv8si3_mask */ |
| 49858 | case 4370: /* avx512f_vpermt2varv8df3_mask */ |
| 49859 | case 4369: /* avx512f_vpermt2varv8di3_mask */ |
| 49860 | case 4368: /* avx512f_vpermt2varv16sf3_mask */ |
| 49861 | case 4367: /* avx512f_vpermt2varv16si3_mask */ |
| 49862 | case 4366: /* avx512bw_vpermt2varv32hi3_maskz_1 */ |
| 49863 | case 4365: /* avx512bw_vpermt2varv32hi3 */ |
| 49864 | case 4364: /* avx512vl_vpermt2varv16hi3_maskz_1 */ |
| 49865 | case 4363: /* avx512vl_vpermt2varv16hi3 */ |
| 49866 | case 4362: /* avx512vl_vpermt2varv8hi3_maskz_1 */ |
| 49867 | case 4361: /* avx512vl_vpermt2varv8hi3 */ |
| 49868 | case 4360: /* avx512vl_vpermt2varv32qi3_maskz_1 */ |
| 49869 | case 4359: /* avx512vl_vpermt2varv32qi3 */ |
| 49870 | case 4358: /* avx512vl_vpermt2varv16qi3_maskz_1 */ |
| 49871 | case 4357: /* avx512vl_vpermt2varv16qi3 */ |
| 49872 | case 4356: /* avx512bw_vpermt2varv64qi3_maskz_1 */ |
| 49873 | case 4355: /* avx512bw_vpermt2varv64qi3 */ |
| 49874 | case 4354: /* avx512vl_vpermt2varv2df3_maskz_1 */ |
| 49875 | case 4353: /* avx512vl_vpermt2varv2df3 */ |
| 49876 | case 4352: /* avx512vl_vpermt2varv2di3_maskz_1 */ |
| 49877 | case 4351: /* avx512vl_vpermt2varv2di3 */ |
| 49878 | case 4350: /* avx512vl_vpermt2varv4sf3_maskz_1 */ |
| 49879 | case 4349: /* avx512vl_vpermt2varv4sf3 */ |
| 49880 | case 4348: /* avx512vl_vpermt2varv4si3_maskz_1 */ |
| 49881 | case 4347: /* avx512vl_vpermt2varv4si3 */ |
| 49882 | case 4346: /* avx512vl_vpermt2varv4df3_maskz_1 */ |
| 49883 | case 4345: /* avx512vl_vpermt2varv4df3 */ |
| 49884 | case 4344: /* avx512vl_vpermt2varv4di3_maskz_1 */ |
| 49885 | case 4343: /* avx512vl_vpermt2varv4di3 */ |
| 49886 | case 4340: /* avx512vl_vpermt2varv8si3_maskz_1 */ |
| 49887 | case 4339: /* avx512vl_vpermt2varv8si3 */ |
| 49888 | case 4338: /* avx512f_vpermt2varv8df3_maskz_1 */ |
| 49889 | case 4337: /* avx512f_vpermt2varv8df3 */ |
| 49890 | case 4336: /* avx512f_vpermt2varv8di3_maskz_1 */ |
| 49891 | case 4335: /* avx512f_vpermt2varv8di3 */ |
| 49892 | case 4334: /* avx512f_vpermt2varv16sf3_maskz_1 */ |
| 49893 | case 4333: /* avx512f_vpermt2varv16sf3 */ |
| 49894 | case 4332: /* avx512f_vpermt2varv16si3_maskz_1 */ |
| 49895 | case 4331: /* avx512f_vpermt2varv16si3 */ |
| 49896 | case 4330: /* avx512bw_vpermi2varv32hi3_mask */ |
| 49897 | case 4329: /* avx512vl_vpermi2varv16hi3_mask */ |
| 49898 | case 4328: /* avx512vl_vpermi2varv8hi3_mask */ |
| 49899 | case 4327: /* avx512vl_vpermi2varv32qi3_mask */ |
| 49900 | case 4326: /* avx512vl_vpermi2varv16qi3_mask */ |
| 49901 | case 4325: /* avx512bw_vpermi2varv64qi3_mask */ |
| 49902 | case 4324: /* avx512vl_vpermi2varv2df3_mask */ |
| 49903 | case 4323: /* avx512vl_vpermi2varv2di3_mask */ |
| 49904 | case 4322: /* avx512vl_vpermi2varv4sf3_mask */ |
| 49905 | case 4321: /* avx512vl_vpermi2varv4si3_mask */ |
| 49906 | case 4320: /* avx512vl_vpermi2varv4df3_mask */ |
| 49907 | case 4319: /* avx512vl_vpermi2varv4di3_mask */ |
| 49908 | case 4317: /* avx512vl_vpermi2varv8si3_mask */ |
| 49909 | case 4316: /* avx512f_vpermi2varv8df3_mask */ |
| 49910 | case 4315: /* avx512f_vpermi2varv8di3_mask */ |
| 49911 | case 4314: /* avx512f_vpermi2varv16sf3_mask */ |
| 49912 | case 4313: /* avx512f_vpermi2varv16si3_mask */ |
| 49913 | case 4312: /* avx512bw_vpermi2varv32hi3_maskz_1 */ |
| 49914 | case 4311: /* avx512bw_vpermi2varv32hi3 */ |
| 49915 | case 4310: /* avx512vl_vpermi2varv16hi3_maskz_1 */ |
| 49916 | case 4309: /* avx512vl_vpermi2varv16hi3 */ |
| 49917 | case 4308: /* avx512vl_vpermi2varv8hi3_maskz_1 */ |
| 49918 | case 4307: /* avx512vl_vpermi2varv8hi3 */ |
| 49919 | case 4306: /* avx512vl_vpermi2varv32qi3_maskz_1 */ |
| 49920 | case 4305: /* avx512vl_vpermi2varv32qi3 */ |
| 49921 | case 4304: /* avx512vl_vpermi2varv16qi3_maskz_1 */ |
| 49922 | case 4303: /* avx512vl_vpermi2varv16qi3 */ |
| 49923 | case 4302: /* avx512bw_vpermi2varv64qi3_maskz_1 */ |
| 49924 | case 4301: /* avx512bw_vpermi2varv64qi3 */ |
| 49925 | case 4300: /* avx512vl_vpermi2varv2df3_maskz_1 */ |
| 49926 | case 4299: /* avx512vl_vpermi2varv2df3 */ |
| 49927 | case 4298: /* avx512vl_vpermi2varv2di3_maskz_1 */ |
| 49928 | case 4297: /* avx512vl_vpermi2varv2di3 */ |
| 49929 | case 4296: /* avx512vl_vpermi2varv4sf3_maskz_1 */ |
| 49930 | case 4295: /* avx512vl_vpermi2varv4sf3 */ |
| 49931 | case 4294: /* avx512vl_vpermi2varv4si3_maskz_1 */ |
| 49932 | case 4293: /* avx512vl_vpermi2varv4si3 */ |
| 49933 | case 4292: /* avx512vl_vpermi2varv4df3_maskz_1 */ |
| 49934 | case 4291: /* avx512vl_vpermi2varv4df3 */ |
| 49935 | case 4290: /* avx512vl_vpermi2varv4di3_maskz_1 */ |
| 49936 | case 4289: /* avx512vl_vpermi2varv4di3 */ |
| 49937 | case 4286: /* avx512vl_vpermi2varv8si3_maskz_1 */ |
| 49938 | case 4285: /* avx512vl_vpermi2varv8si3 */ |
| 49939 | case 4284: /* avx512f_vpermi2varv8df3_maskz_1 */ |
| 49940 | case 4283: /* avx512f_vpermi2varv8df3 */ |
| 49941 | case 4282: /* avx512f_vpermi2varv8di3_maskz_1 */ |
| 49942 | case 4281: /* avx512f_vpermi2varv8di3 */ |
| 49943 | case 4280: /* avx512f_vpermi2varv16sf3_maskz_1 */ |
| 49944 | case 4279: /* avx512f_vpermi2varv16sf3 */ |
| 49945 | case 4278: /* avx512f_vpermi2varv16si3_maskz_1 */ |
| 49946 | case 4277: /* avx512f_vpermi2varv16si3 */ |
| 49947 | case 4276: /* avx_vpermilvarv2df3_mask */ |
| 49948 | case 4275: /* avx_vpermilvarv2df3 */ |
| 49949 | case 4274: /* avx_vpermilvarv4df3_mask */ |
| 49950 | case 4273: /* avx_vpermilvarv4df3 */ |
| 49951 | case 4272: /* avx512f_vpermilvarv8df3_mask */ |
| 49952 | case 4271: /* avx512f_vpermilvarv8df3 */ |
| 49953 | case 4270: /* avx_vpermilvarv4sf3_mask */ |
| 49954 | case 4269: /* avx_vpermilvarv4sf3 */ |
| 49955 | case 4266: /* avx512f_vpermilvarv16sf3_mask */ |
| 49956 | case 4265: /* avx512f_vpermilvarv16sf3 */ |
| 49957 | case 4264: /* *avx_vpermilpv2df_mask */ |
| 49958 | case 4263: /* *avx_vpermilpv2df */ |
| 49959 | case 4262: /* *avx_vpermilpv4df_mask */ |
| 49960 | case 4261: /* *avx_vpermilpv4df */ |
| 49961 | case 4260: /* *avx512f_vpermilpv8df_mask */ |
| 49962 | case 4259: /* *avx512f_vpermilpv8df */ |
| 49963 | case 4258: /* *avx_vpermilpv4sf_mask */ |
| 49964 | case 4257: /* *avx_vpermilpv4sf */ |
| 49965 | case 4254: /* *avx512f_vpermilpv16sf_mask */ |
| 49966 | case 4253: /* *avx512f_vpermilpv16sf */ |
| 49967 | case 4109: /* avx2_permv2ti */ |
| 49968 | case 4108: /* avx512f_permv8di_1_mask */ |
| 49969 | case 4107: /* avx512f_permv8di_1 */ |
| 49970 | case 4106: /* avx512f_permv8df_1_mask */ |
| 49971 | case 4105: /* avx512f_permv8df_1 */ |
| 49972 | case 4104: /* avx2_permv4df_1_mask */ |
| 49973 | case 4103: /* avx2_permv4df_1 */ |
| 49974 | case 4102: /* avx2_permv4di_1_mask */ |
| 49975 | case 4101: /* avx2_permv4di_1 */ |
| 49976 | case 4100: /* avx512bw_permvarv32hi_mask */ |
| 49977 | case 4099: /* avx512bw_permvarv32hi */ |
| 49978 | case 4098: /* avx512vl_permvarv16hi_mask */ |
| 49979 | case 4097: /* avx512vl_permvarv16hi */ |
| 49980 | case 4096: /* avx512vl_permvarv8hi_mask */ |
| 49981 | case 4095: /* avx512vl_permvarv8hi */ |
| 49982 | case 4094: /* avx512vl_permvarv32qi_mask */ |
| 49983 | case 4093: /* avx512vl_permvarv32qi */ |
| 49984 | case 4092: /* avx512vl_permvarv16qi_mask */ |
| 49985 | case 4091: /* avx512vl_permvarv16qi */ |
| 49986 | case 4090: /* avx512bw_permvarv64qi_mask */ |
| 49987 | case 4089: /* avx512bw_permvarv64qi */ |
| 49988 | case 4088: /* avx2_permvarv4df_mask */ |
| 49989 | case 4087: /* avx2_permvarv4df */ |
| 49990 | case 4086: /* avx2_permvarv4di_mask */ |
| 49991 | case 4085: /* avx2_permvarv4di */ |
| 49992 | case 4084: /* avx512f_permvarv8df_mask */ |
| 49993 | case 4083: /* avx512f_permvarv8df */ |
| 49994 | case 4082: /* avx512f_permvarv8di_mask */ |
| 49995 | case 4081: /* avx512f_permvarv8di */ |
| 49996 | case 4080: /* avx512f_permvarv16sf_mask */ |
| 49997 | case 4079: /* avx512f_permvarv16sf */ |
| 49998 | case 4078: /* avx512f_permvarv16si_mask */ |
| 49999 | case 4077: /* avx512f_permvarv16si */ |
| 50000 | case 4074: /* avx2_permvarv8si_mask */ |
| 50001 | case 4073: /* avx2_permvarv8si */ |
| 50002 | case 4043: /* xop_pcom_tfv2di3 */ |
| 50003 | case 4042: /* xop_pcom_tfv4si3 */ |
| 50004 | case 4041: /* xop_pcom_tfv8hi3 */ |
| 50005 | case 4040: /* xop_pcom_tfv16qi3 */ |
| 50006 | case 4039: /* xop_maskcmp_uns2v2di3 */ |
| 50007 | case 4038: /* xop_maskcmp_uns2v4si3 */ |
| 50008 | case 4037: /* xop_maskcmp_uns2v8hi3 */ |
| 50009 | case 4036: /* xop_maskcmp_uns2v16qi3 */ |
| 50010 | case 4035: /* xop_maskcmp_unsv2di3 */ |
| 50011 | case 4034: /* xop_maskcmp_unsv4si3 */ |
| 50012 | case 4033: /* xop_maskcmp_unsv8hi3 */ |
| 50013 | case 4032: /* xop_maskcmp_unsv16qi3 */ |
| 50014 | case 3890: /* ptesttf2 */ |
| 50015 | case 3889: /* avx_ptestv4df */ |
| 50016 | case 3888: /* avx_ptestv8sf */ |
| 50017 | case 3887: /* avx_ptestv4di */ |
| 50018 | case 3886: /* avx_ptestv8si */ |
| 50019 | case 3885: /* avx_ptestv16hi */ |
| 50020 | case 3884: /* avx_ptestv32qi */ |
| 50021 | case 3883: /* sse4_1_ptestv2df */ |
| 50022 | case 3882: /* sse4_1_ptestv4sf */ |
| 50023 | case 3881: /* sse4_1_ptestv2di */ |
| 50024 | case 3880: /* sse4_1_ptestv4si */ |
| 50025 | case 3879: /* sse4_1_ptestv8hi */ |
| 50026 | case 3878: /* sse4_1_ptestv16qi */ |
| 50027 | case 3877: /* avx_vtestpd */ |
| 50028 | case 3876: /* avx_vtestpd256 */ |
| 50029 | case 3875: /* avx_vtestps */ |
| 50030 | case 3874: /* avx_vtestps256 */ |
| 50031 | case 3794: /* sse4_1_packusdw_mask */ |
| 50032 | case 3793: /* sse4_1_packusdw */ |
| 50033 | case 3792: /* avx2_packusdw_mask */ |
| 50034 | case 3791: /* avx2_packusdw */ |
| 50035 | case 3790: /* avx512bw_packusdw_mask */ |
| 50036 | case 3789: /* avx512bw_packusdw */ |
| 50037 | case 3619: /* sse2_pshufhw_1_mask */ |
| 50038 | case 3618: /* sse2_pshufhw_1 */ |
| 50039 | case 3617: /* avx2_pshufhw_1_mask */ |
| 50040 | case 3616: /* avx2_pshufhw_1 */ |
| 50041 | case 3615: /* avx512bw_pshufhwv32hi_mask */ |
| 50042 | case 3614: /* *avx512bw_pshufhwv32hi */ |
| 50043 | case 3613: /* sse2_pshuflw_1_mask */ |
| 50044 | case 3612: /* sse2_pshuflw_1 */ |
| 50045 | case 3611: /* avx2_pshuflw_1_mask */ |
| 50046 | case 3610: /* avx2_pshuflw_1 */ |
| 50047 | case 3609: /* avx512bw_pshuflwv32hi_mask */ |
| 50048 | case 3608: /* *avx512bw_pshuflwv32hi */ |
| 50049 | case 3601: /* avx512f_shuf_i32x4_1_mask */ |
| 50050 | case 3600: /* avx512f_shuf_i32x4_1 */ |
| 50051 | case 3599: /* avx512f_shuf_f32x4_1_mask */ |
| 50052 | case 3598: /* avx512f_shuf_f32x4_1 */ |
| 50053 | case 3595: /* avx512vl_shuf_i32x4_1_mask */ |
| 50054 | case 3594: /* avx512vl_shuf_i32x4_1 */ |
| 50055 | case 3593: /* avx512f_shuf_i64x2_1_mask */ |
| 50056 | case 3592: /* avx512f_shuf_i64x2_1 */ |
| 50057 | case 3591: /* avx512f_shuf_f64x2_1_mask */ |
| 50058 | case 3590: /* avx512f_shuf_f64x2_1 */ |
| 50059 | case 3589: /* avx512dq_shuf_f64x2_1_mask */ |
| 50060 | case 3588: /* *avx512dq_shuf_f64x2_1 */ |
| 50061 | case 3587: /* avx512dq_shuf_i64x2_1_mask */ |
| 50062 | case 3586: /* *avx512dq_shuf_i64x2_1 */ |
| 50063 | case 3585: /* vec_set_hi_v8di_mask */ |
| 50064 | case 3584: /* vec_set_hi_v8di */ |
| 50065 | case 3583: /* vec_set_hi_v8df_mask */ |
| 50066 | case 3582: /* vec_set_hi_v8df */ |
| 50067 | case 3581: /* vec_set_lo_v8di_mask */ |
| 50068 | case 3580: /* vec_set_lo_v8di */ |
| 50069 | case 3579: /* vec_set_lo_v8df_mask */ |
| 50070 | case 3578: /* vec_set_lo_v8df */ |
| 50071 | case 3577: /* vec_set_hi_v16si_mask */ |
| 50072 | case 3576: /* vec_set_hi_v16si */ |
| 50073 | case 3575: /* vec_set_hi_v16sf_mask */ |
| 50074 | case 3574: /* vec_set_hi_v16sf */ |
| 50075 | case 3573: /* vec_set_lo_v16si_mask */ |
| 50076 | case 3572: /* vec_set_lo_v16si */ |
| 50077 | case 3571: /* vec_set_lo_v16sf_mask */ |
| 50078 | case 3570: /* vec_set_lo_v16sf */ |
| 50079 | case 3569: /* avx512f_vinserti32x4_1_mask */ |
| 50080 | case 3568: /* *avx512f_vinserti32x4_1 */ |
| 50081 | case 3567: /* avx512f_vinsertf32x4_1_mask */ |
| 50082 | case 3566: /* *avx512f_vinsertf32x4_1 */ |
| 50083 | case 3565: /* avx512dq_vinserti64x2_1_mask */ |
| 50084 | case 3564: /* *avx512dq_vinserti64x2_1 */ |
| 50085 | case 3563: /* avx512dq_vinsertf64x2_1_mask */ |
| 50086 | case 3562: /* *avx512dq_vinsertf64x2_1 */ |
| 50087 | case 3561: /* sse4_1_pinsrq */ |
| 50088 | case 3560: /* sse4_1_pinsrd */ |
| 50089 | case 3559: /* sse2_pinsrw */ |
| 50090 | case 3558: /* sse4_1_pinsrb */ |
| 50091 | case 3557: /* vec_interleave_lowv4si_mask */ |
| 50092 | case 3556: /* vec_interleave_lowv4si */ |
| 50093 | case 3555: /* avx512f_interleave_lowv16si_mask */ |
| 50094 | case 3554: /* *avx512f_interleave_lowv16si */ |
| 50095 | case 3553: /* avx2_interleave_lowv8si_mask */ |
| 50096 | case 3552: /* avx2_interleave_lowv8si */ |
| 50097 | case 3551: /* vec_interleave_highv4si_mask */ |
| 50098 | case 3550: /* vec_interleave_highv4si */ |
| 50099 | case 3549: /* avx512f_interleave_highv16si_mask */ |
| 50100 | case 3548: /* *avx512f_interleave_highv16si */ |
| 50101 | case 3547: /* avx2_interleave_highv8si_mask */ |
| 50102 | case 3546: /* avx2_interleave_highv8si */ |
| 50103 | case 3545: /* vec_interleave_lowv8hi_mask */ |
| 50104 | case 3544: /* vec_interleave_lowv8hi */ |
| 50105 | case 3543: /* avx2_interleave_lowv16hi_mask */ |
| 50106 | case 3542: /* avx2_interleave_lowv16hi */ |
| 50107 | case 3541: /* avx512bw_interleave_lowv32hi_mask */ |
| 50108 | case 3540: /* *avx512bw_interleave_lowv32hi */ |
| 50109 | case 3539: /* vec_interleave_highv8hi_mask */ |
| 50110 | case 3538: /* vec_interleave_highv8hi */ |
| 50111 | case 3537: /* avx2_interleave_highv16hi_mask */ |
| 50112 | case 3536: /* avx2_interleave_highv16hi */ |
| 50113 | case 3535: /* avx512bw_interleave_highv32hi_mask */ |
| 50114 | case 3534: /* avx512bw_interleave_highv32hi */ |
| 50115 | case 3533: /* vec_interleave_lowv16qi_mask */ |
| 50116 | case 3532: /* vec_interleave_lowv16qi */ |
| 50117 | case 3531: /* avx2_interleave_lowv32qi_mask */ |
| 50118 | case 3530: /* avx2_interleave_lowv32qi */ |
| 50119 | case 3529: /* avx512bw_interleave_lowv64qi_mask */ |
| 50120 | case 3528: /* avx512bw_interleave_lowv64qi */ |
| 50121 | case 3527: /* vec_interleave_highv16qi_mask */ |
| 50122 | case 3526: /* vec_interleave_highv16qi */ |
| 50123 | case 3525: /* avx2_interleave_highv32qi_mask */ |
| 50124 | case 3524: /* avx2_interleave_highv32qi */ |
| 50125 | case 3523: /* avx512bw_interleave_highv64qi_mask */ |
| 50126 | case 3522: /* avx512bw_interleave_highv64qi */ |
| 50127 | case 3521: /* sse2_packuswb_mask */ |
| 50128 | case 3520: /* sse2_packuswb */ |
| 50129 | case 3519: /* avx2_packuswb_mask */ |
| 50130 | case 3518: /* avx2_packuswb */ |
| 50131 | case 3517: /* avx512bw_packuswb_mask */ |
| 50132 | case 3516: /* avx512bw_packuswb */ |
| 50133 | case 3515: /* sse2_packssdw_mask */ |
| 50134 | case 3514: /* sse2_packssdw */ |
| 50135 | case 3513: /* avx2_packssdw_mask */ |
| 50136 | case 3512: /* avx2_packssdw */ |
| 50137 | case 3511: /* avx512bw_packssdw_mask */ |
| 50138 | case 3510: /* avx512bw_packssdw */ |
| 50139 | case 3509: /* sse2_packsswb_mask */ |
| 50140 | case 3508: /* sse2_packsswb */ |
| 50141 | case 3507: /* avx2_packsswb_mask */ |
| 50142 | case 3506: /* avx2_packsswb */ |
| 50143 | case 3505: /* avx512bw_packsswb_mask */ |
| 50144 | case 3504: /* avx512bw_packsswb */ |
| 50145 | case 3401: /* *andnotv2di3_mask */ |
| 50146 | case 3400: /* *andnotv4di3_mask */ |
| 50147 | case 3399: /* *andnotv8di3_mask */ |
| 50148 | case 3398: /* *andnotv4si3_mask */ |
| 50149 | case 3397: /* *andnotv8si3_mask */ |
| 50150 | case 3396: /* *andnotv16si3_mask */ |
| 50151 | case 3383: /* sse2_gtv4si3 */ |
| 50152 | case 3382: /* sse2_gtv8hi3 */ |
| 50153 | case 3381: /* sse2_gtv16qi3 */ |
| 50154 | case 3380: /* avx512vl_gtv8hi3_mask */ |
| 50155 | case 3379: /* avx512vl_gtv8hi3 */ |
| 50156 | case 3378: /* avx512vl_gtv16hi3_mask */ |
| 50157 | case 3377: /* avx512vl_gtv16hi3 */ |
| 50158 | case 3376: /* avx512bw_gtv32hi3_mask */ |
| 50159 | case 3375: /* avx512bw_gtv32hi3 */ |
| 50160 | case 3374: /* avx512vl_gtv32qi3_mask */ |
| 50161 | case 3373: /* avx512vl_gtv32qi3 */ |
| 50162 | case 3372: /* avx512vl_gtv16qi3_mask */ |
| 50163 | case 3371: /* avx512vl_gtv16qi3 */ |
| 50164 | case 3370: /* avx512bw_gtv64qi3_mask */ |
| 50165 | case 3369: /* avx512bw_gtv64qi3 */ |
| 50166 | case 3368: /* avx512vl_gtv2di3_mask */ |
| 50167 | case 3367: /* avx512vl_gtv2di3 */ |
| 50168 | case 3366: /* avx512vl_gtv4di3_mask */ |
| 50169 | case 3365: /* avx512vl_gtv4di3 */ |
| 50170 | case 3364: /* avx512f_gtv8di3_mask */ |
| 50171 | case 3363: /* avx512f_gtv8di3 */ |
| 50172 | case 3362: /* avx512vl_gtv4si3_mask */ |
| 50173 | case 3361: /* avx512vl_gtv4si3 */ |
| 50174 | case 3360: /* avx512vl_gtv8si3_mask */ |
| 50175 | case 3359: /* avx512vl_gtv8si3 */ |
| 50176 | case 3358: /* avx512f_gtv16si3_mask */ |
| 50177 | case 3357: /* avx512f_gtv16si3 */ |
| 50178 | case 3356: /* avx2_gtv4di3 */ |
| 50179 | case 3355: /* avx2_gtv8si3 */ |
| 50180 | case 3354: /* avx2_gtv16hi3 */ |
| 50181 | case 3353: /* avx2_gtv32qi3 */ |
| 50182 | case 3352: /* sse4_2_gtv2di3 */ |
| 50183 | case 3351: /* *sse2_eqv4si3 */ |
| 50184 | case 3350: /* *sse2_eqv8hi3 */ |
| 50185 | case 3349: /* *sse2_eqv16qi3 */ |
| 50186 | case 3348: /* *sse4_1_eqv2di3 */ |
| 50187 | case 3347: /* avx512vl_eqv2di3_mask_1 */ |
| 50188 | case 3346: /* avx512vl_eqv2di3_1 */ |
| 50189 | case 3345: /* avx512vl_eqv4di3_mask_1 */ |
| 50190 | case 3344: /* avx512vl_eqv4di3_1 */ |
| 50191 | case 3343: /* avx512f_eqv8di3_mask_1 */ |
| 50192 | case 3342: /* avx512f_eqv8di3_1 */ |
| 50193 | case 3341: /* avx512vl_eqv4si3_mask_1 */ |
| 50194 | case 3340: /* avx512vl_eqv4si3_1 */ |
| 50195 | case 3339: /* avx512vl_eqv8si3_mask_1 */ |
| 50196 | case 3338: /* avx512vl_eqv8si3_1 */ |
| 50197 | case 3337: /* avx512f_eqv16si3_mask_1 */ |
| 50198 | case 3336: /* avx512f_eqv16si3_1 */ |
| 50199 | case 3335: /* avx512vl_eqv8hi3_mask_1 */ |
| 50200 | case 3334: /* avx512vl_eqv8hi3_1 */ |
| 50201 | case 3333: /* avx512vl_eqv16hi3_mask_1 */ |
| 50202 | case 3332: /* avx512vl_eqv16hi3_1 */ |
| 50203 | case 3331: /* avx512bw_eqv32hi3_mask_1 */ |
| 50204 | case 3330: /* avx512bw_eqv32hi3_1 */ |
| 50205 | case 3329: /* avx512vl_eqv32qi3_mask_1 */ |
| 50206 | case 3328: /* avx512vl_eqv32qi3_1 */ |
| 50207 | case 3327: /* avx512vl_eqv16qi3_mask_1 */ |
| 50208 | case 3326: /* avx512vl_eqv16qi3_1 */ |
| 50209 | case 3325: /* avx512bw_eqv64qi3_mask_1 */ |
| 50210 | case 3324: /* avx512bw_eqv64qi3_1 */ |
| 50211 | case 3323: /* *avx2_eqv4di3 */ |
| 50212 | case 3322: /* *avx2_eqv8si3 */ |
| 50213 | case 3321: /* *avx2_eqv16hi3 */ |
| 50214 | case 3320: /* *avx2_eqv32qi3 */ |
| 50215 | case 2725: /* sse2_shufpd_v2df */ |
| 50216 | case 2724: /* sse2_shufpd_v2di */ |
| 50217 | case 2723: /* vec_interleave_lowv2di_mask */ |
| 50218 | case 2722: /* vec_interleave_lowv2di */ |
| 50219 | case 2721: /* avx512f_interleave_lowv8di_mask */ |
| 50220 | case 2720: /* *avx512f_interleave_lowv8di */ |
| 50221 | case 2719: /* avx2_interleave_lowv4di_mask */ |
| 50222 | case 2718: /* avx2_interleave_lowv4di */ |
| 50223 | case 2717: /* vec_interleave_highv2di_mask */ |
| 50224 | case 2716: /* vec_interleave_highv2di */ |
| 50225 | case 2715: /* avx512f_interleave_highv8di_mask */ |
| 50226 | case 2714: /* *avx512f_interleave_highv8di */ |
| 50227 | case 2713: /* avx2_interleave_highv4di_mask */ |
| 50228 | case 2712: /* avx2_interleave_highv4di */ |
| 50229 | case 2711: /* sse2_shufpd_v2df_mask */ |
| 50230 | case 2710: /* avx_shufpd256_1_mask */ |
| 50231 | case 2709: /* avx_shufpd256_1 */ |
| 50232 | case 2708: /* avx512f_shufpd512_1_mask */ |
| 50233 | case 2707: /* avx512f_shufpd512_1 */ |
| 50234 | case 2706: /* avx512f_shufps512_1_mask */ |
| 50235 | case 2705: /* avx512f_shufps512_1 */ |
| 50236 | case 2588: /* avx512vl_vternlogv2di_mask */ |
| 50237 | case 2587: /* avx512vl_vternlogv4di_mask */ |
| 50238 | case 2586: /* avx512f_vternlogv8di_mask */ |
| 50239 | case 2585: /* avx512vl_vternlogv4si_mask */ |
| 50240 | case 2584: /* avx512vl_vternlogv8si_mask */ |
| 50241 | case 2583: /* avx512f_vternlogv16si_mask */ |
| 50242 | case 2582: /* avx512vl_vternlogv2di_maskz_1 */ |
| 50243 | case 2581: /* avx512vl_vternlogv2di */ |
| 50244 | case 2580: /* avx512vl_vternlogv4di_maskz_1 */ |
| 50245 | case 2579: /* avx512vl_vternlogv4di */ |
| 50246 | case 2578: /* avx512f_vternlogv8di_maskz_1 */ |
| 50247 | case 2577: /* avx512f_vternlogv8di */ |
| 50248 | case 2576: /* avx512vl_vternlogv4si_maskz_1 */ |
| 50249 | case 2575: /* avx512vl_vternlogv4si */ |
| 50250 | case 2574: /* avx512vl_vternlogv8si_maskz_1 */ |
| 50251 | case 2573: /* avx512vl_vternlogv8si */ |
| 50252 | case 2572: /* avx512f_vternlogv16si_maskz_1 */ |
| 50253 | case 2571: /* avx512f_vternlogv16si */ |
| 50254 | case 2541: /* avx512vl_unpcklpd128_mask */ |
| 50255 | case 2540: /* *avx_unpcklpd256_mask */ |
| 50256 | case 2539: /* *avx_unpcklpd256 */ |
| 50257 | case 2538: /* *avx512f_unpcklpd512_mask */ |
| 50258 | case 2537: /* *avx512f_unpcklpd512 */ |
| 50259 | case 2535: /* avx512vl_unpckhpd128_mask */ |
| 50260 | case 2534: /* avx_unpckhpd256_mask */ |
| 50261 | case 2533: /* avx_unpckhpd256 */ |
| 50262 | case 2532: /* avx512f_unpckhpd512_mask */ |
| 50263 | case 2531: /* *avx512f_unpckhpd512 */ |
| 50264 | case 2465: /* sse4_1_insertps */ |
| 50265 | case 2464: /* *vec_setv4sf_sse4_1 */ |
| 50266 | case 2448: /* sse_shufps_v4sf */ |
| 50267 | case 2447: /* sse_shufps_v4si */ |
| 50268 | case 2446: /* sse_shufps_v4sf_mask */ |
| 50269 | case 2431: /* vec_interleave_lowv4sf */ |
| 50270 | case 2430: /* unpcklps128_mask */ |
| 50271 | case 2427: /* avx512f_unpcklps512_mask */ |
| 50272 | case 2426: /* *avx512f_unpcklps512 */ |
| 50273 | case 2425: /* vec_interleave_highv4sf_mask */ |
| 50274 | case 2424: /* vec_interleave_highv4sf */ |
| 50275 | case 2421: /* avx512f_unpckhps512_mask */ |
| 50276 | case 2420: /* *avx512f_unpckhps512 */ |
| 50277 | case 1800: /* *xortf3 */ |
| 50278 | case 1799: /* *iortf3 */ |
| 50279 | case 1798: /* *andtf3 */ |
| 50280 | case 1797: /* *xordf3 */ |
| 50281 | case 1796: /* *iordf3 */ |
| 50282 | case 1795: /* *anddf3 */ |
| 50283 | case 1794: /* *xorsf3 */ |
| 50284 | case 1793: /* *iorsf3 */ |
| 50285 | case 1792: /* *andsf3 */ |
| 50286 | case 1791: /* *andnottf3 */ |
| 50287 | case 1790: /* *andnotdf3 */ |
| 50288 | case 1789: /* *andnotsf3 */ |
| 50289 | case 1788: /* *xorv8df3_mask */ |
| 50290 | case 1787: /* *xorv8df3 */ |
| 50291 | case 1786: /* *iorv8df3_mask */ |
| 50292 | case 1785: /* *iorv8df3 */ |
| 50293 | case 1784: /* *andv8df3_mask */ |
| 50294 | case 1783: /* *andv8df3 */ |
| 50295 | case 1782: /* *xorv16sf3_mask */ |
| 50296 | case 1781: /* *xorv16sf3 */ |
| 50297 | case 1780: /* *iorv16sf3_mask */ |
| 50298 | case 1779: /* *iorv16sf3 */ |
| 50299 | case 1778: /* *andv16sf3_mask */ |
| 50300 | case 1777: /* *andv16sf3 */ |
| 50301 | case 1776: /* *xorv2df3_mask */ |
| 50302 | case 1775: /* *xorv2df3 */ |
| 50303 | case 1774: /* *iorv2df3_mask */ |
| 50304 | case 1773: /* *iorv2df3 */ |
| 50305 | case 1772: /* *andv2df3_mask */ |
| 50306 | case 1771: /* *andv2df3 */ |
| 50307 | case 1764: /* *xorv4sf3_mask */ |
| 50308 | case 1763: /* *xorv4sf3 */ |
| 50309 | case 1762: /* *iorv4sf3_mask */ |
| 50310 | case 1761: /* *iorv4sf3 */ |
| 50311 | case 1760: /* *andv4sf3_mask */ |
| 50312 | case 1759: /* *andv4sf3 */ |
| 50313 | case 1752: /* avx512f_andnotv8df3_mask */ |
| 50314 | case 1751: /* avx512f_andnotv8df3 */ |
| 50315 | case 1750: /* avx512f_andnotv16sf3_mask */ |
| 50316 | case 1749: /* avx512f_andnotv16sf3 */ |
| 50317 | case 1748: /* sse2_andnotv2df3_mask */ |
| 50318 | case 1747: /* sse2_andnotv2df3 */ |
| 50319 | case 1744: /* sse_andnotv4sf3_mask */ |
| 50320 | case 1743: /* sse_andnotv4sf3 */ |
| 50321 | case 1740: /* sse2_ucomi_round */ |
| 50322 | case 1739: /* sse2_ucomi */ |
| 50323 | case 1738: /* sse_ucomi_round */ |
| 50324 | case 1737: /* sse_ucomi */ |
| 50325 | case 1736: /* sse2_comi_round */ |
| 50326 | case 1735: /* sse2_comi */ |
| 50327 | case 1734: /* sse_comi_round */ |
| 50328 | case 1733: /* sse_comi */ |
| 50329 | case 1732: /* avx512f_maskcmpv2df3 */ |
| 50330 | case 1731: /* avx512f_maskcmpv4df3 */ |
| 50331 | case 1730: /* avx512f_maskcmpv8df3 */ |
| 50332 | case 1729: /* avx512f_maskcmpv4sf3 */ |
| 50333 | case 1728: /* avx512f_maskcmpv8sf3 */ |
| 50334 | case 1727: /* avx512f_maskcmpv16sf3 */ |
| 50335 | case 1726: /* avx512f_vmcmpv2df3_mask_round */ |
| 50336 | case 1725: /* avx512f_vmcmpv2df3_mask */ |
| 50337 | case 1724: /* avx512f_vmcmpv4sf3_mask_round */ |
| 50338 | case 1723: /* avx512f_vmcmpv4sf3_mask */ |
| 50339 | case 1722: /* avx512f_vmcmpv2df3_round */ |
| 50340 | case 1721: /* avx512f_vmcmpv2df3 */ |
| 50341 | case 1720: /* avx512f_vmcmpv4sf3_round */ |
| 50342 | case 1719: /* avx512f_vmcmpv4sf3 */ |
| 50343 | case 1718: /* avx512vl_ucmpv2di3_mask */ |
| 50344 | case 1717: /* avx512vl_ucmpv2di3 */ |
| 50345 | case 1716: /* avx512vl_ucmpv4di3_mask */ |
| 50346 | case 1715: /* avx512vl_ucmpv4di3 */ |
| 50347 | case 1714: /* avx512f_ucmpv8di3_mask */ |
| 50348 | case 1713: /* avx512f_ucmpv8di3 */ |
| 50349 | case 1712: /* avx512vl_ucmpv4si3_mask */ |
| 50350 | case 1711: /* avx512vl_ucmpv4si3 */ |
| 50351 | case 1710: /* avx512vl_ucmpv8si3_mask */ |
| 50352 | case 1709: /* avx512vl_ucmpv8si3 */ |
| 50353 | case 1708: /* avx512f_ucmpv16si3_mask */ |
| 50354 | case 1707: /* avx512f_ucmpv16si3 */ |
| 50355 | case 1706: /* avx512vl_ucmpv8hi3_mask */ |
| 50356 | case 1705: /* avx512vl_ucmpv8hi3 */ |
| 50357 | case 1704: /* avx512vl_ucmpv16hi3_mask */ |
| 50358 | case 1703: /* avx512vl_ucmpv16hi3 */ |
| 50359 | case 1702: /* avx512bw_ucmpv32hi3_mask */ |
| 50360 | case 1701: /* avx512bw_ucmpv32hi3 */ |
| 50361 | case 1700: /* avx512vl_ucmpv32qi3_mask */ |
| 50362 | case 1699: /* avx512vl_ucmpv32qi3 */ |
| 50363 | case 1698: /* avx512vl_ucmpv16qi3_mask */ |
| 50364 | case 1697: /* avx512vl_ucmpv16qi3 */ |
| 50365 | case 1696: /* avx512bw_ucmpv64qi3_mask */ |
| 50366 | case 1695: /* avx512bw_ucmpv64qi3 */ |
| 50367 | case 1694: /* avx512vl_cmpv8hi3_mask */ |
| 50368 | case 1693: /* avx512vl_cmpv8hi3 */ |
| 50369 | case 1692: /* avx512vl_cmpv16hi3_mask */ |
| 50370 | case 1691: /* avx512vl_cmpv16hi3 */ |
| 50371 | case 1690: /* avx512bw_cmpv32hi3_mask */ |
| 50372 | case 1689: /* avx512bw_cmpv32hi3 */ |
| 50373 | case 1688: /* avx512vl_cmpv32qi3_mask */ |
| 50374 | case 1687: /* avx512vl_cmpv32qi3 */ |
| 50375 | case 1686: /* avx512vl_cmpv16qi3_mask */ |
| 50376 | case 1685: /* avx512vl_cmpv16qi3 */ |
| 50377 | case 1684: /* avx512bw_cmpv64qi3_mask */ |
| 50378 | case 1683: /* avx512bw_cmpv64qi3 */ |
| 50379 | case 1682: /* avx512vl_cmpv2df3_mask */ |
| 50380 | case 1681: /* avx512vl_cmpv2df3 */ |
| 50381 | case 1680: /* avx512vl_cmpv4df3_mask */ |
| 50382 | case 1679: /* avx512vl_cmpv4df3 */ |
| 50383 | case 1678: /* avx512f_cmpv8df3_mask_round */ |
| 50384 | case 1677: /* avx512f_cmpv8df3_round */ |
| 50385 | case 1676: /* avx512f_cmpv8df3_mask */ |
| 50386 | case 1675: /* avx512f_cmpv8df3 */ |
| 50387 | case 1674: /* avx512vl_cmpv4sf3_mask */ |
| 50388 | case 1673: /* avx512vl_cmpv4sf3 */ |
| 50389 | case 1672: /* avx512vl_cmpv8sf3_mask */ |
| 50390 | case 1671: /* avx512vl_cmpv8sf3 */ |
| 50391 | case 1670: /* avx512f_cmpv16sf3_mask_round */ |
| 50392 | case 1669: /* avx512f_cmpv16sf3_round */ |
| 50393 | case 1668: /* avx512f_cmpv16sf3_mask */ |
| 50394 | case 1667: /* avx512f_cmpv16sf3 */ |
| 50395 | case 1666: /* avx512vl_cmpv2di3_mask */ |
| 50396 | case 1665: /* avx512vl_cmpv2di3 */ |
| 50397 | case 1664: /* avx512vl_cmpv4di3_mask */ |
| 50398 | case 1663: /* avx512vl_cmpv4di3 */ |
| 50399 | case 1662: /* avx512f_cmpv8di3_mask_round */ |
| 50400 | case 1661: /* avx512f_cmpv8di3_round */ |
| 50401 | case 1660: /* avx512f_cmpv8di3_mask */ |
| 50402 | case 1659: /* avx512f_cmpv8di3 */ |
| 50403 | case 1658: /* avx512vl_cmpv4si3_mask */ |
| 50404 | case 1657: /* avx512vl_cmpv4si3 */ |
| 50405 | case 1656: /* avx512vl_cmpv8si3_mask */ |
| 50406 | case 1655: /* avx512vl_cmpv8si3 */ |
| 50407 | case 1654: /* avx512f_cmpv16si3_mask_round */ |
| 50408 | case 1653: /* avx512f_cmpv16si3_round */ |
| 50409 | case 1652: /* avx512f_cmpv16si3_mask */ |
| 50410 | case 1651: /* avx512f_cmpv16si3 */ |
| 50411 | case 1650: /* sse2_vmmaskcmpv2df3 */ |
| 50412 | case 1649: /* sse_vmmaskcmpv4sf3 */ |
| 50413 | case 1648: /* sse2_maskcmpv2df3 */ |
| 50414 | case 1647: /* avx_maskcmpv4df3 */ |
| 50415 | case 1646: /* sse_maskcmpv4sf3 */ |
| 50416 | case 1645: /* avx_maskcmpv8sf3 */ |
| 50417 | case 1644: /* *sse2_maskcmpv2df3_comm */ |
| 50418 | case 1643: /* *avx_maskcmpv4df3_comm */ |
| 50419 | case 1642: /* *sse_maskcmpv4sf3_comm */ |
| 50420 | case 1641: /* *avx_maskcmpv8sf3_comm */ |
| 50421 | case 1640: /* avx_vmcmpv2df3 */ |
| 50422 | case 1639: /* avx_vmcmpv4sf3 */ |
| 50423 | case 1638: /* avx_cmpv2df3 */ |
| 50424 | case 1637: /* avx_cmpv4df3 */ |
| 50425 | case 1636: /* avx_cmpv4sf3 */ |
| 50426 | case 1635: /* avx_cmpv8sf3 */ |
| 50427 | case 626: /* setcc_df_sse */ |
| 50428 | case 625: /* setcc_sf_sse */ |
| 50429 | case 54: /* *cmpiuxf_i387 */ |
| 50430 | case 53: /* *cmpixf_i387 */ |
| 50431 | if (get_attr_memory (insn) == MEMORY_LOAD) |
| 50432 | { |
| 50433 | return 6; |
| 50434 | } |
| 50435 | else |
| 50436 | { |
| 50437 | return 2; |
| 50438 | } |
| 50439 | |
| 50440 | case 4984: /* atomic_bit_test_and_resetdi_1 */ |
| 50441 | case 4983: /* atomic_bit_test_and_resetsi_1 */ |
| 50442 | case 4982: /* atomic_bit_test_and_resethi_1 */ |
| 50443 | case 4981: /* atomic_bit_test_and_complementdi_1 */ |
| 50444 | case 4980: /* atomic_bit_test_and_complementsi_1 */ |
| 50445 | case 4979: /* atomic_bit_test_and_complementhi_1 */ |
| 50446 | case 4978: /* atomic_bit_test_and_setdi_1 */ |
| 50447 | case 4977: /* atomic_bit_test_and_setsi_1 */ |
| 50448 | case 4976: /* atomic_bit_test_and_sethi_1 */ |
| 50449 | case 4975: /* atomic_xordi */ |
| 50450 | case 4974: /* atomic_ordi */ |
| 50451 | case 4973: /* atomic_anddi */ |
| 50452 | case 4972: /* atomic_xorsi */ |
| 50453 | case 4971: /* atomic_orsi */ |
| 50454 | case 4970: /* atomic_andsi */ |
| 50455 | case 4969: /* atomic_xorhi */ |
| 50456 | case 4968: /* atomic_orhi */ |
| 50457 | case 4967: /* atomic_andhi */ |
| 50458 | case 4966: /* atomic_xorqi */ |
| 50459 | case 4965: /* atomic_orqi */ |
| 50460 | case 4964: /* atomic_andqi */ |
| 50461 | case 4963: /* atomic_subdi */ |
| 50462 | case 4962: /* atomic_subsi */ |
| 50463 | case 4961: /* atomic_subhi */ |
| 50464 | case 4960: /* atomic_subqi */ |
| 50465 | case 4959: /* atomic_adddi */ |
| 50466 | case 4958: /* atomic_addsi */ |
| 50467 | case 4957: /* atomic_addhi */ |
| 50468 | case 4956: /* atomic_addqi */ |
| 50469 | case 4955: /* atomic_exchangedi */ |
| 50470 | case 4954: /* atomic_exchangesi */ |
| 50471 | case 4953: /* atomic_exchangehi */ |
| 50472 | case 4952: /* atomic_exchangeqi */ |
| 50473 | case 4951: /* *atomic_fetch_add_cmpdi */ |
| 50474 | case 4950: /* *atomic_fetch_add_cmpsi */ |
| 50475 | case 4949: /* *atomic_fetch_add_cmphi */ |
| 50476 | case 4948: /* *atomic_fetch_add_cmpqi */ |
| 50477 | case 4947: /* atomic_fetch_adddi */ |
| 50478 | case 4946: /* atomic_fetch_addsi */ |
| 50479 | case 4945: /* atomic_fetch_addhi */ |
| 50480 | case 4944: /* atomic_fetch_addqi */ |
| 50481 | case 4943: /* atomic_compare_and_swapdi_1 */ |
| 50482 | case 4942: /* atomic_compare_and_swapsi_1 */ |
| 50483 | case 4941: /* atomic_compare_and_swaphi_1 */ |
| 50484 | case 4940: /* atomic_compare_and_swapqi_1 */ |
| 50485 | case 4939: /* atomic_compare_and_swapti_doubleword */ |
| 50486 | case 4938: /* atomic_compare_and_swapdi_doubleword */ |
| 50487 | case 4933: /* atomic_storedi_fpu */ |
| 50488 | case 4932: /* atomic_storedi_1 */ |
| 50489 | case 4931: /* atomic_storesi_1 */ |
| 50490 | case 4930: /* atomic_storehi_1 */ |
| 50491 | case 4929: /* atomic_storeqi_1 */ |
| 50492 | case 4928: /* atomic_loaddi_fpu */ |
| 50493 | case 4927: /* mfence_nosse */ |
| 50494 | case 4923: /* vpopcountv8di_mask */ |
| 50495 | case 4922: /* vpopcountv8di */ |
| 50496 | case 4921: /* vpopcountv16si_mask */ |
| 50497 | case 4920: /* vpopcountv16si */ |
| 50498 | case 4901: /* *movv64si_internal */ |
| 50499 | case 4900: /* *movv64sf_internal */ |
| 50500 | case 4875: /* avx512f_pd512_256pd */ |
| 50501 | case 4874: /* avx512f_ps512_256ps */ |
| 50502 | case 4873: /* avx512f_si512_256si */ |
| 50503 | case 4872: /* avx512f_pd512_pd */ |
| 50504 | case 4871: /* avx512f_ps512_ps */ |
| 50505 | case 4870: /* avx512f_si512_si */ |
| 50506 | case 4832: /* avx512f_vgetmantv2df_round */ |
| 50507 | case 4831: /* avx512f_vgetmantv2df */ |
| 50508 | case 4830: /* avx512f_vgetmantv4sf_round */ |
| 50509 | case 4829: /* avx512f_vgetmantv4sf */ |
| 50510 | case 4828: /* avx512vl_getmantv2df_mask_round */ |
| 50511 | case 4827: /* avx512vl_getmantv2df_mask */ |
| 50512 | case 4826: /* avx512vl_getmantv2df_round */ |
| 50513 | case 4825: /* avx512vl_getmantv2df */ |
| 50514 | case 4824: /* avx512vl_getmantv4df_mask_round */ |
| 50515 | case 4823: /* avx512vl_getmantv4df_mask */ |
| 50516 | case 4822: /* avx512vl_getmantv4df_round */ |
| 50517 | case 4821: /* avx512vl_getmantv4df */ |
| 50518 | case 4820: /* avx512f_getmantv8df_mask_round */ |
| 50519 | case 4819: /* avx512f_getmantv8df_mask */ |
| 50520 | case 4818: /* avx512f_getmantv8df_round */ |
| 50521 | case 4817: /* avx512f_getmantv8df */ |
| 50522 | case 4816: /* avx512vl_getmantv4sf_mask_round */ |
| 50523 | case 4815: /* avx512vl_getmantv4sf_mask */ |
| 50524 | case 4814: /* avx512vl_getmantv4sf_round */ |
| 50525 | case 4813: /* avx512vl_getmantv4sf */ |
| 50526 | case 4812: /* avx512vl_getmantv8sf_mask_round */ |
| 50527 | case 4811: /* avx512vl_getmantv8sf_mask */ |
| 50528 | case 4810: /* avx512vl_getmantv8sf_round */ |
| 50529 | case 4809: /* avx512vl_getmantv8sf */ |
| 50530 | case 4808: /* avx512f_getmantv16sf_mask_round */ |
| 50531 | case 4807: /* avx512f_getmantv16sf_mask */ |
| 50532 | case 4806: /* avx512f_getmantv16sf_round */ |
| 50533 | case 4805: /* avx512f_getmantv16sf */ |
| 50534 | case 4435: /* avx_pd256_pd */ |
| 50535 | case 4434: /* avx_ps256_ps */ |
| 50536 | case 4433: /* avx_si256_si */ |
| 50537 | case 4252: /* *avx_vperm_broadcast_v4df */ |
| 50538 | case 4251: /* *avx_vperm_broadcast_v8sf */ |
| 50539 | case 3677: /* sse3_monitor_di */ |
| 50540 | case 3676: /* sse3_monitor_si */ |
| 50541 | case 3675: /* sse3_mwait */ |
| 50542 | case 3637: /* *vec_extractv4si_zext_mem */ |
| 50543 | case 3636: /* *vec_extractv4si_mem */ |
| 50544 | case 3633: /* *vec_extractv4si_0_zext */ |
| 50545 | case 3632: /* *vec_extractv4si_0_zext_sse4 */ |
| 50546 | case 3631: /* *vec_extractv2di_0_sse */ |
| 50547 | case 3630: /* *vec_extractv2di_0 */ |
| 50548 | case 3629: /* *vec_extractv4si_0 */ |
| 50549 | case 3628: /* *vec_extractv8hi_mem */ |
| 50550 | case 3627: /* *vec_extractv16qi_mem */ |
| 50551 | case 3503: /* avx512vl_testnmv2di3_mask */ |
| 50552 | case 3502: /* avx512vl_testnmv2di3 */ |
| 50553 | case 3501: /* avx512vl_testnmv4di3_mask */ |
| 50554 | case 3500: /* avx512vl_testnmv4di3 */ |
| 50555 | case 3499: /* avx512f_testnmv8di3_mask */ |
| 50556 | case 3498: /* avx512f_testnmv8di3 */ |
| 50557 | case 3497: /* avx512vl_testnmv4si3_mask */ |
| 50558 | case 3496: /* avx512vl_testnmv4si3 */ |
| 50559 | case 3495: /* avx512vl_testnmv8si3_mask */ |
| 50560 | case 3494: /* avx512vl_testnmv8si3 */ |
| 50561 | case 3493: /* avx512f_testnmv16si3_mask */ |
| 50562 | case 3492: /* avx512f_testnmv16si3 */ |
| 50563 | case 3491: /* avx512vl_testnmv8hi3_mask */ |
| 50564 | case 3490: /* avx512vl_testnmv8hi3 */ |
| 50565 | case 3489: /* avx512vl_testnmv16hi3_mask */ |
| 50566 | case 3488: /* avx512vl_testnmv16hi3 */ |
| 50567 | case 3487: /* avx512bw_testnmv32hi3_mask */ |
| 50568 | case 3486: /* avx512bw_testnmv32hi3 */ |
| 50569 | case 3485: /* avx512vl_testnmv32qi3_mask */ |
| 50570 | case 3484: /* avx512vl_testnmv32qi3 */ |
| 50571 | case 3483: /* avx512vl_testnmv16qi3_mask */ |
| 50572 | case 3482: /* avx512vl_testnmv16qi3 */ |
| 50573 | case 3481: /* avx512bw_testnmv64qi3_mask */ |
| 50574 | case 3480: /* avx512bw_testnmv64qi3 */ |
| 50575 | case 3479: /* avx512vl_testmv2di3_mask */ |
| 50576 | case 3478: /* avx512vl_testmv2di3 */ |
| 50577 | case 3477: /* avx512vl_testmv4di3_mask */ |
| 50578 | case 3476: /* avx512vl_testmv4di3 */ |
| 50579 | case 3475: /* avx512f_testmv8di3_mask */ |
| 50580 | case 3474: /* avx512f_testmv8di3 */ |
| 50581 | case 3473: /* avx512vl_testmv4si3_mask */ |
| 50582 | case 3472: /* avx512vl_testmv4si3 */ |
| 50583 | case 3471: /* avx512vl_testmv8si3_mask */ |
| 50584 | case 3470: /* avx512vl_testmv8si3 */ |
| 50585 | case 3469: /* avx512f_testmv16si3_mask */ |
| 50586 | case 3468: /* avx512f_testmv16si3 */ |
| 50587 | case 3467: /* avx512vl_testmv8hi3_mask */ |
| 50588 | case 3466: /* avx512vl_testmv8hi3 */ |
| 50589 | case 3465: /* avx512vl_testmv16hi3_mask */ |
| 50590 | case 3464: /* avx512vl_testmv16hi3 */ |
| 50591 | case 3463: /* avx512bw_testmv32hi3_mask */ |
| 50592 | case 3462: /* avx512bw_testmv32hi3 */ |
| 50593 | case 3461: /* avx512vl_testmv32qi3_mask */ |
| 50594 | case 3460: /* avx512vl_testmv32qi3 */ |
| 50595 | case 3459: /* avx512vl_testmv16qi3_mask */ |
| 50596 | case 3458: /* avx512vl_testmv16qi3 */ |
| 50597 | case 3457: /* avx512bw_testmv64qi3_mask */ |
| 50598 | case 3456: /* avx512bw_testmv64qi3 */ |
| 50599 | case 3191: /* avx512vl_rorv2di_mask */ |
| 50600 | case 3190: /* avx512vl_rorv2di */ |
| 50601 | case 3189: /* avx512vl_rolv2di_mask */ |
| 50602 | case 3188: /* avx512vl_rolv2di */ |
| 50603 | case 3187: /* avx512vl_rorv4di_mask */ |
| 50604 | case 3186: /* avx512vl_rorv4di */ |
| 50605 | case 3185: /* avx512vl_rolv4di_mask */ |
| 50606 | case 3184: /* avx512vl_rolv4di */ |
| 50607 | case 3183: /* avx512f_rorv8di_mask */ |
| 50608 | case 3182: /* avx512f_rorv8di */ |
| 50609 | case 3181: /* avx512f_rolv8di_mask */ |
| 50610 | case 3180: /* avx512f_rolv8di */ |
| 50611 | case 3179: /* avx512vl_rorv4si_mask */ |
| 50612 | case 3178: /* avx512vl_rorv4si */ |
| 50613 | case 3177: /* avx512vl_rolv4si_mask */ |
| 50614 | case 3176: /* avx512vl_rolv4si */ |
| 50615 | case 3175: /* avx512vl_rorv8si_mask */ |
| 50616 | case 3174: /* avx512vl_rorv8si */ |
| 50617 | case 3173: /* avx512vl_rolv8si_mask */ |
| 50618 | case 3172: /* avx512vl_rolv8si */ |
| 50619 | case 3171: /* avx512f_rorv16si_mask */ |
| 50620 | case 3170: /* avx512f_rorv16si */ |
| 50621 | case 3169: /* avx512f_rolv16si_mask */ |
| 50622 | case 3168: /* avx512f_rolv16si */ |
| 50623 | case 3167: /* avx512vl_rorvv2di_mask */ |
| 50624 | case 3166: /* avx512vl_rorvv2di */ |
| 50625 | case 3165: /* avx512vl_rolvv2di_mask */ |
| 50626 | case 3164: /* avx512vl_rolvv2di */ |
| 50627 | case 3163: /* avx512vl_rorvv4di_mask */ |
| 50628 | case 3162: /* avx512vl_rorvv4di */ |
| 50629 | case 3161: /* avx512vl_rolvv4di_mask */ |
| 50630 | case 3160: /* avx512vl_rolvv4di */ |
| 50631 | case 3159: /* avx512f_rorvv8di_mask */ |
| 50632 | case 3158: /* avx512f_rorvv8di */ |
| 50633 | case 3157: /* avx512f_rolvv8di_mask */ |
| 50634 | case 3156: /* avx512f_rolvv8di */ |
| 50635 | case 3155: /* avx512vl_rorvv4si_mask */ |
| 50636 | case 3154: /* avx512vl_rorvv4si */ |
| 50637 | case 3153: /* avx512vl_rolvv4si_mask */ |
| 50638 | case 3152: /* avx512vl_rolvv4si */ |
| 50639 | case 3151: /* avx512vl_rorvv8si_mask */ |
| 50640 | case 3150: /* avx512vl_rorvv8si */ |
| 50641 | case 3149: /* avx512vl_rolvv8si_mask */ |
| 50642 | case 3148: /* avx512vl_rolvv8si */ |
| 50643 | case 3147: /* avx512f_rorvv16si_mask */ |
| 50644 | case 3146: /* avx512f_rorvv16si */ |
| 50645 | case 3145: /* avx512f_rolvv16si_mask */ |
| 50646 | case 3144: /* avx512f_rolvv16si */ |
| 50647 | case 2704: /* avx512f_rndscalev2df_round */ |
| 50648 | case 2703: /* avx512f_rndscalev2df */ |
| 50649 | case 2702: /* avx512f_rndscalev4sf_round */ |
| 50650 | case 2701: /* avx512f_rndscalev4sf */ |
| 50651 | case 2700: /* avx512vl_rndscalev2df_mask_round */ |
| 50652 | case 2699: /* avx512vl_rndscalev2df_mask */ |
| 50653 | case 2698: /* avx512vl_rndscalev2df_round */ |
| 50654 | case 2697: /* avx512vl_rndscalev2df */ |
| 50655 | case 2696: /* avx512vl_rndscalev4df_mask_round */ |
| 50656 | case 2695: /* avx512vl_rndscalev4df_mask */ |
| 50657 | case 2694: /* avx512vl_rndscalev4df_round */ |
| 50658 | case 2693: /* avx512vl_rndscalev4df */ |
| 50659 | case 2692: /* avx512f_rndscalev8df_mask_round */ |
| 50660 | case 2691: /* avx512f_rndscalev8df_mask */ |
| 50661 | case 2690: /* avx512f_rndscalev8df_round */ |
| 50662 | case 2689: /* avx512f_rndscalev8df */ |
| 50663 | case 2688: /* avx512vl_rndscalev4sf_mask_round */ |
| 50664 | case 2687: /* avx512vl_rndscalev4sf_mask */ |
| 50665 | case 2686: /* avx512vl_rndscalev4sf_round */ |
| 50666 | case 2685: /* avx512vl_rndscalev4sf */ |
| 50667 | case 2684: /* avx512vl_rndscalev8sf_mask_round */ |
| 50668 | case 2683: /* avx512vl_rndscalev8sf_mask */ |
| 50669 | case 2682: /* avx512vl_rndscalev8sf_round */ |
| 50670 | case 2681: /* avx512vl_rndscalev8sf */ |
| 50671 | case 2680: /* avx512f_rndscalev16sf_mask_round */ |
| 50672 | case 2679: /* avx512f_rndscalev16sf_mask */ |
| 50673 | case 2678: /* avx512f_rndscalev16sf_round */ |
| 50674 | case 2677: /* avx512f_rndscalev16sf */ |
| 50675 | case 2676: /* avx512f_sfixupimmv2df_mask_round */ |
| 50676 | case 2675: /* avx512f_sfixupimmv2df_mask */ |
| 50677 | case 2674: /* avx512f_sfixupimmv4sf_mask_round */ |
| 50678 | case 2673: /* avx512f_sfixupimmv4sf_mask */ |
| 50679 | case 2672: /* avx512f_sfixupimmv2df_maskz_1_round */ |
| 50680 | case 2671: /* avx512f_sfixupimmv2df_maskz_1 */ |
| 50681 | case 2670: /* avx512f_sfixupimmv2df_round */ |
| 50682 | case 2669: /* avx512f_sfixupimmv2df */ |
| 50683 | case 2668: /* avx512f_sfixupimmv4sf_maskz_1_round */ |
| 50684 | case 2667: /* avx512f_sfixupimmv4sf_maskz_1 */ |
| 50685 | case 2666: /* avx512f_sfixupimmv4sf_round */ |
| 50686 | case 2665: /* avx512f_sfixupimmv4sf */ |
| 50687 | case 2664: /* avx512vl_fixupimmv2df_mask_round */ |
| 50688 | case 2663: /* avx512vl_fixupimmv2df_mask */ |
| 50689 | case 2662: /* avx512vl_fixupimmv4df_mask_round */ |
| 50690 | case 2661: /* avx512vl_fixupimmv4df_mask */ |
| 50691 | case 2660: /* avx512f_fixupimmv8df_mask_round */ |
| 50692 | case 2659: /* avx512f_fixupimmv8df_mask */ |
| 50693 | case 2658: /* avx512vl_fixupimmv4sf_mask_round */ |
| 50694 | case 2657: /* avx512vl_fixupimmv4sf_mask */ |
| 50695 | case 2656: /* avx512vl_fixupimmv8sf_mask_round */ |
| 50696 | case 2655: /* avx512vl_fixupimmv8sf_mask */ |
| 50697 | case 2654: /* avx512f_fixupimmv16sf_mask_round */ |
| 50698 | case 2653: /* avx512f_fixupimmv16sf_mask */ |
| 50699 | case 2652: /* avx512vl_fixupimmv2df_maskz_1_round */ |
| 50700 | case 2651: /* avx512vl_fixupimmv2df_maskz_1 */ |
| 50701 | case 2650: /* avx512vl_fixupimmv2df_round */ |
| 50702 | case 2649: /* avx512vl_fixupimmv2df */ |
| 50703 | case 2648: /* avx512vl_fixupimmv4df_maskz_1_round */ |
| 50704 | case 2647: /* avx512vl_fixupimmv4df_maskz_1 */ |
| 50705 | case 2646: /* avx512vl_fixupimmv4df_round */ |
| 50706 | case 2645: /* avx512vl_fixupimmv4df */ |
| 50707 | case 2644: /* avx512f_fixupimmv8df_maskz_1_round */ |
| 50708 | case 2643: /* avx512f_fixupimmv8df_maskz_1 */ |
| 50709 | case 2642: /* avx512f_fixupimmv8df_round */ |
| 50710 | case 2641: /* avx512f_fixupimmv8df */ |
| 50711 | case 2640: /* avx512vl_fixupimmv4sf_maskz_1_round */ |
| 50712 | case 2639: /* avx512vl_fixupimmv4sf_maskz_1 */ |
| 50713 | case 2638: /* avx512vl_fixupimmv4sf_round */ |
| 50714 | case 2637: /* avx512vl_fixupimmv4sf */ |
| 50715 | case 2636: /* avx512vl_fixupimmv8sf_maskz_1_round */ |
| 50716 | case 2635: /* avx512vl_fixupimmv8sf_maskz_1 */ |
| 50717 | case 2634: /* avx512vl_fixupimmv8sf_round */ |
| 50718 | case 2633: /* avx512vl_fixupimmv8sf */ |
| 50719 | case 2632: /* avx512f_fixupimmv16sf_maskz_1_round */ |
| 50720 | case 2631: /* avx512f_fixupimmv16sf_maskz_1 */ |
| 50721 | case 2630: /* avx512f_fixupimmv16sf_round */ |
| 50722 | case 2629: /* avx512f_fixupimmv16sf */ |
| 50723 | case 2628: /* avx512vl_alignv2di_mask */ |
| 50724 | case 2627: /* *avx512vl_alignv2di */ |
| 50725 | case 2626: /* avx512vl_alignv4di_mask */ |
| 50726 | case 2625: /* *avx512vl_alignv4di */ |
| 50727 | case 2624: /* avx512f_alignv8di_mask */ |
| 50728 | case 2623: /* *avx512f_alignv8di */ |
| 50729 | case 2622: /* avx512vl_alignv4si_mask */ |
| 50730 | case 2621: /* *avx512vl_alignv4si */ |
| 50731 | case 2620: /* avx512vl_alignv8si_mask */ |
| 50732 | case 2619: /* *avx512vl_alignv8si */ |
| 50733 | case 2618: /* avx512f_alignv16si_mask */ |
| 50734 | case 2617: /* *avx512f_alignv16si */ |
| 50735 | case 2616: /* avx512f_sgetexpv2df_round */ |
| 50736 | case 2615: /* avx512f_sgetexpv2df */ |
| 50737 | case 2614: /* avx512f_sgetexpv4sf_round */ |
| 50738 | case 2613: /* avx512f_sgetexpv4sf */ |
| 50739 | case 2612: /* avx512vl_getexpv2df_mask_round */ |
| 50740 | case 2611: /* avx512vl_getexpv2df_mask */ |
| 50741 | case 2610: /* avx512vl_getexpv2df_round */ |
| 50742 | case 2609: /* avx512vl_getexpv2df */ |
| 50743 | case 2608: /* avx512vl_getexpv4df_mask_round */ |
| 50744 | case 2607: /* avx512vl_getexpv4df_mask */ |
| 50745 | case 2606: /* avx512vl_getexpv4df_round */ |
| 50746 | case 2605: /* avx512vl_getexpv4df */ |
| 50747 | case 2604: /* avx512f_getexpv8df_mask_round */ |
| 50748 | case 2603: /* avx512f_getexpv8df_mask */ |
| 50749 | case 2602: /* avx512f_getexpv8df_round */ |
| 50750 | case 2601: /* avx512f_getexpv8df */ |
| 50751 | case 2600: /* avx512vl_getexpv4sf_mask_round */ |
| 50752 | case 2599: /* avx512vl_getexpv4sf_mask */ |
| 50753 | case 2598: /* avx512vl_getexpv4sf_round */ |
| 50754 | case 2597: /* avx512vl_getexpv4sf */ |
| 50755 | case 2596: /* avx512vl_getexpv8sf_mask_round */ |
| 50756 | case 2595: /* avx512vl_getexpv8sf_mask */ |
| 50757 | case 2594: /* avx512vl_getexpv8sf_round */ |
| 50758 | case 2593: /* avx512vl_getexpv8sf */ |
| 50759 | case 2592: /* avx512f_getexpv16sf_mask_round */ |
| 50760 | case 2591: /* avx512f_getexpv16sf_mask */ |
| 50761 | case 2590: /* avx512f_getexpv16sf_round */ |
| 50762 | case 2589: /* avx512f_getexpv16sf */ |
| 50763 | case 2570: /* avx512vl_scalefv2df_mask_round */ |
| 50764 | case 2569: /* avx512vl_scalefv2df_mask */ |
| 50765 | case 2568: /* avx512vl_scalefv2df_round */ |
| 50766 | case 2567: /* avx512vl_scalefv2df */ |
| 50767 | case 2566: /* avx512vl_scalefv4df_mask_round */ |
| 50768 | case 2565: /* avx512vl_scalefv4df_mask */ |
| 50769 | case 2564: /* avx512vl_scalefv4df_round */ |
| 50770 | case 2563: /* avx512vl_scalefv4df */ |
| 50771 | case 2562: /* avx512f_scalefv8df_mask_round */ |
| 50772 | case 2561: /* avx512f_scalefv8df_mask */ |
| 50773 | case 2560: /* avx512f_scalefv8df_round */ |
| 50774 | case 2559: /* avx512f_scalefv8df */ |
| 50775 | case 2558: /* avx512vl_scalefv4sf_mask_round */ |
| 50776 | case 2557: /* avx512vl_scalefv4sf_mask */ |
| 50777 | case 2556: /* avx512vl_scalefv4sf_round */ |
| 50778 | case 2555: /* avx512vl_scalefv4sf */ |
| 50779 | case 2554: /* avx512vl_scalefv8sf_mask_round */ |
| 50780 | case 2553: /* avx512vl_scalefv8sf_mask */ |
| 50781 | case 2552: /* avx512vl_scalefv8sf_round */ |
| 50782 | case 2551: /* avx512vl_scalefv8sf */ |
| 50783 | case 2550: /* avx512f_scalefv16sf_mask_round */ |
| 50784 | case 2549: /* avx512f_scalefv16sf_mask */ |
| 50785 | case 2548: /* avx512f_scalefv16sf_round */ |
| 50786 | case 2547: /* avx512f_scalefv16sf */ |
| 50787 | case 2546: /* avx512f_vmscalefv2df_round */ |
| 50788 | case 2545: /* avx512f_vmscalefv2df */ |
| 50789 | case 2544: /* avx512f_vmscalefv4sf_round */ |
| 50790 | case 2543: /* avx512f_vmscalefv4sf */ |
| 50791 | case 2529: /* vec_extract_lo_v32qi */ |
| 50792 | case 2527: /* vec_extract_lo_v64qi */ |
| 50793 | case 2525: /* vec_extract_lo_v16hi */ |
| 50794 | case 2523: /* vec_extract_lo_v32hi */ |
| 50795 | case 2502: /* vec_extract_lo_v16si_mask */ |
| 50796 | case 2501: /* vec_extract_lo_v16si */ |
| 50797 | case 2500: /* vec_extract_lo_v16sf_mask */ |
| 50798 | case 2499: /* vec_extract_lo_v16sf */ |
| 50799 | case 2468: /* *vec_extractv4sf_mem */ |
| 50800 | case 2466: /* *vec_extractv4sf_0 */ |
| 50801 | case 2415: /* *avx512vl_cvtmask2qv2di */ |
| 50802 | case 2414: /* *avx512vl_cvtmask2qv4di */ |
| 50803 | case 2413: /* *avx512f_cvtmask2qv8di */ |
| 50804 | case 2412: /* *avx512vl_cvtmask2dv4si */ |
| 50805 | case 2411: /* *avx512vl_cvtmask2dv8si */ |
| 50806 | case 2410: /* *avx512f_cvtmask2dv16si */ |
| 50807 | case 2409: /* *avx512vl_cvtmask2wv8hi */ |
| 50808 | case 2408: /* *avx512vl_cvtmask2wv16hi */ |
| 50809 | case 2407: /* *avx512bw_cvtmask2wv32hi */ |
| 50810 | case 2406: /* *avx512vl_cvtmask2bv32qi */ |
| 50811 | case 2405: /* *avx512vl_cvtmask2bv16qi */ |
| 50812 | case 2404: /* *avx512bw_cvtmask2bv64qi */ |
| 50813 | case 2403: /* avx512vl_cvtq2maskv2di */ |
| 50814 | case 2402: /* avx512vl_cvtq2maskv4di */ |
| 50815 | case 2401: /* avx512f_cvtq2maskv8di */ |
| 50816 | case 2400: /* avx512vl_cvtd2maskv4si */ |
| 50817 | case 2399: /* avx512vl_cvtd2maskv8si */ |
| 50818 | case 2398: /* avx512f_cvtd2maskv16si */ |
| 50819 | case 2397: /* avx512vl_cvtw2maskv8hi */ |
| 50820 | case 2396: /* avx512vl_cvtw2maskv16hi */ |
| 50821 | case 2395: /* avx512bw_cvtw2maskv32hi */ |
| 50822 | case 2394: /* avx512vl_cvtb2maskv32qi */ |
| 50823 | case 2393: /* avx512vl_cvtb2maskv16qi */ |
| 50824 | case 2392: /* avx512bw_cvtb2maskv64qi */ |
| 50825 | case 1360: /* *absnegv2df2 */ |
| 50826 | case 1359: /* *absnegv4df2 */ |
| 50827 | case 1358: /* *absnegv8df2 */ |
| 50828 | case 1357: /* *absnegv4sf2 */ |
| 50829 | case 1356: /* *absnegv8sf2 */ |
| 50830 | case 1355: /* *absnegv16sf2 */ |
| 50831 | case 1354: /* kunpckdi */ |
| 50832 | case 1353: /* kunpcksi */ |
| 50833 | case 1294: /* movdi_to_sse */ |
| 50834 | case 1209: /* *vec_extractv2si_zext_mem */ |
| 50835 | case 1207: /* *vec_extractv2si_0 */ |
| 50836 | case 1137: /* *vec_extractv2sf_0 */ |
| 50837 | case 1105: /* rdpid */ |
| 50838 | case 1104: /* *wrpkru */ |
| 50839 | case 1103: /* *rdpkru */ |
| 50840 | case 1096: /* *bnd64_cn */ |
| 50841 | case 1095: /* *bnd64_cu */ |
| 50842 | case 1094: /* *bnd64_cl */ |
| 50843 | case 1093: /* *bnd32_cn */ |
| 50844 | case 1092: /* *bnd32_cu */ |
| 50845 | case 1091: /* *bnd32_cl */ |
| 50846 | case 1088: /* *bnd64_mk */ |
| 50847 | case 1087: /* *bnd32_mk */ |
| 50848 | case 1086: /* clzero_di */ |
| 50849 | case 1085: /* clzero_si */ |
| 50850 | case 1084: /* monitorx_di */ |
| 50851 | case 1083: /* monitorx_si */ |
| 50852 | case 1082: /* mwaitx */ |
| 50853 | case 1079: /* xtest_1 */ |
| 50854 | case 1078: /* xabort */ |
| 50855 | case 1077: /* xend */ |
| 50856 | case 1076: /* xbegin_1 */ |
| 50857 | case 1075: /* *pause */ |
| 50858 | case 1074: /* rdseeddi_1 */ |
| 50859 | case 1073: /* rdseedsi_1 */ |
| 50860 | case 1072: /* rdseedhi_1 */ |
| 50861 | case 1071: /* rdranddi_1 */ |
| 50862 | case 1070: /* rdrandsi_1 */ |
| 50863 | case 1069: /* rdrandhi_1 */ |
| 50864 | case 1068: /* wrgsbasedi */ |
| 50865 | case 1067: /* wrfsbasedi */ |
| 50866 | case 1066: /* wrgsbasesi */ |
| 50867 | case 1065: /* wrfsbasesi */ |
| 50868 | case 1064: /* rdgsbasedi */ |
| 50869 | case 1063: /* rdfsbasedi */ |
| 50870 | case 1062: /* rdgsbasesi */ |
| 50871 | case 1061: /* rdfsbasesi */ |
| 50872 | case 1060: /* *lwp_lwpinsdi3_1 */ |
| 50873 | case 1059: /* *lwp_lwpinssi3_1 */ |
| 50874 | case 1058: /* *lwp_lwpvaldi3_1 */ |
| 50875 | case 1057: /* *lwp_lwpvalsi3_1 */ |
| 50876 | case 1056: /* lwp_slwpcbdi */ |
| 50877 | case 1055: /* lwp_slwpcbsi */ |
| 50878 | case 1054: /* *lwp_llwpcbdi1 */ |
| 50879 | case 1053: /* *lwp_llwpcbsi1 */ |
| 50880 | case 1052: /* fnclex */ |
| 50881 | case 1026: /* rdtscp_rex64 */ |
| 50882 | case 1025: /* rdtscp */ |
| 50883 | case 1024: /* rdtsc_rex64 */ |
| 50884 | case 1023: /* rdtsc */ |
| 50885 | case 1022: /* rdpmc_rex64 */ |
| 50886 | case 1021: /* rdpmc */ |
| 50887 | case 1016: /* stack_tls_protect_test_di */ |
| 50888 | case 1015: /* stack_tls_protect_test_si */ |
| 50889 | case 1014: /* stack_protect_test_di */ |
| 50890 | case 1013: /* stack_protect_test_si */ |
| 50891 | case 1012: /* stack_tls_protect_set_di */ |
| 50892 | case 1011: /* stack_tls_protect_set_si */ |
| 50893 | case 1010: /* stack_protect_set_di */ |
| 50894 | case 1009: /* stack_protect_set_si */ |
| 50895 | case 1005: /* trap */ |
| 50896 | case 1004: /* probe_stack_rangedi */ |
| 50897 | case 1003: /* probe_stack_rangesi */ |
| 50898 | case 1002: /* adjust_stack_and_probedi */ |
| 50899 | case 1001: /* adjust_stack_and_probesi */ |
| 50900 | case 998: /* allocate_stack_worker_probe_di */ |
| 50901 | case 997: /* allocate_stack_worker_probe_si */ |
| 50902 | case 974: /* *x86_movdicc_0_m1_neg */ |
| 50903 | case 973: /* *x86_movsicc_0_m1_neg */ |
| 50904 | case 972: /* *x86_movdicc_0_m1_se */ |
| 50905 | case 971: /* *x86_movsicc_0_m1_se */ |
| 50906 | case 970: /* *x86_movdicc_0_m1 */ |
| 50907 | case 969: /* *x86_movsicc_0_m1 */ |
| 50908 | case 968: /* *strlenqi_1 */ |
| 50909 | case 967: /* *strlenqi_1 */ |
| 50910 | case 966: /* *cmpstrnqi_1 */ |
| 50911 | case 965: /* *cmpstrnqi_1 */ |
| 50912 | case 964: /* *cmpstrnqi_nz_1 */ |
| 50913 | case 963: /* *cmpstrnqi_nz_1 */ |
| 50914 | case 934: /* cld */ |
| 50915 | case 811: /* *tls_dynamic_gnu2_combine_64 */ |
| 50916 | case 809: /* *tls_dynamic_gnu2_lea_64 */ |
| 50917 | case 808: /* *tls_dynamic_gnu2_combine_32 */ |
| 50918 | case 806: /* *tls_dynamic_gnu2_lea_32 */ |
| 50919 | case 797: /* *tls_local_dynamic_32_once */ |
| 50920 | case 796: /* *tls_local_dynamic_base_64_largepic */ |
| 50921 | case 795: /* *tls_local_dynamic_base_64_di */ |
| 50922 | case 794: /* *tls_local_dynamic_base_64_si */ |
| 50923 | case 793: /* *tls_local_dynamic_base_32_gnu */ |
| 50924 | case 792: /* *tls_global_dynamic_64_largepic */ |
| 50925 | case 791: /* *tls_global_dynamic_64_di */ |
| 50926 | case 790: /* *tls_global_dynamic_64_si */ |
| 50927 | case 789: /* *tls_global_dynamic_32_gnu */ |
| 50928 | case 788: /* *parityhi2_cmp */ |
| 50929 | case 787: /* paritysi2_cmp */ |
| 50930 | case 786: /* paritydi2_cmp */ |
| 50931 | case 785: /* bswaphi_lowpart */ |
| 50932 | case 784: /* *bswaphi_lowpart_1 */ |
| 50933 | case 778: /* *popcounthi2_1 */ |
| 50934 | case 706: /* ffssi2_no_cmove */ |
| 50935 | case 705: /* split_stack_return */ |
| 50936 | case 702: /* eh_return_internal */ |
| 50937 | case 700: /* set_rip_rex64 */ |
| 50938 | case 699: /* set_got_rex64 */ |
| 50939 | case 698: /* *set_got_labelled */ |
| 50940 | case 697: /* *set_got */ |
| 50941 | case 696: /* pad */ |
| 50942 | case 695: /* nops */ |
| 50943 | case 694: /* nop */ |
| 50944 | case 692: /* simple_return_pop_internal */ |
| 50945 | case 691: /* simple_return_internal_long */ |
| 50946 | case 690: /* interrupt_return */ |
| 50947 | case 689: /* simple_return_internal */ |
| 50948 | case 688: /* prologue_use */ |
| 50949 | case 687: /* *memory_blockage */ |
| 50950 | case 686: /* blockage */ |
| 50951 | case 658: /* *jccxf_si_r_i387 */ |
| 50952 | case 657: /* *jccdf_si_r_i387 */ |
| 50953 | case 656: /* *jccsf_si_r_i387 */ |
| 50954 | case 655: /* *jccxf_hi_r_i387 */ |
| 50955 | case 654: /* *jccdf_hi_r_i387 */ |
| 50956 | case 653: /* *jccsf_hi_r_i387 */ |
| 50957 | case 652: /* *jccxf_si_i387 */ |
| 50958 | case 651: /* *jccdf_si_i387 */ |
| 50959 | case 650: /* *jccsf_si_i387 */ |
| 50960 | case 649: /* *jccxf_hi_i387 */ |
| 50961 | case 648: /* *jccdf_hi_i387 */ |
| 50962 | case 647: /* *jccsf_hi_i387 */ |
| 50963 | case 646: /* *jccuxf_r_i387 */ |
| 50964 | case 645: /* *jccudf_r_i387 */ |
| 50965 | case 644: /* *jccusf_r_i387 */ |
| 50966 | case 643: /* *jccuxf_i387 */ |
| 50967 | case 642: /* *jccudf_i387 */ |
| 50968 | case 641: /* *jccusf_i387 */ |
| 50969 | case 640: /* *jccdf_r_i387 */ |
| 50970 | case 639: /* *jccsf_r_i387 */ |
| 50971 | case 638: /* *jccdf_i387 */ |
| 50972 | case 637: /* *jccsf_i387 */ |
| 50973 | case 636: /* *jccxf_r_i387 */ |
| 50974 | case 635: /* *jccxf_i387 */ |
| 50975 | case 634: /* *jccxf_0_r_i387 */ |
| 50976 | case 633: /* *jccdf_0_r_i387 */ |
| 50977 | case 632: /* *jccsf_0_r_i387 */ |
| 50978 | case 631: /* *jccxf_0_i387 */ |
| 50979 | case 630: /* *jccdf_0_i387 */ |
| 50980 | case 629: /* *jccsf_0_i387 */ |
| 50981 | case 622: /* *setcc_si_1_movzbl */ |
| 50982 | case 621: /* *setcc_si_1_and */ |
| 50983 | case 620: /* *setcc_di_1 */ |
| 50984 | case 619: /* *jcc_btdi_mask */ |
| 50985 | case 618: /* *jcc_btsi_mask */ |
| 50986 | case 617: /* *jcc_btdi_1 */ |
| 50987 | case 616: /* *jcc_btsi_1 */ |
| 50988 | case 615: /* *jcc_btdi */ |
| 50989 | case 614: /* *jcc_btsi */ |
| 50990 | case 593: /* ix86_rotrti3_doubleword */ |
| 50991 | case 592: /* ix86_rotrdi3_doubleword */ |
| 50992 | case 591: /* ix86_rotlti3_doubleword */ |
| 50993 | case 590: /* ix86_rotldi3_doubleword */ |
| 50994 | case 589: /* *rotrdi3_mask */ |
| 50995 | case 588: /* *rotldi3_mask */ |
| 50996 | case 587: /* *rotrsi3_mask */ |
| 50997 | case 586: /* *rotlsi3_mask */ |
| 50998 | case 544: /* *ashrti3_doubleword */ |
| 50999 | case 543: /* *lshrti3_doubleword */ |
| 51000 | case 542: /* *ashrdi3_doubleword */ |
| 51001 | case 541: /* *lshrdi3_doubleword */ |
| 51002 | case 540: /* *ashrdi3_mask */ |
| 51003 | case 539: /* *lshrdi3_mask */ |
| 51004 | case 538: /* *ashrsi3_mask */ |
| 51005 | case 537: /* *lshrsi3_mask */ |
| 51006 | case 518: /* *ashldi3_mask */ |
| 51007 | case 517: /* *ashlsi3_mask */ |
| 51008 | case 514: /* *ashlti3_doubleword */ |
| 51009 | case 513: /* *ashldi3_doubleword */ |
| 51010 | case 502: /* *one_cmpldi2_doubleword */ |
| 51011 | case 501: /* copysigntf3_var */ |
| 51012 | case 500: /* copysigndf3_var */ |
| 51013 | case 499: /* copysignsf3_var */ |
| 51014 | case 498: /* copysigntf3_const */ |
| 51015 | case 497: /* copysigndf3_const */ |
| 51016 | case 496: /* copysignsf3_const */ |
| 51017 | case 483: /* *absnegtf2_sse */ |
| 51018 | case 482: /* *absnegxf2_i387 */ |
| 51019 | case 481: /* *absnegdf2 */ |
| 51020 | case 480: /* *absnegsf2 */ |
| 51021 | case 465: /* *negti2_doubleword */ |
| 51022 | case 464: /* *negdi2_doubleword */ |
| 51023 | case 422: /* *xordi3_doubleword */ |
| 51024 | case 421: /* *iordi3_doubleword */ |
| 51025 | case 414: /* *andndi3_doubleword */ |
| 51026 | case 397: /* *anddi3_doubleword */ |
| 51027 | case 396: /* *testqi_ext_3 */ |
| 51028 | case 395: /* *testqi_ext_3 */ |
| 51029 | case 394: /* *testqi_ext_3 */ |
| 51030 | case 382: /* *udivmoddi4_pow2 */ |
| 51031 | case 381: /* *udivmodsi4_pow2 */ |
| 51032 | case 380: /* *udivmoddi4 */ |
| 51033 | case 379: /* *udivmodsi4 */ |
| 51034 | case 378: /* *udivmodhi4 */ |
| 51035 | case 377: /* udivmoddi4_1 */ |
| 51036 | case 376: /* udivmodsi4_1 */ |
| 51037 | case 371: /* *divmoddi4 */ |
| 51038 | case 370: /* *divmodsi4 */ |
| 51039 | case 369: /* *divmodhi4 */ |
| 51040 | case 368: /* divmoddi4_1 */ |
| 51041 | case 367: /* divmodsi4_1 */ |
| 51042 | case 270: /* *subti3_doubleword */ |
| 51043 | case 269: /* *subdi3_doubleword */ |
| 51044 | case 268: /* *leadi_general_4 */ |
| 51045 | case 267: /* *leadi_general_4 */ |
| 51046 | case 266: /* *leasi_general_4 */ |
| 51047 | case 265: /* *leasi_general_4 */ |
| 51048 | case 264: /* *leahi_general_4 */ |
| 51049 | case 263: /* *leahi_general_4 */ |
| 51050 | case 262: /* *leaqi_general_4 */ |
| 51051 | case 261: /* *leaqi_general_4 */ |
| 51052 | case 260: /* *leahi_general_3b */ |
| 51053 | case 259: /* *leaqi_general_3b */ |
| 51054 | case 258: /* *leahi_general_3 */ |
| 51055 | case 257: /* *leaqi_general_3 */ |
| 51056 | case 256: /* *leahi_general_2b */ |
| 51057 | case 255: /* *leaqi_general_2b */ |
| 51058 | case 254: /* *leahi_general_2 */ |
| 51059 | case 253: /* *leaqi_general_2 */ |
| 51060 | case 252: /* *leahi_general_1 */ |
| 51061 | case 251: /* *leaqi_general_1 */ |
| 51062 | case 216: /* *addti3_doubleword */ |
| 51063 | case 215: /* *adddi3_doubleword */ |
| 51064 | case 214: /* *leadi */ |
| 51065 | case 213: /* *leasi */ |
| 51066 | case 212: /* *floatunssixf2_i387_with_xmm */ |
| 51067 | case 211: /* *floatunssidf2_i387_with_xmm */ |
| 51068 | case 210: /* *floatunssisf2_i387_with_xmm */ |
| 51069 | case 169: /* *fixuns_truncdf_1 */ |
| 51070 | case 168: /* *fixuns_truncsf_1 */ |
| 51071 | case 146: /* extendsidi2_1 */ |
| 51072 | case 144: /* *zextsi_doubleword */ |
| 51073 | case 143: /* *zexthi_doubleword */ |
| 51074 | case 142: /* *zextqi_doubleword */ |
| 51075 | case 141: /* *zexthi_doubleword_and */ |
| 51076 | case 140: /* *zextqi_doubleword_and */ |
| 51077 | case 73: /* *popfldi1 */ |
| 51078 | case 72: /* *popflsi1 */ |
| 51079 | case 71: /* *pushfldi2 */ |
| 51080 | case 70: /* *pushflsi2 */ |
| 51081 | case 69: /* *popdi1_epilogue */ |
| 51082 | case 68: /* *popsi1_epilogue */ |
| 51083 | case 67: /* *popdi1 */ |
| 51084 | case 66: /* *popsi1 */ |
| 51085 | case 65: /* *pushdi2_prologue */ |
| 51086 | case 64: /* *pushsi2_prologue */ |
| 51087 | case 63: /* *pushhi2 */ |
| 51088 | case 62: /* *pushqi2 */ |
| 51089 | case 61: /* *pushsi2_rex64 */ |
| 51090 | case 60: /* *pushhi2_rex64 */ |
| 51091 | case 59: /* *pushqi2_rex64 */ |
| 51092 | case 58: /* *pushsi2 */ |
| 51093 | case 57: /* *pushdi2_rex64 */ |
| 51094 | case 56: /* *pushti2 */ |
| 51095 | case 55: /* *pushdi2 */ |
| 51096 | case 48: /* x86_sahf_1 */ |
| 51097 | return 1; |
| 51098 | |
| 51099 | case 4926: /* mfence_sse2 */ |
| 51100 | case 4925: /* *sse_sfence */ |
| 51101 | case 4924: /* *sse2_lfence */ |
| 51102 | case 4862: /* conflictv2di_mask */ |
| 51103 | case 4861: /* *conflictv2di */ |
| 51104 | case 4860: /* conflictv4di_mask */ |
| 51105 | case 4859: /* *conflictv4di */ |
| 51106 | case 4858: /* conflictv8di_mask */ |
| 51107 | case 4857: /* *conflictv8di */ |
| 51108 | case 4856: /* conflictv4si_mask */ |
| 51109 | case 4855: /* *conflictv4si */ |
| 51110 | case 4854: /* conflictv8si_mask */ |
| 51111 | case 4853: /* *conflictv8si */ |
| 51112 | case 4852: /* conflictv16si_mask */ |
| 51113 | case 4851: /* *conflictv16si */ |
| 51114 | case 4850: /* clzv2di2_mask */ |
| 51115 | case 4849: /* clzv2di2 */ |
| 51116 | case 4848: /* clzv4di2_mask */ |
| 51117 | case 4847: /* clzv4di2 */ |
| 51118 | case 4846: /* clzv8di2_mask */ |
| 51119 | case 4845: /* clzv8di2 */ |
| 51120 | case 4844: /* clzv4si2_mask */ |
| 51121 | case 4843: /* clzv4si2 */ |
| 51122 | case 4842: /* clzv8si2_mask */ |
| 51123 | case 4841: /* clzv8si2 */ |
| 51124 | case 4840: /* clzv16si2_mask */ |
| 51125 | case 4839: /* clzv16si2 */ |
| 51126 | case 4804: /* avx512dq_vmfpclassv2df */ |
| 51127 | case 4803: /* avx512dq_vmfpclassv4sf */ |
| 51128 | case 4802: /* avx512dq_fpclassv2df_mask */ |
| 51129 | case 4801: /* avx512dq_fpclassv2df */ |
| 51130 | case 4800: /* avx512dq_fpclassv4df_mask */ |
| 51131 | case 4799: /* avx512dq_fpclassv4df */ |
| 51132 | case 4798: /* avx512dq_fpclassv8df_mask */ |
| 51133 | case 4797: /* avx512dq_fpclassv8df */ |
| 51134 | case 4796: /* avx512dq_fpclassv4sf_mask */ |
| 51135 | case 4795: /* avx512dq_fpclassv4sf */ |
| 51136 | case 4794: /* avx512dq_fpclassv8sf_mask */ |
| 51137 | case 4793: /* avx512dq_fpclassv8sf */ |
| 51138 | case 4792: /* avx512dq_fpclassv16sf_mask */ |
| 51139 | case 4791: /* avx512dq_fpclassv16sf */ |
| 51140 | case 4790: /* avx512dq_rangesv2df_round */ |
| 51141 | case 4789: /* avx512dq_rangesv2df */ |
| 51142 | case 4788: /* avx512dq_rangesv4sf_round */ |
| 51143 | case 4787: /* avx512dq_rangesv4sf */ |
| 51144 | case 4786: /* avx512dq_rangepv2df_mask */ |
| 51145 | case 4785: /* avx512dq_rangepv2df */ |
| 51146 | case 4784: /* avx512dq_rangepv4df_mask */ |
| 51147 | case 4783: /* avx512dq_rangepv4df */ |
| 51148 | case 4782: /* avx512dq_rangepv8df_mask_round */ |
| 51149 | case 4781: /* avx512dq_rangepv8df_mask */ |
| 51150 | case 4780: /* avx512dq_rangepv8df_round */ |
| 51151 | case 4779: /* avx512dq_rangepv8df */ |
| 51152 | case 4778: /* avx512dq_rangepv4sf_mask */ |
| 51153 | case 4777: /* avx512dq_rangepv4sf */ |
| 51154 | case 4776: /* avx512dq_rangepv8sf_mask */ |
| 51155 | case 4775: /* avx512dq_rangepv8sf */ |
| 51156 | case 4774: /* avx512dq_rangepv16sf_mask_round */ |
| 51157 | case 4773: /* avx512dq_rangepv16sf_mask */ |
| 51158 | case 4772: /* avx512dq_rangepv16sf_round */ |
| 51159 | case 4771: /* avx512dq_rangepv16sf */ |
| 51160 | case 4489: /* avx512bw_lshrvv32hi_mask */ |
| 51161 | case 4488: /* avx512bw_lshrvv32hi */ |
| 51162 | case 4487: /* avx512bw_ashlvv32hi_mask */ |
| 51163 | case 4486: /* avx512bw_ashlvv32hi */ |
| 51164 | case 4485: /* avx512vl_lshrvv16hi_mask */ |
| 51165 | case 4484: /* avx512vl_lshrvv16hi */ |
| 51166 | case 4483: /* avx512vl_ashlvv16hi_mask */ |
| 51167 | case 4482: /* avx512vl_ashlvv16hi */ |
| 51168 | case 4481: /* avx512vl_lshrvv8hi_mask */ |
| 51169 | case 4480: /* avx512vl_lshrvv8hi */ |
| 51170 | case 4479: /* avx512vl_ashlvv8hi_mask */ |
| 51171 | case 4478: /* avx512vl_ashlvv8hi */ |
| 51172 | case 4477: /* avx2_lshrvv2di_mask */ |
| 51173 | case 4476: /* avx2_lshrvv2di */ |
| 51174 | case 4475: /* avx2_ashlvv2di_mask */ |
| 51175 | case 4474: /* avx2_ashlvv2di */ |
| 51176 | case 4473: /* avx2_lshrvv4di_mask */ |
| 51177 | case 4472: /* avx2_lshrvv4di */ |
| 51178 | case 4471: /* avx2_ashlvv4di_mask */ |
| 51179 | case 4470: /* avx2_ashlvv4di */ |
| 51180 | case 4469: /* avx512f_lshrvv8di_mask */ |
| 51181 | case 4468: /* avx512f_lshrvv8di */ |
| 51182 | case 4467: /* avx512f_ashlvv8di_mask */ |
| 51183 | case 4466: /* avx512f_ashlvv8di */ |
| 51184 | case 4465: /* avx2_lshrvv4si_mask */ |
| 51185 | case 4464: /* avx2_lshrvv4si */ |
| 51186 | case 4463: /* avx2_ashlvv4si_mask */ |
| 51187 | case 4462: /* avx2_ashlvv4si */ |
| 51188 | case 4461: /* avx2_lshrvv8si_mask */ |
| 51189 | case 4460: /* avx2_lshrvv8si */ |
| 51190 | case 4459: /* avx2_ashlvv8si_mask */ |
| 51191 | case 4458: /* avx2_ashlvv8si */ |
| 51192 | case 4457: /* avx512f_lshrvv16si_mask */ |
| 51193 | case 4456: /* avx512f_lshrvv16si */ |
| 51194 | case 4455: /* avx512f_ashlvv16si_mask */ |
| 51195 | case 4454: /* avx512f_ashlvv16si */ |
| 51196 | case 4453: /* avx512bw_ashrvv32hi_mask */ |
| 51197 | case 4452: /* avx512bw_ashrvv32hi */ |
| 51198 | case 4451: /* avx512vl_ashrvv16hi_mask */ |
| 51199 | case 4450: /* avx512vl_ashrvv16hi */ |
| 51200 | case 4449: /* avx512vl_ashrvv8hi_mask */ |
| 51201 | case 4448: /* avx512vl_ashrvv8hi */ |
| 51202 | case 4447: /* avx512f_ashrvv8di_mask */ |
| 51203 | case 4446: /* avx512f_ashrvv8di */ |
| 51204 | case 4445: /* avx2_ashrvv4di_mask */ |
| 51205 | case 4444: /* avx2_ashrvv4di */ |
| 51206 | case 4443: /* avx2_ashrvv2di_mask */ |
| 51207 | case 4442: /* avx2_ashrvv2di */ |
| 51208 | case 4441: /* avx512f_ashrvv16si_mask */ |
| 51209 | case 4440: /* avx512f_ashrvv16si */ |
| 51210 | case 4439: /* avx2_ashrvv8si_mask */ |
| 51211 | case 4438: /* avx2_ashrvv8si */ |
| 51212 | case 4437: /* avx2_ashrvv4si_mask */ |
| 51213 | case 4436: /* avx2_ashrvv4si */ |
| 51214 | case 4396: /* *ssse3_palignrv2df_perm */ |
| 51215 | case 4395: /* *ssse3_palignrv4sf_perm */ |
| 51216 | case 4394: /* *ssse3_palignrv2di_perm */ |
| 51217 | case 4393: /* *ssse3_palignrv4si_perm */ |
| 51218 | case 4392: /* *ssse3_palignrv8hi_perm */ |
| 51219 | case 4391: /* *ssse3_palignrv16qi_perm */ |
| 51220 | case 4249: /* avx512cd_maskw_vec_dupv4si */ |
| 51221 | case 4248: /* avx512cd_maskw_vec_dupv8si */ |
| 51222 | case 4247: /* avx512cd_maskw_vec_dupv16si */ |
| 51223 | case 4246: /* avx512cd_maskb_vec_dupv2di */ |
| 51224 | case 4245: /* avx512cd_maskb_vec_dupv4di */ |
| 51225 | case 4244: /* avx512cd_maskb_vec_dupv8di */ |
| 51226 | case 4056: /* avx_vzeroupper */ |
| 51227 | case 4055: /* *avx_vzeroall */ |
| 51228 | case 4047: /* xop_vpermil2v2df3 */ |
| 51229 | case 4046: /* xop_vpermil2v4df3 */ |
| 51230 | case 4045: /* xop_vpermil2v4sf3 */ |
| 51231 | case 4044: /* xop_vpermil2v8sf3 */ |
| 51232 | case 4031: /* xop_maskcmpv2di3 */ |
| 51233 | case 4030: /* xop_maskcmpv4si3 */ |
| 51234 | case 4029: /* xop_maskcmpv8hi3 */ |
| 51235 | case 4028: /* xop_maskcmpv16qi3 */ |
| 51236 | case 4027: /* *xop_vmfrczv2df2 */ |
| 51237 | case 4026: /* *xop_vmfrczv4sf2 */ |
| 51238 | case 4025: /* xop_frczv4df2 */ |
| 51239 | case 4024: /* xop_frczv8sf2 */ |
| 51240 | case 4023: /* xop_frczv2df2 */ |
| 51241 | case 4022: /* xop_frczv4sf2 */ |
| 51242 | case 4021: /* xop_frczdf2 */ |
| 51243 | case 4020: /* xop_frczsf2 */ |
| 51244 | case 4019: /* xop_shlv2di3 */ |
| 51245 | case 4018: /* xop_shlv4si3 */ |
| 51246 | case 4017: /* xop_shlv8hi3 */ |
| 51247 | case 4016: /* xop_shlv16qi3 */ |
| 51248 | case 4015: /* xop_shav2di3 */ |
| 51249 | case 4014: /* xop_shav4si3 */ |
| 51250 | case 4013: /* xop_shav8hi3 */ |
| 51251 | case 4012: /* xop_shav16qi3 */ |
| 51252 | case 4011: /* xop_vrotlv2di3 */ |
| 51253 | case 4010: /* xop_vrotlv4si3 */ |
| 51254 | case 4009: /* xop_vrotlv8hi3 */ |
| 51255 | case 4008: /* xop_vrotlv16qi3 */ |
| 51256 | case 4007: /* xop_rotrv2di3 */ |
| 51257 | case 4006: /* xop_rotrv4si3 */ |
| 51258 | case 4005: /* xop_rotrv8hi3 */ |
| 51259 | case 4004: /* xop_rotrv16qi3 */ |
| 51260 | case 4003: /* xop_rotlv2di3 */ |
| 51261 | case 4002: /* xop_rotlv4si3 */ |
| 51262 | case 4001: /* xop_rotlv8hi3 */ |
| 51263 | case 4000: /* xop_rotlv16qi3 */ |
| 51264 | case 3999: /* xop_pperm_pack_v8hi_v16qi */ |
| 51265 | case 3998: /* xop_pperm_pack_v4si_v8hi */ |
| 51266 | case 3997: /* xop_pperm_pack_v2di_v4si */ |
| 51267 | case 3996: /* xop_pperm */ |
| 51268 | case 3995: /* xop_phsubdq */ |
| 51269 | case 3994: /* xop_phsubwd */ |
| 51270 | case 3993: /* xop_phsubbw */ |
| 51271 | case 3992: /* xop_phaddudq */ |
| 51272 | case 3991: /* xop_phadddq */ |
| 51273 | case 3990: /* xop_phadduwq */ |
| 51274 | case 3989: /* xop_phaddwq */ |
| 51275 | case 3988: /* xop_phadduwd */ |
| 51276 | case 3987: /* xop_phaddwd */ |
| 51277 | case 3986: /* xop_phaddubq */ |
| 51278 | case 3985: /* xop_phaddbq */ |
| 51279 | case 3984: /* xop_phaddubd */ |
| 51280 | case 3983: /* xop_phaddbd */ |
| 51281 | case 3982: /* xop_phaddubw */ |
| 51282 | case 3981: /* xop_phaddbw */ |
| 51283 | case 3980: /* xop_pcmov_v2df */ |
| 51284 | case 3979: /* xop_pcmov_v4df256 */ |
| 51285 | case 3978: /* xop_pcmov_v8df512 */ |
| 51286 | case 3977: /* xop_pcmov_v4sf */ |
| 51287 | case 3976: /* xop_pcmov_v8sf256 */ |
| 51288 | case 3975: /* xop_pcmov_v16sf512 */ |
| 51289 | case 3974: /* xop_pcmov_v2di */ |
| 51290 | case 3973: /* xop_pcmov_v4di256 */ |
| 51291 | case 3972: /* xop_pcmov_v8di512 */ |
| 51292 | case 3971: /* xop_pcmov_v4si */ |
| 51293 | case 3970: /* xop_pcmov_v8si256 */ |
| 51294 | case 3969: /* xop_pcmov_v16si512 */ |
| 51295 | case 3968: /* xop_pcmov_v8hi */ |
| 51296 | case 3967: /* xop_pcmov_v16hi256 */ |
| 51297 | case 3966: /* xop_pcmov_v16qi */ |
| 51298 | case 3965: /* xop_pcmov_v32qi256 */ |
| 51299 | case 3952: /* avx512er_vmrsqrt28v2df_round */ |
| 51300 | case 3951: /* avx512er_vmrsqrt28v2df */ |
| 51301 | case 3950: /* avx512er_vmrsqrt28v4sf_round */ |
| 51302 | case 3949: /* avx512er_vmrsqrt28v4sf */ |
| 51303 | case 3948: /* avx512er_rsqrt28v8df_mask_round */ |
| 51304 | case 3947: /* avx512er_rsqrt28v8df_mask */ |
| 51305 | case 3946: /* *avx512er_rsqrt28v8df_round */ |
| 51306 | case 3945: /* *avx512er_rsqrt28v8df */ |
| 51307 | case 3944: /* avx512er_rsqrt28v16sf_mask_round */ |
| 51308 | case 3943: /* avx512er_rsqrt28v16sf_mask */ |
| 51309 | case 3942: /* *avx512er_rsqrt28v16sf_round */ |
| 51310 | case 3941: /* *avx512er_rsqrt28v16sf */ |
| 51311 | case 3940: /* avx512er_vmrcp28v2df_round */ |
| 51312 | case 3939: /* avx512er_vmrcp28v2df */ |
| 51313 | case 3938: /* avx512er_vmrcp28v4sf_round */ |
| 51314 | case 3937: /* avx512er_vmrcp28v4sf */ |
| 51315 | case 3936: /* avx512er_rcp28v8df_mask_round */ |
| 51316 | case 3935: /* avx512er_rcp28v8df_mask */ |
| 51317 | case 3934: /* *avx512er_rcp28v8df_round */ |
| 51318 | case 3933: /* *avx512er_rcp28v8df */ |
| 51319 | case 3932: /* avx512er_rcp28v16sf_mask_round */ |
| 51320 | case 3931: /* avx512er_rcp28v16sf_mask */ |
| 51321 | case 3930: /* *avx512er_rcp28v16sf_round */ |
| 51322 | case 3929: /* *avx512er_rcp28v16sf */ |
| 51323 | case 3928: /* avx512er_exp2v8df_mask_round */ |
| 51324 | case 3927: /* avx512er_exp2v8df_mask */ |
| 51325 | case 3926: /* avx512er_exp2v8df_round */ |
| 51326 | case 3925: /* avx512er_exp2v8df */ |
| 51327 | case 3924: /* avx512er_exp2v16sf_mask_round */ |
| 51328 | case 3923: /* avx512er_exp2v16sf_mask */ |
| 51329 | case 3922: /* avx512er_exp2v16sf_round */ |
| 51330 | case 3921: /* avx512er_exp2v16sf */ |
| 51331 | case 3920: /* *avx512pf_scatterpfv8didf_mask */ |
| 51332 | case 3919: /* *avx512pf_scatterpfv8didf_mask */ |
| 51333 | case 3918: /* *avx512pf_scatterpfv8sidf_mask */ |
| 51334 | case 3917: /* *avx512pf_scatterpfv8sidf_mask */ |
| 51335 | case 3916: /* *avx512pf_scatterpfv8disf_mask */ |
| 51336 | case 3915: /* *avx512pf_scatterpfv8disf_mask */ |
| 51337 | case 3914: /* *avx512pf_scatterpfv16sisf_mask */ |
| 51338 | case 3913: /* *avx512pf_scatterpfv16sisf_mask */ |
| 51339 | case 3912: /* *avx512pf_gatherpfv8didf_mask */ |
| 51340 | case 3911: /* *avx512pf_gatherpfv8didf_mask */ |
| 51341 | case 3910: /* *avx512pf_gatherpfv8sidf_mask */ |
| 51342 | case 3909: /* *avx512pf_gatherpfv8sidf_mask */ |
| 51343 | case 3908: /* *avx512pf_gatherpfv8disf_mask */ |
| 51344 | case 3907: /* *avx512pf_gatherpfv8disf_mask */ |
| 51345 | case 3906: /* *avx512pf_gatherpfv16sisf_mask */ |
| 51346 | case 3905: /* *avx512pf_gatherpfv16sisf_mask */ |
| 51347 | case 3769: /* sse4a_extrq */ |
| 51348 | case 3768: /* sse4a_extrqi */ |
| 51349 | case 3736: /* ssse3_palignrdi */ |
| 51350 | case 3735: /* ssse3_palignrti */ |
| 51351 | case 3734: /* avx2_palignrv2ti */ |
| 51352 | case 3733: /* avx512bw_palignrv4ti */ |
| 51353 | case 3732: /* ssse3_palignrv16qi_mask */ |
| 51354 | case 3731: /* avx2_palignrv32qi_mask */ |
| 51355 | case 3730: /* avx512bw_palignrv64qi_mask */ |
| 51356 | case 3674: /* sse2_clflush */ |
| 51357 | case 3673: /* sse_stmxcsr */ |
| 51358 | case 3672: /* sse_ldmxcsr */ |
| 51359 | case 3143: /* sse2_lshrv1ti3 */ |
| 51360 | case 3142: /* avx2_lshrv2ti3 */ |
| 51361 | case 3141: /* avx512bw_lshrv4ti3 */ |
| 51362 | case 3140: /* sse2_ashlv1ti3 */ |
| 51363 | case 3139: /* avx2_ashlv2ti3 */ |
| 51364 | case 3138: /* avx512bw_ashlv4ti3 */ |
| 51365 | case 3137: /* lshrv8di3_mask */ |
| 51366 | case 3136: /* lshrv8di3 */ |
| 51367 | case 3135: /* ashlv8di3_mask */ |
| 51368 | case 3134: /* ashlv8di3 */ |
| 51369 | case 3133: /* lshrv16si3_mask */ |
| 51370 | case 3132: /* lshrv16si3 */ |
| 51371 | case 3131: /* ashlv16si3_mask */ |
| 51372 | case 3130: /* ashlv16si3 */ |
| 51373 | case 3129: /* lshrv2di3_mask */ |
| 51374 | case 3128: /* lshrv2di3 */ |
| 51375 | case 3127: /* ashlv2di3_mask */ |
| 51376 | case 3126: /* ashlv2di3 */ |
| 51377 | case 3125: /* lshrv4di3_mask */ |
| 51378 | case 3124: /* lshrv4di3 */ |
| 51379 | case 3123: /* ashlv4di3_mask */ |
| 51380 | case 3122: /* ashlv4di3 */ |
| 51381 | case 3121: /* lshrv4si3_mask */ |
| 51382 | case 3120: /* lshrv4si3 */ |
| 51383 | case 3119: /* ashlv4si3_mask */ |
| 51384 | case 3118: /* ashlv4si3 */ |
| 51385 | case 3117: /* lshrv8si3_mask */ |
| 51386 | case 3116: /* lshrv8si3 */ |
| 51387 | case 3115: /* ashlv8si3_mask */ |
| 51388 | case 3114: /* ashlv8si3 */ |
| 51389 | case 3113: /* lshrv8hi3_mask */ |
| 51390 | case 3112: /* lshrv8hi3 */ |
| 51391 | case 3111: /* ashlv8hi3_mask */ |
| 51392 | case 3110: /* ashlv8hi3 */ |
| 51393 | case 3109: /* lshrv16hi3_mask */ |
| 51394 | case 3108: /* lshrv16hi3 */ |
| 51395 | case 3107: /* ashlv16hi3_mask */ |
| 51396 | case 3106: /* ashlv16hi3 */ |
| 51397 | case 3105: /* lshrv32hi3_mask */ |
| 51398 | case 3104: /* lshrv32hi3 */ |
| 51399 | case 3103: /* ashlv32hi3_mask */ |
| 51400 | case 3102: /* ashlv32hi3 */ |
| 51401 | case 3101: /* ashrv8di3_mask */ |
| 51402 | case 3100: /* ashrv8di3 */ |
| 51403 | case 3099: /* ashrv16si3_mask */ |
| 51404 | case 3098: /* ashrv16si3 */ |
| 51405 | case 3097: /* ashrv4di3_mask */ |
| 51406 | case 3096: /* ashrv4di3 */ |
| 51407 | case 3095: /* ashrv32hi3_mask */ |
| 51408 | case 3094: /* ashrv32hi3 */ |
| 51409 | case 3093: /* ashrv2di3_mask */ |
| 51410 | case 3092: /* *ashrv2di3 */ |
| 51411 | case 3091: /* ashrv4si3 */ |
| 51412 | case 3090: /* ashrv8si3 */ |
| 51413 | case 3089: /* ashrv8hi3 */ |
| 51414 | case 3088: /* ashrv16hi3 */ |
| 51415 | case 3087: /* ashrv4si3_mask */ |
| 51416 | case 3086: /* *ashrv4si3 */ |
| 51417 | case 3085: /* ashrv8si3_mask */ |
| 51418 | case 3084: /* *ashrv8si3 */ |
| 51419 | case 3083: /* ashrv8hi3_mask */ |
| 51420 | case 3082: /* *ashrv8hi3 */ |
| 51421 | case 3081: /* ashrv16hi3_mask */ |
| 51422 | case 3080: /* *ashrv16hi3 */ |
| 51423 | case 2443: /* avx512f_movsldup512_mask */ |
| 51424 | case 2442: /* *avx512f_movsldup512 */ |
| 51425 | case 2441: /* sse3_movsldup_mask */ |
| 51426 | case 2440: /* sse3_movsldup */ |
| 51427 | case 2439: /* avx_movsldup256_mask */ |
| 51428 | case 2438: /* avx_movsldup256 */ |
| 51429 | case 2437: /* avx512f_movshdup512_mask */ |
| 51430 | case 2436: /* *avx512f_movshdup512 */ |
| 51431 | case 2435: /* sse3_movshdup_mask */ |
| 51432 | case 2434: /* sse3_movshdup */ |
| 51433 | case 2433: /* avx_movshdup256_mask */ |
| 51434 | case 2432: /* avx_movshdup256 */ |
| 51435 | case 1634: /* reducesv2df */ |
| 51436 | case 1633: /* reducesv4sf */ |
| 51437 | case 1632: /* reducepv2df_mask */ |
| 51438 | case 1631: /* *reducepv2df */ |
| 51439 | case 1630: /* reducepv4df_mask */ |
| 51440 | case 1629: /* *reducepv4df */ |
| 51441 | case 1628: /* reducepv8df_mask */ |
| 51442 | case 1627: /* *reducepv8df */ |
| 51443 | case 1626: /* reducepv4sf_mask */ |
| 51444 | case 1625: /* *reducepv4sf */ |
| 51445 | case 1624: /* reducepv8sf_mask */ |
| 51446 | case 1623: /* *reducepv8sf */ |
| 51447 | case 1622: /* reducepv16sf_mask */ |
| 51448 | case 1621: /* *reducepv16sf */ |
| 51449 | case 1606: /* sse2_vmsminv2df3_round */ |
| 51450 | case 1605: /* sse2_vmsminv2df3 */ |
| 51451 | case 1604: /* sse2_vmsmaxv2df3_round */ |
| 51452 | case 1603: /* sse2_vmsmaxv2df3 */ |
| 51453 | case 1602: /* sse_vmsminv4sf3_round */ |
| 51454 | case 1601: /* sse_vmsminv4sf3 */ |
| 51455 | case 1600: /* sse_vmsmaxv4sf3_round */ |
| 51456 | case 1599: /* sse_vmsmaxv4sf3 */ |
| 51457 | case 1518: /* sse_vmrsqrtv4sf2 */ |
| 51458 | case 1517: /* rsqrt14v2df */ |
| 51459 | case 1516: /* rsqrt14v4sf */ |
| 51460 | case 1515: /* rsqrt14v2df_mask */ |
| 51461 | case 1514: /* *rsqrt14v2df */ |
| 51462 | case 1513: /* rsqrt14v4df_mask */ |
| 51463 | case 1512: /* *rsqrt14v4df */ |
| 51464 | case 1511: /* rsqrt14v8df_mask */ |
| 51465 | case 1510: /* *rsqrt14v8df */ |
| 51466 | case 1509: /* rsqrt14v4sf_mask */ |
| 51467 | case 1508: /* *rsqrt14v4sf */ |
| 51468 | case 1507: /* rsqrt14v8sf_mask */ |
| 51469 | case 1506: /* *rsqrt14v8sf */ |
| 51470 | case 1505: /* rsqrt14v16sf_mask */ |
| 51471 | case 1504: /* *rsqrt14v16sf */ |
| 51472 | case 1503: /* sse_rsqrtv4sf2 */ |
| 51473 | case 1502: /* avx_rsqrtv8sf2 */ |
| 51474 | case 1501: /* sse2_vmsqrtv2df2_round */ |
| 51475 | case 1500: /* sse2_vmsqrtv2df2 */ |
| 51476 | case 1499: /* sse_vmsqrtv4sf2_round */ |
| 51477 | case 1498: /* sse_vmsqrtv4sf2 */ |
| 51478 | case 1497: /* sse2_sqrtv2df2_mask */ |
| 51479 | case 1496: /* sse2_sqrtv2df2 */ |
| 51480 | case 1495: /* avx_sqrtv4df2_mask */ |
| 51481 | case 1494: /* avx_sqrtv4df2 */ |
| 51482 | case 1493: /* avx512f_sqrtv8df2_mask_round */ |
| 51483 | case 1492: /* avx512f_sqrtv8df2_mask */ |
| 51484 | case 1491: /* avx512f_sqrtv8df2_round */ |
| 51485 | case 1490: /* avx512f_sqrtv8df2 */ |
| 51486 | case 1489: /* sse_sqrtv4sf2_mask */ |
| 51487 | case 1488: /* sse_sqrtv4sf2 */ |
| 51488 | case 1487: /* avx_sqrtv8sf2_mask */ |
| 51489 | case 1486: /* avx_sqrtv8sf2 */ |
| 51490 | case 1485: /* avx512f_sqrtv16sf2_mask_round */ |
| 51491 | case 1484: /* avx512f_sqrtv16sf2_mask */ |
| 51492 | case 1483: /* avx512f_sqrtv16sf2_round */ |
| 51493 | case 1482: /* avx512f_sqrtv16sf2 */ |
| 51494 | case 1481: /* srcp14v2df */ |
| 51495 | case 1480: /* srcp14v4sf */ |
| 51496 | case 1479: /* rcp14v2df_mask */ |
| 51497 | case 1478: /* *rcp14v2df */ |
| 51498 | case 1477: /* rcp14v4df_mask */ |
| 51499 | case 1476: /* *rcp14v4df */ |
| 51500 | case 1475: /* rcp14v8df_mask */ |
| 51501 | case 1474: /* *rcp14v8df */ |
| 51502 | case 1473: /* rcp14v4sf_mask */ |
| 51503 | case 1472: /* *rcp14v4sf */ |
| 51504 | case 1471: /* rcp14v8sf_mask */ |
| 51505 | case 1470: /* *rcp14v8sf */ |
| 51506 | case 1469: /* rcp14v16sf_mask */ |
| 51507 | case 1468: /* *rcp14v16sf */ |
| 51508 | case 1467: /* sse_vmrcpv4sf2 */ |
| 51509 | case 1466: /* sse_rcpv4sf2 */ |
| 51510 | case 1465: /* avx_rcpv8sf2 */ |
| 51511 | case 1460: /* avx512f_divv8df3_mask_round */ |
| 51512 | case 1459: /* avx512f_divv8df3_mask */ |
| 51513 | case 1458: /* avx512f_divv8df3_round */ |
| 51514 | case 1457: /* avx512f_divv8df3 */ |
| 51515 | case 1452: /* avx512f_divv16sf3_mask_round */ |
| 51516 | case 1451: /* avx512f_divv16sf3_mask */ |
| 51517 | case 1450: /* avx512f_divv16sf3_round */ |
| 51518 | case 1449: /* avx512f_divv16sf3 */ |
| 51519 | case 1217: /* *mmx_femms */ |
| 51520 | case 1216: /* *mmx_emms */ |
| 51521 | case 1215: /* *mmx_maskmovq */ |
| 51522 | case 1214: /* *mmx_maskmovq */ |
| 51523 | case 1213: /* mmx_pmovmskb */ |
| 51524 | case 1212: /* mmx_psadbw */ |
| 51525 | case 1211: /* *mmx_uavgv4hi3 */ |
| 51526 | case 1210: /* *mmx_uavgv8qi3 */ |
| 51527 | case 1205: /* *vec_dupv2si */ |
| 51528 | case 1204: /* *vec_dupv4hi */ |
| 51529 | case 1203: /* mmx_pswapdv2si2 */ |
| 51530 | case 1202: /* mmx_pshufw_1 */ |
| 51531 | case 1201: /* mmx_pextrw */ |
| 51532 | case 1200: /* *mmx_pinsrw */ |
| 51533 | case 1199: /* mmx_punpckldq */ |
| 51534 | case 1198: /* mmx_punpckhdq */ |
| 51535 | case 1197: /* mmx_punpcklwd */ |
| 51536 | case 1196: /* mmx_punpckhwd */ |
| 51537 | case 1195: /* mmx_punpcklbw */ |
| 51538 | case 1194: /* mmx_punpckhbw */ |
| 51539 | case 1193: /* mmx_packuswb */ |
| 51540 | case 1192: /* mmx_packssdw */ |
| 51541 | case 1191: /* mmx_packsswb */ |
| 51542 | case 1190: /* *mmx_xorv2si3 */ |
| 51543 | case 1189: /* *mmx_iorv2si3 */ |
| 51544 | case 1188: /* *mmx_andv2si3 */ |
| 51545 | case 1187: /* *mmx_xorv4hi3 */ |
| 51546 | case 1186: /* *mmx_iorv4hi3 */ |
| 51547 | case 1185: /* *mmx_andv4hi3 */ |
| 51548 | case 1184: /* *mmx_xorv8qi3 */ |
| 51549 | case 1183: /* *mmx_iorv8qi3 */ |
| 51550 | case 1182: /* *mmx_andv8qi3 */ |
| 51551 | case 1181: /* mmx_andnotv2si3 */ |
| 51552 | case 1180: /* mmx_andnotv4hi3 */ |
| 51553 | case 1179: /* mmx_andnotv8qi3 */ |
| 51554 | case 1178: /* mmx_gtv2si3 */ |
| 51555 | case 1177: /* mmx_gtv4hi3 */ |
| 51556 | case 1176: /* mmx_gtv8qi3 */ |
| 51557 | case 1175: /* *mmx_eqv2si3 */ |
| 51558 | case 1174: /* *mmx_eqv4hi3 */ |
| 51559 | case 1173: /* *mmx_eqv8qi3 */ |
| 51560 | case 1172: /* mmx_lshrv1di3 */ |
| 51561 | case 1171: /* mmx_ashlv1di3 */ |
| 51562 | case 1170: /* mmx_lshrv2si3 */ |
| 51563 | case 1169: /* mmx_ashlv2si3 */ |
| 51564 | case 1168: /* mmx_lshrv4hi3 */ |
| 51565 | case 1167: /* mmx_ashlv4hi3 */ |
| 51566 | case 1166: /* mmx_ashrv2si3 */ |
| 51567 | case 1165: /* mmx_ashrv4hi3 */ |
| 51568 | case 1164: /* *mmx_uminv8qi3 */ |
| 51569 | case 1163: /* *mmx_umaxv8qi3 */ |
| 51570 | case 1162: /* *mmx_sminv4hi3 */ |
| 51571 | case 1161: /* *mmx_smaxv4hi3 */ |
| 51572 | case 1160: /* *sse2_umulv1siv1di3 */ |
| 51573 | case 1159: /* *mmx_pmulhrwv4hi3 */ |
| 51574 | case 1158: /* *mmx_pmaddwd */ |
| 51575 | case 1157: /* *mmx_umulv4hi3_highpart */ |
| 51576 | case 1156: /* *mmx_smulv4hi3_highpart */ |
| 51577 | case 1155: /* *mmx_mulv4hi3 */ |
| 51578 | case 1154: /* *mmx_ussubv4hi3 */ |
| 51579 | case 1153: /* *mmx_sssubv4hi3 */ |
| 51580 | case 1152: /* *mmx_usaddv4hi3 */ |
| 51581 | case 1151: /* *mmx_ssaddv4hi3 */ |
| 51582 | case 1150: /* *mmx_ussubv8qi3 */ |
| 51583 | case 1149: /* *mmx_sssubv8qi3 */ |
| 51584 | case 1148: /* *mmx_usaddv8qi3 */ |
| 51585 | case 1147: /* *mmx_ssaddv8qi3 */ |
| 51586 | case 1146: /* *mmx_subv1di3 */ |
| 51587 | case 1145: /* *mmx_addv1di3 */ |
| 51588 | case 1144: /* *mmx_subv2si3 */ |
| 51589 | case 1143: /* *mmx_addv2si3 */ |
| 51590 | case 1142: /* *mmx_subv4hi3 */ |
| 51591 | case 1141: /* *mmx_addv4hi3 */ |
| 51592 | case 1140: /* *mmx_subv8qi3 */ |
| 51593 | case 1139: /* *mmx_addv8qi3 */ |
| 51594 | case 1135: /* *vec_dupv2sf */ |
| 51595 | case 1134: /* mmx_pswapdv2sf2 */ |
| 51596 | case 1133: /* mmx_floatv2si2 */ |
| 51597 | case 1132: /* mmx_pi2fw */ |
| 51598 | case 1131: /* mmx_pf2iw */ |
| 51599 | case 1130: /* mmx_pf2id */ |
| 51600 | case 1129: /* mmx_gev2sf3 */ |
| 51601 | case 1128: /* mmx_gtv2sf3 */ |
| 51602 | case 1127: /* *mmx_eqv2sf3 */ |
| 51603 | case 1126: /* mmx_addsubv2sf3 */ |
| 51604 | case 1125: /* mmx_hsubv2sf3 */ |
| 51605 | case 1124: /* mmx_haddv2sf3 */ |
| 51606 | case 1123: /* mmx_rsqit1v2sf3 */ |
| 51607 | case 1122: /* mmx_rsqrtv2sf2 */ |
| 51608 | case 1121: /* mmx_rcpit2v2sf3 */ |
| 51609 | case 1120: /* mmx_rcpit1v2sf3 */ |
| 51610 | case 1119: /* mmx_rcpv2sf2 */ |
| 51611 | case 1118: /* mmx_ieee_minv2sf3 */ |
| 51612 | case 1117: /* mmx_ieee_maxv2sf3 */ |
| 51613 | case 1116: /* *mmx_sminv2sf3 */ |
| 51614 | case 1115: /* *mmx_smaxv2sf3 */ |
| 51615 | case 1114: /* *mmx_mulv2sf3 */ |
| 51616 | case 1113: /* *mmx_subv2sf3 */ |
| 51617 | case 1112: /* *mmx_addv2sf3 */ |
| 51618 | case 1081: /* clflushopt */ |
| 51619 | case 1080: /* clwb */ |
| 51620 | case 1008: /* *prefetch_prefetchwt1 */ |
| 51621 | case 1007: /* *prefetch_3dnow */ |
| 51622 | case 1006: /* *prefetch_sse */ |
| 51623 | case 984: /* *xop_pcmov_df */ |
| 51624 | case 983: /* *xop_pcmov_sf */ |
| 51625 | case 932: /* fxamdf2_i387_with_temp */ |
| 51626 | case 931: /* fxamsf2_i387_with_temp */ |
| 51627 | case 930: /* fxamxf2_i387 */ |
| 51628 | case 929: /* fxamdf2_i387 */ |
| 51629 | case 928: /* fxamsf2_i387 */ |
| 51630 | case 909: /* frndintxf2_mask_pm_i387 */ |
| 51631 | case 908: /* frndintxf2_mask_pm */ |
| 51632 | case 907: /* frndintxf2_trunc_i387 */ |
| 51633 | case 906: /* frndintxf2_ceil_i387 */ |
| 51634 | case 905: /* frndintxf2_floor_i387 */ |
| 51635 | case 904: /* frndintdf2_trunc_i387 */ |
| 51636 | case 903: /* frndintdf2_ceil_i387 */ |
| 51637 | case 902: /* frndintdf2_floor_i387 */ |
| 51638 | case 901: /* frndintsf2_trunc_i387 */ |
| 51639 | case 900: /* frndintsf2_ceil_i387 */ |
| 51640 | case 899: /* frndintsf2_floor_i387 */ |
| 51641 | case 898: /* frndintxf2_trunc */ |
| 51642 | case 897: /* frndintxf2_ceil */ |
| 51643 | case 896: /* frndintxf2_floor */ |
| 51644 | case 895: /* frndintdf2_trunc */ |
| 51645 | case 894: /* frndintdf2_ceil */ |
| 51646 | case 893: /* frndintdf2_floor */ |
| 51647 | case 892: /* frndintsf2_trunc */ |
| 51648 | case 891: /* frndintsf2_ceil */ |
| 51649 | case 890: /* frndintsf2_floor */ |
| 51650 | case 889: /* fistsi2_with_temp */ |
| 51651 | case 888: /* fisthi2_with_temp */ |
| 51652 | case 887: /* fistsi2 */ |
| 51653 | case 886: /* fisthi2 */ |
| 51654 | case 885: /* *fistsi2_1 */ |
| 51655 | case 884: /* *fisthi2_1 */ |
| 51656 | case 883: /* fistdi2_with_temp */ |
| 51657 | case 882: /* fistdi2 */ |
| 51658 | case 881: /* *fistdi2_1 */ |
| 51659 | case 880: /* rintdf2_frndint */ |
| 51660 | case 879: /* rintsf2_frndint */ |
| 51661 | case 878: /* rintxf2 */ |
| 51662 | case 875: /* fscalexf4_i387 */ |
| 51663 | case 874: /* *f2xm1xf2_i387 */ |
| 51664 | case 873: /* fxtract_extenddfxf3_i387 */ |
| 51665 | case 872: /* fxtract_extendsfxf3_i387 */ |
| 51666 | case 871: /* fxtractxf3_i387 */ |
| 51667 | case 870: /* fyl2xp1_extenddfxf3_i387 */ |
| 51668 | case 869: /* fyl2xp1_extendsfxf3_i387 */ |
| 51669 | case 868: /* fyl2xp1xf3_i387 */ |
| 51670 | case 867: /* fyl2x_extenddfxf3_i387 */ |
| 51671 | case 866: /* fyl2x_extendsfxf3_i387 */ |
| 51672 | case 865: /* fyl2xxf3_i387 */ |
| 51673 | case 864: /* fpatan_extenddfxf3_i387 */ |
| 51674 | case 863: /* fpatan_extendsfxf3_i387 */ |
| 51675 | case 862: /* *fpatanxf3_i387 */ |
| 51676 | case 861: /* fptan_extenddfxf4_i387 */ |
| 51677 | case 860: /* fptan_extendsfxf4_i387 */ |
| 51678 | case 859: /* fptanxf4_i387 */ |
| 51679 | case 858: /* sincos_extenddfxf3_i387 */ |
| 51680 | case 857: /* sincos_extendsfxf3_i387 */ |
| 51681 | case 856: /* sincosxf3 */ |
| 51682 | case 855: /* *cos_extenddfxf2_i387 */ |
| 51683 | case 854: /* *sin_extenddfxf2_i387 */ |
| 51684 | case 853: /* *cos_extendsfxf2_i387 */ |
| 51685 | case 852: /* *sin_extendsfxf2_i387 */ |
| 51686 | case 851: /* *cosxf2_i387 */ |
| 51687 | case 850: /* *sinxf2_i387 */ |
| 51688 | case 849: /* fprem1xf4_i387 */ |
| 51689 | case 848: /* fpremxf4_i387 */ |
| 51690 | case 847: /* *sqrtdf2_sse */ |
| 51691 | case 846: /* *sqrtsf2_sse */ |
| 51692 | case 845: /* *rsqrtsf2_sse */ |
| 51693 | case 844: /* sqrt_extenddfxf2_i387 */ |
| 51694 | case 843: /* sqrt_extendsfxf2_i387 */ |
| 51695 | case 842: /* sqrtxf2 */ |
| 51696 | case 814: /* *rcpsf2_sse */ |
| 51697 | case 810: /* *tls_dynamic_gnu2_call_64 */ |
| 51698 | case 807: /* *tls_dynamic_gnu2_call_32 */ |
| 51699 | case 685: /* *sibcall_value_pop_memory */ |
| 51700 | case 684: /* *sibcall_value_pop */ |
| 51701 | case 683: /* *call_value_pop */ |
| 51702 | case 682: /* *sibcall_value_memory */ |
| 51703 | case 681: /* *sibcall_value_memory */ |
| 51704 | case 680: /* *sibcall_value */ |
| 51705 | case 679: /* *sibcall_value */ |
| 51706 | case 678: /* *sibcall_value_GOT_32 */ |
| 51707 | case 677: /* *call_value_got_x32 */ |
| 51708 | case 676: /* *call_value */ |
| 51709 | case 675: /* *call_value */ |
| 51710 | case 674: /* *sibcall_pop_memory */ |
| 51711 | case 673: /* *sibcall_pop */ |
| 51712 | case 672: /* *call_pop */ |
| 51713 | case 671: /* *sibcall_memory */ |
| 51714 | case 670: /* *sibcall_memory */ |
| 51715 | case 669: /* *sibcall */ |
| 51716 | case 668: /* *sibcall */ |
| 51717 | case 667: /* *sibcall_GOT_32 */ |
| 51718 | case 666: /* *call_got_x32 */ |
| 51719 | case 665: /* *call */ |
| 51720 | case 664: /* *call */ |
| 51721 | case 209: /* floatdixf2_i387_with_xmm */ |
| 51722 | case 208: /* floatdidf2_i387_with_xmm */ |
| 51723 | case 207: /* floatdisf2_i387_with_xmm */ |
| 51724 | case 193: /* x86_fldcw_1 */ |
| 51725 | case 192: /* x86_fnstcw_1 */ |
| 51726 | case 47: /* x86_fnstsw_1 */ |
| 51727 | case 46: /* *cmpxf_si_cc_i387 */ |
| 51728 | case 45: /* *cmpdf_si_cc_i387 */ |
| 51729 | case 44: /* *cmpsf_si_cc_i387 */ |
| 51730 | case 43: /* *cmpxf_hi_cc_i387 */ |
| 51731 | case 42: /* *cmpdf_hi_cc_i387 */ |
| 51732 | case 41: /* *cmpsf_hi_cc_i387 */ |
| 51733 | case 40: /* *cmpxf_si_i387 */ |
| 51734 | case 39: /* *cmpdf_si_i387 */ |
| 51735 | case 38: /* *cmpsf_si_i387 */ |
| 51736 | case 37: /* *cmpxf_hi_i387 */ |
| 51737 | case 36: /* *cmpdf_hi_i387 */ |
| 51738 | case 35: /* *cmpsf_hi_i387 */ |
| 51739 | case 34: /* *cmpuxf_cc_i387 */ |
| 51740 | case 33: /* *cmpudf_cc_i387 */ |
| 51741 | case 32: /* *cmpusf_cc_i387 */ |
| 51742 | case 31: /* *cmpuxf_i387 */ |
| 51743 | case 30: /* *cmpudf_i387 */ |
| 51744 | case 29: /* *cmpusf_i387 */ |
| 51745 | case 28: /* *cmpdf_cc_i387 */ |
| 51746 | case 27: /* *cmpsf_cc_i387 */ |
| 51747 | case 26: /* *cmpdf_i387 */ |
| 51748 | case 25: /* *cmpsf_i387 */ |
| 51749 | case 24: /* *cmpxf_cc_i387 */ |
| 51750 | case 23: /* *cmpxf_i387 */ |
| 51751 | case 22: /* *cmpxf_0_cc_i387 */ |
| 51752 | case 21: /* *cmpdf_0_cc_i387 */ |
| 51753 | case 20: /* *cmpsf_0_cc_i387 */ |
| 51754 | case 19: /* *cmpxf_0_i387 */ |
| 51755 | case 18: /* *cmpdf_0_i387 */ |
| 51756 | case 17: /* *cmpsf_0_i387 */ |
| 51757 | return 0; |
| 51758 | |
| 51759 | case 659: /* jump */ |
| 51760 | case 628: /* *jcc_2 */ |
| 51761 | case 627: /* *jcc_1 */ |
| 51762 | case 393: /* *testqi_ext_2 */ |
| 51763 | case 392: /* *testqi_ext_1 */ |
| 51764 | case 391: /* *testsi_1 */ |
| 51765 | case 390: /* *testhi_1 */ |
| 51766 | case 389: /* *testqi_1 */ |
| 51767 | case 388: /* *testqi_1_maybe_si */ |
| 51768 | case 387: /* *testdi_1 */ |
| 51769 | case 222: /* *addqi_1_slp */ |
| 51770 | case 16: /* *cmpqi_ext_4 */ |
| 51771 | case 15: /* *cmpqi_ext_3 */ |
| 51772 | case 14: /* *cmpqi_ext_2 */ |
| 51773 | case 13: /* *cmpqi_ext_1 */ |
| 51774 | case 12: /* *cmpdi_minus_1 */ |
| 51775 | case 11: /* *cmpsi_minus_1 */ |
| 51776 | case 10: /* *cmphi_minus_1 */ |
| 51777 | case 9: /* *cmpqi_minus_1 */ |
| 51778 | case 8: /* *cmpdi_1 */ |
| 51779 | case 7: /* *cmpsi_1 */ |
| 51780 | case 6: /* *cmphi_1 */ |
| 51781 | case 5: /* *cmpqi_1 */ |
| 51782 | case 4: /* *cmpdi_ccno_1 */ |
| 51783 | case 3: /* *cmpsi_ccno_1 */ |
| 51784 | case 2: /* *cmphi_ccno_1 */ |
| 51785 | case 1: /* *cmpqi_ccno_1 */ |
| 51786 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) |
| 51787 | { |
| 51788 | return 1; |
| 51789 | } |
| 51790 | else if (cached_memory == MEMORY_LOAD) |
| 51791 | { |
| 51792 | return 5; |
| 51793 | } |
| 51794 | else |
| 51795 | { |
| 51796 | return 0; |
| 51797 | } |
| 51798 | |
| 51799 | case -1: |
| 51800 | if (GET_CODE (PATTERN (insn)) != ASM_INPUT |
| 51801 | && asm_noperands (PATTERN (insn)) < 0) |
| 51802 | fatal_insn_not_found (insn); |
| 51803 | /* FALLTHRU */ |
| 51804 | default: |
| 51805 | extract_insn_cached (insn); |
| 51806 | if (((cached_type = get_attr_type (insn)) == TYPE_CALL) || (cached_type == TYPE_CALLV)) |
| 51807 | { |
| 51808 | return 0; |
| 51809 | } |
| 51810 | else if (cached_type == TYPE_PUSH) |
| 51811 | { |
| 51812 | return 1; |
| 51813 | } |
| 51814 | else if (cached_type == TYPE_POP) |
| 51815 | { |
| 51816 | return 1; |
| 51817 | } |
| 51818 | else if (cached_type == TYPE_LEAVE) |
| 51819 | { |
| 51820 | return 3; |
| 51821 | } |
| 51822 | else if (cached_type == TYPE_LEA) |
| 51823 | { |
| 51824 | return 1; |
| 51825 | } |
| 51826 | else if ((cached_type == TYPE_IMUL) && ((cached_mode = get_attr_mode (insn)) == MODE_DI) && (((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) || (cached_memory == MEMORY_UNKNOWN))) |
| 51827 | { |
| 51828 | return 6; |
| 51829 | } |
| 51830 | else if ((cached_type == TYPE_IMUL) && (((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) || (cached_memory == MEMORY_UNKNOWN))) |
| 51831 | { |
| 51832 | return 4; |
| 51833 | } |
| 51834 | else if ((cached_type == TYPE_IMUL) && ((cached_mode = get_attr_mode (insn)) == MODE_DI) && (((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) || (cached_memory == MEMORY_BOTH))) |
| 51835 | { |
| 51836 | return 10 /* 0xa */; |
| 51837 | } |
| 51838 | else if ((cached_type == TYPE_IMUL) && (((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) || (cached_memory == MEMORY_BOTH))) |
| 51839 | { |
| 51840 | return 8; |
| 51841 | } |
| 51842 | else if ((cached_type == TYPE_IDIV) && (((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) || (cached_memory == MEMORY_UNKNOWN))) |
| 51843 | { |
| 51844 | return 6; |
| 51845 | } |
| 51846 | else if ((cached_type == TYPE_IDIV) && (((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) || (cached_memory == MEMORY_BOTH))) |
| 51847 | { |
| 51848 | return 10 /* 0xa */; |
| 51849 | } |
| 51850 | else if ((cached_type == TYPE_STR) && (((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) || (cached_memory == MEMORY_BOTH) || (cached_memory == MEMORY_STORE))) |
| 51851 | { |
| 51852 | return 6; |
| 51853 | } |
| 51854 | else if (((cached_bdver1_decode = get_attr_bdver1_decode (insn)) == BDVER1_DECODE_DIRECT) && (((cached_unit = get_attr_unit (insn)) == UNIT_INTEGER) || (cached_unit == UNIT_UNKNOWN)) && (((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) || (cached_memory == MEMORY_UNKNOWN))) |
| 51855 | { |
| 51856 | return 1; |
| 51857 | } |
| 51858 | else if ((cached_bdver1_decode == BDVER1_DECODE_VECTOR) && (((cached_unit = get_attr_unit (insn)) == UNIT_INTEGER) || (cached_unit == UNIT_UNKNOWN)) && (((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) || (cached_memory == MEMORY_UNKNOWN))) |
| 51859 | { |
| 51860 | return 2; |
| 51861 | } |
| 51862 | else if ((cached_type == TYPE_IMOV) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 51863 | { |
| 51864 | return 4; |
| 51865 | } |
| 51866 | else if ((cached_bdver1_decode == BDVER1_DECODE_DIRECT) && (((cached_unit = get_attr_unit (insn)) == UNIT_INTEGER) || (cached_unit == UNIT_UNKNOWN)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 51867 | { |
| 51868 | return 5; |
| 51869 | } |
| 51870 | else if ((cached_bdver1_decode == BDVER1_DECODE_VECTOR) && (((cached_unit = get_attr_unit (insn)) == UNIT_INTEGER) || (cached_unit == UNIT_UNKNOWN)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 51871 | { |
| 51872 | return 6; |
| 51873 | } |
| 51874 | else if ((cached_type == TYPE_IMOV) && ((cached_memory = get_attr_memory (insn)) == MEMORY_STORE)) |
| 51875 | { |
| 51876 | return 4; |
| 51877 | } |
| 51878 | else if ((cached_bdver1_decode == BDVER1_DECODE_DIRECT) && (((cached_unit = get_attr_unit (insn)) == UNIT_INTEGER) || (cached_unit == UNIT_UNKNOWN)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_BOTH)) |
| 51879 | { |
| 51880 | return 4; |
| 51881 | } |
| 51882 | else if ((cached_bdver1_decode == BDVER1_DECODE_VECTOR) && (((cached_unit = get_attr_unit (insn)) == UNIT_INTEGER) || (cached_unit == UNIT_UNKNOWN)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_BOTH)) |
| 51883 | { |
| 51884 | return 5; |
| 51885 | } |
| 51886 | else if ((cached_bdver1_decode == BDVER1_DECODE_DIRECT) && (((cached_unit = get_attr_unit (insn)) == UNIT_INTEGER) || (cached_unit == UNIT_UNKNOWN)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_STORE)) |
| 51887 | { |
| 51888 | return 4; |
| 51889 | } |
| 51890 | else if ((cached_bdver1_decode == BDVER1_DECODE_VECTOR) && (((cached_unit = get_attr_unit (insn)) == UNIT_INTEGER) || (cached_unit == UNIT_UNKNOWN)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_STORE)) |
| 51891 | { |
| 51892 | return 5; |
| 51893 | } |
| 51894 | else if ((cached_type == TYPE_FMOV) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) && ((cached_mode = get_attr_mode (insn)) == MODE_XF)) |
| 51895 | { |
| 51896 | return 13 /* 0xd */; |
| 51897 | } |
| 51898 | else if ((cached_type == TYPE_FMOV) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 51899 | { |
| 51900 | return 5; |
| 51901 | } |
| 51902 | else if ((cached_type == TYPE_FMOV) && (((cached_memory = get_attr_memory (insn)) == MEMORY_STORE) || (cached_memory == MEMORY_BOTH)) && ((cached_mode = get_attr_mode (insn)) == MODE_XF)) |
| 51903 | { |
| 51904 | return 8; |
| 51905 | } |
| 51906 | else if ((cached_type == TYPE_FMOV) && (((cached_memory = get_attr_memory (insn)) == MEMORY_STORE) || (cached_memory == MEMORY_BOTH))) |
| 51907 | { |
| 51908 | return 2; |
| 51909 | } |
| 51910 | else if ((cached_type == TYPE_FISTP) || (cached_type == TYPE_FISTTP)) |
| 51911 | { |
| 51912 | return 2; |
| 51913 | } |
| 51914 | else if (cached_type == TYPE_FMOV) |
| 51915 | { |
| 51916 | return 2; |
| 51917 | } |
| 51918 | else if ((cached_type == TYPE_FOP) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 51919 | { |
| 51920 | return 10 /* 0xa */; |
| 51921 | } |
| 51922 | else if (cached_type == TYPE_FOP) |
| 51923 | { |
| 51924 | return 6; |
| 51925 | } |
| 51926 | else if ((cached_type == TYPE_FMUL) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 51927 | { |
| 51928 | return 10 /* 0xa */; |
| 51929 | } |
| 51930 | else if (cached_type == TYPE_FMUL) |
| 51931 | { |
| 51932 | return 6; |
| 51933 | } |
| 51934 | else if (cached_type == TYPE_FSGN) |
| 51935 | { |
| 51936 | return 2; |
| 51937 | } |
| 51938 | else if ((cached_type == TYPE_FDIV) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 51939 | { |
| 51940 | return 46 /* 0x2e */; |
| 51941 | } |
| 51942 | else if (cached_type == TYPE_FDIV) |
| 51943 | { |
| 51944 | return 42 /* 0x2a */; |
| 51945 | } |
| 51946 | else if ((cached_type == TYPE_FPSPC) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 51947 | { |
| 51948 | return 103 /* 0x67 */; |
| 51949 | } |
| 51950 | else if ((cached_type == TYPE_FCMOV) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 51951 | { |
| 51952 | return 17 /* 0x11 */; |
| 51953 | } |
| 51954 | else if (cached_type == TYPE_FCMOV) |
| 51955 | { |
| 51956 | return 15 /* 0xf */; |
| 51957 | } |
| 51958 | else if ((cached_type == TYPE_FCMP) && (cached_bdver1_decode == BDVER1_DECODE_DOUBLE) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 51959 | { |
| 51960 | return 6; |
| 51961 | } |
| 51962 | else if ((cached_bdver1_decode == BDVER1_DECODE_DOUBLE) && (cached_type == TYPE_FCMP)) |
| 51963 | { |
| 51964 | return 2; |
| 51965 | } |
| 51966 | else if ((cached_type == TYPE_FCMP) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 51967 | { |
| 51968 | return 6; |
| 51969 | } |
| 51970 | else if (cached_type == TYPE_FCMP) |
| 51971 | { |
| 51972 | return 2; |
| 51973 | } |
| 51974 | else if (cached_type == TYPE_FXCH) |
| 51975 | { |
| 51976 | return 2; |
| 51977 | } |
| 51978 | else if ((cached_type == TYPE_SSEMOV) && ((cached_prefix = get_attr_prefix (insn)) == PREFIX_VEX) && ((cached_movu = get_attr_movu (insn)) == MOVU_1) && (((cached_mode = get_attr_mode (insn)) == MODE_V4SF) || (cached_mode == MODE_V2DF)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 51979 | { |
| 51980 | return 4; |
| 51981 | } |
| 51982 | else if ((cached_type == TYPE_SSEMOV) && ((cached_movu = get_attr_movu (insn)) == MOVU_1) && (((cached_mode = get_attr_mode (insn)) == MODE_V8SF) || (cached_mode == MODE_V4DF)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 51983 | { |
| 51984 | return 5; |
| 51985 | } |
| 51986 | else if ((cached_type == TYPE_SSEMOV) && ((cached_movu = get_attr_movu (insn)) == MOVU_1) && (((cached_mode = get_attr_mode (insn)) == MODE_V4SF) || (cached_mode == MODE_V2DF)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 51987 | { |
| 51988 | return 4; |
| 51989 | } |
| 51990 | else if ((cached_type == TYPE_SSEMOV) && ((cached_prefix = get_attr_prefix (insn)) == PREFIX_VEX) && (((cached_mode = get_attr_mode (insn)) == MODE_V4SF) || (cached_mode == MODE_V2DF) || (cached_mode == MODE_TI)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 51991 | { |
| 51992 | return 4; |
| 51993 | } |
| 51994 | else if ((cached_type == TYPE_SSEMOV) && (((cached_mode = get_attr_mode (insn)) == MODE_V8SF) || (cached_mode == MODE_V4DF) || (cached_mode == MODE_OI)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 51995 | { |
| 51996 | return 5; |
| 51997 | } |
| 51998 | else if ((cached_type == TYPE_SSEMOV) && (((cached_mode = get_attr_mode (insn)) == MODE_V4SF) || (cached_mode == MODE_V2DF) || (cached_mode == MODE_TI)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 51999 | { |
| 52000 | return 4; |
| 52001 | } |
| 52002 | else if ((cached_type == TYPE_SSEMOV) && ((cached_mode = get_attr_mode (insn)) == MODE_DI) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 52003 | { |
| 52004 | return 4; |
| 52005 | } |
| 52006 | else if ((cached_type == TYPE_SSEMOV) && ((cached_prefix = get_attr_prefix (insn)) == PREFIX_VEX) && ((cached_mode = get_attr_mode (insn)) == MODE_SF) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 52007 | { |
| 52008 | return 4; |
| 52009 | } |
| 52010 | else if ((cached_type == TYPE_SSEMOV) && (((cached_mode = get_attr_mode (insn)) == MODE_SF) || (cached_mode == MODE_DF)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 52011 | { |
| 52012 | return 4; |
| 52013 | } |
| 52014 | else if (((cached_type == TYPE_MMXMOV) || (cached_type == TYPE_SSEMOV)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 52015 | { |
| 52016 | return 4; |
| 52017 | } |
| 52018 | else if ((cached_type == TYPE_SSEMOV) && (((cached_mode = get_attr_mode (insn)) == MODE_V8SF) || (cached_mode == MODE_V4DF) || (cached_mode == MODE_OI)) && (((cached_memory = get_attr_memory (insn)) == MEMORY_STORE) || (cached_memory == MEMORY_BOTH))) |
| 52019 | { |
| 52020 | return 5; |
| 52021 | } |
| 52022 | else if ((cached_type == TYPE_SSEMOV) && (((cached_mode = get_attr_mode (insn)) == MODE_V4SF) || (cached_mode == MODE_V2DF) || (cached_mode == MODE_TI)) && (((cached_memory = get_attr_memory (insn)) == MEMORY_STORE) || (cached_memory == MEMORY_BOTH))) |
| 52023 | { |
| 52024 | return 4; |
| 52025 | } |
| 52026 | else if (((cached_type == TYPE_MMXMOV) || (cached_type == TYPE_SSEMOV)) && (((cached_memory = get_attr_memory (insn)) == MEMORY_STORE) || (cached_memory == MEMORY_BOTH))) |
| 52027 | { |
| 52028 | return 4; |
| 52029 | } |
| 52030 | else if ((cached_type == TYPE_SSEMOV) && (((cached_mode = get_attr_mode (insn)) == MODE_V8SF) || (cached_mode == MODE_V4DF) || (cached_mode == MODE_OI)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 52031 | { |
| 52032 | return 3; |
| 52033 | } |
| 52034 | else if ((cached_type == TYPE_SSEMOV) && (((cached_mode = get_attr_mode (insn)) == MODE_SF) || (cached_mode == MODE_DF)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 52035 | { |
| 52036 | return 2; |
| 52037 | } |
| 52038 | else if (((cached_type == TYPE_MMXMOV) || (cached_type == TYPE_SSEMOV)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 52039 | { |
| 52040 | return 2; |
| 52041 | } |
| 52042 | else if (((cached_type == TYPE_SSELOG) || (cached_type == TYPE_SSELOG1) || (cached_type == TYPE_SSESHUF) || (cached_type == TYPE_SSESHUF1)) && ((cached_mode = get_attr_mode (insn)) == MODE_V8SF) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 52043 | { |
| 52044 | return 7; |
| 52045 | } |
| 52046 | else if (((cached_type == TYPE_SSELOG) || (cached_type == TYPE_SSELOG1) || (cached_type == TYPE_SSESHUF) || (cached_type == TYPE_SSESHUF1)) && ((cached_mode = get_attr_mode (insn)) == MODE_V8SF)) |
| 52047 | { |
| 52048 | return 3; |
| 52049 | } |
| 52050 | else if (((cached_type == TYPE_SSELOG) || (cached_type == TYPE_SSELOG1) || (cached_type == TYPE_SSESHUF) || (cached_type == TYPE_SSESHUF1)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 52051 | { |
| 52052 | return 6; |
| 52053 | } |
| 52054 | else if ((cached_type == TYPE_SSELOG) || (cached_type == TYPE_SSELOG1) || (cached_type == TYPE_SSESHUF) || (cached_type == TYPE_SSESHUF1)) |
| 52055 | { |
| 52056 | return 2; |
| 52057 | } |
| 52058 | else if ((cached_type == TYPE_SSECMP) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 52059 | { |
| 52060 | return 6; |
| 52061 | } |
| 52062 | else if (cached_type == TYPE_SSECMP) |
| 52063 | { |
| 52064 | return 2; |
| 52065 | } |
| 52066 | else if ((cached_type == TYPE_SSECOMI) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 52067 | { |
| 52068 | return 6; |
| 52069 | } |
| 52070 | else if (cached_type == TYPE_SSECOMI) |
| 52071 | { |
| 52072 | return 2; |
| 52073 | } |
| 52074 | else if ((cached_type == TYPE_SSECVT) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) && (((register_operand (operands[0], V4DFmode)) || (register_operand (operands[0], V8SFmode)) || (register_operand (operands[0], V8SImode))) || (nonimmediate_operand (operands[1], V4DFmode)) || (nonimmediate_operand (operands[1], V8SFmode)) || (nonimmediate_operand (operands[1], V8SImode)))) |
| 52075 | { |
| 52076 | return 8; |
| 52077 | } |
| 52078 | else if ((cached_type == TYPE_SSECVT) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) && (((register_operand (operands[0], V4DFmode)) || (register_operand (operands[0], V8SFmode)) || (register_operand (operands[0], V8SImode))) || (nonimmediate_operand (operands[1], V4DFmode)) || (nonimmediate_operand (operands[1], V8SFmode)) || (nonimmediate_operand (operands[1], V8SImode)))) |
| 52079 | { |
| 52080 | return 4; |
| 52081 | } |
| 52082 | else if ((cached_type == TYPE_SSECVT) && (((cached_mode = get_attr_mode (insn)) == MODE_SF) || (cached_mode == MODE_DF)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 52083 | { |
| 52084 | return 8; |
| 52085 | } |
| 52086 | else if ((cached_type == TYPE_SSECVT) && (((cached_mode = get_attr_mode (insn)) == MODE_SF) || (cached_mode == MODE_DF)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 52087 | { |
| 52088 | return 4; |
| 52089 | } |
| 52090 | else if ((cached_type == TYPE_SSEICVT) && (((cached_mode = get_attr_mode (insn)) == MODE_SF) || (cached_mode == MODE_DF)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 52091 | { |
| 52092 | return 8; |
| 52093 | } |
| 52094 | else if ((cached_type == TYPE_SSEICVT) && (((cached_mode = get_attr_mode (insn)) == MODE_SF) || (cached_mode == MODE_DF)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 52095 | { |
| 52096 | return 4; |
| 52097 | } |
| 52098 | else if ((cached_type == TYPE_SSECVT) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) && (register_operand (operands[0], V4SFmode)) && (nonimmediate_operand (operands[1], V2DFmode))) |
| 52099 | { |
| 52100 | return 8; |
| 52101 | } |
| 52102 | else if ((cached_type == TYPE_SSECVT) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) && (register_operand (operands[0], V4SFmode)) && (nonimmediate_operand (operands[1], V2DFmode))) |
| 52103 | { |
| 52104 | return 4; |
| 52105 | } |
| 52106 | else if ((cached_type == TYPE_SSECVT) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) && (register_operand (operands[0], V4SFmode)) && ((nonimmediate_operand (operands[1], V2SImode)) || (nonimmediate_operand (operands[1], V4SImode)))) |
| 52107 | { |
| 52108 | return 8; |
| 52109 | } |
| 52110 | else if ((cached_type == TYPE_SSECVT) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) && (register_operand (operands[0], V4SFmode)) && ((nonimmediate_operand (operands[1], V2SImode)) || (nonimmediate_operand (operands[1], V4SImode)))) |
| 52111 | { |
| 52112 | return 4; |
| 52113 | } |
| 52114 | else if ((cached_type == TYPE_SSECVT) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) && (register_operand (operands[0], V2DFmode)) && (nonimmediate_operand (operands[1], V4SImode))) |
| 52115 | { |
| 52116 | return 8; |
| 52117 | } |
| 52118 | else if ((cached_type == TYPE_SSECVT) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) && (register_operand (operands[0], V2DFmode)) && (nonimmediate_operand (operands[1], V4SImode))) |
| 52119 | { |
| 52120 | return 4; |
| 52121 | } |
| 52122 | else if ((cached_type == TYPE_SSECVT) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) && (register_operand (operands[0], V2DFmode)) && ((nonimmediate_operand (operands[1], V2SImode)) || (nonimmediate_operand (operands[1], V4SFmode)))) |
| 52123 | { |
| 52124 | return 6; |
| 52125 | } |
| 52126 | else if ((cached_type == TYPE_SSECVT) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) && (register_operand (operands[0], V2DFmode)) && ((nonimmediate_operand (operands[1], V2SImode)) || (nonimmediate_operand (operands[1], V4SFmode)))) |
| 52127 | { |
| 52128 | return 2; |
| 52129 | } |
| 52130 | else if ((cached_type == TYPE_SSEICVT) && (((cached_mode = get_attr_mode (insn)) == MODE_SI) || (cached_mode == MODE_DI)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 52131 | { |
| 52132 | return 8; |
| 52133 | } |
| 52134 | else if ((cached_type == TYPE_SSEICVT) && (((cached_mode = get_attr_mode (insn)) == MODE_SI) || (cached_mode == MODE_DI)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 52135 | { |
| 52136 | return 4; |
| 52137 | } |
| 52138 | else if ((cached_type == TYPE_SSECVT) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) && (nonimmediate_operand (operands[1], V2DFmode)) && (register_operand (operands[0], V2SImode))) |
| 52139 | { |
| 52140 | return 8; |
| 52141 | } |
| 52142 | else if ((cached_type == TYPE_SSECVT) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) && (nonimmediate_operand (operands[1], V2DFmode)) && (register_operand (operands[0], V2SImode))) |
| 52143 | { |
| 52144 | return 4; |
| 52145 | } |
| 52146 | else if ((cached_type == TYPE_SSECVT) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) && (nonimmediate_operand (operands[1], V2DFmode)) && (register_operand (operands[0], V4SImode))) |
| 52147 | { |
| 52148 | return 6; |
| 52149 | } |
| 52150 | else if ((cached_type == TYPE_SSECVT) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) && (nonimmediate_operand (operands[1], V2DFmode)) && (register_operand (operands[0], V4SImode))) |
| 52151 | { |
| 52152 | return 2; |
| 52153 | } |
| 52154 | else if ((cached_type == TYPE_SSECVT) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) && (nonimmediate_operand (operands[1], V4SFmode)) && ((register_operand (operands[0], V2SImode)) || (register_operand (operands[0], V4SImode)))) |
| 52155 | { |
| 52156 | return 8; |
| 52157 | } |
| 52158 | else if ((cached_type == TYPE_SSECVT) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) && (nonimmediate_operand (operands[1], V4SFmode)) && ((register_operand (operands[0], V2SImode)) || (register_operand (operands[0], V4SImode)))) |
| 52159 | { |
| 52160 | return 4; |
| 52161 | } |
| 52162 | else if (((cached_type == TYPE_SSEMUL) || (cached_type == TYPE_SSEADD) || (cached_type == TYPE_SSEADD1) || (cached_type == TYPE_SSEMULADD)) && (((cached_mode = get_attr_mode (insn)) == MODE_V8SF) || (cached_mode == MODE_V4DF)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 52163 | { |
| 52164 | return 11 /* 0xb */; |
| 52165 | } |
| 52166 | else if (((cached_type == TYPE_SSEMUL) || (cached_type == TYPE_SSEADD) || (cached_type == TYPE_SSEADD1) || (cached_type == TYPE_SSEMULADD)) && (((cached_mode = get_attr_mode (insn)) == MODE_V8SF) || (cached_mode == MODE_V4DF)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 52167 | { |
| 52168 | return 7; |
| 52169 | } |
| 52170 | else if (((cached_type == TYPE_SSEMUL) || (cached_type == TYPE_SSEADD) || (cached_type == TYPE_SSEADD1) || (cached_type == TYPE_SSEMULADD)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 52171 | { |
| 52172 | return 10 /* 0xa */; |
| 52173 | } |
| 52174 | else if (((cached_type == TYPE_SSEMUL) || (cached_type == TYPE_SSEADD) || (cached_type == TYPE_SSEADD1) || (cached_type == TYPE_SSEMULADD)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 52175 | { |
| 52176 | return 6; |
| 52177 | } |
| 52178 | else if ((cached_type == TYPE_SSEIMUL) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 52179 | { |
| 52180 | return 8; |
| 52181 | } |
| 52182 | else if ((cached_type == TYPE_SSEIMUL) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 52183 | { |
| 52184 | return 4; |
| 52185 | } |
| 52186 | else if ((cached_type == TYPE_SSEIADD) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 52187 | { |
| 52188 | return 6; |
| 52189 | } |
| 52190 | else if ((cached_type == TYPE_SSEIADD) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 52191 | { |
| 52192 | return 2; |
| 52193 | } |
| 52194 | else if ((cached_type == TYPE_SSEDIV) && ((cached_mode = get_attr_mode (insn)) == MODE_V4DF) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 52195 | { |
| 52196 | return 31 /* 0x1f */; |
| 52197 | } |
| 52198 | else if ((cached_type == TYPE_SSEDIV) && ((cached_mode = get_attr_mode (insn)) == MODE_V4DF) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 52199 | { |
| 52200 | return 27 /* 0x1b */; |
| 52201 | } |
| 52202 | else if ((cached_type == TYPE_SSEDIV) && ((cached_mode = get_attr_mode (insn)) == MODE_V8SF) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 52203 | { |
| 52204 | return 28 /* 0x1c */; |
| 52205 | } |
| 52206 | else if ((cached_type == TYPE_SSEDIV) && ((cached_mode = get_attr_mode (insn)) == MODE_V8SF) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 52207 | { |
| 52208 | return 24 /* 0x18 */; |
| 52209 | } |
| 52210 | else if ((cached_type == TYPE_SSEDIV) && (((cached_mode = get_attr_mode (insn)) == MODE_DF) || (cached_mode == MODE_V2DF)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 52211 | { |
| 52212 | return 31 /* 0x1f */; |
| 52213 | } |
| 52214 | else if ((cached_type == TYPE_SSEDIV) && (((cached_mode = get_attr_mode (insn)) == MODE_DF) || (cached_mode == MODE_V2DF)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 52215 | { |
| 52216 | return 27 /* 0x1b */; |
| 52217 | } |
| 52218 | else if ((cached_type == TYPE_SSEDIV) && (((cached_mode = get_attr_mode (insn)) == MODE_SF) || (cached_mode == MODE_V4SF)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 52219 | { |
| 52220 | return 28 /* 0x1c */; |
| 52221 | } |
| 52222 | else if ((cached_type == TYPE_SSEDIV) && (((cached_mode = get_attr_mode (insn)) == MODE_SF) || (cached_mode == MODE_V4SF)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 52223 | { |
| 52224 | return 24 /* 0x18 */; |
| 52225 | } |
| 52226 | else if ((cached_type == TYPE_SSEINS) && ((cached_mode = get_attr_mode (insn)) == MODE_TI)) |
| 52227 | { |
| 52228 | return 3; |
| 52229 | } |
| 52230 | else |
| 52231 | { |
| 52232 | return 0; |
| 52233 | } |
| 52234 | |
| 52235 | } |
| 52236 | } |
| 52237 | |
| 52238 | int |
| 52239 | insn_default_latency_bdver2 (rtx_insn *insn ATTRIBUTE_UNUSED) |
| 52240 | { |
| 52241 | enum attr_memory cached_memory ATTRIBUTE_UNUSED; |
| 52242 | enum attr_type cached_type ATTRIBUTE_UNUSED; |
| 52243 | enum attr_mode cached_mode ATTRIBUTE_UNUSED; |
| 52244 | enum attr_bdver1_decode cached_bdver1_decode ATTRIBUTE_UNUSED; |
| 52245 | enum attr_unit cached_unit ATTRIBUTE_UNUSED; |
| 52246 | enum attr_prefix cached_prefix ATTRIBUTE_UNUSED; |
| 52247 | enum attr_movu cached_movu ATTRIBUTE_UNUSED; |
| 52248 | |
| 52249 | switch (recog_memoized (insn)) |
| 52250 | { |
| 52251 | case 3904: /* sse4_2_pcmpistr_cconly */ |
| 52252 | case 3900: /* sse4_2_pcmpestr_cconly */ |
| 52253 | extract_constrain_insn_cached (insn); |
| 52254 | if (!((1 << which_alternative) & 0x5)) |
| 52255 | { |
| 52256 | return 6; |
| 52257 | } |
| 52258 | else |
| 52259 | { |
| 52260 | return 2; |
| 52261 | } |
| 52262 | |
| 52263 | case 3903: /* sse4_2_pcmpistrm */ |
| 52264 | case 3902: /* sse4_2_pcmpistri */ |
| 52265 | case 3901: /* sse4_2_pcmpistr */ |
| 52266 | case 3899: /* sse4_2_pcmpestrm */ |
| 52267 | case 3898: /* sse4_2_pcmpestri */ |
| 52268 | case 3897: /* sse4_2_pcmpestr */ |
| 52269 | extract_constrain_insn_cached (insn); |
| 52270 | if (which_alternative != 0) |
| 52271 | { |
| 52272 | return 6; |
| 52273 | } |
| 52274 | else |
| 52275 | { |
| 52276 | return 2; |
| 52277 | } |
| 52278 | |
| 52279 | case 3634: /* *vec_extractv4si */ |
| 52280 | extract_constrain_insn_cached (insn); |
| 52281 | if ((((1 << which_alternative) & 0x3)) && (get_attr_memory (insn) == MEMORY_LOAD)) |
| 52282 | { |
| 52283 | return 6; |
| 52284 | } |
| 52285 | else if (((1 << which_alternative) & 0x3)) |
| 52286 | { |
| 52287 | return 2; |
| 52288 | } |
| 52289 | else |
| 52290 | { |
| 52291 | return 0; |
| 52292 | } |
| 52293 | |
| 52294 | case 3706: /* ssse3_pmaddubsw */ |
| 52295 | case 3705: /* ssse3_pmaddubsw128 */ |
| 52296 | case 3702: /* avx512bw_pmaddubsw512v32hi_mask */ |
| 52297 | case 3701: /* avx512bw_pmaddubsw512v32hi */ |
| 52298 | case 3700: /* avx512bw_pmaddubsw512v16hi_mask */ |
| 52299 | case 3699: /* avx512bw_pmaddubsw512v16hi */ |
| 52300 | case 3698: /* avx512bw_pmaddubsw512v8hi_mask */ |
| 52301 | case 3697: /* avx512bw_pmaddubsw512v8hi */ |
| 52302 | case 3696: /* avx2_pmaddubsw256 */ |
| 52303 | case 3695: /* ssse3_phsubdv2si3 */ |
| 52304 | case 3694: /* ssse3_phadddv2si3 */ |
| 52305 | case 3693: /* ssse3_phsubdv4si3 */ |
| 52306 | case 3692: /* ssse3_phadddv4si3 */ |
| 52307 | case 3691: /* avx2_phsubdv8si3 */ |
| 52308 | case 3690: /* avx2_phadddv8si3 */ |
| 52309 | case 3689: /* ssse3_phsubswv4hi3 */ |
| 52310 | case 3688: /* ssse3_phsubwv4hi3 */ |
| 52311 | case 3687: /* ssse3_phaddswv4hi3 */ |
| 52312 | case 3686: /* ssse3_phaddwv4hi3 */ |
| 52313 | case 3685: /* ssse3_phsubswv8hi3 */ |
| 52314 | case 3684: /* ssse3_phsubwv8hi3 */ |
| 52315 | case 3683: /* ssse3_phaddswv8hi3 */ |
| 52316 | case 3682: /* ssse3_phaddwv8hi3 */ |
| 52317 | case 3681: /* avx2_phsubswv16hi3 */ |
| 52318 | case 3680: /* avx2_phsubwv16hi3 */ |
| 52319 | case 3679: /* avx2_phaddswv16hi3 */ |
| 52320 | case 3678: /* avx2_phaddwv16hi3 */ |
| 52321 | case 3657: /* sse2_psadbw */ |
| 52322 | case 3656: /* avx2_psadbw */ |
| 52323 | case 3655: /* avx512f_psadbw */ |
| 52324 | case 3654: /* *sse2_uavgv8hi3_mask */ |
| 52325 | case 3653: /* *sse2_uavgv8hi3 */ |
| 52326 | case 3652: /* *avx2_uavgv16hi3_mask */ |
| 52327 | case 3651: /* *avx2_uavgv16hi3 */ |
| 52328 | case 3650: /* *avx512bw_uavgv32hi3_mask */ |
| 52329 | case 3649: /* *avx512bw_uavgv32hi3 */ |
| 52330 | case 3648: /* *sse2_uavgv16qi3_mask */ |
| 52331 | case 3647: /* *sse2_uavgv16qi3 */ |
| 52332 | case 3646: /* *avx2_uavgv32qi3_mask */ |
| 52333 | case 3645: /* *avx2_uavgv32qi3 */ |
| 52334 | case 3644: /* *avx512bw_uavgv64qi3_mask */ |
| 52335 | case 3643: /* *avx512bw_uavgv64qi3 */ |
| 52336 | case 3319: /* *uminv16qi3 */ |
| 52337 | case 3318: /* *umaxv16qi3 */ |
| 52338 | case 3317: /* *sse4_1_uminv4si3_mask */ |
| 52339 | case 3316: /* *sse4_1_uminv4si3 */ |
| 52340 | case 3315: /* *sse4_1_umaxv4si3_mask */ |
| 52341 | case 3314: /* *sse4_1_umaxv4si3 */ |
| 52342 | case 3313: /* *sse4_1_uminv8hi3_mask */ |
| 52343 | case 3312: /* *sse4_1_uminv8hi3 */ |
| 52344 | case 3311: /* *sse4_1_umaxv8hi3_mask */ |
| 52345 | case 3310: /* *sse4_1_umaxv8hi3 */ |
| 52346 | case 3309: /* *sminv8hi3 */ |
| 52347 | case 3308: /* *smaxv8hi3 */ |
| 52348 | case 3307: /* *sse4_1_sminv4si3_mask */ |
| 52349 | case 3306: /* *sse4_1_sminv4si3 */ |
| 52350 | case 3305: /* *sse4_1_smaxv4si3_mask */ |
| 52351 | case 3304: /* *sse4_1_smaxv4si3 */ |
| 52352 | case 3303: /* *sse4_1_sminv16qi3_mask */ |
| 52353 | case 3302: /* *sse4_1_sminv16qi3 */ |
| 52354 | case 3301: /* *sse4_1_smaxv16qi3_mask */ |
| 52355 | case 3300: /* *sse4_1_smaxv16qi3 */ |
| 52356 | case 3299: /* uminv8hi3_mask */ |
| 52357 | case 3298: /* *uminv8hi3 */ |
| 52358 | case 3297: /* umaxv8hi3_mask */ |
| 52359 | case 3296: /* *umaxv8hi3 */ |
| 52360 | case 3295: /* sminv8hi3_mask */ |
| 52361 | case 3294: /* *sminv8hi3 */ |
| 52362 | case 3293: /* smaxv8hi3_mask */ |
| 52363 | case 3292: /* *smaxv8hi3 */ |
| 52364 | case 3291: /* uminv16hi3_mask */ |
| 52365 | case 3290: /* *uminv16hi3 */ |
| 52366 | case 3289: /* umaxv16hi3_mask */ |
| 52367 | case 3288: /* *umaxv16hi3 */ |
| 52368 | case 3287: /* sminv16hi3_mask */ |
| 52369 | case 3286: /* *sminv16hi3 */ |
| 52370 | case 3285: /* smaxv16hi3_mask */ |
| 52371 | case 3284: /* *smaxv16hi3 */ |
| 52372 | case 3283: /* uminv32hi3_mask */ |
| 52373 | case 3282: /* *uminv32hi3 */ |
| 52374 | case 3281: /* umaxv32hi3_mask */ |
| 52375 | case 3280: /* *umaxv32hi3 */ |
| 52376 | case 3279: /* sminv32hi3_mask */ |
| 52377 | case 3278: /* *sminv32hi3 */ |
| 52378 | case 3277: /* smaxv32hi3_mask */ |
| 52379 | case 3276: /* *smaxv32hi3 */ |
| 52380 | case 3275: /* uminv32qi3_mask */ |
| 52381 | case 3274: /* *uminv32qi3 */ |
| 52382 | case 3273: /* umaxv32qi3_mask */ |
| 52383 | case 3272: /* *umaxv32qi3 */ |
| 52384 | case 3271: /* sminv32qi3_mask */ |
| 52385 | case 3270: /* *sminv32qi3 */ |
| 52386 | case 3269: /* smaxv32qi3_mask */ |
| 52387 | case 3268: /* *smaxv32qi3 */ |
| 52388 | case 3267: /* uminv16qi3_mask */ |
| 52389 | case 3266: /* *uminv16qi3 */ |
| 52390 | case 3265: /* umaxv16qi3_mask */ |
| 52391 | case 3264: /* *umaxv16qi3 */ |
| 52392 | case 3263: /* sminv16qi3_mask */ |
| 52393 | case 3262: /* *sminv16qi3 */ |
| 52394 | case 3261: /* smaxv16qi3_mask */ |
| 52395 | case 3260: /* *smaxv16qi3 */ |
| 52396 | case 3259: /* uminv64qi3_mask */ |
| 52397 | case 3258: /* *uminv64qi3 */ |
| 52398 | case 3257: /* umaxv64qi3_mask */ |
| 52399 | case 3256: /* *umaxv64qi3 */ |
| 52400 | case 3255: /* sminv64qi3_mask */ |
| 52401 | case 3254: /* *sminv64qi3 */ |
| 52402 | case 3253: /* smaxv64qi3_mask */ |
| 52403 | case 3252: /* *smaxv64qi3 */ |
| 52404 | case 3251: /* *avx512f_uminv2di3_mask */ |
| 52405 | case 3250: /* *avx512f_uminv2di3 */ |
| 52406 | case 3249: /* *avx512f_umaxv2di3_mask */ |
| 52407 | case 3248: /* *avx512f_umaxv2di3 */ |
| 52408 | case 3247: /* *avx512f_sminv2di3_mask */ |
| 52409 | case 3246: /* *avx512f_sminv2di3 */ |
| 52410 | case 3245: /* *avx512f_smaxv2di3_mask */ |
| 52411 | case 3244: /* *avx512f_smaxv2di3 */ |
| 52412 | case 3243: /* *avx512f_uminv4di3_mask */ |
| 52413 | case 3242: /* *avx512f_uminv4di3 */ |
| 52414 | case 3241: /* *avx512f_umaxv4di3_mask */ |
| 52415 | case 3240: /* *avx512f_umaxv4di3 */ |
| 52416 | case 3239: /* *avx512f_sminv4di3_mask */ |
| 52417 | case 3238: /* *avx512f_sminv4di3 */ |
| 52418 | case 3237: /* *avx512f_smaxv4di3_mask */ |
| 52419 | case 3236: /* *avx512f_smaxv4di3 */ |
| 52420 | case 3235: /* *avx512f_uminv8di3_mask */ |
| 52421 | case 3234: /* *avx512f_uminv8di3 */ |
| 52422 | case 3233: /* *avx512f_umaxv8di3_mask */ |
| 52423 | case 3232: /* *avx512f_umaxv8di3 */ |
| 52424 | case 3231: /* *avx512f_sminv8di3_mask */ |
| 52425 | case 3230: /* *avx512f_sminv8di3 */ |
| 52426 | case 3229: /* *avx512f_smaxv8di3_mask */ |
| 52427 | case 3228: /* *avx512f_smaxv8di3 */ |
| 52428 | case 3227: /* *avx512f_uminv4si3_mask */ |
| 52429 | case 3226: /* *avx512f_uminv4si3 */ |
| 52430 | case 3225: /* *avx512f_umaxv4si3_mask */ |
| 52431 | case 3224: /* *avx512f_umaxv4si3 */ |
| 52432 | case 3223: /* *avx512f_sminv4si3_mask */ |
| 52433 | case 3222: /* *avx512f_sminv4si3 */ |
| 52434 | case 3221: /* *avx512f_smaxv4si3_mask */ |
| 52435 | case 3220: /* *avx512f_smaxv4si3 */ |
| 52436 | case 3219: /* *avx512f_uminv8si3_mask */ |
| 52437 | case 3218: /* *avx512f_uminv8si3 */ |
| 52438 | case 3217: /* *avx512f_umaxv8si3_mask */ |
| 52439 | case 3216: /* *avx512f_umaxv8si3 */ |
| 52440 | case 3215: /* *avx512f_sminv8si3_mask */ |
| 52441 | case 3214: /* *avx512f_sminv8si3 */ |
| 52442 | case 3213: /* *avx512f_smaxv8si3_mask */ |
| 52443 | case 3212: /* *avx512f_smaxv8si3 */ |
| 52444 | case 3211: /* *avx512f_uminv16si3_mask */ |
| 52445 | case 3210: /* *avx512f_uminv16si3 */ |
| 52446 | case 3209: /* *avx512f_umaxv16si3_mask */ |
| 52447 | case 3208: /* *avx512f_umaxv16si3 */ |
| 52448 | case 3207: /* *avx512f_sminv16si3_mask */ |
| 52449 | case 3206: /* *avx512f_sminv16si3 */ |
| 52450 | case 3205: /* *avx512f_smaxv16si3_mask */ |
| 52451 | case 3204: /* *avx512f_smaxv16si3 */ |
| 52452 | case 3203: /* *avx2_uminv8si3 */ |
| 52453 | case 3202: /* *avx2_umaxv8si3 */ |
| 52454 | case 3201: /* *avx2_sminv8si3 */ |
| 52455 | case 3200: /* *avx2_smaxv8si3 */ |
| 52456 | case 3199: /* *avx2_uminv16hi3 */ |
| 52457 | case 3198: /* *avx2_umaxv16hi3 */ |
| 52458 | case 3197: /* *avx2_sminv16hi3 */ |
| 52459 | case 3196: /* *avx2_smaxv16hi3 */ |
| 52460 | case 3195: /* *avx2_uminv32qi3 */ |
| 52461 | case 3194: /* *avx2_umaxv32qi3 */ |
| 52462 | case 3193: /* *avx2_sminv32qi3 */ |
| 52463 | case 3192: /* *avx2_smaxv32qi3 */ |
| 52464 | case 3067: /* *sse2_pmaddwd */ |
| 52465 | case 3066: /* *avx2_pmaddwd */ |
| 52466 | case 3065: /* avx512bw_pmaddwd512v8hi_mask */ |
| 52467 | case 3064: /* avx512bw_pmaddwd512v8hi */ |
| 52468 | case 3063: /* avx512bw_pmaddwd512v16hi_mask */ |
| 52469 | case 3062: /* avx512bw_pmaddwd512v16hi */ |
| 52470 | case 3061: /* avx512bw_pmaddwd512v32hi_mask */ |
| 52471 | case 3060: /* avx512bw_pmaddwd512v32hi */ |
| 52472 | case 3029: /* *sse2_ussubv8hi3_mask */ |
| 52473 | case 3028: /* *sse2_ussubv8hi3 */ |
| 52474 | case 3027: /* *sse2_sssubv8hi3_mask */ |
| 52475 | case 3026: /* *sse2_sssubv8hi3 */ |
| 52476 | case 3025: /* *sse2_usaddv8hi3_mask */ |
| 52477 | case 3024: /* *sse2_usaddv8hi3 */ |
| 52478 | case 3023: /* *sse2_ssaddv8hi3_mask */ |
| 52479 | case 3022: /* *sse2_ssaddv8hi3 */ |
| 52480 | case 3021: /* *avx2_ussubv16hi3_mask */ |
| 52481 | case 3020: /* *avx2_ussubv16hi3 */ |
| 52482 | case 3019: /* *avx2_sssubv16hi3_mask */ |
| 52483 | case 3018: /* *avx2_sssubv16hi3 */ |
| 52484 | case 3017: /* *avx2_usaddv16hi3_mask */ |
| 52485 | case 3016: /* *avx2_usaddv16hi3 */ |
| 52486 | case 3015: /* *avx2_ssaddv16hi3_mask */ |
| 52487 | case 3014: /* *avx2_ssaddv16hi3 */ |
| 52488 | case 3013: /* *avx512bw_ussubv32hi3_mask */ |
| 52489 | case 3012: /* *avx512bw_ussubv32hi3 */ |
| 52490 | case 3011: /* *avx512bw_sssubv32hi3_mask */ |
| 52491 | case 3010: /* *avx512bw_sssubv32hi3 */ |
| 52492 | case 3009: /* *avx512bw_usaddv32hi3_mask */ |
| 52493 | case 3008: /* *avx512bw_usaddv32hi3 */ |
| 52494 | case 3007: /* *avx512bw_ssaddv32hi3_mask */ |
| 52495 | case 3006: /* *avx512bw_ssaddv32hi3 */ |
| 52496 | case 3005: /* *sse2_ussubv16qi3_mask */ |
| 52497 | case 3004: /* *sse2_ussubv16qi3 */ |
| 52498 | case 3003: /* *sse2_sssubv16qi3_mask */ |
| 52499 | case 3002: /* *sse2_sssubv16qi3 */ |
| 52500 | case 3001: /* *sse2_usaddv16qi3_mask */ |
| 52501 | case 3000: /* *sse2_usaddv16qi3 */ |
| 52502 | case 2999: /* *sse2_ssaddv16qi3_mask */ |
| 52503 | case 2998: /* *sse2_ssaddv16qi3 */ |
| 52504 | case 2997: /* *avx2_ussubv32qi3_mask */ |
| 52505 | case 2996: /* *avx2_ussubv32qi3 */ |
| 52506 | case 2995: /* *avx2_sssubv32qi3_mask */ |
| 52507 | case 2994: /* *avx2_sssubv32qi3 */ |
| 52508 | case 2993: /* *avx2_usaddv32qi3_mask */ |
| 52509 | case 2992: /* *avx2_usaddv32qi3 */ |
| 52510 | case 2991: /* *avx2_ssaddv32qi3_mask */ |
| 52511 | case 2990: /* *avx2_ssaddv32qi3 */ |
| 52512 | case 2989: /* *avx512bw_ussubv64qi3_mask */ |
| 52513 | case 2988: /* *avx512bw_ussubv64qi3 */ |
| 52514 | case 2987: /* *avx512bw_sssubv64qi3_mask */ |
| 52515 | case 2986: /* *avx512bw_sssubv64qi3 */ |
| 52516 | case 2985: /* *avx512bw_usaddv64qi3_mask */ |
| 52517 | case 2984: /* *avx512bw_usaddv64qi3 */ |
| 52518 | case 2983: /* *avx512bw_ssaddv64qi3_mask */ |
| 52519 | case 2982: /* *avx512bw_ssaddv64qi3 */ |
| 52520 | case 2981: /* *subv8hi3_mask */ |
| 52521 | case 2980: /* *addv8hi3_mask */ |
| 52522 | case 2979: /* *subv16hi3_mask */ |
| 52523 | case 2978: /* *addv16hi3_mask */ |
| 52524 | case 2977: /* *subv32hi3_mask */ |
| 52525 | case 2976: /* *addv32hi3_mask */ |
| 52526 | case 2975: /* *subv32qi3_mask */ |
| 52527 | case 2974: /* *addv32qi3_mask */ |
| 52528 | case 2973: /* *subv16qi3_mask */ |
| 52529 | case 2972: /* *addv16qi3_mask */ |
| 52530 | case 2971: /* *subv64qi3_mask */ |
| 52531 | case 2970: /* *addv64qi3_mask */ |
| 52532 | case 2969: /* *subv2di3_mask */ |
| 52533 | case 2968: /* *addv2di3_mask */ |
| 52534 | case 2967: /* *subv4di3_mask */ |
| 52535 | case 2966: /* *addv4di3_mask */ |
| 52536 | case 2965: /* *subv8di3_mask */ |
| 52537 | case 2964: /* *addv8di3_mask */ |
| 52538 | case 2963: /* *subv4si3_mask */ |
| 52539 | case 2962: /* *addv4si3_mask */ |
| 52540 | case 2961: /* *subv8si3_mask */ |
| 52541 | case 2960: /* *addv8si3_mask */ |
| 52542 | case 2959: /* *subv16si3_mask */ |
| 52543 | case 2958: /* *addv16si3_mask */ |
| 52544 | case 2957: /* *subv2di3 */ |
| 52545 | case 2956: /* *addv2di3 */ |
| 52546 | case 2955: /* *subv4di3 */ |
| 52547 | case 2954: /* *addv4di3 */ |
| 52548 | case 2953: /* *subv8di3 */ |
| 52549 | case 2952: /* *addv8di3 */ |
| 52550 | case 2951: /* *subv4si3 */ |
| 52551 | case 2950: /* *addv4si3 */ |
| 52552 | case 2949: /* *subv8si3 */ |
| 52553 | case 2948: /* *addv8si3 */ |
| 52554 | case 2947: /* *subv16si3 */ |
| 52555 | case 2946: /* *addv16si3 */ |
| 52556 | case 2945: /* *subv8hi3 */ |
| 52557 | case 2944: /* *addv8hi3 */ |
| 52558 | case 2943: /* *subv16hi3 */ |
| 52559 | case 2942: /* *addv16hi3 */ |
| 52560 | case 2941: /* *subv32hi3 */ |
| 52561 | case 2940: /* *addv32hi3 */ |
| 52562 | case 2939: /* *subv16qi3 */ |
| 52563 | case 2938: /* *addv16qi3 */ |
| 52564 | case 2937: /* *subv32qi3 */ |
| 52565 | case 2936: /* *addv32qi3 */ |
| 52566 | case 2935: /* *subv64qi3 */ |
| 52567 | case 2934: /* *addv64qi3 */ |
| 52568 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) |
| 52569 | { |
| 52570 | return 6; |
| 52571 | } |
| 52572 | else if (cached_memory == MEMORY_NONE) |
| 52573 | { |
| 52574 | return 2; |
| 52575 | } |
| 52576 | else |
| 52577 | { |
| 52578 | return 0; |
| 52579 | } |
| 52580 | |
| 52581 | case 4412: /* vec_set_hi_v8sf_mask */ |
| 52582 | case 4411: /* vec_set_hi_v8sf */ |
| 52583 | case 4408: /* vec_set_lo_v8sf_mask */ |
| 52584 | case 4407: /* vec_set_lo_v8sf */ |
| 52585 | case 4389: /* *avx_vperm2f128v8sf_nozero */ |
| 52586 | case 4386: /* *avx_vperm2f128v8sf_full */ |
| 52587 | case 4372: /* avx512vl_vpermt2varv8sf3_mask */ |
| 52588 | case 4342: /* avx512vl_vpermt2varv8sf3_maskz_1 */ |
| 52589 | case 4341: /* avx512vl_vpermt2varv8sf3 */ |
| 52590 | case 4318: /* avx512vl_vpermi2varv8sf3_mask */ |
| 52591 | case 4288: /* avx512vl_vpermi2varv8sf3_maskz_1 */ |
| 52592 | case 4287: /* avx512vl_vpermi2varv8sf3 */ |
| 52593 | case 4268: /* avx_vpermilvarv8sf3_mask */ |
| 52594 | case 4267: /* avx_vpermilvarv8sf3 */ |
| 52595 | case 4256: /* *avx_vpermilpv8sf_mask */ |
| 52596 | case 4255: /* *avx_vpermilpv8sf */ |
| 52597 | case 4076: /* avx2_permvarv8sf_mask */ |
| 52598 | case 4075: /* avx2_permvarv8sf */ |
| 52599 | case 3597: /* avx512vl_shuf_f32x4_1_mask */ |
| 52600 | case 3596: /* avx512vl_shuf_f32x4_1 */ |
| 52601 | case 2445: /* avx_shufps256_1_mask */ |
| 52602 | case 2444: /* avx_shufps256_1 */ |
| 52603 | case 2429: /* avx_unpcklps256_mask */ |
| 52604 | case 2428: /* avx_unpcklps256 */ |
| 52605 | case 2423: /* avx_unpckhps256_mask */ |
| 52606 | case 2422: /* avx_unpckhps256 */ |
| 52607 | if (get_attr_memory (insn) == MEMORY_LOAD) |
| 52608 | { |
| 52609 | return 7; |
| 52610 | } |
| 52611 | else |
| 52612 | { |
| 52613 | return 3; |
| 52614 | } |
| 52615 | |
| 52616 | case 1464: /* sse2_divv2df3_mask */ |
| 52617 | case 1463: /* sse2_divv2df3 */ |
| 52618 | case 1462: /* avx_divv4df3_mask */ |
| 52619 | case 1461: /* avx_divv4df3 */ |
| 52620 | case 1448: /* sse2_vmdivv2df3_round */ |
| 52621 | case 1447: /* sse2_vmdivv2df3 */ |
| 52622 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) |
| 52623 | { |
| 52624 | return 31 /* 0x1f */; |
| 52625 | } |
| 52626 | else if (cached_memory == MEMORY_NONE) |
| 52627 | { |
| 52628 | return 27 /* 0x1b */; |
| 52629 | } |
| 52630 | else |
| 52631 | { |
| 52632 | return 0; |
| 52633 | } |
| 52634 | |
| 52635 | case 1456: /* sse_divv4sf3_mask */ |
| 52636 | case 1455: /* sse_divv4sf3 */ |
| 52637 | case 1454: /* avx_divv8sf3_mask */ |
| 52638 | case 1453: /* avx_divv8sf3 */ |
| 52639 | case 1444: /* sse_vmdivv4sf3_round */ |
| 52640 | case 1443: /* sse_vmdivv4sf3 */ |
| 52641 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) |
| 52642 | { |
| 52643 | return 28 /* 0x1c */; |
| 52644 | } |
| 52645 | else if (cached_memory == MEMORY_NONE) |
| 52646 | { |
| 52647 | return 24 /* 0x18 */; |
| 52648 | } |
| 52649 | else |
| 52650 | { |
| 52651 | return 0; |
| 52652 | } |
| 52653 | |
| 52654 | case 4766: /* avx512vl_expandv4df_mask */ |
| 52655 | case 4765: /* avx512vl_expandv4di_mask */ |
| 52656 | case 4764: /* avx512vl_expandv8sf_mask */ |
| 52657 | case 4763: /* avx512vl_expandv8si_mask */ |
| 52658 | case 2756: /* avx512f_us_truncatev8div8si2_mask */ |
| 52659 | case 2755: /* avx512f_truncatev8div8si2_mask */ |
| 52660 | case 2754: /* avx512f_ss_truncatev8div8si2_mask */ |
| 52661 | case 2753: /* avx512f_us_truncatev16siv16hi2_mask */ |
| 52662 | case 2752: /* avx512f_truncatev16siv16hi2_mask */ |
| 52663 | case 2751: /* avx512f_ss_truncatev16siv16hi2_mask */ |
| 52664 | case 2744: /* *avx512f_us_truncatev8div8si2 */ |
| 52665 | case 2743: /* *avx512f_truncatev8div8si2 */ |
| 52666 | case 2742: /* *avx512f_ss_truncatev8div8si2 */ |
| 52667 | case 2741: /* *avx512f_us_truncatev16siv16hi2 */ |
| 52668 | case 2740: /* *avx512f_truncatev16siv16hi2 */ |
| 52669 | case 2739: /* *avx512f_ss_truncatev16siv16hi2 */ |
| 52670 | case 1255: /* avx512vl_loadv16hi_mask */ |
| 52671 | case 1253: /* avx512vl_loadv32qi_mask */ |
| 52672 | case 1249: /* avx512vl_loadv4df_mask */ |
| 52673 | case 1246: /* avx512vl_loadv8sf_mask */ |
| 52674 | case 1243: /* avx512vl_loadv4di_mask */ |
| 52675 | case 1240: /* avx512vl_loadv8si_mask */ |
| 52676 | extract_constrain_insn_cached (insn); |
| 52677 | if (which_alternative != 0) |
| 52678 | { |
| 52679 | return 5; |
| 52680 | } |
| 52681 | else |
| 52682 | { |
| 52683 | return 3; |
| 52684 | } |
| 52685 | |
| 52686 | case 4770: /* avx512vl_expandv2df_mask */ |
| 52687 | case 4769: /* avx512vl_expandv2di_mask */ |
| 52688 | case 4768: /* avx512vl_expandv4sf_mask */ |
| 52689 | case 4767: /* avx512vl_expandv4si_mask */ |
| 52690 | case 4762: /* avx512f_expandv8df_mask */ |
| 52691 | case 4761: /* avx512f_expandv8di_mask */ |
| 52692 | case 4760: /* avx512f_expandv16sf_mask */ |
| 52693 | case 4759: /* avx512f_expandv16si_mask */ |
| 52694 | case 2783: /* avx512vl_us_truncatev16hiv16qi2_mask */ |
| 52695 | case 2782: /* avx512vl_truncatev16hiv16qi2_mask */ |
| 52696 | case 2781: /* avx512vl_ss_truncatev16hiv16qi2_mask */ |
| 52697 | case 2780: /* avx512vl_us_truncatev8siv8hi2_mask */ |
| 52698 | case 2779: /* avx512vl_truncatev8siv8hi2_mask */ |
| 52699 | case 2778: /* avx512vl_ss_truncatev8siv8hi2_mask */ |
| 52700 | case 2777: /* avx512vl_us_truncatev4div4si2_mask */ |
| 52701 | case 2776: /* avx512vl_truncatev4div4si2_mask */ |
| 52702 | case 2775: /* avx512vl_ss_truncatev4div4si2_mask */ |
| 52703 | case 2774: /* *avx512vl_us_truncatev16hiv16qi2 */ |
| 52704 | case 2773: /* *avx512vl_truncatev16hiv16qi2 */ |
| 52705 | case 2772: /* *avx512vl_ss_truncatev16hiv16qi2 */ |
| 52706 | case 2771: /* *avx512vl_us_truncatev8siv8hi2 */ |
| 52707 | case 2770: /* *avx512vl_truncatev8siv8hi2 */ |
| 52708 | case 2769: /* *avx512vl_ss_truncatev8siv8hi2 */ |
| 52709 | case 2768: /* *avx512vl_us_truncatev4div4si2 */ |
| 52710 | case 2767: /* *avx512vl_truncatev4div4si2 */ |
| 52711 | case 2766: /* *avx512vl_ss_truncatev4div4si2 */ |
| 52712 | case 2765: /* avx512bw_us_truncatev32hiv32qi2_mask */ |
| 52713 | case 2764: /* avx512bw_truncatev32hiv32qi2_mask */ |
| 52714 | case 2763: /* avx512bw_ss_truncatev32hiv32qi2_mask */ |
| 52715 | case 2762: /* avx512bw_us_truncatev32hiv32qi2 */ |
| 52716 | case 2761: /* avx512bw_truncatev32hiv32qi2 */ |
| 52717 | case 2760: /* avx512bw_ss_truncatev32hiv32qi2 */ |
| 52718 | case 2759: /* avx512f_us_truncatev8div8hi2_mask */ |
| 52719 | case 2758: /* avx512f_truncatev8div8hi2_mask */ |
| 52720 | case 2757: /* avx512f_ss_truncatev8div8hi2_mask */ |
| 52721 | case 2750: /* avx512f_us_truncatev16siv16qi2_mask */ |
| 52722 | case 2749: /* avx512f_truncatev16siv16qi2_mask */ |
| 52723 | case 2748: /* avx512f_ss_truncatev16siv16qi2_mask */ |
| 52724 | case 2747: /* *avx512f_us_truncatev8div8hi2 */ |
| 52725 | case 2746: /* *avx512f_truncatev8div8hi2 */ |
| 52726 | case 2745: /* *avx512f_ss_truncatev8div8hi2 */ |
| 52727 | case 2738: /* *avx512f_us_truncatev16siv16qi2 */ |
| 52728 | case 2737: /* *avx512f_truncatev16siv16qi2 */ |
| 52729 | case 2736: /* *avx512f_ss_truncatev16siv16qi2 */ |
| 52730 | case 1256: /* avx512vl_loadv8hi_mask */ |
| 52731 | case 1254: /* avx512bw_loadv32hi_mask */ |
| 52732 | case 1252: /* avx512vl_loadv16qi_mask */ |
| 52733 | case 1251: /* avx512bw_loadv64qi_mask */ |
| 52734 | case 1250: /* avx512vl_loadv2df_mask */ |
| 52735 | case 1248: /* avx512f_loadv8df_mask */ |
| 52736 | case 1247: /* avx512vl_loadv4sf_mask */ |
| 52737 | case 1245: /* avx512f_loadv16sf_mask */ |
| 52738 | case 1244: /* avx512vl_loadv2di_mask */ |
| 52739 | case 1242: /* avx512f_loadv8di_mask */ |
| 52740 | case 1241: /* avx512vl_loadv4si_mask */ |
| 52741 | case 1239: /* avx512f_loadv16si_mask */ |
| 52742 | extract_constrain_insn_cached (insn); |
| 52743 | if (which_alternative != 0) |
| 52744 | { |
| 52745 | return 4; |
| 52746 | } |
| 52747 | else |
| 52748 | { |
| 52749 | return 2; |
| 52750 | } |
| 52751 | |
| 52752 | case 1051: /* fnstsw */ |
| 52753 | extract_constrain_insn_cached (insn); |
| 52754 | if (which_alternative == 0) |
| 52755 | { |
| 52756 | return 1; |
| 52757 | } |
| 52758 | else |
| 52759 | { |
| 52760 | return 4; |
| 52761 | } |
| 52762 | |
| 52763 | case 4919: /* avx5124vnniw_vp4dpwssds_maskz */ |
| 52764 | case 4918: /* avx5124vnniw_vp4dpwssds_mask */ |
| 52765 | case 4917: /* avx5124vnniw_vp4dpwssds */ |
| 52766 | case 4916: /* avx5124vnniw_vp4dpwssd_maskz */ |
| 52767 | case 4915: /* avx5124vnniw_vp4dpwssd_mask */ |
| 52768 | case 4914: /* avx5124vnniw_vp4dpwssd */ |
| 52769 | case 4913: /* avx5124fmaddps_4fnmaddss_maskz */ |
| 52770 | case 4912: /* avx5124fmaddps_4fnmaddss_mask */ |
| 52771 | case 4911: /* avx5124fmaddps_4fnmaddss */ |
| 52772 | case 4910: /* avx5124fmaddps_4fnmaddps_maskz */ |
| 52773 | case 4909: /* avx5124fmaddps_4fnmaddps_mask */ |
| 52774 | case 4908: /* avx5124fmaddps_4fnmaddps */ |
| 52775 | case 4907: /* avx5124fmaddps_4fmaddss_maskz */ |
| 52776 | case 4906: /* avx5124fmaddps_4fmaddss_mask */ |
| 52777 | case 4905: /* avx5124fmaddps_4fmaddss */ |
| 52778 | case 4904: /* avx5124fmaddps_4fmaddps_maskz */ |
| 52779 | case 4903: /* avx5124fmaddps_4fmaddps_mask */ |
| 52780 | case 4902: /* avx5124fmaddps_4fmaddps */ |
| 52781 | case 4893: /* vpamdd52huqv2di_mask */ |
| 52782 | case 4892: /* vpamdd52luqv2di_mask */ |
| 52783 | case 4891: /* vpamdd52huqv4di_mask */ |
| 52784 | case 4890: /* vpamdd52luqv4di_mask */ |
| 52785 | case 4889: /* vpamdd52huqv8di_mask */ |
| 52786 | case 4888: /* vpamdd52luqv8di_mask */ |
| 52787 | case 4887: /* vpamdd52huqv2di_maskz_1 */ |
| 52788 | case 4886: /* vpamdd52huqv2di */ |
| 52789 | case 4885: /* vpamdd52luqv2di_maskz_1 */ |
| 52790 | case 4884: /* vpamdd52luqv2di */ |
| 52791 | case 4883: /* vpamdd52huqv4di_maskz_1 */ |
| 52792 | case 4882: /* vpamdd52huqv4di */ |
| 52793 | case 4881: /* vpamdd52luqv4di_maskz_1 */ |
| 52794 | case 4880: /* vpamdd52luqv4di */ |
| 52795 | case 4879: /* vpamdd52huqv8di_maskz_1 */ |
| 52796 | case 4878: /* vpamdd52huqv8di */ |
| 52797 | case 4877: /* vpamdd52luqv8di_maskz_1 */ |
| 52798 | case 4876: /* vpamdd52luqv8di */ |
| 52799 | case 3964: /* xop_pmadcsswd */ |
| 52800 | case 3963: /* xop_pmadcswd */ |
| 52801 | case 3962: /* xop_pmacsswd */ |
| 52802 | case 3961: /* xop_pmacswd */ |
| 52803 | case 3960: /* xop_pmacssdqh */ |
| 52804 | case 3959: /* xop_pmacsdqh */ |
| 52805 | case 3958: /* xop_pmacssdql */ |
| 52806 | case 3957: /* xop_pmacsdql */ |
| 52807 | case 3956: /* xop_pmacssdd */ |
| 52808 | case 3955: /* xop_pmacsdd */ |
| 52809 | case 3954: /* xop_pmacssww */ |
| 52810 | case 3953: /* xop_pmacsww */ |
| 52811 | case 3783: /* sse4_1_dppd */ |
| 52812 | case 3781: /* sse4_1_dpps */ |
| 52813 | case 2102: /* *fma4i_vmfnmsub_v2df */ |
| 52814 | case 2101: /* *fma4i_vmfnmsub_v4sf */ |
| 52815 | case 2100: /* *fma4i_vmfnmadd_v2df */ |
| 52816 | case 2099: /* *fma4i_vmfnmadd_v4sf */ |
| 52817 | case 2098: /* *fma4i_vmfmsub_v2df */ |
| 52818 | case 2097: /* *fma4i_vmfmsub_v4sf */ |
| 52819 | case 2096: /* *fma4i_vmfmadd_v2df */ |
| 52820 | case 2095: /* *fma4i_vmfmadd_v4sf */ |
| 52821 | case 2094: /* *fmai_fnmsub_v2df_round */ |
| 52822 | case 2093: /* *fmai_fnmsub_v2df */ |
| 52823 | case 2092: /* *fmai_fnmsub_v4sf_round */ |
| 52824 | case 2091: /* *fmai_fnmsub_v4sf */ |
| 52825 | case 2090: /* *fmai_fnmadd_v2df_round */ |
| 52826 | case 2089: /* *fmai_fnmadd_v2df */ |
| 52827 | case 2088: /* *fmai_fnmadd_v4sf_round */ |
| 52828 | case 2087: /* *fmai_fnmadd_v4sf */ |
| 52829 | case 2086: /* *fmai_fmsub_v2df */ |
| 52830 | case 2085: /* *fmai_fmsub_v2df */ |
| 52831 | case 2084: /* *fmai_fmsub_v4sf */ |
| 52832 | case 2083: /* *fmai_fmsub_v4sf */ |
| 52833 | case 2082: /* *fmai_fmadd_v2df */ |
| 52834 | case 2081: /* *fmai_fmadd_v2df */ |
| 52835 | case 2080: /* *fmai_fmadd_v4sf */ |
| 52836 | case 2079: /* *fmai_fmadd_v4sf */ |
| 52837 | case 2078: /* avx512vl_fmsubadd_v2df_mask3_round */ |
| 52838 | case 2077: /* avx512vl_fmsubadd_v2df_mask3 */ |
| 52839 | case 2074: /* avx512f_fmsubadd_v8df_mask3_round */ |
| 52840 | case 2073: /* avx512f_fmsubadd_v8df_mask3 */ |
| 52841 | case 2072: /* avx512vl_fmsubadd_v4sf_mask3_round */ |
| 52842 | case 2071: /* avx512vl_fmsubadd_v4sf_mask3 */ |
| 52843 | case 2068: /* avx512f_fmsubadd_v16sf_mask3_round */ |
| 52844 | case 2067: /* avx512f_fmsubadd_v16sf_mask3 */ |
| 52845 | case 2066: /* avx512vl_fmsubadd_v2df_mask_round */ |
| 52846 | case 2065: /* avx512vl_fmsubadd_v2df_mask */ |
| 52847 | case 2062: /* avx512f_fmsubadd_v8df_mask_round */ |
| 52848 | case 2061: /* avx512f_fmsubadd_v8df_mask */ |
| 52849 | case 2060: /* avx512vl_fmsubadd_v4sf_mask_round */ |
| 52850 | case 2059: /* avx512vl_fmsubadd_v4sf_mask */ |
| 52851 | case 2056: /* avx512f_fmsubadd_v16sf_mask_round */ |
| 52852 | case 2055: /* avx512f_fmsubadd_v16sf_mask */ |
| 52853 | case 2054: /* fma_fmsubadd_v2df_maskz_1 */ |
| 52854 | case 2053: /* *fma_fmsubadd_v2df */ |
| 52855 | case 2050: /* fma_fmsubadd_v8df_maskz_1_round */ |
| 52856 | case 2049: /* fma_fmsubadd_v8df_maskz_1 */ |
| 52857 | case 2048: /* *fma_fmsubadd_v8df_round */ |
| 52858 | case 2047: /* *fma_fmsubadd_v8df */ |
| 52859 | case 2046: /* *fma_fmsubadd_df */ |
| 52860 | case 2045: /* fma_fmsubadd_v4sf_maskz_1 */ |
| 52861 | case 2044: /* *fma_fmsubadd_v4sf */ |
| 52862 | case 2041: /* fma_fmsubadd_v16sf_maskz_1_round */ |
| 52863 | case 2040: /* fma_fmsubadd_v16sf_maskz_1 */ |
| 52864 | case 2039: /* *fma_fmsubadd_v16sf_round */ |
| 52865 | case 2038: /* *fma_fmsubadd_v16sf */ |
| 52866 | case 2037: /* *fma_fmsubadd_sf */ |
| 52867 | case 2036: /* *fma_fmsubadd_v2df */ |
| 52868 | case 2034: /* *fma_fmsubadd_v4sf */ |
| 52869 | case 2032: /* avx512vl_fmaddsub_v2df_mask3_round */ |
| 52870 | case 2031: /* avx512vl_fmaddsub_v2df_mask3 */ |
| 52871 | case 2028: /* avx512f_fmaddsub_v8df_mask3_round */ |
| 52872 | case 2027: /* avx512f_fmaddsub_v8df_mask3 */ |
| 52873 | case 2026: /* avx512vl_fmaddsub_v4sf_mask3_round */ |
| 52874 | case 2025: /* avx512vl_fmaddsub_v4sf_mask3 */ |
| 52875 | case 2022: /* avx512f_fmaddsub_v16sf_mask3_round */ |
| 52876 | case 2021: /* avx512f_fmaddsub_v16sf_mask3 */ |
| 52877 | case 2020: /* avx512vl_fmaddsub_v2df_mask_round */ |
| 52878 | case 2019: /* avx512vl_fmaddsub_v2df_mask */ |
| 52879 | case 2016: /* avx512f_fmaddsub_v8df_mask_round */ |
| 52880 | case 2015: /* avx512f_fmaddsub_v8df_mask */ |
| 52881 | case 2014: /* avx512vl_fmaddsub_v4sf_mask_round */ |
| 52882 | case 2013: /* avx512vl_fmaddsub_v4sf_mask */ |
| 52883 | case 2010: /* avx512f_fmaddsub_v16sf_mask_round */ |
| 52884 | case 2009: /* avx512f_fmaddsub_v16sf_mask */ |
| 52885 | case 2008: /* fma_fmaddsub_v2df_maskz_1 */ |
| 52886 | case 2007: /* *fma_fmaddsub_v2df */ |
| 52887 | case 2004: /* fma_fmaddsub_v8df_maskz_1_round */ |
| 52888 | case 2003: /* fma_fmaddsub_v8df_maskz_1 */ |
| 52889 | case 2002: /* *fma_fmaddsub_v8df_round */ |
| 52890 | case 2001: /* *fma_fmaddsub_v8df */ |
| 52891 | case 2000: /* *fma_fmaddsub_df */ |
| 52892 | case 1999: /* fma_fmaddsub_v4sf_maskz_1 */ |
| 52893 | case 1998: /* *fma_fmaddsub_v4sf */ |
| 52894 | case 1995: /* fma_fmaddsub_v16sf_maskz_1_round */ |
| 52895 | case 1994: /* fma_fmaddsub_v16sf_maskz_1 */ |
| 52896 | case 1993: /* *fma_fmaddsub_v16sf_round */ |
| 52897 | case 1992: /* *fma_fmaddsub_v16sf */ |
| 52898 | case 1991: /* *fma_fmaddsub_sf */ |
| 52899 | case 1990: /* *fma_fmaddsub_v2df */ |
| 52900 | case 1988: /* *fma_fmaddsub_v4sf */ |
| 52901 | case 1986: /* avx512vl_fnmsub_v2df_mask3_round */ |
| 52902 | case 1985: /* avx512vl_fnmsub_v2df_mask3 */ |
| 52903 | case 1982: /* avx512f_fnmsub_v8df_mask3_round */ |
| 52904 | case 1981: /* avx512f_fnmsub_v8df_mask3 */ |
| 52905 | case 1980: /* avx512vl_fnmsub_v4sf_mask3_round */ |
| 52906 | case 1979: /* avx512vl_fnmsub_v4sf_mask3 */ |
| 52907 | case 1976: /* avx512f_fnmsub_v16sf_mask3_round */ |
| 52908 | case 1975: /* avx512f_fnmsub_v16sf_mask3 */ |
| 52909 | case 1974: /* avx512vl_fnmsub_v2df_mask */ |
| 52910 | case 1972: /* avx512f_fnmsub_v8df_mask_round */ |
| 52911 | case 1971: /* avx512f_fnmsub_v8df_mask */ |
| 52912 | case 1970: /* avx512vl_fnmsub_v4sf_mask */ |
| 52913 | case 1968: /* avx512f_fnmsub_v16sf_mask_round */ |
| 52914 | case 1967: /* avx512f_fnmsub_v16sf_mask */ |
| 52915 | case 1966: /* fma_fnmsub_v2df_maskz_1 */ |
| 52916 | case 1965: /* *fma_fnmsub_v2df */ |
| 52917 | case 1962: /* fma_fnmsub_v8df_maskz_1_round */ |
| 52918 | case 1961: /* fma_fnmsub_v8df_maskz_1 */ |
| 52919 | case 1960: /* *fma_fnmsub_v8df_round */ |
| 52920 | case 1959: /* *fma_fnmsub_v8df */ |
| 52921 | case 1958: /* *fma_fnmsub_df */ |
| 52922 | case 1957: /* fma_fnmsub_v4sf_maskz_1 */ |
| 52923 | case 1956: /* *fma_fnmsub_v4sf */ |
| 52924 | case 1953: /* fma_fnmsub_v16sf_maskz_1_round */ |
| 52925 | case 1952: /* fma_fnmsub_v16sf_maskz_1 */ |
| 52926 | case 1951: /* *fma_fnmsub_v16sf_round */ |
| 52927 | case 1950: /* *fma_fnmsub_v16sf */ |
| 52928 | case 1949: /* *fma_fnmsub_sf */ |
| 52929 | case 1940: /* *fma_fnmsub_v2df */ |
| 52930 | case 1939: /* *fma_fnmsub_v2df */ |
| 52931 | case 1938: /* *fma_fnmsub_v2df */ |
| 52932 | case 1937: /* *fma_fnmsub_v2df */ |
| 52933 | case 1936: /* *fma_fnmsub_v4sf */ |
| 52934 | case 1935: /* *fma_fnmsub_v4sf */ |
| 52935 | case 1934: /* *fma_fnmsub_v4sf */ |
| 52936 | case 1933: /* *fma_fnmsub_v4sf */ |
| 52937 | case 1932: /* *fma_fnmsub_df */ |
| 52938 | case 1931: /* *fma_fnmsub_df */ |
| 52939 | case 1930: /* *fma_fnmsub_sf */ |
| 52940 | case 1929: /* *fma_fnmsub_sf */ |
| 52941 | case 1928: /* avx512vl_fnmadd_v2df_mask3 */ |
| 52942 | case 1926: /* avx512f_fnmadd_v8df_mask3_round */ |
| 52943 | case 1925: /* avx512f_fnmadd_v8df_mask3 */ |
| 52944 | case 1924: /* avx512vl_fnmadd_v4sf_mask3 */ |
| 52945 | case 1922: /* avx512f_fnmadd_v16sf_mask3_round */ |
| 52946 | case 1921: /* avx512f_fnmadd_v16sf_mask3 */ |
| 52947 | case 1920: /* avx512vl_fnmadd_v2df_mask */ |
| 52948 | case 1918: /* avx512f_fnmadd_v8df_mask_round */ |
| 52949 | case 1917: /* avx512f_fnmadd_v8df_mask */ |
| 52950 | case 1916: /* avx512vl_fnmadd_v4sf_mask */ |
| 52951 | case 1914: /* avx512f_fnmadd_v16sf_mask_round */ |
| 52952 | case 1913: /* avx512f_fnmadd_v16sf_mask */ |
| 52953 | case 1912: /* fma_fnmadd_v2df_maskz_1 */ |
| 52954 | case 1911: /* *fma_fnmadd_v2df */ |
| 52955 | case 1908: /* fma_fnmadd_v8df_maskz_1_round */ |
| 52956 | case 1907: /* fma_fnmadd_v8df_maskz_1 */ |
| 52957 | case 1906: /* *fma_fnmadd_v8df_round */ |
| 52958 | case 1905: /* *fma_fnmadd_v8df */ |
| 52959 | case 1904: /* *fma_fnmadd_df */ |
| 52960 | case 1903: /* fma_fnmadd_v4sf_maskz_1 */ |
| 52961 | case 1902: /* *fma_fnmadd_v4sf */ |
| 52962 | case 1899: /* fma_fnmadd_v16sf_maskz_1_round */ |
| 52963 | case 1898: /* fma_fnmadd_v16sf_maskz_1 */ |
| 52964 | case 1897: /* *fma_fnmadd_v16sf_round */ |
| 52965 | case 1896: /* *fma_fnmadd_v16sf */ |
| 52966 | case 1895: /* *fma_fnmadd_sf */ |
| 52967 | case 1892: /* *fma_fnmadd_v2df */ |
| 52968 | case 1891: /* *fma_fnmadd_v4sf */ |
| 52969 | case 1890: /* *fma_fnmadd_df */ |
| 52970 | case 1889: /* *fma_fnmadd_sf */ |
| 52971 | case 1888: /* avx512vl_fmsub_v2df_mask3 */ |
| 52972 | case 1886: /* avx512f_fmsub_v8df_mask3_round */ |
| 52973 | case 1885: /* avx512f_fmsub_v8df_mask3 */ |
| 52974 | case 1884: /* avx512vl_fmsub_v4sf_mask3 */ |
| 52975 | case 1882: /* avx512f_fmsub_v16sf_mask3_round */ |
| 52976 | case 1881: /* avx512f_fmsub_v16sf_mask3 */ |
| 52977 | case 1880: /* avx512vl_fmsub_v2df_mask_round */ |
| 52978 | case 1879: /* avx512vl_fmsub_v2df_mask */ |
| 52979 | case 1876: /* avx512f_fmsub_v8df_mask_round */ |
| 52980 | case 1875: /* avx512f_fmsub_v8df_mask */ |
| 52981 | case 1874: /* avx512vl_fmsub_v4sf_mask_round */ |
| 52982 | case 1873: /* avx512vl_fmsub_v4sf_mask */ |
| 52983 | case 1870: /* avx512f_fmsub_v16sf_mask_round */ |
| 52984 | case 1869: /* avx512f_fmsub_v16sf_mask */ |
| 52985 | case 1868: /* fma_fmsub_v2df_maskz_1 */ |
| 52986 | case 1867: /* *fma_fmsub_v2df */ |
| 52987 | case 1864: /* fma_fmsub_v8df_maskz_1_round */ |
| 52988 | case 1863: /* fma_fmsub_v8df_maskz_1 */ |
| 52989 | case 1862: /* *fma_fmsub_v8df_round */ |
| 52990 | case 1861: /* *fma_fmsub_v8df */ |
| 52991 | case 1860: /* *fma_fmsub_df */ |
| 52992 | case 1859: /* fma_fmsub_v4sf_maskz_1 */ |
| 52993 | case 1858: /* *fma_fmsub_v4sf */ |
| 52994 | case 1855: /* fma_fmsub_v16sf_maskz_1_round */ |
| 52995 | case 1854: /* fma_fmsub_v16sf_maskz_1 */ |
| 52996 | case 1853: /* *fma_fmsub_v16sf_round */ |
| 52997 | case 1852: /* *fma_fmsub_v16sf */ |
| 52998 | case 1851: /* *fma_fmsub_sf */ |
| 52999 | case 1848: /* *fma_fmsub_v2df */ |
| 53000 | case 1847: /* *fma_fmsub_v4sf */ |
| 53001 | case 1846: /* *fma_fmsub_df */ |
| 53002 | case 1845: /* *fma_fmsub_sf */ |
| 53003 | case 1844: /* avx512vl_fmadd_v2df_mask3_round */ |
| 53004 | case 1843: /* avx512vl_fmadd_v2df_mask3 */ |
| 53005 | case 1840: /* avx512f_fmadd_v8df_mask3_round */ |
| 53006 | case 1839: /* avx512f_fmadd_v8df_mask3 */ |
| 53007 | case 1838: /* avx512vl_fmadd_v4sf_mask3_round */ |
| 53008 | case 1837: /* avx512vl_fmadd_v4sf_mask3 */ |
| 53009 | case 1834: /* avx512f_fmadd_v16sf_mask3_round */ |
| 53010 | case 1833: /* avx512f_fmadd_v16sf_mask3 */ |
| 53011 | case 1832: /* avx512vl_fmadd_v2df_mask */ |
| 53012 | case 1830: /* avx512f_fmadd_v8df_mask_round */ |
| 53013 | case 1829: /* avx512f_fmadd_v8df_mask */ |
| 53014 | case 1828: /* avx512vl_fmadd_v4sf_mask */ |
| 53015 | case 1826: /* avx512f_fmadd_v16sf_mask_round */ |
| 53016 | case 1825: /* avx512f_fmadd_v16sf_mask */ |
| 53017 | case 1824: /* fma_fmadd_v2df_maskz_1 */ |
| 53018 | case 1823: /* *fma_fmadd_v2df */ |
| 53019 | case 1820: /* fma_fmadd_v8df_maskz_1_round */ |
| 53020 | case 1819: /* fma_fmadd_v8df_maskz_1 */ |
| 53021 | case 1818: /* *fma_fmadd_v8df_round */ |
| 53022 | case 1817: /* *fma_fmadd_v8df */ |
| 53023 | case 1816: /* *fma_fmadd_df */ |
| 53024 | case 1815: /* fma_fmadd_v4sf_maskz_1 */ |
| 53025 | case 1814: /* *fma_fmadd_v4sf */ |
| 53026 | case 1811: /* fma_fmadd_v16sf_maskz_1_round */ |
| 53027 | case 1810: /* fma_fmadd_v16sf_maskz_1 */ |
| 53028 | case 1809: /* *fma_fmadd_v16sf_round */ |
| 53029 | case 1808: /* *fma_fmadd_v16sf */ |
| 53030 | case 1807: /* *fma_fmadd_sf */ |
| 53031 | case 1804: /* *fma_fmadd_v2df */ |
| 53032 | case 1803: /* *fma_fmadd_v4sf */ |
| 53033 | case 1802: /* *fma_fmadd_df */ |
| 53034 | case 1801: /* *fma_fmadd_sf */ |
| 53035 | case 1620: /* sse3_hsubv4sf3 */ |
| 53036 | case 1619: /* sse3_haddv4sf3 */ |
| 53037 | case 1616: /* *sse3_hsubv2df3_low */ |
| 53038 | case 1615: /* *sse3_haddv2df3_low */ |
| 53039 | case 1614: /* sse3_hsubv2df3 */ |
| 53040 | case 1613: /* *sse3_haddv2df3 */ |
| 53041 | case 1610: /* sse3_addsubv4sf3 */ |
| 53042 | case 1608: /* sse3_addsubv2df3 */ |
| 53043 | case 1598: /* ieee_minv2df3_mask */ |
| 53044 | case 1597: /* ieee_minv2df3 */ |
| 53045 | case 1596: /* ieee_maxv2df3_mask */ |
| 53046 | case 1595: /* ieee_maxv2df3 */ |
| 53047 | case 1590: /* ieee_minv8df3_mask_round */ |
| 53048 | case 1589: /* ieee_minv8df3_mask */ |
| 53049 | case 1588: /* ieee_minv8df3_round */ |
| 53050 | case 1587: /* ieee_minv8df3 */ |
| 53051 | case 1586: /* ieee_maxv8df3_mask_round */ |
| 53052 | case 1585: /* ieee_maxv8df3_mask */ |
| 53053 | case 1584: /* ieee_maxv8df3_round */ |
| 53054 | case 1583: /* ieee_maxv8df3 */ |
| 53055 | case 1582: /* ieee_minv4sf3_mask */ |
| 53056 | case 1581: /* ieee_minv4sf3 */ |
| 53057 | case 1580: /* ieee_maxv4sf3_mask */ |
| 53058 | case 1579: /* ieee_maxv4sf3 */ |
| 53059 | case 1574: /* ieee_minv16sf3_mask_round */ |
| 53060 | case 1573: /* ieee_minv16sf3_mask */ |
| 53061 | case 1572: /* ieee_minv16sf3_round */ |
| 53062 | case 1571: /* ieee_minv16sf3 */ |
| 53063 | case 1570: /* ieee_maxv16sf3_mask_round */ |
| 53064 | case 1569: /* ieee_maxv16sf3_mask */ |
| 53065 | case 1568: /* ieee_maxv16sf3_round */ |
| 53066 | case 1567: /* ieee_maxv16sf3 */ |
| 53067 | case 1566: /* *sminv2df3_mask_round */ |
| 53068 | case 1565: /* *sminv2df3_mask */ |
| 53069 | case 1564: /* *sminv2df3_round */ |
| 53070 | case 1563: /* *sminv2df3 */ |
| 53071 | case 1562: /* *smaxv2df3_mask_round */ |
| 53072 | case 1561: /* *smaxv2df3_mask */ |
| 53073 | case 1560: /* *smaxv2df3_round */ |
| 53074 | case 1559: /* *smaxv2df3 */ |
| 53075 | case 1550: /* *sminv8df3_mask_round */ |
| 53076 | case 1549: /* *sminv8df3_mask */ |
| 53077 | case 1548: /* *sminv8df3_round */ |
| 53078 | case 1547: /* *sminv8df3 */ |
| 53079 | case 1546: /* *smaxv8df3_mask_round */ |
| 53080 | case 1545: /* *smaxv8df3_mask */ |
| 53081 | case 1544: /* *smaxv8df3_round */ |
| 53082 | case 1543: /* *smaxv8df3 */ |
| 53083 | case 1542: /* *sminv4sf3_mask_round */ |
| 53084 | case 1541: /* *sminv4sf3_mask */ |
| 53085 | case 1540: /* *sminv4sf3_round */ |
| 53086 | case 1539: /* *sminv4sf3 */ |
| 53087 | case 1538: /* *smaxv4sf3_mask_round */ |
| 53088 | case 1537: /* *smaxv4sf3_mask */ |
| 53089 | case 1536: /* *smaxv4sf3_round */ |
| 53090 | case 1535: /* *smaxv4sf3 */ |
| 53091 | case 1526: /* *sminv16sf3_mask_round */ |
| 53092 | case 1525: /* *sminv16sf3_mask */ |
| 53093 | case 1524: /* *sminv16sf3_round */ |
| 53094 | case 1523: /* *sminv16sf3 */ |
| 53095 | case 1522: /* *smaxv16sf3_mask_round */ |
| 53096 | case 1521: /* *smaxv16sf3_mask */ |
| 53097 | case 1520: /* *smaxv16sf3_round */ |
| 53098 | case 1519: /* *smaxv16sf3 */ |
| 53099 | case 1446: /* sse2_vmmulv2df3_round */ |
| 53100 | case 1445: /* sse2_vmmulv2df3 */ |
| 53101 | case 1442: /* sse_vmmulv4sf3_round */ |
| 53102 | case 1441: /* sse_vmmulv4sf3 */ |
| 53103 | case 1440: /* *mulv2df3_mask_round */ |
| 53104 | case 1439: /* *mulv2df3_mask */ |
| 53105 | case 1438: /* *mulv2df3_round */ |
| 53106 | case 1437: /* *mulv2df3 */ |
| 53107 | case 1432: /* *mulv8df3_mask_round */ |
| 53108 | case 1431: /* *mulv8df3_mask */ |
| 53109 | case 1430: /* *mulv8df3_round */ |
| 53110 | case 1429: /* *mulv8df3 */ |
| 53111 | case 1428: /* *mulv4sf3_mask_round */ |
| 53112 | case 1427: /* *mulv4sf3_mask */ |
| 53113 | case 1426: /* *mulv4sf3_round */ |
| 53114 | case 1425: /* *mulv4sf3 */ |
| 53115 | case 1420: /* *mulv16sf3_mask_round */ |
| 53116 | case 1419: /* *mulv16sf3_mask */ |
| 53117 | case 1418: /* *mulv16sf3_round */ |
| 53118 | case 1417: /* *mulv16sf3 */ |
| 53119 | case 1416: /* sse2_vmsubv2df3_round */ |
| 53120 | case 1415: /* sse2_vmsubv2df3 */ |
| 53121 | case 1414: /* sse2_vmaddv2df3_round */ |
| 53122 | case 1413: /* sse2_vmaddv2df3 */ |
| 53123 | case 1412: /* sse_vmsubv4sf3_round */ |
| 53124 | case 1411: /* sse_vmsubv4sf3 */ |
| 53125 | case 1410: /* sse_vmaddv4sf3_round */ |
| 53126 | case 1409: /* sse_vmaddv4sf3 */ |
| 53127 | case 1408: /* *subv2df3_mask_round */ |
| 53128 | case 1407: /* *subv2df3_mask */ |
| 53129 | case 1406: /* *subv2df3_round */ |
| 53130 | case 1405: /* *subv2df3 */ |
| 53131 | case 1404: /* *addv2df3_mask_round */ |
| 53132 | case 1403: /* *addv2df3_mask */ |
| 53133 | case 1402: /* *addv2df3_round */ |
| 53134 | case 1401: /* *addv2df3 */ |
| 53135 | case 1392: /* *subv8df3_mask_round */ |
| 53136 | case 1391: /* *subv8df3_mask */ |
| 53137 | case 1390: /* *subv8df3_round */ |
| 53138 | case 1389: /* *subv8df3 */ |
| 53139 | case 1388: /* *addv8df3_mask_round */ |
| 53140 | case 1387: /* *addv8df3_mask */ |
| 53141 | case 1386: /* *addv8df3_round */ |
| 53142 | case 1385: /* *addv8df3 */ |
| 53143 | case 1384: /* *subv4sf3_mask_round */ |
| 53144 | case 1383: /* *subv4sf3_mask */ |
| 53145 | case 1382: /* *subv4sf3_round */ |
| 53146 | case 1381: /* *subv4sf3 */ |
| 53147 | case 1380: /* *addv4sf3_mask_round */ |
| 53148 | case 1379: /* *addv4sf3_mask */ |
| 53149 | case 1378: /* *addv4sf3_round */ |
| 53150 | case 1377: /* *addv4sf3 */ |
| 53151 | case 1368: /* *subv16sf3_mask_round */ |
| 53152 | case 1367: /* *subv16sf3_mask */ |
| 53153 | case 1366: /* *subv16sf3_round */ |
| 53154 | case 1365: /* *subv16sf3 */ |
| 53155 | case 1364: /* *addv16sf3_mask_round */ |
| 53156 | case 1363: /* *addv16sf3_mask */ |
| 53157 | case 1362: /* *addv16sf3_round */ |
| 53158 | case 1361: /* *addv16sf3 */ |
| 53159 | case 992: /* *ieee_smindf3 */ |
| 53160 | case 991: /* *ieee_smaxdf3 */ |
| 53161 | case 990: /* *ieee_sminsf3 */ |
| 53162 | case 989: /* *ieee_smaxsf3 */ |
| 53163 | case 988: /* smindf3 */ |
| 53164 | case 987: /* smaxdf3 */ |
| 53165 | case 986: /* sminsf3 */ |
| 53166 | case 985: /* smaxsf3 */ |
| 53167 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) |
| 53168 | { |
| 53169 | return 10 /* 0xa */; |
| 53170 | } |
| 53171 | else if (cached_memory == MEMORY_NONE) |
| 53172 | { |
| 53173 | return 6; |
| 53174 | } |
| 53175 | else |
| 53176 | { |
| 53177 | return 0; |
| 53178 | } |
| 53179 | |
| 53180 | case 980: /* *movxfcc_1 */ |
| 53181 | return 15 /* 0xf */; |
| 53182 | |
| 53183 | case 962: /* *rep_stosqi */ |
| 53184 | case 961: /* *rep_stosqi */ |
| 53185 | case 960: /* *rep_stossi */ |
| 53186 | case 959: /* *rep_stossi */ |
| 53187 | case 958: /* *rep_stosdi_rex64 */ |
| 53188 | case 957: /* *rep_stosdi_rex64 */ |
| 53189 | case 956: /* *strsetqi_1 */ |
| 53190 | case 955: /* *strsetqi_1 */ |
| 53191 | case 954: /* *strsethi_1 */ |
| 53192 | case 953: /* *strsethi_1 */ |
| 53193 | case 952: /* *strsetsi_1 */ |
| 53194 | case 951: /* *strsetsi_1 */ |
| 53195 | case 950: /* *strsetdi_rex_1 */ |
| 53196 | case 949: /* *strsetdi_rex_1 */ |
| 53197 | case 948: /* *rep_movqi */ |
| 53198 | case 947: /* *rep_movqi */ |
| 53199 | case 946: /* *rep_movsi */ |
| 53200 | case 945: /* *rep_movsi */ |
| 53201 | case 944: /* *rep_movdi_rex64 */ |
| 53202 | case 943: /* *rep_movdi_rex64 */ |
| 53203 | case 942: /* *strmovqi_1 */ |
| 53204 | case 941: /* *strmovqi_1 */ |
| 53205 | case 940: /* *strmovhi_1 */ |
| 53206 | case 939: /* *strmovhi_1 */ |
| 53207 | case 938: /* *strmovsi_1 */ |
| 53208 | case 937: /* *strmovsi_1 */ |
| 53209 | case 936: /* *strmovdi_rex_1 */ |
| 53210 | case 935: /* *strmovdi_rex_1 */ |
| 53211 | return 6; |
| 53212 | |
| 53213 | case 4754: /* avx512vl_compressstorev4df_mask */ |
| 53214 | case 4753: /* avx512vl_compressstorev4di_mask */ |
| 53215 | case 4752: /* avx512vl_compressstorev8sf_mask */ |
| 53216 | case 4751: /* avx512vl_compressstorev8si_mask */ |
| 53217 | case 1291: /* avx512vl_storev16hi_mask */ |
| 53218 | case 1289: /* avx512vl_storev32qi_mask */ |
| 53219 | case 1285: /* avx512vl_storev4df_mask */ |
| 53220 | case 1282: /* avx512vl_storev8sf_mask */ |
| 53221 | case 1279: /* avx512vl_storev4di_mask */ |
| 53222 | case 1276: /* avx512vl_storev8si_mask */ |
| 53223 | case 1098: /* *bnd64_ldx */ |
| 53224 | case 1097: /* *bnd32_ldx */ |
| 53225 | case 1050: /* fldenv */ |
| 53226 | case 1048: /* xrstors64 */ |
| 53227 | case 1047: /* xrstor64 */ |
| 53228 | case 1046: /* xrstors_rex64 */ |
| 53229 | case 1045: /* xrstor_rex64 */ |
| 53230 | case 1044: /* xrstors */ |
| 53231 | case 1043: /* xrstor */ |
| 53232 | case 1030: /* fxrstor64 */ |
| 53233 | case 1029: /* fxrstor */ |
| 53234 | case 805: /* *add_tp_di */ |
| 53235 | case 804: /* *add_tp_si */ |
| 53236 | case 803: /* *add_tp_x32_zext */ |
| 53237 | case 802: /* *add_tp_x32 */ |
| 53238 | return 5; |
| 53239 | |
| 53240 | case 4427: /* avx_maskstoreps256 */ |
| 53241 | case 4419: /* avx_maskloadps256 */ |
| 53242 | case 3771: /* sse4a_insertq */ |
| 53243 | case 3770: /* sse4a_insertqi */ |
| 53244 | case 2522: /* vec_extract_hi_v8sf */ |
| 53245 | case 2520: /* vec_extract_hi_v8sf_mask */ |
| 53246 | case 2518: /* vec_extract_hi_v8sf_maskm */ |
| 53247 | case 2516: /* vec_extract_lo_v8sf_maskm */ |
| 53248 | case 2514: /* vec_extract_lo_v8sf_mask */ |
| 53249 | case 2513: /* vec_extract_lo_v8sf */ |
| 53250 | case 2456: /* avx2_vec_dupv8sf_1 */ |
| 53251 | case 2454: /* avx2_vec_dupv8sf */ |
| 53252 | case 704: /* leave_rex64 */ |
| 53253 | case 703: /* leave */ |
| 53254 | return 3; |
| 53255 | |
| 53256 | case 693: /* simple_return_indirect_internal */ |
| 53257 | case 663: /* *tablejump_1 */ |
| 53258 | case 662: /* *tablejump_1 */ |
| 53259 | case 661: /* *indirect_jump */ |
| 53260 | case 660: /* *indirect_jump */ |
| 53261 | extract_constrain_insn_cached (insn); |
| 53262 | if (((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) || ( |
| 53263 | #line 12442 "/___NETBSD_SRC___/tools/gcc/../../external/gpl3/gcc/dist/gcc/config/i386/i386.md" |
| 53264 | ((cfun->machine->indirect_branch_type |
| 53265 | != indirect_branch_keep)))) |
| 53266 | { |
| 53267 | return 1; |
| 53268 | } |
| 53269 | else if (cached_memory == MEMORY_LOAD) |
| 53270 | { |
| 53271 | return 5; |
| 53272 | } |
| 53273 | else |
| 53274 | { |
| 53275 | return 0; |
| 53276 | } |
| 53277 | |
| 53278 | case 624: /* *setcc_qi_slp */ |
| 53279 | case 623: /* *setcc_qi */ |
| 53280 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) |
| 53281 | { |
| 53282 | return 1; |
| 53283 | } |
| 53284 | else if (cached_memory == MEMORY_STORE) |
| 53285 | { |
| 53286 | return 4; |
| 53287 | } |
| 53288 | else |
| 53289 | { |
| 53290 | return 0; |
| 53291 | } |
| 53292 | |
| 53293 | case 344: /* *mulvhi4 */ |
| 53294 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) |
| 53295 | { |
| 53296 | return 4; |
| 53297 | } |
| 53298 | else if ((cached_memory == MEMORY_LOAD) || (cached_memory == MEMORY_BOTH)) |
| 53299 | { |
| 53300 | return 8; |
| 53301 | } |
| 53302 | else |
| 53303 | { |
| 53304 | return 0; |
| 53305 | } |
| 53306 | |
| 53307 | case 3713: /* *ssse3_pmulhrswv4hi3 */ |
| 53308 | case 3712: /* *ssse3_pmulhrswv8hi3_mask */ |
| 53309 | case 3711: /* *ssse3_pmulhrswv8hi3 */ |
| 53310 | case 3710: /* *avx2_pmulhrswv16hi3_mask */ |
| 53311 | case 3709: /* *avx2_pmulhrswv16hi3 */ |
| 53312 | case 3708: /* *avx512bw_pmulhrswv32hi3_mask */ |
| 53313 | case 3707: /* *avx512bw_pmulhrswv32hi3 */ |
| 53314 | case 3704: /* avx512bw_umulhrswv32hi3_mask */ |
| 53315 | case 3703: /* avx512bw_umulhrswv32hi3 */ |
| 53316 | case 3079: /* *sse4_1_mulv4si3_mask */ |
| 53317 | case 3078: /* *sse4_1_mulv4si3 */ |
| 53318 | case 3077: /* *avx2_mulv8si3_mask */ |
| 53319 | case 3076: /* *avx2_mulv8si3 */ |
| 53320 | case 3075: /* *avx512f_mulv16si3_mask */ |
| 53321 | case 3074: /* *avx512f_mulv16si3 */ |
| 53322 | case 3073: /* avx512dq_mulv2di3_mask */ |
| 53323 | case 3072: /* avx512dq_mulv2di3 */ |
| 53324 | case 3071: /* avx512dq_mulv4di3_mask */ |
| 53325 | case 3070: /* avx512dq_mulv4di3 */ |
| 53326 | case 3069: /* avx512dq_mulv8di3_mask */ |
| 53327 | case 3068: /* avx512dq_mulv8di3 */ |
| 53328 | case 3059: /* *sse4_1_mulv2siv2di3_mask */ |
| 53329 | case 3058: /* *sse4_1_mulv2siv2di3 */ |
| 53330 | case 3057: /* *vec_widen_smult_even_v8si_mask */ |
| 53331 | case 3056: /* *vec_widen_smult_even_v8si */ |
| 53332 | case 3055: /* *vec_widen_smult_even_v16si_mask */ |
| 53333 | case 3054: /* *vec_widen_smult_even_v16si */ |
| 53334 | case 3053: /* *vec_widen_umult_even_v4si_mask */ |
| 53335 | case 3052: /* *vec_widen_umult_even_v4si */ |
| 53336 | case 3051: /* *vec_widen_umult_even_v8si_mask */ |
| 53337 | case 3050: /* *vec_widen_umult_even_v8si */ |
| 53338 | case 3049: /* *vec_widen_umult_even_v16si_mask */ |
| 53339 | case 3048: /* *vec_widen_umult_even_v16si */ |
| 53340 | case 3047: /* *umulv8hi3_highpart_mask */ |
| 53341 | case 3046: /* *umulv8hi3_highpart */ |
| 53342 | case 3045: /* *smulv8hi3_highpart_mask */ |
| 53343 | case 3044: /* *smulv8hi3_highpart */ |
| 53344 | case 3043: /* *umulv16hi3_highpart_mask */ |
| 53345 | case 3042: /* *umulv16hi3_highpart */ |
| 53346 | case 3041: /* *smulv16hi3_highpart_mask */ |
| 53347 | case 3040: /* *smulv16hi3_highpart */ |
| 53348 | case 3039: /* *umulv32hi3_highpart_mask */ |
| 53349 | case 3038: /* *umulv32hi3_highpart */ |
| 53350 | case 3037: /* *smulv32hi3_highpart_mask */ |
| 53351 | case 3036: /* *smulv32hi3_highpart */ |
| 53352 | case 3035: /* *mulv8hi3_mask */ |
| 53353 | case 3034: /* *mulv8hi3 */ |
| 53354 | case 3033: /* *mulv16hi3_mask */ |
| 53355 | case 3032: /* *mulv16hi3 */ |
| 53356 | case 3031: /* *mulv32hi3_mask */ |
| 53357 | case 3030: /* *mulv32hi3 */ |
| 53358 | case 2226: /* sse2_cvttsd2siq_round */ |
| 53359 | case 2225: /* sse2_cvttsd2siq */ |
| 53360 | case 2224: /* sse2_cvttsd2si_round */ |
| 53361 | case 2223: /* sse2_cvttsd2si */ |
| 53362 | case 2222: /* sse2_cvtsd2siq_2 */ |
| 53363 | case 2221: /* sse2_cvtsd2siq_round */ |
| 53364 | case 2220: /* sse2_cvtsd2siq */ |
| 53365 | case 2219: /* sse2_cvtsd2si_2 */ |
| 53366 | case 2218: /* sse2_cvtsd2si_round */ |
| 53367 | case 2217: /* sse2_cvtsd2si */ |
| 53368 | case 2216: /* avx512f_vcvttsd2usiq_round */ |
| 53369 | case 2215: /* avx512f_vcvttsd2usiq */ |
| 53370 | case 2214: /* avx512f_vcvttsd2usi_round */ |
| 53371 | case 2213: /* avx512f_vcvttsd2usi */ |
| 53372 | case 2212: /* avx512f_vcvtsd2usiq_round */ |
| 53373 | case 2211: /* avx512f_vcvtsd2usiq */ |
| 53374 | case 2210: /* avx512f_vcvtsd2usi_round */ |
| 53375 | case 2209: /* avx512f_vcvtsd2usi */ |
| 53376 | case 2208: /* avx512f_vcvttss2usiq_round */ |
| 53377 | case 2207: /* avx512f_vcvttss2usiq */ |
| 53378 | case 2206: /* avx512f_vcvttss2usi_round */ |
| 53379 | case 2205: /* avx512f_vcvttss2usi */ |
| 53380 | case 2204: /* avx512f_vcvtss2usiq_round */ |
| 53381 | case 2203: /* avx512f_vcvtss2usiq */ |
| 53382 | case 2202: /* avx512f_vcvtss2usi_round */ |
| 53383 | case 2201: /* avx512f_vcvtss2usi */ |
| 53384 | case 2200: /* sse2_cvtsi2sdq_round */ |
| 53385 | case 2199: /* sse2_cvtsi2sdq */ |
| 53386 | case 2198: /* sse2_cvtsi2sd */ |
| 53387 | case 2126: /* cvtusi2sd64_round */ |
| 53388 | case 2125: /* cvtusi2sd64 */ |
| 53389 | case 2124: /* cvtusi2ss64_round */ |
| 53390 | case 2123: /* cvtusi2ss64 */ |
| 53391 | case 2122: /* cvtusi2sd32 */ |
| 53392 | case 2121: /* cvtusi2ss32_round */ |
| 53393 | case 2120: /* cvtusi2ss32 */ |
| 53394 | case 2119: /* sse_cvttss2siq_round */ |
| 53395 | case 2118: /* sse_cvttss2siq */ |
| 53396 | case 2117: /* sse_cvttss2si_round */ |
| 53397 | case 2116: /* sse_cvttss2si */ |
| 53398 | case 2115: /* sse_cvtss2siq_2 */ |
| 53399 | case 2114: /* sse_cvtss2siq_round */ |
| 53400 | case 2113: /* sse_cvtss2siq */ |
| 53401 | case 2112: /* sse_cvtss2si_2 */ |
| 53402 | case 2111: /* sse_cvtss2si_round */ |
| 53403 | case 2110: /* sse_cvtss2si */ |
| 53404 | case 2109: /* sse_cvtsi2ssq_round */ |
| 53405 | case 2108: /* sse_cvtsi2ssq */ |
| 53406 | case 2107: /* sse_cvtsi2ss_round */ |
| 53407 | case 2106: /* sse_cvtsi2ss */ |
| 53408 | case 173: /* fix_truncdfdi_sse */ |
| 53409 | case 172: /* fix_truncdfsi_sse */ |
| 53410 | case 171: /* fix_truncsfdi_sse */ |
| 53411 | case 170: /* fix_truncsfsi_sse */ |
| 53412 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) |
| 53413 | { |
| 53414 | return 8; |
| 53415 | } |
| 53416 | else if (cached_memory == MEMORY_NONE) |
| 53417 | { |
| 53418 | return 4; |
| 53419 | } |
| 53420 | else |
| 53421 | { |
| 53422 | return 0; |
| 53423 | } |
| 53424 | |
| 53425 | case 163: /* *truncxfdf2_mixed */ |
| 53426 | case 162: /* *truncxfsf2_mixed */ |
| 53427 | case 160: /* *truncdfsf_i387 */ |
| 53428 | extract_constrain_insn_cached (insn); |
| 53429 | if ((which_alternative == 0) && (get_attr_memory (insn) == MEMORY_LOAD)) |
| 53430 | { |
| 53431 | return 5; |
| 53432 | } |
| 53433 | else if (which_alternative == 0) |
| 53434 | { |
| 53435 | return 2; |
| 53436 | } |
| 53437 | else |
| 53438 | { |
| 53439 | return 0; |
| 53440 | } |
| 53441 | |
| 53442 | case 4935: /* storedi_via_fpu */ |
| 53443 | case 4934: /* loaddi_via_fpu */ |
| 53444 | case 841: /* truncxfdf2_i387_noop_unspec */ |
| 53445 | case 840: /* truncxfsf2_i387_noop_unspec */ |
| 53446 | case 206: /* *floatdidf2_i387 */ |
| 53447 | case 205: /* *floatdisf2_i387 */ |
| 53448 | case 204: /* *floatsidf2_i387 */ |
| 53449 | case 203: /* *floatsisf2_i387 */ |
| 53450 | case 195: /* floathidf2 */ |
| 53451 | case 194: /* floathisf2 */ |
| 53452 | case 167: /* *truncxfdf2_i387 */ |
| 53453 | case 166: /* *truncxfsf2_i387 */ |
| 53454 | case 165: /* truncxfdf2_i387_noop */ |
| 53455 | case 164: /* truncxfsf2_i387_noop */ |
| 53456 | case 161: /* *truncdfsf2_i387_1 */ |
| 53457 | case 158: /* *truncdfsf_fast_i387 */ |
| 53458 | if (get_attr_memory (insn) == MEMORY_LOAD) |
| 53459 | { |
| 53460 | return 5; |
| 53461 | } |
| 53462 | else |
| 53463 | { |
| 53464 | return 2; |
| 53465 | } |
| 53466 | |
| 53467 | case 4869: /* sha256rnds2 */ |
| 53468 | case 4868: /* sha256msg2 */ |
| 53469 | case 4867: /* sha256msg1 */ |
| 53470 | case 4866: /* sha1rnds4 */ |
| 53471 | case 4865: /* sha1nexte */ |
| 53472 | case 4864: /* sha1msg2 */ |
| 53473 | case 4863: /* sha1msg1 */ |
| 53474 | case 4838: /* avx512bw_dbpsadbwv32hi_mask */ |
| 53475 | case 4837: /* *avx512bw_dbpsadbwv32hi */ |
| 53476 | case 4836: /* avx512bw_dbpsadbwv16hi_mask */ |
| 53477 | case 4835: /* *avx512bw_dbpsadbwv16hi */ |
| 53478 | case 4834: /* avx512bw_dbpsadbwv8hi_mask */ |
| 53479 | case 4833: /* *avx512bw_dbpsadbwv8hi */ |
| 53480 | case 4432: /* avx2_maskstoreq256 */ |
| 53481 | case 4431: /* avx2_maskstored256 */ |
| 53482 | case 4430: /* avx2_maskstoreq */ |
| 53483 | case 4429: /* avx2_maskstored */ |
| 53484 | case 4428: /* avx_maskstorepd256 */ |
| 53485 | case 4426: /* avx_maskstorepd */ |
| 53486 | case 4425: /* avx_maskstoreps */ |
| 53487 | case 4424: /* avx2_maskloadq256 */ |
| 53488 | case 4423: /* avx2_maskloadd256 */ |
| 53489 | case 4422: /* avx2_maskloadq */ |
| 53490 | case 4421: /* avx2_maskloadd */ |
| 53491 | case 4420: /* avx_maskloadpd256 */ |
| 53492 | case 4418: /* avx_maskloadpd */ |
| 53493 | case 4417: /* avx_maskloadps */ |
| 53494 | case 4110: /* avx2_vec_dupv4df */ |
| 53495 | case 4054: /* pclmulqdq */ |
| 53496 | case 4053: /* aeskeygenassist */ |
| 53497 | case 4052: /* aesimc */ |
| 53498 | case 4051: /* aesdeclast */ |
| 53499 | case 4050: /* aesdec */ |
| 53500 | case 4049: /* aesenclast */ |
| 53501 | case 4048: /* aesenc */ |
| 53502 | case 3801: /* sse4_1_phminposuw */ |
| 53503 | case 3788: /* sse4_1_mpsadbw */ |
| 53504 | case 3787: /* avx2_mpsadbw */ |
| 53505 | case 3763: /* absv2si2 */ |
| 53506 | case 3762: /* absv4hi2 */ |
| 53507 | case 3761: /* absv8qi2 */ |
| 53508 | case 3760: /* absv8hi2_mask */ |
| 53509 | case 3759: /* absv16hi2_mask */ |
| 53510 | case 3758: /* absv32hi2_mask */ |
| 53511 | case 3757: /* absv32qi2_mask */ |
| 53512 | case 3756: /* absv16qi2_mask */ |
| 53513 | case 3755: /* absv64qi2_mask */ |
| 53514 | case 3754: /* absv2di2_mask */ |
| 53515 | case 3753: /* absv4di2_mask */ |
| 53516 | case 3752: /* absv8di2_mask */ |
| 53517 | case 3751: /* absv4si2_mask */ |
| 53518 | case 3750: /* absv8si2_mask */ |
| 53519 | case 3749: /* absv16si2_mask */ |
| 53520 | case 3748: /* *absv2di2 */ |
| 53521 | case 3747: /* *absv4di2 */ |
| 53522 | case 3746: /* *absv8di2 */ |
| 53523 | case 3745: /* *absv4si2 */ |
| 53524 | case 3744: /* *absv8si2 */ |
| 53525 | case 3743: /* *absv16si2 */ |
| 53526 | case 3742: /* *absv8hi2 */ |
| 53527 | case 3741: /* *absv16hi2 */ |
| 53528 | case 3740: /* *absv32hi2 */ |
| 53529 | case 3739: /* *absv16qi2 */ |
| 53530 | case 3738: /* *absv32qi2 */ |
| 53531 | case 3737: /* *absv64qi2 */ |
| 53532 | case 3729: /* ssse3_psignv2si3 */ |
| 53533 | case 3728: /* ssse3_psignv4hi3 */ |
| 53534 | case 3727: /* ssse3_psignv8qi3 */ |
| 53535 | case 3726: /* ssse3_psignv4si3 */ |
| 53536 | case 3725: /* avx2_psignv8si3 */ |
| 53537 | case 3724: /* ssse3_psignv8hi3 */ |
| 53538 | case 3723: /* avx2_psignv16hi3 */ |
| 53539 | case 3722: /* ssse3_psignv16qi3 */ |
| 53540 | case 3721: /* avx2_psignv32qi3 */ |
| 53541 | case 3720: /* ssse3_pshufbv8qi3 */ |
| 53542 | case 3719: /* ssse3_pshufbv16qi3_mask */ |
| 53543 | case 3718: /* ssse3_pshufbv16qi3 */ |
| 53544 | case 3717: /* avx2_pshufbv32qi3_mask */ |
| 53545 | case 3716: /* avx2_pshufbv32qi3 */ |
| 53546 | case 3715: /* avx512bw_pshufbv64qi3_mask */ |
| 53547 | case 3714: /* avx512bw_pshufbv64qi3 */ |
| 53548 | case 3635: /* *vec_extractv4si_zext */ |
| 53549 | case 3626: /* *vec_extractv8hi_zext */ |
| 53550 | case 3625: /* *vec_extractv8hi_zext */ |
| 53551 | case 3624: /* *vec_extractv16qi_zext */ |
| 53552 | case 3623: /* *vec_extractv16qi_zext */ |
| 53553 | case 3622: /* *vec_extractv8hi */ |
| 53554 | case 3621: /* *vec_extractv16qi */ |
| 53555 | case 3607: /* sse2_pshufd_1_mask */ |
| 53556 | case 3606: /* sse2_pshufd_1 */ |
| 53557 | case 3605: /* avx2_pshufd_1_mask */ |
| 53558 | case 3604: /* avx2_pshufd_1 */ |
| 53559 | case 3603: /* avx512f_pshufd_1_mask */ |
| 53560 | case 3602: /* avx512f_pshufd_1 */ |
| 53561 | case 2734: /* vec_dupv2df_mask */ |
| 53562 | case 2733: /* vec_dupv2df */ |
| 53563 | case 2530: /* vec_extract_hi_v32qi */ |
| 53564 | case 2528: /* vec_extract_hi_v64qi */ |
| 53565 | case 2526: /* vec_extract_hi_v16hi */ |
| 53566 | case 2524: /* vec_extract_hi_v32hi */ |
| 53567 | case 2521: /* vec_extract_hi_v8si */ |
| 53568 | case 2519: /* vec_extract_hi_v8si_mask */ |
| 53569 | case 2517: /* vec_extract_hi_v8si_maskm */ |
| 53570 | case 2515: /* vec_extract_lo_v8si_maskm */ |
| 53571 | case 2512: /* vec_extract_lo_v8si_mask */ |
| 53572 | case 2511: /* vec_extract_lo_v8si */ |
| 53573 | case 2510: /* vec_extract_hi_v4df_mask */ |
| 53574 | case 2509: /* vec_extract_hi_v4df */ |
| 53575 | case 2508: /* vec_extract_hi_v4di_mask */ |
| 53576 | case 2507: /* vec_extract_hi_v4di */ |
| 53577 | case 2506: /* vec_extract_lo_v4df_mask */ |
| 53578 | case 2505: /* vec_extract_lo_v4df */ |
| 53579 | case 2504: /* vec_extract_lo_v4di_mask */ |
| 53580 | case 2503: /* vec_extract_lo_v4di */ |
| 53581 | case 2498: /* vec_extract_hi_v16si_mask */ |
| 53582 | case 2497: /* vec_extract_hi_v16si */ |
| 53583 | case 2496: /* vec_extract_hi_v16sf_mask */ |
| 53584 | case 2495: /* vec_extract_hi_v16sf */ |
| 53585 | case 2494: /* vec_extract_hi_v16si_maskm */ |
| 53586 | case 2493: /* vec_extract_hi_v16sf_maskm */ |
| 53587 | case 2492: /* vec_extract_hi_v8di_mask */ |
| 53588 | case 2491: /* vec_extract_hi_v8di */ |
| 53589 | case 2490: /* vec_extract_hi_v8df_mask */ |
| 53590 | case 2489: /* vec_extract_hi_v8df */ |
| 53591 | case 2488: /* vec_extract_hi_v8di_maskm */ |
| 53592 | case 2487: /* vec_extract_hi_v8df_maskm */ |
| 53593 | case 2486: /* vec_extract_lo_v8di_mask */ |
| 53594 | case 2485: /* vec_extract_lo_v8di */ |
| 53595 | case 2484: /* vec_extract_lo_v8df_mask */ |
| 53596 | case 2483: /* vec_extract_lo_v8df */ |
| 53597 | case 2482: /* vec_extract_lo_v8di_maskm */ |
| 53598 | case 2481: /* vec_extract_lo_v8df_maskm */ |
| 53599 | case 2480: /* avx512f_vextracti32x4_1_mask */ |
| 53600 | case 2479: /* *avx512f_vextracti32x4_1 */ |
| 53601 | case 2478: /* avx512f_vextractf32x4_1_mask */ |
| 53602 | case 2477: /* *avx512f_vextractf32x4_1 */ |
| 53603 | case 2476: /* avx512dq_vextracti64x2_1_mask */ |
| 53604 | case 2475: /* *avx512dq_vextracti64x2_1 */ |
| 53605 | case 2474: /* avx512dq_vextractf64x2_1_mask */ |
| 53606 | case 2473: /* *avx512dq_vextractf64x2_1 */ |
| 53607 | case 2472: /* avx512f_vextracti32x4_1_maskm */ |
| 53608 | case 2471: /* avx512f_vextractf32x4_1_maskm */ |
| 53609 | case 2470: /* avx512dq_vextracti64x2_1_maskm */ |
| 53610 | case 2469: /* avx512dq_vextractf64x2_1_maskm */ |
| 53611 | case 2458: /* avx512f_vec_dupv8df_1 */ |
| 53612 | case 2457: /* avx512f_vec_dupv16sf_1 */ |
| 53613 | case 2455: /* avx2_vec_dupv4sf */ |
| 53614 | case 1020: /* sse4_2_crc32di */ |
| 53615 | case 1019: /* sse4_2_crc32si */ |
| 53616 | case 1018: /* sse4_2_crc32hi */ |
| 53617 | case 1017: /* sse4_2_crc32qi */ |
| 53618 | case 927: /* fistsi2_ceil_with_temp */ |
| 53619 | case 926: /* fistsi2_floor_with_temp */ |
| 53620 | case 925: /* fisthi2_ceil_with_temp */ |
| 53621 | case 924: /* fisthi2_floor_with_temp */ |
| 53622 | case 923: /* fistsi2_ceil */ |
| 53623 | case 922: /* fistsi2_floor */ |
| 53624 | case 921: /* fisthi2_ceil */ |
| 53625 | case 920: /* fisthi2_floor */ |
| 53626 | case 919: /* fistdi2_ceil_with_temp */ |
| 53627 | case 918: /* fistdi2_floor_with_temp */ |
| 53628 | case 917: /* fistdi2_ceil */ |
| 53629 | case 916: /* fistdi2_floor */ |
| 53630 | case 915: /* *fistdi2_ceil_1 */ |
| 53631 | case 914: /* *fistdi2_floor_1 */ |
| 53632 | case 913: /* *fistsi2_ceil_1 */ |
| 53633 | case 912: /* *fistsi2_floor_1 */ |
| 53634 | case 911: /* *fisthi2_ceil_1 */ |
| 53635 | case 910: /* *fisthi2_floor_1 */ |
| 53636 | case 495: /* *negextenddfxf2 */ |
| 53637 | case 494: /* *absextenddfxf2 */ |
| 53638 | case 493: /* *negextendsfxf2 */ |
| 53639 | case 492: /* *absextendsfxf2 */ |
| 53640 | case 491: /* *negextendsfdf2 */ |
| 53641 | case 490: /* *absextendsfdf2 */ |
| 53642 | case 489: /* *negxf2_1 */ |
| 53643 | case 488: /* *absxf2_1 */ |
| 53644 | case 487: /* *negdf2_1 */ |
| 53645 | case 486: /* *absdf2_1 */ |
| 53646 | case 485: /* *negsf2_1 */ |
| 53647 | case 484: /* *abssf2_1 */ |
| 53648 | case 191: /* fix_truncsi_i387_with_temp */ |
| 53649 | case 190: /* fix_trunchi_i387_with_temp */ |
| 53650 | case 189: /* fix_truncsi_i387 */ |
| 53651 | case 188: /* fix_trunchi_i387 */ |
| 53652 | case 187: /* fix_truncdi_i387_with_temp */ |
| 53653 | case 186: /* fix_truncdi_i387 */ |
| 53654 | case 185: /* *fix_truncdi_i387_1 */ |
| 53655 | case 184: /* *fix_truncsi_i387_1 */ |
| 53656 | case 183: /* *fix_trunchi_i387_1 */ |
| 53657 | case 182: /* fix_truncdi_i387_fisttp_with_temp */ |
| 53658 | case 181: /* fix_truncsi_i387_fisttp_with_temp */ |
| 53659 | case 180: /* fix_trunchi_i387_fisttp_with_temp */ |
| 53660 | case 179: /* fix_truncdi_i387_fisttp */ |
| 53661 | case 178: /* fix_truncsi_i387_fisttp */ |
| 53662 | case 177: /* fix_trunchi_i387_fisttp */ |
| 53663 | case 176: /* fix_truncdi_fisttp_i387_1 */ |
| 53664 | case 175: /* fix_truncsi_fisttp_i387_1 */ |
| 53665 | case 174: /* fix_trunchi_fisttp_i387_1 */ |
| 53666 | case 130: /* *swapdf */ |
| 53667 | case 129: /* *swapsf */ |
| 53668 | case 128: /* swapxf */ |
| 53669 | return 2; |
| 53670 | |
| 53671 | case 123: /* *pushsf */ |
| 53672 | case 122: /* *pushsf_rex64 */ |
| 53673 | extract_constrain_insn_cached (insn); |
| 53674 | if (which_alternative != 0) |
| 53675 | { |
| 53676 | return 1; |
| 53677 | } |
| 53678 | else |
| 53679 | { |
| 53680 | return 0; |
| 53681 | } |
| 53682 | |
| 53683 | case 121: /* *pushdf */ |
| 53684 | extract_constrain_insn_cached (insn); |
| 53685 | if (((1 << which_alternative) & 0x1e)) |
| 53686 | { |
| 53687 | return 1; |
| 53688 | } |
| 53689 | else |
| 53690 | { |
| 53691 | return 0; |
| 53692 | } |
| 53693 | |
| 53694 | case 120: /* *pushxf */ |
| 53695 | case 119: /* *pushxf_rounded */ |
| 53696 | case 118: /* *pushxf_rounded */ |
| 53697 | case 117: /* *pushtf */ |
| 53698 | extract_constrain_insn_cached (insn); |
| 53699 | if (which_alternative != 0) |
| 53700 | { |
| 53701 | return 1; |
| 53702 | } |
| 53703 | else |
| 53704 | { |
| 53705 | return 0; |
| 53706 | } |
| 53707 | |
| 53708 | case 96: /* *swaphi */ |
| 53709 | case 95: /* *swapqi */ |
| 53710 | case 94: /* *swapdi */ |
| 53711 | case 93: /* *swapsi */ |
| 53712 | if (((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) || (cached_memory == MEMORY_STORE)) |
| 53713 | { |
| 53714 | return 4; |
| 53715 | } |
| 53716 | else |
| 53717 | { |
| 53718 | return 0; |
| 53719 | } |
| 53720 | |
| 53721 | case 4758: /* avx512vl_compressstorev2df_mask */ |
| 53722 | case 4757: /* avx512vl_compressstorev2di_mask */ |
| 53723 | case 4756: /* avx512vl_compressstorev4sf_mask */ |
| 53724 | case 4755: /* avx512vl_compressstorev4si_mask */ |
| 53725 | case 4750: /* avx512f_compressstorev8df_mask */ |
| 53726 | case 4749: /* avx512f_compressstorev8di_mask */ |
| 53727 | case 4748: /* avx512f_compressstorev16sf_mask */ |
| 53728 | case 4747: /* avx512f_compressstorev16si_mask */ |
| 53729 | case 2933: /* avx512f_us_truncatev8div16qi2_mask_store */ |
| 53730 | case 2932: /* avx512f_truncatev8div16qi2_mask_store */ |
| 53731 | case 2931: /* avx512f_ss_truncatev8div16qi2_mask_store */ |
| 53732 | case 2924: /* *avx512f_us_truncatev8div16qi2_store */ |
| 53733 | case 2923: /* *avx512f_truncatev8div16qi2_store */ |
| 53734 | case 2922: /* *avx512f_ss_truncatev8div16qi2_store */ |
| 53735 | case 2918: /* avx512vl_us_truncatev2div2si2_mask_store */ |
| 53736 | case 2917: /* avx512vl_truncatev2div2si2_mask_store */ |
| 53737 | case 2916: /* avx512vl_ss_truncatev2div2si2_mask_store */ |
| 53738 | case 2909: /* *avx512vl_us_truncatev2div2si2_store */ |
| 53739 | case 2908: /* *avx512vl_truncatev2div2si2_store */ |
| 53740 | case 2907: /* *avx512vl_ss_truncatev2div2si2_store */ |
| 53741 | case 2903: /* avx512vl_us_truncatev2div2hi2_mask_store */ |
| 53742 | case 2902: /* avx512vl_truncatev2div2hi2_mask_store */ |
| 53743 | case 2901: /* avx512vl_ss_truncatev2div2hi2_mask_store */ |
| 53744 | case 2894: /* *avx512vl_us_truncatev2div2hi2_store */ |
| 53745 | case 2893: /* *avx512vl_truncatev2div2hi2_store */ |
| 53746 | case 2892: /* *avx512vl_ss_truncatev2div2hi2_store */ |
| 53747 | case 2891: /* avx512vl_us_truncatev4div4hi2_mask_store */ |
| 53748 | case 2890: /* avx512vl_truncatev4div4hi2_mask_store */ |
| 53749 | case 2889: /* avx512vl_ss_truncatev4div4hi2_mask_store */ |
| 53750 | case 2888: /* avx512vl_us_truncatev4siv4hi2_mask_store */ |
| 53751 | case 2887: /* avx512vl_truncatev4siv4hi2_mask_store */ |
| 53752 | case 2886: /* avx512vl_ss_truncatev4siv4hi2_mask_store */ |
| 53753 | case 2873: /* *avx512vl_us_truncatev4div4hi2_store */ |
| 53754 | case 2872: /* *avx512vl_truncatev4div4hi2_store */ |
| 53755 | case 2871: /* *avx512vl_ss_truncatev4div4hi2_store */ |
| 53756 | case 2870: /* *avx512vl_us_truncatev4siv4hi2_store */ |
| 53757 | case 2869: /* *avx512vl_truncatev4siv4hi2_store */ |
| 53758 | case 2868: /* *avx512vl_ss_truncatev4siv4hi2_store */ |
| 53759 | case 2858: /* avx512vl_us_truncatev8siv8qi2_mask_store */ |
| 53760 | case 2857: /* avx512vl_truncatev8siv8qi2_mask_store */ |
| 53761 | case 2856: /* avx512vl_ss_truncatev8siv8qi2_mask_store */ |
| 53762 | case 2855: /* avx512vl_us_truncatev8hiv8qi2_mask_store */ |
| 53763 | case 2854: /* avx512vl_truncatev8hiv8qi2_mask_store */ |
| 53764 | case 2853: /* avx512vl_ss_truncatev8hiv8qi2_mask_store */ |
| 53765 | case 2840: /* *avx512vl_us_truncatev8siv8qi2_store */ |
| 53766 | case 2839: /* *avx512vl_truncatev8siv8qi2_store */ |
| 53767 | case 2838: /* *avx512vl_ss_truncatev8siv8qi2_store */ |
| 53768 | case 2837: /* *avx512vl_us_truncatev8hiv8qi2_store */ |
| 53769 | case 2836: /* *avx512vl_truncatev8hiv8qi2_store */ |
| 53770 | case 2835: /* *avx512vl_ss_truncatev8hiv8qi2_store */ |
| 53771 | case 2834: /* avx512vl_us_truncatev4div4qi2_mask_store */ |
| 53772 | case 2833: /* avx512vl_truncatev4div4qi2_mask_store */ |
| 53773 | case 2832: /* avx512vl_ss_truncatev4div4qi2_mask_store */ |
| 53774 | case 2831: /* avx512vl_us_truncatev4siv4qi2_mask_store */ |
| 53775 | case 2830: /* avx512vl_truncatev4siv4qi2_mask_store */ |
| 53776 | case 2829: /* avx512vl_ss_truncatev4siv4qi2_mask_store */ |
| 53777 | case 2816: /* *avx512vl_us_truncatev4div4qi2_store */ |
| 53778 | case 2815: /* *avx512vl_truncatev4div4qi2_store */ |
| 53779 | case 2814: /* *avx512vl_ss_truncatev4div4qi2_store */ |
| 53780 | case 2813: /* *avx512vl_us_truncatev4siv4qi2_store */ |
| 53781 | case 2812: /* *avx512vl_truncatev4siv4qi2_store */ |
| 53782 | case 2811: /* *avx512vl_ss_truncatev4siv4qi2_store */ |
| 53783 | case 2810: /* avx512vl_us_truncatev2div2qi2_mask_store */ |
| 53784 | case 2809: /* avx512vl_truncatev2div2qi2_mask_store */ |
| 53785 | case 2808: /* avx512vl_ss_truncatev2div2qi2_mask_store */ |
| 53786 | case 2801: /* *avx512vl_us_truncatev2div2qi2_store */ |
| 53787 | case 2800: /* *avx512vl_truncatev2div2qi2_store */ |
| 53788 | case 2799: /* *avx512vl_ss_truncatev2div2qi2_store */ |
| 53789 | case 1292: /* avx512vl_storev8hi_mask */ |
| 53790 | case 1290: /* avx512bw_storev32hi_mask */ |
| 53791 | case 1288: /* avx512vl_storev16qi_mask */ |
| 53792 | case 1287: /* avx512bw_storev64qi_mask */ |
| 53793 | case 1286: /* avx512vl_storev2df_mask */ |
| 53794 | case 1284: /* avx512f_storev8df_mask */ |
| 53795 | case 1283: /* avx512vl_storev4sf_mask */ |
| 53796 | case 1281: /* avx512f_storev16sf_mask */ |
| 53797 | case 1280: /* avx512vl_storev2di_mask */ |
| 53798 | case 1278: /* avx512f_storev8di_mask */ |
| 53799 | case 1277: /* avx512vl_storev4si_mask */ |
| 53800 | case 1275: /* avx512f_storev16si_mask */ |
| 53801 | case 1100: /* *bnd64_stx */ |
| 53802 | case 1099: /* *bnd32_stx */ |
| 53803 | case 1049: /* fnstenv */ |
| 53804 | case 1042: /* xsaves64 */ |
| 53805 | case 1041: /* xsavec64 */ |
| 53806 | case 1040: /* xsaveopt64 */ |
| 53807 | case 1039: /* xsave64 */ |
| 53808 | case 1038: /* xsaves_rex64 */ |
| 53809 | case 1037: /* xsavec_rex64 */ |
| 53810 | case 1036: /* xsaveopt_rex64 */ |
| 53811 | case 1035: /* xsave_rex64 */ |
| 53812 | case 1034: /* xsaves */ |
| 53813 | case 1033: /* xsavec */ |
| 53814 | case 1032: /* xsaveopt */ |
| 53815 | case 1031: /* xsave */ |
| 53816 | case 1028: /* fxsave64 */ |
| 53817 | case 1027: /* fxsave */ |
| 53818 | case 801: /* *load_tp_di */ |
| 53819 | case 800: /* *load_tp_si */ |
| 53820 | case 799: /* *load_tp_x32_zext */ |
| 53821 | case 798: /* *load_tp_x32 */ |
| 53822 | case 92: /* *movabsdi_2 */ |
| 53823 | case 91: /* *movabssi_2 */ |
| 53824 | case 90: /* *movabshi_2 */ |
| 53825 | case 89: /* *movabsqi_2 */ |
| 53826 | case 88: /* *movabsdi_1 */ |
| 53827 | case 87: /* *movabssi_1 */ |
| 53828 | case 86: /* *movabshi_1 */ |
| 53829 | case 85: /* *movabsqi_1 */ |
| 53830 | return 4; |
| 53831 | |
| 53832 | case 1000: /* probe_stack_di */ |
| 53833 | case 999: /* probe_stack_si */ |
| 53834 | case 732: /* tzcnt_hi */ |
| 53835 | case 730: /* *tzcnt_di_falsedep */ |
| 53836 | case 728: /* *tzcnt_si_falsedep */ |
| 53837 | case 726: /* tzcnt_di */ |
| 53838 | case 724: /* tzcnt_si */ |
| 53839 | case 719: /* *bsrhi */ |
| 53840 | case 718: /* bsr */ |
| 53841 | case 717: /* bsr_rex64 */ |
| 53842 | case 716: /* *ctzdi2_falsedep */ |
| 53843 | case 715: /* *ctzsi2_falsedep */ |
| 53844 | case 714: /* ctzdi2 */ |
| 53845 | case 713: /* ctzsi2 */ |
| 53846 | case 712: /* *bsfdi_1 */ |
| 53847 | case 711: /* *bsfsi_1 */ |
| 53848 | case 710: /* *tzcntdi_1_falsedep */ |
| 53849 | case 709: /* *tzcntsi_1_falsedep */ |
| 53850 | case 708: /* *tzcntdi_1 */ |
| 53851 | case 707: /* *tzcntsi_1 */ |
| 53852 | case 613: /* *btdi */ |
| 53853 | case 612: /* *btsi */ |
| 53854 | case 611: /* *btcq */ |
| 53855 | case 610: /* *btrq */ |
| 53856 | case 609: /* *btsq */ |
| 53857 | case 608: /* *rotrqi3_1_slp */ |
| 53858 | case 607: /* *rotlqi3_1_slp */ |
| 53859 | case 567: /* *ashrqi3_1_slp */ |
| 53860 | case 566: /* *lshrqi3_1_slp */ |
| 53861 | case 512: /* *one_cmplsi2_2_zext */ |
| 53862 | case 511: /* *one_cmpldi2_2 */ |
| 53863 | case 510: /* *one_cmplsi2_2 */ |
| 53864 | case 509: /* *one_cmplhi2_2 */ |
| 53865 | case 508: /* *one_cmplqi2_2 */ |
| 53866 | case 507: /* *one_cmplqi2_1 */ |
| 53867 | case 506: /* *one_cmplsi2_1_zext */ |
| 53868 | case 505: /* *one_cmpldi2_1 */ |
| 53869 | case 504: /* *one_cmplsi2_1 */ |
| 53870 | case 503: /* *one_cmplhi2_1 */ |
| 53871 | case 479: /* *negvdi3 */ |
| 53872 | case 478: /* *negvsi3 */ |
| 53873 | case 477: /* *negvhi3 */ |
| 53874 | case 476: /* *negvqi3 */ |
| 53875 | case 475: /* *negsi2_cmpz_zext */ |
| 53876 | case 474: /* *negdi2_cmpz */ |
| 53877 | case 473: /* *negsi2_cmpz */ |
| 53878 | case 472: /* *neghi2_cmpz */ |
| 53879 | case 471: /* *negqi2_cmpz */ |
| 53880 | case 470: /* *negsi2_1_zext */ |
| 53881 | case 469: /* *negdi2_1 */ |
| 53882 | case 468: /* *negsi2_1 */ |
| 53883 | case 467: /* *neghi2_1 */ |
| 53884 | case 466: /* *negqi2_1 */ |
| 53885 | case 450: /* *xorqi_2_slp */ |
| 53886 | case 449: /* *iorqi_2_slp */ |
| 53887 | case 436: /* *xorqi_1_slp */ |
| 53888 | case 435: /* *iorqi_1_slp */ |
| 53889 | case 410: /* *andqi_2_slp */ |
| 53890 | case 403: /* *andqi_1_slp */ |
| 53891 | case 276: /* *subqi_1_slp */ |
| 53892 | case 138: /* zero_extendqihi2_and */ |
| 53893 | case 135: /* zero_extendhisi2_and */ |
| 53894 | case 134: /* zero_extendqisi2_and */ |
| 53895 | case 100: /* *movstricthi_xor */ |
| 53896 | case 99: /* *movstrictqi_xor */ |
| 53897 | case 77: /* *movdi_or */ |
| 53898 | case 76: /* *movsi_or */ |
| 53899 | case 75: /* *movdi_xor */ |
| 53900 | case 74: /* *movsi_xor */ |
| 53901 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) |
| 53902 | { |
| 53903 | return 1; |
| 53904 | } |
| 53905 | else if ((cached_memory == MEMORY_BOTH) || (cached_memory == MEMORY_STORE)) |
| 53906 | { |
| 53907 | return 4; |
| 53908 | } |
| 53909 | else |
| 53910 | { |
| 53911 | return 0; |
| 53912 | } |
| 53913 | |
| 53914 | case 4899: /* vpmultishiftqbv32qi_mask */ |
| 53915 | case 4898: /* vpmultishiftqbv32qi */ |
| 53916 | case 4897: /* vpmultishiftqbv16qi_mask */ |
| 53917 | case 4896: /* vpmultishiftqbv16qi */ |
| 53918 | case 4895: /* vpmultishiftqbv64qi_mask */ |
| 53919 | case 4894: /* vpmultishiftqbv64qi */ |
| 53920 | case 4416: /* vec_set_hi_v32qi */ |
| 53921 | case 4415: /* vec_set_lo_v32qi */ |
| 53922 | case 4414: /* vec_set_hi_v16hi */ |
| 53923 | case 4413: /* vec_set_lo_v16hi */ |
| 53924 | case 4410: /* vec_set_hi_v8si_mask */ |
| 53925 | case 4409: /* vec_set_hi_v8si */ |
| 53926 | case 4406: /* vec_set_lo_v8si_mask */ |
| 53927 | case 4405: /* vec_set_lo_v8si */ |
| 53928 | case 4404: /* vec_set_hi_v4df_mask */ |
| 53929 | case 4403: /* vec_set_hi_v4df */ |
| 53930 | case 4402: /* vec_set_hi_v4di_mask */ |
| 53931 | case 4401: /* vec_set_hi_v4di */ |
| 53932 | case 4400: /* vec_set_lo_v4df_mask */ |
| 53933 | case 4399: /* vec_set_lo_v4df */ |
| 53934 | case 4398: /* vec_set_lo_v4di_mask */ |
| 53935 | case 4397: /* vec_set_lo_v4di */ |
| 53936 | case 4390: /* *avx_vperm2f128v4df_nozero */ |
| 53937 | case 4388: /* *avx_vperm2f128v8si_nozero */ |
| 53938 | case 4387: /* *avx_vperm2f128v4df_full */ |
| 53939 | case 4385: /* *avx_vperm2f128v8si_full */ |
| 53940 | case 4384: /* avx512bw_vpermt2varv32hi3_mask */ |
| 53941 | case 4383: /* avx512vl_vpermt2varv16hi3_mask */ |
| 53942 | case 4382: /* avx512vl_vpermt2varv8hi3_mask */ |
| 53943 | case 4381: /* avx512vl_vpermt2varv32qi3_mask */ |
| 53944 | case 4380: /* avx512vl_vpermt2varv16qi3_mask */ |
| 53945 | case 4379: /* avx512bw_vpermt2varv64qi3_mask */ |
| 53946 | case 4378: /* avx512vl_vpermt2varv2df3_mask */ |
| 53947 | case 4377: /* avx512vl_vpermt2varv2di3_mask */ |
| 53948 | case 4376: /* avx512vl_vpermt2varv4sf3_mask */ |
| 53949 | case 4375: /* avx512vl_vpermt2varv4si3_mask */ |
| 53950 | case 4374: /* avx512vl_vpermt2varv4df3_mask */ |
| 53951 | case 4373: /* avx512vl_vpermt2varv4di3_mask */ |
| 53952 | case 4371: /* avx512vl_vpermt2varv8si3_mask */ |
| 53953 | case 4370: /* avx512f_vpermt2varv8df3_mask */ |
| 53954 | case 4369: /* avx512f_vpermt2varv8di3_mask */ |
| 53955 | case 4368: /* avx512f_vpermt2varv16sf3_mask */ |
| 53956 | case 4367: /* avx512f_vpermt2varv16si3_mask */ |
| 53957 | case 4366: /* avx512bw_vpermt2varv32hi3_maskz_1 */ |
| 53958 | case 4365: /* avx512bw_vpermt2varv32hi3 */ |
| 53959 | case 4364: /* avx512vl_vpermt2varv16hi3_maskz_1 */ |
| 53960 | case 4363: /* avx512vl_vpermt2varv16hi3 */ |
| 53961 | case 4362: /* avx512vl_vpermt2varv8hi3_maskz_1 */ |
| 53962 | case 4361: /* avx512vl_vpermt2varv8hi3 */ |
| 53963 | case 4360: /* avx512vl_vpermt2varv32qi3_maskz_1 */ |
| 53964 | case 4359: /* avx512vl_vpermt2varv32qi3 */ |
| 53965 | case 4358: /* avx512vl_vpermt2varv16qi3_maskz_1 */ |
| 53966 | case 4357: /* avx512vl_vpermt2varv16qi3 */ |
| 53967 | case 4356: /* avx512bw_vpermt2varv64qi3_maskz_1 */ |
| 53968 | case 4355: /* avx512bw_vpermt2varv64qi3 */ |
| 53969 | case 4354: /* avx512vl_vpermt2varv2df3_maskz_1 */ |
| 53970 | case 4353: /* avx512vl_vpermt2varv2df3 */ |
| 53971 | case 4352: /* avx512vl_vpermt2varv2di3_maskz_1 */ |
| 53972 | case 4351: /* avx512vl_vpermt2varv2di3 */ |
| 53973 | case 4350: /* avx512vl_vpermt2varv4sf3_maskz_1 */ |
| 53974 | case 4349: /* avx512vl_vpermt2varv4sf3 */ |
| 53975 | case 4348: /* avx512vl_vpermt2varv4si3_maskz_1 */ |
| 53976 | case 4347: /* avx512vl_vpermt2varv4si3 */ |
| 53977 | case 4346: /* avx512vl_vpermt2varv4df3_maskz_1 */ |
| 53978 | case 4345: /* avx512vl_vpermt2varv4df3 */ |
| 53979 | case 4344: /* avx512vl_vpermt2varv4di3_maskz_1 */ |
| 53980 | case 4343: /* avx512vl_vpermt2varv4di3 */ |
| 53981 | case 4340: /* avx512vl_vpermt2varv8si3_maskz_1 */ |
| 53982 | case 4339: /* avx512vl_vpermt2varv8si3 */ |
| 53983 | case 4338: /* avx512f_vpermt2varv8df3_maskz_1 */ |
| 53984 | case 4337: /* avx512f_vpermt2varv8df3 */ |
| 53985 | case 4336: /* avx512f_vpermt2varv8di3_maskz_1 */ |
| 53986 | case 4335: /* avx512f_vpermt2varv8di3 */ |
| 53987 | case 4334: /* avx512f_vpermt2varv16sf3_maskz_1 */ |
| 53988 | case 4333: /* avx512f_vpermt2varv16sf3 */ |
| 53989 | case 4332: /* avx512f_vpermt2varv16si3_maskz_1 */ |
| 53990 | case 4331: /* avx512f_vpermt2varv16si3 */ |
| 53991 | case 4330: /* avx512bw_vpermi2varv32hi3_mask */ |
| 53992 | case 4329: /* avx512vl_vpermi2varv16hi3_mask */ |
| 53993 | case 4328: /* avx512vl_vpermi2varv8hi3_mask */ |
| 53994 | case 4327: /* avx512vl_vpermi2varv32qi3_mask */ |
| 53995 | case 4326: /* avx512vl_vpermi2varv16qi3_mask */ |
| 53996 | case 4325: /* avx512bw_vpermi2varv64qi3_mask */ |
| 53997 | case 4324: /* avx512vl_vpermi2varv2df3_mask */ |
| 53998 | case 4323: /* avx512vl_vpermi2varv2di3_mask */ |
| 53999 | case 4322: /* avx512vl_vpermi2varv4sf3_mask */ |
| 54000 | case 4321: /* avx512vl_vpermi2varv4si3_mask */ |
| 54001 | case 4320: /* avx512vl_vpermi2varv4df3_mask */ |
| 54002 | case 4319: /* avx512vl_vpermi2varv4di3_mask */ |
| 54003 | case 4317: /* avx512vl_vpermi2varv8si3_mask */ |
| 54004 | case 4316: /* avx512f_vpermi2varv8df3_mask */ |
| 54005 | case 4315: /* avx512f_vpermi2varv8di3_mask */ |
| 54006 | case 4314: /* avx512f_vpermi2varv16sf3_mask */ |
| 54007 | case 4313: /* avx512f_vpermi2varv16si3_mask */ |
| 54008 | case 4312: /* avx512bw_vpermi2varv32hi3_maskz_1 */ |
| 54009 | case 4311: /* avx512bw_vpermi2varv32hi3 */ |
| 54010 | case 4310: /* avx512vl_vpermi2varv16hi3_maskz_1 */ |
| 54011 | case 4309: /* avx512vl_vpermi2varv16hi3 */ |
| 54012 | case 4308: /* avx512vl_vpermi2varv8hi3_maskz_1 */ |
| 54013 | case 4307: /* avx512vl_vpermi2varv8hi3 */ |
| 54014 | case 4306: /* avx512vl_vpermi2varv32qi3_maskz_1 */ |
| 54015 | case 4305: /* avx512vl_vpermi2varv32qi3 */ |
| 54016 | case 4304: /* avx512vl_vpermi2varv16qi3_maskz_1 */ |
| 54017 | case 4303: /* avx512vl_vpermi2varv16qi3 */ |
| 54018 | case 4302: /* avx512bw_vpermi2varv64qi3_maskz_1 */ |
| 54019 | case 4301: /* avx512bw_vpermi2varv64qi3 */ |
| 54020 | case 4300: /* avx512vl_vpermi2varv2df3_maskz_1 */ |
| 54021 | case 4299: /* avx512vl_vpermi2varv2df3 */ |
| 54022 | case 4298: /* avx512vl_vpermi2varv2di3_maskz_1 */ |
| 54023 | case 4297: /* avx512vl_vpermi2varv2di3 */ |
| 54024 | case 4296: /* avx512vl_vpermi2varv4sf3_maskz_1 */ |
| 54025 | case 4295: /* avx512vl_vpermi2varv4sf3 */ |
| 54026 | case 4294: /* avx512vl_vpermi2varv4si3_maskz_1 */ |
| 54027 | case 4293: /* avx512vl_vpermi2varv4si3 */ |
| 54028 | case 4292: /* avx512vl_vpermi2varv4df3_maskz_1 */ |
| 54029 | case 4291: /* avx512vl_vpermi2varv4df3 */ |
| 54030 | case 4290: /* avx512vl_vpermi2varv4di3_maskz_1 */ |
| 54031 | case 4289: /* avx512vl_vpermi2varv4di3 */ |
| 54032 | case 4286: /* avx512vl_vpermi2varv8si3_maskz_1 */ |
| 54033 | case 4285: /* avx512vl_vpermi2varv8si3 */ |
| 54034 | case 4284: /* avx512f_vpermi2varv8df3_maskz_1 */ |
| 54035 | case 4283: /* avx512f_vpermi2varv8df3 */ |
| 54036 | case 4282: /* avx512f_vpermi2varv8di3_maskz_1 */ |
| 54037 | case 4281: /* avx512f_vpermi2varv8di3 */ |
| 54038 | case 4280: /* avx512f_vpermi2varv16sf3_maskz_1 */ |
| 54039 | case 4279: /* avx512f_vpermi2varv16sf3 */ |
| 54040 | case 4278: /* avx512f_vpermi2varv16si3_maskz_1 */ |
| 54041 | case 4277: /* avx512f_vpermi2varv16si3 */ |
| 54042 | case 4276: /* avx_vpermilvarv2df3_mask */ |
| 54043 | case 4275: /* avx_vpermilvarv2df3 */ |
| 54044 | case 4274: /* avx_vpermilvarv4df3_mask */ |
| 54045 | case 4273: /* avx_vpermilvarv4df3 */ |
| 54046 | case 4272: /* avx512f_vpermilvarv8df3_mask */ |
| 54047 | case 4271: /* avx512f_vpermilvarv8df3 */ |
| 54048 | case 4270: /* avx_vpermilvarv4sf3_mask */ |
| 54049 | case 4269: /* avx_vpermilvarv4sf3 */ |
| 54050 | case 4266: /* avx512f_vpermilvarv16sf3_mask */ |
| 54051 | case 4265: /* avx512f_vpermilvarv16sf3 */ |
| 54052 | case 4264: /* *avx_vpermilpv2df_mask */ |
| 54053 | case 4263: /* *avx_vpermilpv2df */ |
| 54054 | case 4262: /* *avx_vpermilpv4df_mask */ |
| 54055 | case 4261: /* *avx_vpermilpv4df */ |
| 54056 | case 4260: /* *avx512f_vpermilpv8df_mask */ |
| 54057 | case 4259: /* *avx512f_vpermilpv8df */ |
| 54058 | case 4258: /* *avx_vpermilpv4sf_mask */ |
| 54059 | case 4257: /* *avx_vpermilpv4sf */ |
| 54060 | case 4254: /* *avx512f_vpermilpv16sf_mask */ |
| 54061 | case 4253: /* *avx512f_vpermilpv16sf */ |
| 54062 | case 4109: /* avx2_permv2ti */ |
| 54063 | case 4108: /* avx512f_permv8di_1_mask */ |
| 54064 | case 4107: /* avx512f_permv8di_1 */ |
| 54065 | case 4106: /* avx512f_permv8df_1_mask */ |
| 54066 | case 4105: /* avx512f_permv8df_1 */ |
| 54067 | case 4104: /* avx2_permv4df_1_mask */ |
| 54068 | case 4103: /* avx2_permv4df_1 */ |
| 54069 | case 4102: /* avx2_permv4di_1_mask */ |
| 54070 | case 4101: /* avx2_permv4di_1 */ |
| 54071 | case 4100: /* avx512bw_permvarv32hi_mask */ |
| 54072 | case 4099: /* avx512bw_permvarv32hi */ |
| 54073 | case 4098: /* avx512vl_permvarv16hi_mask */ |
| 54074 | case 4097: /* avx512vl_permvarv16hi */ |
| 54075 | case 4096: /* avx512vl_permvarv8hi_mask */ |
| 54076 | case 4095: /* avx512vl_permvarv8hi */ |
| 54077 | case 4094: /* avx512vl_permvarv32qi_mask */ |
| 54078 | case 4093: /* avx512vl_permvarv32qi */ |
| 54079 | case 4092: /* avx512vl_permvarv16qi_mask */ |
| 54080 | case 4091: /* avx512vl_permvarv16qi */ |
| 54081 | case 4090: /* avx512bw_permvarv64qi_mask */ |
| 54082 | case 4089: /* avx512bw_permvarv64qi */ |
| 54083 | case 4088: /* avx2_permvarv4df_mask */ |
| 54084 | case 4087: /* avx2_permvarv4df */ |
| 54085 | case 4086: /* avx2_permvarv4di_mask */ |
| 54086 | case 4085: /* avx2_permvarv4di */ |
| 54087 | case 4084: /* avx512f_permvarv8df_mask */ |
| 54088 | case 4083: /* avx512f_permvarv8df */ |
| 54089 | case 4082: /* avx512f_permvarv8di_mask */ |
| 54090 | case 4081: /* avx512f_permvarv8di */ |
| 54091 | case 4080: /* avx512f_permvarv16sf_mask */ |
| 54092 | case 4079: /* avx512f_permvarv16sf */ |
| 54093 | case 4078: /* avx512f_permvarv16si_mask */ |
| 54094 | case 4077: /* avx512f_permvarv16si */ |
| 54095 | case 4074: /* avx2_permvarv8si_mask */ |
| 54096 | case 4073: /* avx2_permvarv8si */ |
| 54097 | case 4043: /* xop_pcom_tfv2di3 */ |
| 54098 | case 4042: /* xop_pcom_tfv4si3 */ |
| 54099 | case 4041: /* xop_pcom_tfv8hi3 */ |
| 54100 | case 4040: /* xop_pcom_tfv16qi3 */ |
| 54101 | case 4039: /* xop_maskcmp_uns2v2di3 */ |
| 54102 | case 4038: /* xop_maskcmp_uns2v4si3 */ |
| 54103 | case 4037: /* xop_maskcmp_uns2v8hi3 */ |
| 54104 | case 4036: /* xop_maskcmp_uns2v16qi3 */ |
| 54105 | case 4035: /* xop_maskcmp_unsv2di3 */ |
| 54106 | case 4034: /* xop_maskcmp_unsv4si3 */ |
| 54107 | case 4033: /* xop_maskcmp_unsv8hi3 */ |
| 54108 | case 4032: /* xop_maskcmp_unsv16qi3 */ |
| 54109 | case 3890: /* ptesttf2 */ |
| 54110 | case 3889: /* avx_ptestv4df */ |
| 54111 | case 3888: /* avx_ptestv8sf */ |
| 54112 | case 3887: /* avx_ptestv4di */ |
| 54113 | case 3886: /* avx_ptestv8si */ |
| 54114 | case 3885: /* avx_ptestv16hi */ |
| 54115 | case 3884: /* avx_ptestv32qi */ |
| 54116 | case 3883: /* sse4_1_ptestv2df */ |
| 54117 | case 3882: /* sse4_1_ptestv4sf */ |
| 54118 | case 3881: /* sse4_1_ptestv2di */ |
| 54119 | case 3880: /* sse4_1_ptestv4si */ |
| 54120 | case 3879: /* sse4_1_ptestv8hi */ |
| 54121 | case 3878: /* sse4_1_ptestv16qi */ |
| 54122 | case 3877: /* avx_vtestpd */ |
| 54123 | case 3876: /* avx_vtestpd256 */ |
| 54124 | case 3875: /* avx_vtestps */ |
| 54125 | case 3874: /* avx_vtestps256 */ |
| 54126 | case 3794: /* sse4_1_packusdw_mask */ |
| 54127 | case 3793: /* sse4_1_packusdw */ |
| 54128 | case 3792: /* avx2_packusdw_mask */ |
| 54129 | case 3791: /* avx2_packusdw */ |
| 54130 | case 3790: /* avx512bw_packusdw_mask */ |
| 54131 | case 3789: /* avx512bw_packusdw */ |
| 54132 | case 3619: /* sse2_pshufhw_1_mask */ |
| 54133 | case 3618: /* sse2_pshufhw_1 */ |
| 54134 | case 3617: /* avx2_pshufhw_1_mask */ |
| 54135 | case 3616: /* avx2_pshufhw_1 */ |
| 54136 | case 3615: /* avx512bw_pshufhwv32hi_mask */ |
| 54137 | case 3614: /* *avx512bw_pshufhwv32hi */ |
| 54138 | case 3613: /* sse2_pshuflw_1_mask */ |
| 54139 | case 3612: /* sse2_pshuflw_1 */ |
| 54140 | case 3611: /* avx2_pshuflw_1_mask */ |
| 54141 | case 3610: /* avx2_pshuflw_1 */ |
| 54142 | case 3609: /* avx512bw_pshuflwv32hi_mask */ |
| 54143 | case 3608: /* *avx512bw_pshuflwv32hi */ |
| 54144 | case 3601: /* avx512f_shuf_i32x4_1_mask */ |
| 54145 | case 3600: /* avx512f_shuf_i32x4_1 */ |
| 54146 | case 3599: /* avx512f_shuf_f32x4_1_mask */ |
| 54147 | case 3598: /* avx512f_shuf_f32x4_1 */ |
| 54148 | case 3595: /* avx512vl_shuf_i32x4_1_mask */ |
| 54149 | case 3594: /* avx512vl_shuf_i32x4_1 */ |
| 54150 | case 3593: /* avx512f_shuf_i64x2_1_mask */ |
| 54151 | case 3592: /* avx512f_shuf_i64x2_1 */ |
| 54152 | case 3591: /* avx512f_shuf_f64x2_1_mask */ |
| 54153 | case 3590: /* avx512f_shuf_f64x2_1 */ |
| 54154 | case 3589: /* avx512dq_shuf_f64x2_1_mask */ |
| 54155 | case 3588: /* *avx512dq_shuf_f64x2_1 */ |
| 54156 | case 3587: /* avx512dq_shuf_i64x2_1_mask */ |
| 54157 | case 3586: /* *avx512dq_shuf_i64x2_1 */ |
| 54158 | case 3585: /* vec_set_hi_v8di_mask */ |
| 54159 | case 3584: /* vec_set_hi_v8di */ |
| 54160 | case 3583: /* vec_set_hi_v8df_mask */ |
| 54161 | case 3582: /* vec_set_hi_v8df */ |
| 54162 | case 3581: /* vec_set_lo_v8di_mask */ |
| 54163 | case 3580: /* vec_set_lo_v8di */ |
| 54164 | case 3579: /* vec_set_lo_v8df_mask */ |
| 54165 | case 3578: /* vec_set_lo_v8df */ |
| 54166 | case 3577: /* vec_set_hi_v16si_mask */ |
| 54167 | case 3576: /* vec_set_hi_v16si */ |
| 54168 | case 3575: /* vec_set_hi_v16sf_mask */ |
| 54169 | case 3574: /* vec_set_hi_v16sf */ |
| 54170 | case 3573: /* vec_set_lo_v16si_mask */ |
| 54171 | case 3572: /* vec_set_lo_v16si */ |
| 54172 | case 3571: /* vec_set_lo_v16sf_mask */ |
| 54173 | case 3570: /* vec_set_lo_v16sf */ |
| 54174 | case 3569: /* avx512f_vinserti32x4_1_mask */ |
| 54175 | case 3568: /* *avx512f_vinserti32x4_1 */ |
| 54176 | case 3567: /* avx512f_vinsertf32x4_1_mask */ |
| 54177 | case 3566: /* *avx512f_vinsertf32x4_1 */ |
| 54178 | case 3565: /* avx512dq_vinserti64x2_1_mask */ |
| 54179 | case 3564: /* *avx512dq_vinserti64x2_1 */ |
| 54180 | case 3563: /* avx512dq_vinsertf64x2_1_mask */ |
| 54181 | case 3562: /* *avx512dq_vinsertf64x2_1 */ |
| 54182 | case 3561: /* sse4_1_pinsrq */ |
| 54183 | case 3560: /* sse4_1_pinsrd */ |
| 54184 | case 3559: /* sse2_pinsrw */ |
| 54185 | case 3558: /* sse4_1_pinsrb */ |
| 54186 | case 3557: /* vec_interleave_lowv4si_mask */ |
| 54187 | case 3556: /* vec_interleave_lowv4si */ |
| 54188 | case 3555: /* avx512f_interleave_lowv16si_mask */ |
| 54189 | case 3554: /* *avx512f_interleave_lowv16si */ |
| 54190 | case 3553: /* avx2_interleave_lowv8si_mask */ |
| 54191 | case 3552: /* avx2_interleave_lowv8si */ |
| 54192 | case 3551: /* vec_interleave_highv4si_mask */ |
| 54193 | case 3550: /* vec_interleave_highv4si */ |
| 54194 | case 3549: /* avx512f_interleave_highv16si_mask */ |
| 54195 | case 3548: /* *avx512f_interleave_highv16si */ |
| 54196 | case 3547: /* avx2_interleave_highv8si_mask */ |
| 54197 | case 3546: /* avx2_interleave_highv8si */ |
| 54198 | case 3545: /* vec_interleave_lowv8hi_mask */ |
| 54199 | case 3544: /* vec_interleave_lowv8hi */ |
| 54200 | case 3543: /* avx2_interleave_lowv16hi_mask */ |
| 54201 | case 3542: /* avx2_interleave_lowv16hi */ |
| 54202 | case 3541: /* avx512bw_interleave_lowv32hi_mask */ |
| 54203 | case 3540: /* *avx512bw_interleave_lowv32hi */ |
| 54204 | case 3539: /* vec_interleave_highv8hi_mask */ |
| 54205 | case 3538: /* vec_interleave_highv8hi */ |
| 54206 | case 3537: /* avx2_interleave_highv16hi_mask */ |
| 54207 | case 3536: /* avx2_interleave_highv16hi */ |
| 54208 | case 3535: /* avx512bw_interleave_highv32hi_mask */ |
| 54209 | case 3534: /* avx512bw_interleave_highv32hi */ |
| 54210 | case 3533: /* vec_interleave_lowv16qi_mask */ |
| 54211 | case 3532: /* vec_interleave_lowv16qi */ |
| 54212 | case 3531: /* avx2_interleave_lowv32qi_mask */ |
| 54213 | case 3530: /* avx2_interleave_lowv32qi */ |
| 54214 | case 3529: /* avx512bw_interleave_lowv64qi_mask */ |
| 54215 | case 3528: /* avx512bw_interleave_lowv64qi */ |
| 54216 | case 3527: /* vec_interleave_highv16qi_mask */ |
| 54217 | case 3526: /* vec_interleave_highv16qi */ |
| 54218 | case 3525: /* avx2_interleave_highv32qi_mask */ |
| 54219 | case 3524: /* avx2_interleave_highv32qi */ |
| 54220 | case 3523: /* avx512bw_interleave_highv64qi_mask */ |
| 54221 | case 3522: /* avx512bw_interleave_highv64qi */ |
| 54222 | case 3521: /* sse2_packuswb_mask */ |
| 54223 | case 3520: /* sse2_packuswb */ |
| 54224 | case 3519: /* avx2_packuswb_mask */ |
| 54225 | case 3518: /* avx2_packuswb */ |
| 54226 | case 3517: /* avx512bw_packuswb_mask */ |
| 54227 | case 3516: /* avx512bw_packuswb */ |
| 54228 | case 3515: /* sse2_packssdw_mask */ |
| 54229 | case 3514: /* sse2_packssdw */ |
| 54230 | case 3513: /* avx2_packssdw_mask */ |
| 54231 | case 3512: /* avx2_packssdw */ |
| 54232 | case 3511: /* avx512bw_packssdw_mask */ |
| 54233 | case 3510: /* avx512bw_packssdw */ |
| 54234 | case 3509: /* sse2_packsswb_mask */ |
| 54235 | case 3508: /* sse2_packsswb */ |
| 54236 | case 3507: /* avx2_packsswb_mask */ |
| 54237 | case 3506: /* avx2_packsswb */ |
| 54238 | case 3505: /* avx512bw_packsswb_mask */ |
| 54239 | case 3504: /* avx512bw_packsswb */ |
| 54240 | case 3401: /* *andnotv2di3_mask */ |
| 54241 | case 3400: /* *andnotv4di3_mask */ |
| 54242 | case 3399: /* *andnotv8di3_mask */ |
| 54243 | case 3398: /* *andnotv4si3_mask */ |
| 54244 | case 3397: /* *andnotv8si3_mask */ |
| 54245 | case 3396: /* *andnotv16si3_mask */ |
| 54246 | case 3383: /* sse2_gtv4si3 */ |
| 54247 | case 3382: /* sse2_gtv8hi3 */ |
| 54248 | case 3381: /* sse2_gtv16qi3 */ |
| 54249 | case 3380: /* avx512vl_gtv8hi3_mask */ |
| 54250 | case 3379: /* avx512vl_gtv8hi3 */ |
| 54251 | case 3378: /* avx512vl_gtv16hi3_mask */ |
| 54252 | case 3377: /* avx512vl_gtv16hi3 */ |
| 54253 | case 3376: /* avx512bw_gtv32hi3_mask */ |
| 54254 | case 3375: /* avx512bw_gtv32hi3 */ |
| 54255 | case 3374: /* avx512vl_gtv32qi3_mask */ |
| 54256 | case 3373: /* avx512vl_gtv32qi3 */ |
| 54257 | case 3372: /* avx512vl_gtv16qi3_mask */ |
| 54258 | case 3371: /* avx512vl_gtv16qi3 */ |
| 54259 | case 3370: /* avx512bw_gtv64qi3_mask */ |
| 54260 | case 3369: /* avx512bw_gtv64qi3 */ |
| 54261 | case 3368: /* avx512vl_gtv2di3_mask */ |
| 54262 | case 3367: /* avx512vl_gtv2di3 */ |
| 54263 | case 3366: /* avx512vl_gtv4di3_mask */ |
| 54264 | case 3365: /* avx512vl_gtv4di3 */ |
| 54265 | case 3364: /* avx512f_gtv8di3_mask */ |
| 54266 | case 3363: /* avx512f_gtv8di3 */ |
| 54267 | case 3362: /* avx512vl_gtv4si3_mask */ |
| 54268 | case 3361: /* avx512vl_gtv4si3 */ |
| 54269 | case 3360: /* avx512vl_gtv8si3_mask */ |
| 54270 | case 3359: /* avx512vl_gtv8si3 */ |
| 54271 | case 3358: /* avx512f_gtv16si3_mask */ |
| 54272 | case 3357: /* avx512f_gtv16si3 */ |
| 54273 | case 3356: /* avx2_gtv4di3 */ |
| 54274 | case 3355: /* avx2_gtv8si3 */ |
| 54275 | case 3354: /* avx2_gtv16hi3 */ |
| 54276 | case 3353: /* avx2_gtv32qi3 */ |
| 54277 | case 3352: /* sse4_2_gtv2di3 */ |
| 54278 | case 3351: /* *sse2_eqv4si3 */ |
| 54279 | case 3350: /* *sse2_eqv8hi3 */ |
| 54280 | case 3349: /* *sse2_eqv16qi3 */ |
| 54281 | case 3348: /* *sse4_1_eqv2di3 */ |
| 54282 | case 3347: /* avx512vl_eqv2di3_mask_1 */ |
| 54283 | case 3346: /* avx512vl_eqv2di3_1 */ |
| 54284 | case 3345: /* avx512vl_eqv4di3_mask_1 */ |
| 54285 | case 3344: /* avx512vl_eqv4di3_1 */ |
| 54286 | case 3343: /* avx512f_eqv8di3_mask_1 */ |
| 54287 | case 3342: /* avx512f_eqv8di3_1 */ |
| 54288 | case 3341: /* avx512vl_eqv4si3_mask_1 */ |
| 54289 | case 3340: /* avx512vl_eqv4si3_1 */ |
| 54290 | case 3339: /* avx512vl_eqv8si3_mask_1 */ |
| 54291 | case 3338: /* avx512vl_eqv8si3_1 */ |
| 54292 | case 3337: /* avx512f_eqv16si3_mask_1 */ |
| 54293 | case 3336: /* avx512f_eqv16si3_1 */ |
| 54294 | case 3335: /* avx512vl_eqv8hi3_mask_1 */ |
| 54295 | case 3334: /* avx512vl_eqv8hi3_1 */ |
| 54296 | case 3333: /* avx512vl_eqv16hi3_mask_1 */ |
| 54297 | case 3332: /* avx512vl_eqv16hi3_1 */ |
| 54298 | case 3331: /* avx512bw_eqv32hi3_mask_1 */ |
| 54299 | case 3330: /* avx512bw_eqv32hi3_1 */ |
| 54300 | case 3329: /* avx512vl_eqv32qi3_mask_1 */ |
| 54301 | case 3328: /* avx512vl_eqv32qi3_1 */ |
| 54302 | case 3327: /* avx512vl_eqv16qi3_mask_1 */ |
| 54303 | case 3326: /* avx512vl_eqv16qi3_1 */ |
| 54304 | case 3325: /* avx512bw_eqv64qi3_mask_1 */ |
| 54305 | case 3324: /* avx512bw_eqv64qi3_1 */ |
| 54306 | case 3323: /* *avx2_eqv4di3 */ |
| 54307 | case 3322: /* *avx2_eqv8si3 */ |
| 54308 | case 3321: /* *avx2_eqv16hi3 */ |
| 54309 | case 3320: /* *avx2_eqv32qi3 */ |
| 54310 | case 2725: /* sse2_shufpd_v2df */ |
| 54311 | case 2724: /* sse2_shufpd_v2di */ |
| 54312 | case 2723: /* vec_interleave_lowv2di_mask */ |
| 54313 | case 2722: /* vec_interleave_lowv2di */ |
| 54314 | case 2721: /* avx512f_interleave_lowv8di_mask */ |
| 54315 | case 2720: /* *avx512f_interleave_lowv8di */ |
| 54316 | case 2719: /* avx2_interleave_lowv4di_mask */ |
| 54317 | case 2718: /* avx2_interleave_lowv4di */ |
| 54318 | case 2717: /* vec_interleave_highv2di_mask */ |
| 54319 | case 2716: /* vec_interleave_highv2di */ |
| 54320 | case 2715: /* avx512f_interleave_highv8di_mask */ |
| 54321 | case 2714: /* *avx512f_interleave_highv8di */ |
| 54322 | case 2713: /* avx2_interleave_highv4di_mask */ |
| 54323 | case 2712: /* avx2_interleave_highv4di */ |
| 54324 | case 2711: /* sse2_shufpd_v2df_mask */ |
| 54325 | case 2710: /* avx_shufpd256_1_mask */ |
| 54326 | case 2709: /* avx_shufpd256_1 */ |
| 54327 | case 2708: /* avx512f_shufpd512_1_mask */ |
| 54328 | case 2707: /* avx512f_shufpd512_1 */ |
| 54329 | case 2706: /* avx512f_shufps512_1_mask */ |
| 54330 | case 2705: /* avx512f_shufps512_1 */ |
| 54331 | case 2588: /* avx512vl_vternlogv2di_mask */ |
| 54332 | case 2587: /* avx512vl_vternlogv4di_mask */ |
| 54333 | case 2586: /* avx512f_vternlogv8di_mask */ |
| 54334 | case 2585: /* avx512vl_vternlogv4si_mask */ |
| 54335 | case 2584: /* avx512vl_vternlogv8si_mask */ |
| 54336 | case 2583: /* avx512f_vternlogv16si_mask */ |
| 54337 | case 2582: /* avx512vl_vternlogv2di_maskz_1 */ |
| 54338 | case 2581: /* avx512vl_vternlogv2di */ |
| 54339 | case 2580: /* avx512vl_vternlogv4di_maskz_1 */ |
| 54340 | case 2579: /* avx512vl_vternlogv4di */ |
| 54341 | case 2578: /* avx512f_vternlogv8di_maskz_1 */ |
| 54342 | case 2577: /* avx512f_vternlogv8di */ |
| 54343 | case 2576: /* avx512vl_vternlogv4si_maskz_1 */ |
| 54344 | case 2575: /* avx512vl_vternlogv4si */ |
| 54345 | case 2574: /* avx512vl_vternlogv8si_maskz_1 */ |
| 54346 | case 2573: /* avx512vl_vternlogv8si */ |
| 54347 | case 2572: /* avx512f_vternlogv16si_maskz_1 */ |
| 54348 | case 2571: /* avx512f_vternlogv16si */ |
| 54349 | case 2541: /* avx512vl_unpcklpd128_mask */ |
| 54350 | case 2540: /* *avx_unpcklpd256_mask */ |
| 54351 | case 2539: /* *avx_unpcklpd256 */ |
| 54352 | case 2538: /* *avx512f_unpcklpd512_mask */ |
| 54353 | case 2537: /* *avx512f_unpcklpd512 */ |
| 54354 | case 2535: /* avx512vl_unpckhpd128_mask */ |
| 54355 | case 2534: /* avx_unpckhpd256_mask */ |
| 54356 | case 2533: /* avx_unpckhpd256 */ |
| 54357 | case 2532: /* avx512f_unpckhpd512_mask */ |
| 54358 | case 2531: /* *avx512f_unpckhpd512 */ |
| 54359 | case 2465: /* sse4_1_insertps */ |
| 54360 | case 2464: /* *vec_setv4sf_sse4_1 */ |
| 54361 | case 2448: /* sse_shufps_v4sf */ |
| 54362 | case 2447: /* sse_shufps_v4si */ |
| 54363 | case 2446: /* sse_shufps_v4sf_mask */ |
| 54364 | case 2431: /* vec_interleave_lowv4sf */ |
| 54365 | case 2430: /* unpcklps128_mask */ |
| 54366 | case 2427: /* avx512f_unpcklps512_mask */ |
| 54367 | case 2426: /* *avx512f_unpcklps512 */ |
| 54368 | case 2425: /* vec_interleave_highv4sf_mask */ |
| 54369 | case 2424: /* vec_interleave_highv4sf */ |
| 54370 | case 2421: /* avx512f_unpckhps512_mask */ |
| 54371 | case 2420: /* *avx512f_unpckhps512 */ |
| 54372 | case 1800: /* *xortf3 */ |
| 54373 | case 1799: /* *iortf3 */ |
| 54374 | case 1798: /* *andtf3 */ |
| 54375 | case 1797: /* *xordf3 */ |
| 54376 | case 1796: /* *iordf3 */ |
| 54377 | case 1795: /* *anddf3 */ |
| 54378 | case 1794: /* *xorsf3 */ |
| 54379 | case 1793: /* *iorsf3 */ |
| 54380 | case 1792: /* *andsf3 */ |
| 54381 | case 1791: /* *andnottf3 */ |
| 54382 | case 1790: /* *andnotdf3 */ |
| 54383 | case 1789: /* *andnotsf3 */ |
| 54384 | case 1788: /* *xorv8df3_mask */ |
| 54385 | case 1787: /* *xorv8df3 */ |
| 54386 | case 1786: /* *iorv8df3_mask */ |
| 54387 | case 1785: /* *iorv8df3 */ |
| 54388 | case 1784: /* *andv8df3_mask */ |
| 54389 | case 1783: /* *andv8df3 */ |
| 54390 | case 1782: /* *xorv16sf3_mask */ |
| 54391 | case 1781: /* *xorv16sf3 */ |
| 54392 | case 1780: /* *iorv16sf3_mask */ |
| 54393 | case 1779: /* *iorv16sf3 */ |
| 54394 | case 1778: /* *andv16sf3_mask */ |
| 54395 | case 1777: /* *andv16sf3 */ |
| 54396 | case 1776: /* *xorv2df3_mask */ |
| 54397 | case 1775: /* *xorv2df3 */ |
| 54398 | case 1774: /* *iorv2df3_mask */ |
| 54399 | case 1773: /* *iorv2df3 */ |
| 54400 | case 1772: /* *andv2df3_mask */ |
| 54401 | case 1771: /* *andv2df3 */ |
| 54402 | case 1764: /* *xorv4sf3_mask */ |
| 54403 | case 1763: /* *xorv4sf3 */ |
| 54404 | case 1762: /* *iorv4sf3_mask */ |
| 54405 | case 1761: /* *iorv4sf3 */ |
| 54406 | case 1760: /* *andv4sf3_mask */ |
| 54407 | case 1759: /* *andv4sf3 */ |
| 54408 | case 1752: /* avx512f_andnotv8df3_mask */ |
| 54409 | case 1751: /* avx512f_andnotv8df3 */ |
| 54410 | case 1750: /* avx512f_andnotv16sf3_mask */ |
| 54411 | case 1749: /* avx512f_andnotv16sf3 */ |
| 54412 | case 1748: /* sse2_andnotv2df3_mask */ |
| 54413 | case 1747: /* sse2_andnotv2df3 */ |
| 54414 | case 1744: /* sse_andnotv4sf3_mask */ |
| 54415 | case 1743: /* sse_andnotv4sf3 */ |
| 54416 | case 1740: /* sse2_ucomi_round */ |
| 54417 | case 1739: /* sse2_ucomi */ |
| 54418 | case 1738: /* sse_ucomi_round */ |
| 54419 | case 1737: /* sse_ucomi */ |
| 54420 | case 1736: /* sse2_comi_round */ |
| 54421 | case 1735: /* sse2_comi */ |
| 54422 | case 1734: /* sse_comi_round */ |
| 54423 | case 1733: /* sse_comi */ |
| 54424 | case 1732: /* avx512f_maskcmpv2df3 */ |
| 54425 | case 1731: /* avx512f_maskcmpv4df3 */ |
| 54426 | case 1730: /* avx512f_maskcmpv8df3 */ |
| 54427 | case 1729: /* avx512f_maskcmpv4sf3 */ |
| 54428 | case 1728: /* avx512f_maskcmpv8sf3 */ |
| 54429 | case 1727: /* avx512f_maskcmpv16sf3 */ |
| 54430 | case 1726: /* avx512f_vmcmpv2df3_mask_round */ |
| 54431 | case 1725: /* avx512f_vmcmpv2df3_mask */ |
| 54432 | case 1724: /* avx512f_vmcmpv4sf3_mask_round */ |
| 54433 | case 1723: /* avx512f_vmcmpv4sf3_mask */ |
| 54434 | case 1722: /* avx512f_vmcmpv2df3_round */ |
| 54435 | case 1721: /* avx512f_vmcmpv2df3 */ |
| 54436 | case 1720: /* avx512f_vmcmpv4sf3_round */ |
| 54437 | case 1719: /* avx512f_vmcmpv4sf3 */ |
| 54438 | case 1718: /* avx512vl_ucmpv2di3_mask */ |
| 54439 | case 1717: /* avx512vl_ucmpv2di3 */ |
| 54440 | case 1716: /* avx512vl_ucmpv4di3_mask */ |
| 54441 | case 1715: /* avx512vl_ucmpv4di3 */ |
| 54442 | case 1714: /* avx512f_ucmpv8di3_mask */ |
| 54443 | case 1713: /* avx512f_ucmpv8di3 */ |
| 54444 | case 1712: /* avx512vl_ucmpv4si3_mask */ |
| 54445 | case 1711: /* avx512vl_ucmpv4si3 */ |
| 54446 | case 1710: /* avx512vl_ucmpv8si3_mask */ |
| 54447 | case 1709: /* avx512vl_ucmpv8si3 */ |
| 54448 | case 1708: /* avx512f_ucmpv16si3_mask */ |
| 54449 | case 1707: /* avx512f_ucmpv16si3 */ |
| 54450 | case 1706: /* avx512vl_ucmpv8hi3_mask */ |
| 54451 | case 1705: /* avx512vl_ucmpv8hi3 */ |
| 54452 | case 1704: /* avx512vl_ucmpv16hi3_mask */ |
| 54453 | case 1703: /* avx512vl_ucmpv16hi3 */ |
| 54454 | case 1702: /* avx512bw_ucmpv32hi3_mask */ |
| 54455 | case 1701: /* avx512bw_ucmpv32hi3 */ |
| 54456 | case 1700: /* avx512vl_ucmpv32qi3_mask */ |
| 54457 | case 1699: /* avx512vl_ucmpv32qi3 */ |
| 54458 | case 1698: /* avx512vl_ucmpv16qi3_mask */ |
| 54459 | case 1697: /* avx512vl_ucmpv16qi3 */ |
| 54460 | case 1696: /* avx512bw_ucmpv64qi3_mask */ |
| 54461 | case 1695: /* avx512bw_ucmpv64qi3 */ |
| 54462 | case 1694: /* avx512vl_cmpv8hi3_mask */ |
| 54463 | case 1693: /* avx512vl_cmpv8hi3 */ |
| 54464 | case 1692: /* avx512vl_cmpv16hi3_mask */ |
| 54465 | case 1691: /* avx512vl_cmpv16hi3 */ |
| 54466 | case 1690: /* avx512bw_cmpv32hi3_mask */ |
| 54467 | case 1689: /* avx512bw_cmpv32hi3 */ |
| 54468 | case 1688: /* avx512vl_cmpv32qi3_mask */ |
| 54469 | case 1687: /* avx512vl_cmpv32qi3 */ |
| 54470 | case 1686: /* avx512vl_cmpv16qi3_mask */ |
| 54471 | case 1685: /* avx512vl_cmpv16qi3 */ |
| 54472 | case 1684: /* avx512bw_cmpv64qi3_mask */ |
| 54473 | case 1683: /* avx512bw_cmpv64qi3 */ |
| 54474 | case 1682: /* avx512vl_cmpv2df3_mask */ |
| 54475 | case 1681: /* avx512vl_cmpv2df3 */ |
| 54476 | case 1680: /* avx512vl_cmpv4df3_mask */ |
| 54477 | case 1679: /* avx512vl_cmpv4df3 */ |
| 54478 | case 1678: /* avx512f_cmpv8df3_mask_round */ |
| 54479 | case 1677: /* avx512f_cmpv8df3_round */ |
| 54480 | case 1676: /* avx512f_cmpv8df3_mask */ |
| 54481 | case 1675: /* avx512f_cmpv8df3 */ |
| 54482 | case 1674: /* avx512vl_cmpv4sf3_mask */ |
| 54483 | case 1673: /* avx512vl_cmpv4sf3 */ |
| 54484 | case 1672: /* avx512vl_cmpv8sf3_mask */ |
| 54485 | case 1671: /* avx512vl_cmpv8sf3 */ |
| 54486 | case 1670: /* avx512f_cmpv16sf3_mask_round */ |
| 54487 | case 1669: /* avx512f_cmpv16sf3_round */ |
| 54488 | case 1668: /* avx512f_cmpv16sf3_mask */ |
| 54489 | case 1667: /* avx512f_cmpv16sf3 */ |
| 54490 | case 1666: /* avx512vl_cmpv2di3_mask */ |
| 54491 | case 1665: /* avx512vl_cmpv2di3 */ |
| 54492 | case 1664: /* avx512vl_cmpv4di3_mask */ |
| 54493 | case 1663: /* avx512vl_cmpv4di3 */ |
| 54494 | case 1662: /* avx512f_cmpv8di3_mask_round */ |
| 54495 | case 1661: /* avx512f_cmpv8di3_round */ |
| 54496 | case 1660: /* avx512f_cmpv8di3_mask */ |
| 54497 | case 1659: /* avx512f_cmpv8di3 */ |
| 54498 | case 1658: /* avx512vl_cmpv4si3_mask */ |
| 54499 | case 1657: /* avx512vl_cmpv4si3 */ |
| 54500 | case 1656: /* avx512vl_cmpv8si3_mask */ |
| 54501 | case 1655: /* avx512vl_cmpv8si3 */ |
| 54502 | case 1654: /* avx512f_cmpv16si3_mask_round */ |
| 54503 | case 1653: /* avx512f_cmpv16si3_round */ |
| 54504 | case 1652: /* avx512f_cmpv16si3_mask */ |
| 54505 | case 1651: /* avx512f_cmpv16si3 */ |
| 54506 | case 1650: /* sse2_vmmaskcmpv2df3 */ |
| 54507 | case 1649: /* sse_vmmaskcmpv4sf3 */ |
| 54508 | case 1648: /* sse2_maskcmpv2df3 */ |
| 54509 | case 1647: /* avx_maskcmpv4df3 */ |
| 54510 | case 1646: /* sse_maskcmpv4sf3 */ |
| 54511 | case 1645: /* avx_maskcmpv8sf3 */ |
| 54512 | case 1644: /* *sse2_maskcmpv2df3_comm */ |
| 54513 | case 1643: /* *avx_maskcmpv4df3_comm */ |
| 54514 | case 1642: /* *sse_maskcmpv4sf3_comm */ |
| 54515 | case 1641: /* *avx_maskcmpv8sf3_comm */ |
| 54516 | case 1640: /* avx_vmcmpv2df3 */ |
| 54517 | case 1639: /* avx_vmcmpv4sf3 */ |
| 54518 | case 1638: /* avx_cmpv2df3 */ |
| 54519 | case 1637: /* avx_cmpv4df3 */ |
| 54520 | case 1636: /* avx_cmpv4sf3 */ |
| 54521 | case 1635: /* avx_cmpv8sf3 */ |
| 54522 | case 626: /* setcc_df_sse */ |
| 54523 | case 625: /* setcc_sf_sse */ |
| 54524 | case 54: /* *cmpiuxf_i387 */ |
| 54525 | case 53: /* *cmpixf_i387 */ |
| 54526 | if (get_attr_memory (insn) == MEMORY_LOAD) |
| 54527 | { |
| 54528 | return 6; |
| 54529 | } |
| 54530 | else |
| 54531 | { |
| 54532 | return 2; |
| 54533 | } |
| 54534 | |
| 54535 | case 4984: /* atomic_bit_test_and_resetdi_1 */ |
| 54536 | case 4983: /* atomic_bit_test_and_resetsi_1 */ |
| 54537 | case 4982: /* atomic_bit_test_and_resethi_1 */ |
| 54538 | case 4981: /* atomic_bit_test_and_complementdi_1 */ |
| 54539 | case 4980: /* atomic_bit_test_and_complementsi_1 */ |
| 54540 | case 4979: /* atomic_bit_test_and_complementhi_1 */ |
| 54541 | case 4978: /* atomic_bit_test_and_setdi_1 */ |
| 54542 | case 4977: /* atomic_bit_test_and_setsi_1 */ |
| 54543 | case 4976: /* atomic_bit_test_and_sethi_1 */ |
| 54544 | case 4975: /* atomic_xordi */ |
| 54545 | case 4974: /* atomic_ordi */ |
| 54546 | case 4973: /* atomic_anddi */ |
| 54547 | case 4972: /* atomic_xorsi */ |
| 54548 | case 4971: /* atomic_orsi */ |
| 54549 | case 4970: /* atomic_andsi */ |
| 54550 | case 4969: /* atomic_xorhi */ |
| 54551 | case 4968: /* atomic_orhi */ |
| 54552 | case 4967: /* atomic_andhi */ |
| 54553 | case 4966: /* atomic_xorqi */ |
| 54554 | case 4965: /* atomic_orqi */ |
| 54555 | case 4964: /* atomic_andqi */ |
| 54556 | case 4963: /* atomic_subdi */ |
| 54557 | case 4962: /* atomic_subsi */ |
| 54558 | case 4961: /* atomic_subhi */ |
| 54559 | case 4960: /* atomic_subqi */ |
| 54560 | case 4959: /* atomic_adddi */ |
| 54561 | case 4958: /* atomic_addsi */ |
| 54562 | case 4957: /* atomic_addhi */ |
| 54563 | case 4956: /* atomic_addqi */ |
| 54564 | case 4955: /* atomic_exchangedi */ |
| 54565 | case 4954: /* atomic_exchangesi */ |
| 54566 | case 4953: /* atomic_exchangehi */ |
| 54567 | case 4952: /* atomic_exchangeqi */ |
| 54568 | case 4951: /* *atomic_fetch_add_cmpdi */ |
| 54569 | case 4950: /* *atomic_fetch_add_cmpsi */ |
| 54570 | case 4949: /* *atomic_fetch_add_cmphi */ |
| 54571 | case 4948: /* *atomic_fetch_add_cmpqi */ |
| 54572 | case 4947: /* atomic_fetch_adddi */ |
| 54573 | case 4946: /* atomic_fetch_addsi */ |
| 54574 | case 4945: /* atomic_fetch_addhi */ |
| 54575 | case 4944: /* atomic_fetch_addqi */ |
| 54576 | case 4943: /* atomic_compare_and_swapdi_1 */ |
| 54577 | case 4942: /* atomic_compare_and_swapsi_1 */ |
| 54578 | case 4941: /* atomic_compare_and_swaphi_1 */ |
| 54579 | case 4940: /* atomic_compare_and_swapqi_1 */ |
| 54580 | case 4939: /* atomic_compare_and_swapti_doubleword */ |
| 54581 | case 4938: /* atomic_compare_and_swapdi_doubleword */ |
| 54582 | case 4933: /* atomic_storedi_fpu */ |
| 54583 | case 4932: /* atomic_storedi_1 */ |
| 54584 | case 4931: /* atomic_storesi_1 */ |
| 54585 | case 4930: /* atomic_storehi_1 */ |
| 54586 | case 4929: /* atomic_storeqi_1 */ |
| 54587 | case 4928: /* atomic_loaddi_fpu */ |
| 54588 | case 4927: /* mfence_nosse */ |
| 54589 | case 4923: /* vpopcountv8di_mask */ |
| 54590 | case 4922: /* vpopcountv8di */ |
| 54591 | case 4921: /* vpopcountv16si_mask */ |
| 54592 | case 4920: /* vpopcountv16si */ |
| 54593 | case 4901: /* *movv64si_internal */ |
| 54594 | case 4900: /* *movv64sf_internal */ |
| 54595 | case 4875: /* avx512f_pd512_256pd */ |
| 54596 | case 4874: /* avx512f_ps512_256ps */ |
| 54597 | case 4873: /* avx512f_si512_256si */ |
| 54598 | case 4872: /* avx512f_pd512_pd */ |
| 54599 | case 4871: /* avx512f_ps512_ps */ |
| 54600 | case 4870: /* avx512f_si512_si */ |
| 54601 | case 4832: /* avx512f_vgetmantv2df_round */ |
| 54602 | case 4831: /* avx512f_vgetmantv2df */ |
| 54603 | case 4830: /* avx512f_vgetmantv4sf_round */ |
| 54604 | case 4829: /* avx512f_vgetmantv4sf */ |
| 54605 | case 4828: /* avx512vl_getmantv2df_mask_round */ |
| 54606 | case 4827: /* avx512vl_getmantv2df_mask */ |
| 54607 | case 4826: /* avx512vl_getmantv2df_round */ |
| 54608 | case 4825: /* avx512vl_getmantv2df */ |
| 54609 | case 4824: /* avx512vl_getmantv4df_mask_round */ |
| 54610 | case 4823: /* avx512vl_getmantv4df_mask */ |
| 54611 | case 4822: /* avx512vl_getmantv4df_round */ |
| 54612 | case 4821: /* avx512vl_getmantv4df */ |
| 54613 | case 4820: /* avx512f_getmantv8df_mask_round */ |
| 54614 | case 4819: /* avx512f_getmantv8df_mask */ |
| 54615 | case 4818: /* avx512f_getmantv8df_round */ |
| 54616 | case 4817: /* avx512f_getmantv8df */ |
| 54617 | case 4816: /* avx512vl_getmantv4sf_mask_round */ |
| 54618 | case 4815: /* avx512vl_getmantv4sf_mask */ |
| 54619 | case 4814: /* avx512vl_getmantv4sf_round */ |
| 54620 | case 4813: /* avx512vl_getmantv4sf */ |
| 54621 | case 4812: /* avx512vl_getmantv8sf_mask_round */ |
| 54622 | case 4811: /* avx512vl_getmantv8sf_mask */ |
| 54623 | case 4810: /* avx512vl_getmantv8sf_round */ |
| 54624 | case 4809: /* avx512vl_getmantv8sf */ |
| 54625 | case 4808: /* avx512f_getmantv16sf_mask_round */ |
| 54626 | case 4807: /* avx512f_getmantv16sf_mask */ |
| 54627 | case 4806: /* avx512f_getmantv16sf_round */ |
| 54628 | case 4805: /* avx512f_getmantv16sf */ |
| 54629 | case 4435: /* avx_pd256_pd */ |
| 54630 | case 4434: /* avx_ps256_ps */ |
| 54631 | case 4433: /* avx_si256_si */ |
| 54632 | case 4252: /* *avx_vperm_broadcast_v4df */ |
| 54633 | case 4251: /* *avx_vperm_broadcast_v8sf */ |
| 54634 | case 3677: /* sse3_monitor_di */ |
| 54635 | case 3676: /* sse3_monitor_si */ |
| 54636 | case 3675: /* sse3_mwait */ |
| 54637 | case 3637: /* *vec_extractv4si_zext_mem */ |
| 54638 | case 3636: /* *vec_extractv4si_mem */ |
| 54639 | case 3633: /* *vec_extractv4si_0_zext */ |
| 54640 | case 3632: /* *vec_extractv4si_0_zext_sse4 */ |
| 54641 | case 3631: /* *vec_extractv2di_0_sse */ |
| 54642 | case 3630: /* *vec_extractv2di_0 */ |
| 54643 | case 3629: /* *vec_extractv4si_0 */ |
| 54644 | case 3628: /* *vec_extractv8hi_mem */ |
| 54645 | case 3627: /* *vec_extractv16qi_mem */ |
| 54646 | case 3503: /* avx512vl_testnmv2di3_mask */ |
| 54647 | case 3502: /* avx512vl_testnmv2di3 */ |
| 54648 | case 3501: /* avx512vl_testnmv4di3_mask */ |
| 54649 | case 3500: /* avx512vl_testnmv4di3 */ |
| 54650 | case 3499: /* avx512f_testnmv8di3_mask */ |
| 54651 | case 3498: /* avx512f_testnmv8di3 */ |
| 54652 | case 3497: /* avx512vl_testnmv4si3_mask */ |
| 54653 | case 3496: /* avx512vl_testnmv4si3 */ |
| 54654 | case 3495: /* avx512vl_testnmv8si3_mask */ |
| 54655 | case 3494: /* avx512vl_testnmv8si3 */ |
| 54656 | case 3493: /* avx512f_testnmv16si3_mask */ |
| 54657 | case 3492: /* avx512f_testnmv16si3 */ |
| 54658 | case 3491: /* avx512vl_testnmv8hi3_mask */ |
| 54659 | case 3490: /* avx512vl_testnmv8hi3 */ |
| 54660 | case 3489: /* avx512vl_testnmv16hi3_mask */ |
| 54661 | case 3488: /* avx512vl_testnmv16hi3 */ |
| 54662 | case 3487: /* avx512bw_testnmv32hi3_mask */ |
| 54663 | case 3486: /* avx512bw_testnmv32hi3 */ |
| 54664 | case 3485: /* avx512vl_testnmv32qi3_mask */ |
| 54665 | case 3484: /* avx512vl_testnmv32qi3 */ |
| 54666 | case 3483: /* avx512vl_testnmv16qi3_mask */ |
| 54667 | case 3482: /* avx512vl_testnmv16qi3 */ |
| 54668 | case 3481: /* avx512bw_testnmv64qi3_mask */ |
| 54669 | case 3480: /* avx512bw_testnmv64qi3 */ |
| 54670 | case 3479: /* avx512vl_testmv2di3_mask */ |
| 54671 | case 3478: /* avx512vl_testmv2di3 */ |
| 54672 | case 3477: /* avx512vl_testmv4di3_mask */ |
| 54673 | case 3476: /* avx512vl_testmv4di3 */ |
| 54674 | case 3475: /* avx512f_testmv8di3_mask */ |
| 54675 | case 3474: /* avx512f_testmv8di3 */ |
| 54676 | case 3473: /* avx512vl_testmv4si3_mask */ |
| 54677 | case 3472: /* avx512vl_testmv4si3 */ |
| 54678 | case 3471: /* avx512vl_testmv8si3_mask */ |
| 54679 | case 3470: /* avx512vl_testmv8si3 */ |
| 54680 | case 3469: /* avx512f_testmv16si3_mask */ |
| 54681 | case 3468: /* avx512f_testmv16si3 */ |
| 54682 | case 3467: /* avx512vl_testmv8hi3_mask */ |
| 54683 | case 3466: /* avx512vl_testmv8hi3 */ |
| 54684 | case 3465: /* avx512vl_testmv16hi3_mask */ |
| 54685 | case 3464: /* avx512vl_testmv16hi3 */ |
| 54686 | case 3463: /* avx512bw_testmv32hi3_mask */ |
| 54687 | case 3462: /* avx512bw_testmv32hi3 */ |
| 54688 | case 3461: /* avx512vl_testmv32qi3_mask */ |
| 54689 | case 3460: /* avx512vl_testmv32qi3 */ |
| 54690 | case 3459: /* avx512vl_testmv16qi3_mask */ |
| 54691 | case 3458: /* avx512vl_testmv16qi3 */ |
| 54692 | case 3457: /* avx512bw_testmv64qi3_mask */ |
| 54693 | case 3456: /* avx512bw_testmv64qi3 */ |
| 54694 | case 3191: /* avx512vl_rorv2di_mask */ |
| 54695 | case 3190: /* avx512vl_rorv2di */ |
| 54696 | case 3189: /* avx512vl_rolv2di_mask */ |
| 54697 | case 3188: /* avx512vl_rolv2di */ |
| 54698 | case 3187: /* avx512vl_rorv4di_mask */ |
| 54699 | case 3186: /* avx512vl_rorv4di */ |
| 54700 | case 3185: /* avx512vl_rolv4di_mask */ |
| 54701 | case 3184: /* avx512vl_rolv4di */ |
| 54702 | case 3183: /* avx512f_rorv8di_mask */ |
| 54703 | case 3182: /* avx512f_rorv8di */ |
| 54704 | case 3181: /* avx512f_rolv8di_mask */ |
| 54705 | case 3180: /* avx512f_rolv8di */ |
| 54706 | case 3179: /* avx512vl_rorv4si_mask */ |
| 54707 | case 3178: /* avx512vl_rorv4si */ |
| 54708 | case 3177: /* avx512vl_rolv4si_mask */ |
| 54709 | case 3176: /* avx512vl_rolv4si */ |
| 54710 | case 3175: /* avx512vl_rorv8si_mask */ |
| 54711 | case 3174: /* avx512vl_rorv8si */ |
| 54712 | case 3173: /* avx512vl_rolv8si_mask */ |
| 54713 | case 3172: /* avx512vl_rolv8si */ |
| 54714 | case 3171: /* avx512f_rorv16si_mask */ |
| 54715 | case 3170: /* avx512f_rorv16si */ |
| 54716 | case 3169: /* avx512f_rolv16si_mask */ |
| 54717 | case 3168: /* avx512f_rolv16si */ |
| 54718 | case 3167: /* avx512vl_rorvv2di_mask */ |
| 54719 | case 3166: /* avx512vl_rorvv2di */ |
| 54720 | case 3165: /* avx512vl_rolvv2di_mask */ |
| 54721 | case 3164: /* avx512vl_rolvv2di */ |
| 54722 | case 3163: /* avx512vl_rorvv4di_mask */ |
| 54723 | case 3162: /* avx512vl_rorvv4di */ |
| 54724 | case 3161: /* avx512vl_rolvv4di_mask */ |
| 54725 | case 3160: /* avx512vl_rolvv4di */ |
| 54726 | case 3159: /* avx512f_rorvv8di_mask */ |
| 54727 | case 3158: /* avx512f_rorvv8di */ |
| 54728 | case 3157: /* avx512f_rolvv8di_mask */ |
| 54729 | case 3156: /* avx512f_rolvv8di */ |
| 54730 | case 3155: /* avx512vl_rorvv4si_mask */ |
| 54731 | case 3154: /* avx512vl_rorvv4si */ |
| 54732 | case 3153: /* avx512vl_rolvv4si_mask */ |
| 54733 | case 3152: /* avx512vl_rolvv4si */ |
| 54734 | case 3151: /* avx512vl_rorvv8si_mask */ |
| 54735 | case 3150: /* avx512vl_rorvv8si */ |
| 54736 | case 3149: /* avx512vl_rolvv8si_mask */ |
| 54737 | case 3148: /* avx512vl_rolvv8si */ |
| 54738 | case 3147: /* avx512f_rorvv16si_mask */ |
| 54739 | case 3146: /* avx512f_rorvv16si */ |
| 54740 | case 3145: /* avx512f_rolvv16si_mask */ |
| 54741 | case 3144: /* avx512f_rolvv16si */ |
| 54742 | case 2704: /* avx512f_rndscalev2df_round */ |
| 54743 | case 2703: /* avx512f_rndscalev2df */ |
| 54744 | case 2702: /* avx512f_rndscalev4sf_round */ |
| 54745 | case 2701: /* avx512f_rndscalev4sf */ |
| 54746 | case 2700: /* avx512vl_rndscalev2df_mask_round */ |
| 54747 | case 2699: /* avx512vl_rndscalev2df_mask */ |
| 54748 | case 2698: /* avx512vl_rndscalev2df_round */ |
| 54749 | case 2697: /* avx512vl_rndscalev2df */ |
| 54750 | case 2696: /* avx512vl_rndscalev4df_mask_round */ |
| 54751 | case 2695: /* avx512vl_rndscalev4df_mask */ |
| 54752 | case 2694: /* avx512vl_rndscalev4df_round */ |
| 54753 | case 2693: /* avx512vl_rndscalev4df */ |
| 54754 | case 2692: /* avx512f_rndscalev8df_mask_round */ |
| 54755 | case 2691: /* avx512f_rndscalev8df_mask */ |
| 54756 | case 2690: /* avx512f_rndscalev8df_round */ |
| 54757 | case 2689: /* avx512f_rndscalev8df */ |
| 54758 | case 2688: /* avx512vl_rndscalev4sf_mask_round */ |
| 54759 | case 2687: /* avx512vl_rndscalev4sf_mask */ |
| 54760 | case 2686: /* avx512vl_rndscalev4sf_round */ |
| 54761 | case 2685: /* avx512vl_rndscalev4sf */ |
| 54762 | case 2684: /* avx512vl_rndscalev8sf_mask_round */ |
| 54763 | case 2683: /* avx512vl_rndscalev8sf_mask */ |
| 54764 | case 2682: /* avx512vl_rndscalev8sf_round */ |
| 54765 | case 2681: /* avx512vl_rndscalev8sf */ |
| 54766 | case 2680: /* avx512f_rndscalev16sf_mask_round */ |
| 54767 | case 2679: /* avx512f_rndscalev16sf_mask */ |
| 54768 | case 2678: /* avx512f_rndscalev16sf_round */ |
| 54769 | case 2677: /* avx512f_rndscalev16sf */ |
| 54770 | case 2676: /* avx512f_sfixupimmv2df_mask_round */ |
| 54771 | case 2675: /* avx512f_sfixupimmv2df_mask */ |
| 54772 | case 2674: /* avx512f_sfixupimmv4sf_mask_round */ |
| 54773 | case 2673: /* avx512f_sfixupimmv4sf_mask */ |
| 54774 | case 2672: /* avx512f_sfixupimmv2df_maskz_1_round */ |
| 54775 | case 2671: /* avx512f_sfixupimmv2df_maskz_1 */ |
| 54776 | case 2670: /* avx512f_sfixupimmv2df_round */ |
| 54777 | case 2669: /* avx512f_sfixupimmv2df */ |
| 54778 | case 2668: /* avx512f_sfixupimmv4sf_maskz_1_round */ |
| 54779 | case 2667: /* avx512f_sfixupimmv4sf_maskz_1 */ |
| 54780 | case 2666: /* avx512f_sfixupimmv4sf_round */ |
| 54781 | case 2665: /* avx512f_sfixupimmv4sf */ |
| 54782 | case 2664: /* avx512vl_fixupimmv2df_mask_round */ |
| 54783 | case 2663: /* avx512vl_fixupimmv2df_mask */ |
| 54784 | case 2662: /* avx512vl_fixupimmv4df_mask_round */ |
| 54785 | case 2661: /* avx512vl_fixupimmv4df_mask */ |
| 54786 | case 2660: /* avx512f_fixupimmv8df_mask_round */ |
| 54787 | case 2659: /* avx512f_fixupimmv8df_mask */ |
| 54788 | case 2658: /* avx512vl_fixupimmv4sf_mask_round */ |
| 54789 | case 2657: /* avx512vl_fixupimmv4sf_mask */ |
| 54790 | case 2656: /* avx512vl_fixupimmv8sf_mask_round */ |
| 54791 | case 2655: /* avx512vl_fixupimmv8sf_mask */ |
| 54792 | case 2654: /* avx512f_fixupimmv16sf_mask_round */ |
| 54793 | case 2653: /* avx512f_fixupimmv16sf_mask */ |
| 54794 | case 2652: /* avx512vl_fixupimmv2df_maskz_1_round */ |
| 54795 | case 2651: /* avx512vl_fixupimmv2df_maskz_1 */ |
| 54796 | case 2650: /* avx512vl_fixupimmv2df_round */ |
| 54797 | case 2649: /* avx512vl_fixupimmv2df */ |
| 54798 | case 2648: /* avx512vl_fixupimmv4df_maskz_1_round */ |
| 54799 | case 2647: /* avx512vl_fixupimmv4df_maskz_1 */ |
| 54800 | case 2646: /* avx512vl_fixupimmv4df_round */ |
| 54801 | case 2645: /* avx512vl_fixupimmv4df */ |
| 54802 | case 2644: /* avx512f_fixupimmv8df_maskz_1_round */ |
| 54803 | case 2643: /* avx512f_fixupimmv8df_maskz_1 */ |
| 54804 | case 2642: /* avx512f_fixupimmv8df_round */ |
| 54805 | case 2641: /* avx512f_fixupimmv8df */ |
| 54806 | case 2640: /* avx512vl_fixupimmv4sf_maskz_1_round */ |
| 54807 | case 2639: /* avx512vl_fixupimmv4sf_maskz_1 */ |
| 54808 | case 2638: /* avx512vl_fixupimmv4sf_round */ |
| 54809 | case 2637: /* avx512vl_fixupimmv4sf */ |
| 54810 | case 2636: /* avx512vl_fixupimmv8sf_maskz_1_round */ |
| 54811 | case 2635: /* avx512vl_fixupimmv8sf_maskz_1 */ |
| 54812 | case 2634: /* avx512vl_fixupimmv8sf_round */ |
| 54813 | case 2633: /* avx512vl_fixupimmv8sf */ |
| 54814 | case 2632: /* avx512f_fixupimmv16sf_maskz_1_round */ |
| 54815 | case 2631: /* avx512f_fixupimmv16sf_maskz_1 */ |
| 54816 | case 2630: /* avx512f_fixupimmv16sf_round */ |
| 54817 | case 2629: /* avx512f_fixupimmv16sf */ |
| 54818 | case 2628: /* avx512vl_alignv2di_mask */ |
| 54819 | case 2627: /* *avx512vl_alignv2di */ |
| 54820 | case 2626: /* avx512vl_alignv4di_mask */ |
| 54821 | case 2625: /* *avx512vl_alignv4di */ |
| 54822 | case 2624: /* avx512f_alignv8di_mask */ |
| 54823 | case 2623: /* *avx512f_alignv8di */ |
| 54824 | case 2622: /* avx512vl_alignv4si_mask */ |
| 54825 | case 2621: /* *avx512vl_alignv4si */ |
| 54826 | case 2620: /* avx512vl_alignv8si_mask */ |
| 54827 | case 2619: /* *avx512vl_alignv8si */ |
| 54828 | case 2618: /* avx512f_alignv16si_mask */ |
| 54829 | case 2617: /* *avx512f_alignv16si */ |
| 54830 | case 2616: /* avx512f_sgetexpv2df_round */ |
| 54831 | case 2615: /* avx512f_sgetexpv2df */ |
| 54832 | case 2614: /* avx512f_sgetexpv4sf_round */ |
| 54833 | case 2613: /* avx512f_sgetexpv4sf */ |
| 54834 | case 2612: /* avx512vl_getexpv2df_mask_round */ |
| 54835 | case 2611: /* avx512vl_getexpv2df_mask */ |
| 54836 | case 2610: /* avx512vl_getexpv2df_round */ |
| 54837 | case 2609: /* avx512vl_getexpv2df */ |
| 54838 | case 2608: /* avx512vl_getexpv4df_mask_round */ |
| 54839 | case 2607: /* avx512vl_getexpv4df_mask */ |
| 54840 | case 2606: /* avx512vl_getexpv4df_round */ |
| 54841 | case 2605: /* avx512vl_getexpv4df */ |
| 54842 | case 2604: /* avx512f_getexpv8df_mask_round */ |
| 54843 | case 2603: /* avx512f_getexpv8df_mask */ |
| 54844 | case 2602: /* avx512f_getexpv8df_round */ |
| 54845 | case 2601: /* avx512f_getexpv8df */ |
| 54846 | case 2600: /* avx512vl_getexpv4sf_mask_round */ |
| 54847 | case 2599: /* avx512vl_getexpv4sf_mask */ |
| 54848 | case 2598: /* avx512vl_getexpv4sf_round */ |
| 54849 | case 2597: /* avx512vl_getexpv4sf */ |
| 54850 | case 2596: /* avx512vl_getexpv8sf_mask_round */ |
| 54851 | case 2595: /* avx512vl_getexpv8sf_mask */ |
| 54852 | case 2594: /* avx512vl_getexpv8sf_round */ |
| 54853 | case 2593: /* avx512vl_getexpv8sf */ |
| 54854 | case 2592: /* avx512f_getexpv16sf_mask_round */ |
| 54855 | case 2591: /* avx512f_getexpv16sf_mask */ |
| 54856 | case 2590: /* avx512f_getexpv16sf_round */ |
| 54857 | case 2589: /* avx512f_getexpv16sf */ |
| 54858 | case 2570: /* avx512vl_scalefv2df_mask_round */ |
| 54859 | case 2569: /* avx512vl_scalefv2df_mask */ |
| 54860 | case 2568: /* avx512vl_scalefv2df_round */ |
| 54861 | case 2567: /* avx512vl_scalefv2df */ |
| 54862 | case 2566: /* avx512vl_scalefv4df_mask_round */ |
| 54863 | case 2565: /* avx512vl_scalefv4df_mask */ |
| 54864 | case 2564: /* avx512vl_scalefv4df_round */ |
| 54865 | case 2563: /* avx512vl_scalefv4df */ |
| 54866 | case 2562: /* avx512f_scalefv8df_mask_round */ |
| 54867 | case 2561: /* avx512f_scalefv8df_mask */ |
| 54868 | case 2560: /* avx512f_scalefv8df_round */ |
| 54869 | case 2559: /* avx512f_scalefv8df */ |
| 54870 | case 2558: /* avx512vl_scalefv4sf_mask_round */ |
| 54871 | case 2557: /* avx512vl_scalefv4sf_mask */ |
| 54872 | case 2556: /* avx512vl_scalefv4sf_round */ |
| 54873 | case 2555: /* avx512vl_scalefv4sf */ |
| 54874 | case 2554: /* avx512vl_scalefv8sf_mask_round */ |
| 54875 | case 2553: /* avx512vl_scalefv8sf_mask */ |
| 54876 | case 2552: /* avx512vl_scalefv8sf_round */ |
| 54877 | case 2551: /* avx512vl_scalefv8sf */ |
| 54878 | case 2550: /* avx512f_scalefv16sf_mask_round */ |
| 54879 | case 2549: /* avx512f_scalefv16sf_mask */ |
| 54880 | case 2548: /* avx512f_scalefv16sf_round */ |
| 54881 | case 2547: /* avx512f_scalefv16sf */ |
| 54882 | case 2546: /* avx512f_vmscalefv2df_round */ |
| 54883 | case 2545: /* avx512f_vmscalefv2df */ |
| 54884 | case 2544: /* avx512f_vmscalefv4sf_round */ |
| 54885 | case 2543: /* avx512f_vmscalefv4sf */ |
| 54886 | case 2529: /* vec_extract_lo_v32qi */ |
| 54887 | case 2527: /* vec_extract_lo_v64qi */ |
| 54888 | case 2525: /* vec_extract_lo_v16hi */ |
| 54889 | case 2523: /* vec_extract_lo_v32hi */ |
| 54890 | case 2502: /* vec_extract_lo_v16si_mask */ |
| 54891 | case 2501: /* vec_extract_lo_v16si */ |
| 54892 | case 2500: /* vec_extract_lo_v16sf_mask */ |
| 54893 | case 2499: /* vec_extract_lo_v16sf */ |
| 54894 | case 2468: /* *vec_extractv4sf_mem */ |
| 54895 | case 2466: /* *vec_extractv4sf_0 */ |
| 54896 | case 2415: /* *avx512vl_cvtmask2qv2di */ |
| 54897 | case 2414: /* *avx512vl_cvtmask2qv4di */ |
| 54898 | case 2413: /* *avx512f_cvtmask2qv8di */ |
| 54899 | case 2412: /* *avx512vl_cvtmask2dv4si */ |
| 54900 | case 2411: /* *avx512vl_cvtmask2dv8si */ |
| 54901 | case 2410: /* *avx512f_cvtmask2dv16si */ |
| 54902 | case 2409: /* *avx512vl_cvtmask2wv8hi */ |
| 54903 | case 2408: /* *avx512vl_cvtmask2wv16hi */ |
| 54904 | case 2407: /* *avx512bw_cvtmask2wv32hi */ |
| 54905 | case 2406: /* *avx512vl_cvtmask2bv32qi */ |
| 54906 | case 2405: /* *avx512vl_cvtmask2bv16qi */ |
| 54907 | case 2404: /* *avx512bw_cvtmask2bv64qi */ |
| 54908 | case 2403: /* avx512vl_cvtq2maskv2di */ |
| 54909 | case 2402: /* avx512vl_cvtq2maskv4di */ |
| 54910 | case 2401: /* avx512f_cvtq2maskv8di */ |
| 54911 | case 2400: /* avx512vl_cvtd2maskv4si */ |
| 54912 | case 2399: /* avx512vl_cvtd2maskv8si */ |
| 54913 | case 2398: /* avx512f_cvtd2maskv16si */ |
| 54914 | case 2397: /* avx512vl_cvtw2maskv8hi */ |
| 54915 | case 2396: /* avx512vl_cvtw2maskv16hi */ |
| 54916 | case 2395: /* avx512bw_cvtw2maskv32hi */ |
| 54917 | case 2394: /* avx512vl_cvtb2maskv32qi */ |
| 54918 | case 2393: /* avx512vl_cvtb2maskv16qi */ |
| 54919 | case 2392: /* avx512bw_cvtb2maskv64qi */ |
| 54920 | case 1360: /* *absnegv2df2 */ |
| 54921 | case 1359: /* *absnegv4df2 */ |
| 54922 | case 1358: /* *absnegv8df2 */ |
| 54923 | case 1357: /* *absnegv4sf2 */ |
| 54924 | case 1356: /* *absnegv8sf2 */ |
| 54925 | case 1355: /* *absnegv16sf2 */ |
| 54926 | case 1354: /* kunpckdi */ |
| 54927 | case 1353: /* kunpcksi */ |
| 54928 | case 1294: /* movdi_to_sse */ |
| 54929 | case 1209: /* *vec_extractv2si_zext_mem */ |
| 54930 | case 1207: /* *vec_extractv2si_0 */ |
| 54931 | case 1137: /* *vec_extractv2sf_0 */ |
| 54932 | case 1105: /* rdpid */ |
| 54933 | case 1104: /* *wrpkru */ |
| 54934 | case 1103: /* *rdpkru */ |
| 54935 | case 1096: /* *bnd64_cn */ |
| 54936 | case 1095: /* *bnd64_cu */ |
| 54937 | case 1094: /* *bnd64_cl */ |
| 54938 | case 1093: /* *bnd32_cn */ |
| 54939 | case 1092: /* *bnd32_cu */ |
| 54940 | case 1091: /* *bnd32_cl */ |
| 54941 | case 1088: /* *bnd64_mk */ |
| 54942 | case 1087: /* *bnd32_mk */ |
| 54943 | case 1086: /* clzero_di */ |
| 54944 | case 1085: /* clzero_si */ |
| 54945 | case 1084: /* monitorx_di */ |
| 54946 | case 1083: /* monitorx_si */ |
| 54947 | case 1082: /* mwaitx */ |
| 54948 | case 1079: /* xtest_1 */ |
| 54949 | case 1078: /* xabort */ |
| 54950 | case 1077: /* xend */ |
| 54951 | case 1076: /* xbegin_1 */ |
| 54952 | case 1075: /* *pause */ |
| 54953 | case 1074: /* rdseeddi_1 */ |
| 54954 | case 1073: /* rdseedsi_1 */ |
| 54955 | case 1072: /* rdseedhi_1 */ |
| 54956 | case 1071: /* rdranddi_1 */ |
| 54957 | case 1070: /* rdrandsi_1 */ |
| 54958 | case 1069: /* rdrandhi_1 */ |
| 54959 | case 1068: /* wrgsbasedi */ |
| 54960 | case 1067: /* wrfsbasedi */ |
| 54961 | case 1066: /* wrgsbasesi */ |
| 54962 | case 1065: /* wrfsbasesi */ |
| 54963 | case 1064: /* rdgsbasedi */ |
| 54964 | case 1063: /* rdfsbasedi */ |
| 54965 | case 1062: /* rdgsbasesi */ |
| 54966 | case 1061: /* rdfsbasesi */ |
| 54967 | case 1060: /* *lwp_lwpinsdi3_1 */ |
| 54968 | case 1059: /* *lwp_lwpinssi3_1 */ |
| 54969 | case 1058: /* *lwp_lwpvaldi3_1 */ |
| 54970 | case 1057: /* *lwp_lwpvalsi3_1 */ |
| 54971 | case 1056: /* lwp_slwpcbdi */ |
| 54972 | case 1055: /* lwp_slwpcbsi */ |
| 54973 | case 1054: /* *lwp_llwpcbdi1 */ |
| 54974 | case 1053: /* *lwp_llwpcbsi1 */ |
| 54975 | case 1052: /* fnclex */ |
| 54976 | case 1026: /* rdtscp_rex64 */ |
| 54977 | case 1025: /* rdtscp */ |
| 54978 | case 1024: /* rdtsc_rex64 */ |
| 54979 | case 1023: /* rdtsc */ |
| 54980 | case 1022: /* rdpmc_rex64 */ |
| 54981 | case 1021: /* rdpmc */ |
| 54982 | case 1016: /* stack_tls_protect_test_di */ |
| 54983 | case 1015: /* stack_tls_protect_test_si */ |
| 54984 | case 1014: /* stack_protect_test_di */ |
| 54985 | case 1013: /* stack_protect_test_si */ |
| 54986 | case 1012: /* stack_tls_protect_set_di */ |
| 54987 | case 1011: /* stack_tls_protect_set_si */ |
| 54988 | case 1010: /* stack_protect_set_di */ |
| 54989 | case 1009: /* stack_protect_set_si */ |
| 54990 | case 1005: /* trap */ |
| 54991 | case 1004: /* probe_stack_rangedi */ |
| 54992 | case 1003: /* probe_stack_rangesi */ |
| 54993 | case 1002: /* adjust_stack_and_probedi */ |
| 54994 | case 1001: /* adjust_stack_and_probesi */ |
| 54995 | case 998: /* allocate_stack_worker_probe_di */ |
| 54996 | case 997: /* allocate_stack_worker_probe_si */ |
| 54997 | case 974: /* *x86_movdicc_0_m1_neg */ |
| 54998 | case 973: /* *x86_movsicc_0_m1_neg */ |
| 54999 | case 972: /* *x86_movdicc_0_m1_se */ |
| 55000 | case 971: /* *x86_movsicc_0_m1_se */ |
| 55001 | case 970: /* *x86_movdicc_0_m1 */ |
| 55002 | case 969: /* *x86_movsicc_0_m1 */ |
| 55003 | case 968: /* *strlenqi_1 */ |
| 55004 | case 967: /* *strlenqi_1 */ |
| 55005 | case 966: /* *cmpstrnqi_1 */ |
| 55006 | case 965: /* *cmpstrnqi_1 */ |
| 55007 | case 964: /* *cmpstrnqi_nz_1 */ |
| 55008 | case 963: /* *cmpstrnqi_nz_1 */ |
| 55009 | case 934: /* cld */ |
| 55010 | case 811: /* *tls_dynamic_gnu2_combine_64 */ |
| 55011 | case 809: /* *tls_dynamic_gnu2_lea_64 */ |
| 55012 | case 808: /* *tls_dynamic_gnu2_combine_32 */ |
| 55013 | case 806: /* *tls_dynamic_gnu2_lea_32 */ |
| 55014 | case 797: /* *tls_local_dynamic_32_once */ |
| 55015 | case 796: /* *tls_local_dynamic_base_64_largepic */ |
| 55016 | case 795: /* *tls_local_dynamic_base_64_di */ |
| 55017 | case 794: /* *tls_local_dynamic_base_64_si */ |
| 55018 | case 793: /* *tls_local_dynamic_base_32_gnu */ |
| 55019 | case 792: /* *tls_global_dynamic_64_largepic */ |
| 55020 | case 791: /* *tls_global_dynamic_64_di */ |
| 55021 | case 790: /* *tls_global_dynamic_64_si */ |
| 55022 | case 789: /* *tls_global_dynamic_32_gnu */ |
| 55023 | case 788: /* *parityhi2_cmp */ |
| 55024 | case 787: /* paritysi2_cmp */ |
| 55025 | case 786: /* paritydi2_cmp */ |
| 55026 | case 785: /* bswaphi_lowpart */ |
| 55027 | case 784: /* *bswaphi_lowpart_1 */ |
| 55028 | case 778: /* *popcounthi2_1 */ |
| 55029 | case 706: /* ffssi2_no_cmove */ |
| 55030 | case 705: /* split_stack_return */ |
| 55031 | case 702: /* eh_return_internal */ |
| 55032 | case 700: /* set_rip_rex64 */ |
| 55033 | case 699: /* set_got_rex64 */ |
| 55034 | case 698: /* *set_got_labelled */ |
| 55035 | case 697: /* *set_got */ |
| 55036 | case 696: /* pad */ |
| 55037 | case 695: /* nops */ |
| 55038 | case 694: /* nop */ |
| 55039 | case 692: /* simple_return_pop_internal */ |
| 55040 | case 691: /* simple_return_internal_long */ |
| 55041 | case 690: /* interrupt_return */ |
| 55042 | case 689: /* simple_return_internal */ |
| 55043 | case 688: /* prologue_use */ |
| 55044 | case 687: /* *memory_blockage */ |
| 55045 | case 686: /* blockage */ |
| 55046 | case 658: /* *jccxf_si_r_i387 */ |
| 55047 | case 657: /* *jccdf_si_r_i387 */ |
| 55048 | case 656: /* *jccsf_si_r_i387 */ |
| 55049 | case 655: /* *jccxf_hi_r_i387 */ |
| 55050 | case 654: /* *jccdf_hi_r_i387 */ |
| 55051 | case 653: /* *jccsf_hi_r_i387 */ |
| 55052 | case 652: /* *jccxf_si_i387 */ |
| 55053 | case 651: /* *jccdf_si_i387 */ |
| 55054 | case 650: /* *jccsf_si_i387 */ |
| 55055 | case 649: /* *jccxf_hi_i387 */ |
| 55056 | case 648: /* *jccdf_hi_i387 */ |
| 55057 | case 647: /* *jccsf_hi_i387 */ |
| 55058 | case 646: /* *jccuxf_r_i387 */ |
| 55059 | case 645: /* *jccudf_r_i387 */ |
| 55060 | case 644: /* *jccusf_r_i387 */ |
| 55061 | case 643: /* *jccuxf_i387 */ |
| 55062 | case 642: /* *jccudf_i387 */ |
| 55063 | case 641: /* *jccusf_i387 */ |
| 55064 | case 640: /* *jccdf_r_i387 */ |
| 55065 | case 639: /* *jccsf_r_i387 */ |
| 55066 | case 638: /* *jccdf_i387 */ |
| 55067 | case 637: /* *jccsf_i387 */ |
| 55068 | case 636: /* *jccxf_r_i387 */ |
| 55069 | case 635: /* *jccxf_i387 */ |
| 55070 | case 634: /* *jccxf_0_r_i387 */ |
| 55071 | case 633: /* *jccdf_0_r_i387 */ |
| 55072 | case 632: /* *jccsf_0_r_i387 */ |
| 55073 | case 631: /* *jccxf_0_i387 */ |
| 55074 | case 630: /* *jccdf_0_i387 */ |
| 55075 | case 629: /* *jccsf_0_i387 */ |
| 55076 | case 622: /* *setcc_si_1_movzbl */ |
| 55077 | case 621: /* *setcc_si_1_and */ |
| 55078 | case 620: /* *setcc_di_1 */ |
| 55079 | case 619: /* *jcc_btdi_mask */ |
| 55080 | case 618: /* *jcc_btsi_mask */ |
| 55081 | case 617: /* *jcc_btdi_1 */ |
| 55082 | case 616: /* *jcc_btsi_1 */ |
| 55083 | case 615: /* *jcc_btdi */ |
| 55084 | case 614: /* *jcc_btsi */ |
| 55085 | case 593: /* ix86_rotrti3_doubleword */ |
| 55086 | case 592: /* ix86_rotrdi3_doubleword */ |
| 55087 | case 591: /* ix86_rotlti3_doubleword */ |
| 55088 | case 590: /* ix86_rotldi3_doubleword */ |
| 55089 | case 589: /* *rotrdi3_mask */ |
| 55090 | case 588: /* *rotldi3_mask */ |
| 55091 | case 587: /* *rotrsi3_mask */ |
| 55092 | case 586: /* *rotlsi3_mask */ |
| 55093 | case 544: /* *ashrti3_doubleword */ |
| 55094 | case 543: /* *lshrti3_doubleword */ |
| 55095 | case 542: /* *ashrdi3_doubleword */ |
| 55096 | case 541: /* *lshrdi3_doubleword */ |
| 55097 | case 540: /* *ashrdi3_mask */ |
| 55098 | case 539: /* *lshrdi3_mask */ |
| 55099 | case 538: /* *ashrsi3_mask */ |
| 55100 | case 537: /* *lshrsi3_mask */ |
| 55101 | case 518: /* *ashldi3_mask */ |
| 55102 | case 517: /* *ashlsi3_mask */ |
| 55103 | case 514: /* *ashlti3_doubleword */ |
| 55104 | case 513: /* *ashldi3_doubleword */ |
| 55105 | case 502: /* *one_cmpldi2_doubleword */ |
| 55106 | case 501: /* copysigntf3_var */ |
| 55107 | case 500: /* copysigndf3_var */ |
| 55108 | case 499: /* copysignsf3_var */ |
| 55109 | case 498: /* copysigntf3_const */ |
| 55110 | case 497: /* copysigndf3_const */ |
| 55111 | case 496: /* copysignsf3_const */ |
| 55112 | case 483: /* *absnegtf2_sse */ |
| 55113 | case 482: /* *absnegxf2_i387 */ |
| 55114 | case 481: /* *absnegdf2 */ |
| 55115 | case 480: /* *absnegsf2 */ |
| 55116 | case 465: /* *negti2_doubleword */ |
| 55117 | case 464: /* *negdi2_doubleword */ |
| 55118 | case 422: /* *xordi3_doubleword */ |
| 55119 | case 421: /* *iordi3_doubleword */ |
| 55120 | case 414: /* *andndi3_doubleword */ |
| 55121 | case 397: /* *anddi3_doubleword */ |
| 55122 | case 396: /* *testqi_ext_3 */ |
| 55123 | case 395: /* *testqi_ext_3 */ |
| 55124 | case 394: /* *testqi_ext_3 */ |
| 55125 | case 382: /* *udivmoddi4_pow2 */ |
| 55126 | case 381: /* *udivmodsi4_pow2 */ |
| 55127 | case 380: /* *udivmoddi4 */ |
| 55128 | case 379: /* *udivmodsi4 */ |
| 55129 | case 378: /* *udivmodhi4 */ |
| 55130 | case 377: /* udivmoddi4_1 */ |
| 55131 | case 376: /* udivmodsi4_1 */ |
| 55132 | case 371: /* *divmoddi4 */ |
| 55133 | case 370: /* *divmodsi4 */ |
| 55134 | case 369: /* *divmodhi4 */ |
| 55135 | case 368: /* divmoddi4_1 */ |
| 55136 | case 367: /* divmodsi4_1 */ |
| 55137 | case 270: /* *subti3_doubleword */ |
| 55138 | case 269: /* *subdi3_doubleword */ |
| 55139 | case 268: /* *leadi_general_4 */ |
| 55140 | case 267: /* *leadi_general_4 */ |
| 55141 | case 266: /* *leasi_general_4 */ |
| 55142 | case 265: /* *leasi_general_4 */ |
| 55143 | case 264: /* *leahi_general_4 */ |
| 55144 | case 263: /* *leahi_general_4 */ |
| 55145 | case 262: /* *leaqi_general_4 */ |
| 55146 | case 261: /* *leaqi_general_4 */ |
| 55147 | case 260: /* *leahi_general_3b */ |
| 55148 | case 259: /* *leaqi_general_3b */ |
| 55149 | case 258: /* *leahi_general_3 */ |
| 55150 | case 257: /* *leaqi_general_3 */ |
| 55151 | case 256: /* *leahi_general_2b */ |
| 55152 | case 255: /* *leaqi_general_2b */ |
| 55153 | case 254: /* *leahi_general_2 */ |
| 55154 | case 253: /* *leaqi_general_2 */ |
| 55155 | case 252: /* *leahi_general_1 */ |
| 55156 | case 251: /* *leaqi_general_1 */ |
| 55157 | case 216: /* *addti3_doubleword */ |
| 55158 | case 215: /* *adddi3_doubleword */ |
| 55159 | case 214: /* *leadi */ |
| 55160 | case 213: /* *leasi */ |
| 55161 | case 212: /* *floatunssixf2_i387_with_xmm */ |
| 55162 | case 211: /* *floatunssidf2_i387_with_xmm */ |
| 55163 | case 210: /* *floatunssisf2_i387_with_xmm */ |
| 55164 | case 169: /* *fixuns_truncdf_1 */ |
| 55165 | case 168: /* *fixuns_truncsf_1 */ |
| 55166 | case 146: /* extendsidi2_1 */ |
| 55167 | case 144: /* *zextsi_doubleword */ |
| 55168 | case 143: /* *zexthi_doubleword */ |
| 55169 | case 142: /* *zextqi_doubleword */ |
| 55170 | case 141: /* *zexthi_doubleword_and */ |
| 55171 | case 140: /* *zextqi_doubleword_and */ |
| 55172 | case 73: /* *popfldi1 */ |
| 55173 | case 72: /* *popflsi1 */ |
| 55174 | case 71: /* *pushfldi2 */ |
| 55175 | case 70: /* *pushflsi2 */ |
| 55176 | case 69: /* *popdi1_epilogue */ |
| 55177 | case 68: /* *popsi1_epilogue */ |
| 55178 | case 67: /* *popdi1 */ |
| 55179 | case 66: /* *popsi1 */ |
| 55180 | case 65: /* *pushdi2_prologue */ |
| 55181 | case 64: /* *pushsi2_prologue */ |
| 55182 | case 63: /* *pushhi2 */ |
| 55183 | case 62: /* *pushqi2 */ |
| 55184 | case 61: /* *pushsi2_rex64 */ |
| 55185 | case 60: /* *pushhi2_rex64 */ |
| 55186 | case 59: /* *pushqi2_rex64 */ |
| 55187 | case 58: /* *pushsi2 */ |
| 55188 | case 57: /* *pushdi2_rex64 */ |
| 55189 | case 56: /* *pushti2 */ |
| 55190 | case 55: /* *pushdi2 */ |
| 55191 | case 48: /* x86_sahf_1 */ |
| 55192 | return 1; |
| 55193 | |
| 55194 | case 4926: /* mfence_sse2 */ |
| 55195 | case 4925: /* *sse_sfence */ |
| 55196 | case 4924: /* *sse2_lfence */ |
| 55197 | case 4862: /* conflictv2di_mask */ |
| 55198 | case 4861: /* *conflictv2di */ |
| 55199 | case 4860: /* conflictv4di_mask */ |
| 55200 | case 4859: /* *conflictv4di */ |
| 55201 | case 4858: /* conflictv8di_mask */ |
| 55202 | case 4857: /* *conflictv8di */ |
| 55203 | case 4856: /* conflictv4si_mask */ |
| 55204 | case 4855: /* *conflictv4si */ |
| 55205 | case 4854: /* conflictv8si_mask */ |
| 55206 | case 4853: /* *conflictv8si */ |
| 55207 | case 4852: /* conflictv16si_mask */ |
| 55208 | case 4851: /* *conflictv16si */ |
| 55209 | case 4850: /* clzv2di2_mask */ |
| 55210 | case 4849: /* clzv2di2 */ |
| 55211 | case 4848: /* clzv4di2_mask */ |
| 55212 | case 4847: /* clzv4di2 */ |
| 55213 | case 4846: /* clzv8di2_mask */ |
| 55214 | case 4845: /* clzv8di2 */ |
| 55215 | case 4844: /* clzv4si2_mask */ |
| 55216 | case 4843: /* clzv4si2 */ |
| 55217 | case 4842: /* clzv8si2_mask */ |
| 55218 | case 4841: /* clzv8si2 */ |
| 55219 | case 4840: /* clzv16si2_mask */ |
| 55220 | case 4839: /* clzv16si2 */ |
| 55221 | case 4804: /* avx512dq_vmfpclassv2df */ |
| 55222 | case 4803: /* avx512dq_vmfpclassv4sf */ |
| 55223 | case 4802: /* avx512dq_fpclassv2df_mask */ |
| 55224 | case 4801: /* avx512dq_fpclassv2df */ |
| 55225 | case 4800: /* avx512dq_fpclassv4df_mask */ |
| 55226 | case 4799: /* avx512dq_fpclassv4df */ |
| 55227 | case 4798: /* avx512dq_fpclassv8df_mask */ |
| 55228 | case 4797: /* avx512dq_fpclassv8df */ |
| 55229 | case 4796: /* avx512dq_fpclassv4sf_mask */ |
| 55230 | case 4795: /* avx512dq_fpclassv4sf */ |
| 55231 | case 4794: /* avx512dq_fpclassv8sf_mask */ |
| 55232 | case 4793: /* avx512dq_fpclassv8sf */ |
| 55233 | case 4792: /* avx512dq_fpclassv16sf_mask */ |
| 55234 | case 4791: /* avx512dq_fpclassv16sf */ |
| 55235 | case 4790: /* avx512dq_rangesv2df_round */ |
| 55236 | case 4789: /* avx512dq_rangesv2df */ |
| 55237 | case 4788: /* avx512dq_rangesv4sf_round */ |
| 55238 | case 4787: /* avx512dq_rangesv4sf */ |
| 55239 | case 4786: /* avx512dq_rangepv2df_mask */ |
| 55240 | case 4785: /* avx512dq_rangepv2df */ |
| 55241 | case 4784: /* avx512dq_rangepv4df_mask */ |
| 55242 | case 4783: /* avx512dq_rangepv4df */ |
| 55243 | case 4782: /* avx512dq_rangepv8df_mask_round */ |
| 55244 | case 4781: /* avx512dq_rangepv8df_mask */ |
| 55245 | case 4780: /* avx512dq_rangepv8df_round */ |
| 55246 | case 4779: /* avx512dq_rangepv8df */ |
| 55247 | case 4778: /* avx512dq_rangepv4sf_mask */ |
| 55248 | case 4777: /* avx512dq_rangepv4sf */ |
| 55249 | case 4776: /* avx512dq_rangepv8sf_mask */ |
| 55250 | case 4775: /* avx512dq_rangepv8sf */ |
| 55251 | case 4774: /* avx512dq_rangepv16sf_mask_round */ |
| 55252 | case 4773: /* avx512dq_rangepv16sf_mask */ |
| 55253 | case 4772: /* avx512dq_rangepv16sf_round */ |
| 55254 | case 4771: /* avx512dq_rangepv16sf */ |
| 55255 | case 4489: /* avx512bw_lshrvv32hi_mask */ |
| 55256 | case 4488: /* avx512bw_lshrvv32hi */ |
| 55257 | case 4487: /* avx512bw_ashlvv32hi_mask */ |
| 55258 | case 4486: /* avx512bw_ashlvv32hi */ |
| 55259 | case 4485: /* avx512vl_lshrvv16hi_mask */ |
| 55260 | case 4484: /* avx512vl_lshrvv16hi */ |
| 55261 | case 4483: /* avx512vl_ashlvv16hi_mask */ |
| 55262 | case 4482: /* avx512vl_ashlvv16hi */ |
| 55263 | case 4481: /* avx512vl_lshrvv8hi_mask */ |
| 55264 | case 4480: /* avx512vl_lshrvv8hi */ |
| 55265 | case 4479: /* avx512vl_ashlvv8hi_mask */ |
| 55266 | case 4478: /* avx512vl_ashlvv8hi */ |
| 55267 | case 4477: /* avx2_lshrvv2di_mask */ |
| 55268 | case 4476: /* avx2_lshrvv2di */ |
| 55269 | case 4475: /* avx2_ashlvv2di_mask */ |
| 55270 | case 4474: /* avx2_ashlvv2di */ |
| 55271 | case 4473: /* avx2_lshrvv4di_mask */ |
| 55272 | case 4472: /* avx2_lshrvv4di */ |
| 55273 | case 4471: /* avx2_ashlvv4di_mask */ |
| 55274 | case 4470: /* avx2_ashlvv4di */ |
| 55275 | case 4469: /* avx512f_lshrvv8di_mask */ |
| 55276 | case 4468: /* avx512f_lshrvv8di */ |
| 55277 | case 4467: /* avx512f_ashlvv8di_mask */ |
| 55278 | case 4466: /* avx512f_ashlvv8di */ |
| 55279 | case 4465: /* avx2_lshrvv4si_mask */ |
| 55280 | case 4464: /* avx2_lshrvv4si */ |
| 55281 | case 4463: /* avx2_ashlvv4si_mask */ |
| 55282 | case 4462: /* avx2_ashlvv4si */ |
| 55283 | case 4461: /* avx2_lshrvv8si_mask */ |
| 55284 | case 4460: /* avx2_lshrvv8si */ |
| 55285 | case 4459: /* avx2_ashlvv8si_mask */ |
| 55286 | case 4458: /* avx2_ashlvv8si */ |
| 55287 | case 4457: /* avx512f_lshrvv16si_mask */ |
| 55288 | case 4456: /* avx512f_lshrvv16si */ |
| 55289 | case 4455: /* avx512f_ashlvv16si_mask */ |
| 55290 | case 4454: /* avx512f_ashlvv16si */ |
| 55291 | case 4453: /* avx512bw_ashrvv32hi_mask */ |
| 55292 | case 4452: /* avx512bw_ashrvv32hi */ |
| 55293 | case 4451: /* avx512vl_ashrvv16hi_mask */ |
| 55294 | case 4450: /* avx512vl_ashrvv16hi */ |
| 55295 | case 4449: /* avx512vl_ashrvv8hi_mask */ |
| 55296 | case 4448: /* avx512vl_ashrvv8hi */ |
| 55297 | case 4447: /* avx512f_ashrvv8di_mask */ |
| 55298 | case 4446: /* avx512f_ashrvv8di */ |
| 55299 | case 4445: /* avx2_ashrvv4di_mask */ |
| 55300 | case 4444: /* avx2_ashrvv4di */ |
| 55301 | case 4443: /* avx2_ashrvv2di_mask */ |
| 55302 | case 4442: /* avx2_ashrvv2di */ |
| 55303 | case 4441: /* avx512f_ashrvv16si_mask */ |
| 55304 | case 4440: /* avx512f_ashrvv16si */ |
| 55305 | case 4439: /* avx2_ashrvv8si_mask */ |
| 55306 | case 4438: /* avx2_ashrvv8si */ |
| 55307 | case 4437: /* avx2_ashrvv4si_mask */ |
| 55308 | case 4436: /* avx2_ashrvv4si */ |
| 55309 | case 4396: /* *ssse3_palignrv2df_perm */ |
| 55310 | case 4395: /* *ssse3_palignrv4sf_perm */ |
| 55311 | case 4394: /* *ssse3_palignrv2di_perm */ |
| 55312 | case 4393: /* *ssse3_palignrv4si_perm */ |
| 55313 | case 4392: /* *ssse3_palignrv8hi_perm */ |
| 55314 | case 4391: /* *ssse3_palignrv16qi_perm */ |
| 55315 | case 4249: /* avx512cd_maskw_vec_dupv4si */ |
| 55316 | case 4248: /* avx512cd_maskw_vec_dupv8si */ |
| 55317 | case 4247: /* avx512cd_maskw_vec_dupv16si */ |
| 55318 | case 4246: /* avx512cd_maskb_vec_dupv2di */ |
| 55319 | case 4245: /* avx512cd_maskb_vec_dupv4di */ |
| 55320 | case 4244: /* avx512cd_maskb_vec_dupv8di */ |
| 55321 | case 4056: /* avx_vzeroupper */ |
| 55322 | case 4055: /* *avx_vzeroall */ |
| 55323 | case 4047: /* xop_vpermil2v2df3 */ |
| 55324 | case 4046: /* xop_vpermil2v4df3 */ |
| 55325 | case 4045: /* xop_vpermil2v4sf3 */ |
| 55326 | case 4044: /* xop_vpermil2v8sf3 */ |
| 55327 | case 4031: /* xop_maskcmpv2di3 */ |
| 55328 | case 4030: /* xop_maskcmpv4si3 */ |
| 55329 | case 4029: /* xop_maskcmpv8hi3 */ |
| 55330 | case 4028: /* xop_maskcmpv16qi3 */ |
| 55331 | case 4027: /* *xop_vmfrczv2df2 */ |
| 55332 | case 4026: /* *xop_vmfrczv4sf2 */ |
| 55333 | case 4025: /* xop_frczv4df2 */ |
| 55334 | case 4024: /* xop_frczv8sf2 */ |
| 55335 | case 4023: /* xop_frczv2df2 */ |
| 55336 | case 4022: /* xop_frczv4sf2 */ |
| 55337 | case 4021: /* xop_frczdf2 */ |
| 55338 | case 4020: /* xop_frczsf2 */ |
| 55339 | case 4019: /* xop_shlv2di3 */ |
| 55340 | case 4018: /* xop_shlv4si3 */ |
| 55341 | case 4017: /* xop_shlv8hi3 */ |
| 55342 | case 4016: /* xop_shlv16qi3 */ |
| 55343 | case 4015: /* xop_shav2di3 */ |
| 55344 | case 4014: /* xop_shav4si3 */ |
| 55345 | case 4013: /* xop_shav8hi3 */ |
| 55346 | case 4012: /* xop_shav16qi3 */ |
| 55347 | case 4011: /* xop_vrotlv2di3 */ |
| 55348 | case 4010: /* xop_vrotlv4si3 */ |
| 55349 | case 4009: /* xop_vrotlv8hi3 */ |
| 55350 | case 4008: /* xop_vrotlv16qi3 */ |
| 55351 | case 4007: /* xop_rotrv2di3 */ |
| 55352 | case 4006: /* xop_rotrv4si3 */ |
| 55353 | case 4005: /* xop_rotrv8hi3 */ |
| 55354 | case 4004: /* xop_rotrv16qi3 */ |
| 55355 | case 4003: /* xop_rotlv2di3 */ |
| 55356 | case 4002: /* xop_rotlv4si3 */ |
| 55357 | case 4001: /* xop_rotlv8hi3 */ |
| 55358 | case 4000: /* xop_rotlv16qi3 */ |
| 55359 | case 3999: /* xop_pperm_pack_v8hi_v16qi */ |
| 55360 | case 3998: /* xop_pperm_pack_v4si_v8hi */ |
| 55361 | case 3997: /* xop_pperm_pack_v2di_v4si */ |
| 55362 | case 3996: /* xop_pperm */ |
| 55363 | case 3995: /* xop_phsubdq */ |
| 55364 | case 3994: /* xop_phsubwd */ |
| 55365 | case 3993: /* xop_phsubbw */ |
| 55366 | case 3992: /* xop_phaddudq */ |
| 55367 | case 3991: /* xop_phadddq */ |
| 55368 | case 3990: /* xop_phadduwq */ |
| 55369 | case 3989: /* xop_phaddwq */ |
| 55370 | case 3988: /* xop_phadduwd */ |
| 55371 | case 3987: /* xop_phaddwd */ |
| 55372 | case 3986: /* xop_phaddubq */ |
| 55373 | case 3985: /* xop_phaddbq */ |
| 55374 | case 3984: /* xop_phaddubd */ |
| 55375 | case 3983: /* xop_phaddbd */ |
| 55376 | case 3982: /* xop_phaddubw */ |
| 55377 | case 3981: /* xop_phaddbw */ |
| 55378 | case 3980: /* xop_pcmov_v2df */ |
| 55379 | case 3979: /* xop_pcmov_v4df256 */ |
| 55380 | case 3978: /* xop_pcmov_v8df512 */ |
| 55381 | case 3977: /* xop_pcmov_v4sf */ |
| 55382 | case 3976: /* xop_pcmov_v8sf256 */ |
| 55383 | case 3975: /* xop_pcmov_v16sf512 */ |
| 55384 | case 3974: /* xop_pcmov_v2di */ |
| 55385 | case 3973: /* xop_pcmov_v4di256 */ |
| 55386 | case 3972: /* xop_pcmov_v8di512 */ |
| 55387 | case 3971: /* xop_pcmov_v4si */ |
| 55388 | case 3970: /* xop_pcmov_v8si256 */ |
| 55389 | case 3969: /* xop_pcmov_v16si512 */ |
| 55390 | case 3968: /* xop_pcmov_v8hi */ |
| 55391 | case 3967: /* xop_pcmov_v16hi256 */ |
| 55392 | case 3966: /* xop_pcmov_v16qi */ |
| 55393 | case 3965: /* xop_pcmov_v32qi256 */ |
| 55394 | case 3952: /* avx512er_vmrsqrt28v2df_round */ |
| 55395 | case 3951: /* avx512er_vmrsqrt28v2df */ |
| 55396 | case 3950: /* avx512er_vmrsqrt28v4sf_round */ |
| 55397 | case 3949: /* avx512er_vmrsqrt28v4sf */ |
| 55398 | case 3948: /* avx512er_rsqrt28v8df_mask_round */ |
| 55399 | case 3947: /* avx512er_rsqrt28v8df_mask */ |
| 55400 | case 3946: /* *avx512er_rsqrt28v8df_round */ |
| 55401 | case 3945: /* *avx512er_rsqrt28v8df */ |
| 55402 | case 3944: /* avx512er_rsqrt28v16sf_mask_round */ |
| 55403 | case 3943: /* avx512er_rsqrt28v16sf_mask */ |
| 55404 | case 3942: /* *avx512er_rsqrt28v16sf_round */ |
| 55405 | case 3941: /* *avx512er_rsqrt28v16sf */ |
| 55406 | case 3940: /* avx512er_vmrcp28v2df_round */ |
| 55407 | case 3939: /* avx512er_vmrcp28v2df */ |
| 55408 | case 3938: /* avx512er_vmrcp28v4sf_round */ |
| 55409 | case 3937: /* avx512er_vmrcp28v4sf */ |
| 55410 | case 3936: /* avx512er_rcp28v8df_mask_round */ |
| 55411 | case 3935: /* avx512er_rcp28v8df_mask */ |
| 55412 | case 3934: /* *avx512er_rcp28v8df_round */ |
| 55413 | case 3933: /* *avx512er_rcp28v8df */ |
| 55414 | case 3932: /* avx512er_rcp28v16sf_mask_round */ |
| 55415 | case 3931: /* avx512er_rcp28v16sf_mask */ |
| 55416 | case 3930: /* *avx512er_rcp28v16sf_round */ |
| 55417 | case 3929: /* *avx512er_rcp28v16sf */ |
| 55418 | case 3928: /* avx512er_exp2v8df_mask_round */ |
| 55419 | case 3927: /* avx512er_exp2v8df_mask */ |
| 55420 | case 3926: /* avx512er_exp2v8df_round */ |
| 55421 | case 3925: /* avx512er_exp2v8df */ |
| 55422 | case 3924: /* avx512er_exp2v16sf_mask_round */ |
| 55423 | case 3923: /* avx512er_exp2v16sf_mask */ |
| 55424 | case 3922: /* avx512er_exp2v16sf_round */ |
| 55425 | case 3921: /* avx512er_exp2v16sf */ |
| 55426 | case 3920: /* *avx512pf_scatterpfv8didf_mask */ |
| 55427 | case 3919: /* *avx512pf_scatterpfv8didf_mask */ |
| 55428 | case 3918: /* *avx512pf_scatterpfv8sidf_mask */ |
| 55429 | case 3917: /* *avx512pf_scatterpfv8sidf_mask */ |
| 55430 | case 3916: /* *avx512pf_scatterpfv8disf_mask */ |
| 55431 | case 3915: /* *avx512pf_scatterpfv8disf_mask */ |
| 55432 | case 3914: /* *avx512pf_scatterpfv16sisf_mask */ |
| 55433 | case 3913: /* *avx512pf_scatterpfv16sisf_mask */ |
| 55434 | case 3912: /* *avx512pf_gatherpfv8didf_mask */ |
| 55435 | case 3911: /* *avx512pf_gatherpfv8didf_mask */ |
| 55436 | case 3910: /* *avx512pf_gatherpfv8sidf_mask */ |
| 55437 | case 3909: /* *avx512pf_gatherpfv8sidf_mask */ |
| 55438 | case 3908: /* *avx512pf_gatherpfv8disf_mask */ |
| 55439 | case 3907: /* *avx512pf_gatherpfv8disf_mask */ |
| 55440 | case 3906: /* *avx512pf_gatherpfv16sisf_mask */ |
| 55441 | case 3905: /* *avx512pf_gatherpfv16sisf_mask */ |
| 55442 | case 3769: /* sse4a_extrq */ |
| 55443 | case 3768: /* sse4a_extrqi */ |
| 55444 | case 3736: /* ssse3_palignrdi */ |
| 55445 | case 3735: /* ssse3_palignrti */ |
| 55446 | case 3734: /* avx2_palignrv2ti */ |
| 55447 | case 3733: /* avx512bw_palignrv4ti */ |
| 55448 | case 3732: /* ssse3_palignrv16qi_mask */ |
| 55449 | case 3731: /* avx2_palignrv32qi_mask */ |
| 55450 | case 3730: /* avx512bw_palignrv64qi_mask */ |
| 55451 | case 3674: /* sse2_clflush */ |
| 55452 | case 3673: /* sse_stmxcsr */ |
| 55453 | case 3672: /* sse_ldmxcsr */ |
| 55454 | case 3143: /* sse2_lshrv1ti3 */ |
| 55455 | case 3142: /* avx2_lshrv2ti3 */ |
| 55456 | case 3141: /* avx512bw_lshrv4ti3 */ |
| 55457 | case 3140: /* sse2_ashlv1ti3 */ |
| 55458 | case 3139: /* avx2_ashlv2ti3 */ |
| 55459 | case 3138: /* avx512bw_ashlv4ti3 */ |
| 55460 | case 3137: /* lshrv8di3_mask */ |
| 55461 | case 3136: /* lshrv8di3 */ |
| 55462 | case 3135: /* ashlv8di3_mask */ |
| 55463 | case 3134: /* ashlv8di3 */ |
| 55464 | case 3133: /* lshrv16si3_mask */ |
| 55465 | case 3132: /* lshrv16si3 */ |
| 55466 | case 3131: /* ashlv16si3_mask */ |
| 55467 | case 3130: /* ashlv16si3 */ |
| 55468 | case 3129: /* lshrv2di3_mask */ |
| 55469 | case 3128: /* lshrv2di3 */ |
| 55470 | case 3127: /* ashlv2di3_mask */ |
| 55471 | case 3126: /* ashlv2di3 */ |
| 55472 | case 3125: /* lshrv4di3_mask */ |
| 55473 | case 3124: /* lshrv4di3 */ |
| 55474 | case 3123: /* ashlv4di3_mask */ |
| 55475 | case 3122: /* ashlv4di3 */ |
| 55476 | case 3121: /* lshrv4si3_mask */ |
| 55477 | case 3120: /* lshrv4si3 */ |
| 55478 | case 3119: /* ashlv4si3_mask */ |
| 55479 | case 3118: /* ashlv4si3 */ |
| 55480 | case 3117: /* lshrv8si3_mask */ |
| 55481 | case 3116: /* lshrv8si3 */ |
| 55482 | case 3115: /* ashlv8si3_mask */ |
| 55483 | case 3114: /* ashlv8si3 */ |
| 55484 | case 3113: /* lshrv8hi3_mask */ |
| 55485 | case 3112: /* lshrv8hi3 */ |
| 55486 | case 3111: /* ashlv8hi3_mask */ |
| 55487 | case 3110: /* ashlv8hi3 */ |
| 55488 | case 3109: /* lshrv16hi3_mask */ |
| 55489 | case 3108: /* lshrv16hi3 */ |
| 55490 | case 3107: /* ashlv16hi3_mask */ |
| 55491 | case 3106: /* ashlv16hi3 */ |
| 55492 | case 3105: /* lshrv32hi3_mask */ |
| 55493 | case 3104: /* lshrv32hi3 */ |
| 55494 | case 3103: /* ashlv32hi3_mask */ |
| 55495 | case 3102: /* ashlv32hi3 */ |
| 55496 | case 3101: /* ashrv8di3_mask */ |
| 55497 | case 3100: /* ashrv8di3 */ |
| 55498 | case 3099: /* ashrv16si3_mask */ |
| 55499 | case 3098: /* ashrv16si3 */ |
| 55500 | case 3097: /* ashrv4di3_mask */ |
| 55501 | case 3096: /* ashrv4di3 */ |
| 55502 | case 3095: /* ashrv32hi3_mask */ |
| 55503 | case 3094: /* ashrv32hi3 */ |
| 55504 | case 3093: /* ashrv2di3_mask */ |
| 55505 | case 3092: /* *ashrv2di3 */ |
| 55506 | case 3091: /* ashrv4si3 */ |
| 55507 | case 3090: /* ashrv8si3 */ |
| 55508 | case 3089: /* ashrv8hi3 */ |
| 55509 | case 3088: /* ashrv16hi3 */ |
| 55510 | case 3087: /* ashrv4si3_mask */ |
| 55511 | case 3086: /* *ashrv4si3 */ |
| 55512 | case 3085: /* ashrv8si3_mask */ |
| 55513 | case 3084: /* *ashrv8si3 */ |
| 55514 | case 3083: /* ashrv8hi3_mask */ |
| 55515 | case 3082: /* *ashrv8hi3 */ |
| 55516 | case 3081: /* ashrv16hi3_mask */ |
| 55517 | case 3080: /* *ashrv16hi3 */ |
| 55518 | case 2443: /* avx512f_movsldup512_mask */ |
| 55519 | case 2442: /* *avx512f_movsldup512 */ |
| 55520 | case 2441: /* sse3_movsldup_mask */ |
| 55521 | case 2440: /* sse3_movsldup */ |
| 55522 | case 2439: /* avx_movsldup256_mask */ |
| 55523 | case 2438: /* avx_movsldup256 */ |
| 55524 | case 2437: /* avx512f_movshdup512_mask */ |
| 55525 | case 2436: /* *avx512f_movshdup512 */ |
| 55526 | case 2435: /* sse3_movshdup_mask */ |
| 55527 | case 2434: /* sse3_movshdup */ |
| 55528 | case 2433: /* avx_movshdup256_mask */ |
| 55529 | case 2432: /* avx_movshdup256 */ |
| 55530 | case 1634: /* reducesv2df */ |
| 55531 | case 1633: /* reducesv4sf */ |
| 55532 | case 1632: /* reducepv2df_mask */ |
| 55533 | case 1631: /* *reducepv2df */ |
| 55534 | case 1630: /* reducepv4df_mask */ |
| 55535 | case 1629: /* *reducepv4df */ |
| 55536 | case 1628: /* reducepv8df_mask */ |
| 55537 | case 1627: /* *reducepv8df */ |
| 55538 | case 1626: /* reducepv4sf_mask */ |
| 55539 | case 1625: /* *reducepv4sf */ |
| 55540 | case 1624: /* reducepv8sf_mask */ |
| 55541 | case 1623: /* *reducepv8sf */ |
| 55542 | case 1622: /* reducepv16sf_mask */ |
| 55543 | case 1621: /* *reducepv16sf */ |
| 55544 | case 1606: /* sse2_vmsminv2df3_round */ |
| 55545 | case 1605: /* sse2_vmsminv2df3 */ |
| 55546 | case 1604: /* sse2_vmsmaxv2df3_round */ |
| 55547 | case 1603: /* sse2_vmsmaxv2df3 */ |
| 55548 | case 1602: /* sse_vmsminv4sf3_round */ |
| 55549 | case 1601: /* sse_vmsminv4sf3 */ |
| 55550 | case 1600: /* sse_vmsmaxv4sf3_round */ |
| 55551 | case 1599: /* sse_vmsmaxv4sf3 */ |
| 55552 | case 1518: /* sse_vmrsqrtv4sf2 */ |
| 55553 | case 1517: /* rsqrt14v2df */ |
| 55554 | case 1516: /* rsqrt14v4sf */ |
| 55555 | case 1515: /* rsqrt14v2df_mask */ |
| 55556 | case 1514: /* *rsqrt14v2df */ |
| 55557 | case 1513: /* rsqrt14v4df_mask */ |
| 55558 | case 1512: /* *rsqrt14v4df */ |
| 55559 | case 1511: /* rsqrt14v8df_mask */ |
| 55560 | case 1510: /* *rsqrt14v8df */ |
| 55561 | case 1509: /* rsqrt14v4sf_mask */ |
| 55562 | case 1508: /* *rsqrt14v4sf */ |
| 55563 | case 1507: /* rsqrt14v8sf_mask */ |
| 55564 | case 1506: /* *rsqrt14v8sf */ |
| 55565 | case 1505: /* rsqrt14v16sf_mask */ |
| 55566 | case 1504: /* *rsqrt14v16sf */ |
| 55567 | case 1503: /* sse_rsqrtv4sf2 */ |
| 55568 | case 1502: /* avx_rsqrtv8sf2 */ |
| 55569 | case 1501: /* sse2_vmsqrtv2df2_round */ |
| 55570 | case 1500: /* sse2_vmsqrtv2df2 */ |
| 55571 | case 1499: /* sse_vmsqrtv4sf2_round */ |
| 55572 | case 1498: /* sse_vmsqrtv4sf2 */ |
| 55573 | case 1497: /* sse2_sqrtv2df2_mask */ |
| 55574 | case 1496: /* sse2_sqrtv2df2 */ |
| 55575 | case 1495: /* avx_sqrtv4df2_mask */ |
| 55576 | case 1494: /* avx_sqrtv4df2 */ |
| 55577 | case 1493: /* avx512f_sqrtv8df2_mask_round */ |
| 55578 | case 1492: /* avx512f_sqrtv8df2_mask */ |
| 55579 | case 1491: /* avx512f_sqrtv8df2_round */ |
| 55580 | case 1490: /* avx512f_sqrtv8df2 */ |
| 55581 | case 1489: /* sse_sqrtv4sf2_mask */ |
| 55582 | case 1488: /* sse_sqrtv4sf2 */ |
| 55583 | case 1487: /* avx_sqrtv8sf2_mask */ |
| 55584 | case 1486: /* avx_sqrtv8sf2 */ |
| 55585 | case 1485: /* avx512f_sqrtv16sf2_mask_round */ |
| 55586 | case 1484: /* avx512f_sqrtv16sf2_mask */ |
| 55587 | case 1483: /* avx512f_sqrtv16sf2_round */ |
| 55588 | case 1482: /* avx512f_sqrtv16sf2 */ |
| 55589 | case 1481: /* srcp14v2df */ |
| 55590 | case 1480: /* srcp14v4sf */ |
| 55591 | case 1479: /* rcp14v2df_mask */ |
| 55592 | case 1478: /* *rcp14v2df */ |
| 55593 | case 1477: /* rcp14v4df_mask */ |
| 55594 | case 1476: /* *rcp14v4df */ |
| 55595 | case 1475: /* rcp14v8df_mask */ |
| 55596 | case 1474: /* *rcp14v8df */ |
| 55597 | case 1473: /* rcp14v4sf_mask */ |
| 55598 | case 1472: /* *rcp14v4sf */ |
| 55599 | case 1471: /* rcp14v8sf_mask */ |
| 55600 | case 1470: /* *rcp14v8sf */ |
| 55601 | case 1469: /* rcp14v16sf_mask */ |
| 55602 | case 1468: /* *rcp14v16sf */ |
| 55603 | case 1467: /* sse_vmrcpv4sf2 */ |
| 55604 | case 1466: /* sse_rcpv4sf2 */ |
| 55605 | case 1465: /* avx_rcpv8sf2 */ |
| 55606 | case 1460: /* avx512f_divv8df3_mask_round */ |
| 55607 | case 1459: /* avx512f_divv8df3_mask */ |
| 55608 | case 1458: /* avx512f_divv8df3_round */ |
| 55609 | case 1457: /* avx512f_divv8df3 */ |
| 55610 | case 1452: /* avx512f_divv16sf3_mask_round */ |
| 55611 | case 1451: /* avx512f_divv16sf3_mask */ |
| 55612 | case 1450: /* avx512f_divv16sf3_round */ |
| 55613 | case 1449: /* avx512f_divv16sf3 */ |
| 55614 | case 1217: /* *mmx_femms */ |
| 55615 | case 1216: /* *mmx_emms */ |
| 55616 | case 1215: /* *mmx_maskmovq */ |
| 55617 | case 1214: /* *mmx_maskmovq */ |
| 55618 | case 1213: /* mmx_pmovmskb */ |
| 55619 | case 1212: /* mmx_psadbw */ |
| 55620 | case 1211: /* *mmx_uavgv4hi3 */ |
| 55621 | case 1210: /* *mmx_uavgv8qi3 */ |
| 55622 | case 1205: /* *vec_dupv2si */ |
| 55623 | case 1204: /* *vec_dupv4hi */ |
| 55624 | case 1203: /* mmx_pswapdv2si2 */ |
| 55625 | case 1202: /* mmx_pshufw_1 */ |
| 55626 | case 1201: /* mmx_pextrw */ |
| 55627 | case 1200: /* *mmx_pinsrw */ |
| 55628 | case 1199: /* mmx_punpckldq */ |
| 55629 | case 1198: /* mmx_punpckhdq */ |
| 55630 | case 1197: /* mmx_punpcklwd */ |
| 55631 | case 1196: /* mmx_punpckhwd */ |
| 55632 | case 1195: /* mmx_punpcklbw */ |
| 55633 | case 1194: /* mmx_punpckhbw */ |
| 55634 | case 1193: /* mmx_packuswb */ |
| 55635 | case 1192: /* mmx_packssdw */ |
| 55636 | case 1191: /* mmx_packsswb */ |
| 55637 | case 1190: /* *mmx_xorv2si3 */ |
| 55638 | case 1189: /* *mmx_iorv2si3 */ |
| 55639 | case 1188: /* *mmx_andv2si3 */ |
| 55640 | case 1187: /* *mmx_xorv4hi3 */ |
| 55641 | case 1186: /* *mmx_iorv4hi3 */ |
| 55642 | case 1185: /* *mmx_andv4hi3 */ |
| 55643 | case 1184: /* *mmx_xorv8qi3 */ |
| 55644 | case 1183: /* *mmx_iorv8qi3 */ |
| 55645 | case 1182: /* *mmx_andv8qi3 */ |
| 55646 | case 1181: /* mmx_andnotv2si3 */ |
| 55647 | case 1180: /* mmx_andnotv4hi3 */ |
| 55648 | case 1179: /* mmx_andnotv8qi3 */ |
| 55649 | case 1178: /* mmx_gtv2si3 */ |
| 55650 | case 1177: /* mmx_gtv4hi3 */ |
| 55651 | case 1176: /* mmx_gtv8qi3 */ |
| 55652 | case 1175: /* *mmx_eqv2si3 */ |
| 55653 | case 1174: /* *mmx_eqv4hi3 */ |
| 55654 | case 1173: /* *mmx_eqv8qi3 */ |
| 55655 | case 1172: /* mmx_lshrv1di3 */ |
| 55656 | case 1171: /* mmx_ashlv1di3 */ |
| 55657 | case 1170: /* mmx_lshrv2si3 */ |
| 55658 | case 1169: /* mmx_ashlv2si3 */ |
| 55659 | case 1168: /* mmx_lshrv4hi3 */ |
| 55660 | case 1167: /* mmx_ashlv4hi3 */ |
| 55661 | case 1166: /* mmx_ashrv2si3 */ |
| 55662 | case 1165: /* mmx_ashrv4hi3 */ |
| 55663 | case 1164: /* *mmx_uminv8qi3 */ |
| 55664 | case 1163: /* *mmx_umaxv8qi3 */ |
| 55665 | case 1162: /* *mmx_sminv4hi3 */ |
| 55666 | case 1161: /* *mmx_smaxv4hi3 */ |
| 55667 | case 1160: /* *sse2_umulv1siv1di3 */ |
| 55668 | case 1159: /* *mmx_pmulhrwv4hi3 */ |
| 55669 | case 1158: /* *mmx_pmaddwd */ |
| 55670 | case 1157: /* *mmx_umulv4hi3_highpart */ |
| 55671 | case 1156: /* *mmx_smulv4hi3_highpart */ |
| 55672 | case 1155: /* *mmx_mulv4hi3 */ |
| 55673 | case 1154: /* *mmx_ussubv4hi3 */ |
| 55674 | case 1153: /* *mmx_sssubv4hi3 */ |
| 55675 | case 1152: /* *mmx_usaddv4hi3 */ |
| 55676 | case 1151: /* *mmx_ssaddv4hi3 */ |
| 55677 | case 1150: /* *mmx_ussubv8qi3 */ |
| 55678 | case 1149: /* *mmx_sssubv8qi3 */ |
| 55679 | case 1148: /* *mmx_usaddv8qi3 */ |
| 55680 | case 1147: /* *mmx_ssaddv8qi3 */ |
| 55681 | case 1146: /* *mmx_subv1di3 */ |
| 55682 | case 1145: /* *mmx_addv1di3 */ |
| 55683 | case 1144: /* *mmx_subv2si3 */ |
| 55684 | case 1143: /* *mmx_addv2si3 */ |
| 55685 | case 1142: /* *mmx_subv4hi3 */ |
| 55686 | case 1141: /* *mmx_addv4hi3 */ |
| 55687 | case 1140: /* *mmx_subv8qi3 */ |
| 55688 | case 1139: /* *mmx_addv8qi3 */ |
| 55689 | case 1135: /* *vec_dupv2sf */ |
| 55690 | case 1134: /* mmx_pswapdv2sf2 */ |
| 55691 | case 1133: /* mmx_floatv2si2 */ |
| 55692 | case 1132: /* mmx_pi2fw */ |
| 55693 | case 1131: /* mmx_pf2iw */ |
| 55694 | case 1130: /* mmx_pf2id */ |
| 55695 | case 1129: /* mmx_gev2sf3 */ |
| 55696 | case 1128: /* mmx_gtv2sf3 */ |
| 55697 | case 1127: /* *mmx_eqv2sf3 */ |
| 55698 | case 1126: /* mmx_addsubv2sf3 */ |
| 55699 | case 1125: /* mmx_hsubv2sf3 */ |
| 55700 | case 1124: /* mmx_haddv2sf3 */ |
| 55701 | case 1123: /* mmx_rsqit1v2sf3 */ |
| 55702 | case 1122: /* mmx_rsqrtv2sf2 */ |
| 55703 | case 1121: /* mmx_rcpit2v2sf3 */ |
| 55704 | case 1120: /* mmx_rcpit1v2sf3 */ |
| 55705 | case 1119: /* mmx_rcpv2sf2 */ |
| 55706 | case 1118: /* mmx_ieee_minv2sf3 */ |
| 55707 | case 1117: /* mmx_ieee_maxv2sf3 */ |
| 55708 | case 1116: /* *mmx_sminv2sf3 */ |
| 55709 | case 1115: /* *mmx_smaxv2sf3 */ |
| 55710 | case 1114: /* *mmx_mulv2sf3 */ |
| 55711 | case 1113: /* *mmx_subv2sf3 */ |
| 55712 | case 1112: /* *mmx_addv2sf3 */ |
| 55713 | case 1081: /* clflushopt */ |
| 55714 | case 1080: /* clwb */ |
| 55715 | case 1008: /* *prefetch_prefetchwt1 */ |
| 55716 | case 1007: /* *prefetch_3dnow */ |
| 55717 | case 1006: /* *prefetch_sse */ |
| 55718 | case 984: /* *xop_pcmov_df */ |
| 55719 | case 983: /* *xop_pcmov_sf */ |
| 55720 | case 932: /* fxamdf2_i387_with_temp */ |
| 55721 | case 931: /* fxamsf2_i387_with_temp */ |
| 55722 | case 930: /* fxamxf2_i387 */ |
| 55723 | case 929: /* fxamdf2_i387 */ |
| 55724 | case 928: /* fxamsf2_i387 */ |
| 55725 | case 909: /* frndintxf2_mask_pm_i387 */ |
| 55726 | case 908: /* frndintxf2_mask_pm */ |
| 55727 | case 907: /* frndintxf2_trunc_i387 */ |
| 55728 | case 906: /* frndintxf2_ceil_i387 */ |
| 55729 | case 905: /* frndintxf2_floor_i387 */ |
| 55730 | case 904: /* frndintdf2_trunc_i387 */ |
| 55731 | case 903: /* frndintdf2_ceil_i387 */ |
| 55732 | case 902: /* frndintdf2_floor_i387 */ |
| 55733 | case 901: /* frndintsf2_trunc_i387 */ |
| 55734 | case 900: /* frndintsf2_ceil_i387 */ |
| 55735 | case 899: /* frndintsf2_floor_i387 */ |
| 55736 | case 898: /* frndintxf2_trunc */ |
| 55737 | case 897: /* frndintxf2_ceil */ |
| 55738 | case 896: /* frndintxf2_floor */ |
| 55739 | case 895: /* frndintdf2_trunc */ |
| 55740 | case 894: /* frndintdf2_ceil */ |
| 55741 | case 893: /* frndintdf2_floor */ |
| 55742 | case 892: /* frndintsf2_trunc */ |
| 55743 | case 891: /* frndintsf2_ceil */ |
| 55744 | case 890: /* frndintsf2_floor */ |
| 55745 | case 889: /* fistsi2_with_temp */ |
| 55746 | case 888: /* fisthi2_with_temp */ |
| 55747 | case 887: /* fistsi2 */ |
| 55748 | case 886: /* fisthi2 */ |
| 55749 | case 885: /* *fistsi2_1 */ |
| 55750 | case 884: /* *fisthi2_1 */ |
| 55751 | case 883: /* fistdi2_with_temp */ |
| 55752 | case 882: /* fistdi2 */ |
| 55753 | case 881: /* *fistdi2_1 */ |
| 55754 | case 880: /* rintdf2_frndint */ |
| 55755 | case 879: /* rintsf2_frndint */ |
| 55756 | case 878: /* rintxf2 */ |
| 55757 | case 875: /* fscalexf4_i387 */ |
| 55758 | case 874: /* *f2xm1xf2_i387 */ |
| 55759 | case 873: /* fxtract_extenddfxf3_i387 */ |
| 55760 | case 872: /* fxtract_extendsfxf3_i387 */ |
| 55761 | case 871: /* fxtractxf3_i387 */ |
| 55762 | case 870: /* fyl2xp1_extenddfxf3_i387 */ |
| 55763 | case 869: /* fyl2xp1_extendsfxf3_i387 */ |
| 55764 | case 868: /* fyl2xp1xf3_i387 */ |
| 55765 | case 867: /* fyl2x_extenddfxf3_i387 */ |
| 55766 | case 866: /* fyl2x_extendsfxf3_i387 */ |
| 55767 | case 865: /* fyl2xxf3_i387 */ |
| 55768 | case 864: /* fpatan_extenddfxf3_i387 */ |
| 55769 | case 863: /* fpatan_extendsfxf3_i387 */ |
| 55770 | case 862: /* *fpatanxf3_i387 */ |
| 55771 | case 861: /* fptan_extenddfxf4_i387 */ |
| 55772 | case 860: /* fptan_extendsfxf4_i387 */ |
| 55773 | case 859: /* fptanxf4_i387 */ |
| 55774 | case 858: /* sincos_extenddfxf3_i387 */ |
| 55775 | case 857: /* sincos_extendsfxf3_i387 */ |
| 55776 | case 856: /* sincosxf3 */ |
| 55777 | case 855: /* *cos_extenddfxf2_i387 */ |
| 55778 | case 854: /* *sin_extenddfxf2_i387 */ |
| 55779 | case 853: /* *cos_extendsfxf2_i387 */ |
| 55780 | case 852: /* *sin_extendsfxf2_i387 */ |
| 55781 | case 851: /* *cosxf2_i387 */ |
| 55782 | case 850: /* *sinxf2_i387 */ |
| 55783 | case 849: /* fprem1xf4_i387 */ |
| 55784 | case 848: /* fpremxf4_i387 */ |
| 55785 | case 847: /* *sqrtdf2_sse */ |
| 55786 | case 846: /* *sqrtsf2_sse */ |
| 55787 | case 845: /* *rsqrtsf2_sse */ |
| 55788 | case 844: /* sqrt_extenddfxf2_i387 */ |
| 55789 | case 843: /* sqrt_extendsfxf2_i387 */ |
| 55790 | case 842: /* sqrtxf2 */ |
| 55791 | case 814: /* *rcpsf2_sse */ |
| 55792 | case 810: /* *tls_dynamic_gnu2_call_64 */ |
| 55793 | case 807: /* *tls_dynamic_gnu2_call_32 */ |
| 55794 | case 685: /* *sibcall_value_pop_memory */ |
| 55795 | case 684: /* *sibcall_value_pop */ |
| 55796 | case 683: /* *call_value_pop */ |
| 55797 | case 682: /* *sibcall_value_memory */ |
| 55798 | case 681: /* *sibcall_value_memory */ |
| 55799 | case 680: /* *sibcall_value */ |
| 55800 | case 679: /* *sibcall_value */ |
| 55801 | case 678: /* *sibcall_value_GOT_32 */ |
| 55802 | case 677: /* *call_value_got_x32 */ |
| 55803 | case 676: /* *call_value */ |
| 55804 | case 675: /* *call_value */ |
| 55805 | case 674: /* *sibcall_pop_memory */ |
| 55806 | case 673: /* *sibcall_pop */ |
| 55807 | case 672: /* *call_pop */ |
| 55808 | case 671: /* *sibcall_memory */ |
| 55809 | case 670: /* *sibcall_memory */ |
| 55810 | case 669: /* *sibcall */ |
| 55811 | case 668: /* *sibcall */ |
| 55812 | case 667: /* *sibcall_GOT_32 */ |
| 55813 | case 666: /* *call_got_x32 */ |
| 55814 | case 665: /* *call */ |
| 55815 | case 664: /* *call */ |
| 55816 | case 209: /* floatdixf2_i387_with_xmm */ |
| 55817 | case 208: /* floatdidf2_i387_with_xmm */ |
| 55818 | case 207: /* floatdisf2_i387_with_xmm */ |
| 55819 | case 193: /* x86_fldcw_1 */ |
| 55820 | case 192: /* x86_fnstcw_1 */ |
| 55821 | case 47: /* x86_fnstsw_1 */ |
| 55822 | case 46: /* *cmpxf_si_cc_i387 */ |
| 55823 | case 45: /* *cmpdf_si_cc_i387 */ |
| 55824 | case 44: /* *cmpsf_si_cc_i387 */ |
| 55825 | case 43: /* *cmpxf_hi_cc_i387 */ |
| 55826 | case 42: /* *cmpdf_hi_cc_i387 */ |
| 55827 | case 41: /* *cmpsf_hi_cc_i387 */ |
| 55828 | case 40: /* *cmpxf_si_i387 */ |
| 55829 | case 39: /* *cmpdf_si_i387 */ |
| 55830 | case 38: /* *cmpsf_si_i387 */ |
| 55831 | case 37: /* *cmpxf_hi_i387 */ |
| 55832 | case 36: /* *cmpdf_hi_i387 */ |
| 55833 | case 35: /* *cmpsf_hi_i387 */ |
| 55834 | case 34: /* *cmpuxf_cc_i387 */ |
| 55835 | case 33: /* *cmpudf_cc_i387 */ |
| 55836 | case 32: /* *cmpusf_cc_i387 */ |
| 55837 | case 31: /* *cmpuxf_i387 */ |
| 55838 | case 30: /* *cmpudf_i387 */ |
| 55839 | case 29: /* *cmpusf_i387 */ |
| 55840 | case 28: /* *cmpdf_cc_i387 */ |
| 55841 | case 27: /* *cmpsf_cc_i387 */ |
| 55842 | case 26: /* *cmpdf_i387 */ |
| 55843 | case 25: /* *cmpsf_i387 */ |
| 55844 | case 24: /* *cmpxf_cc_i387 */ |
| 55845 | case 23: /* *cmpxf_i387 */ |
| 55846 | case 22: /* *cmpxf_0_cc_i387 */ |
| 55847 | case 21: /* *cmpdf_0_cc_i387 */ |
| 55848 | case 20: /* *cmpsf_0_cc_i387 */ |
| 55849 | case 19: /* *cmpxf_0_i387 */ |
| 55850 | case 18: /* *cmpdf_0_i387 */ |
| 55851 | case 17: /* *cmpsf_0_i387 */ |
| 55852 | return 0; |
| 55853 | |
| 55854 | case 659: /* jump */ |
| 55855 | case 628: /* *jcc_2 */ |
| 55856 | case 627: /* *jcc_1 */ |
| 55857 | case 393: /* *testqi_ext_2 */ |
| 55858 | case 392: /* *testqi_ext_1 */ |
| 55859 | case 391: /* *testsi_1 */ |
| 55860 | case 390: /* *testhi_1 */ |
| 55861 | case 389: /* *testqi_1 */ |
| 55862 | case 388: /* *testqi_1_maybe_si */ |
| 55863 | case 387: /* *testdi_1 */ |
| 55864 | case 222: /* *addqi_1_slp */ |
| 55865 | case 16: /* *cmpqi_ext_4 */ |
| 55866 | case 15: /* *cmpqi_ext_3 */ |
| 55867 | case 14: /* *cmpqi_ext_2 */ |
| 55868 | case 13: /* *cmpqi_ext_1 */ |
| 55869 | case 12: /* *cmpdi_minus_1 */ |
| 55870 | case 11: /* *cmpsi_minus_1 */ |
| 55871 | case 10: /* *cmphi_minus_1 */ |
| 55872 | case 9: /* *cmpqi_minus_1 */ |
| 55873 | case 8: /* *cmpdi_1 */ |
| 55874 | case 7: /* *cmpsi_1 */ |
| 55875 | case 6: /* *cmphi_1 */ |
| 55876 | case 5: /* *cmpqi_1 */ |
| 55877 | case 4: /* *cmpdi_ccno_1 */ |
| 55878 | case 3: /* *cmpsi_ccno_1 */ |
| 55879 | case 2: /* *cmphi_ccno_1 */ |
| 55880 | case 1: /* *cmpqi_ccno_1 */ |
| 55881 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) |
| 55882 | { |
| 55883 | return 1; |
| 55884 | } |
| 55885 | else if (cached_memory == MEMORY_LOAD) |
| 55886 | { |
| 55887 | return 5; |
| 55888 | } |
| 55889 | else |
| 55890 | { |
| 55891 | return 0; |
| 55892 | } |
| 55893 | |
| 55894 | case -1: |
| 55895 | if (GET_CODE (PATTERN (insn)) != ASM_INPUT |
| 55896 | && asm_noperands (PATTERN (insn)) < 0) |
| 55897 | fatal_insn_not_found (insn); |
| 55898 | /* FALLTHRU */ |
| 55899 | default: |
| 55900 | extract_insn_cached (insn); |
| 55901 | if (((cached_type = get_attr_type (insn)) == TYPE_CALL) || (cached_type == TYPE_CALLV)) |
| 55902 | { |
| 55903 | return 0; |
| 55904 | } |
| 55905 | else if (cached_type == TYPE_PUSH) |
| 55906 | { |
| 55907 | return 1; |
| 55908 | } |
| 55909 | else if (cached_type == TYPE_POP) |
| 55910 | { |
| 55911 | return 1; |
| 55912 | } |
| 55913 | else if (cached_type == TYPE_LEAVE) |
| 55914 | { |
| 55915 | return 3; |
| 55916 | } |
| 55917 | else if (cached_type == TYPE_LEA) |
| 55918 | { |
| 55919 | return 1; |
| 55920 | } |
| 55921 | else if ((cached_type == TYPE_IMUL) && ((cached_mode = get_attr_mode (insn)) == MODE_DI) && (((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) || (cached_memory == MEMORY_UNKNOWN))) |
| 55922 | { |
| 55923 | return 6; |
| 55924 | } |
| 55925 | else if ((cached_type == TYPE_IMUL) && (((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) || (cached_memory == MEMORY_UNKNOWN))) |
| 55926 | { |
| 55927 | return 4; |
| 55928 | } |
| 55929 | else if ((cached_type == TYPE_IMUL) && ((cached_mode = get_attr_mode (insn)) == MODE_DI) && (((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) || (cached_memory == MEMORY_BOTH))) |
| 55930 | { |
| 55931 | return 10 /* 0xa */; |
| 55932 | } |
| 55933 | else if ((cached_type == TYPE_IMUL) && (((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) || (cached_memory == MEMORY_BOTH))) |
| 55934 | { |
| 55935 | return 8; |
| 55936 | } |
| 55937 | else if ((cached_type == TYPE_IDIV) && (((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) || (cached_memory == MEMORY_UNKNOWN))) |
| 55938 | { |
| 55939 | return 6; |
| 55940 | } |
| 55941 | else if ((cached_type == TYPE_IDIV) && (((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) || (cached_memory == MEMORY_BOTH))) |
| 55942 | { |
| 55943 | return 10 /* 0xa */; |
| 55944 | } |
| 55945 | else if ((cached_type == TYPE_STR) && (((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) || (cached_memory == MEMORY_BOTH) || (cached_memory == MEMORY_STORE))) |
| 55946 | { |
| 55947 | return 6; |
| 55948 | } |
| 55949 | else if (((cached_bdver1_decode = get_attr_bdver1_decode (insn)) == BDVER1_DECODE_DIRECT) && (((cached_unit = get_attr_unit (insn)) == UNIT_INTEGER) || (cached_unit == UNIT_UNKNOWN)) && (((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) || (cached_memory == MEMORY_UNKNOWN))) |
| 55950 | { |
| 55951 | return 1; |
| 55952 | } |
| 55953 | else if ((cached_bdver1_decode == BDVER1_DECODE_VECTOR) && (((cached_unit = get_attr_unit (insn)) == UNIT_INTEGER) || (cached_unit == UNIT_UNKNOWN)) && (((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) || (cached_memory == MEMORY_UNKNOWN))) |
| 55954 | { |
| 55955 | return 2; |
| 55956 | } |
| 55957 | else if ((cached_type == TYPE_IMOV) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 55958 | { |
| 55959 | return 4; |
| 55960 | } |
| 55961 | else if ((cached_bdver1_decode == BDVER1_DECODE_DIRECT) && (((cached_unit = get_attr_unit (insn)) == UNIT_INTEGER) || (cached_unit == UNIT_UNKNOWN)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 55962 | { |
| 55963 | return 5; |
| 55964 | } |
| 55965 | else if ((cached_bdver1_decode == BDVER1_DECODE_VECTOR) && (((cached_unit = get_attr_unit (insn)) == UNIT_INTEGER) || (cached_unit == UNIT_UNKNOWN)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 55966 | { |
| 55967 | return 6; |
| 55968 | } |
| 55969 | else if ((cached_type == TYPE_IMOV) && ((cached_memory = get_attr_memory (insn)) == MEMORY_STORE)) |
| 55970 | { |
| 55971 | return 4; |
| 55972 | } |
| 55973 | else if ((cached_bdver1_decode == BDVER1_DECODE_DIRECT) && (((cached_unit = get_attr_unit (insn)) == UNIT_INTEGER) || (cached_unit == UNIT_UNKNOWN)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_BOTH)) |
| 55974 | { |
| 55975 | return 4; |
| 55976 | } |
| 55977 | else if ((cached_bdver1_decode == BDVER1_DECODE_VECTOR) && (((cached_unit = get_attr_unit (insn)) == UNIT_INTEGER) || (cached_unit == UNIT_UNKNOWN)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_BOTH)) |
| 55978 | { |
| 55979 | return 5; |
| 55980 | } |
| 55981 | else if ((cached_bdver1_decode == BDVER1_DECODE_DIRECT) && (((cached_unit = get_attr_unit (insn)) == UNIT_INTEGER) || (cached_unit == UNIT_UNKNOWN)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_STORE)) |
| 55982 | { |
| 55983 | return 4; |
| 55984 | } |
| 55985 | else if ((cached_bdver1_decode == BDVER1_DECODE_VECTOR) && (((cached_unit = get_attr_unit (insn)) == UNIT_INTEGER) || (cached_unit == UNIT_UNKNOWN)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_STORE)) |
| 55986 | { |
| 55987 | return 5; |
| 55988 | } |
| 55989 | else if ((cached_type == TYPE_FMOV) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) && ((cached_mode = get_attr_mode (insn)) == MODE_XF)) |
| 55990 | { |
| 55991 | return 13 /* 0xd */; |
| 55992 | } |
| 55993 | else if ((cached_type == TYPE_FMOV) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 55994 | { |
| 55995 | return 5; |
| 55996 | } |
| 55997 | else if ((cached_type == TYPE_FMOV) && (((cached_memory = get_attr_memory (insn)) == MEMORY_STORE) || (cached_memory == MEMORY_BOTH)) && ((cached_mode = get_attr_mode (insn)) == MODE_XF)) |
| 55998 | { |
| 55999 | return 8; |
| 56000 | } |
| 56001 | else if ((cached_type == TYPE_FMOV) && (((cached_memory = get_attr_memory (insn)) == MEMORY_STORE) || (cached_memory == MEMORY_BOTH))) |
| 56002 | { |
| 56003 | return 2; |
| 56004 | } |
| 56005 | else if ((cached_type == TYPE_FISTP) || (cached_type == TYPE_FISTTP)) |
| 56006 | { |
| 56007 | return 2; |
| 56008 | } |
| 56009 | else if (cached_type == TYPE_FMOV) |
| 56010 | { |
| 56011 | return 2; |
| 56012 | } |
| 56013 | else if ((cached_type == TYPE_FOP) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 56014 | { |
| 56015 | return 10 /* 0xa */; |
| 56016 | } |
| 56017 | else if (cached_type == TYPE_FOP) |
| 56018 | { |
| 56019 | return 6; |
| 56020 | } |
| 56021 | else if ((cached_type == TYPE_FMUL) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 56022 | { |
| 56023 | return 10 /* 0xa */; |
| 56024 | } |
| 56025 | else if (cached_type == TYPE_FMUL) |
| 56026 | { |
| 56027 | return 6; |
| 56028 | } |
| 56029 | else if (cached_type == TYPE_FSGN) |
| 56030 | { |
| 56031 | return 2; |
| 56032 | } |
| 56033 | else if ((cached_type == TYPE_FDIV) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 56034 | { |
| 56035 | return 46 /* 0x2e */; |
| 56036 | } |
| 56037 | else if (cached_type == TYPE_FDIV) |
| 56038 | { |
| 56039 | return 42 /* 0x2a */; |
| 56040 | } |
| 56041 | else if ((cached_type == TYPE_FPSPC) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 56042 | { |
| 56043 | return 103 /* 0x67 */; |
| 56044 | } |
| 56045 | else if ((cached_type == TYPE_FCMOV) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 56046 | { |
| 56047 | return 17 /* 0x11 */; |
| 56048 | } |
| 56049 | else if (cached_type == TYPE_FCMOV) |
| 56050 | { |
| 56051 | return 15 /* 0xf */; |
| 56052 | } |
| 56053 | else if ((cached_type == TYPE_FCMP) && (cached_bdver1_decode == BDVER1_DECODE_DOUBLE) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 56054 | { |
| 56055 | return 6; |
| 56056 | } |
| 56057 | else if ((cached_bdver1_decode == BDVER1_DECODE_DOUBLE) && (cached_type == TYPE_FCMP)) |
| 56058 | { |
| 56059 | return 2; |
| 56060 | } |
| 56061 | else if ((cached_type == TYPE_FCMP) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 56062 | { |
| 56063 | return 6; |
| 56064 | } |
| 56065 | else if (cached_type == TYPE_FCMP) |
| 56066 | { |
| 56067 | return 2; |
| 56068 | } |
| 56069 | else if (cached_type == TYPE_FXCH) |
| 56070 | { |
| 56071 | return 2; |
| 56072 | } |
| 56073 | else if ((cached_type == TYPE_SSEMOV) && ((cached_prefix = get_attr_prefix (insn)) == PREFIX_VEX) && ((cached_movu = get_attr_movu (insn)) == MOVU_1) && (((cached_mode = get_attr_mode (insn)) == MODE_V4SF) || (cached_mode == MODE_V2DF)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 56074 | { |
| 56075 | return 4; |
| 56076 | } |
| 56077 | else if ((cached_type == TYPE_SSEMOV) && ((cached_movu = get_attr_movu (insn)) == MOVU_1) && (((cached_mode = get_attr_mode (insn)) == MODE_V8SF) || (cached_mode == MODE_V4DF)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 56078 | { |
| 56079 | return 5; |
| 56080 | } |
| 56081 | else if ((cached_type == TYPE_SSEMOV) && ((cached_movu = get_attr_movu (insn)) == MOVU_1) && (((cached_mode = get_attr_mode (insn)) == MODE_V4SF) || (cached_mode == MODE_V2DF)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 56082 | { |
| 56083 | return 4; |
| 56084 | } |
| 56085 | else if ((cached_type == TYPE_SSEMOV) && ((cached_prefix = get_attr_prefix (insn)) == PREFIX_VEX) && (((cached_mode = get_attr_mode (insn)) == MODE_V4SF) || (cached_mode == MODE_V2DF) || (cached_mode == MODE_TI)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 56086 | { |
| 56087 | return 4; |
| 56088 | } |
| 56089 | else if ((cached_type == TYPE_SSEMOV) && (((cached_mode = get_attr_mode (insn)) == MODE_V8SF) || (cached_mode == MODE_V4DF) || (cached_mode == MODE_OI)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 56090 | { |
| 56091 | return 5; |
| 56092 | } |
| 56093 | else if ((cached_type == TYPE_SSEMOV) && (((cached_mode = get_attr_mode (insn)) == MODE_V4SF) || (cached_mode == MODE_V2DF) || (cached_mode == MODE_TI)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 56094 | { |
| 56095 | return 4; |
| 56096 | } |
| 56097 | else if ((cached_type == TYPE_SSEMOV) && ((cached_mode = get_attr_mode (insn)) == MODE_DI) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 56098 | { |
| 56099 | return 4; |
| 56100 | } |
| 56101 | else if ((cached_type == TYPE_SSEMOV) && ((cached_prefix = get_attr_prefix (insn)) == PREFIX_VEX) && ((cached_mode = get_attr_mode (insn)) == MODE_SF) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 56102 | { |
| 56103 | return 4; |
| 56104 | } |
| 56105 | else if ((cached_type == TYPE_SSEMOV) && (((cached_mode = get_attr_mode (insn)) == MODE_SF) || (cached_mode == MODE_DF)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 56106 | { |
| 56107 | return 4; |
| 56108 | } |
| 56109 | else if (((cached_type == TYPE_MMXMOV) || (cached_type == TYPE_SSEMOV)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 56110 | { |
| 56111 | return 4; |
| 56112 | } |
| 56113 | else if ((cached_type == TYPE_SSEMOV) && (((cached_mode = get_attr_mode (insn)) == MODE_V8SF) || (cached_mode == MODE_V4DF) || (cached_mode == MODE_OI)) && (((cached_memory = get_attr_memory (insn)) == MEMORY_STORE) || (cached_memory == MEMORY_BOTH))) |
| 56114 | { |
| 56115 | return 5; |
| 56116 | } |
| 56117 | else if ((cached_type == TYPE_SSEMOV) && (((cached_mode = get_attr_mode (insn)) == MODE_V4SF) || (cached_mode == MODE_V2DF) || (cached_mode == MODE_TI)) && (((cached_memory = get_attr_memory (insn)) == MEMORY_STORE) || (cached_memory == MEMORY_BOTH))) |
| 56118 | { |
| 56119 | return 4; |
| 56120 | } |
| 56121 | else if (((cached_type == TYPE_MMXMOV) || (cached_type == TYPE_SSEMOV)) && (((cached_memory = get_attr_memory (insn)) == MEMORY_STORE) || (cached_memory == MEMORY_BOTH))) |
| 56122 | { |
| 56123 | return 4; |
| 56124 | } |
| 56125 | else if ((cached_type == TYPE_SSEMOV) && (((cached_mode = get_attr_mode (insn)) == MODE_V8SF) || (cached_mode == MODE_V4DF) || (cached_mode == MODE_OI)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 56126 | { |
| 56127 | return 3; |
| 56128 | } |
| 56129 | else if ((cached_type == TYPE_SSEMOV) && (((cached_mode = get_attr_mode (insn)) == MODE_SF) || (cached_mode == MODE_DF)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 56130 | { |
| 56131 | return 2; |
| 56132 | } |
| 56133 | else if (((cached_type == TYPE_MMXMOV) || (cached_type == TYPE_SSEMOV)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 56134 | { |
| 56135 | return 2; |
| 56136 | } |
| 56137 | else if (((cached_type == TYPE_SSELOG) || (cached_type == TYPE_SSELOG1) || (cached_type == TYPE_SSESHUF) || (cached_type == TYPE_SSESHUF1)) && ((cached_mode = get_attr_mode (insn)) == MODE_V8SF) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 56138 | { |
| 56139 | return 7; |
| 56140 | } |
| 56141 | else if (((cached_type == TYPE_SSELOG) || (cached_type == TYPE_SSELOG1) || (cached_type == TYPE_SSESHUF) || (cached_type == TYPE_SSESHUF1)) && ((cached_mode = get_attr_mode (insn)) == MODE_V8SF)) |
| 56142 | { |
| 56143 | return 3; |
| 56144 | } |
| 56145 | else if (((cached_type == TYPE_SSELOG) || (cached_type == TYPE_SSELOG1) || (cached_type == TYPE_SSESHUF) || (cached_type == TYPE_SSESHUF1)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 56146 | { |
| 56147 | return 6; |
| 56148 | } |
| 56149 | else if ((cached_type == TYPE_SSELOG) || (cached_type == TYPE_SSELOG1) || (cached_type == TYPE_SSESHUF) || (cached_type == TYPE_SSESHUF1)) |
| 56150 | { |
| 56151 | return 2; |
| 56152 | } |
| 56153 | else if ((cached_type == TYPE_SSECMP) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 56154 | { |
| 56155 | return 6; |
| 56156 | } |
| 56157 | else if (cached_type == TYPE_SSECMP) |
| 56158 | { |
| 56159 | return 2; |
| 56160 | } |
| 56161 | else if ((cached_type == TYPE_SSECOMI) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 56162 | { |
| 56163 | return 6; |
| 56164 | } |
| 56165 | else if (cached_type == TYPE_SSECOMI) |
| 56166 | { |
| 56167 | return 2; |
| 56168 | } |
| 56169 | else if ((cached_type == TYPE_SSECVT) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) && (((register_operand (operands[0], V4DFmode)) || (register_operand (operands[0], V8SFmode)) || (register_operand (operands[0], V8SImode))) || (nonimmediate_operand (operands[1], V4DFmode)) || (nonimmediate_operand (operands[1], V8SFmode)) || (nonimmediate_operand (operands[1], V8SImode)))) |
| 56170 | { |
| 56171 | return 8; |
| 56172 | } |
| 56173 | else if ((cached_type == TYPE_SSECVT) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) && (((register_operand (operands[0], V4DFmode)) || (register_operand (operands[0], V8SFmode)) || (register_operand (operands[0], V8SImode))) || (nonimmediate_operand (operands[1], V4DFmode)) || (nonimmediate_operand (operands[1], V8SFmode)) || (nonimmediate_operand (operands[1], V8SImode)))) |
| 56174 | { |
| 56175 | return 4; |
| 56176 | } |
| 56177 | else if ((cached_type == TYPE_SSECVT) && (((cached_mode = get_attr_mode (insn)) == MODE_SF) || (cached_mode == MODE_DF)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 56178 | { |
| 56179 | return 8; |
| 56180 | } |
| 56181 | else if ((cached_type == TYPE_SSECVT) && (((cached_mode = get_attr_mode (insn)) == MODE_SF) || (cached_mode == MODE_DF)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 56182 | { |
| 56183 | return 4; |
| 56184 | } |
| 56185 | else if ((cached_type == TYPE_SSEICVT) && (((cached_mode = get_attr_mode (insn)) == MODE_SF) || (cached_mode == MODE_DF)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 56186 | { |
| 56187 | return 8; |
| 56188 | } |
| 56189 | else if ((cached_type == TYPE_SSEICVT) && (((cached_mode = get_attr_mode (insn)) == MODE_SF) || (cached_mode == MODE_DF)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 56190 | { |
| 56191 | return 4; |
| 56192 | } |
| 56193 | else if ((cached_type == TYPE_SSECVT) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) && (register_operand (operands[0], V4SFmode)) && (nonimmediate_operand (operands[1], V2DFmode))) |
| 56194 | { |
| 56195 | return 8; |
| 56196 | } |
| 56197 | else if ((cached_type == TYPE_SSECVT) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) && (register_operand (operands[0], V4SFmode)) && (nonimmediate_operand (operands[1], V2DFmode))) |
| 56198 | { |
| 56199 | return 4; |
| 56200 | } |
| 56201 | else if ((cached_type == TYPE_SSECVT) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) && (register_operand (operands[0], V4SFmode)) && ((nonimmediate_operand (operands[1], V2SImode)) || (nonimmediate_operand (operands[1], V4SImode)))) |
| 56202 | { |
| 56203 | return 8; |
| 56204 | } |
| 56205 | else if ((cached_type == TYPE_SSECVT) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) && (register_operand (operands[0], V4SFmode)) && ((nonimmediate_operand (operands[1], V2SImode)) || (nonimmediate_operand (operands[1], V4SImode)))) |
| 56206 | { |
| 56207 | return 4; |
| 56208 | } |
| 56209 | else if ((cached_type == TYPE_SSECVT) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) && (register_operand (operands[0], V2DFmode)) && (nonimmediate_operand (operands[1], V4SImode))) |
| 56210 | { |
| 56211 | return 8; |
| 56212 | } |
| 56213 | else if ((cached_type == TYPE_SSECVT) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) && (register_operand (operands[0], V2DFmode)) && (nonimmediate_operand (operands[1], V4SImode))) |
| 56214 | { |
| 56215 | return 4; |
| 56216 | } |
| 56217 | else if ((cached_type == TYPE_SSECVT) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) && (register_operand (operands[0], V2DFmode)) && ((nonimmediate_operand (operands[1], V2SImode)) || (nonimmediate_operand (operands[1], V4SFmode)))) |
| 56218 | { |
| 56219 | return 6; |
| 56220 | } |
| 56221 | else if ((cached_type == TYPE_SSECVT) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) && (register_operand (operands[0], V2DFmode)) && ((nonimmediate_operand (operands[1], V2SImode)) || (nonimmediate_operand (operands[1], V4SFmode)))) |
| 56222 | { |
| 56223 | return 2; |
| 56224 | } |
| 56225 | else if ((cached_type == TYPE_SSEICVT) && (((cached_mode = get_attr_mode (insn)) == MODE_SI) || (cached_mode == MODE_DI)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 56226 | { |
| 56227 | return 8; |
| 56228 | } |
| 56229 | else if ((cached_type == TYPE_SSEICVT) && (((cached_mode = get_attr_mode (insn)) == MODE_SI) || (cached_mode == MODE_DI)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 56230 | { |
| 56231 | return 4; |
| 56232 | } |
| 56233 | else if ((cached_type == TYPE_SSECVT) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) && (nonimmediate_operand (operands[1], V2DFmode)) && (register_operand (operands[0], V2SImode))) |
| 56234 | { |
| 56235 | return 8; |
| 56236 | } |
| 56237 | else if ((cached_type == TYPE_SSECVT) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) && (nonimmediate_operand (operands[1], V2DFmode)) && (register_operand (operands[0], V2SImode))) |
| 56238 | { |
| 56239 | return 4; |
| 56240 | } |
| 56241 | else if ((cached_type == TYPE_SSECVT) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) && (nonimmediate_operand (operands[1], V2DFmode)) && (register_operand (operands[0], V4SImode))) |
| 56242 | { |
| 56243 | return 6; |
| 56244 | } |
| 56245 | else if ((cached_type == TYPE_SSECVT) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) && (nonimmediate_operand (operands[1], V2DFmode)) && (register_operand (operands[0], V4SImode))) |
| 56246 | { |
| 56247 | return 2; |
| 56248 | } |
| 56249 | else if ((cached_type == TYPE_SSECVT) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) && (nonimmediate_operand (operands[1], V4SFmode)) && ((register_operand (operands[0], V2SImode)) || (register_operand (operands[0], V4SImode)))) |
| 56250 | { |
| 56251 | return 8; |
| 56252 | } |
| 56253 | else if ((cached_type == TYPE_SSECVT) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) && (nonimmediate_operand (operands[1], V4SFmode)) && ((register_operand (operands[0], V2SImode)) || (register_operand (operands[0], V4SImode)))) |
| 56254 | { |
| 56255 | return 4; |
| 56256 | } |
| 56257 | else if (((cached_type == TYPE_SSEMUL) || (cached_type == TYPE_SSEADD) || (cached_type == TYPE_SSEADD1) || (cached_type == TYPE_SSEMULADD)) && (((cached_mode = get_attr_mode (insn)) == MODE_V8SF) || (cached_mode == MODE_V4DF)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 56258 | { |
| 56259 | return 11 /* 0xb */; |
| 56260 | } |
| 56261 | else if (((cached_type == TYPE_SSEMUL) || (cached_type == TYPE_SSEADD) || (cached_type == TYPE_SSEADD1) || (cached_type == TYPE_SSEMULADD)) && (((cached_mode = get_attr_mode (insn)) == MODE_V8SF) || (cached_mode == MODE_V4DF)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 56262 | { |
| 56263 | return 7; |
| 56264 | } |
| 56265 | else if (((cached_type == TYPE_SSEMUL) || (cached_type == TYPE_SSEADD) || (cached_type == TYPE_SSEADD1) || (cached_type == TYPE_SSEMULADD)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 56266 | { |
| 56267 | return 10 /* 0xa */; |
| 56268 | } |
| 56269 | else if (((cached_type == TYPE_SSEMUL) || (cached_type == TYPE_SSEADD) || (cached_type == TYPE_SSEADD1) || (cached_type == TYPE_SSEMULADD)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 56270 | { |
| 56271 | return 6; |
| 56272 | } |
| 56273 | else if ((cached_type == TYPE_SSEIMUL) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 56274 | { |
| 56275 | return 8; |
| 56276 | } |
| 56277 | else if ((cached_type == TYPE_SSEIMUL) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 56278 | { |
| 56279 | return 4; |
| 56280 | } |
| 56281 | else if ((cached_type == TYPE_SSEIADD) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 56282 | { |
| 56283 | return 6; |
| 56284 | } |
| 56285 | else if ((cached_type == TYPE_SSEIADD) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 56286 | { |
| 56287 | return 2; |
| 56288 | } |
| 56289 | else if ((cached_type == TYPE_SSEDIV) && ((cached_mode = get_attr_mode (insn)) == MODE_V4DF) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 56290 | { |
| 56291 | return 31 /* 0x1f */; |
| 56292 | } |
| 56293 | else if ((cached_type == TYPE_SSEDIV) && ((cached_mode = get_attr_mode (insn)) == MODE_V4DF) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 56294 | { |
| 56295 | return 27 /* 0x1b */; |
| 56296 | } |
| 56297 | else if ((cached_type == TYPE_SSEDIV) && ((cached_mode = get_attr_mode (insn)) == MODE_V8SF) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 56298 | { |
| 56299 | return 28 /* 0x1c */; |
| 56300 | } |
| 56301 | else if ((cached_type == TYPE_SSEDIV) && ((cached_mode = get_attr_mode (insn)) == MODE_V8SF) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 56302 | { |
| 56303 | return 24 /* 0x18 */; |
| 56304 | } |
| 56305 | else if ((cached_type == TYPE_SSEDIV) && (((cached_mode = get_attr_mode (insn)) == MODE_DF) || (cached_mode == MODE_V2DF)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 56306 | { |
| 56307 | return 31 /* 0x1f */; |
| 56308 | } |
| 56309 | else if ((cached_type == TYPE_SSEDIV) && (((cached_mode = get_attr_mode (insn)) == MODE_DF) || (cached_mode == MODE_V2DF)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 56310 | { |
| 56311 | return 27 /* 0x1b */; |
| 56312 | } |
| 56313 | else if ((cached_type == TYPE_SSEDIV) && (((cached_mode = get_attr_mode (insn)) == MODE_SF) || (cached_mode == MODE_V4SF)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 56314 | { |
| 56315 | return 28 /* 0x1c */; |
| 56316 | } |
| 56317 | else if ((cached_type == TYPE_SSEDIV) && (((cached_mode = get_attr_mode (insn)) == MODE_SF) || (cached_mode == MODE_V4SF)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 56318 | { |
| 56319 | return 24 /* 0x18 */; |
| 56320 | } |
| 56321 | else if ((cached_type == TYPE_SSEINS) && ((cached_mode = get_attr_mode (insn)) == MODE_TI)) |
| 56322 | { |
| 56323 | return 3; |
| 56324 | } |
| 56325 | else |
| 56326 | { |
| 56327 | return 0; |
| 56328 | } |
| 56329 | |
| 56330 | } |
| 56331 | } |
| 56332 | |
| 56333 | int |
| 56334 | insn_default_latency_bdver3 (rtx_insn *insn ATTRIBUTE_UNUSED) |
| 56335 | { |
| 56336 | enum attr_memory cached_memory ATTRIBUTE_UNUSED; |
| 56337 | enum attr_type cached_type ATTRIBUTE_UNUSED; |
| 56338 | enum attr_mode cached_mode ATTRIBUTE_UNUSED; |
| 56339 | enum attr_bdver1_decode cached_bdver1_decode ATTRIBUTE_UNUSED; |
| 56340 | enum attr_unit cached_unit ATTRIBUTE_UNUSED; |
| 56341 | enum attr_prefix cached_prefix ATTRIBUTE_UNUSED; |
| 56342 | enum attr_movu cached_movu ATTRIBUTE_UNUSED; |
| 56343 | |
| 56344 | switch (recog_memoized (insn)) |
| 56345 | { |
| 56346 | case 3904: /* sse4_2_pcmpistr_cconly */ |
| 56347 | case 3900: /* sse4_2_pcmpestr_cconly */ |
| 56348 | extract_constrain_insn_cached (insn); |
| 56349 | if (!((1 << which_alternative) & 0x5)) |
| 56350 | { |
| 56351 | return 6; |
| 56352 | } |
| 56353 | else |
| 56354 | { |
| 56355 | return 2; |
| 56356 | } |
| 56357 | |
| 56358 | case 3903: /* sse4_2_pcmpistrm */ |
| 56359 | case 3902: /* sse4_2_pcmpistri */ |
| 56360 | case 3901: /* sse4_2_pcmpistr */ |
| 56361 | case 3899: /* sse4_2_pcmpestrm */ |
| 56362 | case 3898: /* sse4_2_pcmpestri */ |
| 56363 | case 3897: /* sse4_2_pcmpestr */ |
| 56364 | extract_constrain_insn_cached (insn); |
| 56365 | if (which_alternative != 0) |
| 56366 | { |
| 56367 | return 6; |
| 56368 | } |
| 56369 | else |
| 56370 | { |
| 56371 | return 2; |
| 56372 | } |
| 56373 | |
| 56374 | case 3634: /* *vec_extractv4si */ |
| 56375 | extract_constrain_insn_cached (insn); |
| 56376 | if ((((1 << which_alternative) & 0x3)) && (get_attr_memory (insn) == MEMORY_LOAD)) |
| 56377 | { |
| 56378 | return 6; |
| 56379 | } |
| 56380 | else if (((1 << which_alternative) & 0x3)) |
| 56381 | { |
| 56382 | return 2; |
| 56383 | } |
| 56384 | else |
| 56385 | { |
| 56386 | return 0; |
| 56387 | } |
| 56388 | |
| 56389 | case 3706: /* ssse3_pmaddubsw */ |
| 56390 | case 3705: /* ssse3_pmaddubsw128 */ |
| 56391 | case 3702: /* avx512bw_pmaddubsw512v32hi_mask */ |
| 56392 | case 3701: /* avx512bw_pmaddubsw512v32hi */ |
| 56393 | case 3700: /* avx512bw_pmaddubsw512v16hi_mask */ |
| 56394 | case 3699: /* avx512bw_pmaddubsw512v16hi */ |
| 56395 | case 3698: /* avx512bw_pmaddubsw512v8hi_mask */ |
| 56396 | case 3697: /* avx512bw_pmaddubsw512v8hi */ |
| 56397 | case 3696: /* avx2_pmaddubsw256 */ |
| 56398 | case 3695: /* ssse3_phsubdv2si3 */ |
| 56399 | case 3694: /* ssse3_phadddv2si3 */ |
| 56400 | case 3693: /* ssse3_phsubdv4si3 */ |
| 56401 | case 3692: /* ssse3_phadddv4si3 */ |
| 56402 | case 3691: /* avx2_phsubdv8si3 */ |
| 56403 | case 3690: /* avx2_phadddv8si3 */ |
| 56404 | case 3689: /* ssse3_phsubswv4hi3 */ |
| 56405 | case 3688: /* ssse3_phsubwv4hi3 */ |
| 56406 | case 3687: /* ssse3_phaddswv4hi3 */ |
| 56407 | case 3686: /* ssse3_phaddwv4hi3 */ |
| 56408 | case 3685: /* ssse3_phsubswv8hi3 */ |
| 56409 | case 3684: /* ssse3_phsubwv8hi3 */ |
| 56410 | case 3683: /* ssse3_phaddswv8hi3 */ |
| 56411 | case 3682: /* ssse3_phaddwv8hi3 */ |
| 56412 | case 3681: /* avx2_phsubswv16hi3 */ |
| 56413 | case 3680: /* avx2_phsubwv16hi3 */ |
| 56414 | case 3679: /* avx2_phaddswv16hi3 */ |
| 56415 | case 3678: /* avx2_phaddwv16hi3 */ |
| 56416 | case 3657: /* sse2_psadbw */ |
| 56417 | case 3656: /* avx2_psadbw */ |
| 56418 | case 3655: /* avx512f_psadbw */ |
| 56419 | case 3654: /* *sse2_uavgv8hi3_mask */ |
| 56420 | case 3653: /* *sse2_uavgv8hi3 */ |
| 56421 | case 3652: /* *avx2_uavgv16hi3_mask */ |
| 56422 | case 3651: /* *avx2_uavgv16hi3 */ |
| 56423 | case 3650: /* *avx512bw_uavgv32hi3_mask */ |
| 56424 | case 3649: /* *avx512bw_uavgv32hi3 */ |
| 56425 | case 3648: /* *sse2_uavgv16qi3_mask */ |
| 56426 | case 3647: /* *sse2_uavgv16qi3 */ |
| 56427 | case 3646: /* *avx2_uavgv32qi3_mask */ |
| 56428 | case 3645: /* *avx2_uavgv32qi3 */ |
| 56429 | case 3644: /* *avx512bw_uavgv64qi3_mask */ |
| 56430 | case 3643: /* *avx512bw_uavgv64qi3 */ |
| 56431 | case 3319: /* *uminv16qi3 */ |
| 56432 | case 3318: /* *umaxv16qi3 */ |
| 56433 | case 3317: /* *sse4_1_uminv4si3_mask */ |
| 56434 | case 3316: /* *sse4_1_uminv4si3 */ |
| 56435 | case 3315: /* *sse4_1_umaxv4si3_mask */ |
| 56436 | case 3314: /* *sse4_1_umaxv4si3 */ |
| 56437 | case 3313: /* *sse4_1_uminv8hi3_mask */ |
| 56438 | case 3312: /* *sse4_1_uminv8hi3 */ |
| 56439 | case 3311: /* *sse4_1_umaxv8hi3_mask */ |
| 56440 | case 3310: /* *sse4_1_umaxv8hi3 */ |
| 56441 | case 3309: /* *sminv8hi3 */ |
| 56442 | case 3308: /* *smaxv8hi3 */ |
| 56443 | case 3307: /* *sse4_1_sminv4si3_mask */ |
| 56444 | case 3306: /* *sse4_1_sminv4si3 */ |
| 56445 | case 3305: /* *sse4_1_smaxv4si3_mask */ |
| 56446 | case 3304: /* *sse4_1_smaxv4si3 */ |
| 56447 | case 3303: /* *sse4_1_sminv16qi3_mask */ |
| 56448 | case 3302: /* *sse4_1_sminv16qi3 */ |
| 56449 | case 3301: /* *sse4_1_smaxv16qi3_mask */ |
| 56450 | case 3300: /* *sse4_1_smaxv16qi3 */ |
| 56451 | case 3299: /* uminv8hi3_mask */ |
| 56452 | case 3298: /* *uminv8hi3 */ |
| 56453 | case 3297: /* umaxv8hi3_mask */ |
| 56454 | case 3296: /* *umaxv8hi3 */ |
| 56455 | case 3295: /* sminv8hi3_mask */ |
| 56456 | case 3294: /* *sminv8hi3 */ |
| 56457 | case 3293: /* smaxv8hi3_mask */ |
| 56458 | case 3292: /* *smaxv8hi3 */ |
| 56459 | case 3291: /* uminv16hi3_mask */ |
| 56460 | case 3290: /* *uminv16hi3 */ |
| 56461 | case 3289: /* umaxv16hi3_mask */ |
| 56462 | case 3288: /* *umaxv16hi3 */ |
| 56463 | case 3287: /* sminv16hi3_mask */ |
| 56464 | case 3286: /* *sminv16hi3 */ |
| 56465 | case 3285: /* smaxv16hi3_mask */ |
| 56466 | case 3284: /* *smaxv16hi3 */ |
| 56467 | case 3283: /* uminv32hi3_mask */ |
| 56468 | case 3282: /* *uminv32hi3 */ |
| 56469 | case 3281: /* umaxv32hi3_mask */ |
| 56470 | case 3280: /* *umaxv32hi3 */ |
| 56471 | case 3279: /* sminv32hi3_mask */ |
| 56472 | case 3278: /* *sminv32hi3 */ |
| 56473 | case 3277: /* smaxv32hi3_mask */ |
| 56474 | case 3276: /* *smaxv32hi3 */ |
| 56475 | case 3275: /* uminv32qi3_mask */ |
| 56476 | case 3274: /* *uminv32qi3 */ |
| 56477 | case 3273: /* umaxv32qi3_mask */ |
| 56478 | case 3272: /* *umaxv32qi3 */ |
| 56479 | case 3271: /* sminv32qi3_mask */ |
| 56480 | case 3270: /* *sminv32qi3 */ |
| 56481 | case 3269: /* smaxv32qi3_mask */ |
| 56482 | case 3268: /* *smaxv32qi3 */ |
| 56483 | case 3267: /* uminv16qi3_mask */ |
| 56484 | case 3266: /* *uminv16qi3 */ |
| 56485 | case 3265: /* umaxv16qi3_mask */ |
| 56486 | case 3264: /* *umaxv16qi3 */ |
| 56487 | case 3263: /* sminv16qi3_mask */ |
| 56488 | case 3262: /* *sminv16qi3 */ |
| 56489 | case 3261: /* smaxv16qi3_mask */ |
| 56490 | case 3260: /* *smaxv16qi3 */ |
| 56491 | case 3259: /* uminv64qi3_mask */ |
| 56492 | case 3258: /* *uminv64qi3 */ |
| 56493 | case 3257: /* umaxv64qi3_mask */ |
| 56494 | case 3256: /* *umaxv64qi3 */ |
| 56495 | case 3255: /* sminv64qi3_mask */ |
| 56496 | case 3254: /* *sminv64qi3 */ |
| 56497 | case 3253: /* smaxv64qi3_mask */ |
| 56498 | case 3252: /* *smaxv64qi3 */ |
| 56499 | case 3251: /* *avx512f_uminv2di3_mask */ |
| 56500 | case 3250: /* *avx512f_uminv2di3 */ |
| 56501 | case 3249: /* *avx512f_umaxv2di3_mask */ |
| 56502 | case 3248: /* *avx512f_umaxv2di3 */ |
| 56503 | case 3247: /* *avx512f_sminv2di3_mask */ |
| 56504 | case 3246: /* *avx512f_sminv2di3 */ |
| 56505 | case 3245: /* *avx512f_smaxv2di3_mask */ |
| 56506 | case 3244: /* *avx512f_smaxv2di3 */ |
| 56507 | case 3243: /* *avx512f_uminv4di3_mask */ |
| 56508 | case 3242: /* *avx512f_uminv4di3 */ |
| 56509 | case 3241: /* *avx512f_umaxv4di3_mask */ |
| 56510 | case 3240: /* *avx512f_umaxv4di3 */ |
| 56511 | case 3239: /* *avx512f_sminv4di3_mask */ |
| 56512 | case 3238: /* *avx512f_sminv4di3 */ |
| 56513 | case 3237: /* *avx512f_smaxv4di3_mask */ |
| 56514 | case 3236: /* *avx512f_smaxv4di3 */ |
| 56515 | case 3235: /* *avx512f_uminv8di3_mask */ |
| 56516 | case 3234: /* *avx512f_uminv8di3 */ |
| 56517 | case 3233: /* *avx512f_umaxv8di3_mask */ |
| 56518 | case 3232: /* *avx512f_umaxv8di3 */ |
| 56519 | case 3231: /* *avx512f_sminv8di3_mask */ |
| 56520 | case 3230: /* *avx512f_sminv8di3 */ |
| 56521 | case 3229: /* *avx512f_smaxv8di3_mask */ |
| 56522 | case 3228: /* *avx512f_smaxv8di3 */ |
| 56523 | case 3227: /* *avx512f_uminv4si3_mask */ |
| 56524 | case 3226: /* *avx512f_uminv4si3 */ |
| 56525 | case 3225: /* *avx512f_umaxv4si3_mask */ |
| 56526 | case 3224: /* *avx512f_umaxv4si3 */ |
| 56527 | case 3223: /* *avx512f_sminv4si3_mask */ |
| 56528 | case 3222: /* *avx512f_sminv4si3 */ |
| 56529 | case 3221: /* *avx512f_smaxv4si3_mask */ |
| 56530 | case 3220: /* *avx512f_smaxv4si3 */ |
| 56531 | case 3219: /* *avx512f_uminv8si3_mask */ |
| 56532 | case 3218: /* *avx512f_uminv8si3 */ |
| 56533 | case 3217: /* *avx512f_umaxv8si3_mask */ |
| 56534 | case 3216: /* *avx512f_umaxv8si3 */ |
| 56535 | case 3215: /* *avx512f_sminv8si3_mask */ |
| 56536 | case 3214: /* *avx512f_sminv8si3 */ |
| 56537 | case 3213: /* *avx512f_smaxv8si3_mask */ |
| 56538 | case 3212: /* *avx512f_smaxv8si3 */ |
| 56539 | case 3211: /* *avx512f_uminv16si3_mask */ |
| 56540 | case 3210: /* *avx512f_uminv16si3 */ |
| 56541 | case 3209: /* *avx512f_umaxv16si3_mask */ |
| 56542 | case 3208: /* *avx512f_umaxv16si3 */ |
| 56543 | case 3207: /* *avx512f_sminv16si3_mask */ |
| 56544 | case 3206: /* *avx512f_sminv16si3 */ |
| 56545 | case 3205: /* *avx512f_smaxv16si3_mask */ |
| 56546 | case 3204: /* *avx512f_smaxv16si3 */ |
| 56547 | case 3203: /* *avx2_uminv8si3 */ |
| 56548 | case 3202: /* *avx2_umaxv8si3 */ |
| 56549 | case 3201: /* *avx2_sminv8si3 */ |
| 56550 | case 3200: /* *avx2_smaxv8si3 */ |
| 56551 | case 3199: /* *avx2_uminv16hi3 */ |
| 56552 | case 3198: /* *avx2_umaxv16hi3 */ |
| 56553 | case 3197: /* *avx2_sminv16hi3 */ |
| 56554 | case 3196: /* *avx2_smaxv16hi3 */ |
| 56555 | case 3195: /* *avx2_uminv32qi3 */ |
| 56556 | case 3194: /* *avx2_umaxv32qi3 */ |
| 56557 | case 3193: /* *avx2_sminv32qi3 */ |
| 56558 | case 3192: /* *avx2_smaxv32qi3 */ |
| 56559 | case 3067: /* *sse2_pmaddwd */ |
| 56560 | case 3066: /* *avx2_pmaddwd */ |
| 56561 | case 3065: /* avx512bw_pmaddwd512v8hi_mask */ |
| 56562 | case 3064: /* avx512bw_pmaddwd512v8hi */ |
| 56563 | case 3063: /* avx512bw_pmaddwd512v16hi_mask */ |
| 56564 | case 3062: /* avx512bw_pmaddwd512v16hi */ |
| 56565 | case 3061: /* avx512bw_pmaddwd512v32hi_mask */ |
| 56566 | case 3060: /* avx512bw_pmaddwd512v32hi */ |
| 56567 | case 3029: /* *sse2_ussubv8hi3_mask */ |
| 56568 | case 3028: /* *sse2_ussubv8hi3 */ |
| 56569 | case 3027: /* *sse2_sssubv8hi3_mask */ |
| 56570 | case 3026: /* *sse2_sssubv8hi3 */ |
| 56571 | case 3025: /* *sse2_usaddv8hi3_mask */ |
| 56572 | case 3024: /* *sse2_usaddv8hi3 */ |
| 56573 | case 3023: /* *sse2_ssaddv8hi3_mask */ |
| 56574 | case 3022: /* *sse2_ssaddv8hi3 */ |
| 56575 | case 3021: /* *avx2_ussubv16hi3_mask */ |
| 56576 | case 3020: /* *avx2_ussubv16hi3 */ |
| 56577 | case 3019: /* *avx2_sssubv16hi3_mask */ |
| 56578 | case 3018: /* *avx2_sssubv16hi3 */ |
| 56579 | case 3017: /* *avx2_usaddv16hi3_mask */ |
| 56580 | case 3016: /* *avx2_usaddv16hi3 */ |
| 56581 | case 3015: /* *avx2_ssaddv16hi3_mask */ |
| 56582 | case 3014: /* *avx2_ssaddv16hi3 */ |
| 56583 | case 3013: /* *avx512bw_ussubv32hi3_mask */ |
| 56584 | case 3012: /* *avx512bw_ussubv32hi3 */ |
| 56585 | case 3011: /* *avx512bw_sssubv32hi3_mask */ |
| 56586 | case 3010: /* *avx512bw_sssubv32hi3 */ |
| 56587 | case 3009: /* *avx512bw_usaddv32hi3_mask */ |
| 56588 | case 3008: /* *avx512bw_usaddv32hi3 */ |
| 56589 | case 3007: /* *avx512bw_ssaddv32hi3_mask */ |
| 56590 | case 3006: /* *avx512bw_ssaddv32hi3 */ |
| 56591 | case 3005: /* *sse2_ussubv16qi3_mask */ |
| 56592 | case 3004: /* *sse2_ussubv16qi3 */ |
| 56593 | case 3003: /* *sse2_sssubv16qi3_mask */ |
| 56594 | case 3002: /* *sse2_sssubv16qi3 */ |
| 56595 | case 3001: /* *sse2_usaddv16qi3_mask */ |
| 56596 | case 3000: /* *sse2_usaddv16qi3 */ |
| 56597 | case 2999: /* *sse2_ssaddv16qi3_mask */ |
| 56598 | case 2998: /* *sse2_ssaddv16qi3 */ |
| 56599 | case 2997: /* *avx2_ussubv32qi3_mask */ |
| 56600 | case 2996: /* *avx2_ussubv32qi3 */ |
| 56601 | case 2995: /* *avx2_sssubv32qi3_mask */ |
| 56602 | case 2994: /* *avx2_sssubv32qi3 */ |
| 56603 | case 2993: /* *avx2_usaddv32qi3_mask */ |
| 56604 | case 2992: /* *avx2_usaddv32qi3 */ |
| 56605 | case 2991: /* *avx2_ssaddv32qi3_mask */ |
| 56606 | case 2990: /* *avx2_ssaddv32qi3 */ |
| 56607 | case 2989: /* *avx512bw_ussubv64qi3_mask */ |
| 56608 | case 2988: /* *avx512bw_ussubv64qi3 */ |
| 56609 | case 2987: /* *avx512bw_sssubv64qi3_mask */ |
| 56610 | case 2986: /* *avx512bw_sssubv64qi3 */ |
| 56611 | case 2985: /* *avx512bw_usaddv64qi3_mask */ |
| 56612 | case 2984: /* *avx512bw_usaddv64qi3 */ |
| 56613 | case 2983: /* *avx512bw_ssaddv64qi3_mask */ |
| 56614 | case 2982: /* *avx512bw_ssaddv64qi3 */ |
| 56615 | case 2981: /* *subv8hi3_mask */ |
| 56616 | case 2980: /* *addv8hi3_mask */ |
| 56617 | case 2979: /* *subv16hi3_mask */ |
| 56618 | case 2978: /* *addv16hi3_mask */ |
| 56619 | case 2977: /* *subv32hi3_mask */ |
| 56620 | case 2976: /* *addv32hi3_mask */ |
| 56621 | case 2975: /* *subv32qi3_mask */ |
| 56622 | case 2974: /* *addv32qi3_mask */ |
| 56623 | case 2973: /* *subv16qi3_mask */ |
| 56624 | case 2972: /* *addv16qi3_mask */ |
| 56625 | case 2971: /* *subv64qi3_mask */ |
| 56626 | case 2970: /* *addv64qi3_mask */ |
| 56627 | case 2969: /* *subv2di3_mask */ |
| 56628 | case 2968: /* *addv2di3_mask */ |
| 56629 | case 2967: /* *subv4di3_mask */ |
| 56630 | case 2966: /* *addv4di3_mask */ |
| 56631 | case 2965: /* *subv8di3_mask */ |
| 56632 | case 2964: /* *addv8di3_mask */ |
| 56633 | case 2963: /* *subv4si3_mask */ |
| 56634 | case 2962: /* *addv4si3_mask */ |
| 56635 | case 2961: /* *subv8si3_mask */ |
| 56636 | case 2960: /* *addv8si3_mask */ |
| 56637 | case 2959: /* *subv16si3_mask */ |
| 56638 | case 2958: /* *addv16si3_mask */ |
| 56639 | case 2957: /* *subv2di3 */ |
| 56640 | case 2956: /* *addv2di3 */ |
| 56641 | case 2955: /* *subv4di3 */ |
| 56642 | case 2954: /* *addv4di3 */ |
| 56643 | case 2953: /* *subv8di3 */ |
| 56644 | case 2952: /* *addv8di3 */ |
| 56645 | case 2951: /* *subv4si3 */ |
| 56646 | case 2950: /* *addv4si3 */ |
| 56647 | case 2949: /* *subv8si3 */ |
| 56648 | case 2948: /* *addv8si3 */ |
| 56649 | case 2947: /* *subv16si3 */ |
| 56650 | case 2946: /* *addv16si3 */ |
| 56651 | case 2945: /* *subv8hi3 */ |
| 56652 | case 2944: /* *addv8hi3 */ |
| 56653 | case 2943: /* *subv16hi3 */ |
| 56654 | case 2942: /* *addv16hi3 */ |
| 56655 | case 2941: /* *subv32hi3 */ |
| 56656 | case 2940: /* *addv32hi3 */ |
| 56657 | case 2939: /* *subv16qi3 */ |
| 56658 | case 2938: /* *addv16qi3 */ |
| 56659 | case 2937: /* *subv32qi3 */ |
| 56660 | case 2936: /* *addv32qi3 */ |
| 56661 | case 2935: /* *subv64qi3 */ |
| 56662 | case 2934: /* *addv64qi3 */ |
| 56663 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) |
| 56664 | { |
| 56665 | return 6; |
| 56666 | } |
| 56667 | else if (cached_memory == MEMORY_NONE) |
| 56668 | { |
| 56669 | return 2; |
| 56670 | } |
| 56671 | else |
| 56672 | { |
| 56673 | return 0; |
| 56674 | } |
| 56675 | |
| 56676 | case 2445: /* avx_shufps256_1_mask */ |
| 56677 | case 2444: /* avx_shufps256_1 */ |
| 56678 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) |
| 56679 | { |
| 56680 | return 7; |
| 56681 | } |
| 56682 | else |
| 56683 | { |
| 56684 | return 3; |
| 56685 | } |
| 56686 | |
| 56687 | case 4412: /* vec_set_hi_v8sf_mask */ |
| 56688 | case 4411: /* vec_set_hi_v8sf */ |
| 56689 | case 4408: /* vec_set_lo_v8sf_mask */ |
| 56690 | case 4407: /* vec_set_lo_v8sf */ |
| 56691 | case 4389: /* *avx_vperm2f128v8sf_nozero */ |
| 56692 | case 4386: /* *avx_vperm2f128v8sf_full */ |
| 56693 | case 4372: /* avx512vl_vpermt2varv8sf3_mask */ |
| 56694 | case 4342: /* avx512vl_vpermt2varv8sf3_maskz_1 */ |
| 56695 | case 4341: /* avx512vl_vpermt2varv8sf3 */ |
| 56696 | case 4318: /* avx512vl_vpermi2varv8sf3_mask */ |
| 56697 | case 4288: /* avx512vl_vpermi2varv8sf3_maskz_1 */ |
| 56698 | case 4287: /* avx512vl_vpermi2varv8sf3 */ |
| 56699 | case 4268: /* avx_vpermilvarv8sf3_mask */ |
| 56700 | case 4267: /* avx_vpermilvarv8sf3 */ |
| 56701 | case 4256: /* *avx_vpermilpv8sf_mask */ |
| 56702 | case 4255: /* *avx_vpermilpv8sf */ |
| 56703 | case 4076: /* avx2_permvarv8sf_mask */ |
| 56704 | case 4075: /* avx2_permvarv8sf */ |
| 56705 | case 3597: /* avx512vl_shuf_f32x4_1_mask */ |
| 56706 | case 3596: /* avx512vl_shuf_f32x4_1 */ |
| 56707 | case 2429: /* avx_unpcklps256_mask */ |
| 56708 | case 2428: /* avx_unpcklps256 */ |
| 56709 | case 2423: /* avx_unpckhps256_mask */ |
| 56710 | case 2422: /* avx_unpckhps256 */ |
| 56711 | if (get_attr_memory (insn) == MEMORY_LOAD) |
| 56712 | { |
| 56713 | return 7; |
| 56714 | } |
| 56715 | else |
| 56716 | { |
| 56717 | return 3; |
| 56718 | } |
| 56719 | |
| 56720 | case 1464: /* sse2_divv2df3_mask */ |
| 56721 | case 1463: /* sse2_divv2df3 */ |
| 56722 | case 1462: /* avx_divv4df3_mask */ |
| 56723 | case 1461: /* avx_divv4df3 */ |
| 56724 | case 1448: /* sse2_vmdivv2df3_round */ |
| 56725 | case 1447: /* sse2_vmdivv2df3 */ |
| 56726 | if (((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) || (cached_memory == MEMORY_NONE)) |
| 56727 | { |
| 56728 | return 27 /* 0x1b */; |
| 56729 | } |
| 56730 | else |
| 56731 | { |
| 56732 | return 0; |
| 56733 | } |
| 56734 | |
| 56735 | case 1456: /* sse_divv4sf3_mask */ |
| 56736 | case 1455: /* sse_divv4sf3 */ |
| 56737 | case 1454: /* avx_divv8sf3_mask */ |
| 56738 | case 1453: /* avx_divv8sf3 */ |
| 56739 | case 1444: /* sse_vmdivv4sf3_round */ |
| 56740 | case 1443: /* sse_vmdivv4sf3 */ |
| 56741 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) |
| 56742 | { |
| 56743 | return 27 /* 0x1b */; |
| 56744 | } |
| 56745 | else if (cached_memory == MEMORY_NONE) |
| 56746 | { |
| 56747 | return 24 /* 0x18 */; |
| 56748 | } |
| 56749 | else |
| 56750 | { |
| 56751 | return 0; |
| 56752 | } |
| 56753 | |
| 56754 | case 4766: /* avx512vl_expandv4df_mask */ |
| 56755 | case 4765: /* avx512vl_expandv4di_mask */ |
| 56756 | case 4764: /* avx512vl_expandv8sf_mask */ |
| 56757 | case 4763: /* avx512vl_expandv8si_mask */ |
| 56758 | case 2756: /* avx512f_us_truncatev8div8si2_mask */ |
| 56759 | case 2755: /* avx512f_truncatev8div8si2_mask */ |
| 56760 | case 2754: /* avx512f_ss_truncatev8div8si2_mask */ |
| 56761 | case 2753: /* avx512f_us_truncatev16siv16hi2_mask */ |
| 56762 | case 2752: /* avx512f_truncatev16siv16hi2_mask */ |
| 56763 | case 2751: /* avx512f_ss_truncatev16siv16hi2_mask */ |
| 56764 | case 2744: /* *avx512f_us_truncatev8div8si2 */ |
| 56765 | case 2743: /* *avx512f_truncatev8div8si2 */ |
| 56766 | case 2742: /* *avx512f_ss_truncatev8div8si2 */ |
| 56767 | case 2741: /* *avx512f_us_truncatev16siv16hi2 */ |
| 56768 | case 2740: /* *avx512f_truncatev16siv16hi2 */ |
| 56769 | case 2739: /* *avx512f_ss_truncatev16siv16hi2 */ |
| 56770 | case 1255: /* avx512vl_loadv16hi_mask */ |
| 56771 | case 1253: /* avx512vl_loadv32qi_mask */ |
| 56772 | case 1249: /* avx512vl_loadv4df_mask */ |
| 56773 | case 1246: /* avx512vl_loadv8sf_mask */ |
| 56774 | case 1243: /* avx512vl_loadv4di_mask */ |
| 56775 | case 1240: /* avx512vl_loadv8si_mask */ |
| 56776 | extract_constrain_insn_cached (insn); |
| 56777 | if (which_alternative != 0) |
| 56778 | { |
| 56779 | return 5; |
| 56780 | } |
| 56781 | else |
| 56782 | { |
| 56783 | return 3; |
| 56784 | } |
| 56785 | |
| 56786 | case 4770: /* avx512vl_expandv2df_mask */ |
| 56787 | case 4769: /* avx512vl_expandv2di_mask */ |
| 56788 | case 4768: /* avx512vl_expandv4sf_mask */ |
| 56789 | case 4767: /* avx512vl_expandv4si_mask */ |
| 56790 | case 4762: /* avx512f_expandv8df_mask */ |
| 56791 | case 4761: /* avx512f_expandv8di_mask */ |
| 56792 | case 4760: /* avx512f_expandv16sf_mask */ |
| 56793 | case 4759: /* avx512f_expandv16si_mask */ |
| 56794 | case 2783: /* avx512vl_us_truncatev16hiv16qi2_mask */ |
| 56795 | case 2782: /* avx512vl_truncatev16hiv16qi2_mask */ |
| 56796 | case 2781: /* avx512vl_ss_truncatev16hiv16qi2_mask */ |
| 56797 | case 2780: /* avx512vl_us_truncatev8siv8hi2_mask */ |
| 56798 | case 2779: /* avx512vl_truncatev8siv8hi2_mask */ |
| 56799 | case 2778: /* avx512vl_ss_truncatev8siv8hi2_mask */ |
| 56800 | case 2777: /* avx512vl_us_truncatev4div4si2_mask */ |
| 56801 | case 2776: /* avx512vl_truncatev4div4si2_mask */ |
| 56802 | case 2775: /* avx512vl_ss_truncatev4div4si2_mask */ |
| 56803 | case 2774: /* *avx512vl_us_truncatev16hiv16qi2 */ |
| 56804 | case 2773: /* *avx512vl_truncatev16hiv16qi2 */ |
| 56805 | case 2772: /* *avx512vl_ss_truncatev16hiv16qi2 */ |
| 56806 | case 2771: /* *avx512vl_us_truncatev8siv8hi2 */ |
| 56807 | case 2770: /* *avx512vl_truncatev8siv8hi2 */ |
| 56808 | case 2769: /* *avx512vl_ss_truncatev8siv8hi2 */ |
| 56809 | case 2768: /* *avx512vl_us_truncatev4div4si2 */ |
| 56810 | case 2767: /* *avx512vl_truncatev4div4si2 */ |
| 56811 | case 2766: /* *avx512vl_ss_truncatev4div4si2 */ |
| 56812 | case 2765: /* avx512bw_us_truncatev32hiv32qi2_mask */ |
| 56813 | case 2764: /* avx512bw_truncatev32hiv32qi2_mask */ |
| 56814 | case 2763: /* avx512bw_ss_truncatev32hiv32qi2_mask */ |
| 56815 | case 2762: /* avx512bw_us_truncatev32hiv32qi2 */ |
| 56816 | case 2761: /* avx512bw_truncatev32hiv32qi2 */ |
| 56817 | case 2760: /* avx512bw_ss_truncatev32hiv32qi2 */ |
| 56818 | case 2759: /* avx512f_us_truncatev8div8hi2_mask */ |
| 56819 | case 2758: /* avx512f_truncatev8div8hi2_mask */ |
| 56820 | case 2757: /* avx512f_ss_truncatev8div8hi2_mask */ |
| 56821 | case 2750: /* avx512f_us_truncatev16siv16qi2_mask */ |
| 56822 | case 2749: /* avx512f_truncatev16siv16qi2_mask */ |
| 56823 | case 2748: /* avx512f_ss_truncatev16siv16qi2_mask */ |
| 56824 | case 2747: /* *avx512f_us_truncatev8div8hi2 */ |
| 56825 | case 2746: /* *avx512f_truncatev8div8hi2 */ |
| 56826 | case 2745: /* *avx512f_ss_truncatev8div8hi2 */ |
| 56827 | case 2738: /* *avx512f_us_truncatev16siv16qi2 */ |
| 56828 | case 2737: /* *avx512f_truncatev16siv16qi2 */ |
| 56829 | case 2736: /* *avx512f_ss_truncatev16siv16qi2 */ |
| 56830 | case 1256: /* avx512vl_loadv8hi_mask */ |
| 56831 | case 1254: /* avx512bw_loadv32hi_mask */ |
| 56832 | case 1252: /* avx512vl_loadv16qi_mask */ |
| 56833 | case 1251: /* avx512bw_loadv64qi_mask */ |
| 56834 | case 1250: /* avx512vl_loadv2df_mask */ |
| 56835 | case 1248: /* avx512f_loadv8df_mask */ |
| 56836 | case 1247: /* avx512vl_loadv4sf_mask */ |
| 56837 | case 1245: /* avx512f_loadv16sf_mask */ |
| 56838 | case 1244: /* avx512vl_loadv2di_mask */ |
| 56839 | case 1242: /* avx512f_loadv8di_mask */ |
| 56840 | case 1241: /* avx512vl_loadv4si_mask */ |
| 56841 | case 1239: /* avx512f_loadv16si_mask */ |
| 56842 | extract_constrain_insn_cached (insn); |
| 56843 | if (which_alternative != 0) |
| 56844 | { |
| 56845 | return 4; |
| 56846 | } |
| 56847 | else |
| 56848 | { |
| 56849 | return 2; |
| 56850 | } |
| 56851 | |
| 56852 | case 1051: /* fnstsw */ |
| 56853 | extract_constrain_insn_cached (insn); |
| 56854 | if (which_alternative == 0) |
| 56855 | { |
| 56856 | return 1; |
| 56857 | } |
| 56858 | else |
| 56859 | { |
| 56860 | return 4; |
| 56861 | } |
| 56862 | |
| 56863 | case 4919: /* avx5124vnniw_vp4dpwssds_maskz */ |
| 56864 | case 4918: /* avx5124vnniw_vp4dpwssds_mask */ |
| 56865 | case 4917: /* avx5124vnniw_vp4dpwssds */ |
| 56866 | case 4916: /* avx5124vnniw_vp4dpwssd_maskz */ |
| 56867 | case 4915: /* avx5124vnniw_vp4dpwssd_mask */ |
| 56868 | case 4914: /* avx5124vnniw_vp4dpwssd */ |
| 56869 | case 4913: /* avx5124fmaddps_4fnmaddss_maskz */ |
| 56870 | case 4912: /* avx5124fmaddps_4fnmaddss_mask */ |
| 56871 | case 4911: /* avx5124fmaddps_4fnmaddss */ |
| 56872 | case 4910: /* avx5124fmaddps_4fnmaddps_maskz */ |
| 56873 | case 4909: /* avx5124fmaddps_4fnmaddps_mask */ |
| 56874 | case 4908: /* avx5124fmaddps_4fnmaddps */ |
| 56875 | case 4907: /* avx5124fmaddps_4fmaddss_maskz */ |
| 56876 | case 4906: /* avx5124fmaddps_4fmaddss_mask */ |
| 56877 | case 4905: /* avx5124fmaddps_4fmaddss */ |
| 56878 | case 4904: /* avx5124fmaddps_4fmaddps_maskz */ |
| 56879 | case 4903: /* avx5124fmaddps_4fmaddps_mask */ |
| 56880 | case 4902: /* avx5124fmaddps_4fmaddps */ |
| 56881 | case 4893: /* vpamdd52huqv2di_mask */ |
| 56882 | case 4892: /* vpamdd52luqv2di_mask */ |
| 56883 | case 4891: /* vpamdd52huqv4di_mask */ |
| 56884 | case 4890: /* vpamdd52luqv4di_mask */ |
| 56885 | case 4889: /* vpamdd52huqv8di_mask */ |
| 56886 | case 4888: /* vpamdd52luqv8di_mask */ |
| 56887 | case 4887: /* vpamdd52huqv2di_maskz_1 */ |
| 56888 | case 4886: /* vpamdd52huqv2di */ |
| 56889 | case 4885: /* vpamdd52luqv2di_maskz_1 */ |
| 56890 | case 4884: /* vpamdd52luqv2di */ |
| 56891 | case 4883: /* vpamdd52huqv4di_maskz_1 */ |
| 56892 | case 4882: /* vpamdd52huqv4di */ |
| 56893 | case 4881: /* vpamdd52luqv4di_maskz_1 */ |
| 56894 | case 4880: /* vpamdd52luqv4di */ |
| 56895 | case 4879: /* vpamdd52huqv8di_maskz_1 */ |
| 56896 | case 4878: /* vpamdd52huqv8di */ |
| 56897 | case 4877: /* vpamdd52luqv8di_maskz_1 */ |
| 56898 | case 4876: /* vpamdd52luqv8di */ |
| 56899 | case 3964: /* xop_pmadcsswd */ |
| 56900 | case 3963: /* xop_pmadcswd */ |
| 56901 | case 3962: /* xop_pmacsswd */ |
| 56902 | case 3961: /* xop_pmacswd */ |
| 56903 | case 3960: /* xop_pmacssdqh */ |
| 56904 | case 3959: /* xop_pmacsdqh */ |
| 56905 | case 3958: /* xop_pmacssdql */ |
| 56906 | case 3957: /* xop_pmacsdql */ |
| 56907 | case 3956: /* xop_pmacssdd */ |
| 56908 | case 3955: /* xop_pmacsdd */ |
| 56909 | case 3954: /* xop_pmacssww */ |
| 56910 | case 3953: /* xop_pmacsww */ |
| 56911 | case 3783: /* sse4_1_dppd */ |
| 56912 | case 3781: /* sse4_1_dpps */ |
| 56913 | case 2102: /* *fma4i_vmfnmsub_v2df */ |
| 56914 | case 2101: /* *fma4i_vmfnmsub_v4sf */ |
| 56915 | case 2100: /* *fma4i_vmfnmadd_v2df */ |
| 56916 | case 2099: /* *fma4i_vmfnmadd_v4sf */ |
| 56917 | case 2098: /* *fma4i_vmfmsub_v2df */ |
| 56918 | case 2097: /* *fma4i_vmfmsub_v4sf */ |
| 56919 | case 2096: /* *fma4i_vmfmadd_v2df */ |
| 56920 | case 2095: /* *fma4i_vmfmadd_v4sf */ |
| 56921 | case 2094: /* *fmai_fnmsub_v2df_round */ |
| 56922 | case 2093: /* *fmai_fnmsub_v2df */ |
| 56923 | case 2092: /* *fmai_fnmsub_v4sf_round */ |
| 56924 | case 2091: /* *fmai_fnmsub_v4sf */ |
| 56925 | case 2090: /* *fmai_fnmadd_v2df_round */ |
| 56926 | case 2089: /* *fmai_fnmadd_v2df */ |
| 56927 | case 2088: /* *fmai_fnmadd_v4sf_round */ |
| 56928 | case 2087: /* *fmai_fnmadd_v4sf */ |
| 56929 | case 2086: /* *fmai_fmsub_v2df */ |
| 56930 | case 2085: /* *fmai_fmsub_v2df */ |
| 56931 | case 2084: /* *fmai_fmsub_v4sf */ |
| 56932 | case 2083: /* *fmai_fmsub_v4sf */ |
| 56933 | case 2082: /* *fmai_fmadd_v2df */ |
| 56934 | case 2081: /* *fmai_fmadd_v2df */ |
| 56935 | case 2080: /* *fmai_fmadd_v4sf */ |
| 56936 | case 2079: /* *fmai_fmadd_v4sf */ |
| 56937 | case 2078: /* avx512vl_fmsubadd_v2df_mask3_round */ |
| 56938 | case 2077: /* avx512vl_fmsubadd_v2df_mask3 */ |
| 56939 | case 2074: /* avx512f_fmsubadd_v8df_mask3_round */ |
| 56940 | case 2073: /* avx512f_fmsubadd_v8df_mask3 */ |
| 56941 | case 2072: /* avx512vl_fmsubadd_v4sf_mask3_round */ |
| 56942 | case 2071: /* avx512vl_fmsubadd_v4sf_mask3 */ |
| 56943 | case 2068: /* avx512f_fmsubadd_v16sf_mask3_round */ |
| 56944 | case 2067: /* avx512f_fmsubadd_v16sf_mask3 */ |
| 56945 | case 2066: /* avx512vl_fmsubadd_v2df_mask_round */ |
| 56946 | case 2065: /* avx512vl_fmsubadd_v2df_mask */ |
| 56947 | case 2062: /* avx512f_fmsubadd_v8df_mask_round */ |
| 56948 | case 2061: /* avx512f_fmsubadd_v8df_mask */ |
| 56949 | case 2060: /* avx512vl_fmsubadd_v4sf_mask_round */ |
| 56950 | case 2059: /* avx512vl_fmsubadd_v4sf_mask */ |
| 56951 | case 2056: /* avx512f_fmsubadd_v16sf_mask_round */ |
| 56952 | case 2055: /* avx512f_fmsubadd_v16sf_mask */ |
| 56953 | case 2054: /* fma_fmsubadd_v2df_maskz_1 */ |
| 56954 | case 2053: /* *fma_fmsubadd_v2df */ |
| 56955 | case 2050: /* fma_fmsubadd_v8df_maskz_1_round */ |
| 56956 | case 2049: /* fma_fmsubadd_v8df_maskz_1 */ |
| 56957 | case 2048: /* *fma_fmsubadd_v8df_round */ |
| 56958 | case 2047: /* *fma_fmsubadd_v8df */ |
| 56959 | case 2046: /* *fma_fmsubadd_df */ |
| 56960 | case 2045: /* fma_fmsubadd_v4sf_maskz_1 */ |
| 56961 | case 2044: /* *fma_fmsubadd_v4sf */ |
| 56962 | case 2041: /* fma_fmsubadd_v16sf_maskz_1_round */ |
| 56963 | case 2040: /* fma_fmsubadd_v16sf_maskz_1 */ |
| 56964 | case 2039: /* *fma_fmsubadd_v16sf_round */ |
| 56965 | case 2038: /* *fma_fmsubadd_v16sf */ |
| 56966 | case 2037: /* *fma_fmsubadd_sf */ |
| 56967 | case 2036: /* *fma_fmsubadd_v2df */ |
| 56968 | case 2034: /* *fma_fmsubadd_v4sf */ |
| 56969 | case 2032: /* avx512vl_fmaddsub_v2df_mask3_round */ |
| 56970 | case 2031: /* avx512vl_fmaddsub_v2df_mask3 */ |
| 56971 | case 2028: /* avx512f_fmaddsub_v8df_mask3_round */ |
| 56972 | case 2027: /* avx512f_fmaddsub_v8df_mask3 */ |
| 56973 | case 2026: /* avx512vl_fmaddsub_v4sf_mask3_round */ |
| 56974 | case 2025: /* avx512vl_fmaddsub_v4sf_mask3 */ |
| 56975 | case 2022: /* avx512f_fmaddsub_v16sf_mask3_round */ |
| 56976 | case 2021: /* avx512f_fmaddsub_v16sf_mask3 */ |
| 56977 | case 2020: /* avx512vl_fmaddsub_v2df_mask_round */ |
| 56978 | case 2019: /* avx512vl_fmaddsub_v2df_mask */ |
| 56979 | case 2016: /* avx512f_fmaddsub_v8df_mask_round */ |
| 56980 | case 2015: /* avx512f_fmaddsub_v8df_mask */ |
| 56981 | case 2014: /* avx512vl_fmaddsub_v4sf_mask_round */ |
| 56982 | case 2013: /* avx512vl_fmaddsub_v4sf_mask */ |
| 56983 | case 2010: /* avx512f_fmaddsub_v16sf_mask_round */ |
| 56984 | case 2009: /* avx512f_fmaddsub_v16sf_mask */ |
| 56985 | case 2008: /* fma_fmaddsub_v2df_maskz_1 */ |
| 56986 | case 2007: /* *fma_fmaddsub_v2df */ |
| 56987 | case 2004: /* fma_fmaddsub_v8df_maskz_1_round */ |
| 56988 | case 2003: /* fma_fmaddsub_v8df_maskz_1 */ |
| 56989 | case 2002: /* *fma_fmaddsub_v8df_round */ |
| 56990 | case 2001: /* *fma_fmaddsub_v8df */ |
| 56991 | case 2000: /* *fma_fmaddsub_df */ |
| 56992 | case 1999: /* fma_fmaddsub_v4sf_maskz_1 */ |
| 56993 | case 1998: /* *fma_fmaddsub_v4sf */ |
| 56994 | case 1995: /* fma_fmaddsub_v16sf_maskz_1_round */ |
| 56995 | case 1994: /* fma_fmaddsub_v16sf_maskz_1 */ |
| 56996 | case 1993: /* *fma_fmaddsub_v16sf_round */ |
| 56997 | case 1992: /* *fma_fmaddsub_v16sf */ |
| 56998 | case 1991: /* *fma_fmaddsub_sf */ |
| 56999 | case 1990: /* *fma_fmaddsub_v2df */ |
| 57000 | case 1988: /* *fma_fmaddsub_v4sf */ |
| 57001 | case 1986: /* avx512vl_fnmsub_v2df_mask3_round */ |
| 57002 | case 1985: /* avx512vl_fnmsub_v2df_mask3 */ |
| 57003 | case 1982: /* avx512f_fnmsub_v8df_mask3_round */ |
| 57004 | case 1981: /* avx512f_fnmsub_v8df_mask3 */ |
| 57005 | case 1980: /* avx512vl_fnmsub_v4sf_mask3_round */ |
| 57006 | case 1979: /* avx512vl_fnmsub_v4sf_mask3 */ |
| 57007 | case 1976: /* avx512f_fnmsub_v16sf_mask3_round */ |
| 57008 | case 1975: /* avx512f_fnmsub_v16sf_mask3 */ |
| 57009 | case 1974: /* avx512vl_fnmsub_v2df_mask */ |
| 57010 | case 1972: /* avx512f_fnmsub_v8df_mask_round */ |
| 57011 | case 1971: /* avx512f_fnmsub_v8df_mask */ |
| 57012 | case 1970: /* avx512vl_fnmsub_v4sf_mask */ |
| 57013 | case 1968: /* avx512f_fnmsub_v16sf_mask_round */ |
| 57014 | case 1967: /* avx512f_fnmsub_v16sf_mask */ |
| 57015 | case 1966: /* fma_fnmsub_v2df_maskz_1 */ |
| 57016 | case 1965: /* *fma_fnmsub_v2df */ |
| 57017 | case 1962: /* fma_fnmsub_v8df_maskz_1_round */ |
| 57018 | case 1961: /* fma_fnmsub_v8df_maskz_1 */ |
| 57019 | case 1960: /* *fma_fnmsub_v8df_round */ |
| 57020 | case 1959: /* *fma_fnmsub_v8df */ |
| 57021 | case 1958: /* *fma_fnmsub_df */ |
| 57022 | case 1957: /* fma_fnmsub_v4sf_maskz_1 */ |
| 57023 | case 1956: /* *fma_fnmsub_v4sf */ |
| 57024 | case 1953: /* fma_fnmsub_v16sf_maskz_1_round */ |
| 57025 | case 1952: /* fma_fnmsub_v16sf_maskz_1 */ |
| 57026 | case 1951: /* *fma_fnmsub_v16sf_round */ |
| 57027 | case 1950: /* *fma_fnmsub_v16sf */ |
| 57028 | case 1949: /* *fma_fnmsub_sf */ |
| 57029 | case 1940: /* *fma_fnmsub_v2df */ |
| 57030 | case 1939: /* *fma_fnmsub_v2df */ |
| 57031 | case 1938: /* *fma_fnmsub_v2df */ |
| 57032 | case 1937: /* *fma_fnmsub_v2df */ |
| 57033 | case 1936: /* *fma_fnmsub_v4sf */ |
| 57034 | case 1935: /* *fma_fnmsub_v4sf */ |
| 57035 | case 1934: /* *fma_fnmsub_v4sf */ |
| 57036 | case 1933: /* *fma_fnmsub_v4sf */ |
| 57037 | case 1932: /* *fma_fnmsub_df */ |
| 57038 | case 1931: /* *fma_fnmsub_df */ |
| 57039 | case 1930: /* *fma_fnmsub_sf */ |
| 57040 | case 1929: /* *fma_fnmsub_sf */ |
| 57041 | case 1928: /* avx512vl_fnmadd_v2df_mask3 */ |
| 57042 | case 1926: /* avx512f_fnmadd_v8df_mask3_round */ |
| 57043 | case 1925: /* avx512f_fnmadd_v8df_mask3 */ |
| 57044 | case 1924: /* avx512vl_fnmadd_v4sf_mask3 */ |
| 57045 | case 1922: /* avx512f_fnmadd_v16sf_mask3_round */ |
| 57046 | case 1921: /* avx512f_fnmadd_v16sf_mask3 */ |
| 57047 | case 1920: /* avx512vl_fnmadd_v2df_mask */ |
| 57048 | case 1918: /* avx512f_fnmadd_v8df_mask_round */ |
| 57049 | case 1917: /* avx512f_fnmadd_v8df_mask */ |
| 57050 | case 1916: /* avx512vl_fnmadd_v4sf_mask */ |
| 57051 | case 1914: /* avx512f_fnmadd_v16sf_mask_round */ |
| 57052 | case 1913: /* avx512f_fnmadd_v16sf_mask */ |
| 57053 | case 1912: /* fma_fnmadd_v2df_maskz_1 */ |
| 57054 | case 1911: /* *fma_fnmadd_v2df */ |
| 57055 | case 1908: /* fma_fnmadd_v8df_maskz_1_round */ |
| 57056 | case 1907: /* fma_fnmadd_v8df_maskz_1 */ |
| 57057 | case 1906: /* *fma_fnmadd_v8df_round */ |
| 57058 | case 1905: /* *fma_fnmadd_v8df */ |
| 57059 | case 1904: /* *fma_fnmadd_df */ |
| 57060 | case 1903: /* fma_fnmadd_v4sf_maskz_1 */ |
| 57061 | case 1902: /* *fma_fnmadd_v4sf */ |
| 57062 | case 1899: /* fma_fnmadd_v16sf_maskz_1_round */ |
| 57063 | case 1898: /* fma_fnmadd_v16sf_maskz_1 */ |
| 57064 | case 1897: /* *fma_fnmadd_v16sf_round */ |
| 57065 | case 1896: /* *fma_fnmadd_v16sf */ |
| 57066 | case 1895: /* *fma_fnmadd_sf */ |
| 57067 | case 1892: /* *fma_fnmadd_v2df */ |
| 57068 | case 1891: /* *fma_fnmadd_v4sf */ |
| 57069 | case 1890: /* *fma_fnmadd_df */ |
| 57070 | case 1889: /* *fma_fnmadd_sf */ |
| 57071 | case 1888: /* avx512vl_fmsub_v2df_mask3 */ |
| 57072 | case 1886: /* avx512f_fmsub_v8df_mask3_round */ |
| 57073 | case 1885: /* avx512f_fmsub_v8df_mask3 */ |
| 57074 | case 1884: /* avx512vl_fmsub_v4sf_mask3 */ |
| 57075 | case 1882: /* avx512f_fmsub_v16sf_mask3_round */ |
| 57076 | case 1881: /* avx512f_fmsub_v16sf_mask3 */ |
| 57077 | case 1880: /* avx512vl_fmsub_v2df_mask_round */ |
| 57078 | case 1879: /* avx512vl_fmsub_v2df_mask */ |
| 57079 | case 1876: /* avx512f_fmsub_v8df_mask_round */ |
| 57080 | case 1875: /* avx512f_fmsub_v8df_mask */ |
| 57081 | case 1874: /* avx512vl_fmsub_v4sf_mask_round */ |
| 57082 | case 1873: /* avx512vl_fmsub_v4sf_mask */ |
| 57083 | case 1870: /* avx512f_fmsub_v16sf_mask_round */ |
| 57084 | case 1869: /* avx512f_fmsub_v16sf_mask */ |
| 57085 | case 1868: /* fma_fmsub_v2df_maskz_1 */ |
| 57086 | case 1867: /* *fma_fmsub_v2df */ |
| 57087 | case 1864: /* fma_fmsub_v8df_maskz_1_round */ |
| 57088 | case 1863: /* fma_fmsub_v8df_maskz_1 */ |
| 57089 | case 1862: /* *fma_fmsub_v8df_round */ |
| 57090 | case 1861: /* *fma_fmsub_v8df */ |
| 57091 | case 1860: /* *fma_fmsub_df */ |
| 57092 | case 1859: /* fma_fmsub_v4sf_maskz_1 */ |
| 57093 | case 1858: /* *fma_fmsub_v4sf */ |
| 57094 | case 1855: /* fma_fmsub_v16sf_maskz_1_round */ |
| 57095 | case 1854: /* fma_fmsub_v16sf_maskz_1 */ |
| 57096 | case 1853: /* *fma_fmsub_v16sf_round */ |
| 57097 | case 1852: /* *fma_fmsub_v16sf */ |
| 57098 | case 1851: /* *fma_fmsub_sf */ |
| 57099 | case 1848: /* *fma_fmsub_v2df */ |
| 57100 | case 1847: /* *fma_fmsub_v4sf */ |
| 57101 | case 1846: /* *fma_fmsub_df */ |
| 57102 | case 1845: /* *fma_fmsub_sf */ |
| 57103 | case 1844: /* avx512vl_fmadd_v2df_mask3_round */ |
| 57104 | case 1843: /* avx512vl_fmadd_v2df_mask3 */ |
| 57105 | case 1840: /* avx512f_fmadd_v8df_mask3_round */ |
| 57106 | case 1839: /* avx512f_fmadd_v8df_mask3 */ |
| 57107 | case 1838: /* avx512vl_fmadd_v4sf_mask3_round */ |
| 57108 | case 1837: /* avx512vl_fmadd_v4sf_mask3 */ |
| 57109 | case 1834: /* avx512f_fmadd_v16sf_mask3_round */ |
| 57110 | case 1833: /* avx512f_fmadd_v16sf_mask3 */ |
| 57111 | case 1832: /* avx512vl_fmadd_v2df_mask */ |
| 57112 | case 1830: /* avx512f_fmadd_v8df_mask_round */ |
| 57113 | case 1829: /* avx512f_fmadd_v8df_mask */ |
| 57114 | case 1828: /* avx512vl_fmadd_v4sf_mask */ |
| 57115 | case 1826: /* avx512f_fmadd_v16sf_mask_round */ |
| 57116 | case 1825: /* avx512f_fmadd_v16sf_mask */ |
| 57117 | case 1824: /* fma_fmadd_v2df_maskz_1 */ |
| 57118 | case 1823: /* *fma_fmadd_v2df */ |
| 57119 | case 1820: /* fma_fmadd_v8df_maskz_1_round */ |
| 57120 | case 1819: /* fma_fmadd_v8df_maskz_1 */ |
| 57121 | case 1818: /* *fma_fmadd_v8df_round */ |
| 57122 | case 1817: /* *fma_fmadd_v8df */ |
| 57123 | case 1816: /* *fma_fmadd_df */ |
| 57124 | case 1815: /* fma_fmadd_v4sf_maskz_1 */ |
| 57125 | case 1814: /* *fma_fmadd_v4sf */ |
| 57126 | case 1811: /* fma_fmadd_v16sf_maskz_1_round */ |
| 57127 | case 1810: /* fma_fmadd_v16sf_maskz_1 */ |
| 57128 | case 1809: /* *fma_fmadd_v16sf_round */ |
| 57129 | case 1808: /* *fma_fmadd_v16sf */ |
| 57130 | case 1807: /* *fma_fmadd_sf */ |
| 57131 | case 1804: /* *fma_fmadd_v2df */ |
| 57132 | case 1803: /* *fma_fmadd_v4sf */ |
| 57133 | case 1802: /* *fma_fmadd_df */ |
| 57134 | case 1801: /* *fma_fmadd_sf */ |
| 57135 | case 1620: /* sse3_hsubv4sf3 */ |
| 57136 | case 1619: /* sse3_haddv4sf3 */ |
| 57137 | case 1616: /* *sse3_hsubv2df3_low */ |
| 57138 | case 1615: /* *sse3_haddv2df3_low */ |
| 57139 | case 1614: /* sse3_hsubv2df3 */ |
| 57140 | case 1613: /* *sse3_haddv2df3 */ |
| 57141 | case 1610: /* sse3_addsubv4sf3 */ |
| 57142 | case 1608: /* sse3_addsubv2df3 */ |
| 57143 | case 1598: /* ieee_minv2df3_mask */ |
| 57144 | case 1597: /* ieee_minv2df3 */ |
| 57145 | case 1596: /* ieee_maxv2df3_mask */ |
| 57146 | case 1595: /* ieee_maxv2df3 */ |
| 57147 | case 1590: /* ieee_minv8df3_mask_round */ |
| 57148 | case 1589: /* ieee_minv8df3_mask */ |
| 57149 | case 1588: /* ieee_minv8df3_round */ |
| 57150 | case 1587: /* ieee_minv8df3 */ |
| 57151 | case 1586: /* ieee_maxv8df3_mask_round */ |
| 57152 | case 1585: /* ieee_maxv8df3_mask */ |
| 57153 | case 1584: /* ieee_maxv8df3_round */ |
| 57154 | case 1583: /* ieee_maxv8df3 */ |
| 57155 | case 1582: /* ieee_minv4sf3_mask */ |
| 57156 | case 1581: /* ieee_minv4sf3 */ |
| 57157 | case 1580: /* ieee_maxv4sf3_mask */ |
| 57158 | case 1579: /* ieee_maxv4sf3 */ |
| 57159 | case 1574: /* ieee_minv16sf3_mask_round */ |
| 57160 | case 1573: /* ieee_minv16sf3_mask */ |
| 57161 | case 1572: /* ieee_minv16sf3_round */ |
| 57162 | case 1571: /* ieee_minv16sf3 */ |
| 57163 | case 1570: /* ieee_maxv16sf3_mask_round */ |
| 57164 | case 1569: /* ieee_maxv16sf3_mask */ |
| 57165 | case 1568: /* ieee_maxv16sf3_round */ |
| 57166 | case 1567: /* ieee_maxv16sf3 */ |
| 57167 | case 1566: /* *sminv2df3_mask_round */ |
| 57168 | case 1565: /* *sminv2df3_mask */ |
| 57169 | case 1564: /* *sminv2df3_round */ |
| 57170 | case 1563: /* *sminv2df3 */ |
| 57171 | case 1562: /* *smaxv2df3_mask_round */ |
| 57172 | case 1561: /* *smaxv2df3_mask */ |
| 57173 | case 1560: /* *smaxv2df3_round */ |
| 57174 | case 1559: /* *smaxv2df3 */ |
| 57175 | case 1550: /* *sminv8df3_mask_round */ |
| 57176 | case 1549: /* *sminv8df3_mask */ |
| 57177 | case 1548: /* *sminv8df3_round */ |
| 57178 | case 1547: /* *sminv8df3 */ |
| 57179 | case 1546: /* *smaxv8df3_mask_round */ |
| 57180 | case 1545: /* *smaxv8df3_mask */ |
| 57181 | case 1544: /* *smaxv8df3_round */ |
| 57182 | case 1543: /* *smaxv8df3 */ |
| 57183 | case 1542: /* *sminv4sf3_mask_round */ |
| 57184 | case 1541: /* *sminv4sf3_mask */ |
| 57185 | case 1540: /* *sminv4sf3_round */ |
| 57186 | case 1539: /* *sminv4sf3 */ |
| 57187 | case 1538: /* *smaxv4sf3_mask_round */ |
| 57188 | case 1537: /* *smaxv4sf3_mask */ |
| 57189 | case 1536: /* *smaxv4sf3_round */ |
| 57190 | case 1535: /* *smaxv4sf3 */ |
| 57191 | case 1526: /* *sminv16sf3_mask_round */ |
| 57192 | case 1525: /* *sminv16sf3_mask */ |
| 57193 | case 1524: /* *sminv16sf3_round */ |
| 57194 | case 1523: /* *sminv16sf3 */ |
| 57195 | case 1522: /* *smaxv16sf3_mask_round */ |
| 57196 | case 1521: /* *smaxv16sf3_mask */ |
| 57197 | case 1520: /* *smaxv16sf3_round */ |
| 57198 | case 1519: /* *smaxv16sf3 */ |
| 57199 | case 1446: /* sse2_vmmulv2df3_round */ |
| 57200 | case 1445: /* sse2_vmmulv2df3 */ |
| 57201 | case 1442: /* sse_vmmulv4sf3_round */ |
| 57202 | case 1441: /* sse_vmmulv4sf3 */ |
| 57203 | case 1440: /* *mulv2df3_mask_round */ |
| 57204 | case 1439: /* *mulv2df3_mask */ |
| 57205 | case 1438: /* *mulv2df3_round */ |
| 57206 | case 1437: /* *mulv2df3 */ |
| 57207 | case 1432: /* *mulv8df3_mask_round */ |
| 57208 | case 1431: /* *mulv8df3_mask */ |
| 57209 | case 1430: /* *mulv8df3_round */ |
| 57210 | case 1429: /* *mulv8df3 */ |
| 57211 | case 1428: /* *mulv4sf3_mask_round */ |
| 57212 | case 1427: /* *mulv4sf3_mask */ |
| 57213 | case 1426: /* *mulv4sf3_round */ |
| 57214 | case 1425: /* *mulv4sf3 */ |
| 57215 | case 1420: /* *mulv16sf3_mask_round */ |
| 57216 | case 1419: /* *mulv16sf3_mask */ |
| 57217 | case 1418: /* *mulv16sf3_round */ |
| 57218 | case 1417: /* *mulv16sf3 */ |
| 57219 | case 1416: /* sse2_vmsubv2df3_round */ |
| 57220 | case 1415: /* sse2_vmsubv2df3 */ |
| 57221 | case 1414: /* sse2_vmaddv2df3_round */ |
| 57222 | case 1413: /* sse2_vmaddv2df3 */ |
| 57223 | case 1412: /* sse_vmsubv4sf3_round */ |
| 57224 | case 1411: /* sse_vmsubv4sf3 */ |
| 57225 | case 1410: /* sse_vmaddv4sf3_round */ |
| 57226 | case 1409: /* sse_vmaddv4sf3 */ |
| 57227 | case 1408: /* *subv2df3_mask_round */ |
| 57228 | case 1407: /* *subv2df3_mask */ |
| 57229 | case 1406: /* *subv2df3_round */ |
| 57230 | case 1405: /* *subv2df3 */ |
| 57231 | case 1404: /* *addv2df3_mask_round */ |
| 57232 | case 1403: /* *addv2df3_mask */ |
| 57233 | case 1402: /* *addv2df3_round */ |
| 57234 | case 1401: /* *addv2df3 */ |
| 57235 | case 1392: /* *subv8df3_mask_round */ |
| 57236 | case 1391: /* *subv8df3_mask */ |
| 57237 | case 1390: /* *subv8df3_round */ |
| 57238 | case 1389: /* *subv8df3 */ |
| 57239 | case 1388: /* *addv8df3_mask_round */ |
| 57240 | case 1387: /* *addv8df3_mask */ |
| 57241 | case 1386: /* *addv8df3_round */ |
| 57242 | case 1385: /* *addv8df3 */ |
| 57243 | case 1384: /* *subv4sf3_mask_round */ |
| 57244 | case 1383: /* *subv4sf3_mask */ |
| 57245 | case 1382: /* *subv4sf3_round */ |
| 57246 | case 1381: /* *subv4sf3 */ |
| 57247 | case 1380: /* *addv4sf3_mask_round */ |
| 57248 | case 1379: /* *addv4sf3_mask */ |
| 57249 | case 1378: /* *addv4sf3_round */ |
| 57250 | case 1377: /* *addv4sf3 */ |
| 57251 | case 1368: /* *subv16sf3_mask_round */ |
| 57252 | case 1367: /* *subv16sf3_mask */ |
| 57253 | case 1366: /* *subv16sf3_round */ |
| 57254 | case 1365: /* *subv16sf3 */ |
| 57255 | case 1364: /* *addv16sf3_mask_round */ |
| 57256 | case 1363: /* *addv16sf3_mask */ |
| 57257 | case 1362: /* *addv16sf3_round */ |
| 57258 | case 1361: /* *addv16sf3 */ |
| 57259 | case 992: /* *ieee_smindf3 */ |
| 57260 | case 991: /* *ieee_smaxdf3 */ |
| 57261 | case 990: /* *ieee_sminsf3 */ |
| 57262 | case 989: /* *ieee_smaxsf3 */ |
| 57263 | case 988: /* smindf3 */ |
| 57264 | case 987: /* smaxdf3 */ |
| 57265 | case 986: /* sminsf3 */ |
| 57266 | case 985: /* smaxsf3 */ |
| 57267 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) |
| 57268 | { |
| 57269 | return 10 /* 0xa */; |
| 57270 | } |
| 57271 | else if (cached_memory == MEMORY_NONE) |
| 57272 | { |
| 57273 | return 6; |
| 57274 | } |
| 57275 | else |
| 57276 | { |
| 57277 | return 0; |
| 57278 | } |
| 57279 | |
| 57280 | case 980: /* *movxfcc_1 */ |
| 57281 | return 15 /* 0xf */; |
| 57282 | |
| 57283 | case 962: /* *rep_stosqi */ |
| 57284 | case 961: /* *rep_stosqi */ |
| 57285 | case 960: /* *rep_stossi */ |
| 57286 | case 959: /* *rep_stossi */ |
| 57287 | case 958: /* *rep_stosdi_rex64 */ |
| 57288 | case 957: /* *rep_stosdi_rex64 */ |
| 57289 | case 956: /* *strsetqi_1 */ |
| 57290 | case 955: /* *strsetqi_1 */ |
| 57291 | case 954: /* *strsethi_1 */ |
| 57292 | case 953: /* *strsethi_1 */ |
| 57293 | case 952: /* *strsetsi_1 */ |
| 57294 | case 951: /* *strsetsi_1 */ |
| 57295 | case 950: /* *strsetdi_rex_1 */ |
| 57296 | case 949: /* *strsetdi_rex_1 */ |
| 57297 | case 948: /* *rep_movqi */ |
| 57298 | case 947: /* *rep_movqi */ |
| 57299 | case 946: /* *rep_movsi */ |
| 57300 | case 945: /* *rep_movsi */ |
| 57301 | case 944: /* *rep_movdi_rex64 */ |
| 57302 | case 943: /* *rep_movdi_rex64 */ |
| 57303 | case 942: /* *strmovqi_1 */ |
| 57304 | case 941: /* *strmovqi_1 */ |
| 57305 | case 940: /* *strmovhi_1 */ |
| 57306 | case 939: /* *strmovhi_1 */ |
| 57307 | case 938: /* *strmovsi_1 */ |
| 57308 | case 937: /* *strmovsi_1 */ |
| 57309 | case 936: /* *strmovdi_rex_1 */ |
| 57310 | case 935: /* *strmovdi_rex_1 */ |
| 57311 | return 6; |
| 57312 | |
| 57313 | case 4427: /* avx_maskstoreps256 */ |
| 57314 | case 4419: /* avx_maskloadps256 */ |
| 57315 | case 3771: /* sse4a_insertq */ |
| 57316 | case 3770: /* sse4a_insertqi */ |
| 57317 | case 2522: /* vec_extract_hi_v8sf */ |
| 57318 | case 2520: /* vec_extract_hi_v8sf_mask */ |
| 57319 | case 2518: /* vec_extract_hi_v8sf_maskm */ |
| 57320 | case 2516: /* vec_extract_lo_v8sf_maskm */ |
| 57321 | case 2514: /* vec_extract_lo_v8sf_mask */ |
| 57322 | case 2513: /* vec_extract_lo_v8sf */ |
| 57323 | case 2456: /* avx2_vec_dupv8sf_1 */ |
| 57324 | case 2454: /* avx2_vec_dupv8sf */ |
| 57325 | case 704: /* leave_rex64 */ |
| 57326 | case 703: /* leave */ |
| 57327 | return 3; |
| 57328 | |
| 57329 | case 693: /* simple_return_indirect_internal */ |
| 57330 | case 663: /* *tablejump_1 */ |
| 57331 | case 662: /* *tablejump_1 */ |
| 57332 | case 661: /* *indirect_jump */ |
| 57333 | case 660: /* *indirect_jump */ |
| 57334 | extract_constrain_insn_cached (insn); |
| 57335 | if (((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) || ( |
| 57336 | #line 12442 "/___NETBSD_SRC___/tools/gcc/../../external/gpl3/gcc/dist/gcc/config/i386/i386.md" |
| 57337 | ((cfun->machine->indirect_branch_type |
| 57338 | != indirect_branch_keep)))) |
| 57339 | { |
| 57340 | return 1; |
| 57341 | } |
| 57342 | else if (cached_memory == MEMORY_LOAD) |
| 57343 | { |
| 57344 | return 5; |
| 57345 | } |
| 57346 | else |
| 57347 | { |
| 57348 | return 0; |
| 57349 | } |
| 57350 | |
| 57351 | case 624: /* *setcc_qi_slp */ |
| 57352 | case 623: /* *setcc_qi */ |
| 57353 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) |
| 57354 | { |
| 57355 | return 1; |
| 57356 | } |
| 57357 | else if (cached_memory == MEMORY_STORE) |
| 57358 | { |
| 57359 | return 4; |
| 57360 | } |
| 57361 | else |
| 57362 | { |
| 57363 | return 0; |
| 57364 | } |
| 57365 | |
| 57366 | case 546: /* x86_shrd */ |
| 57367 | case 545: /* x86_64_shrd */ |
| 57368 | case 516: /* x86_shld */ |
| 57369 | case 515: /* x86_64_shld */ |
| 57370 | if (get_attr_memory (insn) == MEMORY_NONE) |
| 57371 | { |
| 57372 | return 2; |
| 57373 | } |
| 57374 | else |
| 57375 | { |
| 57376 | return 0; |
| 57377 | } |
| 57378 | |
| 57379 | case 344: /* *mulvhi4 */ |
| 57380 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) |
| 57381 | { |
| 57382 | return 4; |
| 57383 | } |
| 57384 | else if ((cached_memory == MEMORY_LOAD) || (cached_memory == MEMORY_BOTH)) |
| 57385 | { |
| 57386 | return 8; |
| 57387 | } |
| 57388 | else |
| 57389 | { |
| 57390 | return 0; |
| 57391 | } |
| 57392 | |
| 57393 | case 202: /* *floatdidf2_mixed */ |
| 57394 | case 201: /* *floatsidf2_mixed */ |
| 57395 | case 200: /* *floatdisf2_mixed */ |
| 57396 | case 199: /* *floatsisf2_mixed */ |
| 57397 | extract_constrain_insn_cached (insn); |
| 57398 | if (which_alternative == 0) |
| 57399 | { |
| 57400 | return 2; |
| 57401 | } |
| 57402 | else if ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) |
| 57403 | { |
| 57404 | return 8; |
| 57405 | } |
| 57406 | else if (cached_memory == MEMORY_NONE) |
| 57407 | { |
| 57408 | return 4; |
| 57409 | } |
| 57410 | else |
| 57411 | { |
| 57412 | return 0; |
| 57413 | } |
| 57414 | |
| 57415 | case 3713: /* *ssse3_pmulhrswv4hi3 */ |
| 57416 | case 3712: /* *ssse3_pmulhrswv8hi3_mask */ |
| 57417 | case 3711: /* *ssse3_pmulhrswv8hi3 */ |
| 57418 | case 3710: /* *avx2_pmulhrswv16hi3_mask */ |
| 57419 | case 3709: /* *avx2_pmulhrswv16hi3 */ |
| 57420 | case 3708: /* *avx512bw_pmulhrswv32hi3_mask */ |
| 57421 | case 3707: /* *avx512bw_pmulhrswv32hi3 */ |
| 57422 | case 3704: /* avx512bw_umulhrswv32hi3_mask */ |
| 57423 | case 3703: /* avx512bw_umulhrswv32hi3 */ |
| 57424 | case 3079: /* *sse4_1_mulv4si3_mask */ |
| 57425 | case 3078: /* *sse4_1_mulv4si3 */ |
| 57426 | case 3077: /* *avx2_mulv8si3_mask */ |
| 57427 | case 3076: /* *avx2_mulv8si3 */ |
| 57428 | case 3075: /* *avx512f_mulv16si3_mask */ |
| 57429 | case 3074: /* *avx512f_mulv16si3 */ |
| 57430 | case 3073: /* avx512dq_mulv2di3_mask */ |
| 57431 | case 3072: /* avx512dq_mulv2di3 */ |
| 57432 | case 3071: /* avx512dq_mulv4di3_mask */ |
| 57433 | case 3070: /* avx512dq_mulv4di3 */ |
| 57434 | case 3069: /* avx512dq_mulv8di3_mask */ |
| 57435 | case 3068: /* avx512dq_mulv8di3 */ |
| 57436 | case 3059: /* *sse4_1_mulv2siv2di3_mask */ |
| 57437 | case 3058: /* *sse4_1_mulv2siv2di3 */ |
| 57438 | case 3057: /* *vec_widen_smult_even_v8si_mask */ |
| 57439 | case 3056: /* *vec_widen_smult_even_v8si */ |
| 57440 | case 3055: /* *vec_widen_smult_even_v16si_mask */ |
| 57441 | case 3054: /* *vec_widen_smult_even_v16si */ |
| 57442 | case 3053: /* *vec_widen_umult_even_v4si_mask */ |
| 57443 | case 3052: /* *vec_widen_umult_even_v4si */ |
| 57444 | case 3051: /* *vec_widen_umult_even_v8si_mask */ |
| 57445 | case 3050: /* *vec_widen_umult_even_v8si */ |
| 57446 | case 3049: /* *vec_widen_umult_even_v16si_mask */ |
| 57447 | case 3048: /* *vec_widen_umult_even_v16si */ |
| 57448 | case 3047: /* *umulv8hi3_highpart_mask */ |
| 57449 | case 3046: /* *umulv8hi3_highpart */ |
| 57450 | case 3045: /* *smulv8hi3_highpart_mask */ |
| 57451 | case 3044: /* *smulv8hi3_highpart */ |
| 57452 | case 3043: /* *umulv16hi3_highpart_mask */ |
| 57453 | case 3042: /* *umulv16hi3_highpart */ |
| 57454 | case 3041: /* *smulv16hi3_highpart_mask */ |
| 57455 | case 3040: /* *smulv16hi3_highpart */ |
| 57456 | case 3039: /* *umulv32hi3_highpart_mask */ |
| 57457 | case 3038: /* *umulv32hi3_highpart */ |
| 57458 | case 3037: /* *smulv32hi3_highpart_mask */ |
| 57459 | case 3036: /* *smulv32hi3_highpart */ |
| 57460 | case 3035: /* *mulv8hi3_mask */ |
| 57461 | case 3034: /* *mulv8hi3 */ |
| 57462 | case 3033: /* *mulv16hi3_mask */ |
| 57463 | case 3032: /* *mulv16hi3 */ |
| 57464 | case 3031: /* *mulv32hi3_mask */ |
| 57465 | case 3030: /* *mulv32hi3 */ |
| 57466 | case 2226: /* sse2_cvttsd2siq_round */ |
| 57467 | case 2225: /* sse2_cvttsd2siq */ |
| 57468 | case 2224: /* sse2_cvttsd2si_round */ |
| 57469 | case 2223: /* sse2_cvttsd2si */ |
| 57470 | case 2222: /* sse2_cvtsd2siq_2 */ |
| 57471 | case 2221: /* sse2_cvtsd2siq_round */ |
| 57472 | case 2220: /* sse2_cvtsd2siq */ |
| 57473 | case 2219: /* sse2_cvtsd2si_2 */ |
| 57474 | case 2218: /* sse2_cvtsd2si_round */ |
| 57475 | case 2217: /* sse2_cvtsd2si */ |
| 57476 | case 2216: /* avx512f_vcvttsd2usiq_round */ |
| 57477 | case 2215: /* avx512f_vcvttsd2usiq */ |
| 57478 | case 2214: /* avx512f_vcvttsd2usi_round */ |
| 57479 | case 2213: /* avx512f_vcvttsd2usi */ |
| 57480 | case 2212: /* avx512f_vcvtsd2usiq_round */ |
| 57481 | case 2211: /* avx512f_vcvtsd2usiq */ |
| 57482 | case 2210: /* avx512f_vcvtsd2usi_round */ |
| 57483 | case 2209: /* avx512f_vcvtsd2usi */ |
| 57484 | case 2208: /* avx512f_vcvttss2usiq_round */ |
| 57485 | case 2207: /* avx512f_vcvttss2usiq */ |
| 57486 | case 2206: /* avx512f_vcvttss2usi_round */ |
| 57487 | case 2205: /* avx512f_vcvttss2usi */ |
| 57488 | case 2204: /* avx512f_vcvtss2usiq_round */ |
| 57489 | case 2203: /* avx512f_vcvtss2usiq */ |
| 57490 | case 2202: /* avx512f_vcvtss2usi_round */ |
| 57491 | case 2201: /* avx512f_vcvtss2usi */ |
| 57492 | case 2200: /* sse2_cvtsi2sdq_round */ |
| 57493 | case 2199: /* sse2_cvtsi2sdq */ |
| 57494 | case 2198: /* sse2_cvtsi2sd */ |
| 57495 | case 2126: /* cvtusi2sd64_round */ |
| 57496 | case 2125: /* cvtusi2sd64 */ |
| 57497 | case 2124: /* cvtusi2ss64_round */ |
| 57498 | case 2123: /* cvtusi2ss64 */ |
| 57499 | case 2122: /* cvtusi2sd32 */ |
| 57500 | case 2121: /* cvtusi2ss32_round */ |
| 57501 | case 2120: /* cvtusi2ss32 */ |
| 57502 | case 2119: /* sse_cvttss2siq_round */ |
| 57503 | case 2118: /* sse_cvttss2siq */ |
| 57504 | case 2117: /* sse_cvttss2si_round */ |
| 57505 | case 2116: /* sse_cvttss2si */ |
| 57506 | case 2115: /* sse_cvtss2siq_2 */ |
| 57507 | case 2114: /* sse_cvtss2siq_round */ |
| 57508 | case 2113: /* sse_cvtss2siq */ |
| 57509 | case 2112: /* sse_cvtss2si_2 */ |
| 57510 | case 2111: /* sse_cvtss2si_round */ |
| 57511 | case 2110: /* sse_cvtss2si */ |
| 57512 | case 2109: /* sse_cvtsi2ssq_round */ |
| 57513 | case 2108: /* sse_cvtsi2ssq */ |
| 57514 | case 2107: /* sse_cvtsi2ss_round */ |
| 57515 | case 2106: /* sse_cvtsi2ss */ |
| 57516 | case 173: /* fix_truncdfdi_sse */ |
| 57517 | case 172: /* fix_truncdfsi_sse */ |
| 57518 | case 171: /* fix_truncsfdi_sse */ |
| 57519 | case 170: /* fix_truncsfsi_sse */ |
| 57520 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) |
| 57521 | { |
| 57522 | return 8; |
| 57523 | } |
| 57524 | else if (cached_memory == MEMORY_NONE) |
| 57525 | { |
| 57526 | return 4; |
| 57527 | } |
| 57528 | else |
| 57529 | { |
| 57530 | return 0; |
| 57531 | } |
| 57532 | |
| 57533 | case 163: /* *truncxfdf2_mixed */ |
| 57534 | case 162: /* *truncxfsf2_mixed */ |
| 57535 | case 160: /* *truncdfsf_i387 */ |
| 57536 | extract_constrain_insn_cached (insn); |
| 57537 | if (which_alternative == 0) |
| 57538 | { |
| 57539 | return 2; |
| 57540 | } |
| 57541 | else |
| 57542 | { |
| 57543 | return 0; |
| 57544 | } |
| 57545 | |
| 57546 | case 4935: /* storedi_via_fpu */ |
| 57547 | case 4934: /* loaddi_via_fpu */ |
| 57548 | case 4869: /* sha256rnds2 */ |
| 57549 | case 4868: /* sha256msg2 */ |
| 57550 | case 4867: /* sha256msg1 */ |
| 57551 | case 4866: /* sha1rnds4 */ |
| 57552 | case 4865: /* sha1nexte */ |
| 57553 | case 4864: /* sha1msg2 */ |
| 57554 | case 4863: /* sha1msg1 */ |
| 57555 | case 4838: /* avx512bw_dbpsadbwv32hi_mask */ |
| 57556 | case 4837: /* *avx512bw_dbpsadbwv32hi */ |
| 57557 | case 4836: /* avx512bw_dbpsadbwv16hi_mask */ |
| 57558 | case 4835: /* *avx512bw_dbpsadbwv16hi */ |
| 57559 | case 4834: /* avx512bw_dbpsadbwv8hi_mask */ |
| 57560 | case 4833: /* *avx512bw_dbpsadbwv8hi */ |
| 57561 | case 4432: /* avx2_maskstoreq256 */ |
| 57562 | case 4431: /* avx2_maskstored256 */ |
| 57563 | case 4430: /* avx2_maskstoreq */ |
| 57564 | case 4429: /* avx2_maskstored */ |
| 57565 | case 4428: /* avx_maskstorepd256 */ |
| 57566 | case 4426: /* avx_maskstorepd */ |
| 57567 | case 4425: /* avx_maskstoreps */ |
| 57568 | case 4424: /* avx2_maskloadq256 */ |
| 57569 | case 4423: /* avx2_maskloadd256 */ |
| 57570 | case 4422: /* avx2_maskloadq */ |
| 57571 | case 4421: /* avx2_maskloadd */ |
| 57572 | case 4420: /* avx_maskloadpd256 */ |
| 57573 | case 4418: /* avx_maskloadpd */ |
| 57574 | case 4417: /* avx_maskloadps */ |
| 57575 | case 4110: /* avx2_vec_dupv4df */ |
| 57576 | case 4054: /* pclmulqdq */ |
| 57577 | case 4053: /* aeskeygenassist */ |
| 57578 | case 4052: /* aesimc */ |
| 57579 | case 4051: /* aesdeclast */ |
| 57580 | case 4050: /* aesdec */ |
| 57581 | case 4049: /* aesenclast */ |
| 57582 | case 4048: /* aesenc */ |
| 57583 | case 3801: /* sse4_1_phminposuw */ |
| 57584 | case 3788: /* sse4_1_mpsadbw */ |
| 57585 | case 3787: /* avx2_mpsadbw */ |
| 57586 | case 3763: /* absv2si2 */ |
| 57587 | case 3762: /* absv4hi2 */ |
| 57588 | case 3761: /* absv8qi2 */ |
| 57589 | case 3760: /* absv8hi2_mask */ |
| 57590 | case 3759: /* absv16hi2_mask */ |
| 57591 | case 3758: /* absv32hi2_mask */ |
| 57592 | case 3757: /* absv32qi2_mask */ |
| 57593 | case 3756: /* absv16qi2_mask */ |
| 57594 | case 3755: /* absv64qi2_mask */ |
| 57595 | case 3754: /* absv2di2_mask */ |
| 57596 | case 3753: /* absv4di2_mask */ |
| 57597 | case 3752: /* absv8di2_mask */ |
| 57598 | case 3751: /* absv4si2_mask */ |
| 57599 | case 3750: /* absv8si2_mask */ |
| 57600 | case 3749: /* absv16si2_mask */ |
| 57601 | case 3748: /* *absv2di2 */ |
| 57602 | case 3747: /* *absv4di2 */ |
| 57603 | case 3746: /* *absv8di2 */ |
| 57604 | case 3745: /* *absv4si2 */ |
| 57605 | case 3744: /* *absv8si2 */ |
| 57606 | case 3743: /* *absv16si2 */ |
| 57607 | case 3742: /* *absv8hi2 */ |
| 57608 | case 3741: /* *absv16hi2 */ |
| 57609 | case 3740: /* *absv32hi2 */ |
| 57610 | case 3739: /* *absv16qi2 */ |
| 57611 | case 3738: /* *absv32qi2 */ |
| 57612 | case 3737: /* *absv64qi2 */ |
| 57613 | case 3729: /* ssse3_psignv2si3 */ |
| 57614 | case 3728: /* ssse3_psignv4hi3 */ |
| 57615 | case 3727: /* ssse3_psignv8qi3 */ |
| 57616 | case 3726: /* ssse3_psignv4si3 */ |
| 57617 | case 3725: /* avx2_psignv8si3 */ |
| 57618 | case 3724: /* ssse3_psignv8hi3 */ |
| 57619 | case 3723: /* avx2_psignv16hi3 */ |
| 57620 | case 3722: /* ssse3_psignv16qi3 */ |
| 57621 | case 3721: /* avx2_psignv32qi3 */ |
| 57622 | case 3720: /* ssse3_pshufbv8qi3 */ |
| 57623 | case 3719: /* ssse3_pshufbv16qi3_mask */ |
| 57624 | case 3718: /* ssse3_pshufbv16qi3 */ |
| 57625 | case 3717: /* avx2_pshufbv32qi3_mask */ |
| 57626 | case 3716: /* avx2_pshufbv32qi3 */ |
| 57627 | case 3715: /* avx512bw_pshufbv64qi3_mask */ |
| 57628 | case 3714: /* avx512bw_pshufbv64qi3 */ |
| 57629 | case 3635: /* *vec_extractv4si_zext */ |
| 57630 | case 3626: /* *vec_extractv8hi_zext */ |
| 57631 | case 3625: /* *vec_extractv8hi_zext */ |
| 57632 | case 3624: /* *vec_extractv16qi_zext */ |
| 57633 | case 3623: /* *vec_extractv16qi_zext */ |
| 57634 | case 3622: /* *vec_extractv8hi */ |
| 57635 | case 3621: /* *vec_extractv16qi */ |
| 57636 | case 3607: /* sse2_pshufd_1_mask */ |
| 57637 | case 3606: /* sse2_pshufd_1 */ |
| 57638 | case 3605: /* avx2_pshufd_1_mask */ |
| 57639 | case 3604: /* avx2_pshufd_1 */ |
| 57640 | case 3603: /* avx512f_pshufd_1_mask */ |
| 57641 | case 3602: /* avx512f_pshufd_1 */ |
| 57642 | case 2734: /* vec_dupv2df_mask */ |
| 57643 | case 2733: /* vec_dupv2df */ |
| 57644 | case 2530: /* vec_extract_hi_v32qi */ |
| 57645 | case 2528: /* vec_extract_hi_v64qi */ |
| 57646 | case 2526: /* vec_extract_hi_v16hi */ |
| 57647 | case 2524: /* vec_extract_hi_v32hi */ |
| 57648 | case 2521: /* vec_extract_hi_v8si */ |
| 57649 | case 2519: /* vec_extract_hi_v8si_mask */ |
| 57650 | case 2517: /* vec_extract_hi_v8si_maskm */ |
| 57651 | case 2515: /* vec_extract_lo_v8si_maskm */ |
| 57652 | case 2512: /* vec_extract_lo_v8si_mask */ |
| 57653 | case 2511: /* vec_extract_lo_v8si */ |
| 57654 | case 2510: /* vec_extract_hi_v4df_mask */ |
| 57655 | case 2509: /* vec_extract_hi_v4df */ |
| 57656 | case 2508: /* vec_extract_hi_v4di_mask */ |
| 57657 | case 2507: /* vec_extract_hi_v4di */ |
| 57658 | case 2506: /* vec_extract_lo_v4df_mask */ |
| 57659 | case 2505: /* vec_extract_lo_v4df */ |
| 57660 | case 2504: /* vec_extract_lo_v4di_mask */ |
| 57661 | case 2503: /* vec_extract_lo_v4di */ |
| 57662 | case 2498: /* vec_extract_hi_v16si_mask */ |
| 57663 | case 2497: /* vec_extract_hi_v16si */ |
| 57664 | case 2496: /* vec_extract_hi_v16sf_mask */ |
| 57665 | case 2495: /* vec_extract_hi_v16sf */ |
| 57666 | case 2494: /* vec_extract_hi_v16si_maskm */ |
| 57667 | case 2493: /* vec_extract_hi_v16sf_maskm */ |
| 57668 | case 2492: /* vec_extract_hi_v8di_mask */ |
| 57669 | case 2491: /* vec_extract_hi_v8di */ |
| 57670 | case 2490: /* vec_extract_hi_v8df_mask */ |
| 57671 | case 2489: /* vec_extract_hi_v8df */ |
| 57672 | case 2488: /* vec_extract_hi_v8di_maskm */ |
| 57673 | case 2487: /* vec_extract_hi_v8df_maskm */ |
| 57674 | case 2486: /* vec_extract_lo_v8di_mask */ |
| 57675 | case 2485: /* vec_extract_lo_v8di */ |
| 57676 | case 2484: /* vec_extract_lo_v8df_mask */ |
| 57677 | case 2483: /* vec_extract_lo_v8df */ |
| 57678 | case 2482: /* vec_extract_lo_v8di_maskm */ |
| 57679 | case 2481: /* vec_extract_lo_v8df_maskm */ |
| 57680 | case 2480: /* avx512f_vextracti32x4_1_mask */ |
| 57681 | case 2479: /* *avx512f_vextracti32x4_1 */ |
| 57682 | case 2478: /* avx512f_vextractf32x4_1_mask */ |
| 57683 | case 2477: /* *avx512f_vextractf32x4_1 */ |
| 57684 | case 2476: /* avx512dq_vextracti64x2_1_mask */ |
| 57685 | case 2475: /* *avx512dq_vextracti64x2_1 */ |
| 57686 | case 2474: /* avx512dq_vextractf64x2_1_mask */ |
| 57687 | case 2473: /* *avx512dq_vextractf64x2_1 */ |
| 57688 | case 2472: /* avx512f_vextracti32x4_1_maskm */ |
| 57689 | case 2471: /* avx512f_vextractf32x4_1_maskm */ |
| 57690 | case 2470: /* avx512dq_vextracti64x2_1_maskm */ |
| 57691 | case 2469: /* avx512dq_vextractf64x2_1_maskm */ |
| 57692 | case 2458: /* avx512f_vec_dupv8df_1 */ |
| 57693 | case 2457: /* avx512f_vec_dupv16sf_1 */ |
| 57694 | case 2455: /* avx2_vec_dupv4sf */ |
| 57695 | case 1020: /* sse4_2_crc32di */ |
| 57696 | case 1019: /* sse4_2_crc32si */ |
| 57697 | case 1018: /* sse4_2_crc32hi */ |
| 57698 | case 1017: /* sse4_2_crc32qi */ |
| 57699 | case 927: /* fistsi2_ceil_with_temp */ |
| 57700 | case 926: /* fistsi2_floor_with_temp */ |
| 57701 | case 925: /* fisthi2_ceil_with_temp */ |
| 57702 | case 924: /* fisthi2_floor_with_temp */ |
| 57703 | case 923: /* fistsi2_ceil */ |
| 57704 | case 922: /* fistsi2_floor */ |
| 57705 | case 921: /* fisthi2_ceil */ |
| 57706 | case 920: /* fisthi2_floor */ |
| 57707 | case 919: /* fistdi2_ceil_with_temp */ |
| 57708 | case 918: /* fistdi2_floor_with_temp */ |
| 57709 | case 917: /* fistdi2_ceil */ |
| 57710 | case 916: /* fistdi2_floor */ |
| 57711 | case 915: /* *fistdi2_ceil_1 */ |
| 57712 | case 914: /* *fistdi2_floor_1 */ |
| 57713 | case 913: /* *fistsi2_ceil_1 */ |
| 57714 | case 912: /* *fistsi2_floor_1 */ |
| 57715 | case 911: /* *fisthi2_ceil_1 */ |
| 57716 | case 910: /* *fisthi2_floor_1 */ |
| 57717 | case 841: /* truncxfdf2_i387_noop_unspec */ |
| 57718 | case 840: /* truncxfsf2_i387_noop_unspec */ |
| 57719 | case 810: /* *tls_dynamic_gnu2_call_64 */ |
| 57720 | case 807: /* *tls_dynamic_gnu2_call_32 */ |
| 57721 | case 685: /* *sibcall_value_pop_memory */ |
| 57722 | case 684: /* *sibcall_value_pop */ |
| 57723 | case 683: /* *call_value_pop */ |
| 57724 | case 682: /* *sibcall_value_memory */ |
| 57725 | case 681: /* *sibcall_value_memory */ |
| 57726 | case 680: /* *sibcall_value */ |
| 57727 | case 679: /* *sibcall_value */ |
| 57728 | case 678: /* *sibcall_value_GOT_32 */ |
| 57729 | case 677: /* *call_value_got_x32 */ |
| 57730 | case 676: /* *call_value */ |
| 57731 | case 675: /* *call_value */ |
| 57732 | case 674: /* *sibcall_pop_memory */ |
| 57733 | case 673: /* *sibcall_pop */ |
| 57734 | case 672: /* *call_pop */ |
| 57735 | case 671: /* *sibcall_memory */ |
| 57736 | case 670: /* *sibcall_memory */ |
| 57737 | case 669: /* *sibcall */ |
| 57738 | case 668: /* *sibcall */ |
| 57739 | case 667: /* *sibcall_GOT_32 */ |
| 57740 | case 666: /* *call_got_x32 */ |
| 57741 | case 665: /* *call */ |
| 57742 | case 664: /* *call */ |
| 57743 | case 495: /* *negextenddfxf2 */ |
| 57744 | case 494: /* *absextenddfxf2 */ |
| 57745 | case 493: /* *negextendsfxf2 */ |
| 57746 | case 492: /* *absextendsfxf2 */ |
| 57747 | case 491: /* *negextendsfdf2 */ |
| 57748 | case 490: /* *absextendsfdf2 */ |
| 57749 | case 489: /* *negxf2_1 */ |
| 57750 | case 488: /* *absxf2_1 */ |
| 57751 | case 487: /* *negdf2_1 */ |
| 57752 | case 486: /* *absdf2_1 */ |
| 57753 | case 485: /* *negsf2_1 */ |
| 57754 | case 484: /* *abssf2_1 */ |
| 57755 | case 206: /* *floatdidf2_i387 */ |
| 57756 | case 205: /* *floatdisf2_i387 */ |
| 57757 | case 204: /* *floatsidf2_i387 */ |
| 57758 | case 203: /* *floatsisf2_i387 */ |
| 57759 | case 195: /* floathidf2 */ |
| 57760 | case 194: /* floathisf2 */ |
| 57761 | case 191: /* fix_truncsi_i387_with_temp */ |
| 57762 | case 190: /* fix_trunchi_i387_with_temp */ |
| 57763 | case 189: /* fix_truncsi_i387 */ |
| 57764 | case 188: /* fix_trunchi_i387 */ |
| 57765 | case 187: /* fix_truncdi_i387_with_temp */ |
| 57766 | case 186: /* fix_truncdi_i387 */ |
| 57767 | case 185: /* *fix_truncdi_i387_1 */ |
| 57768 | case 184: /* *fix_truncsi_i387_1 */ |
| 57769 | case 183: /* *fix_trunchi_i387_1 */ |
| 57770 | case 182: /* fix_truncdi_i387_fisttp_with_temp */ |
| 57771 | case 181: /* fix_truncsi_i387_fisttp_with_temp */ |
| 57772 | case 180: /* fix_trunchi_i387_fisttp_with_temp */ |
| 57773 | case 179: /* fix_truncdi_i387_fisttp */ |
| 57774 | case 178: /* fix_truncsi_i387_fisttp */ |
| 57775 | case 177: /* fix_trunchi_i387_fisttp */ |
| 57776 | case 176: /* fix_truncdi_fisttp_i387_1 */ |
| 57777 | case 175: /* fix_truncsi_fisttp_i387_1 */ |
| 57778 | case 174: /* fix_trunchi_fisttp_i387_1 */ |
| 57779 | case 167: /* *truncxfdf2_i387 */ |
| 57780 | case 166: /* *truncxfsf2_i387 */ |
| 57781 | case 165: /* truncxfdf2_i387_noop */ |
| 57782 | case 164: /* truncxfsf2_i387_noop */ |
| 57783 | case 161: /* *truncdfsf2_i387_1 */ |
| 57784 | case 158: /* *truncdfsf_fast_i387 */ |
| 57785 | case 130: /* *swapdf */ |
| 57786 | case 129: /* *swapsf */ |
| 57787 | case 128: /* swapxf */ |
| 57788 | return 2; |
| 57789 | |
| 57790 | case 123: /* *pushsf */ |
| 57791 | case 122: /* *pushsf_rex64 */ |
| 57792 | extract_constrain_insn_cached (insn); |
| 57793 | if (which_alternative != 0) |
| 57794 | { |
| 57795 | return 1; |
| 57796 | } |
| 57797 | else |
| 57798 | { |
| 57799 | return 0; |
| 57800 | } |
| 57801 | |
| 57802 | case 121: /* *pushdf */ |
| 57803 | extract_constrain_insn_cached (insn); |
| 57804 | if (((1 << which_alternative) & 0x1e)) |
| 57805 | { |
| 57806 | return 1; |
| 57807 | } |
| 57808 | else |
| 57809 | { |
| 57810 | return 0; |
| 57811 | } |
| 57812 | |
| 57813 | case 120: /* *pushxf */ |
| 57814 | case 119: /* *pushxf_rounded */ |
| 57815 | case 118: /* *pushxf_rounded */ |
| 57816 | case 117: /* *pushtf */ |
| 57817 | extract_constrain_insn_cached (insn); |
| 57818 | if (which_alternative != 0) |
| 57819 | { |
| 57820 | return 1; |
| 57821 | } |
| 57822 | else |
| 57823 | { |
| 57824 | return 0; |
| 57825 | } |
| 57826 | |
| 57827 | case 96: /* *swaphi */ |
| 57828 | case 95: /* *swapqi */ |
| 57829 | case 94: /* *swapdi */ |
| 57830 | case 93: /* *swapsi */ |
| 57831 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) |
| 57832 | { |
| 57833 | return 4; |
| 57834 | } |
| 57835 | else if (cached_memory == MEMORY_STORE) |
| 57836 | { |
| 57837 | return 5; |
| 57838 | } |
| 57839 | else |
| 57840 | { |
| 57841 | return 0; |
| 57842 | } |
| 57843 | |
| 57844 | case 4758: /* avx512vl_compressstorev2df_mask */ |
| 57845 | case 4757: /* avx512vl_compressstorev2di_mask */ |
| 57846 | case 4756: /* avx512vl_compressstorev4sf_mask */ |
| 57847 | case 4755: /* avx512vl_compressstorev4si_mask */ |
| 57848 | case 4750: /* avx512f_compressstorev8df_mask */ |
| 57849 | case 4749: /* avx512f_compressstorev8di_mask */ |
| 57850 | case 4748: /* avx512f_compressstorev16sf_mask */ |
| 57851 | case 4747: /* avx512f_compressstorev16si_mask */ |
| 57852 | case 2933: /* avx512f_us_truncatev8div16qi2_mask_store */ |
| 57853 | case 2932: /* avx512f_truncatev8div16qi2_mask_store */ |
| 57854 | case 2931: /* avx512f_ss_truncatev8div16qi2_mask_store */ |
| 57855 | case 2924: /* *avx512f_us_truncatev8div16qi2_store */ |
| 57856 | case 2923: /* *avx512f_truncatev8div16qi2_store */ |
| 57857 | case 2922: /* *avx512f_ss_truncatev8div16qi2_store */ |
| 57858 | case 2918: /* avx512vl_us_truncatev2div2si2_mask_store */ |
| 57859 | case 2917: /* avx512vl_truncatev2div2si2_mask_store */ |
| 57860 | case 2916: /* avx512vl_ss_truncatev2div2si2_mask_store */ |
| 57861 | case 2909: /* *avx512vl_us_truncatev2div2si2_store */ |
| 57862 | case 2908: /* *avx512vl_truncatev2div2si2_store */ |
| 57863 | case 2907: /* *avx512vl_ss_truncatev2div2si2_store */ |
| 57864 | case 2903: /* avx512vl_us_truncatev2div2hi2_mask_store */ |
| 57865 | case 2902: /* avx512vl_truncatev2div2hi2_mask_store */ |
| 57866 | case 2901: /* avx512vl_ss_truncatev2div2hi2_mask_store */ |
| 57867 | case 2894: /* *avx512vl_us_truncatev2div2hi2_store */ |
| 57868 | case 2893: /* *avx512vl_truncatev2div2hi2_store */ |
| 57869 | case 2892: /* *avx512vl_ss_truncatev2div2hi2_store */ |
| 57870 | case 2891: /* avx512vl_us_truncatev4div4hi2_mask_store */ |
| 57871 | case 2890: /* avx512vl_truncatev4div4hi2_mask_store */ |
| 57872 | case 2889: /* avx512vl_ss_truncatev4div4hi2_mask_store */ |
| 57873 | case 2888: /* avx512vl_us_truncatev4siv4hi2_mask_store */ |
| 57874 | case 2887: /* avx512vl_truncatev4siv4hi2_mask_store */ |
| 57875 | case 2886: /* avx512vl_ss_truncatev4siv4hi2_mask_store */ |
| 57876 | case 2873: /* *avx512vl_us_truncatev4div4hi2_store */ |
| 57877 | case 2872: /* *avx512vl_truncatev4div4hi2_store */ |
| 57878 | case 2871: /* *avx512vl_ss_truncatev4div4hi2_store */ |
| 57879 | case 2870: /* *avx512vl_us_truncatev4siv4hi2_store */ |
| 57880 | case 2869: /* *avx512vl_truncatev4siv4hi2_store */ |
| 57881 | case 2868: /* *avx512vl_ss_truncatev4siv4hi2_store */ |
| 57882 | case 2858: /* avx512vl_us_truncatev8siv8qi2_mask_store */ |
| 57883 | case 2857: /* avx512vl_truncatev8siv8qi2_mask_store */ |
| 57884 | case 2856: /* avx512vl_ss_truncatev8siv8qi2_mask_store */ |
| 57885 | case 2855: /* avx512vl_us_truncatev8hiv8qi2_mask_store */ |
| 57886 | case 2854: /* avx512vl_truncatev8hiv8qi2_mask_store */ |
| 57887 | case 2853: /* avx512vl_ss_truncatev8hiv8qi2_mask_store */ |
| 57888 | case 2840: /* *avx512vl_us_truncatev8siv8qi2_store */ |
| 57889 | case 2839: /* *avx512vl_truncatev8siv8qi2_store */ |
| 57890 | case 2838: /* *avx512vl_ss_truncatev8siv8qi2_store */ |
| 57891 | case 2837: /* *avx512vl_us_truncatev8hiv8qi2_store */ |
| 57892 | case 2836: /* *avx512vl_truncatev8hiv8qi2_store */ |
| 57893 | case 2835: /* *avx512vl_ss_truncatev8hiv8qi2_store */ |
| 57894 | case 2834: /* avx512vl_us_truncatev4div4qi2_mask_store */ |
| 57895 | case 2833: /* avx512vl_truncatev4div4qi2_mask_store */ |
| 57896 | case 2832: /* avx512vl_ss_truncatev4div4qi2_mask_store */ |
| 57897 | case 2831: /* avx512vl_us_truncatev4siv4qi2_mask_store */ |
| 57898 | case 2830: /* avx512vl_truncatev4siv4qi2_mask_store */ |
| 57899 | case 2829: /* avx512vl_ss_truncatev4siv4qi2_mask_store */ |
| 57900 | case 2816: /* *avx512vl_us_truncatev4div4qi2_store */ |
| 57901 | case 2815: /* *avx512vl_truncatev4div4qi2_store */ |
| 57902 | case 2814: /* *avx512vl_ss_truncatev4div4qi2_store */ |
| 57903 | case 2813: /* *avx512vl_us_truncatev4siv4qi2_store */ |
| 57904 | case 2812: /* *avx512vl_truncatev4siv4qi2_store */ |
| 57905 | case 2811: /* *avx512vl_ss_truncatev4siv4qi2_store */ |
| 57906 | case 2810: /* avx512vl_us_truncatev2div2qi2_mask_store */ |
| 57907 | case 2809: /* avx512vl_truncatev2div2qi2_mask_store */ |
| 57908 | case 2808: /* avx512vl_ss_truncatev2div2qi2_mask_store */ |
| 57909 | case 2801: /* *avx512vl_us_truncatev2div2qi2_store */ |
| 57910 | case 2800: /* *avx512vl_truncatev2div2qi2_store */ |
| 57911 | case 2799: /* *avx512vl_ss_truncatev2div2qi2_store */ |
| 57912 | case 1292: /* avx512vl_storev8hi_mask */ |
| 57913 | case 1290: /* avx512bw_storev32hi_mask */ |
| 57914 | case 1288: /* avx512vl_storev16qi_mask */ |
| 57915 | case 1287: /* avx512bw_storev64qi_mask */ |
| 57916 | case 1286: /* avx512vl_storev2df_mask */ |
| 57917 | case 1284: /* avx512f_storev8df_mask */ |
| 57918 | case 1283: /* avx512vl_storev4sf_mask */ |
| 57919 | case 1281: /* avx512f_storev16sf_mask */ |
| 57920 | case 1280: /* avx512vl_storev2di_mask */ |
| 57921 | case 1278: /* avx512f_storev8di_mask */ |
| 57922 | case 1277: /* avx512vl_storev4si_mask */ |
| 57923 | case 1275: /* avx512f_storev16si_mask */ |
| 57924 | case 1100: /* *bnd64_stx */ |
| 57925 | case 1099: /* *bnd32_stx */ |
| 57926 | case 1049: /* fnstenv */ |
| 57927 | case 1042: /* xsaves64 */ |
| 57928 | case 1041: /* xsavec64 */ |
| 57929 | case 1040: /* xsaveopt64 */ |
| 57930 | case 1039: /* xsave64 */ |
| 57931 | case 1038: /* xsaves_rex64 */ |
| 57932 | case 1037: /* xsavec_rex64 */ |
| 57933 | case 1036: /* xsaveopt_rex64 */ |
| 57934 | case 1035: /* xsave_rex64 */ |
| 57935 | case 1034: /* xsaves */ |
| 57936 | case 1033: /* xsavec */ |
| 57937 | case 1032: /* xsaveopt */ |
| 57938 | case 1031: /* xsave */ |
| 57939 | case 1028: /* fxsave64 */ |
| 57940 | case 1027: /* fxsave */ |
| 57941 | case 801: /* *load_tp_di */ |
| 57942 | case 800: /* *load_tp_si */ |
| 57943 | case 799: /* *load_tp_x32_zext */ |
| 57944 | case 798: /* *load_tp_x32 */ |
| 57945 | case 92: /* *movabsdi_2 */ |
| 57946 | case 91: /* *movabssi_2 */ |
| 57947 | case 90: /* *movabshi_2 */ |
| 57948 | case 89: /* *movabsqi_2 */ |
| 57949 | return 4; |
| 57950 | |
| 57951 | case 4754: /* avx512vl_compressstorev4df_mask */ |
| 57952 | case 4753: /* avx512vl_compressstorev4di_mask */ |
| 57953 | case 4752: /* avx512vl_compressstorev8sf_mask */ |
| 57954 | case 4751: /* avx512vl_compressstorev8si_mask */ |
| 57955 | case 1291: /* avx512vl_storev16hi_mask */ |
| 57956 | case 1289: /* avx512vl_storev32qi_mask */ |
| 57957 | case 1285: /* avx512vl_storev4df_mask */ |
| 57958 | case 1282: /* avx512vl_storev8sf_mask */ |
| 57959 | case 1279: /* avx512vl_storev4di_mask */ |
| 57960 | case 1276: /* avx512vl_storev8si_mask */ |
| 57961 | case 1098: /* *bnd64_ldx */ |
| 57962 | case 1097: /* *bnd32_ldx */ |
| 57963 | case 1050: /* fldenv */ |
| 57964 | case 1048: /* xrstors64 */ |
| 57965 | case 1047: /* xrstor64 */ |
| 57966 | case 1046: /* xrstors_rex64 */ |
| 57967 | case 1045: /* xrstor_rex64 */ |
| 57968 | case 1044: /* xrstors */ |
| 57969 | case 1043: /* xrstor */ |
| 57970 | case 1030: /* fxrstor64 */ |
| 57971 | case 1029: /* fxrstor */ |
| 57972 | case 805: /* *add_tp_di */ |
| 57973 | case 804: /* *add_tp_si */ |
| 57974 | case 803: /* *add_tp_x32_zext */ |
| 57975 | case 802: /* *add_tp_x32 */ |
| 57976 | case 88: /* *movabsdi_1 */ |
| 57977 | case 87: /* *movabssi_1 */ |
| 57978 | case 86: /* *movabshi_1 */ |
| 57979 | case 85: /* *movabsqi_1 */ |
| 57980 | return 5; |
| 57981 | |
| 57982 | case 1000: /* probe_stack_di */ |
| 57983 | case 999: /* probe_stack_si */ |
| 57984 | case 732: /* tzcnt_hi */ |
| 57985 | case 730: /* *tzcnt_di_falsedep */ |
| 57986 | case 728: /* *tzcnt_si_falsedep */ |
| 57987 | case 726: /* tzcnt_di */ |
| 57988 | case 724: /* tzcnt_si */ |
| 57989 | case 719: /* *bsrhi */ |
| 57990 | case 718: /* bsr */ |
| 57991 | case 717: /* bsr_rex64 */ |
| 57992 | case 716: /* *ctzdi2_falsedep */ |
| 57993 | case 715: /* *ctzsi2_falsedep */ |
| 57994 | case 714: /* ctzdi2 */ |
| 57995 | case 713: /* ctzsi2 */ |
| 57996 | case 712: /* *bsfdi_1 */ |
| 57997 | case 711: /* *bsfsi_1 */ |
| 57998 | case 710: /* *tzcntdi_1_falsedep */ |
| 57999 | case 709: /* *tzcntsi_1_falsedep */ |
| 58000 | case 708: /* *tzcntdi_1 */ |
| 58001 | case 707: /* *tzcntsi_1 */ |
| 58002 | case 613: /* *btdi */ |
| 58003 | case 612: /* *btsi */ |
| 58004 | case 611: /* *btcq */ |
| 58005 | case 610: /* *btrq */ |
| 58006 | case 609: /* *btsq */ |
| 58007 | case 608: /* *rotrqi3_1_slp */ |
| 58008 | case 607: /* *rotlqi3_1_slp */ |
| 58009 | case 567: /* *ashrqi3_1_slp */ |
| 58010 | case 566: /* *lshrqi3_1_slp */ |
| 58011 | case 512: /* *one_cmplsi2_2_zext */ |
| 58012 | case 511: /* *one_cmpldi2_2 */ |
| 58013 | case 510: /* *one_cmplsi2_2 */ |
| 58014 | case 509: /* *one_cmplhi2_2 */ |
| 58015 | case 508: /* *one_cmplqi2_2 */ |
| 58016 | case 507: /* *one_cmplqi2_1 */ |
| 58017 | case 506: /* *one_cmplsi2_1_zext */ |
| 58018 | case 505: /* *one_cmpldi2_1 */ |
| 58019 | case 504: /* *one_cmplsi2_1 */ |
| 58020 | case 503: /* *one_cmplhi2_1 */ |
| 58021 | case 479: /* *negvdi3 */ |
| 58022 | case 478: /* *negvsi3 */ |
| 58023 | case 477: /* *negvhi3 */ |
| 58024 | case 476: /* *negvqi3 */ |
| 58025 | case 475: /* *negsi2_cmpz_zext */ |
| 58026 | case 474: /* *negdi2_cmpz */ |
| 58027 | case 473: /* *negsi2_cmpz */ |
| 58028 | case 472: /* *neghi2_cmpz */ |
| 58029 | case 471: /* *negqi2_cmpz */ |
| 58030 | case 470: /* *negsi2_1_zext */ |
| 58031 | case 469: /* *negdi2_1 */ |
| 58032 | case 468: /* *negsi2_1 */ |
| 58033 | case 467: /* *neghi2_1 */ |
| 58034 | case 466: /* *negqi2_1 */ |
| 58035 | case 450: /* *xorqi_2_slp */ |
| 58036 | case 449: /* *iorqi_2_slp */ |
| 58037 | case 436: /* *xorqi_1_slp */ |
| 58038 | case 435: /* *iorqi_1_slp */ |
| 58039 | case 410: /* *andqi_2_slp */ |
| 58040 | case 403: /* *andqi_1_slp */ |
| 58041 | case 276: /* *subqi_1_slp */ |
| 58042 | case 138: /* zero_extendqihi2_and */ |
| 58043 | case 135: /* zero_extendhisi2_and */ |
| 58044 | case 134: /* zero_extendqisi2_and */ |
| 58045 | case 100: /* *movstricthi_xor */ |
| 58046 | case 99: /* *movstrictqi_xor */ |
| 58047 | case 77: /* *movdi_or */ |
| 58048 | case 76: /* *movsi_or */ |
| 58049 | case 75: /* *movdi_xor */ |
| 58050 | case 74: /* *movsi_xor */ |
| 58051 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) |
| 58052 | { |
| 58053 | return 1; |
| 58054 | } |
| 58055 | else if ((cached_memory == MEMORY_BOTH) || (cached_memory == MEMORY_STORE)) |
| 58056 | { |
| 58057 | return 4; |
| 58058 | } |
| 58059 | else |
| 58060 | { |
| 58061 | return 0; |
| 58062 | } |
| 58063 | |
| 58064 | case 4899: /* vpmultishiftqbv32qi_mask */ |
| 58065 | case 4898: /* vpmultishiftqbv32qi */ |
| 58066 | case 4897: /* vpmultishiftqbv16qi_mask */ |
| 58067 | case 4896: /* vpmultishiftqbv16qi */ |
| 58068 | case 4895: /* vpmultishiftqbv64qi_mask */ |
| 58069 | case 4894: /* vpmultishiftqbv64qi */ |
| 58070 | case 4416: /* vec_set_hi_v32qi */ |
| 58071 | case 4415: /* vec_set_lo_v32qi */ |
| 58072 | case 4414: /* vec_set_hi_v16hi */ |
| 58073 | case 4413: /* vec_set_lo_v16hi */ |
| 58074 | case 4410: /* vec_set_hi_v8si_mask */ |
| 58075 | case 4409: /* vec_set_hi_v8si */ |
| 58076 | case 4406: /* vec_set_lo_v8si_mask */ |
| 58077 | case 4405: /* vec_set_lo_v8si */ |
| 58078 | case 4404: /* vec_set_hi_v4df_mask */ |
| 58079 | case 4403: /* vec_set_hi_v4df */ |
| 58080 | case 4402: /* vec_set_hi_v4di_mask */ |
| 58081 | case 4401: /* vec_set_hi_v4di */ |
| 58082 | case 4400: /* vec_set_lo_v4df_mask */ |
| 58083 | case 4399: /* vec_set_lo_v4df */ |
| 58084 | case 4398: /* vec_set_lo_v4di_mask */ |
| 58085 | case 4397: /* vec_set_lo_v4di */ |
| 58086 | case 4390: /* *avx_vperm2f128v4df_nozero */ |
| 58087 | case 4388: /* *avx_vperm2f128v8si_nozero */ |
| 58088 | case 4387: /* *avx_vperm2f128v4df_full */ |
| 58089 | case 4385: /* *avx_vperm2f128v8si_full */ |
| 58090 | case 4384: /* avx512bw_vpermt2varv32hi3_mask */ |
| 58091 | case 4383: /* avx512vl_vpermt2varv16hi3_mask */ |
| 58092 | case 4382: /* avx512vl_vpermt2varv8hi3_mask */ |
| 58093 | case 4381: /* avx512vl_vpermt2varv32qi3_mask */ |
| 58094 | case 4380: /* avx512vl_vpermt2varv16qi3_mask */ |
| 58095 | case 4379: /* avx512bw_vpermt2varv64qi3_mask */ |
| 58096 | case 4378: /* avx512vl_vpermt2varv2df3_mask */ |
| 58097 | case 4377: /* avx512vl_vpermt2varv2di3_mask */ |
| 58098 | case 4376: /* avx512vl_vpermt2varv4sf3_mask */ |
| 58099 | case 4375: /* avx512vl_vpermt2varv4si3_mask */ |
| 58100 | case 4374: /* avx512vl_vpermt2varv4df3_mask */ |
| 58101 | case 4373: /* avx512vl_vpermt2varv4di3_mask */ |
| 58102 | case 4371: /* avx512vl_vpermt2varv8si3_mask */ |
| 58103 | case 4370: /* avx512f_vpermt2varv8df3_mask */ |
| 58104 | case 4369: /* avx512f_vpermt2varv8di3_mask */ |
| 58105 | case 4368: /* avx512f_vpermt2varv16sf3_mask */ |
| 58106 | case 4367: /* avx512f_vpermt2varv16si3_mask */ |
| 58107 | case 4366: /* avx512bw_vpermt2varv32hi3_maskz_1 */ |
| 58108 | case 4365: /* avx512bw_vpermt2varv32hi3 */ |
| 58109 | case 4364: /* avx512vl_vpermt2varv16hi3_maskz_1 */ |
| 58110 | case 4363: /* avx512vl_vpermt2varv16hi3 */ |
| 58111 | case 4362: /* avx512vl_vpermt2varv8hi3_maskz_1 */ |
| 58112 | case 4361: /* avx512vl_vpermt2varv8hi3 */ |
| 58113 | case 4360: /* avx512vl_vpermt2varv32qi3_maskz_1 */ |
| 58114 | case 4359: /* avx512vl_vpermt2varv32qi3 */ |
| 58115 | case 4358: /* avx512vl_vpermt2varv16qi3_maskz_1 */ |
| 58116 | case 4357: /* avx512vl_vpermt2varv16qi3 */ |
| 58117 | case 4356: /* avx512bw_vpermt2varv64qi3_maskz_1 */ |
| 58118 | case 4355: /* avx512bw_vpermt2varv64qi3 */ |
| 58119 | case 4354: /* avx512vl_vpermt2varv2df3_maskz_1 */ |
| 58120 | case 4353: /* avx512vl_vpermt2varv2df3 */ |
| 58121 | case 4352: /* avx512vl_vpermt2varv2di3_maskz_1 */ |
| 58122 | case 4351: /* avx512vl_vpermt2varv2di3 */ |
| 58123 | case 4350: /* avx512vl_vpermt2varv4sf3_maskz_1 */ |
| 58124 | case 4349: /* avx512vl_vpermt2varv4sf3 */ |
| 58125 | case 4348: /* avx512vl_vpermt2varv4si3_maskz_1 */ |
| 58126 | case 4347: /* avx512vl_vpermt2varv4si3 */ |
| 58127 | case 4346: /* avx512vl_vpermt2varv4df3_maskz_1 */ |
| 58128 | case 4345: /* avx512vl_vpermt2varv4df3 */ |
| 58129 | case 4344: /* avx512vl_vpermt2varv4di3_maskz_1 */ |
| 58130 | case 4343: /* avx512vl_vpermt2varv4di3 */ |
| 58131 | case 4340: /* avx512vl_vpermt2varv8si3_maskz_1 */ |
| 58132 | case 4339: /* avx512vl_vpermt2varv8si3 */ |
| 58133 | case 4338: /* avx512f_vpermt2varv8df3_maskz_1 */ |
| 58134 | case 4337: /* avx512f_vpermt2varv8df3 */ |
| 58135 | case 4336: /* avx512f_vpermt2varv8di3_maskz_1 */ |
| 58136 | case 4335: /* avx512f_vpermt2varv8di3 */ |
| 58137 | case 4334: /* avx512f_vpermt2varv16sf3_maskz_1 */ |
| 58138 | case 4333: /* avx512f_vpermt2varv16sf3 */ |
| 58139 | case 4332: /* avx512f_vpermt2varv16si3_maskz_1 */ |
| 58140 | case 4331: /* avx512f_vpermt2varv16si3 */ |
| 58141 | case 4330: /* avx512bw_vpermi2varv32hi3_mask */ |
| 58142 | case 4329: /* avx512vl_vpermi2varv16hi3_mask */ |
| 58143 | case 4328: /* avx512vl_vpermi2varv8hi3_mask */ |
| 58144 | case 4327: /* avx512vl_vpermi2varv32qi3_mask */ |
| 58145 | case 4326: /* avx512vl_vpermi2varv16qi3_mask */ |
| 58146 | case 4325: /* avx512bw_vpermi2varv64qi3_mask */ |
| 58147 | case 4324: /* avx512vl_vpermi2varv2df3_mask */ |
| 58148 | case 4323: /* avx512vl_vpermi2varv2di3_mask */ |
| 58149 | case 4322: /* avx512vl_vpermi2varv4sf3_mask */ |
| 58150 | case 4321: /* avx512vl_vpermi2varv4si3_mask */ |
| 58151 | case 4320: /* avx512vl_vpermi2varv4df3_mask */ |
| 58152 | case 4319: /* avx512vl_vpermi2varv4di3_mask */ |
| 58153 | case 4317: /* avx512vl_vpermi2varv8si3_mask */ |
| 58154 | case 4316: /* avx512f_vpermi2varv8df3_mask */ |
| 58155 | case 4315: /* avx512f_vpermi2varv8di3_mask */ |
| 58156 | case 4314: /* avx512f_vpermi2varv16sf3_mask */ |
| 58157 | case 4313: /* avx512f_vpermi2varv16si3_mask */ |
| 58158 | case 4312: /* avx512bw_vpermi2varv32hi3_maskz_1 */ |
| 58159 | case 4311: /* avx512bw_vpermi2varv32hi3 */ |
| 58160 | case 4310: /* avx512vl_vpermi2varv16hi3_maskz_1 */ |
| 58161 | case 4309: /* avx512vl_vpermi2varv16hi3 */ |
| 58162 | case 4308: /* avx512vl_vpermi2varv8hi3_maskz_1 */ |
| 58163 | case 4307: /* avx512vl_vpermi2varv8hi3 */ |
| 58164 | case 4306: /* avx512vl_vpermi2varv32qi3_maskz_1 */ |
| 58165 | case 4305: /* avx512vl_vpermi2varv32qi3 */ |
| 58166 | case 4304: /* avx512vl_vpermi2varv16qi3_maskz_1 */ |
| 58167 | case 4303: /* avx512vl_vpermi2varv16qi3 */ |
| 58168 | case 4302: /* avx512bw_vpermi2varv64qi3_maskz_1 */ |
| 58169 | case 4301: /* avx512bw_vpermi2varv64qi3 */ |
| 58170 | case 4300: /* avx512vl_vpermi2varv2df3_maskz_1 */ |
| 58171 | case 4299: /* avx512vl_vpermi2varv2df3 */ |
| 58172 | case 4298: /* avx512vl_vpermi2varv2di3_maskz_1 */ |
| 58173 | case 4297: /* avx512vl_vpermi2varv2di3 */ |
| 58174 | case 4296: /* avx512vl_vpermi2varv4sf3_maskz_1 */ |
| 58175 | case 4295: /* avx512vl_vpermi2varv4sf3 */ |
| 58176 | case 4294: /* avx512vl_vpermi2varv4si3_maskz_1 */ |
| 58177 | case 4293: /* avx512vl_vpermi2varv4si3 */ |
| 58178 | case 4292: /* avx512vl_vpermi2varv4df3_maskz_1 */ |
| 58179 | case 4291: /* avx512vl_vpermi2varv4df3 */ |
| 58180 | case 4290: /* avx512vl_vpermi2varv4di3_maskz_1 */ |
| 58181 | case 4289: /* avx512vl_vpermi2varv4di3 */ |
| 58182 | case 4286: /* avx512vl_vpermi2varv8si3_maskz_1 */ |
| 58183 | case 4285: /* avx512vl_vpermi2varv8si3 */ |
| 58184 | case 4284: /* avx512f_vpermi2varv8df3_maskz_1 */ |
| 58185 | case 4283: /* avx512f_vpermi2varv8df3 */ |
| 58186 | case 4282: /* avx512f_vpermi2varv8di3_maskz_1 */ |
| 58187 | case 4281: /* avx512f_vpermi2varv8di3 */ |
| 58188 | case 4280: /* avx512f_vpermi2varv16sf3_maskz_1 */ |
| 58189 | case 4279: /* avx512f_vpermi2varv16sf3 */ |
| 58190 | case 4278: /* avx512f_vpermi2varv16si3_maskz_1 */ |
| 58191 | case 4277: /* avx512f_vpermi2varv16si3 */ |
| 58192 | case 4276: /* avx_vpermilvarv2df3_mask */ |
| 58193 | case 4275: /* avx_vpermilvarv2df3 */ |
| 58194 | case 4274: /* avx_vpermilvarv4df3_mask */ |
| 58195 | case 4273: /* avx_vpermilvarv4df3 */ |
| 58196 | case 4272: /* avx512f_vpermilvarv8df3_mask */ |
| 58197 | case 4271: /* avx512f_vpermilvarv8df3 */ |
| 58198 | case 4270: /* avx_vpermilvarv4sf3_mask */ |
| 58199 | case 4269: /* avx_vpermilvarv4sf3 */ |
| 58200 | case 4266: /* avx512f_vpermilvarv16sf3_mask */ |
| 58201 | case 4265: /* avx512f_vpermilvarv16sf3 */ |
| 58202 | case 4264: /* *avx_vpermilpv2df_mask */ |
| 58203 | case 4263: /* *avx_vpermilpv2df */ |
| 58204 | case 4262: /* *avx_vpermilpv4df_mask */ |
| 58205 | case 4261: /* *avx_vpermilpv4df */ |
| 58206 | case 4260: /* *avx512f_vpermilpv8df_mask */ |
| 58207 | case 4259: /* *avx512f_vpermilpv8df */ |
| 58208 | case 4258: /* *avx_vpermilpv4sf_mask */ |
| 58209 | case 4257: /* *avx_vpermilpv4sf */ |
| 58210 | case 4254: /* *avx512f_vpermilpv16sf_mask */ |
| 58211 | case 4253: /* *avx512f_vpermilpv16sf */ |
| 58212 | case 4109: /* avx2_permv2ti */ |
| 58213 | case 4108: /* avx512f_permv8di_1_mask */ |
| 58214 | case 4107: /* avx512f_permv8di_1 */ |
| 58215 | case 4106: /* avx512f_permv8df_1_mask */ |
| 58216 | case 4105: /* avx512f_permv8df_1 */ |
| 58217 | case 4104: /* avx2_permv4df_1_mask */ |
| 58218 | case 4103: /* avx2_permv4df_1 */ |
| 58219 | case 4102: /* avx2_permv4di_1_mask */ |
| 58220 | case 4101: /* avx2_permv4di_1 */ |
| 58221 | case 4100: /* avx512bw_permvarv32hi_mask */ |
| 58222 | case 4099: /* avx512bw_permvarv32hi */ |
| 58223 | case 4098: /* avx512vl_permvarv16hi_mask */ |
| 58224 | case 4097: /* avx512vl_permvarv16hi */ |
| 58225 | case 4096: /* avx512vl_permvarv8hi_mask */ |
| 58226 | case 4095: /* avx512vl_permvarv8hi */ |
| 58227 | case 4094: /* avx512vl_permvarv32qi_mask */ |
| 58228 | case 4093: /* avx512vl_permvarv32qi */ |
| 58229 | case 4092: /* avx512vl_permvarv16qi_mask */ |
| 58230 | case 4091: /* avx512vl_permvarv16qi */ |
| 58231 | case 4090: /* avx512bw_permvarv64qi_mask */ |
| 58232 | case 4089: /* avx512bw_permvarv64qi */ |
| 58233 | case 4088: /* avx2_permvarv4df_mask */ |
| 58234 | case 4087: /* avx2_permvarv4df */ |
| 58235 | case 4086: /* avx2_permvarv4di_mask */ |
| 58236 | case 4085: /* avx2_permvarv4di */ |
| 58237 | case 4084: /* avx512f_permvarv8df_mask */ |
| 58238 | case 4083: /* avx512f_permvarv8df */ |
| 58239 | case 4082: /* avx512f_permvarv8di_mask */ |
| 58240 | case 4081: /* avx512f_permvarv8di */ |
| 58241 | case 4080: /* avx512f_permvarv16sf_mask */ |
| 58242 | case 4079: /* avx512f_permvarv16sf */ |
| 58243 | case 4078: /* avx512f_permvarv16si_mask */ |
| 58244 | case 4077: /* avx512f_permvarv16si */ |
| 58245 | case 4074: /* avx2_permvarv8si_mask */ |
| 58246 | case 4073: /* avx2_permvarv8si */ |
| 58247 | case 4043: /* xop_pcom_tfv2di3 */ |
| 58248 | case 4042: /* xop_pcom_tfv4si3 */ |
| 58249 | case 4041: /* xop_pcom_tfv8hi3 */ |
| 58250 | case 4040: /* xop_pcom_tfv16qi3 */ |
| 58251 | case 4039: /* xop_maskcmp_uns2v2di3 */ |
| 58252 | case 4038: /* xop_maskcmp_uns2v4si3 */ |
| 58253 | case 4037: /* xop_maskcmp_uns2v8hi3 */ |
| 58254 | case 4036: /* xop_maskcmp_uns2v16qi3 */ |
| 58255 | case 4035: /* xop_maskcmp_unsv2di3 */ |
| 58256 | case 4034: /* xop_maskcmp_unsv4si3 */ |
| 58257 | case 4033: /* xop_maskcmp_unsv8hi3 */ |
| 58258 | case 4032: /* xop_maskcmp_unsv16qi3 */ |
| 58259 | case 3890: /* ptesttf2 */ |
| 58260 | case 3889: /* avx_ptestv4df */ |
| 58261 | case 3888: /* avx_ptestv8sf */ |
| 58262 | case 3887: /* avx_ptestv4di */ |
| 58263 | case 3886: /* avx_ptestv8si */ |
| 58264 | case 3885: /* avx_ptestv16hi */ |
| 58265 | case 3884: /* avx_ptestv32qi */ |
| 58266 | case 3883: /* sse4_1_ptestv2df */ |
| 58267 | case 3882: /* sse4_1_ptestv4sf */ |
| 58268 | case 3881: /* sse4_1_ptestv2di */ |
| 58269 | case 3880: /* sse4_1_ptestv4si */ |
| 58270 | case 3879: /* sse4_1_ptestv8hi */ |
| 58271 | case 3878: /* sse4_1_ptestv16qi */ |
| 58272 | case 3877: /* avx_vtestpd */ |
| 58273 | case 3876: /* avx_vtestpd256 */ |
| 58274 | case 3875: /* avx_vtestps */ |
| 58275 | case 3874: /* avx_vtestps256 */ |
| 58276 | case 3794: /* sse4_1_packusdw_mask */ |
| 58277 | case 3793: /* sse4_1_packusdw */ |
| 58278 | case 3792: /* avx2_packusdw_mask */ |
| 58279 | case 3791: /* avx2_packusdw */ |
| 58280 | case 3790: /* avx512bw_packusdw_mask */ |
| 58281 | case 3789: /* avx512bw_packusdw */ |
| 58282 | case 3619: /* sse2_pshufhw_1_mask */ |
| 58283 | case 3618: /* sse2_pshufhw_1 */ |
| 58284 | case 3617: /* avx2_pshufhw_1_mask */ |
| 58285 | case 3616: /* avx2_pshufhw_1 */ |
| 58286 | case 3615: /* avx512bw_pshufhwv32hi_mask */ |
| 58287 | case 3614: /* *avx512bw_pshufhwv32hi */ |
| 58288 | case 3613: /* sse2_pshuflw_1_mask */ |
| 58289 | case 3612: /* sse2_pshuflw_1 */ |
| 58290 | case 3611: /* avx2_pshuflw_1_mask */ |
| 58291 | case 3610: /* avx2_pshuflw_1 */ |
| 58292 | case 3609: /* avx512bw_pshuflwv32hi_mask */ |
| 58293 | case 3608: /* *avx512bw_pshuflwv32hi */ |
| 58294 | case 3601: /* avx512f_shuf_i32x4_1_mask */ |
| 58295 | case 3600: /* avx512f_shuf_i32x4_1 */ |
| 58296 | case 3599: /* avx512f_shuf_f32x4_1_mask */ |
| 58297 | case 3598: /* avx512f_shuf_f32x4_1 */ |
| 58298 | case 3595: /* avx512vl_shuf_i32x4_1_mask */ |
| 58299 | case 3594: /* avx512vl_shuf_i32x4_1 */ |
| 58300 | case 3593: /* avx512f_shuf_i64x2_1_mask */ |
| 58301 | case 3592: /* avx512f_shuf_i64x2_1 */ |
| 58302 | case 3591: /* avx512f_shuf_f64x2_1_mask */ |
| 58303 | case 3590: /* avx512f_shuf_f64x2_1 */ |
| 58304 | case 3589: /* avx512dq_shuf_f64x2_1_mask */ |
| 58305 | case 3588: /* *avx512dq_shuf_f64x2_1 */ |
| 58306 | case 3587: /* avx512dq_shuf_i64x2_1_mask */ |
| 58307 | case 3586: /* *avx512dq_shuf_i64x2_1 */ |
| 58308 | case 3585: /* vec_set_hi_v8di_mask */ |
| 58309 | case 3584: /* vec_set_hi_v8di */ |
| 58310 | case 3583: /* vec_set_hi_v8df_mask */ |
| 58311 | case 3582: /* vec_set_hi_v8df */ |
| 58312 | case 3581: /* vec_set_lo_v8di_mask */ |
| 58313 | case 3580: /* vec_set_lo_v8di */ |
| 58314 | case 3579: /* vec_set_lo_v8df_mask */ |
| 58315 | case 3578: /* vec_set_lo_v8df */ |
| 58316 | case 3577: /* vec_set_hi_v16si_mask */ |
| 58317 | case 3576: /* vec_set_hi_v16si */ |
| 58318 | case 3575: /* vec_set_hi_v16sf_mask */ |
| 58319 | case 3574: /* vec_set_hi_v16sf */ |
| 58320 | case 3573: /* vec_set_lo_v16si_mask */ |
| 58321 | case 3572: /* vec_set_lo_v16si */ |
| 58322 | case 3571: /* vec_set_lo_v16sf_mask */ |
| 58323 | case 3570: /* vec_set_lo_v16sf */ |
| 58324 | case 3569: /* avx512f_vinserti32x4_1_mask */ |
| 58325 | case 3568: /* *avx512f_vinserti32x4_1 */ |
| 58326 | case 3567: /* avx512f_vinsertf32x4_1_mask */ |
| 58327 | case 3566: /* *avx512f_vinsertf32x4_1 */ |
| 58328 | case 3565: /* avx512dq_vinserti64x2_1_mask */ |
| 58329 | case 3564: /* *avx512dq_vinserti64x2_1 */ |
| 58330 | case 3563: /* avx512dq_vinsertf64x2_1_mask */ |
| 58331 | case 3562: /* *avx512dq_vinsertf64x2_1 */ |
| 58332 | case 3561: /* sse4_1_pinsrq */ |
| 58333 | case 3560: /* sse4_1_pinsrd */ |
| 58334 | case 3559: /* sse2_pinsrw */ |
| 58335 | case 3558: /* sse4_1_pinsrb */ |
| 58336 | case 3557: /* vec_interleave_lowv4si_mask */ |
| 58337 | case 3556: /* vec_interleave_lowv4si */ |
| 58338 | case 3555: /* avx512f_interleave_lowv16si_mask */ |
| 58339 | case 3554: /* *avx512f_interleave_lowv16si */ |
| 58340 | case 3553: /* avx2_interleave_lowv8si_mask */ |
| 58341 | case 3552: /* avx2_interleave_lowv8si */ |
| 58342 | case 3551: /* vec_interleave_highv4si_mask */ |
| 58343 | case 3550: /* vec_interleave_highv4si */ |
| 58344 | case 3549: /* avx512f_interleave_highv16si_mask */ |
| 58345 | case 3548: /* *avx512f_interleave_highv16si */ |
| 58346 | case 3547: /* avx2_interleave_highv8si_mask */ |
| 58347 | case 3546: /* avx2_interleave_highv8si */ |
| 58348 | case 3545: /* vec_interleave_lowv8hi_mask */ |
| 58349 | case 3544: /* vec_interleave_lowv8hi */ |
| 58350 | case 3543: /* avx2_interleave_lowv16hi_mask */ |
| 58351 | case 3542: /* avx2_interleave_lowv16hi */ |
| 58352 | case 3541: /* avx512bw_interleave_lowv32hi_mask */ |
| 58353 | case 3540: /* *avx512bw_interleave_lowv32hi */ |
| 58354 | case 3539: /* vec_interleave_highv8hi_mask */ |
| 58355 | case 3538: /* vec_interleave_highv8hi */ |
| 58356 | case 3537: /* avx2_interleave_highv16hi_mask */ |
| 58357 | case 3536: /* avx2_interleave_highv16hi */ |
| 58358 | case 3535: /* avx512bw_interleave_highv32hi_mask */ |
| 58359 | case 3534: /* avx512bw_interleave_highv32hi */ |
| 58360 | case 3533: /* vec_interleave_lowv16qi_mask */ |
| 58361 | case 3532: /* vec_interleave_lowv16qi */ |
| 58362 | case 3531: /* avx2_interleave_lowv32qi_mask */ |
| 58363 | case 3530: /* avx2_interleave_lowv32qi */ |
| 58364 | case 3529: /* avx512bw_interleave_lowv64qi_mask */ |
| 58365 | case 3528: /* avx512bw_interleave_lowv64qi */ |
| 58366 | case 3527: /* vec_interleave_highv16qi_mask */ |
| 58367 | case 3526: /* vec_interleave_highv16qi */ |
| 58368 | case 3525: /* avx2_interleave_highv32qi_mask */ |
| 58369 | case 3524: /* avx2_interleave_highv32qi */ |
| 58370 | case 3523: /* avx512bw_interleave_highv64qi_mask */ |
| 58371 | case 3522: /* avx512bw_interleave_highv64qi */ |
| 58372 | case 3521: /* sse2_packuswb_mask */ |
| 58373 | case 3520: /* sse2_packuswb */ |
| 58374 | case 3519: /* avx2_packuswb_mask */ |
| 58375 | case 3518: /* avx2_packuswb */ |
| 58376 | case 3517: /* avx512bw_packuswb_mask */ |
| 58377 | case 3516: /* avx512bw_packuswb */ |
| 58378 | case 3515: /* sse2_packssdw_mask */ |
| 58379 | case 3514: /* sse2_packssdw */ |
| 58380 | case 3513: /* avx2_packssdw_mask */ |
| 58381 | case 3512: /* avx2_packssdw */ |
| 58382 | case 3511: /* avx512bw_packssdw_mask */ |
| 58383 | case 3510: /* avx512bw_packssdw */ |
| 58384 | case 3509: /* sse2_packsswb_mask */ |
| 58385 | case 3508: /* sse2_packsswb */ |
| 58386 | case 3507: /* avx2_packsswb_mask */ |
| 58387 | case 3506: /* avx2_packsswb */ |
| 58388 | case 3505: /* avx512bw_packsswb_mask */ |
| 58389 | case 3504: /* avx512bw_packsswb */ |
| 58390 | case 3401: /* *andnotv2di3_mask */ |
| 58391 | case 3400: /* *andnotv4di3_mask */ |
| 58392 | case 3399: /* *andnotv8di3_mask */ |
| 58393 | case 3398: /* *andnotv4si3_mask */ |
| 58394 | case 3397: /* *andnotv8si3_mask */ |
| 58395 | case 3396: /* *andnotv16si3_mask */ |
| 58396 | case 3383: /* sse2_gtv4si3 */ |
| 58397 | case 3382: /* sse2_gtv8hi3 */ |
| 58398 | case 3381: /* sse2_gtv16qi3 */ |
| 58399 | case 3380: /* avx512vl_gtv8hi3_mask */ |
| 58400 | case 3379: /* avx512vl_gtv8hi3 */ |
| 58401 | case 3378: /* avx512vl_gtv16hi3_mask */ |
| 58402 | case 3377: /* avx512vl_gtv16hi3 */ |
| 58403 | case 3376: /* avx512bw_gtv32hi3_mask */ |
| 58404 | case 3375: /* avx512bw_gtv32hi3 */ |
| 58405 | case 3374: /* avx512vl_gtv32qi3_mask */ |
| 58406 | case 3373: /* avx512vl_gtv32qi3 */ |
| 58407 | case 3372: /* avx512vl_gtv16qi3_mask */ |
| 58408 | case 3371: /* avx512vl_gtv16qi3 */ |
| 58409 | case 3370: /* avx512bw_gtv64qi3_mask */ |
| 58410 | case 3369: /* avx512bw_gtv64qi3 */ |
| 58411 | case 3368: /* avx512vl_gtv2di3_mask */ |
| 58412 | case 3367: /* avx512vl_gtv2di3 */ |
| 58413 | case 3366: /* avx512vl_gtv4di3_mask */ |
| 58414 | case 3365: /* avx512vl_gtv4di3 */ |
| 58415 | case 3364: /* avx512f_gtv8di3_mask */ |
| 58416 | case 3363: /* avx512f_gtv8di3 */ |
| 58417 | case 3362: /* avx512vl_gtv4si3_mask */ |
| 58418 | case 3361: /* avx512vl_gtv4si3 */ |
| 58419 | case 3360: /* avx512vl_gtv8si3_mask */ |
| 58420 | case 3359: /* avx512vl_gtv8si3 */ |
| 58421 | case 3358: /* avx512f_gtv16si3_mask */ |
| 58422 | case 3357: /* avx512f_gtv16si3 */ |
| 58423 | case 3356: /* avx2_gtv4di3 */ |
| 58424 | case 3355: /* avx2_gtv8si3 */ |
| 58425 | case 3354: /* avx2_gtv16hi3 */ |
| 58426 | case 3353: /* avx2_gtv32qi3 */ |
| 58427 | case 3352: /* sse4_2_gtv2di3 */ |
| 58428 | case 3351: /* *sse2_eqv4si3 */ |
| 58429 | case 3350: /* *sse2_eqv8hi3 */ |
| 58430 | case 3349: /* *sse2_eqv16qi3 */ |
| 58431 | case 3348: /* *sse4_1_eqv2di3 */ |
| 58432 | case 3347: /* avx512vl_eqv2di3_mask_1 */ |
| 58433 | case 3346: /* avx512vl_eqv2di3_1 */ |
| 58434 | case 3345: /* avx512vl_eqv4di3_mask_1 */ |
| 58435 | case 3344: /* avx512vl_eqv4di3_1 */ |
| 58436 | case 3343: /* avx512f_eqv8di3_mask_1 */ |
| 58437 | case 3342: /* avx512f_eqv8di3_1 */ |
| 58438 | case 3341: /* avx512vl_eqv4si3_mask_1 */ |
| 58439 | case 3340: /* avx512vl_eqv4si3_1 */ |
| 58440 | case 3339: /* avx512vl_eqv8si3_mask_1 */ |
| 58441 | case 3338: /* avx512vl_eqv8si3_1 */ |
| 58442 | case 3337: /* avx512f_eqv16si3_mask_1 */ |
| 58443 | case 3336: /* avx512f_eqv16si3_1 */ |
| 58444 | case 3335: /* avx512vl_eqv8hi3_mask_1 */ |
| 58445 | case 3334: /* avx512vl_eqv8hi3_1 */ |
| 58446 | case 3333: /* avx512vl_eqv16hi3_mask_1 */ |
| 58447 | case 3332: /* avx512vl_eqv16hi3_1 */ |
| 58448 | case 3331: /* avx512bw_eqv32hi3_mask_1 */ |
| 58449 | case 3330: /* avx512bw_eqv32hi3_1 */ |
| 58450 | case 3329: /* avx512vl_eqv32qi3_mask_1 */ |
| 58451 | case 3328: /* avx512vl_eqv32qi3_1 */ |
| 58452 | case 3327: /* avx512vl_eqv16qi3_mask_1 */ |
| 58453 | case 3326: /* avx512vl_eqv16qi3_1 */ |
| 58454 | case 3325: /* avx512bw_eqv64qi3_mask_1 */ |
| 58455 | case 3324: /* avx512bw_eqv64qi3_1 */ |
| 58456 | case 3323: /* *avx2_eqv4di3 */ |
| 58457 | case 3322: /* *avx2_eqv8si3 */ |
| 58458 | case 3321: /* *avx2_eqv16hi3 */ |
| 58459 | case 3320: /* *avx2_eqv32qi3 */ |
| 58460 | case 2725: /* sse2_shufpd_v2df */ |
| 58461 | case 2724: /* sse2_shufpd_v2di */ |
| 58462 | case 2723: /* vec_interleave_lowv2di_mask */ |
| 58463 | case 2722: /* vec_interleave_lowv2di */ |
| 58464 | case 2721: /* avx512f_interleave_lowv8di_mask */ |
| 58465 | case 2720: /* *avx512f_interleave_lowv8di */ |
| 58466 | case 2719: /* avx2_interleave_lowv4di_mask */ |
| 58467 | case 2718: /* avx2_interleave_lowv4di */ |
| 58468 | case 2717: /* vec_interleave_highv2di_mask */ |
| 58469 | case 2716: /* vec_interleave_highv2di */ |
| 58470 | case 2715: /* avx512f_interleave_highv8di_mask */ |
| 58471 | case 2714: /* *avx512f_interleave_highv8di */ |
| 58472 | case 2713: /* avx2_interleave_highv4di_mask */ |
| 58473 | case 2712: /* avx2_interleave_highv4di */ |
| 58474 | case 2711: /* sse2_shufpd_v2df_mask */ |
| 58475 | case 2710: /* avx_shufpd256_1_mask */ |
| 58476 | case 2709: /* avx_shufpd256_1 */ |
| 58477 | case 2708: /* avx512f_shufpd512_1_mask */ |
| 58478 | case 2707: /* avx512f_shufpd512_1 */ |
| 58479 | case 2706: /* avx512f_shufps512_1_mask */ |
| 58480 | case 2705: /* avx512f_shufps512_1 */ |
| 58481 | case 2588: /* avx512vl_vternlogv2di_mask */ |
| 58482 | case 2587: /* avx512vl_vternlogv4di_mask */ |
| 58483 | case 2586: /* avx512f_vternlogv8di_mask */ |
| 58484 | case 2585: /* avx512vl_vternlogv4si_mask */ |
| 58485 | case 2584: /* avx512vl_vternlogv8si_mask */ |
| 58486 | case 2583: /* avx512f_vternlogv16si_mask */ |
| 58487 | case 2582: /* avx512vl_vternlogv2di_maskz_1 */ |
| 58488 | case 2581: /* avx512vl_vternlogv2di */ |
| 58489 | case 2580: /* avx512vl_vternlogv4di_maskz_1 */ |
| 58490 | case 2579: /* avx512vl_vternlogv4di */ |
| 58491 | case 2578: /* avx512f_vternlogv8di_maskz_1 */ |
| 58492 | case 2577: /* avx512f_vternlogv8di */ |
| 58493 | case 2576: /* avx512vl_vternlogv4si_maskz_1 */ |
| 58494 | case 2575: /* avx512vl_vternlogv4si */ |
| 58495 | case 2574: /* avx512vl_vternlogv8si_maskz_1 */ |
| 58496 | case 2573: /* avx512vl_vternlogv8si */ |
| 58497 | case 2572: /* avx512f_vternlogv16si_maskz_1 */ |
| 58498 | case 2571: /* avx512f_vternlogv16si */ |
| 58499 | case 2541: /* avx512vl_unpcklpd128_mask */ |
| 58500 | case 2540: /* *avx_unpcklpd256_mask */ |
| 58501 | case 2539: /* *avx_unpcklpd256 */ |
| 58502 | case 2538: /* *avx512f_unpcklpd512_mask */ |
| 58503 | case 2537: /* *avx512f_unpcklpd512 */ |
| 58504 | case 2535: /* avx512vl_unpckhpd128_mask */ |
| 58505 | case 2534: /* avx_unpckhpd256_mask */ |
| 58506 | case 2533: /* avx_unpckhpd256 */ |
| 58507 | case 2532: /* avx512f_unpckhpd512_mask */ |
| 58508 | case 2531: /* *avx512f_unpckhpd512 */ |
| 58509 | case 2465: /* sse4_1_insertps */ |
| 58510 | case 2464: /* *vec_setv4sf_sse4_1 */ |
| 58511 | case 2448: /* sse_shufps_v4sf */ |
| 58512 | case 2447: /* sse_shufps_v4si */ |
| 58513 | case 2446: /* sse_shufps_v4sf_mask */ |
| 58514 | case 2431: /* vec_interleave_lowv4sf */ |
| 58515 | case 2430: /* unpcklps128_mask */ |
| 58516 | case 2427: /* avx512f_unpcklps512_mask */ |
| 58517 | case 2426: /* *avx512f_unpcklps512 */ |
| 58518 | case 2425: /* vec_interleave_highv4sf_mask */ |
| 58519 | case 2424: /* vec_interleave_highv4sf */ |
| 58520 | case 2421: /* avx512f_unpckhps512_mask */ |
| 58521 | case 2420: /* *avx512f_unpckhps512 */ |
| 58522 | case 1800: /* *xortf3 */ |
| 58523 | case 1799: /* *iortf3 */ |
| 58524 | case 1798: /* *andtf3 */ |
| 58525 | case 1797: /* *xordf3 */ |
| 58526 | case 1796: /* *iordf3 */ |
| 58527 | case 1795: /* *anddf3 */ |
| 58528 | case 1794: /* *xorsf3 */ |
| 58529 | case 1793: /* *iorsf3 */ |
| 58530 | case 1792: /* *andsf3 */ |
| 58531 | case 1791: /* *andnottf3 */ |
| 58532 | case 1790: /* *andnotdf3 */ |
| 58533 | case 1789: /* *andnotsf3 */ |
| 58534 | case 1788: /* *xorv8df3_mask */ |
| 58535 | case 1787: /* *xorv8df3 */ |
| 58536 | case 1786: /* *iorv8df3_mask */ |
| 58537 | case 1785: /* *iorv8df3 */ |
| 58538 | case 1784: /* *andv8df3_mask */ |
| 58539 | case 1783: /* *andv8df3 */ |
| 58540 | case 1782: /* *xorv16sf3_mask */ |
| 58541 | case 1781: /* *xorv16sf3 */ |
| 58542 | case 1780: /* *iorv16sf3_mask */ |
| 58543 | case 1779: /* *iorv16sf3 */ |
| 58544 | case 1778: /* *andv16sf3_mask */ |
| 58545 | case 1777: /* *andv16sf3 */ |
| 58546 | case 1776: /* *xorv2df3_mask */ |
| 58547 | case 1775: /* *xorv2df3 */ |
| 58548 | case 1774: /* *iorv2df3_mask */ |
| 58549 | case 1773: /* *iorv2df3 */ |
| 58550 | case 1772: /* *andv2df3_mask */ |
| 58551 | case 1771: /* *andv2df3 */ |
| 58552 | case 1764: /* *xorv4sf3_mask */ |
| 58553 | case 1763: /* *xorv4sf3 */ |
| 58554 | case 1762: /* *iorv4sf3_mask */ |
| 58555 | case 1761: /* *iorv4sf3 */ |
| 58556 | case 1760: /* *andv4sf3_mask */ |
| 58557 | case 1759: /* *andv4sf3 */ |
| 58558 | case 1752: /* avx512f_andnotv8df3_mask */ |
| 58559 | case 1751: /* avx512f_andnotv8df3 */ |
| 58560 | case 1750: /* avx512f_andnotv16sf3_mask */ |
| 58561 | case 1749: /* avx512f_andnotv16sf3 */ |
| 58562 | case 1748: /* sse2_andnotv2df3_mask */ |
| 58563 | case 1747: /* sse2_andnotv2df3 */ |
| 58564 | case 1744: /* sse_andnotv4sf3_mask */ |
| 58565 | case 1743: /* sse_andnotv4sf3 */ |
| 58566 | case 1740: /* sse2_ucomi_round */ |
| 58567 | case 1739: /* sse2_ucomi */ |
| 58568 | case 1738: /* sse_ucomi_round */ |
| 58569 | case 1737: /* sse_ucomi */ |
| 58570 | case 1736: /* sse2_comi_round */ |
| 58571 | case 1735: /* sse2_comi */ |
| 58572 | case 1734: /* sse_comi_round */ |
| 58573 | case 1733: /* sse_comi */ |
| 58574 | case 1732: /* avx512f_maskcmpv2df3 */ |
| 58575 | case 1731: /* avx512f_maskcmpv4df3 */ |
| 58576 | case 1730: /* avx512f_maskcmpv8df3 */ |
| 58577 | case 1729: /* avx512f_maskcmpv4sf3 */ |
| 58578 | case 1728: /* avx512f_maskcmpv8sf3 */ |
| 58579 | case 1727: /* avx512f_maskcmpv16sf3 */ |
| 58580 | case 1726: /* avx512f_vmcmpv2df3_mask_round */ |
| 58581 | case 1725: /* avx512f_vmcmpv2df3_mask */ |
| 58582 | case 1724: /* avx512f_vmcmpv4sf3_mask_round */ |
| 58583 | case 1723: /* avx512f_vmcmpv4sf3_mask */ |
| 58584 | case 1722: /* avx512f_vmcmpv2df3_round */ |
| 58585 | case 1721: /* avx512f_vmcmpv2df3 */ |
| 58586 | case 1720: /* avx512f_vmcmpv4sf3_round */ |
| 58587 | case 1719: /* avx512f_vmcmpv4sf3 */ |
| 58588 | case 1718: /* avx512vl_ucmpv2di3_mask */ |
| 58589 | case 1717: /* avx512vl_ucmpv2di3 */ |
| 58590 | case 1716: /* avx512vl_ucmpv4di3_mask */ |
| 58591 | case 1715: /* avx512vl_ucmpv4di3 */ |
| 58592 | case 1714: /* avx512f_ucmpv8di3_mask */ |
| 58593 | case 1713: /* avx512f_ucmpv8di3 */ |
| 58594 | case 1712: /* avx512vl_ucmpv4si3_mask */ |
| 58595 | case 1711: /* avx512vl_ucmpv4si3 */ |
| 58596 | case 1710: /* avx512vl_ucmpv8si3_mask */ |
| 58597 | case 1709: /* avx512vl_ucmpv8si3 */ |
| 58598 | case 1708: /* avx512f_ucmpv16si3_mask */ |
| 58599 | case 1707: /* avx512f_ucmpv16si3 */ |
| 58600 | case 1706: /* avx512vl_ucmpv8hi3_mask */ |
| 58601 | case 1705: /* avx512vl_ucmpv8hi3 */ |
| 58602 | case 1704: /* avx512vl_ucmpv16hi3_mask */ |
| 58603 | case 1703: /* avx512vl_ucmpv16hi3 */ |
| 58604 | case 1702: /* avx512bw_ucmpv32hi3_mask */ |
| 58605 | case 1701: /* avx512bw_ucmpv32hi3 */ |
| 58606 | case 1700: /* avx512vl_ucmpv32qi3_mask */ |
| 58607 | case 1699: /* avx512vl_ucmpv32qi3 */ |
| 58608 | case 1698: /* avx512vl_ucmpv16qi3_mask */ |
| 58609 | case 1697: /* avx512vl_ucmpv16qi3 */ |
| 58610 | case 1696: /* avx512bw_ucmpv64qi3_mask */ |
| 58611 | case 1695: /* avx512bw_ucmpv64qi3 */ |
| 58612 | case 1694: /* avx512vl_cmpv8hi3_mask */ |
| 58613 | case 1693: /* avx512vl_cmpv8hi3 */ |
| 58614 | case 1692: /* avx512vl_cmpv16hi3_mask */ |
| 58615 | case 1691: /* avx512vl_cmpv16hi3 */ |
| 58616 | case 1690: /* avx512bw_cmpv32hi3_mask */ |
| 58617 | case 1689: /* avx512bw_cmpv32hi3 */ |
| 58618 | case 1688: /* avx512vl_cmpv32qi3_mask */ |
| 58619 | case 1687: /* avx512vl_cmpv32qi3 */ |
| 58620 | case 1686: /* avx512vl_cmpv16qi3_mask */ |
| 58621 | case 1685: /* avx512vl_cmpv16qi3 */ |
| 58622 | case 1684: /* avx512bw_cmpv64qi3_mask */ |
| 58623 | case 1683: /* avx512bw_cmpv64qi3 */ |
| 58624 | case 1682: /* avx512vl_cmpv2df3_mask */ |
| 58625 | case 1681: /* avx512vl_cmpv2df3 */ |
| 58626 | case 1680: /* avx512vl_cmpv4df3_mask */ |
| 58627 | case 1679: /* avx512vl_cmpv4df3 */ |
| 58628 | case 1678: /* avx512f_cmpv8df3_mask_round */ |
| 58629 | case 1677: /* avx512f_cmpv8df3_round */ |
| 58630 | case 1676: /* avx512f_cmpv8df3_mask */ |
| 58631 | case 1675: /* avx512f_cmpv8df3 */ |
| 58632 | case 1674: /* avx512vl_cmpv4sf3_mask */ |
| 58633 | case 1673: /* avx512vl_cmpv4sf3 */ |
| 58634 | case 1672: /* avx512vl_cmpv8sf3_mask */ |
| 58635 | case 1671: /* avx512vl_cmpv8sf3 */ |
| 58636 | case 1670: /* avx512f_cmpv16sf3_mask_round */ |
| 58637 | case 1669: /* avx512f_cmpv16sf3_round */ |
| 58638 | case 1668: /* avx512f_cmpv16sf3_mask */ |
| 58639 | case 1667: /* avx512f_cmpv16sf3 */ |
| 58640 | case 1666: /* avx512vl_cmpv2di3_mask */ |
| 58641 | case 1665: /* avx512vl_cmpv2di3 */ |
| 58642 | case 1664: /* avx512vl_cmpv4di3_mask */ |
| 58643 | case 1663: /* avx512vl_cmpv4di3 */ |
| 58644 | case 1662: /* avx512f_cmpv8di3_mask_round */ |
| 58645 | case 1661: /* avx512f_cmpv8di3_round */ |
| 58646 | case 1660: /* avx512f_cmpv8di3_mask */ |
| 58647 | case 1659: /* avx512f_cmpv8di3 */ |
| 58648 | case 1658: /* avx512vl_cmpv4si3_mask */ |
| 58649 | case 1657: /* avx512vl_cmpv4si3 */ |
| 58650 | case 1656: /* avx512vl_cmpv8si3_mask */ |
| 58651 | case 1655: /* avx512vl_cmpv8si3 */ |
| 58652 | case 1654: /* avx512f_cmpv16si3_mask_round */ |
| 58653 | case 1653: /* avx512f_cmpv16si3_round */ |
| 58654 | case 1652: /* avx512f_cmpv16si3_mask */ |
| 58655 | case 1651: /* avx512f_cmpv16si3 */ |
| 58656 | case 1650: /* sse2_vmmaskcmpv2df3 */ |
| 58657 | case 1649: /* sse_vmmaskcmpv4sf3 */ |
| 58658 | case 1648: /* sse2_maskcmpv2df3 */ |
| 58659 | case 1647: /* avx_maskcmpv4df3 */ |
| 58660 | case 1646: /* sse_maskcmpv4sf3 */ |
| 58661 | case 1645: /* avx_maskcmpv8sf3 */ |
| 58662 | case 1644: /* *sse2_maskcmpv2df3_comm */ |
| 58663 | case 1643: /* *avx_maskcmpv4df3_comm */ |
| 58664 | case 1642: /* *sse_maskcmpv4sf3_comm */ |
| 58665 | case 1641: /* *avx_maskcmpv8sf3_comm */ |
| 58666 | case 1640: /* avx_vmcmpv2df3 */ |
| 58667 | case 1639: /* avx_vmcmpv4sf3 */ |
| 58668 | case 1638: /* avx_cmpv2df3 */ |
| 58669 | case 1637: /* avx_cmpv4df3 */ |
| 58670 | case 1636: /* avx_cmpv4sf3 */ |
| 58671 | case 1635: /* avx_cmpv8sf3 */ |
| 58672 | case 626: /* setcc_df_sse */ |
| 58673 | case 625: /* setcc_sf_sse */ |
| 58674 | case 54: /* *cmpiuxf_i387 */ |
| 58675 | case 53: /* *cmpixf_i387 */ |
| 58676 | if (get_attr_memory (insn) == MEMORY_LOAD) |
| 58677 | { |
| 58678 | return 6; |
| 58679 | } |
| 58680 | else |
| 58681 | { |
| 58682 | return 2; |
| 58683 | } |
| 58684 | |
| 58685 | case 4984: /* atomic_bit_test_and_resetdi_1 */ |
| 58686 | case 4983: /* atomic_bit_test_and_resetsi_1 */ |
| 58687 | case 4982: /* atomic_bit_test_and_resethi_1 */ |
| 58688 | case 4981: /* atomic_bit_test_and_complementdi_1 */ |
| 58689 | case 4980: /* atomic_bit_test_and_complementsi_1 */ |
| 58690 | case 4979: /* atomic_bit_test_and_complementhi_1 */ |
| 58691 | case 4978: /* atomic_bit_test_and_setdi_1 */ |
| 58692 | case 4977: /* atomic_bit_test_and_setsi_1 */ |
| 58693 | case 4976: /* atomic_bit_test_and_sethi_1 */ |
| 58694 | case 4975: /* atomic_xordi */ |
| 58695 | case 4974: /* atomic_ordi */ |
| 58696 | case 4973: /* atomic_anddi */ |
| 58697 | case 4972: /* atomic_xorsi */ |
| 58698 | case 4971: /* atomic_orsi */ |
| 58699 | case 4970: /* atomic_andsi */ |
| 58700 | case 4969: /* atomic_xorhi */ |
| 58701 | case 4968: /* atomic_orhi */ |
| 58702 | case 4967: /* atomic_andhi */ |
| 58703 | case 4966: /* atomic_xorqi */ |
| 58704 | case 4965: /* atomic_orqi */ |
| 58705 | case 4964: /* atomic_andqi */ |
| 58706 | case 4963: /* atomic_subdi */ |
| 58707 | case 4962: /* atomic_subsi */ |
| 58708 | case 4961: /* atomic_subhi */ |
| 58709 | case 4960: /* atomic_subqi */ |
| 58710 | case 4959: /* atomic_adddi */ |
| 58711 | case 4958: /* atomic_addsi */ |
| 58712 | case 4957: /* atomic_addhi */ |
| 58713 | case 4956: /* atomic_addqi */ |
| 58714 | case 4955: /* atomic_exchangedi */ |
| 58715 | case 4954: /* atomic_exchangesi */ |
| 58716 | case 4953: /* atomic_exchangehi */ |
| 58717 | case 4952: /* atomic_exchangeqi */ |
| 58718 | case 4951: /* *atomic_fetch_add_cmpdi */ |
| 58719 | case 4950: /* *atomic_fetch_add_cmpsi */ |
| 58720 | case 4949: /* *atomic_fetch_add_cmphi */ |
| 58721 | case 4948: /* *atomic_fetch_add_cmpqi */ |
| 58722 | case 4947: /* atomic_fetch_adddi */ |
| 58723 | case 4946: /* atomic_fetch_addsi */ |
| 58724 | case 4945: /* atomic_fetch_addhi */ |
| 58725 | case 4944: /* atomic_fetch_addqi */ |
| 58726 | case 4943: /* atomic_compare_and_swapdi_1 */ |
| 58727 | case 4942: /* atomic_compare_and_swapsi_1 */ |
| 58728 | case 4941: /* atomic_compare_and_swaphi_1 */ |
| 58729 | case 4940: /* atomic_compare_and_swapqi_1 */ |
| 58730 | case 4939: /* atomic_compare_and_swapti_doubleword */ |
| 58731 | case 4938: /* atomic_compare_and_swapdi_doubleword */ |
| 58732 | case 4933: /* atomic_storedi_fpu */ |
| 58733 | case 4932: /* atomic_storedi_1 */ |
| 58734 | case 4931: /* atomic_storesi_1 */ |
| 58735 | case 4930: /* atomic_storehi_1 */ |
| 58736 | case 4929: /* atomic_storeqi_1 */ |
| 58737 | case 4928: /* atomic_loaddi_fpu */ |
| 58738 | case 4927: /* mfence_nosse */ |
| 58739 | case 4923: /* vpopcountv8di_mask */ |
| 58740 | case 4922: /* vpopcountv8di */ |
| 58741 | case 4921: /* vpopcountv16si_mask */ |
| 58742 | case 4920: /* vpopcountv16si */ |
| 58743 | case 4901: /* *movv64si_internal */ |
| 58744 | case 4900: /* *movv64sf_internal */ |
| 58745 | case 4875: /* avx512f_pd512_256pd */ |
| 58746 | case 4874: /* avx512f_ps512_256ps */ |
| 58747 | case 4873: /* avx512f_si512_256si */ |
| 58748 | case 4872: /* avx512f_pd512_pd */ |
| 58749 | case 4871: /* avx512f_ps512_ps */ |
| 58750 | case 4870: /* avx512f_si512_si */ |
| 58751 | case 4832: /* avx512f_vgetmantv2df_round */ |
| 58752 | case 4831: /* avx512f_vgetmantv2df */ |
| 58753 | case 4830: /* avx512f_vgetmantv4sf_round */ |
| 58754 | case 4829: /* avx512f_vgetmantv4sf */ |
| 58755 | case 4828: /* avx512vl_getmantv2df_mask_round */ |
| 58756 | case 4827: /* avx512vl_getmantv2df_mask */ |
| 58757 | case 4826: /* avx512vl_getmantv2df_round */ |
| 58758 | case 4825: /* avx512vl_getmantv2df */ |
| 58759 | case 4824: /* avx512vl_getmantv4df_mask_round */ |
| 58760 | case 4823: /* avx512vl_getmantv4df_mask */ |
| 58761 | case 4822: /* avx512vl_getmantv4df_round */ |
| 58762 | case 4821: /* avx512vl_getmantv4df */ |
| 58763 | case 4820: /* avx512f_getmantv8df_mask_round */ |
| 58764 | case 4819: /* avx512f_getmantv8df_mask */ |
| 58765 | case 4818: /* avx512f_getmantv8df_round */ |
| 58766 | case 4817: /* avx512f_getmantv8df */ |
| 58767 | case 4816: /* avx512vl_getmantv4sf_mask_round */ |
| 58768 | case 4815: /* avx512vl_getmantv4sf_mask */ |
| 58769 | case 4814: /* avx512vl_getmantv4sf_round */ |
| 58770 | case 4813: /* avx512vl_getmantv4sf */ |
| 58771 | case 4812: /* avx512vl_getmantv8sf_mask_round */ |
| 58772 | case 4811: /* avx512vl_getmantv8sf_mask */ |
| 58773 | case 4810: /* avx512vl_getmantv8sf_round */ |
| 58774 | case 4809: /* avx512vl_getmantv8sf */ |
| 58775 | case 4808: /* avx512f_getmantv16sf_mask_round */ |
| 58776 | case 4807: /* avx512f_getmantv16sf_mask */ |
| 58777 | case 4806: /* avx512f_getmantv16sf_round */ |
| 58778 | case 4805: /* avx512f_getmantv16sf */ |
| 58779 | case 4435: /* avx_pd256_pd */ |
| 58780 | case 4434: /* avx_ps256_ps */ |
| 58781 | case 4433: /* avx_si256_si */ |
| 58782 | case 4252: /* *avx_vperm_broadcast_v4df */ |
| 58783 | case 4251: /* *avx_vperm_broadcast_v8sf */ |
| 58784 | case 3677: /* sse3_monitor_di */ |
| 58785 | case 3676: /* sse3_monitor_si */ |
| 58786 | case 3675: /* sse3_mwait */ |
| 58787 | case 3637: /* *vec_extractv4si_zext_mem */ |
| 58788 | case 3636: /* *vec_extractv4si_mem */ |
| 58789 | case 3633: /* *vec_extractv4si_0_zext */ |
| 58790 | case 3632: /* *vec_extractv4si_0_zext_sse4 */ |
| 58791 | case 3631: /* *vec_extractv2di_0_sse */ |
| 58792 | case 3630: /* *vec_extractv2di_0 */ |
| 58793 | case 3629: /* *vec_extractv4si_0 */ |
| 58794 | case 3628: /* *vec_extractv8hi_mem */ |
| 58795 | case 3627: /* *vec_extractv16qi_mem */ |
| 58796 | case 3503: /* avx512vl_testnmv2di3_mask */ |
| 58797 | case 3502: /* avx512vl_testnmv2di3 */ |
| 58798 | case 3501: /* avx512vl_testnmv4di3_mask */ |
| 58799 | case 3500: /* avx512vl_testnmv4di3 */ |
| 58800 | case 3499: /* avx512f_testnmv8di3_mask */ |
| 58801 | case 3498: /* avx512f_testnmv8di3 */ |
| 58802 | case 3497: /* avx512vl_testnmv4si3_mask */ |
| 58803 | case 3496: /* avx512vl_testnmv4si3 */ |
| 58804 | case 3495: /* avx512vl_testnmv8si3_mask */ |
| 58805 | case 3494: /* avx512vl_testnmv8si3 */ |
| 58806 | case 3493: /* avx512f_testnmv16si3_mask */ |
| 58807 | case 3492: /* avx512f_testnmv16si3 */ |
| 58808 | case 3491: /* avx512vl_testnmv8hi3_mask */ |
| 58809 | case 3490: /* avx512vl_testnmv8hi3 */ |
| 58810 | case 3489: /* avx512vl_testnmv16hi3_mask */ |
| 58811 | case 3488: /* avx512vl_testnmv16hi3 */ |
| 58812 | case 3487: /* avx512bw_testnmv32hi3_mask */ |
| 58813 | case 3486: /* avx512bw_testnmv32hi3 */ |
| 58814 | case 3485: /* avx512vl_testnmv32qi3_mask */ |
| 58815 | case 3484: /* avx512vl_testnmv32qi3 */ |
| 58816 | case 3483: /* avx512vl_testnmv16qi3_mask */ |
| 58817 | case 3482: /* avx512vl_testnmv16qi3 */ |
| 58818 | case 3481: /* avx512bw_testnmv64qi3_mask */ |
| 58819 | case 3480: /* avx512bw_testnmv64qi3 */ |
| 58820 | case 3479: /* avx512vl_testmv2di3_mask */ |
| 58821 | case 3478: /* avx512vl_testmv2di3 */ |
| 58822 | case 3477: /* avx512vl_testmv4di3_mask */ |
| 58823 | case 3476: /* avx512vl_testmv4di3 */ |
| 58824 | case 3475: /* avx512f_testmv8di3_mask */ |
| 58825 | case 3474: /* avx512f_testmv8di3 */ |
| 58826 | case 3473: /* avx512vl_testmv4si3_mask */ |
| 58827 | case 3472: /* avx512vl_testmv4si3 */ |
| 58828 | case 3471: /* avx512vl_testmv8si3_mask */ |
| 58829 | case 3470: /* avx512vl_testmv8si3 */ |
| 58830 | case 3469: /* avx512f_testmv16si3_mask */ |
| 58831 | case 3468: /* avx512f_testmv16si3 */ |
| 58832 | case 3467: /* avx512vl_testmv8hi3_mask */ |
| 58833 | case 3466: /* avx512vl_testmv8hi3 */ |
| 58834 | case 3465: /* avx512vl_testmv16hi3_mask */ |
| 58835 | case 3464: /* avx512vl_testmv16hi3 */ |
| 58836 | case 3463: /* avx512bw_testmv32hi3_mask */ |
| 58837 | case 3462: /* avx512bw_testmv32hi3 */ |
| 58838 | case 3461: /* avx512vl_testmv32qi3_mask */ |
| 58839 | case 3460: /* avx512vl_testmv32qi3 */ |
| 58840 | case 3459: /* avx512vl_testmv16qi3_mask */ |
| 58841 | case 3458: /* avx512vl_testmv16qi3 */ |
| 58842 | case 3457: /* avx512bw_testmv64qi3_mask */ |
| 58843 | case 3456: /* avx512bw_testmv64qi3 */ |
| 58844 | case 3191: /* avx512vl_rorv2di_mask */ |
| 58845 | case 3190: /* avx512vl_rorv2di */ |
| 58846 | case 3189: /* avx512vl_rolv2di_mask */ |
| 58847 | case 3188: /* avx512vl_rolv2di */ |
| 58848 | case 3187: /* avx512vl_rorv4di_mask */ |
| 58849 | case 3186: /* avx512vl_rorv4di */ |
| 58850 | case 3185: /* avx512vl_rolv4di_mask */ |
| 58851 | case 3184: /* avx512vl_rolv4di */ |
| 58852 | case 3183: /* avx512f_rorv8di_mask */ |
| 58853 | case 3182: /* avx512f_rorv8di */ |
| 58854 | case 3181: /* avx512f_rolv8di_mask */ |
| 58855 | case 3180: /* avx512f_rolv8di */ |
| 58856 | case 3179: /* avx512vl_rorv4si_mask */ |
| 58857 | case 3178: /* avx512vl_rorv4si */ |
| 58858 | case 3177: /* avx512vl_rolv4si_mask */ |
| 58859 | case 3176: /* avx512vl_rolv4si */ |
| 58860 | case 3175: /* avx512vl_rorv8si_mask */ |
| 58861 | case 3174: /* avx512vl_rorv8si */ |
| 58862 | case 3173: /* avx512vl_rolv8si_mask */ |
| 58863 | case 3172: /* avx512vl_rolv8si */ |
| 58864 | case 3171: /* avx512f_rorv16si_mask */ |
| 58865 | case 3170: /* avx512f_rorv16si */ |
| 58866 | case 3169: /* avx512f_rolv16si_mask */ |
| 58867 | case 3168: /* avx512f_rolv16si */ |
| 58868 | case 3167: /* avx512vl_rorvv2di_mask */ |
| 58869 | case 3166: /* avx512vl_rorvv2di */ |
| 58870 | case 3165: /* avx512vl_rolvv2di_mask */ |
| 58871 | case 3164: /* avx512vl_rolvv2di */ |
| 58872 | case 3163: /* avx512vl_rorvv4di_mask */ |
| 58873 | case 3162: /* avx512vl_rorvv4di */ |
| 58874 | case 3161: /* avx512vl_rolvv4di_mask */ |
| 58875 | case 3160: /* avx512vl_rolvv4di */ |
| 58876 | case 3159: /* avx512f_rorvv8di_mask */ |
| 58877 | case 3158: /* avx512f_rorvv8di */ |
| 58878 | case 3157: /* avx512f_rolvv8di_mask */ |
| 58879 | case 3156: /* avx512f_rolvv8di */ |
| 58880 | case 3155: /* avx512vl_rorvv4si_mask */ |
| 58881 | case 3154: /* avx512vl_rorvv4si */ |
| 58882 | case 3153: /* avx512vl_rolvv4si_mask */ |
| 58883 | case 3152: /* avx512vl_rolvv4si */ |
| 58884 | case 3151: /* avx512vl_rorvv8si_mask */ |
| 58885 | case 3150: /* avx512vl_rorvv8si */ |
| 58886 | case 3149: /* avx512vl_rolvv8si_mask */ |
| 58887 | case 3148: /* avx512vl_rolvv8si */ |
| 58888 | case 3147: /* avx512f_rorvv16si_mask */ |
| 58889 | case 3146: /* avx512f_rorvv16si */ |
| 58890 | case 3145: /* avx512f_rolvv16si_mask */ |
| 58891 | case 3144: /* avx512f_rolvv16si */ |
| 58892 | case 2704: /* avx512f_rndscalev2df_round */ |
| 58893 | case 2703: /* avx512f_rndscalev2df */ |
| 58894 | case 2702: /* avx512f_rndscalev4sf_round */ |
| 58895 | case 2701: /* avx512f_rndscalev4sf */ |
| 58896 | case 2700: /* avx512vl_rndscalev2df_mask_round */ |
| 58897 | case 2699: /* avx512vl_rndscalev2df_mask */ |
| 58898 | case 2698: /* avx512vl_rndscalev2df_round */ |
| 58899 | case 2697: /* avx512vl_rndscalev2df */ |
| 58900 | case 2696: /* avx512vl_rndscalev4df_mask_round */ |
| 58901 | case 2695: /* avx512vl_rndscalev4df_mask */ |
| 58902 | case 2694: /* avx512vl_rndscalev4df_round */ |
| 58903 | case 2693: /* avx512vl_rndscalev4df */ |
| 58904 | case 2692: /* avx512f_rndscalev8df_mask_round */ |
| 58905 | case 2691: /* avx512f_rndscalev8df_mask */ |
| 58906 | case 2690: /* avx512f_rndscalev8df_round */ |
| 58907 | case 2689: /* avx512f_rndscalev8df */ |
| 58908 | case 2688: /* avx512vl_rndscalev4sf_mask_round */ |
| 58909 | case 2687: /* avx512vl_rndscalev4sf_mask */ |
| 58910 | case 2686: /* avx512vl_rndscalev4sf_round */ |
| 58911 | case 2685: /* avx512vl_rndscalev4sf */ |
| 58912 | case 2684: /* avx512vl_rndscalev8sf_mask_round */ |
| 58913 | case 2683: /* avx512vl_rndscalev8sf_mask */ |
| 58914 | case 2682: /* avx512vl_rndscalev8sf_round */ |
| 58915 | case 2681: /* avx512vl_rndscalev8sf */ |
| 58916 | case 2680: /* avx512f_rndscalev16sf_mask_round */ |
| 58917 | case 2679: /* avx512f_rndscalev16sf_mask */ |
| 58918 | case 2678: /* avx512f_rndscalev16sf_round */ |
| 58919 | case 2677: /* avx512f_rndscalev16sf */ |
| 58920 | case 2676: /* avx512f_sfixupimmv2df_mask_round */ |
| 58921 | case 2675: /* avx512f_sfixupimmv2df_mask */ |
| 58922 | case 2674: /* avx512f_sfixupimmv4sf_mask_round */ |
| 58923 | case 2673: /* avx512f_sfixupimmv4sf_mask */ |
| 58924 | case 2672: /* avx512f_sfixupimmv2df_maskz_1_round */ |
| 58925 | case 2671: /* avx512f_sfixupimmv2df_maskz_1 */ |
| 58926 | case 2670: /* avx512f_sfixupimmv2df_round */ |
| 58927 | case 2669: /* avx512f_sfixupimmv2df */ |
| 58928 | case 2668: /* avx512f_sfixupimmv4sf_maskz_1_round */ |
| 58929 | case 2667: /* avx512f_sfixupimmv4sf_maskz_1 */ |
| 58930 | case 2666: /* avx512f_sfixupimmv4sf_round */ |
| 58931 | case 2665: /* avx512f_sfixupimmv4sf */ |
| 58932 | case 2664: /* avx512vl_fixupimmv2df_mask_round */ |
| 58933 | case 2663: /* avx512vl_fixupimmv2df_mask */ |
| 58934 | case 2662: /* avx512vl_fixupimmv4df_mask_round */ |
| 58935 | case 2661: /* avx512vl_fixupimmv4df_mask */ |
| 58936 | case 2660: /* avx512f_fixupimmv8df_mask_round */ |
| 58937 | case 2659: /* avx512f_fixupimmv8df_mask */ |
| 58938 | case 2658: /* avx512vl_fixupimmv4sf_mask_round */ |
| 58939 | case 2657: /* avx512vl_fixupimmv4sf_mask */ |
| 58940 | case 2656: /* avx512vl_fixupimmv8sf_mask_round */ |
| 58941 | case 2655: /* avx512vl_fixupimmv8sf_mask */ |
| 58942 | case 2654: /* avx512f_fixupimmv16sf_mask_round */ |
| 58943 | case 2653: /* avx512f_fixupimmv16sf_mask */ |
| 58944 | case 2652: /* avx512vl_fixupimmv2df_maskz_1_round */ |
| 58945 | case 2651: /* avx512vl_fixupimmv2df_maskz_1 */ |
| 58946 | case 2650: /* avx512vl_fixupimmv2df_round */ |
| 58947 | case 2649: /* avx512vl_fixupimmv2df */ |
| 58948 | case 2648: /* avx512vl_fixupimmv4df_maskz_1_round */ |
| 58949 | case 2647: /* avx512vl_fixupimmv4df_maskz_1 */ |
| 58950 | case 2646: /* avx512vl_fixupimmv4df_round */ |
| 58951 | case 2645: /* avx512vl_fixupimmv4df */ |
| 58952 | case 2644: /* avx512f_fixupimmv8df_maskz_1_round */ |
| 58953 | case 2643: /* avx512f_fixupimmv8df_maskz_1 */ |
| 58954 | case 2642: /* avx512f_fixupimmv8df_round */ |
| 58955 | case 2641: /* avx512f_fixupimmv8df */ |
| 58956 | case 2640: /* avx512vl_fixupimmv4sf_maskz_1_round */ |
| 58957 | case 2639: /* avx512vl_fixupimmv4sf_maskz_1 */ |
| 58958 | case 2638: /* avx512vl_fixupimmv4sf_round */ |
| 58959 | case 2637: /* avx512vl_fixupimmv4sf */ |
| 58960 | case 2636: /* avx512vl_fixupimmv8sf_maskz_1_round */ |
| 58961 | case 2635: /* avx512vl_fixupimmv8sf_maskz_1 */ |
| 58962 | case 2634: /* avx512vl_fixupimmv8sf_round */ |
| 58963 | case 2633: /* avx512vl_fixupimmv8sf */ |
| 58964 | case 2632: /* avx512f_fixupimmv16sf_maskz_1_round */ |
| 58965 | case 2631: /* avx512f_fixupimmv16sf_maskz_1 */ |
| 58966 | case 2630: /* avx512f_fixupimmv16sf_round */ |
| 58967 | case 2629: /* avx512f_fixupimmv16sf */ |
| 58968 | case 2628: /* avx512vl_alignv2di_mask */ |
| 58969 | case 2627: /* *avx512vl_alignv2di */ |
| 58970 | case 2626: /* avx512vl_alignv4di_mask */ |
| 58971 | case 2625: /* *avx512vl_alignv4di */ |
| 58972 | case 2624: /* avx512f_alignv8di_mask */ |
| 58973 | case 2623: /* *avx512f_alignv8di */ |
| 58974 | case 2622: /* avx512vl_alignv4si_mask */ |
| 58975 | case 2621: /* *avx512vl_alignv4si */ |
| 58976 | case 2620: /* avx512vl_alignv8si_mask */ |
| 58977 | case 2619: /* *avx512vl_alignv8si */ |
| 58978 | case 2618: /* avx512f_alignv16si_mask */ |
| 58979 | case 2617: /* *avx512f_alignv16si */ |
| 58980 | case 2616: /* avx512f_sgetexpv2df_round */ |
| 58981 | case 2615: /* avx512f_sgetexpv2df */ |
| 58982 | case 2614: /* avx512f_sgetexpv4sf_round */ |
| 58983 | case 2613: /* avx512f_sgetexpv4sf */ |
| 58984 | case 2612: /* avx512vl_getexpv2df_mask_round */ |
| 58985 | case 2611: /* avx512vl_getexpv2df_mask */ |
| 58986 | case 2610: /* avx512vl_getexpv2df_round */ |
| 58987 | case 2609: /* avx512vl_getexpv2df */ |
| 58988 | case 2608: /* avx512vl_getexpv4df_mask_round */ |
| 58989 | case 2607: /* avx512vl_getexpv4df_mask */ |
| 58990 | case 2606: /* avx512vl_getexpv4df_round */ |
| 58991 | case 2605: /* avx512vl_getexpv4df */ |
| 58992 | case 2604: /* avx512f_getexpv8df_mask_round */ |
| 58993 | case 2603: /* avx512f_getexpv8df_mask */ |
| 58994 | case 2602: /* avx512f_getexpv8df_round */ |
| 58995 | case 2601: /* avx512f_getexpv8df */ |
| 58996 | case 2600: /* avx512vl_getexpv4sf_mask_round */ |
| 58997 | case 2599: /* avx512vl_getexpv4sf_mask */ |
| 58998 | case 2598: /* avx512vl_getexpv4sf_round */ |
| 58999 | case 2597: /* avx512vl_getexpv4sf */ |
| 59000 | case 2596: /* avx512vl_getexpv8sf_mask_round */ |
| 59001 | case 2595: /* avx512vl_getexpv8sf_mask */ |
| 59002 | case 2594: /* avx512vl_getexpv8sf_round */ |
| 59003 | case 2593: /* avx512vl_getexpv8sf */ |
| 59004 | case 2592: /* avx512f_getexpv16sf_mask_round */ |
| 59005 | case 2591: /* avx512f_getexpv16sf_mask */ |
| 59006 | case 2590: /* avx512f_getexpv16sf_round */ |
| 59007 | case 2589: /* avx512f_getexpv16sf */ |
| 59008 | case 2570: /* avx512vl_scalefv2df_mask_round */ |
| 59009 | case 2569: /* avx512vl_scalefv2df_mask */ |
| 59010 | case 2568: /* avx512vl_scalefv2df_round */ |
| 59011 | case 2567: /* avx512vl_scalefv2df */ |
| 59012 | case 2566: /* avx512vl_scalefv4df_mask_round */ |
| 59013 | case 2565: /* avx512vl_scalefv4df_mask */ |
| 59014 | case 2564: /* avx512vl_scalefv4df_round */ |
| 59015 | case 2563: /* avx512vl_scalefv4df */ |
| 59016 | case 2562: /* avx512f_scalefv8df_mask_round */ |
| 59017 | case 2561: /* avx512f_scalefv8df_mask */ |
| 59018 | case 2560: /* avx512f_scalefv8df_round */ |
| 59019 | case 2559: /* avx512f_scalefv8df */ |
| 59020 | case 2558: /* avx512vl_scalefv4sf_mask_round */ |
| 59021 | case 2557: /* avx512vl_scalefv4sf_mask */ |
| 59022 | case 2556: /* avx512vl_scalefv4sf_round */ |
| 59023 | case 2555: /* avx512vl_scalefv4sf */ |
| 59024 | case 2554: /* avx512vl_scalefv8sf_mask_round */ |
| 59025 | case 2553: /* avx512vl_scalefv8sf_mask */ |
| 59026 | case 2552: /* avx512vl_scalefv8sf_round */ |
| 59027 | case 2551: /* avx512vl_scalefv8sf */ |
| 59028 | case 2550: /* avx512f_scalefv16sf_mask_round */ |
| 59029 | case 2549: /* avx512f_scalefv16sf_mask */ |
| 59030 | case 2548: /* avx512f_scalefv16sf_round */ |
| 59031 | case 2547: /* avx512f_scalefv16sf */ |
| 59032 | case 2546: /* avx512f_vmscalefv2df_round */ |
| 59033 | case 2545: /* avx512f_vmscalefv2df */ |
| 59034 | case 2544: /* avx512f_vmscalefv4sf_round */ |
| 59035 | case 2543: /* avx512f_vmscalefv4sf */ |
| 59036 | case 2529: /* vec_extract_lo_v32qi */ |
| 59037 | case 2527: /* vec_extract_lo_v64qi */ |
| 59038 | case 2525: /* vec_extract_lo_v16hi */ |
| 59039 | case 2523: /* vec_extract_lo_v32hi */ |
| 59040 | case 2502: /* vec_extract_lo_v16si_mask */ |
| 59041 | case 2501: /* vec_extract_lo_v16si */ |
| 59042 | case 2500: /* vec_extract_lo_v16sf_mask */ |
| 59043 | case 2499: /* vec_extract_lo_v16sf */ |
| 59044 | case 2468: /* *vec_extractv4sf_mem */ |
| 59045 | case 2466: /* *vec_extractv4sf_0 */ |
| 59046 | case 2415: /* *avx512vl_cvtmask2qv2di */ |
| 59047 | case 2414: /* *avx512vl_cvtmask2qv4di */ |
| 59048 | case 2413: /* *avx512f_cvtmask2qv8di */ |
| 59049 | case 2412: /* *avx512vl_cvtmask2dv4si */ |
| 59050 | case 2411: /* *avx512vl_cvtmask2dv8si */ |
| 59051 | case 2410: /* *avx512f_cvtmask2dv16si */ |
| 59052 | case 2409: /* *avx512vl_cvtmask2wv8hi */ |
| 59053 | case 2408: /* *avx512vl_cvtmask2wv16hi */ |
| 59054 | case 2407: /* *avx512bw_cvtmask2wv32hi */ |
| 59055 | case 2406: /* *avx512vl_cvtmask2bv32qi */ |
| 59056 | case 2405: /* *avx512vl_cvtmask2bv16qi */ |
| 59057 | case 2404: /* *avx512bw_cvtmask2bv64qi */ |
| 59058 | case 2403: /* avx512vl_cvtq2maskv2di */ |
| 59059 | case 2402: /* avx512vl_cvtq2maskv4di */ |
| 59060 | case 2401: /* avx512f_cvtq2maskv8di */ |
| 59061 | case 2400: /* avx512vl_cvtd2maskv4si */ |
| 59062 | case 2399: /* avx512vl_cvtd2maskv8si */ |
| 59063 | case 2398: /* avx512f_cvtd2maskv16si */ |
| 59064 | case 2397: /* avx512vl_cvtw2maskv8hi */ |
| 59065 | case 2396: /* avx512vl_cvtw2maskv16hi */ |
| 59066 | case 2395: /* avx512bw_cvtw2maskv32hi */ |
| 59067 | case 2394: /* avx512vl_cvtb2maskv32qi */ |
| 59068 | case 2393: /* avx512vl_cvtb2maskv16qi */ |
| 59069 | case 2392: /* avx512bw_cvtb2maskv64qi */ |
| 59070 | case 1360: /* *absnegv2df2 */ |
| 59071 | case 1359: /* *absnegv4df2 */ |
| 59072 | case 1358: /* *absnegv8df2 */ |
| 59073 | case 1357: /* *absnegv4sf2 */ |
| 59074 | case 1356: /* *absnegv8sf2 */ |
| 59075 | case 1355: /* *absnegv16sf2 */ |
| 59076 | case 1354: /* kunpckdi */ |
| 59077 | case 1353: /* kunpcksi */ |
| 59078 | case 1294: /* movdi_to_sse */ |
| 59079 | case 1209: /* *vec_extractv2si_zext_mem */ |
| 59080 | case 1207: /* *vec_extractv2si_0 */ |
| 59081 | case 1137: /* *vec_extractv2sf_0 */ |
| 59082 | case 1105: /* rdpid */ |
| 59083 | case 1104: /* *wrpkru */ |
| 59084 | case 1103: /* *rdpkru */ |
| 59085 | case 1096: /* *bnd64_cn */ |
| 59086 | case 1095: /* *bnd64_cu */ |
| 59087 | case 1094: /* *bnd64_cl */ |
| 59088 | case 1093: /* *bnd32_cn */ |
| 59089 | case 1092: /* *bnd32_cu */ |
| 59090 | case 1091: /* *bnd32_cl */ |
| 59091 | case 1088: /* *bnd64_mk */ |
| 59092 | case 1087: /* *bnd32_mk */ |
| 59093 | case 1086: /* clzero_di */ |
| 59094 | case 1085: /* clzero_si */ |
| 59095 | case 1084: /* monitorx_di */ |
| 59096 | case 1083: /* monitorx_si */ |
| 59097 | case 1082: /* mwaitx */ |
| 59098 | case 1079: /* xtest_1 */ |
| 59099 | case 1078: /* xabort */ |
| 59100 | case 1077: /* xend */ |
| 59101 | case 1076: /* xbegin_1 */ |
| 59102 | case 1075: /* *pause */ |
| 59103 | case 1074: /* rdseeddi_1 */ |
| 59104 | case 1073: /* rdseedsi_1 */ |
| 59105 | case 1072: /* rdseedhi_1 */ |
| 59106 | case 1071: /* rdranddi_1 */ |
| 59107 | case 1070: /* rdrandsi_1 */ |
| 59108 | case 1069: /* rdrandhi_1 */ |
| 59109 | case 1068: /* wrgsbasedi */ |
| 59110 | case 1067: /* wrfsbasedi */ |
| 59111 | case 1066: /* wrgsbasesi */ |
| 59112 | case 1065: /* wrfsbasesi */ |
| 59113 | case 1064: /* rdgsbasedi */ |
| 59114 | case 1063: /* rdfsbasedi */ |
| 59115 | case 1062: /* rdgsbasesi */ |
| 59116 | case 1061: /* rdfsbasesi */ |
| 59117 | case 1060: /* *lwp_lwpinsdi3_1 */ |
| 59118 | case 1059: /* *lwp_lwpinssi3_1 */ |
| 59119 | case 1058: /* *lwp_lwpvaldi3_1 */ |
| 59120 | case 1057: /* *lwp_lwpvalsi3_1 */ |
| 59121 | case 1056: /* lwp_slwpcbdi */ |
| 59122 | case 1055: /* lwp_slwpcbsi */ |
| 59123 | case 1054: /* *lwp_llwpcbdi1 */ |
| 59124 | case 1053: /* *lwp_llwpcbsi1 */ |
| 59125 | case 1052: /* fnclex */ |
| 59126 | case 1026: /* rdtscp_rex64 */ |
| 59127 | case 1025: /* rdtscp */ |
| 59128 | case 1024: /* rdtsc_rex64 */ |
| 59129 | case 1023: /* rdtsc */ |
| 59130 | case 1022: /* rdpmc_rex64 */ |
| 59131 | case 1021: /* rdpmc */ |
| 59132 | case 1016: /* stack_tls_protect_test_di */ |
| 59133 | case 1015: /* stack_tls_protect_test_si */ |
| 59134 | case 1014: /* stack_protect_test_di */ |
| 59135 | case 1013: /* stack_protect_test_si */ |
| 59136 | case 1012: /* stack_tls_protect_set_di */ |
| 59137 | case 1011: /* stack_tls_protect_set_si */ |
| 59138 | case 1010: /* stack_protect_set_di */ |
| 59139 | case 1009: /* stack_protect_set_si */ |
| 59140 | case 1005: /* trap */ |
| 59141 | case 1004: /* probe_stack_rangedi */ |
| 59142 | case 1003: /* probe_stack_rangesi */ |
| 59143 | case 1002: /* adjust_stack_and_probedi */ |
| 59144 | case 1001: /* adjust_stack_and_probesi */ |
| 59145 | case 998: /* allocate_stack_worker_probe_di */ |
| 59146 | case 997: /* allocate_stack_worker_probe_si */ |
| 59147 | case 974: /* *x86_movdicc_0_m1_neg */ |
| 59148 | case 973: /* *x86_movsicc_0_m1_neg */ |
| 59149 | case 972: /* *x86_movdicc_0_m1_se */ |
| 59150 | case 971: /* *x86_movsicc_0_m1_se */ |
| 59151 | case 970: /* *x86_movdicc_0_m1 */ |
| 59152 | case 969: /* *x86_movsicc_0_m1 */ |
| 59153 | case 968: /* *strlenqi_1 */ |
| 59154 | case 967: /* *strlenqi_1 */ |
| 59155 | case 966: /* *cmpstrnqi_1 */ |
| 59156 | case 965: /* *cmpstrnqi_1 */ |
| 59157 | case 964: /* *cmpstrnqi_nz_1 */ |
| 59158 | case 963: /* *cmpstrnqi_nz_1 */ |
| 59159 | case 934: /* cld */ |
| 59160 | case 811: /* *tls_dynamic_gnu2_combine_64 */ |
| 59161 | case 809: /* *tls_dynamic_gnu2_lea_64 */ |
| 59162 | case 808: /* *tls_dynamic_gnu2_combine_32 */ |
| 59163 | case 806: /* *tls_dynamic_gnu2_lea_32 */ |
| 59164 | case 797: /* *tls_local_dynamic_32_once */ |
| 59165 | case 796: /* *tls_local_dynamic_base_64_largepic */ |
| 59166 | case 795: /* *tls_local_dynamic_base_64_di */ |
| 59167 | case 794: /* *tls_local_dynamic_base_64_si */ |
| 59168 | case 793: /* *tls_local_dynamic_base_32_gnu */ |
| 59169 | case 792: /* *tls_global_dynamic_64_largepic */ |
| 59170 | case 791: /* *tls_global_dynamic_64_di */ |
| 59171 | case 790: /* *tls_global_dynamic_64_si */ |
| 59172 | case 789: /* *tls_global_dynamic_32_gnu */ |
| 59173 | case 788: /* *parityhi2_cmp */ |
| 59174 | case 787: /* paritysi2_cmp */ |
| 59175 | case 786: /* paritydi2_cmp */ |
| 59176 | case 785: /* bswaphi_lowpart */ |
| 59177 | case 784: /* *bswaphi_lowpart_1 */ |
| 59178 | case 778: /* *popcounthi2_1 */ |
| 59179 | case 706: /* ffssi2_no_cmove */ |
| 59180 | case 705: /* split_stack_return */ |
| 59181 | case 702: /* eh_return_internal */ |
| 59182 | case 700: /* set_rip_rex64 */ |
| 59183 | case 699: /* set_got_rex64 */ |
| 59184 | case 698: /* *set_got_labelled */ |
| 59185 | case 697: /* *set_got */ |
| 59186 | case 696: /* pad */ |
| 59187 | case 695: /* nops */ |
| 59188 | case 694: /* nop */ |
| 59189 | case 692: /* simple_return_pop_internal */ |
| 59190 | case 691: /* simple_return_internal_long */ |
| 59191 | case 690: /* interrupt_return */ |
| 59192 | case 689: /* simple_return_internal */ |
| 59193 | case 688: /* prologue_use */ |
| 59194 | case 687: /* *memory_blockage */ |
| 59195 | case 686: /* blockage */ |
| 59196 | case 658: /* *jccxf_si_r_i387 */ |
| 59197 | case 657: /* *jccdf_si_r_i387 */ |
| 59198 | case 656: /* *jccsf_si_r_i387 */ |
| 59199 | case 655: /* *jccxf_hi_r_i387 */ |
| 59200 | case 654: /* *jccdf_hi_r_i387 */ |
| 59201 | case 653: /* *jccsf_hi_r_i387 */ |
| 59202 | case 652: /* *jccxf_si_i387 */ |
| 59203 | case 651: /* *jccdf_si_i387 */ |
| 59204 | case 650: /* *jccsf_si_i387 */ |
| 59205 | case 649: /* *jccxf_hi_i387 */ |
| 59206 | case 648: /* *jccdf_hi_i387 */ |
| 59207 | case 647: /* *jccsf_hi_i387 */ |
| 59208 | case 646: /* *jccuxf_r_i387 */ |
| 59209 | case 645: /* *jccudf_r_i387 */ |
| 59210 | case 644: /* *jccusf_r_i387 */ |
| 59211 | case 643: /* *jccuxf_i387 */ |
| 59212 | case 642: /* *jccudf_i387 */ |
| 59213 | case 641: /* *jccusf_i387 */ |
| 59214 | case 640: /* *jccdf_r_i387 */ |
| 59215 | case 639: /* *jccsf_r_i387 */ |
| 59216 | case 638: /* *jccdf_i387 */ |
| 59217 | case 637: /* *jccsf_i387 */ |
| 59218 | case 636: /* *jccxf_r_i387 */ |
| 59219 | case 635: /* *jccxf_i387 */ |
| 59220 | case 634: /* *jccxf_0_r_i387 */ |
| 59221 | case 633: /* *jccdf_0_r_i387 */ |
| 59222 | case 632: /* *jccsf_0_r_i387 */ |
| 59223 | case 631: /* *jccxf_0_i387 */ |
| 59224 | case 630: /* *jccdf_0_i387 */ |
| 59225 | case 629: /* *jccsf_0_i387 */ |
| 59226 | case 622: /* *setcc_si_1_movzbl */ |
| 59227 | case 621: /* *setcc_si_1_and */ |
| 59228 | case 620: /* *setcc_di_1 */ |
| 59229 | case 619: /* *jcc_btdi_mask */ |
| 59230 | case 618: /* *jcc_btsi_mask */ |
| 59231 | case 617: /* *jcc_btdi_1 */ |
| 59232 | case 616: /* *jcc_btsi_1 */ |
| 59233 | case 615: /* *jcc_btdi */ |
| 59234 | case 614: /* *jcc_btsi */ |
| 59235 | case 593: /* ix86_rotrti3_doubleword */ |
| 59236 | case 592: /* ix86_rotrdi3_doubleword */ |
| 59237 | case 591: /* ix86_rotlti3_doubleword */ |
| 59238 | case 590: /* ix86_rotldi3_doubleword */ |
| 59239 | case 589: /* *rotrdi3_mask */ |
| 59240 | case 588: /* *rotldi3_mask */ |
| 59241 | case 587: /* *rotrsi3_mask */ |
| 59242 | case 586: /* *rotlsi3_mask */ |
| 59243 | case 544: /* *ashrti3_doubleword */ |
| 59244 | case 543: /* *lshrti3_doubleword */ |
| 59245 | case 542: /* *ashrdi3_doubleword */ |
| 59246 | case 541: /* *lshrdi3_doubleword */ |
| 59247 | case 540: /* *ashrdi3_mask */ |
| 59248 | case 539: /* *lshrdi3_mask */ |
| 59249 | case 538: /* *ashrsi3_mask */ |
| 59250 | case 537: /* *lshrsi3_mask */ |
| 59251 | case 518: /* *ashldi3_mask */ |
| 59252 | case 517: /* *ashlsi3_mask */ |
| 59253 | case 514: /* *ashlti3_doubleword */ |
| 59254 | case 513: /* *ashldi3_doubleword */ |
| 59255 | case 502: /* *one_cmpldi2_doubleword */ |
| 59256 | case 501: /* copysigntf3_var */ |
| 59257 | case 500: /* copysigndf3_var */ |
| 59258 | case 499: /* copysignsf3_var */ |
| 59259 | case 498: /* copysigntf3_const */ |
| 59260 | case 497: /* copysigndf3_const */ |
| 59261 | case 496: /* copysignsf3_const */ |
| 59262 | case 483: /* *absnegtf2_sse */ |
| 59263 | case 482: /* *absnegxf2_i387 */ |
| 59264 | case 481: /* *absnegdf2 */ |
| 59265 | case 480: /* *absnegsf2 */ |
| 59266 | case 465: /* *negti2_doubleword */ |
| 59267 | case 464: /* *negdi2_doubleword */ |
| 59268 | case 422: /* *xordi3_doubleword */ |
| 59269 | case 421: /* *iordi3_doubleword */ |
| 59270 | case 414: /* *andndi3_doubleword */ |
| 59271 | case 397: /* *anddi3_doubleword */ |
| 59272 | case 396: /* *testqi_ext_3 */ |
| 59273 | case 395: /* *testqi_ext_3 */ |
| 59274 | case 394: /* *testqi_ext_3 */ |
| 59275 | case 382: /* *udivmoddi4_pow2 */ |
| 59276 | case 381: /* *udivmodsi4_pow2 */ |
| 59277 | case 380: /* *udivmoddi4 */ |
| 59278 | case 379: /* *udivmodsi4 */ |
| 59279 | case 378: /* *udivmodhi4 */ |
| 59280 | case 377: /* udivmoddi4_1 */ |
| 59281 | case 376: /* udivmodsi4_1 */ |
| 59282 | case 371: /* *divmoddi4 */ |
| 59283 | case 370: /* *divmodsi4 */ |
| 59284 | case 369: /* *divmodhi4 */ |
| 59285 | case 368: /* divmoddi4_1 */ |
| 59286 | case 367: /* divmodsi4_1 */ |
| 59287 | case 270: /* *subti3_doubleword */ |
| 59288 | case 269: /* *subdi3_doubleword */ |
| 59289 | case 268: /* *leadi_general_4 */ |
| 59290 | case 267: /* *leadi_general_4 */ |
| 59291 | case 266: /* *leasi_general_4 */ |
| 59292 | case 265: /* *leasi_general_4 */ |
| 59293 | case 264: /* *leahi_general_4 */ |
| 59294 | case 263: /* *leahi_general_4 */ |
| 59295 | case 262: /* *leaqi_general_4 */ |
| 59296 | case 261: /* *leaqi_general_4 */ |
| 59297 | case 260: /* *leahi_general_3b */ |
| 59298 | case 259: /* *leaqi_general_3b */ |
| 59299 | case 258: /* *leahi_general_3 */ |
| 59300 | case 257: /* *leaqi_general_3 */ |
| 59301 | case 256: /* *leahi_general_2b */ |
| 59302 | case 255: /* *leaqi_general_2b */ |
| 59303 | case 254: /* *leahi_general_2 */ |
| 59304 | case 253: /* *leaqi_general_2 */ |
| 59305 | case 252: /* *leahi_general_1 */ |
| 59306 | case 251: /* *leaqi_general_1 */ |
| 59307 | case 216: /* *addti3_doubleword */ |
| 59308 | case 215: /* *adddi3_doubleword */ |
| 59309 | case 214: /* *leadi */ |
| 59310 | case 213: /* *leasi */ |
| 59311 | case 212: /* *floatunssixf2_i387_with_xmm */ |
| 59312 | case 211: /* *floatunssidf2_i387_with_xmm */ |
| 59313 | case 210: /* *floatunssisf2_i387_with_xmm */ |
| 59314 | case 169: /* *fixuns_truncdf_1 */ |
| 59315 | case 168: /* *fixuns_truncsf_1 */ |
| 59316 | case 146: /* extendsidi2_1 */ |
| 59317 | case 144: /* *zextsi_doubleword */ |
| 59318 | case 143: /* *zexthi_doubleword */ |
| 59319 | case 142: /* *zextqi_doubleword */ |
| 59320 | case 141: /* *zexthi_doubleword_and */ |
| 59321 | case 140: /* *zextqi_doubleword_and */ |
| 59322 | case 73: /* *popfldi1 */ |
| 59323 | case 72: /* *popflsi1 */ |
| 59324 | case 71: /* *pushfldi2 */ |
| 59325 | case 70: /* *pushflsi2 */ |
| 59326 | case 69: /* *popdi1_epilogue */ |
| 59327 | case 68: /* *popsi1_epilogue */ |
| 59328 | case 67: /* *popdi1 */ |
| 59329 | case 66: /* *popsi1 */ |
| 59330 | case 65: /* *pushdi2_prologue */ |
| 59331 | case 64: /* *pushsi2_prologue */ |
| 59332 | case 63: /* *pushhi2 */ |
| 59333 | case 62: /* *pushqi2 */ |
| 59334 | case 61: /* *pushsi2_rex64 */ |
| 59335 | case 60: /* *pushhi2_rex64 */ |
| 59336 | case 59: /* *pushqi2_rex64 */ |
| 59337 | case 58: /* *pushsi2 */ |
| 59338 | case 57: /* *pushdi2_rex64 */ |
| 59339 | case 56: /* *pushti2 */ |
| 59340 | case 55: /* *pushdi2 */ |
| 59341 | case 48: /* x86_sahf_1 */ |
| 59342 | return 1; |
| 59343 | |
| 59344 | case 4926: /* mfence_sse2 */ |
| 59345 | case 4925: /* *sse_sfence */ |
| 59346 | case 4924: /* *sse2_lfence */ |
| 59347 | case 4862: /* conflictv2di_mask */ |
| 59348 | case 4861: /* *conflictv2di */ |
| 59349 | case 4860: /* conflictv4di_mask */ |
| 59350 | case 4859: /* *conflictv4di */ |
| 59351 | case 4858: /* conflictv8di_mask */ |
| 59352 | case 4857: /* *conflictv8di */ |
| 59353 | case 4856: /* conflictv4si_mask */ |
| 59354 | case 4855: /* *conflictv4si */ |
| 59355 | case 4854: /* conflictv8si_mask */ |
| 59356 | case 4853: /* *conflictv8si */ |
| 59357 | case 4852: /* conflictv16si_mask */ |
| 59358 | case 4851: /* *conflictv16si */ |
| 59359 | case 4850: /* clzv2di2_mask */ |
| 59360 | case 4849: /* clzv2di2 */ |
| 59361 | case 4848: /* clzv4di2_mask */ |
| 59362 | case 4847: /* clzv4di2 */ |
| 59363 | case 4846: /* clzv8di2_mask */ |
| 59364 | case 4845: /* clzv8di2 */ |
| 59365 | case 4844: /* clzv4si2_mask */ |
| 59366 | case 4843: /* clzv4si2 */ |
| 59367 | case 4842: /* clzv8si2_mask */ |
| 59368 | case 4841: /* clzv8si2 */ |
| 59369 | case 4840: /* clzv16si2_mask */ |
| 59370 | case 4839: /* clzv16si2 */ |
| 59371 | case 4804: /* avx512dq_vmfpclassv2df */ |
| 59372 | case 4803: /* avx512dq_vmfpclassv4sf */ |
| 59373 | case 4802: /* avx512dq_fpclassv2df_mask */ |
| 59374 | case 4801: /* avx512dq_fpclassv2df */ |
| 59375 | case 4800: /* avx512dq_fpclassv4df_mask */ |
| 59376 | case 4799: /* avx512dq_fpclassv4df */ |
| 59377 | case 4798: /* avx512dq_fpclassv8df_mask */ |
| 59378 | case 4797: /* avx512dq_fpclassv8df */ |
| 59379 | case 4796: /* avx512dq_fpclassv4sf_mask */ |
| 59380 | case 4795: /* avx512dq_fpclassv4sf */ |
| 59381 | case 4794: /* avx512dq_fpclassv8sf_mask */ |
| 59382 | case 4793: /* avx512dq_fpclassv8sf */ |
| 59383 | case 4792: /* avx512dq_fpclassv16sf_mask */ |
| 59384 | case 4791: /* avx512dq_fpclassv16sf */ |
| 59385 | case 4790: /* avx512dq_rangesv2df_round */ |
| 59386 | case 4789: /* avx512dq_rangesv2df */ |
| 59387 | case 4788: /* avx512dq_rangesv4sf_round */ |
| 59388 | case 4787: /* avx512dq_rangesv4sf */ |
| 59389 | case 4786: /* avx512dq_rangepv2df_mask */ |
| 59390 | case 4785: /* avx512dq_rangepv2df */ |
| 59391 | case 4784: /* avx512dq_rangepv4df_mask */ |
| 59392 | case 4783: /* avx512dq_rangepv4df */ |
| 59393 | case 4782: /* avx512dq_rangepv8df_mask_round */ |
| 59394 | case 4781: /* avx512dq_rangepv8df_mask */ |
| 59395 | case 4780: /* avx512dq_rangepv8df_round */ |
| 59396 | case 4779: /* avx512dq_rangepv8df */ |
| 59397 | case 4778: /* avx512dq_rangepv4sf_mask */ |
| 59398 | case 4777: /* avx512dq_rangepv4sf */ |
| 59399 | case 4776: /* avx512dq_rangepv8sf_mask */ |
| 59400 | case 4775: /* avx512dq_rangepv8sf */ |
| 59401 | case 4774: /* avx512dq_rangepv16sf_mask_round */ |
| 59402 | case 4773: /* avx512dq_rangepv16sf_mask */ |
| 59403 | case 4772: /* avx512dq_rangepv16sf_round */ |
| 59404 | case 4771: /* avx512dq_rangepv16sf */ |
| 59405 | case 4489: /* avx512bw_lshrvv32hi_mask */ |
| 59406 | case 4488: /* avx512bw_lshrvv32hi */ |
| 59407 | case 4487: /* avx512bw_ashlvv32hi_mask */ |
| 59408 | case 4486: /* avx512bw_ashlvv32hi */ |
| 59409 | case 4485: /* avx512vl_lshrvv16hi_mask */ |
| 59410 | case 4484: /* avx512vl_lshrvv16hi */ |
| 59411 | case 4483: /* avx512vl_ashlvv16hi_mask */ |
| 59412 | case 4482: /* avx512vl_ashlvv16hi */ |
| 59413 | case 4481: /* avx512vl_lshrvv8hi_mask */ |
| 59414 | case 4480: /* avx512vl_lshrvv8hi */ |
| 59415 | case 4479: /* avx512vl_ashlvv8hi_mask */ |
| 59416 | case 4478: /* avx512vl_ashlvv8hi */ |
| 59417 | case 4477: /* avx2_lshrvv2di_mask */ |
| 59418 | case 4476: /* avx2_lshrvv2di */ |
| 59419 | case 4475: /* avx2_ashlvv2di_mask */ |
| 59420 | case 4474: /* avx2_ashlvv2di */ |
| 59421 | case 4473: /* avx2_lshrvv4di_mask */ |
| 59422 | case 4472: /* avx2_lshrvv4di */ |
| 59423 | case 4471: /* avx2_ashlvv4di_mask */ |
| 59424 | case 4470: /* avx2_ashlvv4di */ |
| 59425 | case 4469: /* avx512f_lshrvv8di_mask */ |
| 59426 | case 4468: /* avx512f_lshrvv8di */ |
| 59427 | case 4467: /* avx512f_ashlvv8di_mask */ |
| 59428 | case 4466: /* avx512f_ashlvv8di */ |
| 59429 | case 4465: /* avx2_lshrvv4si_mask */ |
| 59430 | case 4464: /* avx2_lshrvv4si */ |
| 59431 | case 4463: /* avx2_ashlvv4si_mask */ |
| 59432 | case 4462: /* avx2_ashlvv4si */ |
| 59433 | case 4461: /* avx2_lshrvv8si_mask */ |
| 59434 | case 4460: /* avx2_lshrvv8si */ |
| 59435 | case 4459: /* avx2_ashlvv8si_mask */ |
| 59436 | case 4458: /* avx2_ashlvv8si */ |
| 59437 | case 4457: /* avx512f_lshrvv16si_mask */ |
| 59438 | case 4456: /* avx512f_lshrvv16si */ |
| 59439 | case 4455: /* avx512f_ashlvv16si_mask */ |
| 59440 | case 4454: /* avx512f_ashlvv16si */ |
| 59441 | case 4453: /* avx512bw_ashrvv32hi_mask */ |
| 59442 | case 4452: /* avx512bw_ashrvv32hi */ |
| 59443 | case 4451: /* avx512vl_ashrvv16hi_mask */ |
| 59444 | case 4450: /* avx512vl_ashrvv16hi */ |
| 59445 | case 4449: /* avx512vl_ashrvv8hi_mask */ |
| 59446 | case 4448: /* avx512vl_ashrvv8hi */ |
| 59447 | case 4447: /* avx512f_ashrvv8di_mask */ |
| 59448 | case 4446: /* avx512f_ashrvv8di */ |
| 59449 | case 4445: /* avx2_ashrvv4di_mask */ |
| 59450 | case 4444: /* avx2_ashrvv4di */ |
| 59451 | case 4443: /* avx2_ashrvv2di_mask */ |
| 59452 | case 4442: /* avx2_ashrvv2di */ |
| 59453 | case 4441: /* avx512f_ashrvv16si_mask */ |
| 59454 | case 4440: /* avx512f_ashrvv16si */ |
| 59455 | case 4439: /* avx2_ashrvv8si_mask */ |
| 59456 | case 4438: /* avx2_ashrvv8si */ |
| 59457 | case 4437: /* avx2_ashrvv4si_mask */ |
| 59458 | case 4436: /* avx2_ashrvv4si */ |
| 59459 | case 4396: /* *ssse3_palignrv2df_perm */ |
| 59460 | case 4395: /* *ssse3_palignrv4sf_perm */ |
| 59461 | case 4394: /* *ssse3_palignrv2di_perm */ |
| 59462 | case 4393: /* *ssse3_palignrv4si_perm */ |
| 59463 | case 4392: /* *ssse3_palignrv8hi_perm */ |
| 59464 | case 4391: /* *ssse3_palignrv16qi_perm */ |
| 59465 | case 4249: /* avx512cd_maskw_vec_dupv4si */ |
| 59466 | case 4248: /* avx512cd_maskw_vec_dupv8si */ |
| 59467 | case 4247: /* avx512cd_maskw_vec_dupv16si */ |
| 59468 | case 4246: /* avx512cd_maskb_vec_dupv2di */ |
| 59469 | case 4245: /* avx512cd_maskb_vec_dupv4di */ |
| 59470 | case 4244: /* avx512cd_maskb_vec_dupv8di */ |
| 59471 | case 4056: /* avx_vzeroupper */ |
| 59472 | case 4055: /* *avx_vzeroall */ |
| 59473 | case 4047: /* xop_vpermil2v2df3 */ |
| 59474 | case 4046: /* xop_vpermil2v4df3 */ |
| 59475 | case 4045: /* xop_vpermil2v4sf3 */ |
| 59476 | case 4044: /* xop_vpermil2v8sf3 */ |
| 59477 | case 4031: /* xop_maskcmpv2di3 */ |
| 59478 | case 4030: /* xop_maskcmpv4si3 */ |
| 59479 | case 4029: /* xop_maskcmpv8hi3 */ |
| 59480 | case 4028: /* xop_maskcmpv16qi3 */ |
| 59481 | case 4027: /* *xop_vmfrczv2df2 */ |
| 59482 | case 4026: /* *xop_vmfrczv4sf2 */ |
| 59483 | case 4025: /* xop_frczv4df2 */ |
| 59484 | case 4024: /* xop_frczv8sf2 */ |
| 59485 | case 4023: /* xop_frczv2df2 */ |
| 59486 | case 4022: /* xop_frczv4sf2 */ |
| 59487 | case 4021: /* xop_frczdf2 */ |
| 59488 | case 4020: /* xop_frczsf2 */ |
| 59489 | case 4019: /* xop_shlv2di3 */ |
| 59490 | case 4018: /* xop_shlv4si3 */ |
| 59491 | case 4017: /* xop_shlv8hi3 */ |
| 59492 | case 4016: /* xop_shlv16qi3 */ |
| 59493 | case 4015: /* xop_shav2di3 */ |
| 59494 | case 4014: /* xop_shav4si3 */ |
| 59495 | case 4013: /* xop_shav8hi3 */ |
| 59496 | case 4012: /* xop_shav16qi3 */ |
| 59497 | case 4011: /* xop_vrotlv2di3 */ |
| 59498 | case 4010: /* xop_vrotlv4si3 */ |
| 59499 | case 4009: /* xop_vrotlv8hi3 */ |
| 59500 | case 4008: /* xop_vrotlv16qi3 */ |
| 59501 | case 4007: /* xop_rotrv2di3 */ |
| 59502 | case 4006: /* xop_rotrv4si3 */ |
| 59503 | case 4005: /* xop_rotrv8hi3 */ |
| 59504 | case 4004: /* xop_rotrv16qi3 */ |
| 59505 | case 4003: /* xop_rotlv2di3 */ |
| 59506 | case 4002: /* xop_rotlv4si3 */ |
| 59507 | case 4001: /* xop_rotlv8hi3 */ |
| 59508 | case 4000: /* xop_rotlv16qi3 */ |
| 59509 | case 3999: /* xop_pperm_pack_v8hi_v16qi */ |
| 59510 | case 3998: /* xop_pperm_pack_v4si_v8hi */ |
| 59511 | case 3997: /* xop_pperm_pack_v2di_v4si */ |
| 59512 | case 3996: /* xop_pperm */ |
| 59513 | case 3995: /* xop_phsubdq */ |
| 59514 | case 3994: /* xop_phsubwd */ |
| 59515 | case 3993: /* xop_phsubbw */ |
| 59516 | case 3992: /* xop_phaddudq */ |
| 59517 | case 3991: /* xop_phadddq */ |
| 59518 | case 3990: /* xop_phadduwq */ |
| 59519 | case 3989: /* xop_phaddwq */ |
| 59520 | case 3988: /* xop_phadduwd */ |
| 59521 | case 3987: /* xop_phaddwd */ |
| 59522 | case 3986: /* xop_phaddubq */ |
| 59523 | case 3985: /* xop_phaddbq */ |
| 59524 | case 3984: /* xop_phaddubd */ |
| 59525 | case 3983: /* xop_phaddbd */ |
| 59526 | case 3982: /* xop_phaddubw */ |
| 59527 | case 3981: /* xop_phaddbw */ |
| 59528 | case 3980: /* xop_pcmov_v2df */ |
| 59529 | case 3979: /* xop_pcmov_v4df256 */ |
| 59530 | case 3978: /* xop_pcmov_v8df512 */ |
| 59531 | case 3977: /* xop_pcmov_v4sf */ |
| 59532 | case 3976: /* xop_pcmov_v8sf256 */ |
| 59533 | case 3975: /* xop_pcmov_v16sf512 */ |
| 59534 | case 3974: /* xop_pcmov_v2di */ |
| 59535 | case 3973: /* xop_pcmov_v4di256 */ |
| 59536 | case 3972: /* xop_pcmov_v8di512 */ |
| 59537 | case 3971: /* xop_pcmov_v4si */ |
| 59538 | case 3970: /* xop_pcmov_v8si256 */ |
| 59539 | case 3969: /* xop_pcmov_v16si512 */ |
| 59540 | case 3968: /* xop_pcmov_v8hi */ |
| 59541 | case 3967: /* xop_pcmov_v16hi256 */ |
| 59542 | case 3966: /* xop_pcmov_v16qi */ |
| 59543 | case 3965: /* xop_pcmov_v32qi256 */ |
| 59544 | case 3952: /* avx512er_vmrsqrt28v2df_round */ |
| 59545 | case 3951: /* avx512er_vmrsqrt28v2df */ |
| 59546 | case 3950: /* avx512er_vmrsqrt28v4sf_round */ |
| 59547 | case 3949: /* avx512er_vmrsqrt28v4sf */ |
| 59548 | case 3948: /* avx512er_rsqrt28v8df_mask_round */ |
| 59549 | case 3947: /* avx512er_rsqrt28v8df_mask */ |
| 59550 | case 3946: /* *avx512er_rsqrt28v8df_round */ |
| 59551 | case 3945: /* *avx512er_rsqrt28v8df */ |
| 59552 | case 3944: /* avx512er_rsqrt28v16sf_mask_round */ |
| 59553 | case 3943: /* avx512er_rsqrt28v16sf_mask */ |
| 59554 | case 3942: /* *avx512er_rsqrt28v16sf_round */ |
| 59555 | case 3941: /* *avx512er_rsqrt28v16sf */ |
| 59556 | case 3940: /* avx512er_vmrcp28v2df_round */ |
| 59557 | case 3939: /* avx512er_vmrcp28v2df */ |
| 59558 | case 3938: /* avx512er_vmrcp28v4sf_round */ |
| 59559 | case 3937: /* avx512er_vmrcp28v4sf */ |
| 59560 | case 3936: /* avx512er_rcp28v8df_mask_round */ |
| 59561 | case 3935: /* avx512er_rcp28v8df_mask */ |
| 59562 | case 3934: /* *avx512er_rcp28v8df_round */ |
| 59563 | case 3933: /* *avx512er_rcp28v8df */ |
| 59564 | case 3932: /* avx512er_rcp28v16sf_mask_round */ |
| 59565 | case 3931: /* avx512er_rcp28v16sf_mask */ |
| 59566 | case 3930: /* *avx512er_rcp28v16sf_round */ |
| 59567 | case 3929: /* *avx512er_rcp28v16sf */ |
| 59568 | case 3928: /* avx512er_exp2v8df_mask_round */ |
| 59569 | case 3927: /* avx512er_exp2v8df_mask */ |
| 59570 | case 3926: /* avx512er_exp2v8df_round */ |
| 59571 | case 3925: /* avx512er_exp2v8df */ |
| 59572 | case 3924: /* avx512er_exp2v16sf_mask_round */ |
| 59573 | case 3923: /* avx512er_exp2v16sf_mask */ |
| 59574 | case 3922: /* avx512er_exp2v16sf_round */ |
| 59575 | case 3921: /* avx512er_exp2v16sf */ |
| 59576 | case 3920: /* *avx512pf_scatterpfv8didf_mask */ |
| 59577 | case 3919: /* *avx512pf_scatterpfv8didf_mask */ |
| 59578 | case 3918: /* *avx512pf_scatterpfv8sidf_mask */ |
| 59579 | case 3917: /* *avx512pf_scatterpfv8sidf_mask */ |
| 59580 | case 3916: /* *avx512pf_scatterpfv8disf_mask */ |
| 59581 | case 3915: /* *avx512pf_scatterpfv8disf_mask */ |
| 59582 | case 3914: /* *avx512pf_scatterpfv16sisf_mask */ |
| 59583 | case 3913: /* *avx512pf_scatterpfv16sisf_mask */ |
| 59584 | case 3912: /* *avx512pf_gatherpfv8didf_mask */ |
| 59585 | case 3911: /* *avx512pf_gatherpfv8didf_mask */ |
| 59586 | case 3910: /* *avx512pf_gatherpfv8sidf_mask */ |
| 59587 | case 3909: /* *avx512pf_gatherpfv8sidf_mask */ |
| 59588 | case 3908: /* *avx512pf_gatherpfv8disf_mask */ |
| 59589 | case 3907: /* *avx512pf_gatherpfv8disf_mask */ |
| 59590 | case 3906: /* *avx512pf_gatherpfv16sisf_mask */ |
| 59591 | case 3905: /* *avx512pf_gatherpfv16sisf_mask */ |
| 59592 | case 3769: /* sse4a_extrq */ |
| 59593 | case 3768: /* sse4a_extrqi */ |
| 59594 | case 3736: /* ssse3_palignrdi */ |
| 59595 | case 3735: /* ssse3_palignrti */ |
| 59596 | case 3734: /* avx2_palignrv2ti */ |
| 59597 | case 3733: /* avx512bw_palignrv4ti */ |
| 59598 | case 3732: /* ssse3_palignrv16qi_mask */ |
| 59599 | case 3731: /* avx2_palignrv32qi_mask */ |
| 59600 | case 3730: /* avx512bw_palignrv64qi_mask */ |
| 59601 | case 3674: /* sse2_clflush */ |
| 59602 | case 3673: /* sse_stmxcsr */ |
| 59603 | case 3672: /* sse_ldmxcsr */ |
| 59604 | case 3143: /* sse2_lshrv1ti3 */ |
| 59605 | case 3142: /* avx2_lshrv2ti3 */ |
| 59606 | case 3141: /* avx512bw_lshrv4ti3 */ |
| 59607 | case 3140: /* sse2_ashlv1ti3 */ |
| 59608 | case 3139: /* avx2_ashlv2ti3 */ |
| 59609 | case 3138: /* avx512bw_ashlv4ti3 */ |
| 59610 | case 3137: /* lshrv8di3_mask */ |
| 59611 | case 3136: /* lshrv8di3 */ |
| 59612 | case 3135: /* ashlv8di3_mask */ |
| 59613 | case 3134: /* ashlv8di3 */ |
| 59614 | case 3133: /* lshrv16si3_mask */ |
| 59615 | case 3132: /* lshrv16si3 */ |
| 59616 | case 3131: /* ashlv16si3_mask */ |
| 59617 | case 3130: /* ashlv16si3 */ |
| 59618 | case 3129: /* lshrv2di3_mask */ |
| 59619 | case 3128: /* lshrv2di3 */ |
| 59620 | case 3127: /* ashlv2di3_mask */ |
| 59621 | case 3126: /* ashlv2di3 */ |
| 59622 | case 3125: /* lshrv4di3_mask */ |
| 59623 | case 3124: /* lshrv4di3 */ |
| 59624 | case 3123: /* ashlv4di3_mask */ |
| 59625 | case 3122: /* ashlv4di3 */ |
| 59626 | case 3121: /* lshrv4si3_mask */ |
| 59627 | case 3120: /* lshrv4si3 */ |
| 59628 | case 3119: /* ashlv4si3_mask */ |
| 59629 | case 3118: /* ashlv4si3 */ |
| 59630 | case 3117: /* lshrv8si3_mask */ |
| 59631 | case 3116: /* lshrv8si3 */ |
| 59632 | case 3115: /* ashlv8si3_mask */ |
| 59633 | case 3114: /* ashlv8si3 */ |
| 59634 | case 3113: /* lshrv8hi3_mask */ |
| 59635 | case 3112: /* lshrv8hi3 */ |
| 59636 | case 3111: /* ashlv8hi3_mask */ |
| 59637 | case 3110: /* ashlv8hi3 */ |
| 59638 | case 3109: /* lshrv16hi3_mask */ |
| 59639 | case 3108: /* lshrv16hi3 */ |
| 59640 | case 3107: /* ashlv16hi3_mask */ |
| 59641 | case 3106: /* ashlv16hi3 */ |
| 59642 | case 3105: /* lshrv32hi3_mask */ |
| 59643 | case 3104: /* lshrv32hi3 */ |
| 59644 | case 3103: /* ashlv32hi3_mask */ |
| 59645 | case 3102: /* ashlv32hi3 */ |
| 59646 | case 3101: /* ashrv8di3_mask */ |
| 59647 | case 3100: /* ashrv8di3 */ |
| 59648 | case 3099: /* ashrv16si3_mask */ |
| 59649 | case 3098: /* ashrv16si3 */ |
| 59650 | case 3097: /* ashrv4di3_mask */ |
| 59651 | case 3096: /* ashrv4di3 */ |
| 59652 | case 3095: /* ashrv32hi3_mask */ |
| 59653 | case 3094: /* ashrv32hi3 */ |
| 59654 | case 3093: /* ashrv2di3_mask */ |
| 59655 | case 3092: /* *ashrv2di3 */ |
| 59656 | case 3091: /* ashrv4si3 */ |
| 59657 | case 3090: /* ashrv8si3 */ |
| 59658 | case 3089: /* ashrv8hi3 */ |
| 59659 | case 3088: /* ashrv16hi3 */ |
| 59660 | case 3087: /* ashrv4si3_mask */ |
| 59661 | case 3086: /* *ashrv4si3 */ |
| 59662 | case 3085: /* ashrv8si3_mask */ |
| 59663 | case 3084: /* *ashrv8si3 */ |
| 59664 | case 3083: /* ashrv8hi3_mask */ |
| 59665 | case 3082: /* *ashrv8hi3 */ |
| 59666 | case 3081: /* ashrv16hi3_mask */ |
| 59667 | case 3080: /* *ashrv16hi3 */ |
| 59668 | case 2443: /* avx512f_movsldup512_mask */ |
| 59669 | case 2442: /* *avx512f_movsldup512 */ |
| 59670 | case 2441: /* sse3_movsldup_mask */ |
| 59671 | case 2440: /* sse3_movsldup */ |
| 59672 | case 2439: /* avx_movsldup256_mask */ |
| 59673 | case 2438: /* avx_movsldup256 */ |
| 59674 | case 2437: /* avx512f_movshdup512_mask */ |
| 59675 | case 2436: /* *avx512f_movshdup512 */ |
| 59676 | case 2435: /* sse3_movshdup_mask */ |
| 59677 | case 2434: /* sse3_movshdup */ |
| 59678 | case 2433: /* avx_movshdup256_mask */ |
| 59679 | case 2432: /* avx_movshdup256 */ |
| 59680 | case 1634: /* reducesv2df */ |
| 59681 | case 1633: /* reducesv4sf */ |
| 59682 | case 1632: /* reducepv2df_mask */ |
| 59683 | case 1631: /* *reducepv2df */ |
| 59684 | case 1630: /* reducepv4df_mask */ |
| 59685 | case 1629: /* *reducepv4df */ |
| 59686 | case 1628: /* reducepv8df_mask */ |
| 59687 | case 1627: /* *reducepv8df */ |
| 59688 | case 1626: /* reducepv4sf_mask */ |
| 59689 | case 1625: /* *reducepv4sf */ |
| 59690 | case 1624: /* reducepv8sf_mask */ |
| 59691 | case 1623: /* *reducepv8sf */ |
| 59692 | case 1622: /* reducepv16sf_mask */ |
| 59693 | case 1621: /* *reducepv16sf */ |
| 59694 | case 1606: /* sse2_vmsminv2df3_round */ |
| 59695 | case 1605: /* sse2_vmsminv2df3 */ |
| 59696 | case 1604: /* sse2_vmsmaxv2df3_round */ |
| 59697 | case 1603: /* sse2_vmsmaxv2df3 */ |
| 59698 | case 1602: /* sse_vmsminv4sf3_round */ |
| 59699 | case 1601: /* sse_vmsminv4sf3 */ |
| 59700 | case 1600: /* sse_vmsmaxv4sf3_round */ |
| 59701 | case 1599: /* sse_vmsmaxv4sf3 */ |
| 59702 | case 1518: /* sse_vmrsqrtv4sf2 */ |
| 59703 | case 1517: /* rsqrt14v2df */ |
| 59704 | case 1516: /* rsqrt14v4sf */ |
| 59705 | case 1515: /* rsqrt14v2df_mask */ |
| 59706 | case 1514: /* *rsqrt14v2df */ |
| 59707 | case 1513: /* rsqrt14v4df_mask */ |
| 59708 | case 1512: /* *rsqrt14v4df */ |
| 59709 | case 1511: /* rsqrt14v8df_mask */ |
| 59710 | case 1510: /* *rsqrt14v8df */ |
| 59711 | case 1509: /* rsqrt14v4sf_mask */ |
| 59712 | case 1508: /* *rsqrt14v4sf */ |
| 59713 | case 1507: /* rsqrt14v8sf_mask */ |
| 59714 | case 1506: /* *rsqrt14v8sf */ |
| 59715 | case 1505: /* rsqrt14v16sf_mask */ |
| 59716 | case 1504: /* *rsqrt14v16sf */ |
| 59717 | case 1503: /* sse_rsqrtv4sf2 */ |
| 59718 | case 1502: /* avx_rsqrtv8sf2 */ |
| 59719 | case 1501: /* sse2_vmsqrtv2df2_round */ |
| 59720 | case 1500: /* sse2_vmsqrtv2df2 */ |
| 59721 | case 1499: /* sse_vmsqrtv4sf2_round */ |
| 59722 | case 1498: /* sse_vmsqrtv4sf2 */ |
| 59723 | case 1497: /* sse2_sqrtv2df2_mask */ |
| 59724 | case 1496: /* sse2_sqrtv2df2 */ |
| 59725 | case 1495: /* avx_sqrtv4df2_mask */ |
| 59726 | case 1494: /* avx_sqrtv4df2 */ |
| 59727 | case 1493: /* avx512f_sqrtv8df2_mask_round */ |
| 59728 | case 1492: /* avx512f_sqrtv8df2_mask */ |
| 59729 | case 1491: /* avx512f_sqrtv8df2_round */ |
| 59730 | case 1490: /* avx512f_sqrtv8df2 */ |
| 59731 | case 1489: /* sse_sqrtv4sf2_mask */ |
| 59732 | case 1488: /* sse_sqrtv4sf2 */ |
| 59733 | case 1487: /* avx_sqrtv8sf2_mask */ |
| 59734 | case 1486: /* avx_sqrtv8sf2 */ |
| 59735 | case 1485: /* avx512f_sqrtv16sf2_mask_round */ |
| 59736 | case 1484: /* avx512f_sqrtv16sf2_mask */ |
| 59737 | case 1483: /* avx512f_sqrtv16sf2_round */ |
| 59738 | case 1482: /* avx512f_sqrtv16sf2 */ |
| 59739 | case 1481: /* srcp14v2df */ |
| 59740 | case 1480: /* srcp14v4sf */ |
| 59741 | case 1479: /* rcp14v2df_mask */ |
| 59742 | case 1478: /* *rcp14v2df */ |
| 59743 | case 1477: /* rcp14v4df_mask */ |
| 59744 | case 1476: /* *rcp14v4df */ |
| 59745 | case 1475: /* rcp14v8df_mask */ |
| 59746 | case 1474: /* *rcp14v8df */ |
| 59747 | case 1473: /* rcp14v4sf_mask */ |
| 59748 | case 1472: /* *rcp14v4sf */ |
| 59749 | case 1471: /* rcp14v8sf_mask */ |
| 59750 | case 1470: /* *rcp14v8sf */ |
| 59751 | case 1469: /* rcp14v16sf_mask */ |
| 59752 | case 1468: /* *rcp14v16sf */ |
| 59753 | case 1467: /* sse_vmrcpv4sf2 */ |
| 59754 | case 1466: /* sse_rcpv4sf2 */ |
| 59755 | case 1465: /* avx_rcpv8sf2 */ |
| 59756 | case 1460: /* avx512f_divv8df3_mask_round */ |
| 59757 | case 1459: /* avx512f_divv8df3_mask */ |
| 59758 | case 1458: /* avx512f_divv8df3_round */ |
| 59759 | case 1457: /* avx512f_divv8df3 */ |
| 59760 | case 1452: /* avx512f_divv16sf3_mask_round */ |
| 59761 | case 1451: /* avx512f_divv16sf3_mask */ |
| 59762 | case 1450: /* avx512f_divv16sf3_round */ |
| 59763 | case 1449: /* avx512f_divv16sf3 */ |
| 59764 | case 1217: /* *mmx_femms */ |
| 59765 | case 1216: /* *mmx_emms */ |
| 59766 | case 1215: /* *mmx_maskmovq */ |
| 59767 | case 1214: /* *mmx_maskmovq */ |
| 59768 | case 1213: /* mmx_pmovmskb */ |
| 59769 | case 1212: /* mmx_psadbw */ |
| 59770 | case 1211: /* *mmx_uavgv4hi3 */ |
| 59771 | case 1210: /* *mmx_uavgv8qi3 */ |
| 59772 | case 1205: /* *vec_dupv2si */ |
| 59773 | case 1204: /* *vec_dupv4hi */ |
| 59774 | case 1203: /* mmx_pswapdv2si2 */ |
| 59775 | case 1202: /* mmx_pshufw_1 */ |
| 59776 | case 1201: /* mmx_pextrw */ |
| 59777 | case 1200: /* *mmx_pinsrw */ |
| 59778 | case 1199: /* mmx_punpckldq */ |
| 59779 | case 1198: /* mmx_punpckhdq */ |
| 59780 | case 1197: /* mmx_punpcklwd */ |
| 59781 | case 1196: /* mmx_punpckhwd */ |
| 59782 | case 1195: /* mmx_punpcklbw */ |
| 59783 | case 1194: /* mmx_punpckhbw */ |
| 59784 | case 1193: /* mmx_packuswb */ |
| 59785 | case 1192: /* mmx_packssdw */ |
| 59786 | case 1191: /* mmx_packsswb */ |
| 59787 | case 1190: /* *mmx_xorv2si3 */ |
| 59788 | case 1189: /* *mmx_iorv2si3 */ |
| 59789 | case 1188: /* *mmx_andv2si3 */ |
| 59790 | case 1187: /* *mmx_xorv4hi3 */ |
| 59791 | case 1186: /* *mmx_iorv4hi3 */ |
| 59792 | case 1185: /* *mmx_andv4hi3 */ |
| 59793 | case 1184: /* *mmx_xorv8qi3 */ |
| 59794 | case 1183: /* *mmx_iorv8qi3 */ |
| 59795 | case 1182: /* *mmx_andv8qi3 */ |
| 59796 | case 1181: /* mmx_andnotv2si3 */ |
| 59797 | case 1180: /* mmx_andnotv4hi3 */ |
| 59798 | case 1179: /* mmx_andnotv8qi3 */ |
| 59799 | case 1178: /* mmx_gtv2si3 */ |
| 59800 | case 1177: /* mmx_gtv4hi3 */ |
| 59801 | case 1176: /* mmx_gtv8qi3 */ |
| 59802 | case 1175: /* *mmx_eqv2si3 */ |
| 59803 | case 1174: /* *mmx_eqv4hi3 */ |
| 59804 | case 1173: /* *mmx_eqv8qi3 */ |
| 59805 | case 1172: /* mmx_lshrv1di3 */ |
| 59806 | case 1171: /* mmx_ashlv1di3 */ |
| 59807 | case 1170: /* mmx_lshrv2si3 */ |
| 59808 | case 1169: /* mmx_ashlv2si3 */ |
| 59809 | case 1168: /* mmx_lshrv4hi3 */ |
| 59810 | case 1167: /* mmx_ashlv4hi3 */ |
| 59811 | case 1166: /* mmx_ashrv2si3 */ |
| 59812 | case 1165: /* mmx_ashrv4hi3 */ |
| 59813 | case 1164: /* *mmx_uminv8qi3 */ |
| 59814 | case 1163: /* *mmx_umaxv8qi3 */ |
| 59815 | case 1162: /* *mmx_sminv4hi3 */ |
| 59816 | case 1161: /* *mmx_smaxv4hi3 */ |
| 59817 | case 1160: /* *sse2_umulv1siv1di3 */ |
| 59818 | case 1159: /* *mmx_pmulhrwv4hi3 */ |
| 59819 | case 1158: /* *mmx_pmaddwd */ |
| 59820 | case 1157: /* *mmx_umulv4hi3_highpart */ |
| 59821 | case 1156: /* *mmx_smulv4hi3_highpart */ |
| 59822 | case 1155: /* *mmx_mulv4hi3 */ |
| 59823 | case 1154: /* *mmx_ussubv4hi3 */ |
| 59824 | case 1153: /* *mmx_sssubv4hi3 */ |
| 59825 | case 1152: /* *mmx_usaddv4hi3 */ |
| 59826 | case 1151: /* *mmx_ssaddv4hi3 */ |
| 59827 | case 1150: /* *mmx_ussubv8qi3 */ |
| 59828 | case 1149: /* *mmx_sssubv8qi3 */ |
| 59829 | case 1148: /* *mmx_usaddv8qi3 */ |
| 59830 | case 1147: /* *mmx_ssaddv8qi3 */ |
| 59831 | case 1146: /* *mmx_subv1di3 */ |
| 59832 | case 1145: /* *mmx_addv1di3 */ |
| 59833 | case 1144: /* *mmx_subv2si3 */ |
| 59834 | case 1143: /* *mmx_addv2si3 */ |
| 59835 | case 1142: /* *mmx_subv4hi3 */ |
| 59836 | case 1141: /* *mmx_addv4hi3 */ |
| 59837 | case 1140: /* *mmx_subv8qi3 */ |
| 59838 | case 1139: /* *mmx_addv8qi3 */ |
| 59839 | case 1135: /* *vec_dupv2sf */ |
| 59840 | case 1134: /* mmx_pswapdv2sf2 */ |
| 59841 | case 1133: /* mmx_floatv2si2 */ |
| 59842 | case 1132: /* mmx_pi2fw */ |
| 59843 | case 1131: /* mmx_pf2iw */ |
| 59844 | case 1130: /* mmx_pf2id */ |
| 59845 | case 1129: /* mmx_gev2sf3 */ |
| 59846 | case 1128: /* mmx_gtv2sf3 */ |
| 59847 | case 1127: /* *mmx_eqv2sf3 */ |
| 59848 | case 1126: /* mmx_addsubv2sf3 */ |
| 59849 | case 1125: /* mmx_hsubv2sf3 */ |
| 59850 | case 1124: /* mmx_haddv2sf3 */ |
| 59851 | case 1123: /* mmx_rsqit1v2sf3 */ |
| 59852 | case 1122: /* mmx_rsqrtv2sf2 */ |
| 59853 | case 1121: /* mmx_rcpit2v2sf3 */ |
| 59854 | case 1120: /* mmx_rcpit1v2sf3 */ |
| 59855 | case 1119: /* mmx_rcpv2sf2 */ |
| 59856 | case 1118: /* mmx_ieee_minv2sf3 */ |
| 59857 | case 1117: /* mmx_ieee_maxv2sf3 */ |
| 59858 | case 1116: /* *mmx_sminv2sf3 */ |
| 59859 | case 1115: /* *mmx_smaxv2sf3 */ |
| 59860 | case 1114: /* *mmx_mulv2sf3 */ |
| 59861 | case 1113: /* *mmx_subv2sf3 */ |
| 59862 | case 1112: /* *mmx_addv2sf3 */ |
| 59863 | case 1081: /* clflushopt */ |
| 59864 | case 1080: /* clwb */ |
| 59865 | case 1008: /* *prefetch_prefetchwt1 */ |
| 59866 | case 1007: /* *prefetch_3dnow */ |
| 59867 | case 1006: /* *prefetch_sse */ |
| 59868 | case 984: /* *xop_pcmov_df */ |
| 59869 | case 983: /* *xop_pcmov_sf */ |
| 59870 | case 932: /* fxamdf2_i387_with_temp */ |
| 59871 | case 931: /* fxamsf2_i387_with_temp */ |
| 59872 | case 930: /* fxamxf2_i387 */ |
| 59873 | case 929: /* fxamdf2_i387 */ |
| 59874 | case 928: /* fxamsf2_i387 */ |
| 59875 | case 909: /* frndintxf2_mask_pm_i387 */ |
| 59876 | case 908: /* frndintxf2_mask_pm */ |
| 59877 | case 907: /* frndintxf2_trunc_i387 */ |
| 59878 | case 906: /* frndintxf2_ceil_i387 */ |
| 59879 | case 905: /* frndintxf2_floor_i387 */ |
| 59880 | case 904: /* frndintdf2_trunc_i387 */ |
| 59881 | case 903: /* frndintdf2_ceil_i387 */ |
| 59882 | case 902: /* frndintdf2_floor_i387 */ |
| 59883 | case 901: /* frndintsf2_trunc_i387 */ |
| 59884 | case 900: /* frndintsf2_ceil_i387 */ |
| 59885 | case 899: /* frndintsf2_floor_i387 */ |
| 59886 | case 898: /* frndintxf2_trunc */ |
| 59887 | case 897: /* frndintxf2_ceil */ |
| 59888 | case 896: /* frndintxf2_floor */ |
| 59889 | case 895: /* frndintdf2_trunc */ |
| 59890 | case 894: /* frndintdf2_ceil */ |
| 59891 | case 893: /* frndintdf2_floor */ |
| 59892 | case 892: /* frndintsf2_trunc */ |
| 59893 | case 891: /* frndintsf2_ceil */ |
| 59894 | case 890: /* frndintsf2_floor */ |
| 59895 | case 889: /* fistsi2_with_temp */ |
| 59896 | case 888: /* fisthi2_with_temp */ |
| 59897 | case 887: /* fistsi2 */ |
| 59898 | case 886: /* fisthi2 */ |
| 59899 | case 885: /* *fistsi2_1 */ |
| 59900 | case 884: /* *fisthi2_1 */ |
| 59901 | case 883: /* fistdi2_with_temp */ |
| 59902 | case 882: /* fistdi2 */ |
| 59903 | case 881: /* *fistdi2_1 */ |
| 59904 | case 880: /* rintdf2_frndint */ |
| 59905 | case 879: /* rintsf2_frndint */ |
| 59906 | case 878: /* rintxf2 */ |
| 59907 | case 875: /* fscalexf4_i387 */ |
| 59908 | case 874: /* *f2xm1xf2_i387 */ |
| 59909 | case 873: /* fxtract_extenddfxf3_i387 */ |
| 59910 | case 872: /* fxtract_extendsfxf3_i387 */ |
| 59911 | case 871: /* fxtractxf3_i387 */ |
| 59912 | case 870: /* fyl2xp1_extenddfxf3_i387 */ |
| 59913 | case 869: /* fyl2xp1_extendsfxf3_i387 */ |
| 59914 | case 868: /* fyl2xp1xf3_i387 */ |
| 59915 | case 867: /* fyl2x_extenddfxf3_i387 */ |
| 59916 | case 866: /* fyl2x_extendsfxf3_i387 */ |
| 59917 | case 865: /* fyl2xxf3_i387 */ |
| 59918 | case 864: /* fpatan_extenddfxf3_i387 */ |
| 59919 | case 863: /* fpatan_extendsfxf3_i387 */ |
| 59920 | case 862: /* *fpatanxf3_i387 */ |
| 59921 | case 861: /* fptan_extenddfxf4_i387 */ |
| 59922 | case 860: /* fptan_extendsfxf4_i387 */ |
| 59923 | case 859: /* fptanxf4_i387 */ |
| 59924 | case 858: /* sincos_extenddfxf3_i387 */ |
| 59925 | case 857: /* sincos_extendsfxf3_i387 */ |
| 59926 | case 856: /* sincosxf3 */ |
| 59927 | case 855: /* *cos_extenddfxf2_i387 */ |
| 59928 | case 854: /* *sin_extenddfxf2_i387 */ |
| 59929 | case 853: /* *cos_extendsfxf2_i387 */ |
| 59930 | case 852: /* *sin_extendsfxf2_i387 */ |
| 59931 | case 851: /* *cosxf2_i387 */ |
| 59932 | case 850: /* *sinxf2_i387 */ |
| 59933 | case 849: /* fprem1xf4_i387 */ |
| 59934 | case 848: /* fpremxf4_i387 */ |
| 59935 | case 847: /* *sqrtdf2_sse */ |
| 59936 | case 846: /* *sqrtsf2_sse */ |
| 59937 | case 845: /* *rsqrtsf2_sse */ |
| 59938 | case 844: /* sqrt_extenddfxf2_i387 */ |
| 59939 | case 843: /* sqrt_extendsfxf2_i387 */ |
| 59940 | case 842: /* sqrtxf2 */ |
| 59941 | case 814: /* *rcpsf2_sse */ |
| 59942 | case 209: /* floatdixf2_i387_with_xmm */ |
| 59943 | case 208: /* floatdidf2_i387_with_xmm */ |
| 59944 | case 207: /* floatdisf2_i387_with_xmm */ |
| 59945 | case 193: /* x86_fldcw_1 */ |
| 59946 | case 192: /* x86_fnstcw_1 */ |
| 59947 | case 47: /* x86_fnstsw_1 */ |
| 59948 | case 46: /* *cmpxf_si_cc_i387 */ |
| 59949 | case 45: /* *cmpdf_si_cc_i387 */ |
| 59950 | case 44: /* *cmpsf_si_cc_i387 */ |
| 59951 | case 43: /* *cmpxf_hi_cc_i387 */ |
| 59952 | case 42: /* *cmpdf_hi_cc_i387 */ |
| 59953 | case 41: /* *cmpsf_hi_cc_i387 */ |
| 59954 | case 40: /* *cmpxf_si_i387 */ |
| 59955 | case 39: /* *cmpdf_si_i387 */ |
| 59956 | case 38: /* *cmpsf_si_i387 */ |
| 59957 | case 37: /* *cmpxf_hi_i387 */ |
| 59958 | case 36: /* *cmpdf_hi_i387 */ |
| 59959 | case 35: /* *cmpsf_hi_i387 */ |
| 59960 | case 34: /* *cmpuxf_cc_i387 */ |
| 59961 | case 33: /* *cmpudf_cc_i387 */ |
| 59962 | case 32: /* *cmpusf_cc_i387 */ |
| 59963 | case 31: /* *cmpuxf_i387 */ |
| 59964 | case 30: /* *cmpudf_i387 */ |
| 59965 | case 29: /* *cmpusf_i387 */ |
| 59966 | case 28: /* *cmpdf_cc_i387 */ |
| 59967 | case 27: /* *cmpsf_cc_i387 */ |
| 59968 | case 26: /* *cmpdf_i387 */ |
| 59969 | case 25: /* *cmpsf_i387 */ |
| 59970 | case 24: /* *cmpxf_cc_i387 */ |
| 59971 | case 23: /* *cmpxf_i387 */ |
| 59972 | case 22: /* *cmpxf_0_cc_i387 */ |
| 59973 | case 21: /* *cmpdf_0_cc_i387 */ |
| 59974 | case 20: /* *cmpsf_0_cc_i387 */ |
| 59975 | case 19: /* *cmpxf_0_i387 */ |
| 59976 | case 18: /* *cmpdf_0_i387 */ |
| 59977 | case 17: /* *cmpsf_0_i387 */ |
| 59978 | return 0; |
| 59979 | |
| 59980 | case 659: /* jump */ |
| 59981 | case 628: /* *jcc_2 */ |
| 59982 | case 627: /* *jcc_1 */ |
| 59983 | case 393: /* *testqi_ext_2 */ |
| 59984 | case 392: /* *testqi_ext_1 */ |
| 59985 | case 391: /* *testsi_1 */ |
| 59986 | case 390: /* *testhi_1 */ |
| 59987 | case 389: /* *testqi_1 */ |
| 59988 | case 388: /* *testqi_1_maybe_si */ |
| 59989 | case 387: /* *testdi_1 */ |
| 59990 | case 222: /* *addqi_1_slp */ |
| 59991 | case 16: /* *cmpqi_ext_4 */ |
| 59992 | case 15: /* *cmpqi_ext_3 */ |
| 59993 | case 14: /* *cmpqi_ext_2 */ |
| 59994 | case 13: /* *cmpqi_ext_1 */ |
| 59995 | case 12: /* *cmpdi_minus_1 */ |
| 59996 | case 11: /* *cmpsi_minus_1 */ |
| 59997 | case 10: /* *cmphi_minus_1 */ |
| 59998 | case 9: /* *cmpqi_minus_1 */ |
| 59999 | case 8: /* *cmpdi_1 */ |
| 60000 | case 7: /* *cmpsi_1 */ |
| 60001 | case 6: /* *cmphi_1 */ |
| 60002 | case 5: /* *cmpqi_1 */ |
| 60003 | case 4: /* *cmpdi_ccno_1 */ |
| 60004 | case 3: /* *cmpsi_ccno_1 */ |
| 60005 | case 2: /* *cmphi_ccno_1 */ |
| 60006 | case 1: /* *cmpqi_ccno_1 */ |
| 60007 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) |
| 60008 | { |
| 60009 | return 1; |
| 60010 | } |
| 60011 | else if (cached_memory == MEMORY_LOAD) |
| 60012 | { |
| 60013 | return 5; |
| 60014 | } |
| 60015 | else |
| 60016 | { |
| 60017 | return 0; |
| 60018 | } |
| 60019 | |
| 60020 | case -1: |
| 60021 | if (GET_CODE (PATTERN (insn)) != ASM_INPUT |
| 60022 | && asm_noperands (PATTERN (insn)) < 0) |
| 60023 | fatal_insn_not_found (insn); |
| 60024 | /* FALLTHRU */ |
| 60025 | default: |
| 60026 | extract_insn_cached (insn); |
| 60027 | if (((cached_type = get_attr_type (insn)) == TYPE_CALL) || (cached_type == TYPE_CALLV)) |
| 60028 | { |
| 60029 | return 2; |
| 60030 | } |
| 60031 | else if (cached_type == TYPE_PUSH) |
| 60032 | { |
| 60033 | return 1; |
| 60034 | } |
| 60035 | else if (cached_type == TYPE_POP) |
| 60036 | { |
| 60037 | return 1; |
| 60038 | } |
| 60039 | else if (cached_type == TYPE_LEAVE) |
| 60040 | { |
| 60041 | return 3; |
| 60042 | } |
| 60043 | else if (cached_type == TYPE_LEA) |
| 60044 | { |
| 60045 | return 1; |
| 60046 | } |
| 60047 | else if ((cached_type == TYPE_IMUL) && ((cached_mode = get_attr_mode (insn)) == MODE_DI) && (((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) || (cached_memory == MEMORY_UNKNOWN))) |
| 60048 | { |
| 60049 | return 6; |
| 60050 | } |
| 60051 | else if ((cached_type == TYPE_IMUL) && (((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) || (cached_memory == MEMORY_UNKNOWN))) |
| 60052 | { |
| 60053 | return 4; |
| 60054 | } |
| 60055 | else if ((cached_type == TYPE_IMUL) && ((cached_mode = get_attr_mode (insn)) == MODE_DI) && (((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) || (cached_memory == MEMORY_BOTH))) |
| 60056 | { |
| 60057 | return 10 /* 0xa */; |
| 60058 | } |
| 60059 | else if ((cached_type == TYPE_IMUL) && (((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) || (cached_memory == MEMORY_BOTH))) |
| 60060 | { |
| 60061 | return 8; |
| 60062 | } |
| 60063 | else if ((cached_type == TYPE_STR) && (((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) || (cached_memory == MEMORY_BOTH) || (cached_memory == MEMORY_STORE))) |
| 60064 | { |
| 60065 | return 6; |
| 60066 | } |
| 60067 | else if (((cached_bdver1_decode = get_attr_bdver1_decode (insn)) == BDVER1_DECODE_DIRECT) && (((cached_unit = get_attr_unit (insn)) == UNIT_INTEGER) || (cached_unit == UNIT_UNKNOWN)) && (((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) || (cached_memory == MEMORY_UNKNOWN))) |
| 60068 | { |
| 60069 | return 1; |
| 60070 | } |
| 60071 | else if ((cached_bdver1_decode == BDVER1_DECODE_VECTOR) && (((cached_unit = get_attr_unit (insn)) == UNIT_INTEGER) || (cached_unit == UNIT_UNKNOWN)) && (((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) || (cached_memory == MEMORY_UNKNOWN))) |
| 60072 | { |
| 60073 | return 2; |
| 60074 | } |
| 60075 | else if ((cached_type == TYPE_IMOV) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 60076 | { |
| 60077 | return 4; |
| 60078 | } |
| 60079 | else if ((cached_bdver1_decode == BDVER1_DECODE_DIRECT) && (((cached_unit = get_attr_unit (insn)) == UNIT_INTEGER) || (cached_unit == UNIT_UNKNOWN)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 60080 | { |
| 60081 | return 5; |
| 60082 | } |
| 60083 | else if ((cached_type == TYPE_IMOV) && ((cached_memory = get_attr_memory (insn)) == MEMORY_STORE)) |
| 60084 | { |
| 60085 | return 5; |
| 60086 | } |
| 60087 | else if ((cached_bdver1_decode == BDVER1_DECODE_DIRECT) && (((cached_unit = get_attr_unit (insn)) == UNIT_INTEGER) || (cached_unit == UNIT_UNKNOWN)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_BOTH)) |
| 60088 | { |
| 60089 | return 4; |
| 60090 | } |
| 60091 | else if ((cached_bdver1_decode == BDVER1_DECODE_DIRECT) && (((cached_unit = get_attr_unit (insn)) == UNIT_INTEGER) || (cached_unit == UNIT_UNKNOWN)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_STORE)) |
| 60092 | { |
| 60093 | return 4; |
| 60094 | } |
| 60095 | else if ((cached_type == TYPE_FMOV) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) && ((cached_mode = get_attr_mode (insn)) == MODE_XF)) |
| 60096 | { |
| 60097 | return 13 /* 0xd */; |
| 60098 | } |
| 60099 | else if ((cached_type == TYPE_FMOV) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 60100 | { |
| 60101 | return 2; |
| 60102 | } |
| 60103 | else if ((cached_type == TYPE_FMOV) && (((cached_memory = get_attr_memory (insn)) == MEMORY_STORE) || (cached_memory == MEMORY_BOTH)) && ((cached_mode = get_attr_mode (insn)) == MODE_XF)) |
| 60104 | { |
| 60105 | return 4; |
| 60106 | } |
| 60107 | else if ((cached_type == TYPE_FMOV) && (((cached_memory = get_attr_memory (insn)) == MEMORY_STORE) || (cached_memory == MEMORY_BOTH))) |
| 60108 | { |
| 60109 | return 2; |
| 60110 | } |
| 60111 | else if ((cached_type == TYPE_FISTP) || (cached_type == TYPE_FISTTP)) |
| 60112 | { |
| 60113 | return 2; |
| 60114 | } |
| 60115 | else if (cached_type == TYPE_FMOV) |
| 60116 | { |
| 60117 | return 2; |
| 60118 | } |
| 60119 | else if ((cached_type == TYPE_FOP) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 60120 | { |
| 60121 | return 10 /* 0xa */; |
| 60122 | } |
| 60123 | else if (cached_type == TYPE_FOP) |
| 60124 | { |
| 60125 | return 6; |
| 60126 | } |
| 60127 | else if ((cached_type == TYPE_FMUL) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 60128 | { |
| 60129 | return 6; |
| 60130 | } |
| 60131 | else if (cached_type == TYPE_FMUL) |
| 60132 | { |
| 60133 | return 6; |
| 60134 | } |
| 60135 | else if (cached_type == TYPE_FSGN) |
| 60136 | { |
| 60137 | return 2; |
| 60138 | } |
| 60139 | else if ((cached_type == TYPE_FDIV) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 60140 | { |
| 60141 | return 42 /* 0x2a */; |
| 60142 | } |
| 60143 | else if (cached_type == TYPE_FDIV) |
| 60144 | { |
| 60145 | return 42 /* 0x2a */; |
| 60146 | } |
| 60147 | else if ((cached_type == TYPE_FPSPC) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 60148 | { |
| 60149 | return 143 /* 0x8f */; |
| 60150 | } |
| 60151 | else if ((cached_type == TYPE_FCMOV) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 60152 | { |
| 60153 | return 17 /* 0x11 */; |
| 60154 | } |
| 60155 | else if (cached_type == TYPE_FCMOV) |
| 60156 | { |
| 60157 | return 15 /* 0xf */; |
| 60158 | } |
| 60159 | else if ((cached_type == TYPE_FCMP) && (cached_bdver1_decode == BDVER1_DECODE_DOUBLE) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 60160 | { |
| 60161 | return 6; |
| 60162 | } |
| 60163 | else if ((cached_bdver1_decode == BDVER1_DECODE_DOUBLE) && (cached_type == TYPE_FCMP)) |
| 60164 | { |
| 60165 | return 2; |
| 60166 | } |
| 60167 | else if ((cached_type == TYPE_FCMP) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 60168 | { |
| 60169 | return 6; |
| 60170 | } |
| 60171 | else if (cached_type == TYPE_FCMP) |
| 60172 | { |
| 60173 | return 2; |
| 60174 | } |
| 60175 | else if (cached_type == TYPE_FXCH) |
| 60176 | { |
| 60177 | return 2; |
| 60178 | } |
| 60179 | else if ((cached_type == TYPE_SSEMOV) && ((cached_prefix = get_attr_prefix (insn)) == PREFIX_VEX) && ((cached_movu = get_attr_movu (insn)) == MOVU_1) && (((cached_mode = get_attr_mode (insn)) == MODE_V4SF) || (cached_mode == MODE_V2DF)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 60180 | { |
| 60181 | return 4; |
| 60182 | } |
| 60183 | else if ((cached_type == TYPE_SSEMOV) && ((cached_movu = get_attr_movu (insn)) == MOVU_1) && (((cached_mode = get_attr_mode (insn)) == MODE_V8SF) || (cached_mode == MODE_V4DF)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 60184 | { |
| 60185 | return 5; |
| 60186 | } |
| 60187 | else if ((cached_type == TYPE_SSEMOV) && ((cached_movu = get_attr_movu (insn)) == MOVU_1) && (((cached_mode = get_attr_mode (insn)) == MODE_V4SF) || (cached_mode == MODE_V2DF)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 60188 | { |
| 60189 | return 4; |
| 60190 | } |
| 60191 | else if ((cached_type == TYPE_SSEMOV) && ((cached_prefix = get_attr_prefix (insn)) == PREFIX_VEX) && (((cached_mode = get_attr_mode (insn)) == MODE_V4SF) || (cached_mode == MODE_V2DF) || (cached_mode == MODE_TI)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 60192 | { |
| 60193 | return 4; |
| 60194 | } |
| 60195 | else if ((cached_type == TYPE_SSEMOV) && (((cached_mode = get_attr_mode (insn)) == MODE_V8SF) || (cached_mode == MODE_V4DF) || (cached_mode == MODE_OI)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 60196 | { |
| 60197 | return 5; |
| 60198 | } |
| 60199 | else if ((cached_type == TYPE_SSEMOV) && (((cached_mode = get_attr_mode (insn)) == MODE_V4SF) || (cached_mode == MODE_V2DF) || (cached_mode == MODE_TI)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 60200 | { |
| 60201 | return 4; |
| 60202 | } |
| 60203 | else if ((cached_type == TYPE_SSEMOV) && ((cached_mode = get_attr_mode (insn)) == MODE_DI) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 60204 | { |
| 60205 | return 4; |
| 60206 | } |
| 60207 | else if ((cached_type == TYPE_SSEMOV) && ((cached_prefix = get_attr_prefix (insn)) == PREFIX_VEX) && ((cached_mode = get_attr_mode (insn)) == MODE_SF) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 60208 | { |
| 60209 | return 4; |
| 60210 | } |
| 60211 | else if ((cached_type == TYPE_SSEMOV) && (((cached_mode = get_attr_mode (insn)) == MODE_SF) || (cached_mode == MODE_DF)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 60212 | { |
| 60213 | return 4; |
| 60214 | } |
| 60215 | else if (((cached_type == TYPE_MMXMOV) || (cached_type == TYPE_SSEMOV)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 60216 | { |
| 60217 | return 4; |
| 60218 | } |
| 60219 | else if ((cached_type == TYPE_SSEMOV) && (((cached_mode = get_attr_mode (insn)) == MODE_V8SF) || (cached_mode == MODE_V4DF) || (cached_mode == MODE_OI)) && (((cached_memory = get_attr_memory (insn)) == MEMORY_STORE) || (cached_memory == MEMORY_BOTH))) |
| 60220 | { |
| 60221 | return 5; |
| 60222 | } |
| 60223 | else if ((cached_type == TYPE_SSEMOV) && (((cached_mode = get_attr_mode (insn)) == MODE_V4SF) || (cached_mode == MODE_V2DF) || (cached_mode == MODE_TI)) && (((cached_memory = get_attr_memory (insn)) == MEMORY_STORE) || (cached_memory == MEMORY_BOTH))) |
| 60224 | { |
| 60225 | return 4; |
| 60226 | } |
| 60227 | else if (((cached_type == TYPE_MMXMOV) || (cached_type == TYPE_SSEMOV)) && (((cached_memory = get_attr_memory (insn)) == MEMORY_STORE) || (cached_memory == MEMORY_BOTH))) |
| 60228 | { |
| 60229 | return 4; |
| 60230 | } |
| 60231 | else if ((cached_type == TYPE_SSEMOV) && (((cached_mode = get_attr_mode (insn)) == MODE_V8SF) || (cached_mode == MODE_V4DF) || (cached_mode == MODE_OI)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 60232 | { |
| 60233 | return 3; |
| 60234 | } |
| 60235 | else if ((cached_type == TYPE_SSEMOV) && (((cached_mode = get_attr_mode (insn)) == MODE_SF) || (cached_mode == MODE_DF)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 60236 | { |
| 60237 | return 2; |
| 60238 | } |
| 60239 | else if (((cached_type == TYPE_MMXMOV) || (cached_type == TYPE_SSEMOV)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 60240 | { |
| 60241 | return 2; |
| 60242 | } |
| 60243 | else if (((cached_type == TYPE_SSELOG) || (cached_type == TYPE_SSELOG1)) && ((cached_mode = get_attr_mode (insn)) == MODE_V8SF) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 60244 | { |
| 60245 | return 7; |
| 60246 | } |
| 60247 | else if (((cached_type == TYPE_SSELOG) || (cached_type == TYPE_SSELOG1)) && ((cached_mode = get_attr_mode (insn)) == MODE_V8SF)) |
| 60248 | { |
| 60249 | return 3; |
| 60250 | } |
| 60251 | else if (((cached_type == TYPE_SSELOG) || (cached_type == TYPE_SSELOG1)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 60252 | { |
| 60253 | return 6; |
| 60254 | } |
| 60255 | else if ((cached_type == TYPE_SSELOG) || (cached_type == TYPE_SSELOG1)) |
| 60256 | { |
| 60257 | return 2; |
| 60258 | } |
| 60259 | else if (((cached_type == TYPE_SSESHUF) || (cached_type == TYPE_SSESHUF1)) && ((cached_mode = get_attr_mode (insn)) == MODE_V8SF) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 60260 | { |
| 60261 | return 7; |
| 60262 | } |
| 60263 | else if (((cached_type == TYPE_SSESHUF) || (cached_type == TYPE_SSESHUF1)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 60264 | { |
| 60265 | return 6; |
| 60266 | } |
| 60267 | else if ((cached_type == TYPE_SSESHUF) && ((cached_mode = get_attr_mode (insn)) == MODE_V8SF)) |
| 60268 | { |
| 60269 | return 3; |
| 60270 | } |
| 60271 | else if ((cached_type == TYPE_SSESHUF) || (cached_type == TYPE_SSESHUF1)) |
| 60272 | { |
| 60273 | return 2; |
| 60274 | } |
| 60275 | else if ((cached_type == TYPE_SSECMP) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 60276 | { |
| 60277 | return 6; |
| 60278 | } |
| 60279 | else if (cached_type == TYPE_SSECMP) |
| 60280 | { |
| 60281 | return 2; |
| 60282 | } |
| 60283 | else if ((cached_type == TYPE_SSECOMI) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 60284 | { |
| 60285 | return 6; |
| 60286 | } |
| 60287 | else if (cached_type == TYPE_SSECOMI) |
| 60288 | { |
| 60289 | return 2; |
| 60290 | } |
| 60291 | else if ((cached_type == TYPE_SSECVT) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) && (((register_operand (operands[0], V4DFmode)) || (register_operand (operands[0], V8SFmode)) || (register_operand (operands[0], V8SImode))) || (nonimmediate_operand (operands[1], V4DFmode)) || (nonimmediate_operand (operands[1], V8SFmode)) || (nonimmediate_operand (operands[1], V8SImode)))) |
| 60292 | { |
| 60293 | return 8; |
| 60294 | } |
| 60295 | else if ((cached_type == TYPE_SSECVT) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) && (((register_operand (operands[0], V4DFmode)) || (register_operand (operands[0], V8SFmode)) || (register_operand (operands[0], V8SImode))) || (nonimmediate_operand (operands[1], V4DFmode)) || (nonimmediate_operand (operands[1], V8SFmode)) || (nonimmediate_operand (operands[1], V8SImode)))) |
| 60296 | { |
| 60297 | return 4; |
| 60298 | } |
| 60299 | else if ((cached_type == TYPE_SSECVT) && (((cached_mode = get_attr_mode (insn)) == MODE_SF) || (cached_mode == MODE_DF)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 60300 | { |
| 60301 | return 8; |
| 60302 | } |
| 60303 | else if ((cached_type == TYPE_SSECVT) && (((cached_mode = get_attr_mode (insn)) == MODE_SF) || (cached_mode == MODE_DF)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 60304 | { |
| 60305 | return 4; |
| 60306 | } |
| 60307 | else if ((cached_type == TYPE_SSEICVT) && (((cached_mode = get_attr_mode (insn)) == MODE_SF) || (cached_mode == MODE_DF)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 60308 | { |
| 60309 | return 8; |
| 60310 | } |
| 60311 | else if ((cached_type == TYPE_SSEICVT) && (((cached_mode = get_attr_mode (insn)) == MODE_SF) || (cached_mode == MODE_DF)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 60312 | { |
| 60313 | return 4; |
| 60314 | } |
| 60315 | else if ((cached_type == TYPE_SSECVT) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) && (register_operand (operands[0], V4SFmode)) && (nonimmediate_operand (operands[1], V2DFmode))) |
| 60316 | { |
| 60317 | return 8; |
| 60318 | } |
| 60319 | else if ((cached_type == TYPE_SSECVT) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) && (register_operand (operands[0], V4SFmode)) && (nonimmediate_operand (operands[1], V2DFmode))) |
| 60320 | { |
| 60321 | return 4; |
| 60322 | } |
| 60323 | else if ((cached_type == TYPE_SSECVT) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) && (register_operand (operands[0], V4SFmode)) && ((nonimmediate_operand (operands[1], V2SImode)) || (nonimmediate_operand (operands[1], V4SImode)))) |
| 60324 | { |
| 60325 | return 8; |
| 60326 | } |
| 60327 | else if ((cached_type == TYPE_SSECVT) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) && (register_operand (operands[0], V4SFmode)) && ((nonimmediate_operand (operands[1], V2SImode)) || (nonimmediate_operand (operands[1], V4SImode)))) |
| 60328 | { |
| 60329 | return 4; |
| 60330 | } |
| 60331 | else if ((cached_type == TYPE_SSECVT) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) && (register_operand (operands[0], V2DFmode)) && (nonimmediate_operand (operands[1], V4SImode))) |
| 60332 | { |
| 60333 | return 8; |
| 60334 | } |
| 60335 | else if ((cached_type == TYPE_SSECVT) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) && (register_operand (operands[0], V2DFmode)) && (nonimmediate_operand (operands[1], V4SImode))) |
| 60336 | { |
| 60337 | return 4; |
| 60338 | } |
| 60339 | else if ((cached_type == TYPE_SSECVT) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) && (register_operand (operands[0], V2DFmode)) && ((nonimmediate_operand (operands[1], V2SImode)) || (nonimmediate_operand (operands[1], V4SFmode)))) |
| 60340 | { |
| 60341 | return 6; |
| 60342 | } |
| 60343 | else if ((cached_type == TYPE_SSECVT) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) && (register_operand (operands[0], V2DFmode)) && ((nonimmediate_operand (operands[1], V2SImode)) || (nonimmediate_operand (operands[1], V4SFmode)))) |
| 60344 | { |
| 60345 | return 2; |
| 60346 | } |
| 60347 | else if ((cached_type == TYPE_SSEICVT) && (((cached_mode = get_attr_mode (insn)) == MODE_SI) || (cached_mode == MODE_DI)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 60348 | { |
| 60349 | return 8; |
| 60350 | } |
| 60351 | else if ((cached_type == TYPE_SSEICVT) && (((cached_mode = get_attr_mode (insn)) == MODE_SI) || (cached_mode == MODE_DI)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 60352 | { |
| 60353 | return 4; |
| 60354 | } |
| 60355 | else if ((cached_type == TYPE_SSECVT) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) && (nonimmediate_operand (operands[1], V2DFmode)) && (register_operand (operands[0], V2SImode))) |
| 60356 | { |
| 60357 | return 8; |
| 60358 | } |
| 60359 | else if ((cached_type == TYPE_SSECVT) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) && (nonimmediate_operand (operands[1], V2DFmode)) && (register_operand (operands[0], V2SImode))) |
| 60360 | { |
| 60361 | return 4; |
| 60362 | } |
| 60363 | else if ((cached_type == TYPE_SSECVT) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) && (nonimmediate_operand (operands[1], V2DFmode)) && (register_operand (operands[0], V4SImode))) |
| 60364 | { |
| 60365 | return 6; |
| 60366 | } |
| 60367 | else if ((cached_type == TYPE_SSECVT) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) && (nonimmediate_operand (operands[1], V2DFmode)) && (register_operand (operands[0], V4SImode))) |
| 60368 | { |
| 60369 | return 2; |
| 60370 | } |
| 60371 | else if ((cached_type == TYPE_SSECVT) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) && (nonimmediate_operand (operands[1], V4SFmode)) && ((register_operand (operands[0], V2SImode)) || (register_operand (operands[0], V4SImode)))) |
| 60372 | { |
| 60373 | return 8; |
| 60374 | } |
| 60375 | else if ((cached_type == TYPE_SSECVT) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) && (nonimmediate_operand (operands[1], V4SFmode)) && ((register_operand (operands[0], V2SImode)) || (register_operand (operands[0], V4SImode)))) |
| 60376 | { |
| 60377 | return 4; |
| 60378 | } |
| 60379 | else if (((cached_type == TYPE_SSEMUL) || (cached_type == TYPE_SSEADD) || (cached_type == TYPE_SSEADD1) || (cached_type == TYPE_SSEMULADD)) && (((cached_mode = get_attr_mode (insn)) == MODE_V8SF) || (cached_mode == MODE_V4DF)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 60380 | { |
| 60381 | return 11 /* 0xb */; |
| 60382 | } |
| 60383 | else if (((cached_type == TYPE_SSEMUL) || (cached_type == TYPE_SSEADD) || (cached_type == TYPE_SSEADD1) || (cached_type == TYPE_SSEMULADD)) && (((cached_mode = get_attr_mode (insn)) == MODE_V8SF) || (cached_mode == MODE_V4DF)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 60384 | { |
| 60385 | return 7; |
| 60386 | } |
| 60387 | else if (((cached_type == TYPE_SSEMUL) || (cached_type == TYPE_SSEADD) || (cached_type == TYPE_SSEADD1) || (cached_type == TYPE_SSEMULADD)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 60388 | { |
| 60389 | return 10 /* 0xa */; |
| 60390 | } |
| 60391 | else if (((cached_type == TYPE_SSEMUL) || (cached_type == TYPE_SSEADD) || (cached_type == TYPE_SSEADD1) || (cached_type == TYPE_SSEMULADD)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 60392 | { |
| 60393 | return 6; |
| 60394 | } |
| 60395 | else if ((cached_type == TYPE_SSEIMUL) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 60396 | { |
| 60397 | return 8; |
| 60398 | } |
| 60399 | else if ((cached_type == TYPE_SSEIMUL) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 60400 | { |
| 60401 | return 4; |
| 60402 | } |
| 60403 | else if ((cached_type == TYPE_SSEIADD) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 60404 | { |
| 60405 | return 6; |
| 60406 | } |
| 60407 | else if ((cached_type == TYPE_SSEIADD) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 60408 | { |
| 60409 | return 2; |
| 60410 | } |
| 60411 | else if ((cached_type == TYPE_SSEDIV) && ((cached_mode = get_attr_mode (insn)) == MODE_V4DF) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 60412 | { |
| 60413 | return 27 /* 0x1b */; |
| 60414 | } |
| 60415 | else if ((cached_type == TYPE_SSEDIV) && ((cached_mode = get_attr_mode (insn)) == MODE_V4DF) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 60416 | { |
| 60417 | return 27 /* 0x1b */; |
| 60418 | } |
| 60419 | else if ((cached_type == TYPE_SSEDIV) && ((cached_mode = get_attr_mode (insn)) == MODE_V8SF) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 60420 | { |
| 60421 | return 27 /* 0x1b */; |
| 60422 | } |
| 60423 | else if ((cached_type == TYPE_SSEDIV) && ((cached_mode = get_attr_mode (insn)) == MODE_V8SF) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 60424 | { |
| 60425 | return 24 /* 0x18 */; |
| 60426 | } |
| 60427 | else if ((cached_type == TYPE_SSEDIV) && (((cached_mode = get_attr_mode (insn)) == MODE_DF) || (cached_mode == MODE_V2DF)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 60428 | { |
| 60429 | return 27 /* 0x1b */; |
| 60430 | } |
| 60431 | else if ((cached_type == TYPE_SSEDIV) && (((cached_mode = get_attr_mode (insn)) == MODE_DF) || (cached_mode == MODE_V2DF)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 60432 | { |
| 60433 | return 27 /* 0x1b */; |
| 60434 | } |
| 60435 | else if ((cached_type == TYPE_SSEDIV) && (((cached_mode = get_attr_mode (insn)) == MODE_SF) || (cached_mode == MODE_V4SF)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 60436 | { |
| 60437 | return 27 /* 0x1b */; |
| 60438 | } |
| 60439 | else if ((cached_type == TYPE_SSEDIV) && (((cached_mode = get_attr_mode (insn)) == MODE_SF) || (cached_mode == MODE_V4SF)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 60440 | { |
| 60441 | return 24 /* 0x18 */; |
| 60442 | } |
| 60443 | else if ((cached_type == TYPE_SSEINS) && ((cached_mode = get_attr_mode (insn)) == MODE_TI)) |
| 60444 | { |
| 60445 | return 3; |
| 60446 | } |
| 60447 | else |
| 60448 | { |
| 60449 | return 0; |
| 60450 | } |
| 60451 | |
| 60452 | } |
| 60453 | } |
| 60454 | |
| 60455 | int |
| 60456 | insn_default_latency_bdver4 (rtx_insn *insn ATTRIBUTE_UNUSED) |
| 60457 | { |
| 60458 | enum attr_memory cached_memory ATTRIBUTE_UNUSED; |
| 60459 | enum attr_type cached_type ATTRIBUTE_UNUSED; |
| 60460 | enum attr_mode cached_mode ATTRIBUTE_UNUSED; |
| 60461 | enum attr_bdver1_decode cached_bdver1_decode ATTRIBUTE_UNUSED; |
| 60462 | enum attr_unit cached_unit ATTRIBUTE_UNUSED; |
| 60463 | enum attr_prefix cached_prefix ATTRIBUTE_UNUSED; |
| 60464 | enum attr_movu cached_movu ATTRIBUTE_UNUSED; |
| 60465 | |
| 60466 | switch (recog_memoized (insn)) |
| 60467 | { |
| 60468 | case 3904: /* sse4_2_pcmpistr_cconly */ |
| 60469 | case 3900: /* sse4_2_pcmpestr_cconly */ |
| 60470 | extract_constrain_insn_cached (insn); |
| 60471 | if (!((1 << which_alternative) & 0x5)) |
| 60472 | { |
| 60473 | return 6; |
| 60474 | } |
| 60475 | else |
| 60476 | { |
| 60477 | return 2; |
| 60478 | } |
| 60479 | |
| 60480 | case 3903: /* sse4_2_pcmpistrm */ |
| 60481 | case 3902: /* sse4_2_pcmpistri */ |
| 60482 | case 3901: /* sse4_2_pcmpistr */ |
| 60483 | case 3899: /* sse4_2_pcmpestrm */ |
| 60484 | case 3898: /* sse4_2_pcmpestri */ |
| 60485 | case 3897: /* sse4_2_pcmpestr */ |
| 60486 | extract_constrain_insn_cached (insn); |
| 60487 | if (which_alternative != 0) |
| 60488 | { |
| 60489 | return 6; |
| 60490 | } |
| 60491 | else |
| 60492 | { |
| 60493 | return 2; |
| 60494 | } |
| 60495 | |
| 60496 | case 3634: /* *vec_extractv4si */ |
| 60497 | extract_constrain_insn_cached (insn); |
| 60498 | if ((((1 << which_alternative) & 0x3)) && (get_attr_memory (insn) == MEMORY_LOAD)) |
| 60499 | { |
| 60500 | return 6; |
| 60501 | } |
| 60502 | else if (((1 << which_alternative) & 0x3)) |
| 60503 | { |
| 60504 | return 2; |
| 60505 | } |
| 60506 | else |
| 60507 | { |
| 60508 | return 0; |
| 60509 | } |
| 60510 | |
| 60511 | case 3706: /* ssse3_pmaddubsw */ |
| 60512 | case 3705: /* ssse3_pmaddubsw128 */ |
| 60513 | case 3702: /* avx512bw_pmaddubsw512v32hi_mask */ |
| 60514 | case 3701: /* avx512bw_pmaddubsw512v32hi */ |
| 60515 | case 3700: /* avx512bw_pmaddubsw512v16hi_mask */ |
| 60516 | case 3699: /* avx512bw_pmaddubsw512v16hi */ |
| 60517 | case 3698: /* avx512bw_pmaddubsw512v8hi_mask */ |
| 60518 | case 3697: /* avx512bw_pmaddubsw512v8hi */ |
| 60519 | case 3696: /* avx2_pmaddubsw256 */ |
| 60520 | case 3695: /* ssse3_phsubdv2si3 */ |
| 60521 | case 3694: /* ssse3_phadddv2si3 */ |
| 60522 | case 3693: /* ssse3_phsubdv4si3 */ |
| 60523 | case 3692: /* ssse3_phadddv4si3 */ |
| 60524 | case 3691: /* avx2_phsubdv8si3 */ |
| 60525 | case 3690: /* avx2_phadddv8si3 */ |
| 60526 | case 3689: /* ssse3_phsubswv4hi3 */ |
| 60527 | case 3688: /* ssse3_phsubwv4hi3 */ |
| 60528 | case 3687: /* ssse3_phaddswv4hi3 */ |
| 60529 | case 3686: /* ssse3_phaddwv4hi3 */ |
| 60530 | case 3685: /* ssse3_phsubswv8hi3 */ |
| 60531 | case 3684: /* ssse3_phsubwv8hi3 */ |
| 60532 | case 3683: /* ssse3_phaddswv8hi3 */ |
| 60533 | case 3682: /* ssse3_phaddwv8hi3 */ |
| 60534 | case 3681: /* avx2_phsubswv16hi3 */ |
| 60535 | case 3680: /* avx2_phsubwv16hi3 */ |
| 60536 | case 3679: /* avx2_phaddswv16hi3 */ |
| 60537 | case 3678: /* avx2_phaddwv16hi3 */ |
| 60538 | case 3657: /* sse2_psadbw */ |
| 60539 | case 3656: /* avx2_psadbw */ |
| 60540 | case 3655: /* avx512f_psadbw */ |
| 60541 | case 3654: /* *sse2_uavgv8hi3_mask */ |
| 60542 | case 3653: /* *sse2_uavgv8hi3 */ |
| 60543 | case 3652: /* *avx2_uavgv16hi3_mask */ |
| 60544 | case 3651: /* *avx2_uavgv16hi3 */ |
| 60545 | case 3650: /* *avx512bw_uavgv32hi3_mask */ |
| 60546 | case 3649: /* *avx512bw_uavgv32hi3 */ |
| 60547 | case 3648: /* *sse2_uavgv16qi3_mask */ |
| 60548 | case 3647: /* *sse2_uavgv16qi3 */ |
| 60549 | case 3646: /* *avx2_uavgv32qi3_mask */ |
| 60550 | case 3645: /* *avx2_uavgv32qi3 */ |
| 60551 | case 3644: /* *avx512bw_uavgv64qi3_mask */ |
| 60552 | case 3643: /* *avx512bw_uavgv64qi3 */ |
| 60553 | case 3319: /* *uminv16qi3 */ |
| 60554 | case 3318: /* *umaxv16qi3 */ |
| 60555 | case 3317: /* *sse4_1_uminv4si3_mask */ |
| 60556 | case 3316: /* *sse4_1_uminv4si3 */ |
| 60557 | case 3315: /* *sse4_1_umaxv4si3_mask */ |
| 60558 | case 3314: /* *sse4_1_umaxv4si3 */ |
| 60559 | case 3313: /* *sse4_1_uminv8hi3_mask */ |
| 60560 | case 3312: /* *sse4_1_uminv8hi3 */ |
| 60561 | case 3311: /* *sse4_1_umaxv8hi3_mask */ |
| 60562 | case 3310: /* *sse4_1_umaxv8hi3 */ |
| 60563 | case 3309: /* *sminv8hi3 */ |
| 60564 | case 3308: /* *smaxv8hi3 */ |
| 60565 | case 3307: /* *sse4_1_sminv4si3_mask */ |
| 60566 | case 3306: /* *sse4_1_sminv4si3 */ |
| 60567 | case 3305: /* *sse4_1_smaxv4si3_mask */ |
| 60568 | case 3304: /* *sse4_1_smaxv4si3 */ |
| 60569 | case 3303: /* *sse4_1_sminv16qi3_mask */ |
| 60570 | case 3302: /* *sse4_1_sminv16qi3 */ |
| 60571 | case 3301: /* *sse4_1_smaxv16qi3_mask */ |
| 60572 | case 3300: /* *sse4_1_smaxv16qi3 */ |
| 60573 | case 3299: /* uminv8hi3_mask */ |
| 60574 | case 3298: /* *uminv8hi3 */ |
| 60575 | case 3297: /* umaxv8hi3_mask */ |
| 60576 | case 3296: /* *umaxv8hi3 */ |
| 60577 | case 3295: /* sminv8hi3_mask */ |
| 60578 | case 3294: /* *sminv8hi3 */ |
| 60579 | case 3293: /* smaxv8hi3_mask */ |
| 60580 | case 3292: /* *smaxv8hi3 */ |
| 60581 | case 3291: /* uminv16hi3_mask */ |
| 60582 | case 3290: /* *uminv16hi3 */ |
| 60583 | case 3289: /* umaxv16hi3_mask */ |
| 60584 | case 3288: /* *umaxv16hi3 */ |
| 60585 | case 3287: /* sminv16hi3_mask */ |
| 60586 | case 3286: /* *sminv16hi3 */ |
| 60587 | case 3285: /* smaxv16hi3_mask */ |
| 60588 | case 3284: /* *smaxv16hi3 */ |
| 60589 | case 3283: /* uminv32hi3_mask */ |
| 60590 | case 3282: /* *uminv32hi3 */ |
| 60591 | case 3281: /* umaxv32hi3_mask */ |
| 60592 | case 3280: /* *umaxv32hi3 */ |
| 60593 | case 3279: /* sminv32hi3_mask */ |
| 60594 | case 3278: /* *sminv32hi3 */ |
| 60595 | case 3277: /* smaxv32hi3_mask */ |
| 60596 | case 3276: /* *smaxv32hi3 */ |
| 60597 | case 3275: /* uminv32qi3_mask */ |
| 60598 | case 3274: /* *uminv32qi3 */ |
| 60599 | case 3273: /* umaxv32qi3_mask */ |
| 60600 | case 3272: /* *umaxv32qi3 */ |
| 60601 | case 3271: /* sminv32qi3_mask */ |
| 60602 | case 3270: /* *sminv32qi3 */ |
| 60603 | case 3269: /* smaxv32qi3_mask */ |
| 60604 | case 3268: /* *smaxv32qi3 */ |
| 60605 | case 3267: /* uminv16qi3_mask */ |
| 60606 | case 3266: /* *uminv16qi3 */ |
| 60607 | case 3265: /* umaxv16qi3_mask */ |
| 60608 | case 3264: /* *umaxv16qi3 */ |
| 60609 | case 3263: /* sminv16qi3_mask */ |
| 60610 | case 3262: /* *sminv16qi3 */ |
| 60611 | case 3261: /* smaxv16qi3_mask */ |
| 60612 | case 3260: /* *smaxv16qi3 */ |
| 60613 | case 3259: /* uminv64qi3_mask */ |
| 60614 | case 3258: /* *uminv64qi3 */ |
| 60615 | case 3257: /* umaxv64qi3_mask */ |
| 60616 | case 3256: /* *umaxv64qi3 */ |
| 60617 | case 3255: /* sminv64qi3_mask */ |
| 60618 | case 3254: /* *sminv64qi3 */ |
| 60619 | case 3253: /* smaxv64qi3_mask */ |
| 60620 | case 3252: /* *smaxv64qi3 */ |
| 60621 | case 3251: /* *avx512f_uminv2di3_mask */ |
| 60622 | case 3250: /* *avx512f_uminv2di3 */ |
| 60623 | case 3249: /* *avx512f_umaxv2di3_mask */ |
| 60624 | case 3248: /* *avx512f_umaxv2di3 */ |
| 60625 | case 3247: /* *avx512f_sminv2di3_mask */ |
| 60626 | case 3246: /* *avx512f_sminv2di3 */ |
| 60627 | case 3245: /* *avx512f_smaxv2di3_mask */ |
| 60628 | case 3244: /* *avx512f_smaxv2di3 */ |
| 60629 | case 3243: /* *avx512f_uminv4di3_mask */ |
| 60630 | case 3242: /* *avx512f_uminv4di3 */ |
| 60631 | case 3241: /* *avx512f_umaxv4di3_mask */ |
| 60632 | case 3240: /* *avx512f_umaxv4di3 */ |
| 60633 | case 3239: /* *avx512f_sminv4di3_mask */ |
| 60634 | case 3238: /* *avx512f_sminv4di3 */ |
| 60635 | case 3237: /* *avx512f_smaxv4di3_mask */ |
| 60636 | case 3236: /* *avx512f_smaxv4di3 */ |
| 60637 | case 3235: /* *avx512f_uminv8di3_mask */ |
| 60638 | case 3234: /* *avx512f_uminv8di3 */ |
| 60639 | case 3233: /* *avx512f_umaxv8di3_mask */ |
| 60640 | case 3232: /* *avx512f_umaxv8di3 */ |
| 60641 | case 3231: /* *avx512f_sminv8di3_mask */ |
| 60642 | case 3230: /* *avx512f_sminv8di3 */ |
| 60643 | case 3229: /* *avx512f_smaxv8di3_mask */ |
| 60644 | case 3228: /* *avx512f_smaxv8di3 */ |
| 60645 | case 3227: /* *avx512f_uminv4si3_mask */ |
| 60646 | case 3226: /* *avx512f_uminv4si3 */ |
| 60647 | case 3225: /* *avx512f_umaxv4si3_mask */ |
| 60648 | case 3224: /* *avx512f_umaxv4si3 */ |
| 60649 | case 3223: /* *avx512f_sminv4si3_mask */ |
| 60650 | case 3222: /* *avx512f_sminv4si3 */ |
| 60651 | case 3221: /* *avx512f_smaxv4si3_mask */ |
| 60652 | case 3220: /* *avx512f_smaxv4si3 */ |
| 60653 | case 3219: /* *avx512f_uminv8si3_mask */ |
| 60654 | case 3218: /* *avx512f_uminv8si3 */ |
| 60655 | case 3217: /* *avx512f_umaxv8si3_mask */ |
| 60656 | case 3216: /* *avx512f_umaxv8si3 */ |
| 60657 | case 3215: /* *avx512f_sminv8si3_mask */ |
| 60658 | case 3214: /* *avx512f_sminv8si3 */ |
| 60659 | case 3213: /* *avx512f_smaxv8si3_mask */ |
| 60660 | case 3212: /* *avx512f_smaxv8si3 */ |
| 60661 | case 3211: /* *avx512f_uminv16si3_mask */ |
| 60662 | case 3210: /* *avx512f_uminv16si3 */ |
| 60663 | case 3209: /* *avx512f_umaxv16si3_mask */ |
| 60664 | case 3208: /* *avx512f_umaxv16si3 */ |
| 60665 | case 3207: /* *avx512f_sminv16si3_mask */ |
| 60666 | case 3206: /* *avx512f_sminv16si3 */ |
| 60667 | case 3205: /* *avx512f_smaxv16si3_mask */ |
| 60668 | case 3204: /* *avx512f_smaxv16si3 */ |
| 60669 | case 3203: /* *avx2_uminv8si3 */ |
| 60670 | case 3202: /* *avx2_umaxv8si3 */ |
| 60671 | case 3201: /* *avx2_sminv8si3 */ |
| 60672 | case 3200: /* *avx2_smaxv8si3 */ |
| 60673 | case 3199: /* *avx2_uminv16hi3 */ |
| 60674 | case 3198: /* *avx2_umaxv16hi3 */ |
| 60675 | case 3197: /* *avx2_sminv16hi3 */ |
| 60676 | case 3196: /* *avx2_smaxv16hi3 */ |
| 60677 | case 3195: /* *avx2_uminv32qi3 */ |
| 60678 | case 3194: /* *avx2_umaxv32qi3 */ |
| 60679 | case 3193: /* *avx2_sminv32qi3 */ |
| 60680 | case 3192: /* *avx2_smaxv32qi3 */ |
| 60681 | case 3067: /* *sse2_pmaddwd */ |
| 60682 | case 3066: /* *avx2_pmaddwd */ |
| 60683 | case 3065: /* avx512bw_pmaddwd512v8hi_mask */ |
| 60684 | case 3064: /* avx512bw_pmaddwd512v8hi */ |
| 60685 | case 3063: /* avx512bw_pmaddwd512v16hi_mask */ |
| 60686 | case 3062: /* avx512bw_pmaddwd512v16hi */ |
| 60687 | case 3061: /* avx512bw_pmaddwd512v32hi_mask */ |
| 60688 | case 3060: /* avx512bw_pmaddwd512v32hi */ |
| 60689 | case 3029: /* *sse2_ussubv8hi3_mask */ |
| 60690 | case 3028: /* *sse2_ussubv8hi3 */ |
| 60691 | case 3027: /* *sse2_sssubv8hi3_mask */ |
| 60692 | case 3026: /* *sse2_sssubv8hi3 */ |
| 60693 | case 3025: /* *sse2_usaddv8hi3_mask */ |
| 60694 | case 3024: /* *sse2_usaddv8hi3 */ |
| 60695 | case 3023: /* *sse2_ssaddv8hi3_mask */ |
| 60696 | case 3022: /* *sse2_ssaddv8hi3 */ |
| 60697 | case 3021: /* *avx2_ussubv16hi3_mask */ |
| 60698 | case 3020: /* *avx2_ussubv16hi3 */ |
| 60699 | case 3019: /* *avx2_sssubv16hi3_mask */ |
| 60700 | case 3018: /* *avx2_sssubv16hi3 */ |
| 60701 | case 3017: /* *avx2_usaddv16hi3_mask */ |
| 60702 | case 3016: /* *avx2_usaddv16hi3 */ |
| 60703 | case 3015: /* *avx2_ssaddv16hi3_mask */ |
| 60704 | case 3014: /* *avx2_ssaddv16hi3 */ |
| 60705 | case 3013: /* *avx512bw_ussubv32hi3_mask */ |
| 60706 | case 3012: /* *avx512bw_ussubv32hi3 */ |
| 60707 | case 3011: /* *avx512bw_sssubv32hi3_mask */ |
| 60708 | case 3010: /* *avx512bw_sssubv32hi3 */ |
| 60709 | case 3009: /* *avx512bw_usaddv32hi3_mask */ |
| 60710 | case 3008: /* *avx512bw_usaddv32hi3 */ |
| 60711 | case 3007: /* *avx512bw_ssaddv32hi3_mask */ |
| 60712 | case 3006: /* *avx512bw_ssaddv32hi3 */ |
| 60713 | case 3005: /* *sse2_ussubv16qi3_mask */ |
| 60714 | case 3004: /* *sse2_ussubv16qi3 */ |
| 60715 | case 3003: /* *sse2_sssubv16qi3_mask */ |
| 60716 | case 3002: /* *sse2_sssubv16qi3 */ |
| 60717 | case 3001: /* *sse2_usaddv16qi3_mask */ |
| 60718 | case 3000: /* *sse2_usaddv16qi3 */ |
| 60719 | case 2999: /* *sse2_ssaddv16qi3_mask */ |
| 60720 | case 2998: /* *sse2_ssaddv16qi3 */ |
| 60721 | case 2997: /* *avx2_ussubv32qi3_mask */ |
| 60722 | case 2996: /* *avx2_ussubv32qi3 */ |
| 60723 | case 2995: /* *avx2_sssubv32qi3_mask */ |
| 60724 | case 2994: /* *avx2_sssubv32qi3 */ |
| 60725 | case 2993: /* *avx2_usaddv32qi3_mask */ |
| 60726 | case 2992: /* *avx2_usaddv32qi3 */ |
| 60727 | case 2991: /* *avx2_ssaddv32qi3_mask */ |
| 60728 | case 2990: /* *avx2_ssaddv32qi3 */ |
| 60729 | case 2989: /* *avx512bw_ussubv64qi3_mask */ |
| 60730 | case 2988: /* *avx512bw_ussubv64qi3 */ |
| 60731 | case 2987: /* *avx512bw_sssubv64qi3_mask */ |
| 60732 | case 2986: /* *avx512bw_sssubv64qi3 */ |
| 60733 | case 2985: /* *avx512bw_usaddv64qi3_mask */ |
| 60734 | case 2984: /* *avx512bw_usaddv64qi3 */ |
| 60735 | case 2983: /* *avx512bw_ssaddv64qi3_mask */ |
| 60736 | case 2982: /* *avx512bw_ssaddv64qi3 */ |
| 60737 | case 2981: /* *subv8hi3_mask */ |
| 60738 | case 2980: /* *addv8hi3_mask */ |
| 60739 | case 2979: /* *subv16hi3_mask */ |
| 60740 | case 2978: /* *addv16hi3_mask */ |
| 60741 | case 2977: /* *subv32hi3_mask */ |
| 60742 | case 2976: /* *addv32hi3_mask */ |
| 60743 | case 2975: /* *subv32qi3_mask */ |
| 60744 | case 2974: /* *addv32qi3_mask */ |
| 60745 | case 2973: /* *subv16qi3_mask */ |
| 60746 | case 2972: /* *addv16qi3_mask */ |
| 60747 | case 2971: /* *subv64qi3_mask */ |
| 60748 | case 2970: /* *addv64qi3_mask */ |
| 60749 | case 2969: /* *subv2di3_mask */ |
| 60750 | case 2968: /* *addv2di3_mask */ |
| 60751 | case 2967: /* *subv4di3_mask */ |
| 60752 | case 2966: /* *addv4di3_mask */ |
| 60753 | case 2965: /* *subv8di3_mask */ |
| 60754 | case 2964: /* *addv8di3_mask */ |
| 60755 | case 2963: /* *subv4si3_mask */ |
| 60756 | case 2962: /* *addv4si3_mask */ |
| 60757 | case 2961: /* *subv8si3_mask */ |
| 60758 | case 2960: /* *addv8si3_mask */ |
| 60759 | case 2959: /* *subv16si3_mask */ |
| 60760 | case 2958: /* *addv16si3_mask */ |
| 60761 | case 2957: /* *subv2di3 */ |
| 60762 | case 2956: /* *addv2di3 */ |
| 60763 | case 2955: /* *subv4di3 */ |
| 60764 | case 2954: /* *addv4di3 */ |
| 60765 | case 2953: /* *subv8di3 */ |
| 60766 | case 2952: /* *addv8di3 */ |
| 60767 | case 2951: /* *subv4si3 */ |
| 60768 | case 2950: /* *addv4si3 */ |
| 60769 | case 2949: /* *subv8si3 */ |
| 60770 | case 2948: /* *addv8si3 */ |
| 60771 | case 2947: /* *subv16si3 */ |
| 60772 | case 2946: /* *addv16si3 */ |
| 60773 | case 2945: /* *subv8hi3 */ |
| 60774 | case 2944: /* *addv8hi3 */ |
| 60775 | case 2943: /* *subv16hi3 */ |
| 60776 | case 2942: /* *addv16hi3 */ |
| 60777 | case 2941: /* *subv32hi3 */ |
| 60778 | case 2940: /* *addv32hi3 */ |
| 60779 | case 2939: /* *subv16qi3 */ |
| 60780 | case 2938: /* *addv16qi3 */ |
| 60781 | case 2937: /* *subv32qi3 */ |
| 60782 | case 2936: /* *addv32qi3 */ |
| 60783 | case 2935: /* *subv64qi3 */ |
| 60784 | case 2934: /* *addv64qi3 */ |
| 60785 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) |
| 60786 | { |
| 60787 | return 6; |
| 60788 | } |
| 60789 | else if (cached_memory == MEMORY_NONE) |
| 60790 | { |
| 60791 | return 2; |
| 60792 | } |
| 60793 | else |
| 60794 | { |
| 60795 | return 0; |
| 60796 | } |
| 60797 | |
| 60798 | case 2445: /* avx_shufps256_1_mask */ |
| 60799 | case 2444: /* avx_shufps256_1 */ |
| 60800 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) |
| 60801 | { |
| 60802 | return 7; |
| 60803 | } |
| 60804 | else |
| 60805 | { |
| 60806 | return 3; |
| 60807 | } |
| 60808 | |
| 60809 | case 4412: /* vec_set_hi_v8sf_mask */ |
| 60810 | case 4411: /* vec_set_hi_v8sf */ |
| 60811 | case 4408: /* vec_set_lo_v8sf_mask */ |
| 60812 | case 4407: /* vec_set_lo_v8sf */ |
| 60813 | case 4389: /* *avx_vperm2f128v8sf_nozero */ |
| 60814 | case 4386: /* *avx_vperm2f128v8sf_full */ |
| 60815 | case 4372: /* avx512vl_vpermt2varv8sf3_mask */ |
| 60816 | case 4342: /* avx512vl_vpermt2varv8sf3_maskz_1 */ |
| 60817 | case 4341: /* avx512vl_vpermt2varv8sf3 */ |
| 60818 | case 4318: /* avx512vl_vpermi2varv8sf3_mask */ |
| 60819 | case 4288: /* avx512vl_vpermi2varv8sf3_maskz_1 */ |
| 60820 | case 4287: /* avx512vl_vpermi2varv8sf3 */ |
| 60821 | case 4268: /* avx_vpermilvarv8sf3_mask */ |
| 60822 | case 4267: /* avx_vpermilvarv8sf3 */ |
| 60823 | case 4256: /* *avx_vpermilpv8sf_mask */ |
| 60824 | case 4255: /* *avx_vpermilpv8sf */ |
| 60825 | case 4076: /* avx2_permvarv8sf_mask */ |
| 60826 | case 4075: /* avx2_permvarv8sf */ |
| 60827 | case 3597: /* avx512vl_shuf_f32x4_1_mask */ |
| 60828 | case 3596: /* avx512vl_shuf_f32x4_1 */ |
| 60829 | case 2429: /* avx_unpcklps256_mask */ |
| 60830 | case 2428: /* avx_unpcklps256 */ |
| 60831 | case 2423: /* avx_unpckhps256_mask */ |
| 60832 | case 2422: /* avx_unpckhps256 */ |
| 60833 | if (get_attr_memory (insn) == MEMORY_LOAD) |
| 60834 | { |
| 60835 | return 7; |
| 60836 | } |
| 60837 | else |
| 60838 | { |
| 60839 | return 3; |
| 60840 | } |
| 60841 | |
| 60842 | case 1464: /* sse2_divv2df3_mask */ |
| 60843 | case 1463: /* sse2_divv2df3 */ |
| 60844 | case 1462: /* avx_divv4df3_mask */ |
| 60845 | case 1461: /* avx_divv4df3 */ |
| 60846 | case 1448: /* sse2_vmdivv2df3_round */ |
| 60847 | case 1447: /* sse2_vmdivv2df3 */ |
| 60848 | if (((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) || (cached_memory == MEMORY_NONE)) |
| 60849 | { |
| 60850 | return 27 /* 0x1b */; |
| 60851 | } |
| 60852 | else |
| 60853 | { |
| 60854 | return 0; |
| 60855 | } |
| 60856 | |
| 60857 | case 1456: /* sse_divv4sf3_mask */ |
| 60858 | case 1455: /* sse_divv4sf3 */ |
| 60859 | case 1454: /* avx_divv8sf3_mask */ |
| 60860 | case 1453: /* avx_divv8sf3 */ |
| 60861 | case 1444: /* sse_vmdivv4sf3_round */ |
| 60862 | case 1443: /* sse_vmdivv4sf3 */ |
| 60863 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) |
| 60864 | { |
| 60865 | return 27 /* 0x1b */; |
| 60866 | } |
| 60867 | else if (cached_memory == MEMORY_NONE) |
| 60868 | { |
| 60869 | return 24 /* 0x18 */; |
| 60870 | } |
| 60871 | else |
| 60872 | { |
| 60873 | return 0; |
| 60874 | } |
| 60875 | |
| 60876 | case 4766: /* avx512vl_expandv4df_mask */ |
| 60877 | case 4765: /* avx512vl_expandv4di_mask */ |
| 60878 | case 4764: /* avx512vl_expandv8sf_mask */ |
| 60879 | case 4763: /* avx512vl_expandv8si_mask */ |
| 60880 | case 2756: /* avx512f_us_truncatev8div8si2_mask */ |
| 60881 | case 2755: /* avx512f_truncatev8div8si2_mask */ |
| 60882 | case 2754: /* avx512f_ss_truncatev8div8si2_mask */ |
| 60883 | case 2753: /* avx512f_us_truncatev16siv16hi2_mask */ |
| 60884 | case 2752: /* avx512f_truncatev16siv16hi2_mask */ |
| 60885 | case 2751: /* avx512f_ss_truncatev16siv16hi2_mask */ |
| 60886 | case 2744: /* *avx512f_us_truncatev8div8si2 */ |
| 60887 | case 2743: /* *avx512f_truncatev8div8si2 */ |
| 60888 | case 2742: /* *avx512f_ss_truncatev8div8si2 */ |
| 60889 | case 2741: /* *avx512f_us_truncatev16siv16hi2 */ |
| 60890 | case 2740: /* *avx512f_truncatev16siv16hi2 */ |
| 60891 | case 2739: /* *avx512f_ss_truncatev16siv16hi2 */ |
| 60892 | case 1255: /* avx512vl_loadv16hi_mask */ |
| 60893 | case 1253: /* avx512vl_loadv32qi_mask */ |
| 60894 | case 1249: /* avx512vl_loadv4df_mask */ |
| 60895 | case 1246: /* avx512vl_loadv8sf_mask */ |
| 60896 | case 1243: /* avx512vl_loadv4di_mask */ |
| 60897 | case 1240: /* avx512vl_loadv8si_mask */ |
| 60898 | extract_constrain_insn_cached (insn); |
| 60899 | if (which_alternative != 0) |
| 60900 | { |
| 60901 | return 5; |
| 60902 | } |
| 60903 | else |
| 60904 | { |
| 60905 | return 3; |
| 60906 | } |
| 60907 | |
| 60908 | case 4770: /* avx512vl_expandv2df_mask */ |
| 60909 | case 4769: /* avx512vl_expandv2di_mask */ |
| 60910 | case 4768: /* avx512vl_expandv4sf_mask */ |
| 60911 | case 4767: /* avx512vl_expandv4si_mask */ |
| 60912 | case 4762: /* avx512f_expandv8df_mask */ |
| 60913 | case 4761: /* avx512f_expandv8di_mask */ |
| 60914 | case 4760: /* avx512f_expandv16sf_mask */ |
| 60915 | case 4759: /* avx512f_expandv16si_mask */ |
| 60916 | case 2783: /* avx512vl_us_truncatev16hiv16qi2_mask */ |
| 60917 | case 2782: /* avx512vl_truncatev16hiv16qi2_mask */ |
| 60918 | case 2781: /* avx512vl_ss_truncatev16hiv16qi2_mask */ |
| 60919 | case 2780: /* avx512vl_us_truncatev8siv8hi2_mask */ |
| 60920 | case 2779: /* avx512vl_truncatev8siv8hi2_mask */ |
| 60921 | case 2778: /* avx512vl_ss_truncatev8siv8hi2_mask */ |
| 60922 | case 2777: /* avx512vl_us_truncatev4div4si2_mask */ |
| 60923 | case 2776: /* avx512vl_truncatev4div4si2_mask */ |
| 60924 | case 2775: /* avx512vl_ss_truncatev4div4si2_mask */ |
| 60925 | case 2774: /* *avx512vl_us_truncatev16hiv16qi2 */ |
| 60926 | case 2773: /* *avx512vl_truncatev16hiv16qi2 */ |
| 60927 | case 2772: /* *avx512vl_ss_truncatev16hiv16qi2 */ |
| 60928 | case 2771: /* *avx512vl_us_truncatev8siv8hi2 */ |
| 60929 | case 2770: /* *avx512vl_truncatev8siv8hi2 */ |
| 60930 | case 2769: /* *avx512vl_ss_truncatev8siv8hi2 */ |
| 60931 | case 2768: /* *avx512vl_us_truncatev4div4si2 */ |
| 60932 | case 2767: /* *avx512vl_truncatev4div4si2 */ |
| 60933 | case 2766: /* *avx512vl_ss_truncatev4div4si2 */ |
| 60934 | case 2765: /* avx512bw_us_truncatev32hiv32qi2_mask */ |
| 60935 | case 2764: /* avx512bw_truncatev32hiv32qi2_mask */ |
| 60936 | case 2763: /* avx512bw_ss_truncatev32hiv32qi2_mask */ |
| 60937 | case 2762: /* avx512bw_us_truncatev32hiv32qi2 */ |
| 60938 | case 2761: /* avx512bw_truncatev32hiv32qi2 */ |
| 60939 | case 2760: /* avx512bw_ss_truncatev32hiv32qi2 */ |
| 60940 | case 2759: /* avx512f_us_truncatev8div8hi2_mask */ |
| 60941 | case 2758: /* avx512f_truncatev8div8hi2_mask */ |
| 60942 | case 2757: /* avx512f_ss_truncatev8div8hi2_mask */ |
| 60943 | case 2750: /* avx512f_us_truncatev16siv16qi2_mask */ |
| 60944 | case 2749: /* avx512f_truncatev16siv16qi2_mask */ |
| 60945 | case 2748: /* avx512f_ss_truncatev16siv16qi2_mask */ |
| 60946 | case 2747: /* *avx512f_us_truncatev8div8hi2 */ |
| 60947 | case 2746: /* *avx512f_truncatev8div8hi2 */ |
| 60948 | case 2745: /* *avx512f_ss_truncatev8div8hi2 */ |
| 60949 | case 2738: /* *avx512f_us_truncatev16siv16qi2 */ |
| 60950 | case 2737: /* *avx512f_truncatev16siv16qi2 */ |
| 60951 | case 2736: /* *avx512f_ss_truncatev16siv16qi2 */ |
| 60952 | case 1256: /* avx512vl_loadv8hi_mask */ |
| 60953 | case 1254: /* avx512bw_loadv32hi_mask */ |
| 60954 | case 1252: /* avx512vl_loadv16qi_mask */ |
| 60955 | case 1251: /* avx512bw_loadv64qi_mask */ |
| 60956 | case 1250: /* avx512vl_loadv2df_mask */ |
| 60957 | case 1248: /* avx512f_loadv8df_mask */ |
| 60958 | case 1247: /* avx512vl_loadv4sf_mask */ |
| 60959 | case 1245: /* avx512f_loadv16sf_mask */ |
| 60960 | case 1244: /* avx512vl_loadv2di_mask */ |
| 60961 | case 1242: /* avx512f_loadv8di_mask */ |
| 60962 | case 1241: /* avx512vl_loadv4si_mask */ |
| 60963 | case 1239: /* avx512f_loadv16si_mask */ |
| 60964 | extract_constrain_insn_cached (insn); |
| 60965 | if (which_alternative != 0) |
| 60966 | { |
| 60967 | return 4; |
| 60968 | } |
| 60969 | else |
| 60970 | { |
| 60971 | return 2; |
| 60972 | } |
| 60973 | |
| 60974 | case 1051: /* fnstsw */ |
| 60975 | extract_constrain_insn_cached (insn); |
| 60976 | if (which_alternative == 0) |
| 60977 | { |
| 60978 | return 1; |
| 60979 | } |
| 60980 | else |
| 60981 | { |
| 60982 | return 4; |
| 60983 | } |
| 60984 | |
| 60985 | case 4919: /* avx5124vnniw_vp4dpwssds_maskz */ |
| 60986 | case 4918: /* avx5124vnniw_vp4dpwssds_mask */ |
| 60987 | case 4917: /* avx5124vnniw_vp4dpwssds */ |
| 60988 | case 4916: /* avx5124vnniw_vp4dpwssd_maskz */ |
| 60989 | case 4915: /* avx5124vnniw_vp4dpwssd_mask */ |
| 60990 | case 4914: /* avx5124vnniw_vp4dpwssd */ |
| 60991 | case 4913: /* avx5124fmaddps_4fnmaddss_maskz */ |
| 60992 | case 4912: /* avx5124fmaddps_4fnmaddss_mask */ |
| 60993 | case 4911: /* avx5124fmaddps_4fnmaddss */ |
| 60994 | case 4910: /* avx5124fmaddps_4fnmaddps_maskz */ |
| 60995 | case 4909: /* avx5124fmaddps_4fnmaddps_mask */ |
| 60996 | case 4908: /* avx5124fmaddps_4fnmaddps */ |
| 60997 | case 4907: /* avx5124fmaddps_4fmaddss_maskz */ |
| 60998 | case 4906: /* avx5124fmaddps_4fmaddss_mask */ |
| 60999 | case 4905: /* avx5124fmaddps_4fmaddss */ |
| 61000 | case 4904: /* avx5124fmaddps_4fmaddps_maskz */ |
| 61001 | case 4903: /* avx5124fmaddps_4fmaddps_mask */ |
| 61002 | case 4902: /* avx5124fmaddps_4fmaddps */ |
| 61003 | case 4893: /* vpamdd52huqv2di_mask */ |
| 61004 | case 4892: /* vpamdd52luqv2di_mask */ |
| 61005 | case 4891: /* vpamdd52huqv4di_mask */ |
| 61006 | case 4890: /* vpamdd52luqv4di_mask */ |
| 61007 | case 4889: /* vpamdd52huqv8di_mask */ |
| 61008 | case 4888: /* vpamdd52luqv8di_mask */ |
| 61009 | case 4887: /* vpamdd52huqv2di_maskz_1 */ |
| 61010 | case 4886: /* vpamdd52huqv2di */ |
| 61011 | case 4885: /* vpamdd52luqv2di_maskz_1 */ |
| 61012 | case 4884: /* vpamdd52luqv2di */ |
| 61013 | case 4883: /* vpamdd52huqv4di_maskz_1 */ |
| 61014 | case 4882: /* vpamdd52huqv4di */ |
| 61015 | case 4881: /* vpamdd52luqv4di_maskz_1 */ |
| 61016 | case 4880: /* vpamdd52luqv4di */ |
| 61017 | case 4879: /* vpamdd52huqv8di_maskz_1 */ |
| 61018 | case 4878: /* vpamdd52huqv8di */ |
| 61019 | case 4877: /* vpamdd52luqv8di_maskz_1 */ |
| 61020 | case 4876: /* vpamdd52luqv8di */ |
| 61021 | case 3964: /* xop_pmadcsswd */ |
| 61022 | case 3963: /* xop_pmadcswd */ |
| 61023 | case 3962: /* xop_pmacsswd */ |
| 61024 | case 3961: /* xop_pmacswd */ |
| 61025 | case 3960: /* xop_pmacssdqh */ |
| 61026 | case 3959: /* xop_pmacsdqh */ |
| 61027 | case 3958: /* xop_pmacssdql */ |
| 61028 | case 3957: /* xop_pmacsdql */ |
| 61029 | case 3956: /* xop_pmacssdd */ |
| 61030 | case 3955: /* xop_pmacsdd */ |
| 61031 | case 3954: /* xop_pmacssww */ |
| 61032 | case 3953: /* xop_pmacsww */ |
| 61033 | case 3783: /* sse4_1_dppd */ |
| 61034 | case 3781: /* sse4_1_dpps */ |
| 61035 | case 2102: /* *fma4i_vmfnmsub_v2df */ |
| 61036 | case 2101: /* *fma4i_vmfnmsub_v4sf */ |
| 61037 | case 2100: /* *fma4i_vmfnmadd_v2df */ |
| 61038 | case 2099: /* *fma4i_vmfnmadd_v4sf */ |
| 61039 | case 2098: /* *fma4i_vmfmsub_v2df */ |
| 61040 | case 2097: /* *fma4i_vmfmsub_v4sf */ |
| 61041 | case 2096: /* *fma4i_vmfmadd_v2df */ |
| 61042 | case 2095: /* *fma4i_vmfmadd_v4sf */ |
| 61043 | case 2094: /* *fmai_fnmsub_v2df_round */ |
| 61044 | case 2093: /* *fmai_fnmsub_v2df */ |
| 61045 | case 2092: /* *fmai_fnmsub_v4sf_round */ |
| 61046 | case 2091: /* *fmai_fnmsub_v4sf */ |
| 61047 | case 2090: /* *fmai_fnmadd_v2df_round */ |
| 61048 | case 2089: /* *fmai_fnmadd_v2df */ |
| 61049 | case 2088: /* *fmai_fnmadd_v4sf_round */ |
| 61050 | case 2087: /* *fmai_fnmadd_v4sf */ |
| 61051 | case 2086: /* *fmai_fmsub_v2df */ |
| 61052 | case 2085: /* *fmai_fmsub_v2df */ |
| 61053 | case 2084: /* *fmai_fmsub_v4sf */ |
| 61054 | case 2083: /* *fmai_fmsub_v4sf */ |
| 61055 | case 2082: /* *fmai_fmadd_v2df */ |
| 61056 | case 2081: /* *fmai_fmadd_v2df */ |
| 61057 | case 2080: /* *fmai_fmadd_v4sf */ |
| 61058 | case 2079: /* *fmai_fmadd_v4sf */ |
| 61059 | case 2078: /* avx512vl_fmsubadd_v2df_mask3_round */ |
| 61060 | case 2077: /* avx512vl_fmsubadd_v2df_mask3 */ |
| 61061 | case 2074: /* avx512f_fmsubadd_v8df_mask3_round */ |
| 61062 | case 2073: /* avx512f_fmsubadd_v8df_mask3 */ |
| 61063 | case 2072: /* avx512vl_fmsubadd_v4sf_mask3_round */ |
| 61064 | case 2071: /* avx512vl_fmsubadd_v4sf_mask3 */ |
| 61065 | case 2068: /* avx512f_fmsubadd_v16sf_mask3_round */ |
| 61066 | case 2067: /* avx512f_fmsubadd_v16sf_mask3 */ |
| 61067 | case 2066: /* avx512vl_fmsubadd_v2df_mask_round */ |
| 61068 | case 2065: /* avx512vl_fmsubadd_v2df_mask */ |
| 61069 | case 2062: /* avx512f_fmsubadd_v8df_mask_round */ |
| 61070 | case 2061: /* avx512f_fmsubadd_v8df_mask */ |
| 61071 | case 2060: /* avx512vl_fmsubadd_v4sf_mask_round */ |
| 61072 | case 2059: /* avx512vl_fmsubadd_v4sf_mask */ |
| 61073 | case 2056: /* avx512f_fmsubadd_v16sf_mask_round */ |
| 61074 | case 2055: /* avx512f_fmsubadd_v16sf_mask */ |
| 61075 | case 2054: /* fma_fmsubadd_v2df_maskz_1 */ |
| 61076 | case 2053: /* *fma_fmsubadd_v2df */ |
| 61077 | case 2050: /* fma_fmsubadd_v8df_maskz_1_round */ |
| 61078 | case 2049: /* fma_fmsubadd_v8df_maskz_1 */ |
| 61079 | case 2048: /* *fma_fmsubadd_v8df_round */ |
| 61080 | case 2047: /* *fma_fmsubadd_v8df */ |
| 61081 | case 2046: /* *fma_fmsubadd_df */ |
| 61082 | case 2045: /* fma_fmsubadd_v4sf_maskz_1 */ |
| 61083 | case 2044: /* *fma_fmsubadd_v4sf */ |
| 61084 | case 2041: /* fma_fmsubadd_v16sf_maskz_1_round */ |
| 61085 | case 2040: /* fma_fmsubadd_v16sf_maskz_1 */ |
| 61086 | case 2039: /* *fma_fmsubadd_v16sf_round */ |
| 61087 | case 2038: /* *fma_fmsubadd_v16sf */ |
| 61088 | case 2037: /* *fma_fmsubadd_sf */ |
| 61089 | case 2036: /* *fma_fmsubadd_v2df */ |
| 61090 | case 2034: /* *fma_fmsubadd_v4sf */ |
| 61091 | case 2032: /* avx512vl_fmaddsub_v2df_mask3_round */ |
| 61092 | case 2031: /* avx512vl_fmaddsub_v2df_mask3 */ |
| 61093 | case 2028: /* avx512f_fmaddsub_v8df_mask3_round */ |
| 61094 | case 2027: /* avx512f_fmaddsub_v8df_mask3 */ |
| 61095 | case 2026: /* avx512vl_fmaddsub_v4sf_mask3_round */ |
| 61096 | case 2025: /* avx512vl_fmaddsub_v4sf_mask3 */ |
| 61097 | case 2022: /* avx512f_fmaddsub_v16sf_mask3_round */ |
| 61098 | case 2021: /* avx512f_fmaddsub_v16sf_mask3 */ |
| 61099 | case 2020: /* avx512vl_fmaddsub_v2df_mask_round */ |
| 61100 | case 2019: /* avx512vl_fmaddsub_v2df_mask */ |
| 61101 | case 2016: /* avx512f_fmaddsub_v8df_mask_round */ |
| 61102 | case 2015: /* avx512f_fmaddsub_v8df_mask */ |
| 61103 | case 2014: /* avx512vl_fmaddsub_v4sf_mask_round */ |
| 61104 | case 2013: /* avx512vl_fmaddsub_v4sf_mask */ |
| 61105 | case 2010: /* avx512f_fmaddsub_v16sf_mask_round */ |
| 61106 | case 2009: /* avx512f_fmaddsub_v16sf_mask */ |
| 61107 | case 2008: /* fma_fmaddsub_v2df_maskz_1 */ |
| 61108 | case 2007: /* *fma_fmaddsub_v2df */ |
| 61109 | case 2004: /* fma_fmaddsub_v8df_maskz_1_round */ |
| 61110 | case 2003: /* fma_fmaddsub_v8df_maskz_1 */ |
| 61111 | case 2002: /* *fma_fmaddsub_v8df_round */ |
| 61112 | case 2001: /* *fma_fmaddsub_v8df */ |
| 61113 | case 2000: /* *fma_fmaddsub_df */ |
| 61114 | case 1999: /* fma_fmaddsub_v4sf_maskz_1 */ |
| 61115 | case 1998: /* *fma_fmaddsub_v4sf */ |
| 61116 | case 1995: /* fma_fmaddsub_v16sf_maskz_1_round */ |
| 61117 | case 1994: /* fma_fmaddsub_v16sf_maskz_1 */ |
| 61118 | case 1993: /* *fma_fmaddsub_v16sf_round */ |
| 61119 | case 1992: /* *fma_fmaddsub_v16sf */ |
| 61120 | case 1991: /* *fma_fmaddsub_sf */ |
| 61121 | case 1990: /* *fma_fmaddsub_v2df */ |
| 61122 | case 1988: /* *fma_fmaddsub_v4sf */ |
| 61123 | case 1986: /* avx512vl_fnmsub_v2df_mask3_round */ |
| 61124 | case 1985: /* avx512vl_fnmsub_v2df_mask3 */ |
| 61125 | case 1982: /* avx512f_fnmsub_v8df_mask3_round */ |
| 61126 | case 1981: /* avx512f_fnmsub_v8df_mask3 */ |
| 61127 | case 1980: /* avx512vl_fnmsub_v4sf_mask3_round */ |
| 61128 | case 1979: /* avx512vl_fnmsub_v4sf_mask3 */ |
| 61129 | case 1976: /* avx512f_fnmsub_v16sf_mask3_round */ |
| 61130 | case 1975: /* avx512f_fnmsub_v16sf_mask3 */ |
| 61131 | case 1974: /* avx512vl_fnmsub_v2df_mask */ |
| 61132 | case 1972: /* avx512f_fnmsub_v8df_mask_round */ |
| 61133 | case 1971: /* avx512f_fnmsub_v8df_mask */ |
| 61134 | case 1970: /* avx512vl_fnmsub_v4sf_mask */ |
| 61135 | case 1968: /* avx512f_fnmsub_v16sf_mask_round */ |
| 61136 | case 1967: /* avx512f_fnmsub_v16sf_mask */ |
| 61137 | case 1966: /* fma_fnmsub_v2df_maskz_1 */ |
| 61138 | case 1965: /* *fma_fnmsub_v2df */ |
| 61139 | case 1962: /* fma_fnmsub_v8df_maskz_1_round */ |
| 61140 | case 1961: /* fma_fnmsub_v8df_maskz_1 */ |
| 61141 | case 1960: /* *fma_fnmsub_v8df_round */ |
| 61142 | case 1959: /* *fma_fnmsub_v8df */ |
| 61143 | case 1958: /* *fma_fnmsub_df */ |
| 61144 | case 1957: /* fma_fnmsub_v4sf_maskz_1 */ |
| 61145 | case 1956: /* *fma_fnmsub_v4sf */ |
| 61146 | case 1953: /* fma_fnmsub_v16sf_maskz_1_round */ |
| 61147 | case 1952: /* fma_fnmsub_v16sf_maskz_1 */ |
| 61148 | case 1951: /* *fma_fnmsub_v16sf_round */ |
| 61149 | case 1950: /* *fma_fnmsub_v16sf */ |
| 61150 | case 1949: /* *fma_fnmsub_sf */ |
| 61151 | case 1940: /* *fma_fnmsub_v2df */ |
| 61152 | case 1939: /* *fma_fnmsub_v2df */ |
| 61153 | case 1938: /* *fma_fnmsub_v2df */ |
| 61154 | case 1937: /* *fma_fnmsub_v2df */ |
| 61155 | case 1936: /* *fma_fnmsub_v4sf */ |
| 61156 | case 1935: /* *fma_fnmsub_v4sf */ |
| 61157 | case 1934: /* *fma_fnmsub_v4sf */ |
| 61158 | case 1933: /* *fma_fnmsub_v4sf */ |
| 61159 | case 1932: /* *fma_fnmsub_df */ |
| 61160 | case 1931: /* *fma_fnmsub_df */ |
| 61161 | case 1930: /* *fma_fnmsub_sf */ |
| 61162 | case 1929: /* *fma_fnmsub_sf */ |
| 61163 | case 1928: /* avx512vl_fnmadd_v2df_mask3 */ |
| 61164 | case 1926: /* avx512f_fnmadd_v8df_mask3_round */ |
| 61165 | case 1925: /* avx512f_fnmadd_v8df_mask3 */ |
| 61166 | case 1924: /* avx512vl_fnmadd_v4sf_mask3 */ |
| 61167 | case 1922: /* avx512f_fnmadd_v16sf_mask3_round */ |
| 61168 | case 1921: /* avx512f_fnmadd_v16sf_mask3 */ |
| 61169 | case 1920: /* avx512vl_fnmadd_v2df_mask */ |
| 61170 | case 1918: /* avx512f_fnmadd_v8df_mask_round */ |
| 61171 | case 1917: /* avx512f_fnmadd_v8df_mask */ |
| 61172 | case 1916: /* avx512vl_fnmadd_v4sf_mask */ |
| 61173 | case 1914: /* avx512f_fnmadd_v16sf_mask_round */ |
| 61174 | case 1913: /* avx512f_fnmadd_v16sf_mask */ |
| 61175 | case 1912: /* fma_fnmadd_v2df_maskz_1 */ |
| 61176 | case 1911: /* *fma_fnmadd_v2df */ |
| 61177 | case 1908: /* fma_fnmadd_v8df_maskz_1_round */ |
| 61178 | case 1907: /* fma_fnmadd_v8df_maskz_1 */ |
| 61179 | case 1906: /* *fma_fnmadd_v8df_round */ |
| 61180 | case 1905: /* *fma_fnmadd_v8df */ |
| 61181 | case 1904: /* *fma_fnmadd_df */ |
| 61182 | case 1903: /* fma_fnmadd_v4sf_maskz_1 */ |
| 61183 | case 1902: /* *fma_fnmadd_v4sf */ |
| 61184 | case 1899: /* fma_fnmadd_v16sf_maskz_1_round */ |
| 61185 | case 1898: /* fma_fnmadd_v16sf_maskz_1 */ |
| 61186 | case 1897: /* *fma_fnmadd_v16sf_round */ |
| 61187 | case 1896: /* *fma_fnmadd_v16sf */ |
| 61188 | case 1895: /* *fma_fnmadd_sf */ |
| 61189 | case 1892: /* *fma_fnmadd_v2df */ |
| 61190 | case 1891: /* *fma_fnmadd_v4sf */ |
| 61191 | case 1890: /* *fma_fnmadd_df */ |
| 61192 | case 1889: /* *fma_fnmadd_sf */ |
| 61193 | case 1888: /* avx512vl_fmsub_v2df_mask3 */ |
| 61194 | case 1886: /* avx512f_fmsub_v8df_mask3_round */ |
| 61195 | case 1885: /* avx512f_fmsub_v8df_mask3 */ |
| 61196 | case 1884: /* avx512vl_fmsub_v4sf_mask3 */ |
| 61197 | case 1882: /* avx512f_fmsub_v16sf_mask3_round */ |
| 61198 | case 1881: /* avx512f_fmsub_v16sf_mask3 */ |
| 61199 | case 1880: /* avx512vl_fmsub_v2df_mask_round */ |
| 61200 | case 1879: /* avx512vl_fmsub_v2df_mask */ |
| 61201 | case 1876: /* avx512f_fmsub_v8df_mask_round */ |
| 61202 | case 1875: /* avx512f_fmsub_v8df_mask */ |
| 61203 | case 1874: /* avx512vl_fmsub_v4sf_mask_round */ |
| 61204 | case 1873: /* avx512vl_fmsub_v4sf_mask */ |
| 61205 | case 1870: /* avx512f_fmsub_v16sf_mask_round */ |
| 61206 | case 1869: /* avx512f_fmsub_v16sf_mask */ |
| 61207 | case 1868: /* fma_fmsub_v2df_maskz_1 */ |
| 61208 | case 1867: /* *fma_fmsub_v2df */ |
| 61209 | case 1864: /* fma_fmsub_v8df_maskz_1_round */ |
| 61210 | case 1863: /* fma_fmsub_v8df_maskz_1 */ |
| 61211 | case 1862: /* *fma_fmsub_v8df_round */ |
| 61212 | case 1861: /* *fma_fmsub_v8df */ |
| 61213 | case 1860: /* *fma_fmsub_df */ |
| 61214 | case 1859: /* fma_fmsub_v4sf_maskz_1 */ |
| 61215 | case 1858: /* *fma_fmsub_v4sf */ |
| 61216 | case 1855: /* fma_fmsub_v16sf_maskz_1_round */ |
| 61217 | case 1854: /* fma_fmsub_v16sf_maskz_1 */ |
| 61218 | case 1853: /* *fma_fmsub_v16sf_round */ |
| 61219 | case 1852: /* *fma_fmsub_v16sf */ |
| 61220 | case 1851: /* *fma_fmsub_sf */ |
| 61221 | case 1848: /* *fma_fmsub_v2df */ |
| 61222 | case 1847: /* *fma_fmsub_v4sf */ |
| 61223 | case 1846: /* *fma_fmsub_df */ |
| 61224 | case 1845: /* *fma_fmsub_sf */ |
| 61225 | case 1844: /* avx512vl_fmadd_v2df_mask3_round */ |
| 61226 | case 1843: /* avx512vl_fmadd_v2df_mask3 */ |
| 61227 | case 1840: /* avx512f_fmadd_v8df_mask3_round */ |
| 61228 | case 1839: /* avx512f_fmadd_v8df_mask3 */ |
| 61229 | case 1838: /* avx512vl_fmadd_v4sf_mask3_round */ |
| 61230 | case 1837: /* avx512vl_fmadd_v4sf_mask3 */ |
| 61231 | case 1834: /* avx512f_fmadd_v16sf_mask3_round */ |
| 61232 | case 1833: /* avx512f_fmadd_v16sf_mask3 */ |
| 61233 | case 1832: /* avx512vl_fmadd_v2df_mask */ |
| 61234 | case 1830: /* avx512f_fmadd_v8df_mask_round */ |
| 61235 | case 1829: /* avx512f_fmadd_v8df_mask */ |
| 61236 | case 1828: /* avx512vl_fmadd_v4sf_mask */ |
| 61237 | case 1826: /* avx512f_fmadd_v16sf_mask_round */ |
| 61238 | case 1825: /* avx512f_fmadd_v16sf_mask */ |
| 61239 | case 1824: /* fma_fmadd_v2df_maskz_1 */ |
| 61240 | case 1823: /* *fma_fmadd_v2df */ |
| 61241 | case 1820: /* fma_fmadd_v8df_maskz_1_round */ |
| 61242 | case 1819: /* fma_fmadd_v8df_maskz_1 */ |
| 61243 | case 1818: /* *fma_fmadd_v8df_round */ |
| 61244 | case 1817: /* *fma_fmadd_v8df */ |
| 61245 | case 1816: /* *fma_fmadd_df */ |
| 61246 | case 1815: /* fma_fmadd_v4sf_maskz_1 */ |
| 61247 | case 1814: /* *fma_fmadd_v4sf */ |
| 61248 | case 1811: /* fma_fmadd_v16sf_maskz_1_round */ |
| 61249 | case 1810: /* fma_fmadd_v16sf_maskz_1 */ |
| 61250 | case 1809: /* *fma_fmadd_v16sf_round */ |
| 61251 | case 1808: /* *fma_fmadd_v16sf */ |
| 61252 | case 1807: /* *fma_fmadd_sf */ |
| 61253 | case 1804: /* *fma_fmadd_v2df */ |
| 61254 | case 1803: /* *fma_fmadd_v4sf */ |
| 61255 | case 1802: /* *fma_fmadd_df */ |
| 61256 | case 1801: /* *fma_fmadd_sf */ |
| 61257 | case 1620: /* sse3_hsubv4sf3 */ |
| 61258 | case 1619: /* sse3_haddv4sf3 */ |
| 61259 | case 1616: /* *sse3_hsubv2df3_low */ |
| 61260 | case 1615: /* *sse3_haddv2df3_low */ |
| 61261 | case 1614: /* sse3_hsubv2df3 */ |
| 61262 | case 1613: /* *sse3_haddv2df3 */ |
| 61263 | case 1610: /* sse3_addsubv4sf3 */ |
| 61264 | case 1608: /* sse3_addsubv2df3 */ |
| 61265 | case 1598: /* ieee_minv2df3_mask */ |
| 61266 | case 1597: /* ieee_minv2df3 */ |
| 61267 | case 1596: /* ieee_maxv2df3_mask */ |
| 61268 | case 1595: /* ieee_maxv2df3 */ |
| 61269 | case 1590: /* ieee_minv8df3_mask_round */ |
| 61270 | case 1589: /* ieee_minv8df3_mask */ |
| 61271 | case 1588: /* ieee_minv8df3_round */ |
| 61272 | case 1587: /* ieee_minv8df3 */ |
| 61273 | case 1586: /* ieee_maxv8df3_mask_round */ |
| 61274 | case 1585: /* ieee_maxv8df3_mask */ |
| 61275 | case 1584: /* ieee_maxv8df3_round */ |
| 61276 | case 1583: /* ieee_maxv8df3 */ |
| 61277 | case 1582: /* ieee_minv4sf3_mask */ |
| 61278 | case 1581: /* ieee_minv4sf3 */ |
| 61279 | case 1580: /* ieee_maxv4sf3_mask */ |
| 61280 | case 1579: /* ieee_maxv4sf3 */ |
| 61281 | case 1574: /* ieee_minv16sf3_mask_round */ |
| 61282 | case 1573: /* ieee_minv16sf3_mask */ |
| 61283 | case 1572: /* ieee_minv16sf3_round */ |
| 61284 | case 1571: /* ieee_minv16sf3 */ |
| 61285 | case 1570: /* ieee_maxv16sf3_mask_round */ |
| 61286 | case 1569: /* ieee_maxv16sf3_mask */ |
| 61287 | case 1568: /* ieee_maxv16sf3_round */ |
| 61288 | case 1567: /* ieee_maxv16sf3 */ |
| 61289 | case 1566: /* *sminv2df3_mask_round */ |
| 61290 | case 1565: /* *sminv2df3_mask */ |
| 61291 | case 1564: /* *sminv2df3_round */ |
| 61292 | case 1563: /* *sminv2df3 */ |
| 61293 | case 1562: /* *smaxv2df3_mask_round */ |
| 61294 | case 1561: /* *smaxv2df3_mask */ |
| 61295 | case 1560: /* *smaxv2df3_round */ |
| 61296 | case 1559: /* *smaxv2df3 */ |
| 61297 | case 1550: /* *sminv8df3_mask_round */ |
| 61298 | case 1549: /* *sminv8df3_mask */ |
| 61299 | case 1548: /* *sminv8df3_round */ |
| 61300 | case 1547: /* *sminv8df3 */ |
| 61301 | case 1546: /* *smaxv8df3_mask_round */ |
| 61302 | case 1545: /* *smaxv8df3_mask */ |
| 61303 | case 1544: /* *smaxv8df3_round */ |
| 61304 | case 1543: /* *smaxv8df3 */ |
| 61305 | case 1542: /* *sminv4sf3_mask_round */ |
| 61306 | case 1541: /* *sminv4sf3_mask */ |
| 61307 | case 1540: /* *sminv4sf3_round */ |
| 61308 | case 1539: /* *sminv4sf3 */ |
| 61309 | case 1538: /* *smaxv4sf3_mask_round */ |
| 61310 | case 1537: /* *smaxv4sf3_mask */ |
| 61311 | case 1536: /* *smaxv4sf3_round */ |
| 61312 | case 1535: /* *smaxv4sf3 */ |
| 61313 | case 1526: /* *sminv16sf3_mask_round */ |
| 61314 | case 1525: /* *sminv16sf3_mask */ |
| 61315 | case 1524: /* *sminv16sf3_round */ |
| 61316 | case 1523: /* *sminv16sf3 */ |
| 61317 | case 1522: /* *smaxv16sf3_mask_round */ |
| 61318 | case 1521: /* *smaxv16sf3_mask */ |
| 61319 | case 1520: /* *smaxv16sf3_round */ |
| 61320 | case 1519: /* *smaxv16sf3 */ |
| 61321 | case 1446: /* sse2_vmmulv2df3_round */ |
| 61322 | case 1445: /* sse2_vmmulv2df3 */ |
| 61323 | case 1442: /* sse_vmmulv4sf3_round */ |
| 61324 | case 1441: /* sse_vmmulv4sf3 */ |
| 61325 | case 1440: /* *mulv2df3_mask_round */ |
| 61326 | case 1439: /* *mulv2df3_mask */ |
| 61327 | case 1438: /* *mulv2df3_round */ |
| 61328 | case 1437: /* *mulv2df3 */ |
| 61329 | case 1432: /* *mulv8df3_mask_round */ |
| 61330 | case 1431: /* *mulv8df3_mask */ |
| 61331 | case 1430: /* *mulv8df3_round */ |
| 61332 | case 1429: /* *mulv8df3 */ |
| 61333 | case 1428: /* *mulv4sf3_mask_round */ |
| 61334 | case 1427: /* *mulv4sf3_mask */ |
| 61335 | case 1426: /* *mulv4sf3_round */ |
| 61336 | case 1425: /* *mulv4sf3 */ |
| 61337 | case 1420: /* *mulv16sf3_mask_round */ |
| 61338 | case 1419: /* *mulv16sf3_mask */ |
| 61339 | case 1418: /* *mulv16sf3_round */ |
| 61340 | case 1417: /* *mulv16sf3 */ |
| 61341 | case 1416: /* sse2_vmsubv2df3_round */ |
| 61342 | case 1415: /* sse2_vmsubv2df3 */ |
| 61343 | case 1414: /* sse2_vmaddv2df3_round */ |
| 61344 | case 1413: /* sse2_vmaddv2df3 */ |
| 61345 | case 1412: /* sse_vmsubv4sf3_round */ |
| 61346 | case 1411: /* sse_vmsubv4sf3 */ |
| 61347 | case 1410: /* sse_vmaddv4sf3_round */ |
| 61348 | case 1409: /* sse_vmaddv4sf3 */ |
| 61349 | case 1408: /* *subv2df3_mask_round */ |
| 61350 | case 1407: /* *subv2df3_mask */ |
| 61351 | case 1406: /* *subv2df3_round */ |
| 61352 | case 1405: /* *subv2df3 */ |
| 61353 | case 1404: /* *addv2df3_mask_round */ |
| 61354 | case 1403: /* *addv2df3_mask */ |
| 61355 | case 1402: /* *addv2df3_round */ |
| 61356 | case 1401: /* *addv2df3 */ |
| 61357 | case 1392: /* *subv8df3_mask_round */ |
| 61358 | case 1391: /* *subv8df3_mask */ |
| 61359 | case 1390: /* *subv8df3_round */ |
| 61360 | case 1389: /* *subv8df3 */ |
| 61361 | case 1388: /* *addv8df3_mask_round */ |
| 61362 | case 1387: /* *addv8df3_mask */ |
| 61363 | case 1386: /* *addv8df3_round */ |
| 61364 | case 1385: /* *addv8df3 */ |
| 61365 | case 1384: /* *subv4sf3_mask_round */ |
| 61366 | case 1383: /* *subv4sf3_mask */ |
| 61367 | case 1382: /* *subv4sf3_round */ |
| 61368 | case 1381: /* *subv4sf3 */ |
| 61369 | case 1380: /* *addv4sf3_mask_round */ |
| 61370 | case 1379: /* *addv4sf3_mask */ |
| 61371 | case 1378: /* *addv4sf3_round */ |
| 61372 | case 1377: /* *addv4sf3 */ |
| 61373 | case 1368: /* *subv16sf3_mask_round */ |
| 61374 | case 1367: /* *subv16sf3_mask */ |
| 61375 | case 1366: /* *subv16sf3_round */ |
| 61376 | case 1365: /* *subv16sf3 */ |
| 61377 | case 1364: /* *addv16sf3_mask_round */ |
| 61378 | case 1363: /* *addv16sf3_mask */ |
| 61379 | case 1362: /* *addv16sf3_round */ |
| 61380 | case 1361: /* *addv16sf3 */ |
| 61381 | case 992: /* *ieee_smindf3 */ |
| 61382 | case 991: /* *ieee_smaxdf3 */ |
| 61383 | case 990: /* *ieee_sminsf3 */ |
| 61384 | case 989: /* *ieee_smaxsf3 */ |
| 61385 | case 988: /* smindf3 */ |
| 61386 | case 987: /* smaxdf3 */ |
| 61387 | case 986: /* sminsf3 */ |
| 61388 | case 985: /* smaxsf3 */ |
| 61389 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) |
| 61390 | { |
| 61391 | return 10 /* 0xa */; |
| 61392 | } |
| 61393 | else if (cached_memory == MEMORY_NONE) |
| 61394 | { |
| 61395 | return 6; |
| 61396 | } |
| 61397 | else |
| 61398 | { |
| 61399 | return 0; |
| 61400 | } |
| 61401 | |
| 61402 | case 980: /* *movxfcc_1 */ |
| 61403 | return 15 /* 0xf */; |
| 61404 | |
| 61405 | case 962: /* *rep_stosqi */ |
| 61406 | case 961: /* *rep_stosqi */ |
| 61407 | case 960: /* *rep_stossi */ |
| 61408 | case 959: /* *rep_stossi */ |
| 61409 | case 958: /* *rep_stosdi_rex64 */ |
| 61410 | case 957: /* *rep_stosdi_rex64 */ |
| 61411 | case 956: /* *strsetqi_1 */ |
| 61412 | case 955: /* *strsetqi_1 */ |
| 61413 | case 954: /* *strsethi_1 */ |
| 61414 | case 953: /* *strsethi_1 */ |
| 61415 | case 952: /* *strsetsi_1 */ |
| 61416 | case 951: /* *strsetsi_1 */ |
| 61417 | case 950: /* *strsetdi_rex_1 */ |
| 61418 | case 949: /* *strsetdi_rex_1 */ |
| 61419 | case 948: /* *rep_movqi */ |
| 61420 | case 947: /* *rep_movqi */ |
| 61421 | case 946: /* *rep_movsi */ |
| 61422 | case 945: /* *rep_movsi */ |
| 61423 | case 944: /* *rep_movdi_rex64 */ |
| 61424 | case 943: /* *rep_movdi_rex64 */ |
| 61425 | case 942: /* *strmovqi_1 */ |
| 61426 | case 941: /* *strmovqi_1 */ |
| 61427 | case 940: /* *strmovhi_1 */ |
| 61428 | case 939: /* *strmovhi_1 */ |
| 61429 | case 938: /* *strmovsi_1 */ |
| 61430 | case 937: /* *strmovsi_1 */ |
| 61431 | case 936: /* *strmovdi_rex_1 */ |
| 61432 | case 935: /* *strmovdi_rex_1 */ |
| 61433 | return 6; |
| 61434 | |
| 61435 | case 4427: /* avx_maskstoreps256 */ |
| 61436 | case 4419: /* avx_maskloadps256 */ |
| 61437 | case 3771: /* sse4a_insertq */ |
| 61438 | case 3770: /* sse4a_insertqi */ |
| 61439 | case 2522: /* vec_extract_hi_v8sf */ |
| 61440 | case 2520: /* vec_extract_hi_v8sf_mask */ |
| 61441 | case 2518: /* vec_extract_hi_v8sf_maskm */ |
| 61442 | case 2516: /* vec_extract_lo_v8sf_maskm */ |
| 61443 | case 2514: /* vec_extract_lo_v8sf_mask */ |
| 61444 | case 2513: /* vec_extract_lo_v8sf */ |
| 61445 | case 2456: /* avx2_vec_dupv8sf_1 */ |
| 61446 | case 2454: /* avx2_vec_dupv8sf */ |
| 61447 | case 704: /* leave_rex64 */ |
| 61448 | case 703: /* leave */ |
| 61449 | return 3; |
| 61450 | |
| 61451 | case 693: /* simple_return_indirect_internal */ |
| 61452 | case 663: /* *tablejump_1 */ |
| 61453 | case 662: /* *tablejump_1 */ |
| 61454 | case 661: /* *indirect_jump */ |
| 61455 | case 660: /* *indirect_jump */ |
| 61456 | extract_constrain_insn_cached (insn); |
| 61457 | if (((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) || ( |
| 61458 | #line 12442 "/___NETBSD_SRC___/tools/gcc/../../external/gpl3/gcc/dist/gcc/config/i386/i386.md" |
| 61459 | ((cfun->machine->indirect_branch_type |
| 61460 | != indirect_branch_keep)))) |
| 61461 | { |
| 61462 | return 1; |
| 61463 | } |
| 61464 | else if (cached_memory == MEMORY_LOAD) |
| 61465 | { |
| 61466 | return 5; |
| 61467 | } |
| 61468 | else |
| 61469 | { |
| 61470 | return 0; |
| 61471 | } |
| 61472 | |
| 61473 | case 624: /* *setcc_qi_slp */ |
| 61474 | case 623: /* *setcc_qi */ |
| 61475 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) |
| 61476 | { |
| 61477 | return 1; |
| 61478 | } |
| 61479 | else if (cached_memory == MEMORY_STORE) |
| 61480 | { |
| 61481 | return 4; |
| 61482 | } |
| 61483 | else |
| 61484 | { |
| 61485 | return 0; |
| 61486 | } |
| 61487 | |
| 61488 | case 546: /* x86_shrd */ |
| 61489 | case 545: /* x86_64_shrd */ |
| 61490 | case 516: /* x86_shld */ |
| 61491 | case 515: /* x86_64_shld */ |
| 61492 | if (get_attr_memory (insn) == MEMORY_NONE) |
| 61493 | { |
| 61494 | return 2; |
| 61495 | } |
| 61496 | else |
| 61497 | { |
| 61498 | return 0; |
| 61499 | } |
| 61500 | |
| 61501 | case 344: /* *mulvhi4 */ |
| 61502 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) |
| 61503 | { |
| 61504 | return 4; |
| 61505 | } |
| 61506 | else if ((cached_memory == MEMORY_LOAD) || (cached_memory == MEMORY_BOTH)) |
| 61507 | { |
| 61508 | return 8; |
| 61509 | } |
| 61510 | else |
| 61511 | { |
| 61512 | return 0; |
| 61513 | } |
| 61514 | |
| 61515 | case 202: /* *floatdidf2_mixed */ |
| 61516 | case 201: /* *floatsidf2_mixed */ |
| 61517 | case 200: /* *floatdisf2_mixed */ |
| 61518 | case 199: /* *floatsisf2_mixed */ |
| 61519 | extract_constrain_insn_cached (insn); |
| 61520 | if (which_alternative == 0) |
| 61521 | { |
| 61522 | return 2; |
| 61523 | } |
| 61524 | else if ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) |
| 61525 | { |
| 61526 | return 8; |
| 61527 | } |
| 61528 | else if (cached_memory == MEMORY_NONE) |
| 61529 | { |
| 61530 | return 4; |
| 61531 | } |
| 61532 | else |
| 61533 | { |
| 61534 | return 0; |
| 61535 | } |
| 61536 | |
| 61537 | case 3713: /* *ssse3_pmulhrswv4hi3 */ |
| 61538 | case 3712: /* *ssse3_pmulhrswv8hi3_mask */ |
| 61539 | case 3711: /* *ssse3_pmulhrswv8hi3 */ |
| 61540 | case 3710: /* *avx2_pmulhrswv16hi3_mask */ |
| 61541 | case 3709: /* *avx2_pmulhrswv16hi3 */ |
| 61542 | case 3708: /* *avx512bw_pmulhrswv32hi3_mask */ |
| 61543 | case 3707: /* *avx512bw_pmulhrswv32hi3 */ |
| 61544 | case 3704: /* avx512bw_umulhrswv32hi3_mask */ |
| 61545 | case 3703: /* avx512bw_umulhrswv32hi3 */ |
| 61546 | case 3079: /* *sse4_1_mulv4si3_mask */ |
| 61547 | case 3078: /* *sse4_1_mulv4si3 */ |
| 61548 | case 3077: /* *avx2_mulv8si3_mask */ |
| 61549 | case 3076: /* *avx2_mulv8si3 */ |
| 61550 | case 3075: /* *avx512f_mulv16si3_mask */ |
| 61551 | case 3074: /* *avx512f_mulv16si3 */ |
| 61552 | case 3073: /* avx512dq_mulv2di3_mask */ |
| 61553 | case 3072: /* avx512dq_mulv2di3 */ |
| 61554 | case 3071: /* avx512dq_mulv4di3_mask */ |
| 61555 | case 3070: /* avx512dq_mulv4di3 */ |
| 61556 | case 3069: /* avx512dq_mulv8di3_mask */ |
| 61557 | case 3068: /* avx512dq_mulv8di3 */ |
| 61558 | case 3059: /* *sse4_1_mulv2siv2di3_mask */ |
| 61559 | case 3058: /* *sse4_1_mulv2siv2di3 */ |
| 61560 | case 3057: /* *vec_widen_smult_even_v8si_mask */ |
| 61561 | case 3056: /* *vec_widen_smult_even_v8si */ |
| 61562 | case 3055: /* *vec_widen_smult_even_v16si_mask */ |
| 61563 | case 3054: /* *vec_widen_smult_even_v16si */ |
| 61564 | case 3053: /* *vec_widen_umult_even_v4si_mask */ |
| 61565 | case 3052: /* *vec_widen_umult_even_v4si */ |
| 61566 | case 3051: /* *vec_widen_umult_even_v8si_mask */ |
| 61567 | case 3050: /* *vec_widen_umult_even_v8si */ |
| 61568 | case 3049: /* *vec_widen_umult_even_v16si_mask */ |
| 61569 | case 3048: /* *vec_widen_umult_even_v16si */ |
| 61570 | case 3047: /* *umulv8hi3_highpart_mask */ |
| 61571 | case 3046: /* *umulv8hi3_highpart */ |
| 61572 | case 3045: /* *smulv8hi3_highpart_mask */ |
| 61573 | case 3044: /* *smulv8hi3_highpart */ |
| 61574 | case 3043: /* *umulv16hi3_highpart_mask */ |
| 61575 | case 3042: /* *umulv16hi3_highpart */ |
| 61576 | case 3041: /* *smulv16hi3_highpart_mask */ |
| 61577 | case 3040: /* *smulv16hi3_highpart */ |
| 61578 | case 3039: /* *umulv32hi3_highpart_mask */ |
| 61579 | case 3038: /* *umulv32hi3_highpart */ |
| 61580 | case 3037: /* *smulv32hi3_highpart_mask */ |
| 61581 | case 3036: /* *smulv32hi3_highpart */ |
| 61582 | case 3035: /* *mulv8hi3_mask */ |
| 61583 | case 3034: /* *mulv8hi3 */ |
| 61584 | case 3033: /* *mulv16hi3_mask */ |
| 61585 | case 3032: /* *mulv16hi3 */ |
| 61586 | case 3031: /* *mulv32hi3_mask */ |
| 61587 | case 3030: /* *mulv32hi3 */ |
| 61588 | case 2226: /* sse2_cvttsd2siq_round */ |
| 61589 | case 2225: /* sse2_cvttsd2siq */ |
| 61590 | case 2224: /* sse2_cvttsd2si_round */ |
| 61591 | case 2223: /* sse2_cvttsd2si */ |
| 61592 | case 2222: /* sse2_cvtsd2siq_2 */ |
| 61593 | case 2221: /* sse2_cvtsd2siq_round */ |
| 61594 | case 2220: /* sse2_cvtsd2siq */ |
| 61595 | case 2219: /* sse2_cvtsd2si_2 */ |
| 61596 | case 2218: /* sse2_cvtsd2si_round */ |
| 61597 | case 2217: /* sse2_cvtsd2si */ |
| 61598 | case 2216: /* avx512f_vcvttsd2usiq_round */ |
| 61599 | case 2215: /* avx512f_vcvttsd2usiq */ |
| 61600 | case 2214: /* avx512f_vcvttsd2usi_round */ |
| 61601 | case 2213: /* avx512f_vcvttsd2usi */ |
| 61602 | case 2212: /* avx512f_vcvtsd2usiq_round */ |
| 61603 | case 2211: /* avx512f_vcvtsd2usiq */ |
| 61604 | case 2210: /* avx512f_vcvtsd2usi_round */ |
| 61605 | case 2209: /* avx512f_vcvtsd2usi */ |
| 61606 | case 2208: /* avx512f_vcvttss2usiq_round */ |
| 61607 | case 2207: /* avx512f_vcvttss2usiq */ |
| 61608 | case 2206: /* avx512f_vcvttss2usi_round */ |
| 61609 | case 2205: /* avx512f_vcvttss2usi */ |
| 61610 | case 2204: /* avx512f_vcvtss2usiq_round */ |
| 61611 | case 2203: /* avx512f_vcvtss2usiq */ |
| 61612 | case 2202: /* avx512f_vcvtss2usi_round */ |
| 61613 | case 2201: /* avx512f_vcvtss2usi */ |
| 61614 | case 2200: /* sse2_cvtsi2sdq_round */ |
| 61615 | case 2199: /* sse2_cvtsi2sdq */ |
| 61616 | case 2198: /* sse2_cvtsi2sd */ |
| 61617 | case 2126: /* cvtusi2sd64_round */ |
| 61618 | case 2125: /* cvtusi2sd64 */ |
| 61619 | case 2124: /* cvtusi2ss64_round */ |
| 61620 | case 2123: /* cvtusi2ss64 */ |
| 61621 | case 2122: /* cvtusi2sd32 */ |
| 61622 | case 2121: /* cvtusi2ss32_round */ |
| 61623 | case 2120: /* cvtusi2ss32 */ |
| 61624 | case 2119: /* sse_cvttss2siq_round */ |
| 61625 | case 2118: /* sse_cvttss2siq */ |
| 61626 | case 2117: /* sse_cvttss2si_round */ |
| 61627 | case 2116: /* sse_cvttss2si */ |
| 61628 | case 2115: /* sse_cvtss2siq_2 */ |
| 61629 | case 2114: /* sse_cvtss2siq_round */ |
| 61630 | case 2113: /* sse_cvtss2siq */ |
| 61631 | case 2112: /* sse_cvtss2si_2 */ |
| 61632 | case 2111: /* sse_cvtss2si_round */ |
| 61633 | case 2110: /* sse_cvtss2si */ |
| 61634 | case 2109: /* sse_cvtsi2ssq_round */ |
| 61635 | case 2108: /* sse_cvtsi2ssq */ |
| 61636 | case 2107: /* sse_cvtsi2ss_round */ |
| 61637 | case 2106: /* sse_cvtsi2ss */ |
| 61638 | case 173: /* fix_truncdfdi_sse */ |
| 61639 | case 172: /* fix_truncdfsi_sse */ |
| 61640 | case 171: /* fix_truncsfdi_sse */ |
| 61641 | case 170: /* fix_truncsfsi_sse */ |
| 61642 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) |
| 61643 | { |
| 61644 | return 8; |
| 61645 | } |
| 61646 | else if (cached_memory == MEMORY_NONE) |
| 61647 | { |
| 61648 | return 4; |
| 61649 | } |
| 61650 | else |
| 61651 | { |
| 61652 | return 0; |
| 61653 | } |
| 61654 | |
| 61655 | case 163: /* *truncxfdf2_mixed */ |
| 61656 | case 162: /* *truncxfsf2_mixed */ |
| 61657 | case 160: /* *truncdfsf_i387 */ |
| 61658 | extract_constrain_insn_cached (insn); |
| 61659 | if (which_alternative == 0) |
| 61660 | { |
| 61661 | return 2; |
| 61662 | } |
| 61663 | else |
| 61664 | { |
| 61665 | return 0; |
| 61666 | } |
| 61667 | |
| 61668 | case 4935: /* storedi_via_fpu */ |
| 61669 | case 4934: /* loaddi_via_fpu */ |
| 61670 | case 4869: /* sha256rnds2 */ |
| 61671 | case 4868: /* sha256msg2 */ |
| 61672 | case 4867: /* sha256msg1 */ |
| 61673 | case 4866: /* sha1rnds4 */ |
| 61674 | case 4865: /* sha1nexte */ |
| 61675 | case 4864: /* sha1msg2 */ |
| 61676 | case 4863: /* sha1msg1 */ |
| 61677 | case 4838: /* avx512bw_dbpsadbwv32hi_mask */ |
| 61678 | case 4837: /* *avx512bw_dbpsadbwv32hi */ |
| 61679 | case 4836: /* avx512bw_dbpsadbwv16hi_mask */ |
| 61680 | case 4835: /* *avx512bw_dbpsadbwv16hi */ |
| 61681 | case 4834: /* avx512bw_dbpsadbwv8hi_mask */ |
| 61682 | case 4833: /* *avx512bw_dbpsadbwv8hi */ |
| 61683 | case 4432: /* avx2_maskstoreq256 */ |
| 61684 | case 4431: /* avx2_maskstored256 */ |
| 61685 | case 4430: /* avx2_maskstoreq */ |
| 61686 | case 4429: /* avx2_maskstored */ |
| 61687 | case 4428: /* avx_maskstorepd256 */ |
| 61688 | case 4426: /* avx_maskstorepd */ |
| 61689 | case 4425: /* avx_maskstoreps */ |
| 61690 | case 4424: /* avx2_maskloadq256 */ |
| 61691 | case 4423: /* avx2_maskloadd256 */ |
| 61692 | case 4422: /* avx2_maskloadq */ |
| 61693 | case 4421: /* avx2_maskloadd */ |
| 61694 | case 4420: /* avx_maskloadpd256 */ |
| 61695 | case 4418: /* avx_maskloadpd */ |
| 61696 | case 4417: /* avx_maskloadps */ |
| 61697 | case 4110: /* avx2_vec_dupv4df */ |
| 61698 | case 4054: /* pclmulqdq */ |
| 61699 | case 4053: /* aeskeygenassist */ |
| 61700 | case 4052: /* aesimc */ |
| 61701 | case 4051: /* aesdeclast */ |
| 61702 | case 4050: /* aesdec */ |
| 61703 | case 4049: /* aesenclast */ |
| 61704 | case 4048: /* aesenc */ |
| 61705 | case 3801: /* sse4_1_phminposuw */ |
| 61706 | case 3788: /* sse4_1_mpsadbw */ |
| 61707 | case 3787: /* avx2_mpsadbw */ |
| 61708 | case 3763: /* absv2si2 */ |
| 61709 | case 3762: /* absv4hi2 */ |
| 61710 | case 3761: /* absv8qi2 */ |
| 61711 | case 3760: /* absv8hi2_mask */ |
| 61712 | case 3759: /* absv16hi2_mask */ |
| 61713 | case 3758: /* absv32hi2_mask */ |
| 61714 | case 3757: /* absv32qi2_mask */ |
| 61715 | case 3756: /* absv16qi2_mask */ |
| 61716 | case 3755: /* absv64qi2_mask */ |
| 61717 | case 3754: /* absv2di2_mask */ |
| 61718 | case 3753: /* absv4di2_mask */ |
| 61719 | case 3752: /* absv8di2_mask */ |
| 61720 | case 3751: /* absv4si2_mask */ |
| 61721 | case 3750: /* absv8si2_mask */ |
| 61722 | case 3749: /* absv16si2_mask */ |
| 61723 | case 3748: /* *absv2di2 */ |
| 61724 | case 3747: /* *absv4di2 */ |
| 61725 | case 3746: /* *absv8di2 */ |
| 61726 | case 3745: /* *absv4si2 */ |
| 61727 | case 3744: /* *absv8si2 */ |
| 61728 | case 3743: /* *absv16si2 */ |
| 61729 | case 3742: /* *absv8hi2 */ |
| 61730 | case 3741: /* *absv16hi2 */ |
| 61731 | case 3740: /* *absv32hi2 */ |
| 61732 | case 3739: /* *absv16qi2 */ |
| 61733 | case 3738: /* *absv32qi2 */ |
| 61734 | case 3737: /* *absv64qi2 */ |
| 61735 | case 3729: /* ssse3_psignv2si3 */ |
| 61736 | case 3728: /* ssse3_psignv4hi3 */ |
| 61737 | case 3727: /* ssse3_psignv8qi3 */ |
| 61738 | case 3726: /* ssse3_psignv4si3 */ |
| 61739 | case 3725: /* avx2_psignv8si3 */ |
| 61740 | case 3724: /* ssse3_psignv8hi3 */ |
| 61741 | case 3723: /* avx2_psignv16hi3 */ |
| 61742 | case 3722: /* ssse3_psignv16qi3 */ |
| 61743 | case 3721: /* avx2_psignv32qi3 */ |
| 61744 | case 3720: /* ssse3_pshufbv8qi3 */ |
| 61745 | case 3719: /* ssse3_pshufbv16qi3_mask */ |
| 61746 | case 3718: /* ssse3_pshufbv16qi3 */ |
| 61747 | case 3717: /* avx2_pshufbv32qi3_mask */ |
| 61748 | case 3716: /* avx2_pshufbv32qi3 */ |
| 61749 | case 3715: /* avx512bw_pshufbv64qi3_mask */ |
| 61750 | case 3714: /* avx512bw_pshufbv64qi3 */ |
| 61751 | case 3635: /* *vec_extractv4si_zext */ |
| 61752 | case 3626: /* *vec_extractv8hi_zext */ |
| 61753 | case 3625: /* *vec_extractv8hi_zext */ |
| 61754 | case 3624: /* *vec_extractv16qi_zext */ |
| 61755 | case 3623: /* *vec_extractv16qi_zext */ |
| 61756 | case 3622: /* *vec_extractv8hi */ |
| 61757 | case 3621: /* *vec_extractv16qi */ |
| 61758 | case 3607: /* sse2_pshufd_1_mask */ |
| 61759 | case 3606: /* sse2_pshufd_1 */ |
| 61760 | case 3605: /* avx2_pshufd_1_mask */ |
| 61761 | case 3604: /* avx2_pshufd_1 */ |
| 61762 | case 3603: /* avx512f_pshufd_1_mask */ |
| 61763 | case 3602: /* avx512f_pshufd_1 */ |
| 61764 | case 2734: /* vec_dupv2df_mask */ |
| 61765 | case 2733: /* vec_dupv2df */ |
| 61766 | case 2530: /* vec_extract_hi_v32qi */ |
| 61767 | case 2528: /* vec_extract_hi_v64qi */ |
| 61768 | case 2526: /* vec_extract_hi_v16hi */ |
| 61769 | case 2524: /* vec_extract_hi_v32hi */ |
| 61770 | case 2521: /* vec_extract_hi_v8si */ |
| 61771 | case 2519: /* vec_extract_hi_v8si_mask */ |
| 61772 | case 2517: /* vec_extract_hi_v8si_maskm */ |
| 61773 | case 2515: /* vec_extract_lo_v8si_maskm */ |
| 61774 | case 2512: /* vec_extract_lo_v8si_mask */ |
| 61775 | case 2511: /* vec_extract_lo_v8si */ |
| 61776 | case 2510: /* vec_extract_hi_v4df_mask */ |
| 61777 | case 2509: /* vec_extract_hi_v4df */ |
| 61778 | case 2508: /* vec_extract_hi_v4di_mask */ |
| 61779 | case 2507: /* vec_extract_hi_v4di */ |
| 61780 | case 2506: /* vec_extract_lo_v4df_mask */ |
| 61781 | case 2505: /* vec_extract_lo_v4df */ |
| 61782 | case 2504: /* vec_extract_lo_v4di_mask */ |
| 61783 | case 2503: /* vec_extract_lo_v4di */ |
| 61784 | case 2498: /* vec_extract_hi_v16si_mask */ |
| 61785 | case 2497: /* vec_extract_hi_v16si */ |
| 61786 | case 2496: /* vec_extract_hi_v16sf_mask */ |
| 61787 | case 2495: /* vec_extract_hi_v16sf */ |
| 61788 | case 2494: /* vec_extract_hi_v16si_maskm */ |
| 61789 | case 2493: /* vec_extract_hi_v16sf_maskm */ |
| 61790 | case 2492: /* vec_extract_hi_v8di_mask */ |
| 61791 | case 2491: /* vec_extract_hi_v8di */ |
| 61792 | case 2490: /* vec_extract_hi_v8df_mask */ |
| 61793 | case 2489: /* vec_extract_hi_v8df */ |
| 61794 | case 2488: /* vec_extract_hi_v8di_maskm */ |
| 61795 | case 2487: /* vec_extract_hi_v8df_maskm */ |
| 61796 | case 2486: /* vec_extract_lo_v8di_mask */ |
| 61797 | case 2485: /* vec_extract_lo_v8di */ |
| 61798 | case 2484: /* vec_extract_lo_v8df_mask */ |
| 61799 | case 2483: /* vec_extract_lo_v8df */ |
| 61800 | case 2482: /* vec_extract_lo_v8di_maskm */ |
| 61801 | case 2481: /* vec_extract_lo_v8df_maskm */ |
| 61802 | case 2480: /* avx512f_vextracti32x4_1_mask */ |
| 61803 | case 2479: /* *avx512f_vextracti32x4_1 */ |
| 61804 | case 2478: /* avx512f_vextractf32x4_1_mask */ |
| 61805 | case 2477: /* *avx512f_vextractf32x4_1 */ |
| 61806 | case 2476: /* avx512dq_vextracti64x2_1_mask */ |
| 61807 | case 2475: /* *avx512dq_vextracti64x2_1 */ |
| 61808 | case 2474: /* avx512dq_vextractf64x2_1_mask */ |
| 61809 | case 2473: /* *avx512dq_vextractf64x2_1 */ |
| 61810 | case 2472: /* avx512f_vextracti32x4_1_maskm */ |
| 61811 | case 2471: /* avx512f_vextractf32x4_1_maskm */ |
| 61812 | case 2470: /* avx512dq_vextracti64x2_1_maskm */ |
| 61813 | case 2469: /* avx512dq_vextractf64x2_1_maskm */ |
| 61814 | case 2458: /* avx512f_vec_dupv8df_1 */ |
| 61815 | case 2457: /* avx512f_vec_dupv16sf_1 */ |
| 61816 | case 2455: /* avx2_vec_dupv4sf */ |
| 61817 | case 1020: /* sse4_2_crc32di */ |
| 61818 | case 1019: /* sse4_2_crc32si */ |
| 61819 | case 1018: /* sse4_2_crc32hi */ |
| 61820 | case 1017: /* sse4_2_crc32qi */ |
| 61821 | case 927: /* fistsi2_ceil_with_temp */ |
| 61822 | case 926: /* fistsi2_floor_with_temp */ |
| 61823 | case 925: /* fisthi2_ceil_with_temp */ |
| 61824 | case 924: /* fisthi2_floor_with_temp */ |
| 61825 | case 923: /* fistsi2_ceil */ |
| 61826 | case 922: /* fistsi2_floor */ |
| 61827 | case 921: /* fisthi2_ceil */ |
| 61828 | case 920: /* fisthi2_floor */ |
| 61829 | case 919: /* fistdi2_ceil_with_temp */ |
| 61830 | case 918: /* fistdi2_floor_with_temp */ |
| 61831 | case 917: /* fistdi2_ceil */ |
| 61832 | case 916: /* fistdi2_floor */ |
| 61833 | case 915: /* *fistdi2_ceil_1 */ |
| 61834 | case 914: /* *fistdi2_floor_1 */ |
| 61835 | case 913: /* *fistsi2_ceil_1 */ |
| 61836 | case 912: /* *fistsi2_floor_1 */ |
| 61837 | case 911: /* *fisthi2_ceil_1 */ |
| 61838 | case 910: /* *fisthi2_floor_1 */ |
| 61839 | case 841: /* truncxfdf2_i387_noop_unspec */ |
| 61840 | case 840: /* truncxfsf2_i387_noop_unspec */ |
| 61841 | case 810: /* *tls_dynamic_gnu2_call_64 */ |
| 61842 | case 807: /* *tls_dynamic_gnu2_call_32 */ |
| 61843 | case 685: /* *sibcall_value_pop_memory */ |
| 61844 | case 684: /* *sibcall_value_pop */ |
| 61845 | case 683: /* *call_value_pop */ |
| 61846 | case 682: /* *sibcall_value_memory */ |
| 61847 | case 681: /* *sibcall_value_memory */ |
| 61848 | case 680: /* *sibcall_value */ |
| 61849 | case 679: /* *sibcall_value */ |
| 61850 | case 678: /* *sibcall_value_GOT_32 */ |
| 61851 | case 677: /* *call_value_got_x32 */ |
| 61852 | case 676: /* *call_value */ |
| 61853 | case 675: /* *call_value */ |
| 61854 | case 674: /* *sibcall_pop_memory */ |
| 61855 | case 673: /* *sibcall_pop */ |
| 61856 | case 672: /* *call_pop */ |
| 61857 | case 671: /* *sibcall_memory */ |
| 61858 | case 670: /* *sibcall_memory */ |
| 61859 | case 669: /* *sibcall */ |
| 61860 | case 668: /* *sibcall */ |
| 61861 | case 667: /* *sibcall_GOT_32 */ |
| 61862 | case 666: /* *call_got_x32 */ |
| 61863 | case 665: /* *call */ |
| 61864 | case 664: /* *call */ |
| 61865 | case 495: /* *negextenddfxf2 */ |
| 61866 | case 494: /* *absextenddfxf2 */ |
| 61867 | case 493: /* *negextendsfxf2 */ |
| 61868 | case 492: /* *absextendsfxf2 */ |
| 61869 | case 491: /* *negextendsfdf2 */ |
| 61870 | case 490: /* *absextendsfdf2 */ |
| 61871 | case 489: /* *negxf2_1 */ |
| 61872 | case 488: /* *absxf2_1 */ |
| 61873 | case 487: /* *negdf2_1 */ |
| 61874 | case 486: /* *absdf2_1 */ |
| 61875 | case 485: /* *negsf2_1 */ |
| 61876 | case 484: /* *abssf2_1 */ |
| 61877 | case 206: /* *floatdidf2_i387 */ |
| 61878 | case 205: /* *floatdisf2_i387 */ |
| 61879 | case 204: /* *floatsidf2_i387 */ |
| 61880 | case 203: /* *floatsisf2_i387 */ |
| 61881 | case 195: /* floathidf2 */ |
| 61882 | case 194: /* floathisf2 */ |
| 61883 | case 191: /* fix_truncsi_i387_with_temp */ |
| 61884 | case 190: /* fix_trunchi_i387_with_temp */ |
| 61885 | case 189: /* fix_truncsi_i387 */ |
| 61886 | case 188: /* fix_trunchi_i387 */ |
| 61887 | case 187: /* fix_truncdi_i387_with_temp */ |
| 61888 | case 186: /* fix_truncdi_i387 */ |
| 61889 | case 185: /* *fix_truncdi_i387_1 */ |
| 61890 | case 184: /* *fix_truncsi_i387_1 */ |
| 61891 | case 183: /* *fix_trunchi_i387_1 */ |
| 61892 | case 182: /* fix_truncdi_i387_fisttp_with_temp */ |
| 61893 | case 181: /* fix_truncsi_i387_fisttp_with_temp */ |
| 61894 | case 180: /* fix_trunchi_i387_fisttp_with_temp */ |
| 61895 | case 179: /* fix_truncdi_i387_fisttp */ |
| 61896 | case 178: /* fix_truncsi_i387_fisttp */ |
| 61897 | case 177: /* fix_trunchi_i387_fisttp */ |
| 61898 | case 176: /* fix_truncdi_fisttp_i387_1 */ |
| 61899 | case 175: /* fix_truncsi_fisttp_i387_1 */ |
| 61900 | case 174: /* fix_trunchi_fisttp_i387_1 */ |
| 61901 | case 167: /* *truncxfdf2_i387 */ |
| 61902 | case 166: /* *truncxfsf2_i387 */ |
| 61903 | case 165: /* truncxfdf2_i387_noop */ |
| 61904 | case 164: /* truncxfsf2_i387_noop */ |
| 61905 | case 161: /* *truncdfsf2_i387_1 */ |
| 61906 | case 158: /* *truncdfsf_fast_i387 */ |
| 61907 | case 130: /* *swapdf */ |
| 61908 | case 129: /* *swapsf */ |
| 61909 | case 128: /* swapxf */ |
| 61910 | return 2; |
| 61911 | |
| 61912 | case 123: /* *pushsf */ |
| 61913 | case 122: /* *pushsf_rex64 */ |
| 61914 | extract_constrain_insn_cached (insn); |
| 61915 | if (which_alternative != 0) |
| 61916 | { |
| 61917 | return 1; |
| 61918 | } |
| 61919 | else |
| 61920 | { |
| 61921 | return 0; |
| 61922 | } |
| 61923 | |
| 61924 | case 121: /* *pushdf */ |
| 61925 | extract_constrain_insn_cached (insn); |
| 61926 | if (((1 << which_alternative) & 0x1e)) |
| 61927 | { |
| 61928 | return 1; |
| 61929 | } |
| 61930 | else |
| 61931 | { |
| 61932 | return 0; |
| 61933 | } |
| 61934 | |
| 61935 | case 120: /* *pushxf */ |
| 61936 | case 119: /* *pushxf_rounded */ |
| 61937 | case 118: /* *pushxf_rounded */ |
| 61938 | case 117: /* *pushtf */ |
| 61939 | extract_constrain_insn_cached (insn); |
| 61940 | if (which_alternative != 0) |
| 61941 | { |
| 61942 | return 1; |
| 61943 | } |
| 61944 | else |
| 61945 | { |
| 61946 | return 0; |
| 61947 | } |
| 61948 | |
| 61949 | case 96: /* *swaphi */ |
| 61950 | case 95: /* *swapqi */ |
| 61951 | case 94: /* *swapdi */ |
| 61952 | case 93: /* *swapsi */ |
| 61953 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) |
| 61954 | { |
| 61955 | return 4; |
| 61956 | } |
| 61957 | else if (cached_memory == MEMORY_STORE) |
| 61958 | { |
| 61959 | return 5; |
| 61960 | } |
| 61961 | else |
| 61962 | { |
| 61963 | return 0; |
| 61964 | } |
| 61965 | |
| 61966 | case 4758: /* avx512vl_compressstorev2df_mask */ |
| 61967 | case 4757: /* avx512vl_compressstorev2di_mask */ |
| 61968 | case 4756: /* avx512vl_compressstorev4sf_mask */ |
| 61969 | case 4755: /* avx512vl_compressstorev4si_mask */ |
| 61970 | case 4750: /* avx512f_compressstorev8df_mask */ |
| 61971 | case 4749: /* avx512f_compressstorev8di_mask */ |
| 61972 | case 4748: /* avx512f_compressstorev16sf_mask */ |
| 61973 | case 4747: /* avx512f_compressstorev16si_mask */ |
| 61974 | case 2933: /* avx512f_us_truncatev8div16qi2_mask_store */ |
| 61975 | case 2932: /* avx512f_truncatev8div16qi2_mask_store */ |
| 61976 | case 2931: /* avx512f_ss_truncatev8div16qi2_mask_store */ |
| 61977 | case 2924: /* *avx512f_us_truncatev8div16qi2_store */ |
| 61978 | case 2923: /* *avx512f_truncatev8div16qi2_store */ |
| 61979 | case 2922: /* *avx512f_ss_truncatev8div16qi2_store */ |
| 61980 | case 2918: /* avx512vl_us_truncatev2div2si2_mask_store */ |
| 61981 | case 2917: /* avx512vl_truncatev2div2si2_mask_store */ |
| 61982 | case 2916: /* avx512vl_ss_truncatev2div2si2_mask_store */ |
| 61983 | case 2909: /* *avx512vl_us_truncatev2div2si2_store */ |
| 61984 | case 2908: /* *avx512vl_truncatev2div2si2_store */ |
| 61985 | case 2907: /* *avx512vl_ss_truncatev2div2si2_store */ |
| 61986 | case 2903: /* avx512vl_us_truncatev2div2hi2_mask_store */ |
| 61987 | case 2902: /* avx512vl_truncatev2div2hi2_mask_store */ |
| 61988 | case 2901: /* avx512vl_ss_truncatev2div2hi2_mask_store */ |
| 61989 | case 2894: /* *avx512vl_us_truncatev2div2hi2_store */ |
| 61990 | case 2893: /* *avx512vl_truncatev2div2hi2_store */ |
| 61991 | case 2892: /* *avx512vl_ss_truncatev2div2hi2_store */ |
| 61992 | case 2891: /* avx512vl_us_truncatev4div4hi2_mask_store */ |
| 61993 | case 2890: /* avx512vl_truncatev4div4hi2_mask_store */ |
| 61994 | case 2889: /* avx512vl_ss_truncatev4div4hi2_mask_store */ |
| 61995 | case 2888: /* avx512vl_us_truncatev4siv4hi2_mask_store */ |
| 61996 | case 2887: /* avx512vl_truncatev4siv4hi2_mask_store */ |
| 61997 | case 2886: /* avx512vl_ss_truncatev4siv4hi2_mask_store */ |
| 61998 | case 2873: /* *avx512vl_us_truncatev4div4hi2_store */ |
| 61999 | case 2872: /* *avx512vl_truncatev4div4hi2_store */ |
| 62000 | case 2871: /* *avx512vl_ss_truncatev4div4hi2_store */ |
| 62001 | case 2870: /* *avx512vl_us_truncatev4siv4hi2_store */ |
| 62002 | case 2869: /* *avx512vl_truncatev4siv4hi2_store */ |
| 62003 | case 2868: /* *avx512vl_ss_truncatev4siv4hi2_store */ |
| 62004 | case 2858: /* avx512vl_us_truncatev8siv8qi2_mask_store */ |
| 62005 | case 2857: /* avx512vl_truncatev8siv8qi2_mask_store */ |
| 62006 | case 2856: /* avx512vl_ss_truncatev8siv8qi2_mask_store */ |
| 62007 | case 2855: /* avx512vl_us_truncatev8hiv8qi2_mask_store */ |
| 62008 | case 2854: /* avx512vl_truncatev8hiv8qi2_mask_store */ |
| 62009 | case 2853: /* avx512vl_ss_truncatev8hiv8qi2_mask_store */ |
| 62010 | case 2840: /* *avx512vl_us_truncatev8siv8qi2_store */ |
| 62011 | case 2839: /* *avx512vl_truncatev8siv8qi2_store */ |
| 62012 | case 2838: /* *avx512vl_ss_truncatev8siv8qi2_store */ |
| 62013 | case 2837: /* *avx512vl_us_truncatev8hiv8qi2_store */ |
| 62014 | case 2836: /* *avx512vl_truncatev8hiv8qi2_store */ |
| 62015 | case 2835: /* *avx512vl_ss_truncatev8hiv8qi2_store */ |
| 62016 | case 2834: /* avx512vl_us_truncatev4div4qi2_mask_store */ |
| 62017 | case 2833: /* avx512vl_truncatev4div4qi2_mask_store */ |
| 62018 | case 2832: /* avx512vl_ss_truncatev4div4qi2_mask_store */ |
| 62019 | case 2831: /* avx512vl_us_truncatev4siv4qi2_mask_store */ |
| 62020 | case 2830: /* avx512vl_truncatev4siv4qi2_mask_store */ |
| 62021 | case 2829: /* avx512vl_ss_truncatev4siv4qi2_mask_store */ |
| 62022 | case 2816: /* *avx512vl_us_truncatev4div4qi2_store */ |
| 62023 | case 2815: /* *avx512vl_truncatev4div4qi2_store */ |
| 62024 | case 2814: /* *avx512vl_ss_truncatev4div4qi2_store */ |
| 62025 | case 2813: /* *avx512vl_us_truncatev4siv4qi2_store */ |
| 62026 | case 2812: /* *avx512vl_truncatev4siv4qi2_store */ |
| 62027 | case 2811: /* *avx512vl_ss_truncatev4siv4qi2_store */ |
| 62028 | case 2810: /* avx512vl_us_truncatev2div2qi2_mask_store */ |
| 62029 | case 2809: /* avx512vl_truncatev2div2qi2_mask_store */ |
| 62030 | case 2808: /* avx512vl_ss_truncatev2div2qi2_mask_store */ |
| 62031 | case 2801: /* *avx512vl_us_truncatev2div2qi2_store */ |
| 62032 | case 2800: /* *avx512vl_truncatev2div2qi2_store */ |
| 62033 | case 2799: /* *avx512vl_ss_truncatev2div2qi2_store */ |
| 62034 | case 1292: /* avx512vl_storev8hi_mask */ |
| 62035 | case 1290: /* avx512bw_storev32hi_mask */ |
| 62036 | case 1288: /* avx512vl_storev16qi_mask */ |
| 62037 | case 1287: /* avx512bw_storev64qi_mask */ |
| 62038 | case 1286: /* avx512vl_storev2df_mask */ |
| 62039 | case 1284: /* avx512f_storev8df_mask */ |
| 62040 | case 1283: /* avx512vl_storev4sf_mask */ |
| 62041 | case 1281: /* avx512f_storev16sf_mask */ |
| 62042 | case 1280: /* avx512vl_storev2di_mask */ |
| 62043 | case 1278: /* avx512f_storev8di_mask */ |
| 62044 | case 1277: /* avx512vl_storev4si_mask */ |
| 62045 | case 1275: /* avx512f_storev16si_mask */ |
| 62046 | case 1100: /* *bnd64_stx */ |
| 62047 | case 1099: /* *bnd32_stx */ |
| 62048 | case 1049: /* fnstenv */ |
| 62049 | case 1042: /* xsaves64 */ |
| 62050 | case 1041: /* xsavec64 */ |
| 62051 | case 1040: /* xsaveopt64 */ |
| 62052 | case 1039: /* xsave64 */ |
| 62053 | case 1038: /* xsaves_rex64 */ |
| 62054 | case 1037: /* xsavec_rex64 */ |
| 62055 | case 1036: /* xsaveopt_rex64 */ |
| 62056 | case 1035: /* xsave_rex64 */ |
| 62057 | case 1034: /* xsaves */ |
| 62058 | case 1033: /* xsavec */ |
| 62059 | case 1032: /* xsaveopt */ |
| 62060 | case 1031: /* xsave */ |
| 62061 | case 1028: /* fxsave64 */ |
| 62062 | case 1027: /* fxsave */ |
| 62063 | case 801: /* *load_tp_di */ |
| 62064 | case 800: /* *load_tp_si */ |
| 62065 | case 799: /* *load_tp_x32_zext */ |
| 62066 | case 798: /* *load_tp_x32 */ |
| 62067 | case 92: /* *movabsdi_2 */ |
| 62068 | case 91: /* *movabssi_2 */ |
| 62069 | case 90: /* *movabshi_2 */ |
| 62070 | case 89: /* *movabsqi_2 */ |
| 62071 | return 4; |
| 62072 | |
| 62073 | case 4754: /* avx512vl_compressstorev4df_mask */ |
| 62074 | case 4753: /* avx512vl_compressstorev4di_mask */ |
| 62075 | case 4752: /* avx512vl_compressstorev8sf_mask */ |
| 62076 | case 4751: /* avx512vl_compressstorev8si_mask */ |
| 62077 | case 1291: /* avx512vl_storev16hi_mask */ |
| 62078 | case 1289: /* avx512vl_storev32qi_mask */ |
| 62079 | case 1285: /* avx512vl_storev4df_mask */ |
| 62080 | case 1282: /* avx512vl_storev8sf_mask */ |
| 62081 | case 1279: /* avx512vl_storev4di_mask */ |
| 62082 | case 1276: /* avx512vl_storev8si_mask */ |
| 62083 | case 1098: /* *bnd64_ldx */ |
| 62084 | case 1097: /* *bnd32_ldx */ |
| 62085 | case 1050: /* fldenv */ |
| 62086 | case 1048: /* xrstors64 */ |
| 62087 | case 1047: /* xrstor64 */ |
| 62088 | case 1046: /* xrstors_rex64 */ |
| 62089 | case 1045: /* xrstor_rex64 */ |
| 62090 | case 1044: /* xrstors */ |
| 62091 | case 1043: /* xrstor */ |
| 62092 | case 1030: /* fxrstor64 */ |
| 62093 | case 1029: /* fxrstor */ |
| 62094 | case 805: /* *add_tp_di */ |
| 62095 | case 804: /* *add_tp_si */ |
| 62096 | case 803: /* *add_tp_x32_zext */ |
| 62097 | case 802: /* *add_tp_x32 */ |
| 62098 | case 88: /* *movabsdi_1 */ |
| 62099 | case 87: /* *movabssi_1 */ |
| 62100 | case 86: /* *movabshi_1 */ |
| 62101 | case 85: /* *movabsqi_1 */ |
| 62102 | return 5; |
| 62103 | |
| 62104 | case 1000: /* probe_stack_di */ |
| 62105 | case 999: /* probe_stack_si */ |
| 62106 | case 732: /* tzcnt_hi */ |
| 62107 | case 730: /* *tzcnt_di_falsedep */ |
| 62108 | case 728: /* *tzcnt_si_falsedep */ |
| 62109 | case 726: /* tzcnt_di */ |
| 62110 | case 724: /* tzcnt_si */ |
| 62111 | case 719: /* *bsrhi */ |
| 62112 | case 718: /* bsr */ |
| 62113 | case 717: /* bsr_rex64 */ |
| 62114 | case 716: /* *ctzdi2_falsedep */ |
| 62115 | case 715: /* *ctzsi2_falsedep */ |
| 62116 | case 714: /* ctzdi2 */ |
| 62117 | case 713: /* ctzsi2 */ |
| 62118 | case 712: /* *bsfdi_1 */ |
| 62119 | case 711: /* *bsfsi_1 */ |
| 62120 | case 710: /* *tzcntdi_1_falsedep */ |
| 62121 | case 709: /* *tzcntsi_1_falsedep */ |
| 62122 | case 708: /* *tzcntdi_1 */ |
| 62123 | case 707: /* *tzcntsi_1 */ |
| 62124 | case 613: /* *btdi */ |
| 62125 | case 612: /* *btsi */ |
| 62126 | case 611: /* *btcq */ |
| 62127 | case 610: /* *btrq */ |
| 62128 | case 609: /* *btsq */ |
| 62129 | case 608: /* *rotrqi3_1_slp */ |
| 62130 | case 607: /* *rotlqi3_1_slp */ |
| 62131 | case 567: /* *ashrqi3_1_slp */ |
| 62132 | case 566: /* *lshrqi3_1_slp */ |
| 62133 | case 512: /* *one_cmplsi2_2_zext */ |
| 62134 | case 511: /* *one_cmpldi2_2 */ |
| 62135 | case 510: /* *one_cmplsi2_2 */ |
| 62136 | case 509: /* *one_cmplhi2_2 */ |
| 62137 | case 508: /* *one_cmplqi2_2 */ |
| 62138 | case 507: /* *one_cmplqi2_1 */ |
| 62139 | case 506: /* *one_cmplsi2_1_zext */ |
| 62140 | case 505: /* *one_cmpldi2_1 */ |
| 62141 | case 504: /* *one_cmplsi2_1 */ |
| 62142 | case 503: /* *one_cmplhi2_1 */ |
| 62143 | case 479: /* *negvdi3 */ |
| 62144 | case 478: /* *negvsi3 */ |
| 62145 | case 477: /* *negvhi3 */ |
| 62146 | case 476: /* *negvqi3 */ |
| 62147 | case 475: /* *negsi2_cmpz_zext */ |
| 62148 | case 474: /* *negdi2_cmpz */ |
| 62149 | case 473: /* *negsi2_cmpz */ |
| 62150 | case 472: /* *neghi2_cmpz */ |
| 62151 | case 471: /* *negqi2_cmpz */ |
| 62152 | case 470: /* *negsi2_1_zext */ |
| 62153 | case 469: /* *negdi2_1 */ |
| 62154 | case 468: /* *negsi2_1 */ |
| 62155 | case 467: /* *neghi2_1 */ |
| 62156 | case 466: /* *negqi2_1 */ |
| 62157 | case 450: /* *xorqi_2_slp */ |
| 62158 | case 449: /* *iorqi_2_slp */ |
| 62159 | case 436: /* *xorqi_1_slp */ |
| 62160 | case 435: /* *iorqi_1_slp */ |
| 62161 | case 410: /* *andqi_2_slp */ |
| 62162 | case 403: /* *andqi_1_slp */ |
| 62163 | case 276: /* *subqi_1_slp */ |
| 62164 | case 138: /* zero_extendqihi2_and */ |
| 62165 | case 135: /* zero_extendhisi2_and */ |
| 62166 | case 134: /* zero_extendqisi2_and */ |
| 62167 | case 100: /* *movstricthi_xor */ |
| 62168 | case 99: /* *movstrictqi_xor */ |
| 62169 | case 77: /* *movdi_or */ |
| 62170 | case 76: /* *movsi_or */ |
| 62171 | case 75: /* *movdi_xor */ |
| 62172 | case 74: /* *movsi_xor */ |
| 62173 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) |
| 62174 | { |
| 62175 | return 1; |
| 62176 | } |
| 62177 | else if ((cached_memory == MEMORY_BOTH) || (cached_memory == MEMORY_STORE)) |
| 62178 | { |
| 62179 | return 4; |
| 62180 | } |
| 62181 | else |
| 62182 | { |
| 62183 | return 0; |
| 62184 | } |
| 62185 | |
| 62186 | case 4899: /* vpmultishiftqbv32qi_mask */ |
| 62187 | case 4898: /* vpmultishiftqbv32qi */ |
| 62188 | case 4897: /* vpmultishiftqbv16qi_mask */ |
| 62189 | case 4896: /* vpmultishiftqbv16qi */ |
| 62190 | case 4895: /* vpmultishiftqbv64qi_mask */ |
| 62191 | case 4894: /* vpmultishiftqbv64qi */ |
| 62192 | case 4416: /* vec_set_hi_v32qi */ |
| 62193 | case 4415: /* vec_set_lo_v32qi */ |
| 62194 | case 4414: /* vec_set_hi_v16hi */ |
| 62195 | case 4413: /* vec_set_lo_v16hi */ |
| 62196 | case 4410: /* vec_set_hi_v8si_mask */ |
| 62197 | case 4409: /* vec_set_hi_v8si */ |
| 62198 | case 4406: /* vec_set_lo_v8si_mask */ |
| 62199 | case 4405: /* vec_set_lo_v8si */ |
| 62200 | case 4404: /* vec_set_hi_v4df_mask */ |
| 62201 | case 4403: /* vec_set_hi_v4df */ |
| 62202 | case 4402: /* vec_set_hi_v4di_mask */ |
| 62203 | case 4401: /* vec_set_hi_v4di */ |
| 62204 | case 4400: /* vec_set_lo_v4df_mask */ |
| 62205 | case 4399: /* vec_set_lo_v4df */ |
| 62206 | case 4398: /* vec_set_lo_v4di_mask */ |
| 62207 | case 4397: /* vec_set_lo_v4di */ |
| 62208 | case 4390: /* *avx_vperm2f128v4df_nozero */ |
| 62209 | case 4388: /* *avx_vperm2f128v8si_nozero */ |
| 62210 | case 4387: /* *avx_vperm2f128v4df_full */ |
| 62211 | case 4385: /* *avx_vperm2f128v8si_full */ |
| 62212 | case 4384: /* avx512bw_vpermt2varv32hi3_mask */ |
| 62213 | case 4383: /* avx512vl_vpermt2varv16hi3_mask */ |
| 62214 | case 4382: /* avx512vl_vpermt2varv8hi3_mask */ |
| 62215 | case 4381: /* avx512vl_vpermt2varv32qi3_mask */ |
| 62216 | case 4380: /* avx512vl_vpermt2varv16qi3_mask */ |
| 62217 | case 4379: /* avx512bw_vpermt2varv64qi3_mask */ |
| 62218 | case 4378: /* avx512vl_vpermt2varv2df3_mask */ |
| 62219 | case 4377: /* avx512vl_vpermt2varv2di3_mask */ |
| 62220 | case 4376: /* avx512vl_vpermt2varv4sf3_mask */ |
| 62221 | case 4375: /* avx512vl_vpermt2varv4si3_mask */ |
| 62222 | case 4374: /* avx512vl_vpermt2varv4df3_mask */ |
| 62223 | case 4373: /* avx512vl_vpermt2varv4di3_mask */ |
| 62224 | case 4371: /* avx512vl_vpermt2varv8si3_mask */ |
| 62225 | case 4370: /* avx512f_vpermt2varv8df3_mask */ |
| 62226 | case 4369: /* avx512f_vpermt2varv8di3_mask */ |
| 62227 | case 4368: /* avx512f_vpermt2varv16sf3_mask */ |
| 62228 | case 4367: /* avx512f_vpermt2varv16si3_mask */ |
| 62229 | case 4366: /* avx512bw_vpermt2varv32hi3_maskz_1 */ |
| 62230 | case 4365: /* avx512bw_vpermt2varv32hi3 */ |
| 62231 | case 4364: /* avx512vl_vpermt2varv16hi3_maskz_1 */ |
| 62232 | case 4363: /* avx512vl_vpermt2varv16hi3 */ |
| 62233 | case 4362: /* avx512vl_vpermt2varv8hi3_maskz_1 */ |
| 62234 | case 4361: /* avx512vl_vpermt2varv8hi3 */ |
| 62235 | case 4360: /* avx512vl_vpermt2varv32qi3_maskz_1 */ |
| 62236 | case 4359: /* avx512vl_vpermt2varv32qi3 */ |
| 62237 | case 4358: /* avx512vl_vpermt2varv16qi3_maskz_1 */ |
| 62238 | case 4357: /* avx512vl_vpermt2varv16qi3 */ |
| 62239 | case 4356: /* avx512bw_vpermt2varv64qi3_maskz_1 */ |
| 62240 | case 4355: /* avx512bw_vpermt2varv64qi3 */ |
| 62241 | case 4354: /* avx512vl_vpermt2varv2df3_maskz_1 */ |
| 62242 | case 4353: /* avx512vl_vpermt2varv2df3 */ |
| 62243 | case 4352: /* avx512vl_vpermt2varv2di3_maskz_1 */ |
| 62244 | case 4351: /* avx512vl_vpermt2varv2di3 */ |
| 62245 | case 4350: /* avx512vl_vpermt2varv4sf3_maskz_1 */ |
| 62246 | case 4349: /* avx512vl_vpermt2varv4sf3 */ |
| 62247 | case 4348: /* avx512vl_vpermt2varv4si3_maskz_1 */ |
| 62248 | case 4347: /* avx512vl_vpermt2varv4si3 */ |
| 62249 | case 4346: /* avx512vl_vpermt2varv4df3_maskz_1 */ |
| 62250 | case 4345: /* avx512vl_vpermt2varv4df3 */ |
| 62251 | case 4344: /* avx512vl_vpermt2varv4di3_maskz_1 */ |
| 62252 | case 4343: /* avx512vl_vpermt2varv4di3 */ |
| 62253 | case 4340: /* avx512vl_vpermt2varv8si3_maskz_1 */ |
| 62254 | case 4339: /* avx512vl_vpermt2varv8si3 */ |
| 62255 | case 4338: /* avx512f_vpermt2varv8df3_maskz_1 */ |
| 62256 | case 4337: /* avx512f_vpermt2varv8df3 */ |
| 62257 | case 4336: /* avx512f_vpermt2varv8di3_maskz_1 */ |
| 62258 | case 4335: /* avx512f_vpermt2varv8di3 */ |
| 62259 | case 4334: /* avx512f_vpermt2varv16sf3_maskz_1 */ |
| 62260 | case 4333: /* avx512f_vpermt2varv16sf3 */ |
| 62261 | case 4332: /* avx512f_vpermt2varv16si3_maskz_1 */ |
| 62262 | case 4331: /* avx512f_vpermt2varv16si3 */ |
| 62263 | case 4330: /* avx512bw_vpermi2varv32hi3_mask */ |
| 62264 | case 4329: /* avx512vl_vpermi2varv16hi3_mask */ |
| 62265 | case 4328: /* avx512vl_vpermi2varv8hi3_mask */ |
| 62266 | case 4327: /* avx512vl_vpermi2varv32qi3_mask */ |
| 62267 | case 4326: /* avx512vl_vpermi2varv16qi3_mask */ |
| 62268 | case 4325: /* avx512bw_vpermi2varv64qi3_mask */ |
| 62269 | case 4324: /* avx512vl_vpermi2varv2df3_mask */ |
| 62270 | case 4323: /* avx512vl_vpermi2varv2di3_mask */ |
| 62271 | case 4322: /* avx512vl_vpermi2varv4sf3_mask */ |
| 62272 | case 4321: /* avx512vl_vpermi2varv4si3_mask */ |
| 62273 | case 4320: /* avx512vl_vpermi2varv4df3_mask */ |
| 62274 | case 4319: /* avx512vl_vpermi2varv4di3_mask */ |
| 62275 | case 4317: /* avx512vl_vpermi2varv8si3_mask */ |
| 62276 | case 4316: /* avx512f_vpermi2varv8df3_mask */ |
| 62277 | case 4315: /* avx512f_vpermi2varv8di3_mask */ |
| 62278 | case 4314: /* avx512f_vpermi2varv16sf3_mask */ |
| 62279 | case 4313: /* avx512f_vpermi2varv16si3_mask */ |
| 62280 | case 4312: /* avx512bw_vpermi2varv32hi3_maskz_1 */ |
| 62281 | case 4311: /* avx512bw_vpermi2varv32hi3 */ |
| 62282 | case 4310: /* avx512vl_vpermi2varv16hi3_maskz_1 */ |
| 62283 | case 4309: /* avx512vl_vpermi2varv16hi3 */ |
| 62284 | case 4308: /* avx512vl_vpermi2varv8hi3_maskz_1 */ |
| 62285 | case 4307: /* avx512vl_vpermi2varv8hi3 */ |
| 62286 | case 4306: /* avx512vl_vpermi2varv32qi3_maskz_1 */ |
| 62287 | case 4305: /* avx512vl_vpermi2varv32qi3 */ |
| 62288 | case 4304: /* avx512vl_vpermi2varv16qi3_maskz_1 */ |
| 62289 | case 4303: /* avx512vl_vpermi2varv16qi3 */ |
| 62290 | case 4302: /* avx512bw_vpermi2varv64qi3_maskz_1 */ |
| 62291 | case 4301: /* avx512bw_vpermi2varv64qi3 */ |
| 62292 | case 4300: /* avx512vl_vpermi2varv2df3_maskz_1 */ |
| 62293 | case 4299: /* avx512vl_vpermi2varv2df3 */ |
| 62294 | case 4298: /* avx512vl_vpermi2varv2di3_maskz_1 */ |
| 62295 | case 4297: /* avx512vl_vpermi2varv2di3 */ |
| 62296 | case 4296: /* avx512vl_vpermi2varv4sf3_maskz_1 */ |
| 62297 | case 4295: /* avx512vl_vpermi2varv4sf3 */ |
| 62298 | case 4294: /* avx512vl_vpermi2varv4si3_maskz_1 */ |
| 62299 | case 4293: /* avx512vl_vpermi2varv4si3 */ |
| 62300 | case 4292: /* avx512vl_vpermi2varv4df3_maskz_1 */ |
| 62301 | case 4291: /* avx512vl_vpermi2varv4df3 */ |
| 62302 | case 4290: /* avx512vl_vpermi2varv4di3_maskz_1 */ |
| 62303 | case 4289: /* avx512vl_vpermi2varv4di3 */ |
| 62304 | case 4286: /* avx512vl_vpermi2varv8si3_maskz_1 */ |
| 62305 | case 4285: /* avx512vl_vpermi2varv8si3 */ |
| 62306 | case 4284: /* avx512f_vpermi2varv8df3_maskz_1 */ |
| 62307 | case 4283: /* avx512f_vpermi2varv8df3 */ |
| 62308 | case 4282: /* avx512f_vpermi2varv8di3_maskz_1 */ |
| 62309 | case 4281: /* avx512f_vpermi2varv8di3 */ |
| 62310 | case 4280: /* avx512f_vpermi2varv16sf3_maskz_1 */ |
| 62311 | case 4279: /* avx512f_vpermi2varv16sf3 */ |
| 62312 | case 4278: /* avx512f_vpermi2varv16si3_maskz_1 */ |
| 62313 | case 4277: /* avx512f_vpermi2varv16si3 */ |
| 62314 | case 4276: /* avx_vpermilvarv2df3_mask */ |
| 62315 | case 4275: /* avx_vpermilvarv2df3 */ |
| 62316 | case 4274: /* avx_vpermilvarv4df3_mask */ |
| 62317 | case 4273: /* avx_vpermilvarv4df3 */ |
| 62318 | case 4272: /* avx512f_vpermilvarv8df3_mask */ |
| 62319 | case 4271: /* avx512f_vpermilvarv8df3 */ |
| 62320 | case 4270: /* avx_vpermilvarv4sf3_mask */ |
| 62321 | case 4269: /* avx_vpermilvarv4sf3 */ |
| 62322 | case 4266: /* avx512f_vpermilvarv16sf3_mask */ |
| 62323 | case 4265: /* avx512f_vpermilvarv16sf3 */ |
| 62324 | case 4264: /* *avx_vpermilpv2df_mask */ |
| 62325 | case 4263: /* *avx_vpermilpv2df */ |
| 62326 | case 4262: /* *avx_vpermilpv4df_mask */ |
| 62327 | case 4261: /* *avx_vpermilpv4df */ |
| 62328 | case 4260: /* *avx512f_vpermilpv8df_mask */ |
| 62329 | case 4259: /* *avx512f_vpermilpv8df */ |
| 62330 | case 4258: /* *avx_vpermilpv4sf_mask */ |
| 62331 | case 4257: /* *avx_vpermilpv4sf */ |
| 62332 | case 4254: /* *avx512f_vpermilpv16sf_mask */ |
| 62333 | case 4253: /* *avx512f_vpermilpv16sf */ |
| 62334 | case 4109: /* avx2_permv2ti */ |
| 62335 | case 4108: /* avx512f_permv8di_1_mask */ |
| 62336 | case 4107: /* avx512f_permv8di_1 */ |
| 62337 | case 4106: /* avx512f_permv8df_1_mask */ |
| 62338 | case 4105: /* avx512f_permv8df_1 */ |
| 62339 | case 4104: /* avx2_permv4df_1_mask */ |
| 62340 | case 4103: /* avx2_permv4df_1 */ |
| 62341 | case 4102: /* avx2_permv4di_1_mask */ |
| 62342 | case 4101: /* avx2_permv4di_1 */ |
| 62343 | case 4100: /* avx512bw_permvarv32hi_mask */ |
| 62344 | case 4099: /* avx512bw_permvarv32hi */ |
| 62345 | case 4098: /* avx512vl_permvarv16hi_mask */ |
| 62346 | case 4097: /* avx512vl_permvarv16hi */ |
| 62347 | case 4096: /* avx512vl_permvarv8hi_mask */ |
| 62348 | case 4095: /* avx512vl_permvarv8hi */ |
| 62349 | case 4094: /* avx512vl_permvarv32qi_mask */ |
| 62350 | case 4093: /* avx512vl_permvarv32qi */ |
| 62351 | case 4092: /* avx512vl_permvarv16qi_mask */ |
| 62352 | case 4091: /* avx512vl_permvarv16qi */ |
| 62353 | case 4090: /* avx512bw_permvarv64qi_mask */ |
| 62354 | case 4089: /* avx512bw_permvarv64qi */ |
| 62355 | case 4088: /* avx2_permvarv4df_mask */ |
| 62356 | case 4087: /* avx2_permvarv4df */ |
| 62357 | case 4086: /* avx2_permvarv4di_mask */ |
| 62358 | case 4085: /* avx2_permvarv4di */ |
| 62359 | case 4084: /* avx512f_permvarv8df_mask */ |
| 62360 | case 4083: /* avx512f_permvarv8df */ |
| 62361 | case 4082: /* avx512f_permvarv8di_mask */ |
| 62362 | case 4081: /* avx512f_permvarv8di */ |
| 62363 | case 4080: /* avx512f_permvarv16sf_mask */ |
| 62364 | case 4079: /* avx512f_permvarv16sf */ |
| 62365 | case 4078: /* avx512f_permvarv16si_mask */ |
| 62366 | case 4077: /* avx512f_permvarv16si */ |
| 62367 | case 4074: /* avx2_permvarv8si_mask */ |
| 62368 | case 4073: /* avx2_permvarv8si */ |
| 62369 | case 4043: /* xop_pcom_tfv2di3 */ |
| 62370 | case 4042: /* xop_pcom_tfv4si3 */ |
| 62371 | case 4041: /* xop_pcom_tfv8hi3 */ |
| 62372 | case 4040: /* xop_pcom_tfv16qi3 */ |
| 62373 | case 4039: /* xop_maskcmp_uns2v2di3 */ |
| 62374 | case 4038: /* xop_maskcmp_uns2v4si3 */ |
| 62375 | case 4037: /* xop_maskcmp_uns2v8hi3 */ |
| 62376 | case 4036: /* xop_maskcmp_uns2v16qi3 */ |
| 62377 | case 4035: /* xop_maskcmp_unsv2di3 */ |
| 62378 | case 4034: /* xop_maskcmp_unsv4si3 */ |
| 62379 | case 4033: /* xop_maskcmp_unsv8hi3 */ |
| 62380 | case 4032: /* xop_maskcmp_unsv16qi3 */ |
| 62381 | case 3890: /* ptesttf2 */ |
| 62382 | case 3889: /* avx_ptestv4df */ |
| 62383 | case 3888: /* avx_ptestv8sf */ |
| 62384 | case 3887: /* avx_ptestv4di */ |
| 62385 | case 3886: /* avx_ptestv8si */ |
| 62386 | case 3885: /* avx_ptestv16hi */ |
| 62387 | case 3884: /* avx_ptestv32qi */ |
| 62388 | case 3883: /* sse4_1_ptestv2df */ |
| 62389 | case 3882: /* sse4_1_ptestv4sf */ |
| 62390 | case 3881: /* sse4_1_ptestv2di */ |
| 62391 | case 3880: /* sse4_1_ptestv4si */ |
| 62392 | case 3879: /* sse4_1_ptestv8hi */ |
| 62393 | case 3878: /* sse4_1_ptestv16qi */ |
| 62394 | case 3877: /* avx_vtestpd */ |
| 62395 | case 3876: /* avx_vtestpd256 */ |
| 62396 | case 3875: /* avx_vtestps */ |
| 62397 | case 3874: /* avx_vtestps256 */ |
| 62398 | case 3794: /* sse4_1_packusdw_mask */ |
| 62399 | case 3793: /* sse4_1_packusdw */ |
| 62400 | case 3792: /* avx2_packusdw_mask */ |
| 62401 | case 3791: /* avx2_packusdw */ |
| 62402 | case 3790: /* avx512bw_packusdw_mask */ |
| 62403 | case 3789: /* avx512bw_packusdw */ |
| 62404 | case 3619: /* sse2_pshufhw_1_mask */ |
| 62405 | case 3618: /* sse2_pshufhw_1 */ |
| 62406 | case 3617: /* avx2_pshufhw_1_mask */ |
| 62407 | case 3616: /* avx2_pshufhw_1 */ |
| 62408 | case 3615: /* avx512bw_pshufhwv32hi_mask */ |
| 62409 | case 3614: /* *avx512bw_pshufhwv32hi */ |
| 62410 | case 3613: /* sse2_pshuflw_1_mask */ |
| 62411 | case 3612: /* sse2_pshuflw_1 */ |
| 62412 | case 3611: /* avx2_pshuflw_1_mask */ |
| 62413 | case 3610: /* avx2_pshuflw_1 */ |
| 62414 | case 3609: /* avx512bw_pshuflwv32hi_mask */ |
| 62415 | case 3608: /* *avx512bw_pshuflwv32hi */ |
| 62416 | case 3601: /* avx512f_shuf_i32x4_1_mask */ |
| 62417 | case 3600: /* avx512f_shuf_i32x4_1 */ |
| 62418 | case 3599: /* avx512f_shuf_f32x4_1_mask */ |
| 62419 | case 3598: /* avx512f_shuf_f32x4_1 */ |
| 62420 | case 3595: /* avx512vl_shuf_i32x4_1_mask */ |
| 62421 | case 3594: /* avx512vl_shuf_i32x4_1 */ |
| 62422 | case 3593: /* avx512f_shuf_i64x2_1_mask */ |
| 62423 | case 3592: /* avx512f_shuf_i64x2_1 */ |
| 62424 | case 3591: /* avx512f_shuf_f64x2_1_mask */ |
| 62425 | case 3590: /* avx512f_shuf_f64x2_1 */ |
| 62426 | case 3589: /* avx512dq_shuf_f64x2_1_mask */ |
| 62427 | case 3588: /* *avx512dq_shuf_f64x2_1 */ |
| 62428 | case 3587: /* avx512dq_shuf_i64x2_1_mask */ |
| 62429 | case 3586: /* *avx512dq_shuf_i64x2_1 */ |
| 62430 | case 3585: /* vec_set_hi_v8di_mask */ |
| 62431 | case 3584: /* vec_set_hi_v8di */ |
| 62432 | case 3583: /* vec_set_hi_v8df_mask */ |
| 62433 | case 3582: /* vec_set_hi_v8df */ |
| 62434 | case 3581: /* vec_set_lo_v8di_mask */ |
| 62435 | case 3580: /* vec_set_lo_v8di */ |
| 62436 | case 3579: /* vec_set_lo_v8df_mask */ |
| 62437 | case 3578: /* vec_set_lo_v8df */ |
| 62438 | case 3577: /* vec_set_hi_v16si_mask */ |
| 62439 | case 3576: /* vec_set_hi_v16si */ |
| 62440 | case 3575: /* vec_set_hi_v16sf_mask */ |
| 62441 | case 3574: /* vec_set_hi_v16sf */ |
| 62442 | case 3573: /* vec_set_lo_v16si_mask */ |
| 62443 | case 3572: /* vec_set_lo_v16si */ |
| 62444 | case 3571: /* vec_set_lo_v16sf_mask */ |
| 62445 | case 3570: /* vec_set_lo_v16sf */ |
| 62446 | case 3569: /* avx512f_vinserti32x4_1_mask */ |
| 62447 | case 3568: /* *avx512f_vinserti32x4_1 */ |
| 62448 | case 3567: /* avx512f_vinsertf32x4_1_mask */ |
| 62449 | case 3566: /* *avx512f_vinsertf32x4_1 */ |
| 62450 | case 3565: /* avx512dq_vinserti64x2_1_mask */ |
| 62451 | case 3564: /* *avx512dq_vinserti64x2_1 */ |
| 62452 | case 3563: /* avx512dq_vinsertf64x2_1_mask */ |
| 62453 | case 3562: /* *avx512dq_vinsertf64x2_1 */ |
| 62454 | case 3561: /* sse4_1_pinsrq */ |
| 62455 | case 3560: /* sse4_1_pinsrd */ |
| 62456 | case 3559: /* sse2_pinsrw */ |
| 62457 | case 3558: /* sse4_1_pinsrb */ |
| 62458 | case 3557: /* vec_interleave_lowv4si_mask */ |
| 62459 | case 3556: /* vec_interleave_lowv4si */ |
| 62460 | case 3555: /* avx512f_interleave_lowv16si_mask */ |
| 62461 | case 3554: /* *avx512f_interleave_lowv16si */ |
| 62462 | case 3553: /* avx2_interleave_lowv8si_mask */ |
| 62463 | case 3552: /* avx2_interleave_lowv8si */ |
| 62464 | case 3551: /* vec_interleave_highv4si_mask */ |
| 62465 | case 3550: /* vec_interleave_highv4si */ |
| 62466 | case 3549: /* avx512f_interleave_highv16si_mask */ |
| 62467 | case 3548: /* *avx512f_interleave_highv16si */ |
| 62468 | case 3547: /* avx2_interleave_highv8si_mask */ |
| 62469 | case 3546: /* avx2_interleave_highv8si */ |
| 62470 | case 3545: /* vec_interleave_lowv8hi_mask */ |
| 62471 | case 3544: /* vec_interleave_lowv8hi */ |
| 62472 | case 3543: /* avx2_interleave_lowv16hi_mask */ |
| 62473 | case 3542: /* avx2_interleave_lowv16hi */ |
| 62474 | case 3541: /* avx512bw_interleave_lowv32hi_mask */ |
| 62475 | case 3540: /* *avx512bw_interleave_lowv32hi */ |
| 62476 | case 3539: /* vec_interleave_highv8hi_mask */ |
| 62477 | case 3538: /* vec_interleave_highv8hi */ |
| 62478 | case 3537: /* avx2_interleave_highv16hi_mask */ |
| 62479 | case 3536: /* avx2_interleave_highv16hi */ |
| 62480 | case 3535: /* avx512bw_interleave_highv32hi_mask */ |
| 62481 | case 3534: /* avx512bw_interleave_highv32hi */ |
| 62482 | case 3533: /* vec_interleave_lowv16qi_mask */ |
| 62483 | case 3532: /* vec_interleave_lowv16qi */ |
| 62484 | case 3531: /* avx2_interleave_lowv32qi_mask */ |
| 62485 | case 3530: /* avx2_interleave_lowv32qi */ |
| 62486 | case 3529: /* avx512bw_interleave_lowv64qi_mask */ |
| 62487 | case 3528: /* avx512bw_interleave_lowv64qi */ |
| 62488 | case 3527: /* vec_interleave_highv16qi_mask */ |
| 62489 | case 3526: /* vec_interleave_highv16qi */ |
| 62490 | case 3525: /* avx2_interleave_highv32qi_mask */ |
| 62491 | case 3524: /* avx2_interleave_highv32qi */ |
| 62492 | case 3523: /* avx512bw_interleave_highv64qi_mask */ |
| 62493 | case 3522: /* avx512bw_interleave_highv64qi */ |
| 62494 | case 3521: /* sse2_packuswb_mask */ |
| 62495 | case 3520: /* sse2_packuswb */ |
| 62496 | case 3519: /* avx2_packuswb_mask */ |
| 62497 | case 3518: /* avx2_packuswb */ |
| 62498 | case 3517: /* avx512bw_packuswb_mask */ |
| 62499 | case 3516: /* avx512bw_packuswb */ |
| 62500 | case 3515: /* sse2_packssdw_mask */ |
| 62501 | case 3514: /* sse2_packssdw */ |
| 62502 | case 3513: /* avx2_packssdw_mask */ |
| 62503 | case 3512: /* avx2_packssdw */ |
| 62504 | case 3511: /* avx512bw_packssdw_mask */ |
| 62505 | case 3510: /* avx512bw_packssdw */ |
| 62506 | case 3509: /* sse2_packsswb_mask */ |
| 62507 | case 3508: /* sse2_packsswb */ |
| 62508 | case 3507: /* avx2_packsswb_mask */ |
| 62509 | case 3506: /* avx2_packsswb */ |
| 62510 | case 3505: /* avx512bw_packsswb_mask */ |
| 62511 | case 3504: /* avx512bw_packsswb */ |
| 62512 | case 3401: /* *andnotv2di3_mask */ |
| 62513 | case 3400: /* *andnotv4di3_mask */ |
| 62514 | case 3399: /* *andnotv8di3_mask */ |
| 62515 | case 3398: /* *andnotv4si3_mask */ |
| 62516 | case 3397: /* *andnotv8si3_mask */ |
| 62517 | case 3396: /* *andnotv16si3_mask */ |
| 62518 | case 3383: /* sse2_gtv4si3 */ |
| 62519 | case 3382: /* sse2_gtv8hi3 */ |
| 62520 | case 3381: /* sse2_gtv16qi3 */ |
| 62521 | case 3380: /* avx512vl_gtv8hi3_mask */ |
| 62522 | case 3379: /* avx512vl_gtv8hi3 */ |
| 62523 | case 3378: /* avx512vl_gtv16hi3_mask */ |
| 62524 | case 3377: /* avx512vl_gtv16hi3 */ |
| 62525 | case 3376: /* avx512bw_gtv32hi3_mask */ |
| 62526 | case 3375: /* avx512bw_gtv32hi3 */ |
| 62527 | case 3374: /* avx512vl_gtv32qi3_mask */ |
| 62528 | case 3373: /* avx512vl_gtv32qi3 */ |
| 62529 | case 3372: /* avx512vl_gtv16qi3_mask */ |
| 62530 | case 3371: /* avx512vl_gtv16qi3 */ |
| 62531 | case 3370: /* avx512bw_gtv64qi3_mask */ |
| 62532 | case 3369: /* avx512bw_gtv64qi3 */ |
| 62533 | case 3368: /* avx512vl_gtv2di3_mask */ |
| 62534 | case 3367: /* avx512vl_gtv2di3 */ |
| 62535 | case 3366: /* avx512vl_gtv4di3_mask */ |
| 62536 | case 3365: /* avx512vl_gtv4di3 */ |
| 62537 | case 3364: /* avx512f_gtv8di3_mask */ |
| 62538 | case 3363: /* avx512f_gtv8di3 */ |
| 62539 | case 3362: /* avx512vl_gtv4si3_mask */ |
| 62540 | case 3361: /* avx512vl_gtv4si3 */ |
| 62541 | case 3360: /* avx512vl_gtv8si3_mask */ |
| 62542 | case 3359: /* avx512vl_gtv8si3 */ |
| 62543 | case 3358: /* avx512f_gtv16si3_mask */ |
| 62544 | case 3357: /* avx512f_gtv16si3 */ |
| 62545 | case 3356: /* avx2_gtv4di3 */ |
| 62546 | case 3355: /* avx2_gtv8si3 */ |
| 62547 | case 3354: /* avx2_gtv16hi3 */ |
| 62548 | case 3353: /* avx2_gtv32qi3 */ |
| 62549 | case 3352: /* sse4_2_gtv2di3 */ |
| 62550 | case 3351: /* *sse2_eqv4si3 */ |
| 62551 | case 3350: /* *sse2_eqv8hi3 */ |
| 62552 | case 3349: /* *sse2_eqv16qi3 */ |
| 62553 | case 3348: /* *sse4_1_eqv2di3 */ |
| 62554 | case 3347: /* avx512vl_eqv2di3_mask_1 */ |
| 62555 | case 3346: /* avx512vl_eqv2di3_1 */ |
| 62556 | case 3345: /* avx512vl_eqv4di3_mask_1 */ |
| 62557 | case 3344: /* avx512vl_eqv4di3_1 */ |
| 62558 | case 3343: /* avx512f_eqv8di3_mask_1 */ |
| 62559 | case 3342: /* avx512f_eqv8di3_1 */ |
| 62560 | case 3341: /* avx512vl_eqv4si3_mask_1 */ |
| 62561 | case 3340: /* avx512vl_eqv4si3_1 */ |
| 62562 | case 3339: /* avx512vl_eqv8si3_mask_1 */ |
| 62563 | case 3338: /* avx512vl_eqv8si3_1 */ |
| 62564 | case 3337: /* avx512f_eqv16si3_mask_1 */ |
| 62565 | case 3336: /* avx512f_eqv16si3_1 */ |
| 62566 | case 3335: /* avx512vl_eqv8hi3_mask_1 */ |
| 62567 | case 3334: /* avx512vl_eqv8hi3_1 */ |
| 62568 | case 3333: /* avx512vl_eqv16hi3_mask_1 */ |
| 62569 | case 3332: /* avx512vl_eqv16hi3_1 */ |
| 62570 | case 3331: /* avx512bw_eqv32hi3_mask_1 */ |
| 62571 | case 3330: /* avx512bw_eqv32hi3_1 */ |
| 62572 | case 3329: /* avx512vl_eqv32qi3_mask_1 */ |
| 62573 | case 3328: /* avx512vl_eqv32qi3_1 */ |
| 62574 | case 3327: /* avx512vl_eqv16qi3_mask_1 */ |
| 62575 | case 3326: /* avx512vl_eqv16qi3_1 */ |
| 62576 | case 3325: /* avx512bw_eqv64qi3_mask_1 */ |
| 62577 | case 3324: /* avx512bw_eqv64qi3_1 */ |
| 62578 | case 3323: /* *avx2_eqv4di3 */ |
| 62579 | case 3322: /* *avx2_eqv8si3 */ |
| 62580 | case 3321: /* *avx2_eqv16hi3 */ |
| 62581 | case 3320: /* *avx2_eqv32qi3 */ |
| 62582 | case 2725: /* sse2_shufpd_v2df */ |
| 62583 | case 2724: /* sse2_shufpd_v2di */ |
| 62584 | case 2723: /* vec_interleave_lowv2di_mask */ |
| 62585 | case 2722: /* vec_interleave_lowv2di */ |
| 62586 | case 2721: /* avx512f_interleave_lowv8di_mask */ |
| 62587 | case 2720: /* *avx512f_interleave_lowv8di */ |
| 62588 | case 2719: /* avx2_interleave_lowv4di_mask */ |
| 62589 | case 2718: /* avx2_interleave_lowv4di */ |
| 62590 | case 2717: /* vec_interleave_highv2di_mask */ |
| 62591 | case 2716: /* vec_interleave_highv2di */ |
| 62592 | case 2715: /* avx512f_interleave_highv8di_mask */ |
| 62593 | case 2714: /* *avx512f_interleave_highv8di */ |
| 62594 | case 2713: /* avx2_interleave_highv4di_mask */ |
| 62595 | case 2712: /* avx2_interleave_highv4di */ |
| 62596 | case 2711: /* sse2_shufpd_v2df_mask */ |
| 62597 | case 2710: /* avx_shufpd256_1_mask */ |
| 62598 | case 2709: /* avx_shufpd256_1 */ |
| 62599 | case 2708: /* avx512f_shufpd512_1_mask */ |
| 62600 | case 2707: /* avx512f_shufpd512_1 */ |
| 62601 | case 2706: /* avx512f_shufps512_1_mask */ |
| 62602 | case 2705: /* avx512f_shufps512_1 */ |
| 62603 | case 2588: /* avx512vl_vternlogv2di_mask */ |
| 62604 | case 2587: /* avx512vl_vternlogv4di_mask */ |
| 62605 | case 2586: /* avx512f_vternlogv8di_mask */ |
| 62606 | case 2585: /* avx512vl_vternlogv4si_mask */ |
| 62607 | case 2584: /* avx512vl_vternlogv8si_mask */ |
| 62608 | case 2583: /* avx512f_vternlogv16si_mask */ |
| 62609 | case 2582: /* avx512vl_vternlogv2di_maskz_1 */ |
| 62610 | case 2581: /* avx512vl_vternlogv2di */ |
| 62611 | case 2580: /* avx512vl_vternlogv4di_maskz_1 */ |
| 62612 | case 2579: /* avx512vl_vternlogv4di */ |
| 62613 | case 2578: /* avx512f_vternlogv8di_maskz_1 */ |
| 62614 | case 2577: /* avx512f_vternlogv8di */ |
| 62615 | case 2576: /* avx512vl_vternlogv4si_maskz_1 */ |
| 62616 | case 2575: /* avx512vl_vternlogv4si */ |
| 62617 | case 2574: /* avx512vl_vternlogv8si_maskz_1 */ |
| 62618 | case 2573: /* avx512vl_vternlogv8si */ |
| 62619 | case 2572: /* avx512f_vternlogv16si_maskz_1 */ |
| 62620 | case 2571: /* avx512f_vternlogv16si */ |
| 62621 | case 2541: /* avx512vl_unpcklpd128_mask */ |
| 62622 | case 2540: /* *avx_unpcklpd256_mask */ |
| 62623 | case 2539: /* *avx_unpcklpd256 */ |
| 62624 | case 2538: /* *avx512f_unpcklpd512_mask */ |
| 62625 | case 2537: /* *avx512f_unpcklpd512 */ |
| 62626 | case 2535: /* avx512vl_unpckhpd128_mask */ |
| 62627 | case 2534: /* avx_unpckhpd256_mask */ |
| 62628 | case 2533: /* avx_unpckhpd256 */ |
| 62629 | case 2532: /* avx512f_unpckhpd512_mask */ |
| 62630 | case 2531: /* *avx512f_unpckhpd512 */ |
| 62631 | case 2465: /* sse4_1_insertps */ |
| 62632 | case 2464: /* *vec_setv4sf_sse4_1 */ |
| 62633 | case 2448: /* sse_shufps_v4sf */ |
| 62634 | case 2447: /* sse_shufps_v4si */ |
| 62635 | case 2446: /* sse_shufps_v4sf_mask */ |
| 62636 | case 2431: /* vec_interleave_lowv4sf */ |
| 62637 | case 2430: /* unpcklps128_mask */ |
| 62638 | case 2427: /* avx512f_unpcklps512_mask */ |
| 62639 | case 2426: /* *avx512f_unpcklps512 */ |
| 62640 | case 2425: /* vec_interleave_highv4sf_mask */ |
| 62641 | case 2424: /* vec_interleave_highv4sf */ |
| 62642 | case 2421: /* avx512f_unpckhps512_mask */ |
| 62643 | case 2420: /* *avx512f_unpckhps512 */ |
| 62644 | case 1800: /* *xortf3 */ |
| 62645 | case 1799: /* *iortf3 */ |
| 62646 | case 1798: /* *andtf3 */ |
| 62647 | case 1797: /* *xordf3 */ |
| 62648 | case 1796: /* *iordf3 */ |
| 62649 | case 1795: /* *anddf3 */ |
| 62650 | case 1794: /* *xorsf3 */ |
| 62651 | case 1793: /* *iorsf3 */ |
| 62652 | case 1792: /* *andsf3 */ |
| 62653 | case 1791: /* *andnottf3 */ |
| 62654 | case 1790: /* *andnotdf3 */ |
| 62655 | case 1789: /* *andnotsf3 */ |
| 62656 | case 1788: /* *xorv8df3_mask */ |
| 62657 | case 1787: /* *xorv8df3 */ |
| 62658 | case 1786: /* *iorv8df3_mask */ |
| 62659 | case 1785: /* *iorv8df3 */ |
| 62660 | case 1784: /* *andv8df3_mask */ |
| 62661 | case 1783: /* *andv8df3 */ |
| 62662 | case 1782: /* *xorv16sf3_mask */ |
| 62663 | case 1781: /* *xorv16sf3 */ |
| 62664 | case 1780: /* *iorv16sf3_mask */ |
| 62665 | case 1779: /* *iorv16sf3 */ |
| 62666 | case 1778: /* *andv16sf3_mask */ |
| 62667 | case 1777: /* *andv16sf3 */ |
| 62668 | case 1776: /* *xorv2df3_mask */ |
| 62669 | case 1775: /* *xorv2df3 */ |
| 62670 | case 1774: /* *iorv2df3_mask */ |
| 62671 | case 1773: /* *iorv2df3 */ |
| 62672 | case 1772: /* *andv2df3_mask */ |
| 62673 | case 1771: /* *andv2df3 */ |
| 62674 | case 1764: /* *xorv4sf3_mask */ |
| 62675 | case 1763: /* *xorv4sf3 */ |
| 62676 | case 1762: /* *iorv4sf3_mask */ |
| 62677 | case 1761: /* *iorv4sf3 */ |
| 62678 | case 1760: /* *andv4sf3_mask */ |
| 62679 | case 1759: /* *andv4sf3 */ |
| 62680 | case 1752: /* avx512f_andnotv8df3_mask */ |
| 62681 | case 1751: /* avx512f_andnotv8df3 */ |
| 62682 | case 1750: /* avx512f_andnotv16sf3_mask */ |
| 62683 | case 1749: /* avx512f_andnotv16sf3 */ |
| 62684 | case 1748: /* sse2_andnotv2df3_mask */ |
| 62685 | case 1747: /* sse2_andnotv2df3 */ |
| 62686 | case 1744: /* sse_andnotv4sf3_mask */ |
| 62687 | case 1743: /* sse_andnotv4sf3 */ |
| 62688 | case 1740: /* sse2_ucomi_round */ |
| 62689 | case 1739: /* sse2_ucomi */ |
| 62690 | case 1738: /* sse_ucomi_round */ |
| 62691 | case 1737: /* sse_ucomi */ |
| 62692 | case 1736: /* sse2_comi_round */ |
| 62693 | case 1735: /* sse2_comi */ |
| 62694 | case 1734: /* sse_comi_round */ |
| 62695 | case 1733: /* sse_comi */ |
| 62696 | case 1732: /* avx512f_maskcmpv2df3 */ |
| 62697 | case 1731: /* avx512f_maskcmpv4df3 */ |
| 62698 | case 1730: /* avx512f_maskcmpv8df3 */ |
| 62699 | case 1729: /* avx512f_maskcmpv4sf3 */ |
| 62700 | case 1728: /* avx512f_maskcmpv8sf3 */ |
| 62701 | case 1727: /* avx512f_maskcmpv16sf3 */ |
| 62702 | case 1726: /* avx512f_vmcmpv2df3_mask_round */ |
| 62703 | case 1725: /* avx512f_vmcmpv2df3_mask */ |
| 62704 | case 1724: /* avx512f_vmcmpv4sf3_mask_round */ |
| 62705 | case 1723: /* avx512f_vmcmpv4sf3_mask */ |
| 62706 | case 1722: /* avx512f_vmcmpv2df3_round */ |
| 62707 | case 1721: /* avx512f_vmcmpv2df3 */ |
| 62708 | case 1720: /* avx512f_vmcmpv4sf3_round */ |
| 62709 | case 1719: /* avx512f_vmcmpv4sf3 */ |
| 62710 | case 1718: /* avx512vl_ucmpv2di3_mask */ |
| 62711 | case 1717: /* avx512vl_ucmpv2di3 */ |
| 62712 | case 1716: /* avx512vl_ucmpv4di3_mask */ |
| 62713 | case 1715: /* avx512vl_ucmpv4di3 */ |
| 62714 | case 1714: /* avx512f_ucmpv8di3_mask */ |
| 62715 | case 1713: /* avx512f_ucmpv8di3 */ |
| 62716 | case 1712: /* avx512vl_ucmpv4si3_mask */ |
| 62717 | case 1711: /* avx512vl_ucmpv4si3 */ |
| 62718 | case 1710: /* avx512vl_ucmpv8si3_mask */ |
| 62719 | case 1709: /* avx512vl_ucmpv8si3 */ |
| 62720 | case 1708: /* avx512f_ucmpv16si3_mask */ |
| 62721 | case 1707: /* avx512f_ucmpv16si3 */ |
| 62722 | case 1706: /* avx512vl_ucmpv8hi3_mask */ |
| 62723 | case 1705: /* avx512vl_ucmpv8hi3 */ |
| 62724 | case 1704: /* avx512vl_ucmpv16hi3_mask */ |
| 62725 | case 1703: /* avx512vl_ucmpv16hi3 */ |
| 62726 | case 1702: /* avx512bw_ucmpv32hi3_mask */ |
| 62727 | case 1701: /* avx512bw_ucmpv32hi3 */ |
| 62728 | case 1700: /* avx512vl_ucmpv32qi3_mask */ |
| 62729 | case 1699: /* avx512vl_ucmpv32qi3 */ |
| 62730 | case 1698: /* avx512vl_ucmpv16qi3_mask */ |
| 62731 | case 1697: /* avx512vl_ucmpv16qi3 */ |
| 62732 | case 1696: /* avx512bw_ucmpv64qi3_mask */ |
| 62733 | case 1695: /* avx512bw_ucmpv64qi3 */ |
| 62734 | case 1694: /* avx512vl_cmpv8hi3_mask */ |
| 62735 | case 1693: /* avx512vl_cmpv8hi3 */ |
| 62736 | case 1692: /* avx512vl_cmpv16hi3_mask */ |
| 62737 | case 1691: /* avx512vl_cmpv16hi3 */ |
| 62738 | case 1690: /* avx512bw_cmpv32hi3_mask */ |
| 62739 | case 1689: /* avx512bw_cmpv32hi3 */ |
| 62740 | case 1688: /* avx512vl_cmpv32qi3_mask */ |
| 62741 | case 1687: /* avx512vl_cmpv32qi3 */ |
| 62742 | case 1686: /* avx512vl_cmpv16qi3_mask */ |
| 62743 | case 1685: /* avx512vl_cmpv16qi3 */ |
| 62744 | case 1684: /* avx512bw_cmpv64qi3_mask */ |
| 62745 | case 1683: /* avx512bw_cmpv64qi3 */ |
| 62746 | case 1682: /* avx512vl_cmpv2df3_mask */ |
| 62747 | case 1681: /* avx512vl_cmpv2df3 */ |
| 62748 | case 1680: /* avx512vl_cmpv4df3_mask */ |
| 62749 | case 1679: /* avx512vl_cmpv4df3 */ |
| 62750 | case 1678: /* avx512f_cmpv8df3_mask_round */ |
| 62751 | case 1677: /* avx512f_cmpv8df3_round */ |
| 62752 | case 1676: /* avx512f_cmpv8df3_mask */ |
| 62753 | case 1675: /* avx512f_cmpv8df3 */ |
| 62754 | case 1674: /* avx512vl_cmpv4sf3_mask */ |
| 62755 | case 1673: /* avx512vl_cmpv4sf3 */ |
| 62756 | case 1672: /* avx512vl_cmpv8sf3_mask */ |
| 62757 | case 1671: /* avx512vl_cmpv8sf3 */ |
| 62758 | case 1670: /* avx512f_cmpv16sf3_mask_round */ |
| 62759 | case 1669: /* avx512f_cmpv16sf3_round */ |
| 62760 | case 1668: /* avx512f_cmpv16sf3_mask */ |
| 62761 | case 1667: /* avx512f_cmpv16sf3 */ |
| 62762 | case 1666: /* avx512vl_cmpv2di3_mask */ |
| 62763 | case 1665: /* avx512vl_cmpv2di3 */ |
| 62764 | case 1664: /* avx512vl_cmpv4di3_mask */ |
| 62765 | case 1663: /* avx512vl_cmpv4di3 */ |
| 62766 | case 1662: /* avx512f_cmpv8di3_mask_round */ |
| 62767 | case 1661: /* avx512f_cmpv8di3_round */ |
| 62768 | case 1660: /* avx512f_cmpv8di3_mask */ |
| 62769 | case 1659: /* avx512f_cmpv8di3 */ |
| 62770 | case 1658: /* avx512vl_cmpv4si3_mask */ |
| 62771 | case 1657: /* avx512vl_cmpv4si3 */ |
| 62772 | case 1656: /* avx512vl_cmpv8si3_mask */ |
| 62773 | case 1655: /* avx512vl_cmpv8si3 */ |
| 62774 | case 1654: /* avx512f_cmpv16si3_mask_round */ |
| 62775 | case 1653: /* avx512f_cmpv16si3_round */ |
| 62776 | case 1652: /* avx512f_cmpv16si3_mask */ |
| 62777 | case 1651: /* avx512f_cmpv16si3 */ |
| 62778 | case 1650: /* sse2_vmmaskcmpv2df3 */ |
| 62779 | case 1649: /* sse_vmmaskcmpv4sf3 */ |
| 62780 | case 1648: /* sse2_maskcmpv2df3 */ |
| 62781 | case 1647: /* avx_maskcmpv4df3 */ |
| 62782 | case 1646: /* sse_maskcmpv4sf3 */ |
| 62783 | case 1645: /* avx_maskcmpv8sf3 */ |
| 62784 | case 1644: /* *sse2_maskcmpv2df3_comm */ |
| 62785 | case 1643: /* *avx_maskcmpv4df3_comm */ |
| 62786 | case 1642: /* *sse_maskcmpv4sf3_comm */ |
| 62787 | case 1641: /* *avx_maskcmpv8sf3_comm */ |
| 62788 | case 1640: /* avx_vmcmpv2df3 */ |
| 62789 | case 1639: /* avx_vmcmpv4sf3 */ |
| 62790 | case 1638: /* avx_cmpv2df3 */ |
| 62791 | case 1637: /* avx_cmpv4df3 */ |
| 62792 | case 1636: /* avx_cmpv4sf3 */ |
| 62793 | case 1635: /* avx_cmpv8sf3 */ |
| 62794 | case 626: /* setcc_df_sse */ |
| 62795 | case 625: /* setcc_sf_sse */ |
| 62796 | case 54: /* *cmpiuxf_i387 */ |
| 62797 | case 53: /* *cmpixf_i387 */ |
| 62798 | if (get_attr_memory (insn) == MEMORY_LOAD) |
| 62799 | { |
| 62800 | return 6; |
| 62801 | } |
| 62802 | else |
| 62803 | { |
| 62804 | return 2; |
| 62805 | } |
| 62806 | |
| 62807 | case 4984: /* atomic_bit_test_and_resetdi_1 */ |
| 62808 | case 4983: /* atomic_bit_test_and_resetsi_1 */ |
| 62809 | case 4982: /* atomic_bit_test_and_resethi_1 */ |
| 62810 | case 4981: /* atomic_bit_test_and_complementdi_1 */ |
| 62811 | case 4980: /* atomic_bit_test_and_complementsi_1 */ |
| 62812 | case 4979: /* atomic_bit_test_and_complementhi_1 */ |
| 62813 | case 4978: /* atomic_bit_test_and_setdi_1 */ |
| 62814 | case 4977: /* atomic_bit_test_and_setsi_1 */ |
| 62815 | case 4976: /* atomic_bit_test_and_sethi_1 */ |
| 62816 | case 4975: /* atomic_xordi */ |
| 62817 | case 4974: /* atomic_ordi */ |
| 62818 | case 4973: /* atomic_anddi */ |
| 62819 | case 4972: /* atomic_xorsi */ |
| 62820 | case 4971: /* atomic_orsi */ |
| 62821 | case 4970: /* atomic_andsi */ |
| 62822 | case 4969: /* atomic_xorhi */ |
| 62823 | case 4968: /* atomic_orhi */ |
| 62824 | case 4967: /* atomic_andhi */ |
| 62825 | case 4966: /* atomic_xorqi */ |
| 62826 | case 4965: /* atomic_orqi */ |
| 62827 | case 4964: /* atomic_andqi */ |
| 62828 | case 4963: /* atomic_subdi */ |
| 62829 | case 4962: /* atomic_subsi */ |
| 62830 | case 4961: /* atomic_subhi */ |
| 62831 | case 4960: /* atomic_subqi */ |
| 62832 | case 4959: /* atomic_adddi */ |
| 62833 | case 4958: /* atomic_addsi */ |
| 62834 | case 4957: /* atomic_addhi */ |
| 62835 | case 4956: /* atomic_addqi */ |
| 62836 | case 4955: /* atomic_exchangedi */ |
| 62837 | case 4954: /* atomic_exchangesi */ |
| 62838 | case 4953: /* atomic_exchangehi */ |
| 62839 | case 4952: /* atomic_exchangeqi */ |
| 62840 | case 4951: /* *atomic_fetch_add_cmpdi */ |
| 62841 | case 4950: /* *atomic_fetch_add_cmpsi */ |
| 62842 | case 4949: /* *atomic_fetch_add_cmphi */ |
| 62843 | case 4948: /* *atomic_fetch_add_cmpqi */ |
| 62844 | case 4947: /* atomic_fetch_adddi */ |
| 62845 | case 4946: /* atomic_fetch_addsi */ |
| 62846 | case 4945: /* atomic_fetch_addhi */ |
| 62847 | case 4944: /* atomic_fetch_addqi */ |
| 62848 | case 4943: /* atomic_compare_and_swapdi_1 */ |
| 62849 | case 4942: /* atomic_compare_and_swapsi_1 */ |
| 62850 | case 4941: /* atomic_compare_and_swaphi_1 */ |
| 62851 | case 4940: /* atomic_compare_and_swapqi_1 */ |
| 62852 | case 4939: /* atomic_compare_and_swapti_doubleword */ |
| 62853 | case 4938: /* atomic_compare_and_swapdi_doubleword */ |
| 62854 | case 4933: /* atomic_storedi_fpu */ |
| 62855 | case 4932: /* atomic_storedi_1 */ |
| 62856 | case 4931: /* atomic_storesi_1 */ |
| 62857 | case 4930: /* atomic_storehi_1 */ |
| 62858 | case 4929: /* atomic_storeqi_1 */ |
| 62859 | case 4928: /* atomic_loaddi_fpu */ |
| 62860 | case 4927: /* mfence_nosse */ |
| 62861 | case 4923: /* vpopcountv8di_mask */ |
| 62862 | case 4922: /* vpopcountv8di */ |
| 62863 | case 4921: /* vpopcountv16si_mask */ |
| 62864 | case 4920: /* vpopcountv16si */ |
| 62865 | case 4901: /* *movv64si_internal */ |
| 62866 | case 4900: /* *movv64sf_internal */ |
| 62867 | case 4875: /* avx512f_pd512_256pd */ |
| 62868 | case 4874: /* avx512f_ps512_256ps */ |
| 62869 | case 4873: /* avx512f_si512_256si */ |
| 62870 | case 4872: /* avx512f_pd512_pd */ |
| 62871 | case 4871: /* avx512f_ps512_ps */ |
| 62872 | case 4870: /* avx512f_si512_si */ |
| 62873 | case 4832: /* avx512f_vgetmantv2df_round */ |
| 62874 | case 4831: /* avx512f_vgetmantv2df */ |
| 62875 | case 4830: /* avx512f_vgetmantv4sf_round */ |
| 62876 | case 4829: /* avx512f_vgetmantv4sf */ |
| 62877 | case 4828: /* avx512vl_getmantv2df_mask_round */ |
| 62878 | case 4827: /* avx512vl_getmantv2df_mask */ |
| 62879 | case 4826: /* avx512vl_getmantv2df_round */ |
| 62880 | case 4825: /* avx512vl_getmantv2df */ |
| 62881 | case 4824: /* avx512vl_getmantv4df_mask_round */ |
| 62882 | case 4823: /* avx512vl_getmantv4df_mask */ |
| 62883 | case 4822: /* avx512vl_getmantv4df_round */ |
| 62884 | case 4821: /* avx512vl_getmantv4df */ |
| 62885 | case 4820: /* avx512f_getmantv8df_mask_round */ |
| 62886 | case 4819: /* avx512f_getmantv8df_mask */ |
| 62887 | case 4818: /* avx512f_getmantv8df_round */ |
| 62888 | case 4817: /* avx512f_getmantv8df */ |
| 62889 | case 4816: /* avx512vl_getmantv4sf_mask_round */ |
| 62890 | case 4815: /* avx512vl_getmantv4sf_mask */ |
| 62891 | case 4814: /* avx512vl_getmantv4sf_round */ |
| 62892 | case 4813: /* avx512vl_getmantv4sf */ |
| 62893 | case 4812: /* avx512vl_getmantv8sf_mask_round */ |
| 62894 | case 4811: /* avx512vl_getmantv8sf_mask */ |
| 62895 | case 4810: /* avx512vl_getmantv8sf_round */ |
| 62896 | case 4809: /* avx512vl_getmantv8sf */ |
| 62897 | case 4808: /* avx512f_getmantv16sf_mask_round */ |
| 62898 | case 4807: /* avx512f_getmantv16sf_mask */ |
| 62899 | case 4806: /* avx512f_getmantv16sf_round */ |
| 62900 | case 4805: /* avx512f_getmantv16sf */ |
| 62901 | case 4435: /* avx_pd256_pd */ |
| 62902 | case 4434: /* avx_ps256_ps */ |
| 62903 | case 4433: /* avx_si256_si */ |
| 62904 | case 4252: /* *avx_vperm_broadcast_v4df */ |
| 62905 | case 4251: /* *avx_vperm_broadcast_v8sf */ |
| 62906 | case 3677: /* sse3_monitor_di */ |
| 62907 | case 3676: /* sse3_monitor_si */ |
| 62908 | case 3675: /* sse3_mwait */ |
| 62909 | case 3637: /* *vec_extractv4si_zext_mem */ |
| 62910 | case 3636: /* *vec_extractv4si_mem */ |
| 62911 | case 3633: /* *vec_extractv4si_0_zext */ |
| 62912 | case 3632: /* *vec_extractv4si_0_zext_sse4 */ |
| 62913 | case 3631: /* *vec_extractv2di_0_sse */ |
| 62914 | case 3630: /* *vec_extractv2di_0 */ |
| 62915 | case 3629: /* *vec_extractv4si_0 */ |
| 62916 | case 3628: /* *vec_extractv8hi_mem */ |
| 62917 | case 3627: /* *vec_extractv16qi_mem */ |
| 62918 | case 3503: /* avx512vl_testnmv2di3_mask */ |
| 62919 | case 3502: /* avx512vl_testnmv2di3 */ |
| 62920 | case 3501: /* avx512vl_testnmv4di3_mask */ |
| 62921 | case 3500: /* avx512vl_testnmv4di3 */ |
| 62922 | case 3499: /* avx512f_testnmv8di3_mask */ |
| 62923 | case 3498: /* avx512f_testnmv8di3 */ |
| 62924 | case 3497: /* avx512vl_testnmv4si3_mask */ |
| 62925 | case 3496: /* avx512vl_testnmv4si3 */ |
| 62926 | case 3495: /* avx512vl_testnmv8si3_mask */ |
| 62927 | case 3494: /* avx512vl_testnmv8si3 */ |
| 62928 | case 3493: /* avx512f_testnmv16si3_mask */ |
| 62929 | case 3492: /* avx512f_testnmv16si3 */ |
| 62930 | case 3491: /* avx512vl_testnmv8hi3_mask */ |
| 62931 | case 3490: /* avx512vl_testnmv8hi3 */ |
| 62932 | case 3489: /* avx512vl_testnmv16hi3_mask */ |
| 62933 | case 3488: /* avx512vl_testnmv16hi3 */ |
| 62934 | case 3487: /* avx512bw_testnmv32hi3_mask */ |
| 62935 | case 3486: /* avx512bw_testnmv32hi3 */ |
| 62936 | case 3485: /* avx512vl_testnmv32qi3_mask */ |
| 62937 | case 3484: /* avx512vl_testnmv32qi3 */ |
| 62938 | case 3483: /* avx512vl_testnmv16qi3_mask */ |
| 62939 | case 3482: /* avx512vl_testnmv16qi3 */ |
| 62940 | case 3481: /* avx512bw_testnmv64qi3_mask */ |
| 62941 | case 3480: /* avx512bw_testnmv64qi3 */ |
| 62942 | case 3479: /* avx512vl_testmv2di3_mask */ |
| 62943 | case 3478: /* avx512vl_testmv2di3 */ |
| 62944 | case 3477: /* avx512vl_testmv4di3_mask */ |
| 62945 | case 3476: /* avx512vl_testmv4di3 */ |
| 62946 | case 3475: /* avx512f_testmv8di3_mask */ |
| 62947 | case 3474: /* avx512f_testmv8di3 */ |
| 62948 | case 3473: /* avx512vl_testmv4si3_mask */ |
| 62949 | case 3472: /* avx512vl_testmv4si3 */ |
| 62950 | case 3471: /* avx512vl_testmv8si3_mask */ |
| 62951 | case 3470: /* avx512vl_testmv8si3 */ |
| 62952 | case 3469: /* avx512f_testmv16si3_mask */ |
| 62953 | case 3468: /* avx512f_testmv16si3 */ |
| 62954 | case 3467: /* avx512vl_testmv8hi3_mask */ |
| 62955 | case 3466: /* avx512vl_testmv8hi3 */ |
| 62956 | case 3465: /* avx512vl_testmv16hi3_mask */ |
| 62957 | case 3464: /* avx512vl_testmv16hi3 */ |
| 62958 | case 3463: /* avx512bw_testmv32hi3_mask */ |
| 62959 | case 3462: /* avx512bw_testmv32hi3 */ |
| 62960 | case 3461: /* avx512vl_testmv32qi3_mask */ |
| 62961 | case 3460: /* avx512vl_testmv32qi3 */ |
| 62962 | case 3459: /* avx512vl_testmv16qi3_mask */ |
| 62963 | case 3458: /* avx512vl_testmv16qi3 */ |
| 62964 | case 3457: /* avx512bw_testmv64qi3_mask */ |
| 62965 | case 3456: /* avx512bw_testmv64qi3 */ |
| 62966 | case 3191: /* avx512vl_rorv2di_mask */ |
| 62967 | case 3190: /* avx512vl_rorv2di */ |
| 62968 | case 3189: /* avx512vl_rolv2di_mask */ |
| 62969 | case 3188: /* avx512vl_rolv2di */ |
| 62970 | case 3187: /* avx512vl_rorv4di_mask */ |
| 62971 | case 3186: /* avx512vl_rorv4di */ |
| 62972 | case 3185: /* avx512vl_rolv4di_mask */ |
| 62973 | case 3184: /* avx512vl_rolv4di */ |
| 62974 | case 3183: /* avx512f_rorv8di_mask */ |
| 62975 | case 3182: /* avx512f_rorv8di */ |
| 62976 | case 3181: /* avx512f_rolv8di_mask */ |
| 62977 | case 3180: /* avx512f_rolv8di */ |
| 62978 | case 3179: /* avx512vl_rorv4si_mask */ |
| 62979 | case 3178: /* avx512vl_rorv4si */ |
| 62980 | case 3177: /* avx512vl_rolv4si_mask */ |
| 62981 | case 3176: /* avx512vl_rolv4si */ |
| 62982 | case 3175: /* avx512vl_rorv8si_mask */ |
| 62983 | case 3174: /* avx512vl_rorv8si */ |
| 62984 | case 3173: /* avx512vl_rolv8si_mask */ |
| 62985 | case 3172: /* avx512vl_rolv8si */ |
| 62986 | case 3171: /* avx512f_rorv16si_mask */ |
| 62987 | case 3170: /* avx512f_rorv16si */ |
| 62988 | case 3169: /* avx512f_rolv16si_mask */ |
| 62989 | case 3168: /* avx512f_rolv16si */ |
| 62990 | case 3167: /* avx512vl_rorvv2di_mask */ |
| 62991 | case 3166: /* avx512vl_rorvv2di */ |
| 62992 | case 3165: /* avx512vl_rolvv2di_mask */ |
| 62993 | case 3164: /* avx512vl_rolvv2di */ |
| 62994 | case 3163: /* avx512vl_rorvv4di_mask */ |
| 62995 | case 3162: /* avx512vl_rorvv4di */ |
| 62996 | case 3161: /* avx512vl_rolvv4di_mask */ |
| 62997 | case 3160: /* avx512vl_rolvv4di */ |
| 62998 | case 3159: /* avx512f_rorvv8di_mask */ |
| 62999 | case 3158: /* avx512f_rorvv8di */ |
| 63000 | case 3157: /* avx512f_rolvv8di_mask */ |
| 63001 | case 3156: /* avx512f_rolvv8di */ |
| 63002 | case 3155: /* avx512vl_rorvv4si_mask */ |
| 63003 | case 3154: /* avx512vl_rorvv4si */ |
| 63004 | case 3153: /* avx512vl_rolvv4si_mask */ |
| 63005 | case 3152: /* avx512vl_rolvv4si */ |
| 63006 | case 3151: /* avx512vl_rorvv8si_mask */ |
| 63007 | case 3150: /* avx512vl_rorvv8si */ |
| 63008 | case 3149: /* avx512vl_rolvv8si_mask */ |
| 63009 | case 3148: /* avx512vl_rolvv8si */ |
| 63010 | case 3147: /* avx512f_rorvv16si_mask */ |
| 63011 | case 3146: /* avx512f_rorvv16si */ |
| 63012 | case 3145: /* avx512f_rolvv16si_mask */ |
| 63013 | case 3144: /* avx512f_rolvv16si */ |
| 63014 | case 2704: /* avx512f_rndscalev2df_round */ |
| 63015 | case 2703: /* avx512f_rndscalev2df */ |
| 63016 | case 2702: /* avx512f_rndscalev4sf_round */ |
| 63017 | case 2701: /* avx512f_rndscalev4sf */ |
| 63018 | case 2700: /* avx512vl_rndscalev2df_mask_round */ |
| 63019 | case 2699: /* avx512vl_rndscalev2df_mask */ |
| 63020 | case 2698: /* avx512vl_rndscalev2df_round */ |
| 63021 | case 2697: /* avx512vl_rndscalev2df */ |
| 63022 | case 2696: /* avx512vl_rndscalev4df_mask_round */ |
| 63023 | case 2695: /* avx512vl_rndscalev4df_mask */ |
| 63024 | case 2694: /* avx512vl_rndscalev4df_round */ |
| 63025 | case 2693: /* avx512vl_rndscalev4df */ |
| 63026 | case 2692: /* avx512f_rndscalev8df_mask_round */ |
| 63027 | case 2691: /* avx512f_rndscalev8df_mask */ |
| 63028 | case 2690: /* avx512f_rndscalev8df_round */ |
| 63029 | case 2689: /* avx512f_rndscalev8df */ |
| 63030 | case 2688: /* avx512vl_rndscalev4sf_mask_round */ |
| 63031 | case 2687: /* avx512vl_rndscalev4sf_mask */ |
| 63032 | case 2686: /* avx512vl_rndscalev4sf_round */ |
| 63033 | case 2685: /* avx512vl_rndscalev4sf */ |
| 63034 | case 2684: /* avx512vl_rndscalev8sf_mask_round */ |
| 63035 | case 2683: /* avx512vl_rndscalev8sf_mask */ |
| 63036 | case 2682: /* avx512vl_rndscalev8sf_round */ |
| 63037 | case 2681: /* avx512vl_rndscalev8sf */ |
| 63038 | case 2680: /* avx512f_rndscalev16sf_mask_round */ |
| 63039 | case 2679: /* avx512f_rndscalev16sf_mask */ |
| 63040 | case 2678: /* avx512f_rndscalev16sf_round */ |
| 63041 | case 2677: /* avx512f_rndscalev16sf */ |
| 63042 | case 2676: /* avx512f_sfixupimmv2df_mask_round */ |
| 63043 | case 2675: /* avx512f_sfixupimmv2df_mask */ |
| 63044 | case 2674: /* avx512f_sfixupimmv4sf_mask_round */ |
| 63045 | case 2673: /* avx512f_sfixupimmv4sf_mask */ |
| 63046 | case 2672: /* avx512f_sfixupimmv2df_maskz_1_round */ |
| 63047 | case 2671: /* avx512f_sfixupimmv2df_maskz_1 */ |
| 63048 | case 2670: /* avx512f_sfixupimmv2df_round */ |
| 63049 | case 2669: /* avx512f_sfixupimmv2df */ |
| 63050 | case 2668: /* avx512f_sfixupimmv4sf_maskz_1_round */ |
| 63051 | case 2667: /* avx512f_sfixupimmv4sf_maskz_1 */ |
| 63052 | case 2666: /* avx512f_sfixupimmv4sf_round */ |
| 63053 | case 2665: /* avx512f_sfixupimmv4sf */ |
| 63054 | case 2664: /* avx512vl_fixupimmv2df_mask_round */ |
| 63055 | case 2663: /* avx512vl_fixupimmv2df_mask */ |
| 63056 | case 2662: /* avx512vl_fixupimmv4df_mask_round */ |
| 63057 | case 2661: /* avx512vl_fixupimmv4df_mask */ |
| 63058 | case 2660: /* avx512f_fixupimmv8df_mask_round */ |
| 63059 | case 2659: /* avx512f_fixupimmv8df_mask */ |
| 63060 | case 2658: /* avx512vl_fixupimmv4sf_mask_round */ |
| 63061 | case 2657: /* avx512vl_fixupimmv4sf_mask */ |
| 63062 | case 2656: /* avx512vl_fixupimmv8sf_mask_round */ |
| 63063 | case 2655: /* avx512vl_fixupimmv8sf_mask */ |
| 63064 | case 2654: /* avx512f_fixupimmv16sf_mask_round */ |
| 63065 | case 2653: /* avx512f_fixupimmv16sf_mask */ |
| 63066 | case 2652: /* avx512vl_fixupimmv2df_maskz_1_round */ |
| 63067 | case 2651: /* avx512vl_fixupimmv2df_maskz_1 */ |
| 63068 | case 2650: /* avx512vl_fixupimmv2df_round */ |
| 63069 | case 2649: /* avx512vl_fixupimmv2df */ |
| 63070 | case 2648: /* avx512vl_fixupimmv4df_maskz_1_round */ |
| 63071 | case 2647: /* avx512vl_fixupimmv4df_maskz_1 */ |
| 63072 | case 2646: /* avx512vl_fixupimmv4df_round */ |
| 63073 | case 2645: /* avx512vl_fixupimmv4df */ |
| 63074 | case 2644: /* avx512f_fixupimmv8df_maskz_1_round */ |
| 63075 | case 2643: /* avx512f_fixupimmv8df_maskz_1 */ |
| 63076 | case 2642: /* avx512f_fixupimmv8df_round */ |
| 63077 | case 2641: /* avx512f_fixupimmv8df */ |
| 63078 | case 2640: /* avx512vl_fixupimmv4sf_maskz_1_round */ |
| 63079 | case 2639: /* avx512vl_fixupimmv4sf_maskz_1 */ |
| 63080 | case 2638: /* avx512vl_fixupimmv4sf_round */ |
| 63081 | case 2637: /* avx512vl_fixupimmv4sf */ |
| 63082 | case 2636: /* avx512vl_fixupimmv8sf_maskz_1_round */ |
| 63083 | case 2635: /* avx512vl_fixupimmv8sf_maskz_1 */ |
| 63084 | case 2634: /* avx512vl_fixupimmv8sf_round */ |
| 63085 | case 2633: /* avx512vl_fixupimmv8sf */ |
| 63086 | case 2632: /* avx512f_fixupimmv16sf_maskz_1_round */ |
| 63087 | case 2631: /* avx512f_fixupimmv16sf_maskz_1 */ |
| 63088 | case 2630: /* avx512f_fixupimmv16sf_round */ |
| 63089 | case 2629: /* avx512f_fixupimmv16sf */ |
| 63090 | case 2628: /* avx512vl_alignv2di_mask */ |
| 63091 | case 2627: /* *avx512vl_alignv2di */ |
| 63092 | case 2626: /* avx512vl_alignv4di_mask */ |
| 63093 | case 2625: /* *avx512vl_alignv4di */ |
| 63094 | case 2624: /* avx512f_alignv8di_mask */ |
| 63095 | case 2623: /* *avx512f_alignv8di */ |
| 63096 | case 2622: /* avx512vl_alignv4si_mask */ |
| 63097 | case 2621: /* *avx512vl_alignv4si */ |
| 63098 | case 2620: /* avx512vl_alignv8si_mask */ |
| 63099 | case 2619: /* *avx512vl_alignv8si */ |
| 63100 | case 2618: /* avx512f_alignv16si_mask */ |
| 63101 | case 2617: /* *avx512f_alignv16si */ |
| 63102 | case 2616: /* avx512f_sgetexpv2df_round */ |
| 63103 | case 2615: /* avx512f_sgetexpv2df */ |
| 63104 | case 2614: /* avx512f_sgetexpv4sf_round */ |
| 63105 | case 2613: /* avx512f_sgetexpv4sf */ |
| 63106 | case 2612: /* avx512vl_getexpv2df_mask_round */ |
| 63107 | case 2611: /* avx512vl_getexpv2df_mask */ |
| 63108 | case 2610: /* avx512vl_getexpv2df_round */ |
| 63109 | case 2609: /* avx512vl_getexpv2df */ |
| 63110 | case 2608: /* avx512vl_getexpv4df_mask_round */ |
| 63111 | case 2607: /* avx512vl_getexpv4df_mask */ |
| 63112 | case 2606: /* avx512vl_getexpv4df_round */ |
| 63113 | case 2605: /* avx512vl_getexpv4df */ |
| 63114 | case 2604: /* avx512f_getexpv8df_mask_round */ |
| 63115 | case 2603: /* avx512f_getexpv8df_mask */ |
| 63116 | case 2602: /* avx512f_getexpv8df_round */ |
| 63117 | case 2601: /* avx512f_getexpv8df */ |
| 63118 | case 2600: /* avx512vl_getexpv4sf_mask_round */ |
| 63119 | case 2599: /* avx512vl_getexpv4sf_mask */ |
| 63120 | case 2598: /* avx512vl_getexpv4sf_round */ |
| 63121 | case 2597: /* avx512vl_getexpv4sf */ |
| 63122 | case 2596: /* avx512vl_getexpv8sf_mask_round */ |
| 63123 | case 2595: /* avx512vl_getexpv8sf_mask */ |
| 63124 | case 2594: /* avx512vl_getexpv8sf_round */ |
| 63125 | case 2593: /* avx512vl_getexpv8sf */ |
| 63126 | case 2592: /* avx512f_getexpv16sf_mask_round */ |
| 63127 | case 2591: /* avx512f_getexpv16sf_mask */ |
| 63128 | case 2590: /* avx512f_getexpv16sf_round */ |
| 63129 | case 2589: /* avx512f_getexpv16sf */ |
| 63130 | case 2570: /* avx512vl_scalefv2df_mask_round */ |
| 63131 | case 2569: /* avx512vl_scalefv2df_mask */ |
| 63132 | case 2568: /* avx512vl_scalefv2df_round */ |
| 63133 | case 2567: /* avx512vl_scalefv2df */ |
| 63134 | case 2566: /* avx512vl_scalefv4df_mask_round */ |
| 63135 | case 2565: /* avx512vl_scalefv4df_mask */ |
| 63136 | case 2564: /* avx512vl_scalefv4df_round */ |
| 63137 | case 2563: /* avx512vl_scalefv4df */ |
| 63138 | case 2562: /* avx512f_scalefv8df_mask_round */ |
| 63139 | case 2561: /* avx512f_scalefv8df_mask */ |
| 63140 | case 2560: /* avx512f_scalefv8df_round */ |
| 63141 | case 2559: /* avx512f_scalefv8df */ |
| 63142 | case 2558: /* avx512vl_scalefv4sf_mask_round */ |
| 63143 | case 2557: /* avx512vl_scalefv4sf_mask */ |
| 63144 | case 2556: /* avx512vl_scalefv4sf_round */ |
| 63145 | case 2555: /* avx512vl_scalefv4sf */ |
| 63146 | case 2554: /* avx512vl_scalefv8sf_mask_round */ |
| 63147 | case 2553: /* avx512vl_scalefv8sf_mask */ |
| 63148 | case 2552: /* avx512vl_scalefv8sf_round */ |
| 63149 | case 2551: /* avx512vl_scalefv8sf */ |
| 63150 | case 2550: /* avx512f_scalefv16sf_mask_round */ |
| 63151 | case 2549: /* avx512f_scalefv16sf_mask */ |
| 63152 | case 2548: /* avx512f_scalefv16sf_round */ |
| 63153 | case 2547: /* avx512f_scalefv16sf */ |
| 63154 | case 2546: /* avx512f_vmscalefv2df_round */ |
| 63155 | case 2545: /* avx512f_vmscalefv2df */ |
| 63156 | case 2544: /* avx512f_vmscalefv4sf_round */ |
| 63157 | case 2543: /* avx512f_vmscalefv4sf */ |
| 63158 | case 2529: /* vec_extract_lo_v32qi */ |
| 63159 | case 2527: /* vec_extract_lo_v64qi */ |
| 63160 | case 2525: /* vec_extract_lo_v16hi */ |
| 63161 | case 2523: /* vec_extract_lo_v32hi */ |
| 63162 | case 2502: /* vec_extract_lo_v16si_mask */ |
| 63163 | case 2501: /* vec_extract_lo_v16si */ |
| 63164 | case 2500: /* vec_extract_lo_v16sf_mask */ |
| 63165 | case 2499: /* vec_extract_lo_v16sf */ |
| 63166 | case 2468: /* *vec_extractv4sf_mem */ |
| 63167 | case 2466: /* *vec_extractv4sf_0 */ |
| 63168 | case 2415: /* *avx512vl_cvtmask2qv2di */ |
| 63169 | case 2414: /* *avx512vl_cvtmask2qv4di */ |
| 63170 | case 2413: /* *avx512f_cvtmask2qv8di */ |
| 63171 | case 2412: /* *avx512vl_cvtmask2dv4si */ |
| 63172 | case 2411: /* *avx512vl_cvtmask2dv8si */ |
| 63173 | case 2410: /* *avx512f_cvtmask2dv16si */ |
| 63174 | case 2409: /* *avx512vl_cvtmask2wv8hi */ |
| 63175 | case 2408: /* *avx512vl_cvtmask2wv16hi */ |
| 63176 | case 2407: /* *avx512bw_cvtmask2wv32hi */ |
| 63177 | case 2406: /* *avx512vl_cvtmask2bv32qi */ |
| 63178 | case 2405: /* *avx512vl_cvtmask2bv16qi */ |
| 63179 | case 2404: /* *avx512bw_cvtmask2bv64qi */ |
| 63180 | case 2403: /* avx512vl_cvtq2maskv2di */ |
| 63181 | case 2402: /* avx512vl_cvtq2maskv4di */ |
| 63182 | case 2401: /* avx512f_cvtq2maskv8di */ |
| 63183 | case 2400: /* avx512vl_cvtd2maskv4si */ |
| 63184 | case 2399: /* avx512vl_cvtd2maskv8si */ |
| 63185 | case 2398: /* avx512f_cvtd2maskv16si */ |
| 63186 | case 2397: /* avx512vl_cvtw2maskv8hi */ |
| 63187 | case 2396: /* avx512vl_cvtw2maskv16hi */ |
| 63188 | case 2395: /* avx512bw_cvtw2maskv32hi */ |
| 63189 | case 2394: /* avx512vl_cvtb2maskv32qi */ |
| 63190 | case 2393: /* avx512vl_cvtb2maskv16qi */ |
| 63191 | case 2392: /* avx512bw_cvtb2maskv64qi */ |
| 63192 | case 1360: /* *absnegv2df2 */ |
| 63193 | case 1359: /* *absnegv4df2 */ |
| 63194 | case 1358: /* *absnegv8df2 */ |
| 63195 | case 1357: /* *absnegv4sf2 */ |
| 63196 | case 1356: /* *absnegv8sf2 */ |
| 63197 | case 1355: /* *absnegv16sf2 */ |
| 63198 | case 1354: /* kunpckdi */ |
| 63199 | case 1353: /* kunpcksi */ |
| 63200 | case 1294: /* movdi_to_sse */ |
| 63201 | case 1209: /* *vec_extractv2si_zext_mem */ |
| 63202 | case 1207: /* *vec_extractv2si_0 */ |
| 63203 | case 1137: /* *vec_extractv2sf_0 */ |
| 63204 | case 1105: /* rdpid */ |
| 63205 | case 1104: /* *wrpkru */ |
| 63206 | case 1103: /* *rdpkru */ |
| 63207 | case 1096: /* *bnd64_cn */ |
| 63208 | case 1095: /* *bnd64_cu */ |
| 63209 | case 1094: /* *bnd64_cl */ |
| 63210 | case 1093: /* *bnd32_cn */ |
| 63211 | case 1092: /* *bnd32_cu */ |
| 63212 | case 1091: /* *bnd32_cl */ |
| 63213 | case 1088: /* *bnd64_mk */ |
| 63214 | case 1087: /* *bnd32_mk */ |
| 63215 | case 1086: /* clzero_di */ |
| 63216 | case 1085: /* clzero_si */ |
| 63217 | case 1084: /* monitorx_di */ |
| 63218 | case 1083: /* monitorx_si */ |
| 63219 | case 1082: /* mwaitx */ |
| 63220 | case 1079: /* xtest_1 */ |
| 63221 | case 1078: /* xabort */ |
| 63222 | case 1077: /* xend */ |
| 63223 | case 1076: /* xbegin_1 */ |
| 63224 | case 1075: /* *pause */ |
| 63225 | case 1074: /* rdseeddi_1 */ |
| 63226 | case 1073: /* rdseedsi_1 */ |
| 63227 | case 1072: /* rdseedhi_1 */ |
| 63228 | case 1071: /* rdranddi_1 */ |
| 63229 | case 1070: /* rdrandsi_1 */ |
| 63230 | case 1069: /* rdrandhi_1 */ |
| 63231 | case 1068: /* wrgsbasedi */ |
| 63232 | case 1067: /* wrfsbasedi */ |
| 63233 | case 1066: /* wrgsbasesi */ |
| 63234 | case 1065: /* wrfsbasesi */ |
| 63235 | case 1064: /* rdgsbasedi */ |
| 63236 | case 1063: /* rdfsbasedi */ |
| 63237 | case 1062: /* rdgsbasesi */ |
| 63238 | case 1061: /* rdfsbasesi */ |
| 63239 | case 1060: /* *lwp_lwpinsdi3_1 */ |
| 63240 | case 1059: /* *lwp_lwpinssi3_1 */ |
| 63241 | case 1058: /* *lwp_lwpvaldi3_1 */ |
| 63242 | case 1057: /* *lwp_lwpvalsi3_1 */ |
| 63243 | case 1056: /* lwp_slwpcbdi */ |
| 63244 | case 1055: /* lwp_slwpcbsi */ |
| 63245 | case 1054: /* *lwp_llwpcbdi1 */ |
| 63246 | case 1053: /* *lwp_llwpcbsi1 */ |
| 63247 | case 1052: /* fnclex */ |
| 63248 | case 1026: /* rdtscp_rex64 */ |
| 63249 | case 1025: /* rdtscp */ |
| 63250 | case 1024: /* rdtsc_rex64 */ |
| 63251 | case 1023: /* rdtsc */ |
| 63252 | case 1022: /* rdpmc_rex64 */ |
| 63253 | case 1021: /* rdpmc */ |
| 63254 | case 1016: /* stack_tls_protect_test_di */ |
| 63255 | case 1015: /* stack_tls_protect_test_si */ |
| 63256 | case 1014: /* stack_protect_test_di */ |
| 63257 | case 1013: /* stack_protect_test_si */ |
| 63258 | case 1012: /* stack_tls_protect_set_di */ |
| 63259 | case 1011: /* stack_tls_protect_set_si */ |
| 63260 | case 1010: /* stack_protect_set_di */ |
| 63261 | case 1009: /* stack_protect_set_si */ |
| 63262 | case 1005: /* trap */ |
| 63263 | case 1004: /* probe_stack_rangedi */ |
| 63264 | case 1003: /* probe_stack_rangesi */ |
| 63265 | case 1002: /* adjust_stack_and_probedi */ |
| 63266 | case 1001: /* adjust_stack_and_probesi */ |
| 63267 | case 998: /* allocate_stack_worker_probe_di */ |
| 63268 | case 997: /* allocate_stack_worker_probe_si */ |
| 63269 | case 974: /* *x86_movdicc_0_m1_neg */ |
| 63270 | case 973: /* *x86_movsicc_0_m1_neg */ |
| 63271 | case 972: /* *x86_movdicc_0_m1_se */ |
| 63272 | case 971: /* *x86_movsicc_0_m1_se */ |
| 63273 | case 970: /* *x86_movdicc_0_m1 */ |
| 63274 | case 969: /* *x86_movsicc_0_m1 */ |
| 63275 | case 968: /* *strlenqi_1 */ |
| 63276 | case 967: /* *strlenqi_1 */ |
| 63277 | case 966: /* *cmpstrnqi_1 */ |
| 63278 | case 965: /* *cmpstrnqi_1 */ |
| 63279 | case 964: /* *cmpstrnqi_nz_1 */ |
| 63280 | case 963: /* *cmpstrnqi_nz_1 */ |
| 63281 | case 934: /* cld */ |
| 63282 | case 811: /* *tls_dynamic_gnu2_combine_64 */ |
| 63283 | case 809: /* *tls_dynamic_gnu2_lea_64 */ |
| 63284 | case 808: /* *tls_dynamic_gnu2_combine_32 */ |
| 63285 | case 806: /* *tls_dynamic_gnu2_lea_32 */ |
| 63286 | case 797: /* *tls_local_dynamic_32_once */ |
| 63287 | case 796: /* *tls_local_dynamic_base_64_largepic */ |
| 63288 | case 795: /* *tls_local_dynamic_base_64_di */ |
| 63289 | case 794: /* *tls_local_dynamic_base_64_si */ |
| 63290 | case 793: /* *tls_local_dynamic_base_32_gnu */ |
| 63291 | case 792: /* *tls_global_dynamic_64_largepic */ |
| 63292 | case 791: /* *tls_global_dynamic_64_di */ |
| 63293 | case 790: /* *tls_global_dynamic_64_si */ |
| 63294 | case 789: /* *tls_global_dynamic_32_gnu */ |
| 63295 | case 788: /* *parityhi2_cmp */ |
| 63296 | case 787: /* paritysi2_cmp */ |
| 63297 | case 786: /* paritydi2_cmp */ |
| 63298 | case 785: /* bswaphi_lowpart */ |
| 63299 | case 784: /* *bswaphi_lowpart_1 */ |
| 63300 | case 778: /* *popcounthi2_1 */ |
| 63301 | case 706: /* ffssi2_no_cmove */ |
| 63302 | case 705: /* split_stack_return */ |
| 63303 | case 702: /* eh_return_internal */ |
| 63304 | case 700: /* set_rip_rex64 */ |
| 63305 | case 699: /* set_got_rex64 */ |
| 63306 | case 698: /* *set_got_labelled */ |
| 63307 | case 697: /* *set_got */ |
| 63308 | case 696: /* pad */ |
| 63309 | case 695: /* nops */ |
| 63310 | case 694: /* nop */ |
| 63311 | case 692: /* simple_return_pop_internal */ |
| 63312 | case 691: /* simple_return_internal_long */ |
| 63313 | case 690: /* interrupt_return */ |
| 63314 | case 689: /* simple_return_internal */ |
| 63315 | case 688: /* prologue_use */ |
| 63316 | case 687: /* *memory_blockage */ |
| 63317 | case 686: /* blockage */ |
| 63318 | case 658: /* *jccxf_si_r_i387 */ |
| 63319 | case 657: /* *jccdf_si_r_i387 */ |
| 63320 | case 656: /* *jccsf_si_r_i387 */ |
| 63321 | case 655: /* *jccxf_hi_r_i387 */ |
| 63322 | case 654: /* *jccdf_hi_r_i387 */ |
| 63323 | case 653: /* *jccsf_hi_r_i387 */ |
| 63324 | case 652: /* *jccxf_si_i387 */ |
| 63325 | case 651: /* *jccdf_si_i387 */ |
| 63326 | case 650: /* *jccsf_si_i387 */ |
| 63327 | case 649: /* *jccxf_hi_i387 */ |
| 63328 | case 648: /* *jccdf_hi_i387 */ |
| 63329 | case 647: /* *jccsf_hi_i387 */ |
| 63330 | case 646: /* *jccuxf_r_i387 */ |
| 63331 | case 645: /* *jccudf_r_i387 */ |
| 63332 | case 644: /* *jccusf_r_i387 */ |
| 63333 | case 643: /* *jccuxf_i387 */ |
| 63334 | case 642: /* *jccudf_i387 */ |
| 63335 | case 641: /* *jccusf_i387 */ |
| 63336 | case 640: /* *jccdf_r_i387 */ |
| 63337 | case 639: /* *jccsf_r_i387 */ |
| 63338 | case 638: /* *jccdf_i387 */ |
| 63339 | case 637: /* *jccsf_i387 */ |
| 63340 | case 636: /* *jccxf_r_i387 */ |
| 63341 | case 635: /* *jccxf_i387 */ |
| 63342 | case 634: /* *jccxf_0_r_i387 */ |
| 63343 | case 633: /* *jccdf_0_r_i387 */ |
| 63344 | case 632: /* *jccsf_0_r_i387 */ |
| 63345 | case 631: /* *jccxf_0_i387 */ |
| 63346 | case 630: /* *jccdf_0_i387 */ |
| 63347 | case 629: /* *jccsf_0_i387 */ |
| 63348 | case 622: /* *setcc_si_1_movzbl */ |
| 63349 | case 621: /* *setcc_si_1_and */ |
| 63350 | case 620: /* *setcc_di_1 */ |
| 63351 | case 619: /* *jcc_btdi_mask */ |
| 63352 | case 618: /* *jcc_btsi_mask */ |
| 63353 | case 617: /* *jcc_btdi_1 */ |
| 63354 | case 616: /* *jcc_btsi_1 */ |
| 63355 | case 615: /* *jcc_btdi */ |
| 63356 | case 614: /* *jcc_btsi */ |
| 63357 | case 593: /* ix86_rotrti3_doubleword */ |
| 63358 | case 592: /* ix86_rotrdi3_doubleword */ |
| 63359 | case 591: /* ix86_rotlti3_doubleword */ |
| 63360 | case 590: /* ix86_rotldi3_doubleword */ |
| 63361 | case 589: /* *rotrdi3_mask */ |
| 63362 | case 588: /* *rotldi3_mask */ |
| 63363 | case 587: /* *rotrsi3_mask */ |
| 63364 | case 586: /* *rotlsi3_mask */ |
| 63365 | case 544: /* *ashrti3_doubleword */ |
| 63366 | case 543: /* *lshrti3_doubleword */ |
| 63367 | case 542: /* *ashrdi3_doubleword */ |
| 63368 | case 541: /* *lshrdi3_doubleword */ |
| 63369 | case 540: /* *ashrdi3_mask */ |
| 63370 | case 539: /* *lshrdi3_mask */ |
| 63371 | case 538: /* *ashrsi3_mask */ |
| 63372 | case 537: /* *lshrsi3_mask */ |
| 63373 | case 518: /* *ashldi3_mask */ |
| 63374 | case 517: /* *ashlsi3_mask */ |
| 63375 | case 514: /* *ashlti3_doubleword */ |
| 63376 | case 513: /* *ashldi3_doubleword */ |
| 63377 | case 502: /* *one_cmpldi2_doubleword */ |
| 63378 | case 501: /* copysigntf3_var */ |
| 63379 | case 500: /* copysigndf3_var */ |
| 63380 | case 499: /* copysignsf3_var */ |
| 63381 | case 498: /* copysigntf3_const */ |
| 63382 | case 497: /* copysigndf3_const */ |
| 63383 | case 496: /* copysignsf3_const */ |
| 63384 | case 483: /* *absnegtf2_sse */ |
| 63385 | case 482: /* *absnegxf2_i387 */ |
| 63386 | case 481: /* *absnegdf2 */ |
| 63387 | case 480: /* *absnegsf2 */ |
| 63388 | case 465: /* *negti2_doubleword */ |
| 63389 | case 464: /* *negdi2_doubleword */ |
| 63390 | case 422: /* *xordi3_doubleword */ |
| 63391 | case 421: /* *iordi3_doubleword */ |
| 63392 | case 414: /* *andndi3_doubleword */ |
| 63393 | case 397: /* *anddi3_doubleword */ |
| 63394 | case 396: /* *testqi_ext_3 */ |
| 63395 | case 395: /* *testqi_ext_3 */ |
| 63396 | case 394: /* *testqi_ext_3 */ |
| 63397 | case 382: /* *udivmoddi4_pow2 */ |
| 63398 | case 381: /* *udivmodsi4_pow2 */ |
| 63399 | case 380: /* *udivmoddi4 */ |
| 63400 | case 379: /* *udivmodsi4 */ |
| 63401 | case 378: /* *udivmodhi4 */ |
| 63402 | case 377: /* udivmoddi4_1 */ |
| 63403 | case 376: /* udivmodsi4_1 */ |
| 63404 | case 371: /* *divmoddi4 */ |
| 63405 | case 370: /* *divmodsi4 */ |
| 63406 | case 369: /* *divmodhi4 */ |
| 63407 | case 368: /* divmoddi4_1 */ |
| 63408 | case 367: /* divmodsi4_1 */ |
| 63409 | case 270: /* *subti3_doubleword */ |
| 63410 | case 269: /* *subdi3_doubleword */ |
| 63411 | case 268: /* *leadi_general_4 */ |
| 63412 | case 267: /* *leadi_general_4 */ |
| 63413 | case 266: /* *leasi_general_4 */ |
| 63414 | case 265: /* *leasi_general_4 */ |
| 63415 | case 264: /* *leahi_general_4 */ |
| 63416 | case 263: /* *leahi_general_4 */ |
| 63417 | case 262: /* *leaqi_general_4 */ |
| 63418 | case 261: /* *leaqi_general_4 */ |
| 63419 | case 260: /* *leahi_general_3b */ |
| 63420 | case 259: /* *leaqi_general_3b */ |
| 63421 | case 258: /* *leahi_general_3 */ |
| 63422 | case 257: /* *leaqi_general_3 */ |
| 63423 | case 256: /* *leahi_general_2b */ |
| 63424 | case 255: /* *leaqi_general_2b */ |
| 63425 | case 254: /* *leahi_general_2 */ |
| 63426 | case 253: /* *leaqi_general_2 */ |
| 63427 | case 252: /* *leahi_general_1 */ |
| 63428 | case 251: /* *leaqi_general_1 */ |
| 63429 | case 216: /* *addti3_doubleword */ |
| 63430 | case 215: /* *adddi3_doubleword */ |
| 63431 | case 214: /* *leadi */ |
| 63432 | case 213: /* *leasi */ |
| 63433 | case 212: /* *floatunssixf2_i387_with_xmm */ |
| 63434 | case 211: /* *floatunssidf2_i387_with_xmm */ |
| 63435 | case 210: /* *floatunssisf2_i387_with_xmm */ |
| 63436 | case 169: /* *fixuns_truncdf_1 */ |
| 63437 | case 168: /* *fixuns_truncsf_1 */ |
| 63438 | case 146: /* extendsidi2_1 */ |
| 63439 | case 144: /* *zextsi_doubleword */ |
| 63440 | case 143: /* *zexthi_doubleword */ |
| 63441 | case 142: /* *zextqi_doubleword */ |
| 63442 | case 141: /* *zexthi_doubleword_and */ |
| 63443 | case 140: /* *zextqi_doubleword_and */ |
| 63444 | case 73: /* *popfldi1 */ |
| 63445 | case 72: /* *popflsi1 */ |
| 63446 | case 71: /* *pushfldi2 */ |
| 63447 | case 70: /* *pushflsi2 */ |
| 63448 | case 69: /* *popdi1_epilogue */ |
| 63449 | case 68: /* *popsi1_epilogue */ |
| 63450 | case 67: /* *popdi1 */ |
| 63451 | case 66: /* *popsi1 */ |
| 63452 | case 65: /* *pushdi2_prologue */ |
| 63453 | case 64: /* *pushsi2_prologue */ |
| 63454 | case 63: /* *pushhi2 */ |
| 63455 | case 62: /* *pushqi2 */ |
| 63456 | case 61: /* *pushsi2_rex64 */ |
| 63457 | case 60: /* *pushhi2_rex64 */ |
| 63458 | case 59: /* *pushqi2_rex64 */ |
| 63459 | case 58: /* *pushsi2 */ |
| 63460 | case 57: /* *pushdi2_rex64 */ |
| 63461 | case 56: /* *pushti2 */ |
| 63462 | case 55: /* *pushdi2 */ |
| 63463 | case 48: /* x86_sahf_1 */ |
| 63464 | return 1; |
| 63465 | |
| 63466 | case 4926: /* mfence_sse2 */ |
| 63467 | case 4925: /* *sse_sfence */ |
| 63468 | case 4924: /* *sse2_lfence */ |
| 63469 | case 4862: /* conflictv2di_mask */ |
| 63470 | case 4861: /* *conflictv2di */ |
| 63471 | case 4860: /* conflictv4di_mask */ |
| 63472 | case 4859: /* *conflictv4di */ |
| 63473 | case 4858: /* conflictv8di_mask */ |
| 63474 | case 4857: /* *conflictv8di */ |
| 63475 | case 4856: /* conflictv4si_mask */ |
| 63476 | case 4855: /* *conflictv4si */ |
| 63477 | case 4854: /* conflictv8si_mask */ |
| 63478 | case 4853: /* *conflictv8si */ |
| 63479 | case 4852: /* conflictv16si_mask */ |
| 63480 | case 4851: /* *conflictv16si */ |
| 63481 | case 4850: /* clzv2di2_mask */ |
| 63482 | case 4849: /* clzv2di2 */ |
| 63483 | case 4848: /* clzv4di2_mask */ |
| 63484 | case 4847: /* clzv4di2 */ |
| 63485 | case 4846: /* clzv8di2_mask */ |
| 63486 | case 4845: /* clzv8di2 */ |
| 63487 | case 4844: /* clzv4si2_mask */ |
| 63488 | case 4843: /* clzv4si2 */ |
| 63489 | case 4842: /* clzv8si2_mask */ |
| 63490 | case 4841: /* clzv8si2 */ |
| 63491 | case 4840: /* clzv16si2_mask */ |
| 63492 | case 4839: /* clzv16si2 */ |
| 63493 | case 4804: /* avx512dq_vmfpclassv2df */ |
| 63494 | case 4803: /* avx512dq_vmfpclassv4sf */ |
| 63495 | case 4802: /* avx512dq_fpclassv2df_mask */ |
| 63496 | case 4801: /* avx512dq_fpclassv2df */ |
| 63497 | case 4800: /* avx512dq_fpclassv4df_mask */ |
| 63498 | case 4799: /* avx512dq_fpclassv4df */ |
| 63499 | case 4798: /* avx512dq_fpclassv8df_mask */ |
| 63500 | case 4797: /* avx512dq_fpclassv8df */ |
| 63501 | case 4796: /* avx512dq_fpclassv4sf_mask */ |
| 63502 | case 4795: /* avx512dq_fpclassv4sf */ |
| 63503 | case 4794: /* avx512dq_fpclassv8sf_mask */ |
| 63504 | case 4793: /* avx512dq_fpclassv8sf */ |
| 63505 | case 4792: /* avx512dq_fpclassv16sf_mask */ |
| 63506 | case 4791: /* avx512dq_fpclassv16sf */ |
| 63507 | case 4790: /* avx512dq_rangesv2df_round */ |
| 63508 | case 4789: /* avx512dq_rangesv2df */ |
| 63509 | case 4788: /* avx512dq_rangesv4sf_round */ |
| 63510 | case 4787: /* avx512dq_rangesv4sf */ |
| 63511 | case 4786: /* avx512dq_rangepv2df_mask */ |
| 63512 | case 4785: /* avx512dq_rangepv2df */ |
| 63513 | case 4784: /* avx512dq_rangepv4df_mask */ |
| 63514 | case 4783: /* avx512dq_rangepv4df */ |
| 63515 | case 4782: /* avx512dq_rangepv8df_mask_round */ |
| 63516 | case 4781: /* avx512dq_rangepv8df_mask */ |
| 63517 | case 4780: /* avx512dq_rangepv8df_round */ |
| 63518 | case 4779: /* avx512dq_rangepv8df */ |
| 63519 | case 4778: /* avx512dq_rangepv4sf_mask */ |
| 63520 | case 4777: /* avx512dq_rangepv4sf */ |
| 63521 | case 4776: /* avx512dq_rangepv8sf_mask */ |
| 63522 | case 4775: /* avx512dq_rangepv8sf */ |
| 63523 | case 4774: /* avx512dq_rangepv16sf_mask_round */ |
| 63524 | case 4773: /* avx512dq_rangepv16sf_mask */ |
| 63525 | case 4772: /* avx512dq_rangepv16sf_round */ |
| 63526 | case 4771: /* avx512dq_rangepv16sf */ |
| 63527 | case 4489: /* avx512bw_lshrvv32hi_mask */ |
| 63528 | case 4488: /* avx512bw_lshrvv32hi */ |
| 63529 | case 4487: /* avx512bw_ashlvv32hi_mask */ |
| 63530 | case 4486: /* avx512bw_ashlvv32hi */ |
| 63531 | case 4485: /* avx512vl_lshrvv16hi_mask */ |
| 63532 | case 4484: /* avx512vl_lshrvv16hi */ |
| 63533 | case 4483: /* avx512vl_ashlvv16hi_mask */ |
| 63534 | case 4482: /* avx512vl_ashlvv16hi */ |
| 63535 | case 4481: /* avx512vl_lshrvv8hi_mask */ |
| 63536 | case 4480: /* avx512vl_lshrvv8hi */ |
| 63537 | case 4479: /* avx512vl_ashlvv8hi_mask */ |
| 63538 | case 4478: /* avx512vl_ashlvv8hi */ |
| 63539 | case 4477: /* avx2_lshrvv2di_mask */ |
| 63540 | case 4476: /* avx2_lshrvv2di */ |
| 63541 | case 4475: /* avx2_ashlvv2di_mask */ |
| 63542 | case 4474: /* avx2_ashlvv2di */ |
| 63543 | case 4473: /* avx2_lshrvv4di_mask */ |
| 63544 | case 4472: /* avx2_lshrvv4di */ |
| 63545 | case 4471: /* avx2_ashlvv4di_mask */ |
| 63546 | case 4470: /* avx2_ashlvv4di */ |
| 63547 | case 4469: /* avx512f_lshrvv8di_mask */ |
| 63548 | case 4468: /* avx512f_lshrvv8di */ |
| 63549 | case 4467: /* avx512f_ashlvv8di_mask */ |
| 63550 | case 4466: /* avx512f_ashlvv8di */ |
| 63551 | case 4465: /* avx2_lshrvv4si_mask */ |
| 63552 | case 4464: /* avx2_lshrvv4si */ |
| 63553 | case 4463: /* avx2_ashlvv4si_mask */ |
| 63554 | case 4462: /* avx2_ashlvv4si */ |
| 63555 | case 4461: /* avx2_lshrvv8si_mask */ |
| 63556 | case 4460: /* avx2_lshrvv8si */ |
| 63557 | case 4459: /* avx2_ashlvv8si_mask */ |
| 63558 | case 4458: /* avx2_ashlvv8si */ |
| 63559 | case 4457: /* avx512f_lshrvv16si_mask */ |
| 63560 | case 4456: /* avx512f_lshrvv16si */ |
| 63561 | case 4455: /* avx512f_ashlvv16si_mask */ |
| 63562 | case 4454: /* avx512f_ashlvv16si */ |
| 63563 | case 4453: /* avx512bw_ashrvv32hi_mask */ |
| 63564 | case 4452: /* avx512bw_ashrvv32hi */ |
| 63565 | case 4451: /* avx512vl_ashrvv16hi_mask */ |
| 63566 | case 4450: /* avx512vl_ashrvv16hi */ |
| 63567 | case 4449: /* avx512vl_ashrvv8hi_mask */ |
| 63568 | case 4448: /* avx512vl_ashrvv8hi */ |
| 63569 | case 4447: /* avx512f_ashrvv8di_mask */ |
| 63570 | case 4446: /* avx512f_ashrvv8di */ |
| 63571 | case 4445: /* avx2_ashrvv4di_mask */ |
| 63572 | case 4444: /* avx2_ashrvv4di */ |
| 63573 | case 4443: /* avx2_ashrvv2di_mask */ |
| 63574 | case 4442: /* avx2_ashrvv2di */ |
| 63575 | case 4441: /* avx512f_ashrvv16si_mask */ |
| 63576 | case 4440: /* avx512f_ashrvv16si */ |
| 63577 | case 4439: /* avx2_ashrvv8si_mask */ |
| 63578 | case 4438: /* avx2_ashrvv8si */ |
| 63579 | case 4437: /* avx2_ashrvv4si_mask */ |
| 63580 | case 4436: /* avx2_ashrvv4si */ |
| 63581 | case 4396: /* *ssse3_palignrv2df_perm */ |
| 63582 | case 4395: /* *ssse3_palignrv4sf_perm */ |
| 63583 | case 4394: /* *ssse3_palignrv2di_perm */ |
| 63584 | case 4393: /* *ssse3_palignrv4si_perm */ |
| 63585 | case 4392: /* *ssse3_palignrv8hi_perm */ |
| 63586 | case 4391: /* *ssse3_palignrv16qi_perm */ |
| 63587 | case 4249: /* avx512cd_maskw_vec_dupv4si */ |
| 63588 | case 4248: /* avx512cd_maskw_vec_dupv8si */ |
| 63589 | case 4247: /* avx512cd_maskw_vec_dupv16si */ |
| 63590 | case 4246: /* avx512cd_maskb_vec_dupv2di */ |
| 63591 | case 4245: /* avx512cd_maskb_vec_dupv4di */ |
| 63592 | case 4244: /* avx512cd_maskb_vec_dupv8di */ |
| 63593 | case 4056: /* avx_vzeroupper */ |
| 63594 | case 4055: /* *avx_vzeroall */ |
| 63595 | case 4047: /* xop_vpermil2v2df3 */ |
| 63596 | case 4046: /* xop_vpermil2v4df3 */ |
| 63597 | case 4045: /* xop_vpermil2v4sf3 */ |
| 63598 | case 4044: /* xop_vpermil2v8sf3 */ |
| 63599 | case 4031: /* xop_maskcmpv2di3 */ |
| 63600 | case 4030: /* xop_maskcmpv4si3 */ |
| 63601 | case 4029: /* xop_maskcmpv8hi3 */ |
| 63602 | case 4028: /* xop_maskcmpv16qi3 */ |
| 63603 | case 4027: /* *xop_vmfrczv2df2 */ |
| 63604 | case 4026: /* *xop_vmfrczv4sf2 */ |
| 63605 | case 4025: /* xop_frczv4df2 */ |
| 63606 | case 4024: /* xop_frczv8sf2 */ |
| 63607 | case 4023: /* xop_frczv2df2 */ |
| 63608 | case 4022: /* xop_frczv4sf2 */ |
| 63609 | case 4021: /* xop_frczdf2 */ |
| 63610 | case 4020: /* xop_frczsf2 */ |
| 63611 | case 4019: /* xop_shlv2di3 */ |
| 63612 | case 4018: /* xop_shlv4si3 */ |
| 63613 | case 4017: /* xop_shlv8hi3 */ |
| 63614 | case 4016: /* xop_shlv16qi3 */ |
| 63615 | case 4015: /* xop_shav2di3 */ |
| 63616 | case 4014: /* xop_shav4si3 */ |
| 63617 | case 4013: /* xop_shav8hi3 */ |
| 63618 | case 4012: /* xop_shav16qi3 */ |
| 63619 | case 4011: /* xop_vrotlv2di3 */ |
| 63620 | case 4010: /* xop_vrotlv4si3 */ |
| 63621 | case 4009: /* xop_vrotlv8hi3 */ |
| 63622 | case 4008: /* xop_vrotlv16qi3 */ |
| 63623 | case 4007: /* xop_rotrv2di3 */ |
| 63624 | case 4006: /* xop_rotrv4si3 */ |
| 63625 | case 4005: /* xop_rotrv8hi3 */ |
| 63626 | case 4004: /* xop_rotrv16qi3 */ |
| 63627 | case 4003: /* xop_rotlv2di3 */ |
| 63628 | case 4002: /* xop_rotlv4si3 */ |
| 63629 | case 4001: /* xop_rotlv8hi3 */ |
| 63630 | case 4000: /* xop_rotlv16qi3 */ |
| 63631 | case 3999: /* xop_pperm_pack_v8hi_v16qi */ |
| 63632 | case 3998: /* xop_pperm_pack_v4si_v8hi */ |
| 63633 | case 3997: /* xop_pperm_pack_v2di_v4si */ |
| 63634 | case 3996: /* xop_pperm */ |
| 63635 | case 3995: /* xop_phsubdq */ |
| 63636 | case 3994: /* xop_phsubwd */ |
| 63637 | case 3993: /* xop_phsubbw */ |
| 63638 | case 3992: /* xop_phaddudq */ |
| 63639 | case 3991: /* xop_phadddq */ |
| 63640 | case 3990: /* xop_phadduwq */ |
| 63641 | case 3989: /* xop_phaddwq */ |
| 63642 | case 3988: /* xop_phadduwd */ |
| 63643 | case 3987: /* xop_phaddwd */ |
| 63644 | case 3986: /* xop_phaddubq */ |
| 63645 | case 3985: /* xop_phaddbq */ |
| 63646 | case 3984: /* xop_phaddubd */ |
| 63647 | case 3983: /* xop_phaddbd */ |
| 63648 | case 3982: /* xop_phaddubw */ |
| 63649 | case 3981: /* xop_phaddbw */ |
| 63650 | case 3980: /* xop_pcmov_v2df */ |
| 63651 | case 3979: /* xop_pcmov_v4df256 */ |
| 63652 | case 3978: /* xop_pcmov_v8df512 */ |
| 63653 | case 3977: /* xop_pcmov_v4sf */ |
| 63654 | case 3976: /* xop_pcmov_v8sf256 */ |
| 63655 | case 3975: /* xop_pcmov_v16sf512 */ |
| 63656 | case 3974: /* xop_pcmov_v2di */ |
| 63657 | case 3973: /* xop_pcmov_v4di256 */ |
| 63658 | case 3972: /* xop_pcmov_v8di512 */ |
| 63659 | case 3971: /* xop_pcmov_v4si */ |
| 63660 | case 3970: /* xop_pcmov_v8si256 */ |
| 63661 | case 3969: /* xop_pcmov_v16si512 */ |
| 63662 | case 3968: /* xop_pcmov_v8hi */ |
| 63663 | case 3967: /* xop_pcmov_v16hi256 */ |
| 63664 | case 3966: /* xop_pcmov_v16qi */ |
| 63665 | case 3965: /* xop_pcmov_v32qi256 */ |
| 63666 | case 3952: /* avx512er_vmrsqrt28v2df_round */ |
| 63667 | case 3951: /* avx512er_vmrsqrt28v2df */ |
| 63668 | case 3950: /* avx512er_vmrsqrt28v4sf_round */ |
| 63669 | case 3949: /* avx512er_vmrsqrt28v4sf */ |
| 63670 | case 3948: /* avx512er_rsqrt28v8df_mask_round */ |
| 63671 | case 3947: /* avx512er_rsqrt28v8df_mask */ |
| 63672 | case 3946: /* *avx512er_rsqrt28v8df_round */ |
| 63673 | case 3945: /* *avx512er_rsqrt28v8df */ |
| 63674 | case 3944: /* avx512er_rsqrt28v16sf_mask_round */ |
| 63675 | case 3943: /* avx512er_rsqrt28v16sf_mask */ |
| 63676 | case 3942: /* *avx512er_rsqrt28v16sf_round */ |
| 63677 | case 3941: /* *avx512er_rsqrt28v16sf */ |
| 63678 | case 3940: /* avx512er_vmrcp28v2df_round */ |
| 63679 | case 3939: /* avx512er_vmrcp28v2df */ |
| 63680 | case 3938: /* avx512er_vmrcp28v4sf_round */ |
| 63681 | case 3937: /* avx512er_vmrcp28v4sf */ |
| 63682 | case 3936: /* avx512er_rcp28v8df_mask_round */ |
| 63683 | case 3935: /* avx512er_rcp28v8df_mask */ |
| 63684 | case 3934: /* *avx512er_rcp28v8df_round */ |
| 63685 | case 3933: /* *avx512er_rcp28v8df */ |
| 63686 | case 3932: /* avx512er_rcp28v16sf_mask_round */ |
| 63687 | case 3931: /* avx512er_rcp28v16sf_mask */ |
| 63688 | case 3930: /* *avx512er_rcp28v16sf_round */ |
| 63689 | case 3929: /* *avx512er_rcp28v16sf */ |
| 63690 | case 3928: /* avx512er_exp2v8df_mask_round */ |
| 63691 | case 3927: /* avx512er_exp2v8df_mask */ |
| 63692 | case 3926: /* avx512er_exp2v8df_round */ |
| 63693 | case 3925: /* avx512er_exp2v8df */ |
| 63694 | case 3924: /* avx512er_exp2v16sf_mask_round */ |
| 63695 | case 3923: /* avx512er_exp2v16sf_mask */ |
| 63696 | case 3922: /* avx512er_exp2v16sf_round */ |
| 63697 | case 3921: /* avx512er_exp2v16sf */ |
| 63698 | case 3920: /* *avx512pf_scatterpfv8didf_mask */ |
| 63699 | case 3919: /* *avx512pf_scatterpfv8didf_mask */ |
| 63700 | case 3918: /* *avx512pf_scatterpfv8sidf_mask */ |
| 63701 | case 3917: /* *avx512pf_scatterpfv8sidf_mask */ |
| 63702 | case 3916: /* *avx512pf_scatterpfv8disf_mask */ |
| 63703 | case 3915: /* *avx512pf_scatterpfv8disf_mask */ |
| 63704 | case 3914: /* *avx512pf_scatterpfv16sisf_mask */ |
| 63705 | case 3913: /* *avx512pf_scatterpfv16sisf_mask */ |
| 63706 | case 3912: /* *avx512pf_gatherpfv8didf_mask */ |
| 63707 | case 3911: /* *avx512pf_gatherpfv8didf_mask */ |
| 63708 | case 3910: /* *avx512pf_gatherpfv8sidf_mask */ |
| 63709 | case 3909: /* *avx512pf_gatherpfv8sidf_mask */ |
| 63710 | case 3908: /* *avx512pf_gatherpfv8disf_mask */ |
| 63711 | case 3907: /* *avx512pf_gatherpfv8disf_mask */ |
| 63712 | case 3906: /* *avx512pf_gatherpfv16sisf_mask */ |
| 63713 | case 3905: /* *avx512pf_gatherpfv16sisf_mask */ |
| 63714 | case 3769: /* sse4a_extrq */ |
| 63715 | case 3768: /* sse4a_extrqi */ |
| 63716 | case 3736: /* ssse3_palignrdi */ |
| 63717 | case 3735: /* ssse3_palignrti */ |
| 63718 | case 3734: /* avx2_palignrv2ti */ |
| 63719 | case 3733: /* avx512bw_palignrv4ti */ |
| 63720 | case 3732: /* ssse3_palignrv16qi_mask */ |
| 63721 | case 3731: /* avx2_palignrv32qi_mask */ |
| 63722 | case 3730: /* avx512bw_palignrv64qi_mask */ |
| 63723 | case 3674: /* sse2_clflush */ |
| 63724 | case 3673: /* sse_stmxcsr */ |
| 63725 | case 3672: /* sse_ldmxcsr */ |
| 63726 | case 3143: /* sse2_lshrv1ti3 */ |
| 63727 | case 3142: /* avx2_lshrv2ti3 */ |
| 63728 | case 3141: /* avx512bw_lshrv4ti3 */ |
| 63729 | case 3140: /* sse2_ashlv1ti3 */ |
| 63730 | case 3139: /* avx2_ashlv2ti3 */ |
| 63731 | case 3138: /* avx512bw_ashlv4ti3 */ |
| 63732 | case 3137: /* lshrv8di3_mask */ |
| 63733 | case 3136: /* lshrv8di3 */ |
| 63734 | case 3135: /* ashlv8di3_mask */ |
| 63735 | case 3134: /* ashlv8di3 */ |
| 63736 | case 3133: /* lshrv16si3_mask */ |
| 63737 | case 3132: /* lshrv16si3 */ |
| 63738 | case 3131: /* ashlv16si3_mask */ |
| 63739 | case 3130: /* ashlv16si3 */ |
| 63740 | case 3129: /* lshrv2di3_mask */ |
| 63741 | case 3128: /* lshrv2di3 */ |
| 63742 | case 3127: /* ashlv2di3_mask */ |
| 63743 | case 3126: /* ashlv2di3 */ |
| 63744 | case 3125: /* lshrv4di3_mask */ |
| 63745 | case 3124: /* lshrv4di3 */ |
| 63746 | case 3123: /* ashlv4di3_mask */ |
| 63747 | case 3122: /* ashlv4di3 */ |
| 63748 | case 3121: /* lshrv4si3_mask */ |
| 63749 | case 3120: /* lshrv4si3 */ |
| 63750 | case 3119: /* ashlv4si3_mask */ |
| 63751 | case 3118: /* ashlv4si3 */ |
| 63752 | case 3117: /* lshrv8si3_mask */ |
| 63753 | case 3116: /* lshrv8si3 */ |
| 63754 | case 3115: /* ashlv8si3_mask */ |
| 63755 | case 3114: /* ashlv8si3 */ |
| 63756 | case 3113: /* lshrv8hi3_mask */ |
| 63757 | case 3112: /* lshrv8hi3 */ |
| 63758 | case 3111: /* ashlv8hi3_mask */ |
| 63759 | case 3110: /* ashlv8hi3 */ |
| 63760 | case 3109: /* lshrv16hi3_mask */ |
| 63761 | case 3108: /* lshrv16hi3 */ |
| 63762 | case 3107: /* ashlv16hi3_mask */ |
| 63763 | case 3106: /* ashlv16hi3 */ |
| 63764 | case 3105: /* lshrv32hi3_mask */ |
| 63765 | case 3104: /* lshrv32hi3 */ |
| 63766 | case 3103: /* ashlv32hi3_mask */ |
| 63767 | case 3102: /* ashlv32hi3 */ |
| 63768 | case 3101: /* ashrv8di3_mask */ |
| 63769 | case 3100: /* ashrv8di3 */ |
| 63770 | case 3099: /* ashrv16si3_mask */ |
| 63771 | case 3098: /* ashrv16si3 */ |
| 63772 | case 3097: /* ashrv4di3_mask */ |
| 63773 | case 3096: /* ashrv4di3 */ |
| 63774 | case 3095: /* ashrv32hi3_mask */ |
| 63775 | case 3094: /* ashrv32hi3 */ |
| 63776 | case 3093: /* ashrv2di3_mask */ |
| 63777 | case 3092: /* *ashrv2di3 */ |
| 63778 | case 3091: /* ashrv4si3 */ |
| 63779 | case 3090: /* ashrv8si3 */ |
| 63780 | case 3089: /* ashrv8hi3 */ |
| 63781 | case 3088: /* ashrv16hi3 */ |
| 63782 | case 3087: /* ashrv4si3_mask */ |
| 63783 | case 3086: /* *ashrv4si3 */ |
| 63784 | case 3085: /* ashrv8si3_mask */ |
| 63785 | case 3084: /* *ashrv8si3 */ |
| 63786 | case 3083: /* ashrv8hi3_mask */ |
| 63787 | case 3082: /* *ashrv8hi3 */ |
| 63788 | case 3081: /* ashrv16hi3_mask */ |
| 63789 | case 3080: /* *ashrv16hi3 */ |
| 63790 | case 2443: /* avx512f_movsldup512_mask */ |
| 63791 | case 2442: /* *avx512f_movsldup512 */ |
| 63792 | case 2441: /* sse3_movsldup_mask */ |
| 63793 | case 2440: /* sse3_movsldup */ |
| 63794 | case 2439: /* avx_movsldup256_mask */ |
| 63795 | case 2438: /* avx_movsldup256 */ |
| 63796 | case 2437: /* avx512f_movshdup512_mask */ |
| 63797 | case 2436: /* *avx512f_movshdup512 */ |
| 63798 | case 2435: /* sse3_movshdup_mask */ |
| 63799 | case 2434: /* sse3_movshdup */ |
| 63800 | case 2433: /* avx_movshdup256_mask */ |
| 63801 | case 2432: /* avx_movshdup256 */ |
| 63802 | case 1634: /* reducesv2df */ |
| 63803 | case 1633: /* reducesv4sf */ |
| 63804 | case 1632: /* reducepv2df_mask */ |
| 63805 | case 1631: /* *reducepv2df */ |
| 63806 | case 1630: /* reducepv4df_mask */ |
| 63807 | case 1629: /* *reducepv4df */ |
| 63808 | case 1628: /* reducepv8df_mask */ |
| 63809 | case 1627: /* *reducepv8df */ |
| 63810 | case 1626: /* reducepv4sf_mask */ |
| 63811 | case 1625: /* *reducepv4sf */ |
| 63812 | case 1624: /* reducepv8sf_mask */ |
| 63813 | case 1623: /* *reducepv8sf */ |
| 63814 | case 1622: /* reducepv16sf_mask */ |
| 63815 | case 1621: /* *reducepv16sf */ |
| 63816 | case 1606: /* sse2_vmsminv2df3_round */ |
| 63817 | case 1605: /* sse2_vmsminv2df3 */ |
| 63818 | case 1604: /* sse2_vmsmaxv2df3_round */ |
| 63819 | case 1603: /* sse2_vmsmaxv2df3 */ |
| 63820 | case 1602: /* sse_vmsminv4sf3_round */ |
| 63821 | case 1601: /* sse_vmsminv4sf3 */ |
| 63822 | case 1600: /* sse_vmsmaxv4sf3_round */ |
| 63823 | case 1599: /* sse_vmsmaxv4sf3 */ |
| 63824 | case 1518: /* sse_vmrsqrtv4sf2 */ |
| 63825 | case 1517: /* rsqrt14v2df */ |
| 63826 | case 1516: /* rsqrt14v4sf */ |
| 63827 | case 1515: /* rsqrt14v2df_mask */ |
| 63828 | case 1514: /* *rsqrt14v2df */ |
| 63829 | case 1513: /* rsqrt14v4df_mask */ |
| 63830 | case 1512: /* *rsqrt14v4df */ |
| 63831 | case 1511: /* rsqrt14v8df_mask */ |
| 63832 | case 1510: /* *rsqrt14v8df */ |
| 63833 | case 1509: /* rsqrt14v4sf_mask */ |
| 63834 | case 1508: /* *rsqrt14v4sf */ |
| 63835 | case 1507: /* rsqrt14v8sf_mask */ |
| 63836 | case 1506: /* *rsqrt14v8sf */ |
| 63837 | case 1505: /* rsqrt14v16sf_mask */ |
| 63838 | case 1504: /* *rsqrt14v16sf */ |
| 63839 | case 1503: /* sse_rsqrtv4sf2 */ |
| 63840 | case 1502: /* avx_rsqrtv8sf2 */ |
| 63841 | case 1501: /* sse2_vmsqrtv2df2_round */ |
| 63842 | case 1500: /* sse2_vmsqrtv2df2 */ |
| 63843 | case 1499: /* sse_vmsqrtv4sf2_round */ |
| 63844 | case 1498: /* sse_vmsqrtv4sf2 */ |
| 63845 | case 1497: /* sse2_sqrtv2df2_mask */ |
| 63846 | case 1496: /* sse2_sqrtv2df2 */ |
| 63847 | case 1495: /* avx_sqrtv4df2_mask */ |
| 63848 | case 1494: /* avx_sqrtv4df2 */ |
| 63849 | case 1493: /* avx512f_sqrtv8df2_mask_round */ |
| 63850 | case 1492: /* avx512f_sqrtv8df2_mask */ |
| 63851 | case 1491: /* avx512f_sqrtv8df2_round */ |
| 63852 | case 1490: /* avx512f_sqrtv8df2 */ |
| 63853 | case 1489: /* sse_sqrtv4sf2_mask */ |
| 63854 | case 1488: /* sse_sqrtv4sf2 */ |
| 63855 | case 1487: /* avx_sqrtv8sf2_mask */ |
| 63856 | case 1486: /* avx_sqrtv8sf2 */ |
| 63857 | case 1485: /* avx512f_sqrtv16sf2_mask_round */ |
| 63858 | case 1484: /* avx512f_sqrtv16sf2_mask */ |
| 63859 | case 1483: /* avx512f_sqrtv16sf2_round */ |
| 63860 | case 1482: /* avx512f_sqrtv16sf2 */ |
| 63861 | case 1481: /* srcp14v2df */ |
| 63862 | case 1480: /* srcp14v4sf */ |
| 63863 | case 1479: /* rcp14v2df_mask */ |
| 63864 | case 1478: /* *rcp14v2df */ |
| 63865 | case 1477: /* rcp14v4df_mask */ |
| 63866 | case 1476: /* *rcp14v4df */ |
| 63867 | case 1475: /* rcp14v8df_mask */ |
| 63868 | case 1474: /* *rcp14v8df */ |
| 63869 | case 1473: /* rcp14v4sf_mask */ |
| 63870 | case 1472: /* *rcp14v4sf */ |
| 63871 | case 1471: /* rcp14v8sf_mask */ |
| 63872 | case 1470: /* *rcp14v8sf */ |
| 63873 | case 1469: /* rcp14v16sf_mask */ |
| 63874 | case 1468: /* *rcp14v16sf */ |
| 63875 | case 1467: /* sse_vmrcpv4sf2 */ |
| 63876 | case 1466: /* sse_rcpv4sf2 */ |
| 63877 | case 1465: /* avx_rcpv8sf2 */ |
| 63878 | case 1460: /* avx512f_divv8df3_mask_round */ |
| 63879 | case 1459: /* avx512f_divv8df3_mask */ |
| 63880 | case 1458: /* avx512f_divv8df3_round */ |
| 63881 | case 1457: /* avx512f_divv8df3 */ |
| 63882 | case 1452: /* avx512f_divv16sf3_mask_round */ |
| 63883 | case 1451: /* avx512f_divv16sf3_mask */ |
| 63884 | case 1450: /* avx512f_divv16sf3_round */ |
| 63885 | case 1449: /* avx512f_divv16sf3 */ |
| 63886 | case 1217: /* *mmx_femms */ |
| 63887 | case 1216: /* *mmx_emms */ |
| 63888 | case 1215: /* *mmx_maskmovq */ |
| 63889 | case 1214: /* *mmx_maskmovq */ |
| 63890 | case 1213: /* mmx_pmovmskb */ |
| 63891 | case 1212: /* mmx_psadbw */ |
| 63892 | case 1211: /* *mmx_uavgv4hi3 */ |
| 63893 | case 1210: /* *mmx_uavgv8qi3 */ |
| 63894 | case 1205: /* *vec_dupv2si */ |
| 63895 | case 1204: /* *vec_dupv4hi */ |
| 63896 | case 1203: /* mmx_pswapdv2si2 */ |
| 63897 | case 1202: /* mmx_pshufw_1 */ |
| 63898 | case 1201: /* mmx_pextrw */ |
| 63899 | case 1200: /* *mmx_pinsrw */ |
| 63900 | case 1199: /* mmx_punpckldq */ |
| 63901 | case 1198: /* mmx_punpckhdq */ |
| 63902 | case 1197: /* mmx_punpcklwd */ |
| 63903 | case 1196: /* mmx_punpckhwd */ |
| 63904 | case 1195: /* mmx_punpcklbw */ |
| 63905 | case 1194: /* mmx_punpckhbw */ |
| 63906 | case 1193: /* mmx_packuswb */ |
| 63907 | case 1192: /* mmx_packssdw */ |
| 63908 | case 1191: /* mmx_packsswb */ |
| 63909 | case 1190: /* *mmx_xorv2si3 */ |
| 63910 | case 1189: /* *mmx_iorv2si3 */ |
| 63911 | case 1188: /* *mmx_andv2si3 */ |
| 63912 | case 1187: /* *mmx_xorv4hi3 */ |
| 63913 | case 1186: /* *mmx_iorv4hi3 */ |
| 63914 | case 1185: /* *mmx_andv4hi3 */ |
| 63915 | case 1184: /* *mmx_xorv8qi3 */ |
| 63916 | case 1183: /* *mmx_iorv8qi3 */ |
| 63917 | case 1182: /* *mmx_andv8qi3 */ |
| 63918 | case 1181: /* mmx_andnotv2si3 */ |
| 63919 | case 1180: /* mmx_andnotv4hi3 */ |
| 63920 | case 1179: /* mmx_andnotv8qi3 */ |
| 63921 | case 1178: /* mmx_gtv2si3 */ |
| 63922 | case 1177: /* mmx_gtv4hi3 */ |
| 63923 | case 1176: /* mmx_gtv8qi3 */ |
| 63924 | case 1175: /* *mmx_eqv2si3 */ |
| 63925 | case 1174: /* *mmx_eqv4hi3 */ |
| 63926 | case 1173: /* *mmx_eqv8qi3 */ |
| 63927 | case 1172: /* mmx_lshrv1di3 */ |
| 63928 | case 1171: /* mmx_ashlv1di3 */ |
| 63929 | case 1170: /* mmx_lshrv2si3 */ |
| 63930 | case 1169: /* mmx_ashlv2si3 */ |
| 63931 | case 1168: /* mmx_lshrv4hi3 */ |
| 63932 | case 1167: /* mmx_ashlv4hi3 */ |
| 63933 | case 1166: /* mmx_ashrv2si3 */ |
| 63934 | case 1165: /* mmx_ashrv4hi3 */ |
| 63935 | case 1164: /* *mmx_uminv8qi3 */ |
| 63936 | case 1163: /* *mmx_umaxv8qi3 */ |
| 63937 | case 1162: /* *mmx_sminv4hi3 */ |
| 63938 | case 1161: /* *mmx_smaxv4hi3 */ |
| 63939 | case 1160: /* *sse2_umulv1siv1di3 */ |
| 63940 | case 1159: /* *mmx_pmulhrwv4hi3 */ |
| 63941 | case 1158: /* *mmx_pmaddwd */ |
| 63942 | case 1157: /* *mmx_umulv4hi3_highpart */ |
| 63943 | case 1156: /* *mmx_smulv4hi3_highpart */ |
| 63944 | case 1155: /* *mmx_mulv4hi3 */ |
| 63945 | case 1154: /* *mmx_ussubv4hi3 */ |
| 63946 | case 1153: /* *mmx_sssubv4hi3 */ |
| 63947 | case 1152: /* *mmx_usaddv4hi3 */ |
| 63948 | case 1151: /* *mmx_ssaddv4hi3 */ |
| 63949 | case 1150: /* *mmx_ussubv8qi3 */ |
| 63950 | case 1149: /* *mmx_sssubv8qi3 */ |
| 63951 | case 1148: /* *mmx_usaddv8qi3 */ |
| 63952 | case 1147: /* *mmx_ssaddv8qi3 */ |
| 63953 | case 1146: /* *mmx_subv1di3 */ |
| 63954 | case 1145: /* *mmx_addv1di3 */ |
| 63955 | case 1144: /* *mmx_subv2si3 */ |
| 63956 | case 1143: /* *mmx_addv2si3 */ |
| 63957 | case 1142: /* *mmx_subv4hi3 */ |
| 63958 | case 1141: /* *mmx_addv4hi3 */ |
| 63959 | case 1140: /* *mmx_subv8qi3 */ |
| 63960 | case 1139: /* *mmx_addv8qi3 */ |
| 63961 | case 1135: /* *vec_dupv2sf */ |
| 63962 | case 1134: /* mmx_pswapdv2sf2 */ |
| 63963 | case 1133: /* mmx_floatv2si2 */ |
| 63964 | case 1132: /* mmx_pi2fw */ |
| 63965 | case 1131: /* mmx_pf2iw */ |
| 63966 | case 1130: /* mmx_pf2id */ |
| 63967 | case 1129: /* mmx_gev2sf3 */ |
| 63968 | case 1128: /* mmx_gtv2sf3 */ |
| 63969 | case 1127: /* *mmx_eqv2sf3 */ |
| 63970 | case 1126: /* mmx_addsubv2sf3 */ |
| 63971 | case 1125: /* mmx_hsubv2sf3 */ |
| 63972 | case 1124: /* mmx_haddv2sf3 */ |
| 63973 | case 1123: /* mmx_rsqit1v2sf3 */ |
| 63974 | case 1122: /* mmx_rsqrtv2sf2 */ |
| 63975 | case 1121: /* mmx_rcpit2v2sf3 */ |
| 63976 | case 1120: /* mmx_rcpit1v2sf3 */ |
| 63977 | case 1119: /* mmx_rcpv2sf2 */ |
| 63978 | case 1118: /* mmx_ieee_minv2sf3 */ |
| 63979 | case 1117: /* mmx_ieee_maxv2sf3 */ |
| 63980 | case 1116: /* *mmx_sminv2sf3 */ |
| 63981 | case 1115: /* *mmx_smaxv2sf3 */ |
| 63982 | case 1114: /* *mmx_mulv2sf3 */ |
| 63983 | case 1113: /* *mmx_subv2sf3 */ |
| 63984 | case 1112: /* *mmx_addv2sf3 */ |
| 63985 | case 1081: /* clflushopt */ |
| 63986 | case 1080: /* clwb */ |
| 63987 | case 1008: /* *prefetch_prefetchwt1 */ |
| 63988 | case 1007: /* *prefetch_3dnow */ |
| 63989 | case 1006: /* *prefetch_sse */ |
| 63990 | case 984: /* *xop_pcmov_df */ |
| 63991 | case 983: /* *xop_pcmov_sf */ |
| 63992 | case 932: /* fxamdf2_i387_with_temp */ |
| 63993 | case 931: /* fxamsf2_i387_with_temp */ |
| 63994 | case 930: /* fxamxf2_i387 */ |
| 63995 | case 929: /* fxamdf2_i387 */ |
| 63996 | case 928: /* fxamsf2_i387 */ |
| 63997 | case 909: /* frndintxf2_mask_pm_i387 */ |
| 63998 | case 908: /* frndintxf2_mask_pm */ |
| 63999 | case 907: /* frndintxf2_trunc_i387 */ |
| 64000 | case 906: /* frndintxf2_ceil_i387 */ |
| 64001 | case 905: /* frndintxf2_floor_i387 */ |
| 64002 | case 904: /* frndintdf2_trunc_i387 */ |
| 64003 | case 903: /* frndintdf2_ceil_i387 */ |
| 64004 | case 902: /* frndintdf2_floor_i387 */ |
| 64005 | case 901: /* frndintsf2_trunc_i387 */ |
| 64006 | case 900: /* frndintsf2_ceil_i387 */ |
| 64007 | case 899: /* frndintsf2_floor_i387 */ |
| 64008 | case 898: /* frndintxf2_trunc */ |
| 64009 | case 897: /* frndintxf2_ceil */ |
| 64010 | case 896: /* frndintxf2_floor */ |
| 64011 | case 895: /* frndintdf2_trunc */ |
| 64012 | case 894: /* frndintdf2_ceil */ |
| 64013 | case 893: /* frndintdf2_floor */ |
| 64014 | case 892: /* frndintsf2_trunc */ |
| 64015 | case 891: /* frndintsf2_ceil */ |
| 64016 | case 890: /* frndintsf2_floor */ |
| 64017 | case 889: /* fistsi2_with_temp */ |
| 64018 | case 888: /* fisthi2_with_temp */ |
| 64019 | case 887: /* fistsi2 */ |
| 64020 | case 886: /* fisthi2 */ |
| 64021 | case 885: /* *fistsi2_1 */ |
| 64022 | case 884: /* *fisthi2_1 */ |
| 64023 | case 883: /* fistdi2_with_temp */ |
| 64024 | case 882: /* fistdi2 */ |
| 64025 | case 881: /* *fistdi2_1 */ |
| 64026 | case 880: /* rintdf2_frndint */ |
| 64027 | case 879: /* rintsf2_frndint */ |
| 64028 | case 878: /* rintxf2 */ |
| 64029 | case 875: /* fscalexf4_i387 */ |
| 64030 | case 874: /* *f2xm1xf2_i387 */ |
| 64031 | case 873: /* fxtract_extenddfxf3_i387 */ |
| 64032 | case 872: /* fxtract_extendsfxf3_i387 */ |
| 64033 | case 871: /* fxtractxf3_i387 */ |
| 64034 | case 870: /* fyl2xp1_extenddfxf3_i387 */ |
| 64035 | case 869: /* fyl2xp1_extendsfxf3_i387 */ |
| 64036 | case 868: /* fyl2xp1xf3_i387 */ |
| 64037 | case 867: /* fyl2x_extenddfxf3_i387 */ |
| 64038 | case 866: /* fyl2x_extendsfxf3_i387 */ |
| 64039 | case 865: /* fyl2xxf3_i387 */ |
| 64040 | case 864: /* fpatan_extenddfxf3_i387 */ |
| 64041 | case 863: /* fpatan_extendsfxf3_i387 */ |
| 64042 | case 862: /* *fpatanxf3_i387 */ |
| 64043 | case 861: /* fptan_extenddfxf4_i387 */ |
| 64044 | case 860: /* fptan_extendsfxf4_i387 */ |
| 64045 | case 859: /* fptanxf4_i387 */ |
| 64046 | case 858: /* sincos_extenddfxf3_i387 */ |
| 64047 | case 857: /* sincos_extendsfxf3_i387 */ |
| 64048 | case 856: /* sincosxf3 */ |
| 64049 | case 855: /* *cos_extenddfxf2_i387 */ |
| 64050 | case 854: /* *sin_extenddfxf2_i387 */ |
| 64051 | case 853: /* *cos_extendsfxf2_i387 */ |
| 64052 | case 852: /* *sin_extendsfxf2_i387 */ |
| 64053 | case 851: /* *cosxf2_i387 */ |
| 64054 | case 850: /* *sinxf2_i387 */ |
| 64055 | case 849: /* fprem1xf4_i387 */ |
| 64056 | case 848: /* fpremxf4_i387 */ |
| 64057 | case 847: /* *sqrtdf2_sse */ |
| 64058 | case 846: /* *sqrtsf2_sse */ |
| 64059 | case 845: /* *rsqrtsf2_sse */ |
| 64060 | case 844: /* sqrt_extenddfxf2_i387 */ |
| 64061 | case 843: /* sqrt_extendsfxf2_i387 */ |
| 64062 | case 842: /* sqrtxf2 */ |
| 64063 | case 814: /* *rcpsf2_sse */ |
| 64064 | case 209: /* floatdixf2_i387_with_xmm */ |
| 64065 | case 208: /* floatdidf2_i387_with_xmm */ |
| 64066 | case 207: /* floatdisf2_i387_with_xmm */ |
| 64067 | case 193: /* x86_fldcw_1 */ |
| 64068 | case 192: /* x86_fnstcw_1 */ |
| 64069 | case 47: /* x86_fnstsw_1 */ |
| 64070 | case 46: /* *cmpxf_si_cc_i387 */ |
| 64071 | case 45: /* *cmpdf_si_cc_i387 */ |
| 64072 | case 44: /* *cmpsf_si_cc_i387 */ |
| 64073 | case 43: /* *cmpxf_hi_cc_i387 */ |
| 64074 | case 42: /* *cmpdf_hi_cc_i387 */ |
| 64075 | case 41: /* *cmpsf_hi_cc_i387 */ |
| 64076 | case 40: /* *cmpxf_si_i387 */ |
| 64077 | case 39: /* *cmpdf_si_i387 */ |
| 64078 | case 38: /* *cmpsf_si_i387 */ |
| 64079 | case 37: /* *cmpxf_hi_i387 */ |
| 64080 | case 36: /* *cmpdf_hi_i387 */ |
| 64081 | case 35: /* *cmpsf_hi_i387 */ |
| 64082 | case 34: /* *cmpuxf_cc_i387 */ |
| 64083 | case 33: /* *cmpudf_cc_i387 */ |
| 64084 | case 32: /* *cmpusf_cc_i387 */ |
| 64085 | case 31: /* *cmpuxf_i387 */ |
| 64086 | case 30: /* *cmpudf_i387 */ |
| 64087 | case 29: /* *cmpusf_i387 */ |
| 64088 | case 28: /* *cmpdf_cc_i387 */ |
| 64089 | case 27: /* *cmpsf_cc_i387 */ |
| 64090 | case 26: /* *cmpdf_i387 */ |
| 64091 | case 25: /* *cmpsf_i387 */ |
| 64092 | case 24: /* *cmpxf_cc_i387 */ |
| 64093 | case 23: /* *cmpxf_i387 */ |
| 64094 | case 22: /* *cmpxf_0_cc_i387 */ |
| 64095 | case 21: /* *cmpdf_0_cc_i387 */ |
| 64096 | case 20: /* *cmpsf_0_cc_i387 */ |
| 64097 | case 19: /* *cmpxf_0_i387 */ |
| 64098 | case 18: /* *cmpdf_0_i387 */ |
| 64099 | case 17: /* *cmpsf_0_i387 */ |
| 64100 | return 0; |
| 64101 | |
| 64102 | case 659: /* jump */ |
| 64103 | case 628: /* *jcc_2 */ |
| 64104 | case 627: /* *jcc_1 */ |
| 64105 | case 393: /* *testqi_ext_2 */ |
| 64106 | case 392: /* *testqi_ext_1 */ |
| 64107 | case 391: /* *testsi_1 */ |
| 64108 | case 390: /* *testhi_1 */ |
| 64109 | case 389: /* *testqi_1 */ |
| 64110 | case 388: /* *testqi_1_maybe_si */ |
| 64111 | case 387: /* *testdi_1 */ |
| 64112 | case 222: /* *addqi_1_slp */ |
| 64113 | case 16: /* *cmpqi_ext_4 */ |
| 64114 | case 15: /* *cmpqi_ext_3 */ |
| 64115 | case 14: /* *cmpqi_ext_2 */ |
| 64116 | case 13: /* *cmpqi_ext_1 */ |
| 64117 | case 12: /* *cmpdi_minus_1 */ |
| 64118 | case 11: /* *cmpsi_minus_1 */ |
| 64119 | case 10: /* *cmphi_minus_1 */ |
| 64120 | case 9: /* *cmpqi_minus_1 */ |
| 64121 | case 8: /* *cmpdi_1 */ |
| 64122 | case 7: /* *cmpsi_1 */ |
| 64123 | case 6: /* *cmphi_1 */ |
| 64124 | case 5: /* *cmpqi_1 */ |
| 64125 | case 4: /* *cmpdi_ccno_1 */ |
| 64126 | case 3: /* *cmpsi_ccno_1 */ |
| 64127 | case 2: /* *cmphi_ccno_1 */ |
| 64128 | case 1: /* *cmpqi_ccno_1 */ |
| 64129 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) |
| 64130 | { |
| 64131 | return 1; |
| 64132 | } |
| 64133 | else if (cached_memory == MEMORY_LOAD) |
| 64134 | { |
| 64135 | return 5; |
| 64136 | } |
| 64137 | else |
| 64138 | { |
| 64139 | return 0; |
| 64140 | } |
| 64141 | |
| 64142 | case -1: |
| 64143 | if (GET_CODE (PATTERN (insn)) != ASM_INPUT |
| 64144 | && asm_noperands (PATTERN (insn)) < 0) |
| 64145 | fatal_insn_not_found (insn); |
| 64146 | /* FALLTHRU */ |
| 64147 | default: |
| 64148 | extract_insn_cached (insn); |
| 64149 | if (((cached_type = get_attr_type (insn)) == TYPE_CALL) || (cached_type == TYPE_CALLV)) |
| 64150 | { |
| 64151 | return 2; |
| 64152 | } |
| 64153 | else if (cached_type == TYPE_PUSH) |
| 64154 | { |
| 64155 | return 1; |
| 64156 | } |
| 64157 | else if (cached_type == TYPE_POP) |
| 64158 | { |
| 64159 | return 1; |
| 64160 | } |
| 64161 | else if (cached_type == TYPE_LEAVE) |
| 64162 | { |
| 64163 | return 3; |
| 64164 | } |
| 64165 | else if (cached_type == TYPE_LEA) |
| 64166 | { |
| 64167 | return 1; |
| 64168 | } |
| 64169 | else if ((cached_type == TYPE_IMUL) && ((cached_mode = get_attr_mode (insn)) == MODE_DI) && (((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) || (cached_memory == MEMORY_UNKNOWN))) |
| 64170 | { |
| 64171 | return 6; |
| 64172 | } |
| 64173 | else if ((cached_type == TYPE_IMUL) && (((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) || (cached_memory == MEMORY_UNKNOWN))) |
| 64174 | { |
| 64175 | return 4; |
| 64176 | } |
| 64177 | else if ((cached_type == TYPE_IMUL) && ((cached_mode = get_attr_mode (insn)) == MODE_DI) && (((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) || (cached_memory == MEMORY_BOTH))) |
| 64178 | { |
| 64179 | return 10 /* 0xa */; |
| 64180 | } |
| 64181 | else if ((cached_type == TYPE_IMUL) && (((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) || (cached_memory == MEMORY_BOTH))) |
| 64182 | { |
| 64183 | return 8; |
| 64184 | } |
| 64185 | else if ((cached_type == TYPE_STR) && (((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) || (cached_memory == MEMORY_BOTH) || (cached_memory == MEMORY_STORE))) |
| 64186 | { |
| 64187 | return 6; |
| 64188 | } |
| 64189 | else if (((cached_bdver1_decode = get_attr_bdver1_decode (insn)) == BDVER1_DECODE_DIRECT) && (((cached_unit = get_attr_unit (insn)) == UNIT_INTEGER) || (cached_unit == UNIT_UNKNOWN)) && (((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) || (cached_memory == MEMORY_UNKNOWN))) |
| 64190 | { |
| 64191 | return 1; |
| 64192 | } |
| 64193 | else if ((cached_bdver1_decode == BDVER1_DECODE_VECTOR) && (((cached_unit = get_attr_unit (insn)) == UNIT_INTEGER) || (cached_unit == UNIT_UNKNOWN)) && (((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) || (cached_memory == MEMORY_UNKNOWN))) |
| 64194 | { |
| 64195 | return 2; |
| 64196 | } |
| 64197 | else if ((cached_type == TYPE_IMOV) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 64198 | { |
| 64199 | return 4; |
| 64200 | } |
| 64201 | else if ((cached_bdver1_decode == BDVER1_DECODE_DIRECT) && (((cached_unit = get_attr_unit (insn)) == UNIT_INTEGER) || (cached_unit == UNIT_UNKNOWN)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 64202 | { |
| 64203 | return 5; |
| 64204 | } |
| 64205 | else if ((cached_type == TYPE_IMOV) && ((cached_memory = get_attr_memory (insn)) == MEMORY_STORE)) |
| 64206 | { |
| 64207 | return 5; |
| 64208 | } |
| 64209 | else if ((cached_bdver1_decode == BDVER1_DECODE_DIRECT) && (((cached_unit = get_attr_unit (insn)) == UNIT_INTEGER) || (cached_unit == UNIT_UNKNOWN)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_BOTH)) |
| 64210 | { |
| 64211 | return 4; |
| 64212 | } |
| 64213 | else if ((cached_bdver1_decode == BDVER1_DECODE_DIRECT) && (((cached_unit = get_attr_unit (insn)) == UNIT_INTEGER) || (cached_unit == UNIT_UNKNOWN)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_STORE)) |
| 64214 | { |
| 64215 | return 4; |
| 64216 | } |
| 64217 | else if ((cached_type == TYPE_FMOV) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) && ((cached_mode = get_attr_mode (insn)) == MODE_XF)) |
| 64218 | { |
| 64219 | return 13 /* 0xd */; |
| 64220 | } |
| 64221 | else if ((cached_type == TYPE_FMOV) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 64222 | { |
| 64223 | return 2; |
| 64224 | } |
| 64225 | else if ((cached_type == TYPE_FMOV) && (((cached_memory = get_attr_memory (insn)) == MEMORY_STORE) || (cached_memory == MEMORY_BOTH)) && ((cached_mode = get_attr_mode (insn)) == MODE_XF)) |
| 64226 | { |
| 64227 | return 4; |
| 64228 | } |
| 64229 | else if ((cached_type == TYPE_FMOV) && (((cached_memory = get_attr_memory (insn)) == MEMORY_STORE) || (cached_memory == MEMORY_BOTH))) |
| 64230 | { |
| 64231 | return 2; |
| 64232 | } |
| 64233 | else if ((cached_type == TYPE_FISTP) || (cached_type == TYPE_FISTTP)) |
| 64234 | { |
| 64235 | return 2; |
| 64236 | } |
| 64237 | else if (cached_type == TYPE_FMOV) |
| 64238 | { |
| 64239 | return 2; |
| 64240 | } |
| 64241 | else if ((cached_type == TYPE_FOP) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 64242 | { |
| 64243 | return 10 /* 0xa */; |
| 64244 | } |
| 64245 | else if (cached_type == TYPE_FOP) |
| 64246 | { |
| 64247 | return 6; |
| 64248 | } |
| 64249 | else if ((cached_type == TYPE_FMUL) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 64250 | { |
| 64251 | return 6; |
| 64252 | } |
| 64253 | else if (cached_type == TYPE_FMUL) |
| 64254 | { |
| 64255 | return 6; |
| 64256 | } |
| 64257 | else if (cached_type == TYPE_FSGN) |
| 64258 | { |
| 64259 | return 2; |
| 64260 | } |
| 64261 | else if ((cached_type == TYPE_FDIV) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 64262 | { |
| 64263 | return 42 /* 0x2a */; |
| 64264 | } |
| 64265 | else if (cached_type == TYPE_FDIV) |
| 64266 | { |
| 64267 | return 42 /* 0x2a */; |
| 64268 | } |
| 64269 | else if ((cached_type == TYPE_FPSPC) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 64270 | { |
| 64271 | return 143 /* 0x8f */; |
| 64272 | } |
| 64273 | else if ((cached_type == TYPE_FCMOV) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 64274 | { |
| 64275 | return 17 /* 0x11 */; |
| 64276 | } |
| 64277 | else if (cached_type == TYPE_FCMOV) |
| 64278 | { |
| 64279 | return 15 /* 0xf */; |
| 64280 | } |
| 64281 | else if ((cached_type == TYPE_FCMP) && (cached_bdver1_decode == BDVER1_DECODE_DOUBLE) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 64282 | { |
| 64283 | return 6; |
| 64284 | } |
| 64285 | else if ((cached_bdver1_decode == BDVER1_DECODE_DOUBLE) && (cached_type == TYPE_FCMP)) |
| 64286 | { |
| 64287 | return 2; |
| 64288 | } |
| 64289 | else if ((cached_type == TYPE_FCMP) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 64290 | { |
| 64291 | return 6; |
| 64292 | } |
| 64293 | else if (cached_type == TYPE_FCMP) |
| 64294 | { |
| 64295 | return 2; |
| 64296 | } |
| 64297 | else if (cached_type == TYPE_FXCH) |
| 64298 | { |
| 64299 | return 2; |
| 64300 | } |
| 64301 | else if ((cached_type == TYPE_SSEMOV) && ((cached_prefix = get_attr_prefix (insn)) == PREFIX_VEX) && ((cached_movu = get_attr_movu (insn)) == MOVU_1) && (((cached_mode = get_attr_mode (insn)) == MODE_V4SF) || (cached_mode == MODE_V2DF)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 64302 | { |
| 64303 | return 4; |
| 64304 | } |
| 64305 | else if ((cached_type == TYPE_SSEMOV) && ((cached_movu = get_attr_movu (insn)) == MOVU_1) && (((cached_mode = get_attr_mode (insn)) == MODE_V8SF) || (cached_mode == MODE_V4DF)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 64306 | { |
| 64307 | return 5; |
| 64308 | } |
| 64309 | else if ((cached_type == TYPE_SSEMOV) && ((cached_movu = get_attr_movu (insn)) == MOVU_1) && (((cached_mode = get_attr_mode (insn)) == MODE_V4SF) || (cached_mode == MODE_V2DF)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 64310 | { |
| 64311 | return 4; |
| 64312 | } |
| 64313 | else if ((cached_type == TYPE_SSEMOV) && ((cached_prefix = get_attr_prefix (insn)) == PREFIX_VEX) && (((cached_mode = get_attr_mode (insn)) == MODE_V4SF) || (cached_mode == MODE_V2DF) || (cached_mode == MODE_TI)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 64314 | { |
| 64315 | return 4; |
| 64316 | } |
| 64317 | else if ((cached_type == TYPE_SSEMOV) && (((cached_mode = get_attr_mode (insn)) == MODE_V8SF) || (cached_mode == MODE_V4DF) || (cached_mode == MODE_OI)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 64318 | { |
| 64319 | return 5; |
| 64320 | } |
| 64321 | else if ((cached_type == TYPE_SSEMOV) && (((cached_mode = get_attr_mode (insn)) == MODE_V4SF) || (cached_mode == MODE_V2DF) || (cached_mode == MODE_TI)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 64322 | { |
| 64323 | return 4; |
| 64324 | } |
| 64325 | else if ((cached_type == TYPE_SSEMOV) && ((cached_mode = get_attr_mode (insn)) == MODE_DI) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 64326 | { |
| 64327 | return 4; |
| 64328 | } |
| 64329 | else if ((cached_type == TYPE_SSEMOV) && ((cached_prefix = get_attr_prefix (insn)) == PREFIX_VEX) && ((cached_mode = get_attr_mode (insn)) == MODE_SF) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 64330 | { |
| 64331 | return 4; |
| 64332 | } |
| 64333 | else if ((cached_type == TYPE_SSEMOV) && (((cached_mode = get_attr_mode (insn)) == MODE_SF) || (cached_mode == MODE_DF)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 64334 | { |
| 64335 | return 4; |
| 64336 | } |
| 64337 | else if (((cached_type == TYPE_MMXMOV) || (cached_type == TYPE_SSEMOV)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 64338 | { |
| 64339 | return 4; |
| 64340 | } |
| 64341 | else if ((cached_type == TYPE_SSEMOV) && (((cached_mode = get_attr_mode (insn)) == MODE_V8SF) || (cached_mode == MODE_V4DF) || (cached_mode == MODE_OI)) && (((cached_memory = get_attr_memory (insn)) == MEMORY_STORE) || (cached_memory == MEMORY_BOTH))) |
| 64342 | { |
| 64343 | return 5; |
| 64344 | } |
| 64345 | else if ((cached_type == TYPE_SSEMOV) && (((cached_mode = get_attr_mode (insn)) == MODE_V4SF) || (cached_mode == MODE_V2DF) || (cached_mode == MODE_TI)) && (((cached_memory = get_attr_memory (insn)) == MEMORY_STORE) || (cached_memory == MEMORY_BOTH))) |
| 64346 | { |
| 64347 | return 4; |
| 64348 | } |
| 64349 | else if (((cached_type == TYPE_MMXMOV) || (cached_type == TYPE_SSEMOV)) && (((cached_memory = get_attr_memory (insn)) == MEMORY_STORE) || (cached_memory == MEMORY_BOTH))) |
| 64350 | { |
| 64351 | return 4; |
| 64352 | } |
| 64353 | else if ((cached_type == TYPE_SSEMOV) && (((cached_mode = get_attr_mode (insn)) == MODE_V8SF) || (cached_mode == MODE_V4DF) || (cached_mode == MODE_OI)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 64354 | { |
| 64355 | return 3; |
| 64356 | } |
| 64357 | else if ((cached_type == TYPE_SSEMOV) && (((cached_mode = get_attr_mode (insn)) == MODE_SF) || (cached_mode == MODE_DF)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 64358 | { |
| 64359 | return 2; |
| 64360 | } |
| 64361 | else if (((cached_type == TYPE_MMXMOV) || (cached_type == TYPE_SSEMOV)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 64362 | { |
| 64363 | return 2; |
| 64364 | } |
| 64365 | else if (((cached_type == TYPE_SSELOG) || (cached_type == TYPE_SSELOG1)) && ((cached_mode = get_attr_mode (insn)) == MODE_V8SF) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 64366 | { |
| 64367 | return 7; |
| 64368 | } |
| 64369 | else if (((cached_type == TYPE_SSELOG) || (cached_type == TYPE_SSELOG1)) && ((cached_mode = get_attr_mode (insn)) == MODE_V8SF)) |
| 64370 | { |
| 64371 | return 3; |
| 64372 | } |
| 64373 | else if (((cached_type == TYPE_SSELOG) || (cached_type == TYPE_SSELOG1)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 64374 | { |
| 64375 | return 6; |
| 64376 | } |
| 64377 | else if ((cached_type == TYPE_SSELOG) || (cached_type == TYPE_SSELOG1)) |
| 64378 | { |
| 64379 | return 2; |
| 64380 | } |
| 64381 | else if (((cached_type == TYPE_SSESHUF) || (cached_type == TYPE_SSESHUF1)) && ((cached_mode = get_attr_mode (insn)) == MODE_V8SF) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 64382 | { |
| 64383 | return 7; |
| 64384 | } |
| 64385 | else if (((cached_type == TYPE_SSESHUF) || (cached_type == TYPE_SSESHUF1)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 64386 | { |
| 64387 | return 6; |
| 64388 | } |
| 64389 | else if ((cached_type == TYPE_SSESHUF) && ((cached_mode = get_attr_mode (insn)) == MODE_V8SF)) |
| 64390 | { |
| 64391 | return 3; |
| 64392 | } |
| 64393 | else if ((cached_type == TYPE_SSESHUF) || (cached_type == TYPE_SSESHUF1)) |
| 64394 | { |
| 64395 | return 2; |
| 64396 | } |
| 64397 | else if ((cached_type == TYPE_SSECMP) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 64398 | { |
| 64399 | return 6; |
| 64400 | } |
| 64401 | else if (cached_type == TYPE_SSECMP) |
| 64402 | { |
| 64403 | return 2; |
| 64404 | } |
| 64405 | else if ((cached_type == TYPE_SSECOMI) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 64406 | { |
| 64407 | return 6; |
| 64408 | } |
| 64409 | else if (cached_type == TYPE_SSECOMI) |
| 64410 | { |
| 64411 | return 2; |
| 64412 | } |
| 64413 | else if ((cached_type == TYPE_SSECVT) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) && (((register_operand (operands[0], V4DFmode)) || (register_operand (operands[0], V8SFmode)) || (register_operand (operands[0], V8SImode))) || (nonimmediate_operand (operands[1], V4DFmode)) || (nonimmediate_operand (operands[1], V8SFmode)) || (nonimmediate_operand (operands[1], V8SImode)))) |
| 64414 | { |
| 64415 | return 8; |
| 64416 | } |
| 64417 | else if ((cached_type == TYPE_SSECVT) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) && (((register_operand (operands[0], V4DFmode)) || (register_operand (operands[0], V8SFmode)) || (register_operand (operands[0], V8SImode))) || (nonimmediate_operand (operands[1], V4DFmode)) || (nonimmediate_operand (operands[1], V8SFmode)) || (nonimmediate_operand (operands[1], V8SImode)))) |
| 64418 | { |
| 64419 | return 4; |
| 64420 | } |
| 64421 | else if ((cached_type == TYPE_SSECVT) && (((cached_mode = get_attr_mode (insn)) == MODE_SF) || (cached_mode == MODE_DF)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 64422 | { |
| 64423 | return 8; |
| 64424 | } |
| 64425 | else if ((cached_type == TYPE_SSECVT) && (((cached_mode = get_attr_mode (insn)) == MODE_SF) || (cached_mode == MODE_DF)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 64426 | { |
| 64427 | return 4; |
| 64428 | } |
| 64429 | else if ((cached_type == TYPE_SSEICVT) && (((cached_mode = get_attr_mode (insn)) == MODE_SF) || (cached_mode == MODE_DF)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 64430 | { |
| 64431 | return 8; |
| 64432 | } |
| 64433 | else if ((cached_type == TYPE_SSEICVT) && (((cached_mode = get_attr_mode (insn)) == MODE_SF) || (cached_mode == MODE_DF)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 64434 | { |
| 64435 | return 4; |
| 64436 | } |
| 64437 | else if ((cached_type == TYPE_SSECVT) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) && (register_operand (operands[0], V4SFmode)) && (nonimmediate_operand (operands[1], V2DFmode))) |
| 64438 | { |
| 64439 | return 8; |
| 64440 | } |
| 64441 | else if ((cached_type == TYPE_SSECVT) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) && (register_operand (operands[0], V4SFmode)) && (nonimmediate_operand (operands[1], V2DFmode))) |
| 64442 | { |
| 64443 | return 4; |
| 64444 | } |
| 64445 | else if ((cached_type == TYPE_SSECVT) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) && (register_operand (operands[0], V4SFmode)) && ((nonimmediate_operand (operands[1], V2SImode)) || (nonimmediate_operand (operands[1], V4SImode)))) |
| 64446 | { |
| 64447 | return 8; |
| 64448 | } |
| 64449 | else if ((cached_type == TYPE_SSECVT) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) && (register_operand (operands[0], V4SFmode)) && ((nonimmediate_operand (operands[1], V2SImode)) || (nonimmediate_operand (operands[1], V4SImode)))) |
| 64450 | { |
| 64451 | return 4; |
| 64452 | } |
| 64453 | else if ((cached_type == TYPE_SSECVT) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) && (register_operand (operands[0], V2DFmode)) && (nonimmediate_operand (operands[1], V4SImode))) |
| 64454 | { |
| 64455 | return 8; |
| 64456 | } |
| 64457 | else if ((cached_type == TYPE_SSECVT) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) && (register_operand (operands[0], V2DFmode)) && (nonimmediate_operand (operands[1], V4SImode))) |
| 64458 | { |
| 64459 | return 4; |
| 64460 | } |
| 64461 | else if ((cached_type == TYPE_SSECVT) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) && (register_operand (operands[0], V2DFmode)) && ((nonimmediate_operand (operands[1], V2SImode)) || (nonimmediate_operand (operands[1], V4SFmode)))) |
| 64462 | { |
| 64463 | return 6; |
| 64464 | } |
| 64465 | else if ((cached_type == TYPE_SSECVT) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) && (register_operand (operands[0], V2DFmode)) && ((nonimmediate_operand (operands[1], V2SImode)) || (nonimmediate_operand (operands[1], V4SFmode)))) |
| 64466 | { |
| 64467 | return 2; |
| 64468 | } |
| 64469 | else if ((cached_type == TYPE_SSEICVT) && (((cached_mode = get_attr_mode (insn)) == MODE_SI) || (cached_mode == MODE_DI)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 64470 | { |
| 64471 | return 8; |
| 64472 | } |
| 64473 | else if ((cached_type == TYPE_SSEICVT) && (((cached_mode = get_attr_mode (insn)) == MODE_SI) || (cached_mode == MODE_DI)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 64474 | { |
| 64475 | return 4; |
| 64476 | } |
| 64477 | else if ((cached_type == TYPE_SSECVT) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) && (nonimmediate_operand (operands[1], V2DFmode)) && (register_operand (operands[0], V2SImode))) |
| 64478 | { |
| 64479 | return 8; |
| 64480 | } |
| 64481 | else if ((cached_type == TYPE_SSECVT) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) && (nonimmediate_operand (operands[1], V2DFmode)) && (register_operand (operands[0], V2SImode))) |
| 64482 | { |
| 64483 | return 4; |
| 64484 | } |
| 64485 | else if ((cached_type == TYPE_SSECVT) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) && (nonimmediate_operand (operands[1], V2DFmode)) && (register_operand (operands[0], V4SImode))) |
| 64486 | { |
| 64487 | return 6; |
| 64488 | } |
| 64489 | else if ((cached_type == TYPE_SSECVT) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) && (nonimmediate_operand (operands[1], V2DFmode)) && (register_operand (operands[0], V4SImode))) |
| 64490 | { |
| 64491 | return 2; |
| 64492 | } |
| 64493 | else if ((cached_type == TYPE_SSECVT) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) && (nonimmediate_operand (operands[1], V4SFmode)) && ((register_operand (operands[0], V2SImode)) || (register_operand (operands[0], V4SImode)))) |
| 64494 | { |
| 64495 | return 8; |
| 64496 | } |
| 64497 | else if ((cached_type == TYPE_SSECVT) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) && (nonimmediate_operand (operands[1], V4SFmode)) && ((register_operand (operands[0], V2SImode)) || (register_operand (operands[0], V4SImode)))) |
| 64498 | { |
| 64499 | return 4; |
| 64500 | } |
| 64501 | else if (((cached_type == TYPE_SSEMUL) || (cached_type == TYPE_SSEADD) || (cached_type == TYPE_SSEADD1) || (cached_type == TYPE_SSEMULADD)) && (((cached_mode = get_attr_mode (insn)) == MODE_V8SF) || (cached_mode == MODE_V4DF)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 64502 | { |
| 64503 | return 11 /* 0xb */; |
| 64504 | } |
| 64505 | else if (((cached_type == TYPE_SSEMUL) || (cached_type == TYPE_SSEADD) || (cached_type == TYPE_SSEADD1) || (cached_type == TYPE_SSEMULADD)) && (((cached_mode = get_attr_mode (insn)) == MODE_V8SF) || (cached_mode == MODE_V4DF)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 64506 | { |
| 64507 | return 7; |
| 64508 | } |
| 64509 | else if (((cached_type == TYPE_SSEMUL) || (cached_type == TYPE_SSEADD) || (cached_type == TYPE_SSEADD1) || (cached_type == TYPE_SSEMULADD)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 64510 | { |
| 64511 | return 10 /* 0xa */; |
| 64512 | } |
| 64513 | else if (((cached_type == TYPE_SSEMUL) || (cached_type == TYPE_SSEADD) || (cached_type == TYPE_SSEADD1) || (cached_type == TYPE_SSEMULADD)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 64514 | { |
| 64515 | return 6; |
| 64516 | } |
| 64517 | else if ((cached_type == TYPE_SSEIMUL) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 64518 | { |
| 64519 | return 8; |
| 64520 | } |
| 64521 | else if ((cached_type == TYPE_SSEIMUL) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 64522 | { |
| 64523 | return 4; |
| 64524 | } |
| 64525 | else if ((cached_type == TYPE_SSEIADD) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 64526 | { |
| 64527 | return 6; |
| 64528 | } |
| 64529 | else if ((cached_type == TYPE_SSEIADD) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 64530 | { |
| 64531 | return 2; |
| 64532 | } |
| 64533 | else if ((cached_type == TYPE_SSEDIV) && ((cached_mode = get_attr_mode (insn)) == MODE_V4DF) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 64534 | { |
| 64535 | return 27 /* 0x1b */; |
| 64536 | } |
| 64537 | else if ((cached_type == TYPE_SSEDIV) && ((cached_mode = get_attr_mode (insn)) == MODE_V4DF) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 64538 | { |
| 64539 | return 27 /* 0x1b */; |
| 64540 | } |
| 64541 | else if ((cached_type == TYPE_SSEDIV) && ((cached_mode = get_attr_mode (insn)) == MODE_V8SF) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 64542 | { |
| 64543 | return 27 /* 0x1b */; |
| 64544 | } |
| 64545 | else if ((cached_type == TYPE_SSEDIV) && ((cached_mode = get_attr_mode (insn)) == MODE_V8SF) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 64546 | { |
| 64547 | return 24 /* 0x18 */; |
| 64548 | } |
| 64549 | else if ((cached_type == TYPE_SSEDIV) && (((cached_mode = get_attr_mode (insn)) == MODE_DF) || (cached_mode == MODE_V2DF)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 64550 | { |
| 64551 | return 27 /* 0x1b */; |
| 64552 | } |
| 64553 | else if ((cached_type == TYPE_SSEDIV) && (((cached_mode = get_attr_mode (insn)) == MODE_DF) || (cached_mode == MODE_V2DF)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 64554 | { |
| 64555 | return 27 /* 0x1b */; |
| 64556 | } |
| 64557 | else if ((cached_type == TYPE_SSEDIV) && (((cached_mode = get_attr_mode (insn)) == MODE_SF) || (cached_mode == MODE_V4SF)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 64558 | { |
| 64559 | return 27 /* 0x1b */; |
| 64560 | } |
| 64561 | else if ((cached_type == TYPE_SSEDIV) && (((cached_mode = get_attr_mode (insn)) == MODE_SF) || (cached_mode == MODE_V4SF)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 64562 | { |
| 64563 | return 24 /* 0x18 */; |
| 64564 | } |
| 64565 | else if ((cached_type == TYPE_SSEINS) && ((cached_mode = get_attr_mode (insn)) == MODE_TI)) |
| 64566 | { |
| 64567 | return 3; |
| 64568 | } |
| 64569 | else |
| 64570 | { |
| 64571 | return 0; |
| 64572 | } |
| 64573 | |
| 64574 | } |
| 64575 | } |
| 64576 | |
| 64577 | int |
| 64578 | insn_default_latency_btver2 (rtx_insn *insn ATTRIBUTE_UNUSED) |
| 64579 | { |
| 64580 | enum attr_memory cached_memory ATTRIBUTE_UNUSED; |
| 64581 | enum attr_type cached_type ATTRIBUTE_UNUSED; |
| 64582 | enum attr_mode cached_mode ATTRIBUTE_UNUSED; |
| 64583 | enum attr_bdver1_decode cached_bdver1_decode ATTRIBUTE_UNUSED; |
| 64584 | enum attr_unit cached_unit ATTRIBUTE_UNUSED; |
| 64585 | enum attr_btver2_decode cached_btver2_decode ATTRIBUTE_UNUSED; |
| 64586 | enum attr_btver2_sse_attr cached_btver2_sse_attr ATTRIBUTE_UNUSED; |
| 64587 | |
| 64588 | switch (recog_memoized (insn)) |
| 64589 | { |
| 64590 | case 4051: /* aesdeclast */ |
| 64591 | case 4050: /* aesdec */ |
| 64592 | case 4049: /* aesenclast */ |
| 64593 | case 4048: /* aesenc */ |
| 64594 | extract_insn_cached (insn); |
| 64595 | if ((register_operand (operands[0], V2DImode)) && (get_attr_memory (insn) == MEMORY_NONE)) |
| 64596 | { |
| 64597 | return 3; |
| 64598 | } |
| 64599 | else |
| 64600 | { |
| 64601 | return 0; |
| 64602 | } |
| 64603 | |
| 64604 | case 3881: /* sse4_1_ptestv2di */ |
| 64605 | case 3880: /* sse4_1_ptestv4si */ |
| 64606 | case 3879: /* sse4_1_ptestv8hi */ |
| 64607 | case 3878: /* sse4_1_ptestv16qi */ |
| 64608 | extract_constrain_insn_cached (insn); |
| 64609 | if (((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) && (! ( |
| 64610 | #line 15495 "/___NETBSD_SRC___/tools/gcc/../../external/gpl3/gcc/dist/gcc/config/i386/sse.md" |
| 64611 | (TImode==OImode)))) |
| 64612 | { |
| 64613 | return 8; |
| 64614 | } |
| 64615 | else if ((cached_memory == MEMORY_NONE) && (! ( |
| 64616 | #line 15495 "/___NETBSD_SRC___/tools/gcc/../../external/gpl3/gcc/dist/gcc/config/i386/sse.md" |
| 64617 | (TImode==OImode)))) |
| 64618 | { |
| 64619 | return 3; |
| 64620 | } |
| 64621 | else |
| 64622 | { |
| 64623 | return 0; |
| 64624 | } |
| 64625 | |
| 64626 | case 3780: /* avx_dpps256 */ |
| 64627 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) |
| 64628 | { |
| 64629 | return 17 /* 0x11 */; |
| 64630 | } |
| 64631 | else if (cached_memory == MEMORY_NONE) |
| 64632 | { |
| 64633 | return 12 /* 0xc */; |
| 64634 | } |
| 64635 | else |
| 64636 | { |
| 64637 | return 0; |
| 64638 | } |
| 64639 | |
| 64640 | case 3779: /* sse4_1_blendvpd */ |
| 64641 | case 3777: /* sse4_1_blendvps */ |
| 64642 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) |
| 64643 | { |
| 64644 | return 2; |
| 64645 | } |
| 64646 | else if (cached_memory == MEMORY_LOAD) |
| 64647 | { |
| 64648 | return 8; |
| 64649 | } |
| 64650 | else |
| 64651 | { |
| 64652 | return 0; |
| 64653 | } |
| 64654 | |
| 64655 | case 3771: /* sse4a_insertq */ |
| 64656 | case 3770: /* sse4a_insertqi */ |
| 64657 | if (get_attr_memory (insn) == MEMORY_NONE) |
| 64658 | { |
| 64659 | return 3; |
| 64660 | } |
| 64661 | else |
| 64662 | { |
| 64663 | return 0; |
| 64664 | } |
| 64665 | |
| 64666 | case 4432: /* avx2_maskstoreq256 */ |
| 64667 | case 4431: /* avx2_maskstored256 */ |
| 64668 | case 4430: /* avx2_maskstoreq */ |
| 64669 | case 4429: /* avx2_maskstored */ |
| 64670 | case 4428: /* avx_maskstorepd256 */ |
| 64671 | case 4427: /* avx_maskstoreps256 */ |
| 64672 | case 4426: /* avx_maskstorepd */ |
| 64673 | case 4425: /* avx_maskstoreps */ |
| 64674 | case 4424: /* avx2_maskloadq256 */ |
| 64675 | case 4423: /* avx2_maskloadd256 */ |
| 64676 | case 4422: /* avx2_maskloadq */ |
| 64677 | case 4421: /* avx2_maskloadd */ |
| 64678 | case 4420: /* avx_maskloadpd256 */ |
| 64679 | case 4419: /* avx_maskloadps256 */ |
| 64680 | case 4418: /* avx_maskloadpd */ |
| 64681 | case 4417: /* avx_maskloadps */ |
| 64682 | case 3788: /* sse4_1_mpsadbw */ |
| 64683 | case 3787: /* avx2_mpsadbw */ |
| 64684 | case 3719: /* ssse3_pshufbv16qi3_mask */ |
| 64685 | case 3718: /* ssse3_pshufbv16qi3 */ |
| 64686 | case 3717: /* avx2_pshufbv32qi3_mask */ |
| 64687 | case 3716: /* avx2_pshufbv32qi3 */ |
| 64688 | case 3715: /* avx512bw_pshufbv64qi3_mask */ |
| 64689 | case 3714: /* avx512bw_pshufbv64qi3 */ |
| 64690 | if (get_attr_memory (insn) == MEMORY_NONE) |
| 64691 | { |
| 64692 | return 2; |
| 64693 | } |
| 64694 | else |
| 64695 | { |
| 64696 | return 0; |
| 64697 | } |
| 64698 | |
| 64699 | case 2510: /* vec_extract_hi_v4df_mask */ |
| 64700 | case 2509: /* vec_extract_hi_v4df */ |
| 64701 | extract_constrain_insn_cached (insn); |
| 64702 | if (which_alternative == 0) |
| 64703 | { |
| 64704 | return 1; |
| 64705 | } |
| 64706 | else |
| 64707 | { |
| 64708 | return 0; |
| 64709 | } |
| 64710 | |
| 64711 | case 2522: /* vec_extract_hi_v8sf */ |
| 64712 | case 2520: /* vec_extract_hi_v8sf_mask */ |
| 64713 | case 2518: /* vec_extract_hi_v8sf_maskm */ |
| 64714 | case 2516: /* vec_extract_lo_v8sf_maskm */ |
| 64715 | case 2514: /* vec_extract_lo_v8sf_mask */ |
| 64716 | case 2513: /* vec_extract_lo_v8sf */ |
| 64717 | case 2456: /* avx2_vec_dupv8sf_1 */ |
| 64718 | case 2454: /* avx2_vec_dupv8sf */ |
| 64719 | extract_insn_cached (insn); |
| 64720 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) |
| 64721 | { |
| 64722 | return 1; |
| 64723 | } |
| 64724 | else |
| 64725 | { |
| 64726 | return 0; |
| 64727 | } |
| 64728 | |
| 64729 | case 4516: /* vcvtps2ph256_mask */ |
| 64730 | case 4515: /* vcvtps2ph256 */ |
| 64731 | case 2381: /* avx_cvtpd2ps256_mask */ |
| 64732 | case 2380: /* avx_cvtpd2ps256 */ |
| 64733 | if (get_attr_memory (insn) == MEMORY_STORE) |
| 64734 | { |
| 64735 | return 11 /* 0xb */; |
| 64736 | } |
| 64737 | else |
| 64738 | { |
| 64739 | return 6; |
| 64740 | } |
| 64741 | |
| 64742 | case 2372: /* *sse2_vd_cvtsd2ss */ |
| 64743 | case 2371: /* sse2_cvtsd2ss_round */ |
| 64744 | case 2370: /* sse2_cvtsd2ss */ |
| 64745 | if (get_attr_memory (insn) == MEMORY_LOAD) |
| 64746 | { |
| 64747 | return 12 /* 0xc */; |
| 64748 | } |
| 64749 | else |
| 64750 | { |
| 64751 | return 7; |
| 64752 | } |
| 64753 | |
| 64754 | case 2289: /* *avx_cvtpd2dq256_2 */ |
| 64755 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) |
| 64756 | { |
| 64757 | return 11 /* 0xb */; |
| 64758 | } |
| 64759 | else |
| 64760 | { |
| 64761 | return 0; |
| 64762 | } |
| 64763 | |
| 64764 | case 2375: /* *sse2_vd_cvtss2sd */ |
| 64765 | case 2374: /* sse2_cvtss2sd_round */ |
| 64766 | case 2373: /* sse2_cvtss2sd */ |
| 64767 | case 2224: /* sse2_cvttsd2si_round */ |
| 64768 | case 2223: /* sse2_cvttsd2si */ |
| 64769 | case 2218: /* sse2_cvtsd2si_round */ |
| 64770 | case 2217: /* sse2_cvtsd2si */ |
| 64771 | if (get_attr_memory (insn) == MEMORY_LOAD) |
| 64772 | { |
| 64773 | return 11 /* 0xb */; |
| 64774 | } |
| 64775 | else |
| 64776 | { |
| 64777 | return 6; |
| 64778 | } |
| 64779 | |
| 64780 | case 2198: /* sse2_cvtsi2sd */ |
| 64781 | case 2109: /* sse_cvtsi2ssq_round */ |
| 64782 | case 2108: /* sse_cvtsi2ssq */ |
| 64783 | case 2107: /* sse_cvtsi2ss_round */ |
| 64784 | case 2106: /* sse_cvtsi2ss */ |
| 64785 | if (get_attr_memory (insn) == MEMORY_LOAD) |
| 64786 | { |
| 64787 | return 14 /* 0xe */; |
| 64788 | } |
| 64789 | else |
| 64790 | { |
| 64791 | return 9; |
| 64792 | } |
| 64793 | |
| 64794 | case 4514: /* *vcvtps2ph_store */ |
| 64795 | case 4513: /* *vcvtps2ph_mask */ |
| 64796 | case 4512: /* *vcvtps2ph */ |
| 64797 | case 4505: /* *vcvtph2ps_load_mask */ |
| 64798 | case 4504: /* *vcvtph2ps_load */ |
| 64799 | case 4503: /* vcvtph2ps_mask */ |
| 64800 | case 4502: /* vcvtph2ps */ |
| 64801 | case 3895: /* sse4_1_roundss */ |
| 64802 | case 3892: /* sse4_1_roundps */ |
| 64803 | case 3891: /* avx_roundps256 */ |
| 64804 | case 2383: /* *sse2_cvtpd2ps_mask */ |
| 64805 | case 2382: /* *sse2_cvtpd2ps */ |
| 64806 | case 2379: /* avx512f_cvtpd2ps512_mask_round */ |
| 64807 | case 2378: /* avx512f_cvtpd2ps512_mask */ |
| 64808 | case 2377: /* *avx512f_cvtpd2ps512_round */ |
| 64809 | case 2376: /* *avx512f_cvtpd2ps512 */ |
| 64810 | case 2272: /* *ufloatv2div2sf2_mask_1 */ |
| 64811 | case 2271: /* *floatv2div2sf2_mask_1 */ |
| 64812 | case 2270: /* ufloatv2div2sf2_mask */ |
| 64813 | case 2269: /* floatv2div2sf2_mask */ |
| 64814 | case 2268: /* *ufloatv2div2sf2 */ |
| 64815 | case 2267: /* *floatv2div2sf2 */ |
| 64816 | case 2266: /* ufloatv4div4sf2_mask */ |
| 64817 | case 2265: /* ufloatv4div4sf2 */ |
| 64818 | case 2264: /* floatv4div4sf2_mask */ |
| 64819 | case 2263: /* floatv4div4sf2 */ |
| 64820 | case 2262: /* ufloatv8div8sf2_mask_round */ |
| 64821 | case 2261: /* ufloatv8div8sf2_mask */ |
| 64822 | case 2260: /* ufloatv8div8sf2_round */ |
| 64823 | case 2259: /* ufloatv8div8sf2 */ |
| 64824 | case 2258: /* floatv8div8sf2_mask_round */ |
| 64825 | case 2257: /* floatv8div8sf2_mask */ |
| 64826 | case 2256: /* floatv8div8sf2_round */ |
| 64827 | case 2255: /* floatv8div8sf2 */ |
| 64828 | case 2146: /* ufloatv4siv4sf2_mask_round */ |
| 64829 | case 2145: /* ufloatv4siv4sf2_mask */ |
| 64830 | case 2144: /* ufloatv4siv4sf2_round */ |
| 64831 | case 2143: /* ufloatv4siv4sf2 */ |
| 64832 | case 2142: /* ufloatv8siv8sf2_mask_round */ |
| 64833 | case 2141: /* ufloatv8siv8sf2_mask */ |
| 64834 | case 2140: /* ufloatv8siv8sf2_round */ |
| 64835 | case 2139: /* ufloatv8siv8sf2 */ |
| 64836 | case 2134: /* floatv4siv4sf2_mask */ |
| 64837 | case 2133: /* floatv4siv4sf2 */ |
| 64838 | case 2132: /* floatv8siv8sf2_mask */ |
| 64839 | case 2131: /* floatv8siv8sf2 */ |
| 64840 | case 2103: /* sse_cvtpi2ps */ |
| 64841 | if (((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) || (cached_memory == MEMORY_STORE)) |
| 64842 | { |
| 64843 | return 8; |
| 64844 | } |
| 64845 | else |
| 64846 | { |
| 64847 | return 3; |
| 64848 | } |
| 64849 | |
| 64850 | case 4804: /* avx512dq_vmfpclassv2df */ |
| 64851 | case 4803: /* avx512dq_vmfpclassv4sf */ |
| 64852 | case 4802: /* avx512dq_fpclassv2df_mask */ |
| 64853 | case 4801: /* avx512dq_fpclassv2df */ |
| 64854 | case 4796: /* avx512dq_fpclassv4sf_mask */ |
| 64855 | case 4795: /* avx512dq_fpclassv4sf */ |
| 64856 | case 4790: /* avx512dq_rangesv2df_round */ |
| 64857 | case 4789: /* avx512dq_rangesv2df */ |
| 64858 | case 4788: /* avx512dq_rangesv4sf_round */ |
| 64859 | case 4787: /* avx512dq_rangesv4sf */ |
| 64860 | case 4786: /* avx512dq_rangepv2df_mask */ |
| 64861 | case 4785: /* avx512dq_rangepv2df */ |
| 64862 | case 4778: /* avx512dq_rangepv4sf_mask */ |
| 64863 | case 4777: /* avx512dq_rangepv4sf */ |
| 64864 | case 4378: /* avx512vl_vpermt2varv2df3_mask */ |
| 64865 | case 4376: /* avx512vl_vpermt2varv4sf3_mask */ |
| 64866 | case 4354: /* avx512vl_vpermt2varv2df3_maskz_1 */ |
| 64867 | case 4353: /* avx512vl_vpermt2varv2df3 */ |
| 64868 | case 4350: /* avx512vl_vpermt2varv4sf3_maskz_1 */ |
| 64869 | case 4349: /* avx512vl_vpermt2varv4sf3 */ |
| 64870 | case 4324: /* avx512vl_vpermi2varv2df3_mask */ |
| 64871 | case 4322: /* avx512vl_vpermi2varv4sf3_mask */ |
| 64872 | case 4300: /* avx512vl_vpermi2varv2df3_maskz_1 */ |
| 64873 | case 4299: /* avx512vl_vpermi2varv2df3 */ |
| 64874 | case 4296: /* avx512vl_vpermi2varv4sf3_maskz_1 */ |
| 64875 | case 4295: /* avx512vl_vpermi2varv4sf3 */ |
| 64876 | case 4264: /* *avx_vpermilpv2df_mask */ |
| 64877 | case 4263: /* *avx_vpermilpv2df */ |
| 64878 | case 4258: /* *avx_vpermilpv4sf_mask */ |
| 64879 | case 4257: /* *avx_vpermilpv4sf */ |
| 64880 | case 3952: /* avx512er_vmrsqrt28v2df_round */ |
| 64881 | case 3951: /* avx512er_vmrsqrt28v2df */ |
| 64882 | case 3950: /* avx512er_vmrsqrt28v4sf_round */ |
| 64883 | case 3949: /* avx512er_vmrsqrt28v4sf */ |
| 64884 | case 3940: /* avx512er_vmrcp28v2df_round */ |
| 64885 | case 3939: /* avx512er_vmrcp28v2df */ |
| 64886 | case 3938: /* avx512er_vmrcp28v4sf_round */ |
| 64887 | case 3937: /* avx512er_vmrcp28v4sf */ |
| 64888 | case 2725: /* sse2_shufpd_v2df */ |
| 64889 | case 2724: /* sse2_shufpd_v2di */ |
| 64890 | case 2711: /* sse2_shufpd_v2df_mask */ |
| 64891 | case 2541: /* avx512vl_unpcklpd128_mask */ |
| 64892 | case 2535: /* avx512vl_unpckhpd128_mask */ |
| 64893 | case 2465: /* sse4_1_insertps */ |
| 64894 | case 2464: /* *vec_setv4sf_sse4_1 */ |
| 64895 | case 2448: /* sse_shufps_v4sf */ |
| 64896 | case 2447: /* sse_shufps_v4si */ |
| 64897 | case 2446: /* sse_shufps_v4sf_mask */ |
| 64898 | case 2441: /* sse3_movsldup_mask */ |
| 64899 | case 2440: /* sse3_movsldup */ |
| 64900 | case 2435: /* sse3_movshdup_mask */ |
| 64901 | case 2434: /* sse3_movshdup */ |
| 64902 | case 2431: /* vec_interleave_lowv4sf */ |
| 64903 | case 2430: /* unpcklps128_mask */ |
| 64904 | case 2425: /* vec_interleave_highv4sf_mask */ |
| 64905 | case 2424: /* vec_interleave_highv4sf */ |
| 64906 | case 1634: /* reducesv2df */ |
| 64907 | case 1633: /* reducesv4sf */ |
| 64908 | case 1632: /* reducepv2df_mask */ |
| 64909 | case 1631: /* *reducepv2df */ |
| 64910 | case 1626: /* reducepv4sf_mask */ |
| 64911 | case 1625: /* *reducepv4sf */ |
| 64912 | case 1517: /* rsqrt14v2df */ |
| 64913 | case 1516: /* rsqrt14v4sf */ |
| 64914 | case 1515: /* rsqrt14v2df_mask */ |
| 64915 | case 1514: /* *rsqrt14v2df */ |
| 64916 | case 1509: /* rsqrt14v4sf_mask */ |
| 64917 | case 1508: /* *rsqrt14v4sf */ |
| 64918 | case 1503: /* sse_rsqrtv4sf2 */ |
| 64919 | case 1481: /* srcp14v2df */ |
| 64920 | case 1480: /* srcp14v4sf */ |
| 64921 | case 1479: /* rcp14v2df_mask */ |
| 64922 | case 1478: /* *rcp14v2df */ |
| 64923 | case 1473: /* rcp14v4sf_mask */ |
| 64924 | case 1472: /* *rcp14v4sf */ |
| 64925 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) |
| 64926 | { |
| 64927 | return 1; |
| 64928 | } |
| 64929 | else if (cached_memory == MEMORY_LOAD) |
| 64930 | { |
| 64931 | return 6; |
| 64932 | } |
| 64933 | else |
| 64934 | { |
| 64935 | return 0; |
| 64936 | } |
| 64937 | |
| 64938 | case 4897: /* vpmultishiftqbv16qi_mask */ |
| 64939 | case 4896: /* vpmultishiftqbv16qi */ |
| 64940 | case 4862: /* conflictv2di_mask */ |
| 64941 | case 4861: /* *conflictv2di */ |
| 64942 | case 4856: /* conflictv4si_mask */ |
| 64943 | case 4855: /* *conflictv4si */ |
| 64944 | case 4850: /* clzv2di2_mask */ |
| 64945 | case 4849: /* clzv2di2 */ |
| 64946 | case 4844: /* clzv4si2_mask */ |
| 64947 | case 4843: /* clzv4si2 */ |
| 64948 | case 4800: /* avx512dq_fpclassv4df_mask */ |
| 64949 | case 4799: /* avx512dq_fpclassv4df */ |
| 64950 | case 4794: /* avx512dq_fpclassv8sf_mask */ |
| 64951 | case 4793: /* avx512dq_fpclassv8sf */ |
| 64952 | case 4784: /* avx512dq_rangepv4df_mask */ |
| 64953 | case 4783: /* avx512dq_rangepv4df */ |
| 64954 | case 4776: /* avx512dq_rangepv8sf_mask */ |
| 64955 | case 4775: /* avx512dq_rangepv8sf */ |
| 64956 | case 4489: /* avx512bw_lshrvv32hi_mask */ |
| 64957 | case 4488: /* avx512bw_lshrvv32hi */ |
| 64958 | case 4487: /* avx512bw_ashlvv32hi_mask */ |
| 64959 | case 4486: /* avx512bw_ashlvv32hi */ |
| 64960 | case 4485: /* avx512vl_lshrvv16hi_mask */ |
| 64961 | case 4484: /* avx512vl_lshrvv16hi */ |
| 64962 | case 4483: /* avx512vl_ashlvv16hi_mask */ |
| 64963 | case 4482: /* avx512vl_ashlvv16hi */ |
| 64964 | case 4481: /* avx512vl_lshrvv8hi_mask */ |
| 64965 | case 4480: /* avx512vl_lshrvv8hi */ |
| 64966 | case 4479: /* avx512vl_ashlvv8hi_mask */ |
| 64967 | case 4478: /* avx512vl_ashlvv8hi */ |
| 64968 | case 4477: /* avx2_lshrvv2di_mask */ |
| 64969 | case 4476: /* avx2_lshrvv2di */ |
| 64970 | case 4475: /* avx2_ashlvv2di_mask */ |
| 64971 | case 4474: /* avx2_ashlvv2di */ |
| 64972 | case 4473: /* avx2_lshrvv4di_mask */ |
| 64973 | case 4472: /* avx2_lshrvv4di */ |
| 64974 | case 4471: /* avx2_ashlvv4di_mask */ |
| 64975 | case 4470: /* avx2_ashlvv4di */ |
| 64976 | case 4469: /* avx512f_lshrvv8di_mask */ |
| 64977 | case 4468: /* avx512f_lshrvv8di */ |
| 64978 | case 4467: /* avx512f_ashlvv8di_mask */ |
| 64979 | case 4466: /* avx512f_ashlvv8di */ |
| 64980 | case 4465: /* avx2_lshrvv4si_mask */ |
| 64981 | case 4464: /* avx2_lshrvv4si */ |
| 64982 | case 4463: /* avx2_ashlvv4si_mask */ |
| 64983 | case 4462: /* avx2_ashlvv4si */ |
| 64984 | case 4461: /* avx2_lshrvv8si_mask */ |
| 64985 | case 4460: /* avx2_lshrvv8si */ |
| 64986 | case 4459: /* avx2_ashlvv8si_mask */ |
| 64987 | case 4458: /* avx2_ashlvv8si */ |
| 64988 | case 4457: /* avx512f_lshrvv16si_mask */ |
| 64989 | case 4456: /* avx512f_lshrvv16si */ |
| 64990 | case 4455: /* avx512f_ashlvv16si_mask */ |
| 64991 | case 4454: /* avx512f_ashlvv16si */ |
| 64992 | case 4453: /* avx512bw_ashrvv32hi_mask */ |
| 64993 | case 4452: /* avx512bw_ashrvv32hi */ |
| 64994 | case 4451: /* avx512vl_ashrvv16hi_mask */ |
| 64995 | case 4450: /* avx512vl_ashrvv16hi */ |
| 64996 | case 4449: /* avx512vl_ashrvv8hi_mask */ |
| 64997 | case 4448: /* avx512vl_ashrvv8hi */ |
| 64998 | case 4447: /* avx512f_ashrvv8di_mask */ |
| 64999 | case 4446: /* avx512f_ashrvv8di */ |
| 65000 | case 4445: /* avx2_ashrvv4di_mask */ |
| 65001 | case 4444: /* avx2_ashrvv4di */ |
| 65002 | case 4443: /* avx2_ashrvv2di_mask */ |
| 65003 | case 4442: /* avx2_ashrvv2di */ |
| 65004 | case 4441: /* avx512f_ashrvv16si_mask */ |
| 65005 | case 4440: /* avx512f_ashrvv16si */ |
| 65006 | case 4439: /* avx2_ashrvv8si_mask */ |
| 65007 | case 4438: /* avx2_ashrvv8si */ |
| 65008 | case 4437: /* avx2_ashrvv4si_mask */ |
| 65009 | case 4436: /* avx2_ashrvv4si */ |
| 65010 | case 4412: /* vec_set_hi_v8sf_mask */ |
| 65011 | case 4411: /* vec_set_hi_v8sf */ |
| 65012 | case 4408: /* vec_set_lo_v8sf_mask */ |
| 65013 | case 4407: /* vec_set_lo_v8sf */ |
| 65014 | case 4404: /* vec_set_hi_v4df_mask */ |
| 65015 | case 4403: /* vec_set_hi_v4df */ |
| 65016 | case 4400: /* vec_set_lo_v4df_mask */ |
| 65017 | case 4399: /* vec_set_lo_v4df */ |
| 65018 | case 4396: /* *ssse3_palignrv2df_perm */ |
| 65019 | case 4395: /* *ssse3_palignrv4sf_perm */ |
| 65020 | case 4394: /* *ssse3_palignrv2di_perm */ |
| 65021 | case 4393: /* *ssse3_palignrv4si_perm */ |
| 65022 | case 4392: /* *ssse3_palignrv8hi_perm */ |
| 65023 | case 4391: /* *ssse3_palignrv16qi_perm */ |
| 65024 | case 4390: /* *avx_vperm2f128v4df_nozero */ |
| 65025 | case 4389: /* *avx_vperm2f128v8sf_nozero */ |
| 65026 | case 4387: /* *avx_vperm2f128v4df_full */ |
| 65027 | case 4386: /* *avx_vperm2f128v8sf_full */ |
| 65028 | case 4382: /* avx512vl_vpermt2varv8hi3_mask */ |
| 65029 | case 4380: /* avx512vl_vpermt2varv16qi3_mask */ |
| 65030 | case 4377: /* avx512vl_vpermt2varv2di3_mask */ |
| 65031 | case 4375: /* avx512vl_vpermt2varv4si3_mask */ |
| 65032 | case 4374: /* avx512vl_vpermt2varv4df3_mask */ |
| 65033 | case 4372: /* avx512vl_vpermt2varv8sf3_mask */ |
| 65034 | case 4362: /* avx512vl_vpermt2varv8hi3_maskz_1 */ |
| 65035 | case 4361: /* avx512vl_vpermt2varv8hi3 */ |
| 65036 | case 4358: /* avx512vl_vpermt2varv16qi3_maskz_1 */ |
| 65037 | case 4357: /* avx512vl_vpermt2varv16qi3 */ |
| 65038 | case 4352: /* avx512vl_vpermt2varv2di3_maskz_1 */ |
| 65039 | case 4351: /* avx512vl_vpermt2varv2di3 */ |
| 65040 | case 4348: /* avx512vl_vpermt2varv4si3_maskz_1 */ |
| 65041 | case 4347: /* avx512vl_vpermt2varv4si3 */ |
| 65042 | case 4346: /* avx512vl_vpermt2varv4df3_maskz_1 */ |
| 65043 | case 4345: /* avx512vl_vpermt2varv4df3 */ |
| 65044 | case 4342: /* avx512vl_vpermt2varv8sf3_maskz_1 */ |
| 65045 | case 4341: /* avx512vl_vpermt2varv8sf3 */ |
| 65046 | case 4328: /* avx512vl_vpermi2varv8hi3_mask */ |
| 65047 | case 4326: /* avx512vl_vpermi2varv16qi3_mask */ |
| 65048 | case 4323: /* avx512vl_vpermi2varv2di3_mask */ |
| 65049 | case 4321: /* avx512vl_vpermi2varv4si3_mask */ |
| 65050 | case 4320: /* avx512vl_vpermi2varv4df3_mask */ |
| 65051 | case 4318: /* avx512vl_vpermi2varv8sf3_mask */ |
| 65052 | case 4308: /* avx512vl_vpermi2varv8hi3_maskz_1 */ |
| 65053 | case 4307: /* avx512vl_vpermi2varv8hi3 */ |
| 65054 | case 4304: /* avx512vl_vpermi2varv16qi3_maskz_1 */ |
| 65055 | case 4303: /* avx512vl_vpermi2varv16qi3 */ |
| 65056 | case 4298: /* avx512vl_vpermi2varv2di3_maskz_1 */ |
| 65057 | case 4297: /* avx512vl_vpermi2varv2di3 */ |
| 65058 | case 4294: /* avx512vl_vpermi2varv4si3_maskz_1 */ |
| 65059 | case 4293: /* avx512vl_vpermi2varv4si3 */ |
| 65060 | case 4292: /* avx512vl_vpermi2varv4df3_maskz_1 */ |
| 65061 | case 4291: /* avx512vl_vpermi2varv4df3 */ |
| 65062 | case 4288: /* avx512vl_vpermi2varv8sf3_maskz_1 */ |
| 65063 | case 4287: /* avx512vl_vpermi2varv8sf3 */ |
| 65064 | case 4262: /* *avx_vpermilpv4df_mask */ |
| 65065 | case 4261: /* *avx_vpermilpv4df */ |
| 65066 | case 4256: /* *avx_vpermilpv8sf_mask */ |
| 65067 | case 4255: /* *avx_vpermilpv8sf */ |
| 65068 | case 4104: /* avx2_permv4df_1_mask */ |
| 65069 | case 4103: /* avx2_permv4df_1 */ |
| 65070 | case 4096: /* avx512vl_permvarv8hi_mask */ |
| 65071 | case 4095: /* avx512vl_permvarv8hi */ |
| 65072 | case 4092: /* avx512vl_permvarv16qi_mask */ |
| 65073 | case 4091: /* avx512vl_permvarv16qi */ |
| 65074 | case 4088: /* avx2_permvarv4df_mask */ |
| 65075 | case 4087: /* avx2_permvarv4df */ |
| 65076 | case 4076: /* avx2_permvarv8sf_mask */ |
| 65077 | case 4075: /* avx2_permvarv8sf */ |
| 65078 | case 4043: /* xop_pcom_tfv2di3 */ |
| 65079 | case 4042: /* xop_pcom_tfv4si3 */ |
| 65080 | case 4041: /* xop_pcom_tfv8hi3 */ |
| 65081 | case 4040: /* xop_pcom_tfv16qi3 */ |
| 65082 | case 4039: /* xop_maskcmp_uns2v2di3 */ |
| 65083 | case 4038: /* xop_maskcmp_uns2v4si3 */ |
| 65084 | case 4037: /* xop_maskcmp_uns2v8hi3 */ |
| 65085 | case 4036: /* xop_maskcmp_uns2v16qi3 */ |
| 65086 | case 4035: /* xop_maskcmp_unsv2di3 */ |
| 65087 | case 4034: /* xop_maskcmp_unsv4si3 */ |
| 65088 | case 4033: /* xop_maskcmp_unsv8hi3 */ |
| 65089 | case 4032: /* xop_maskcmp_unsv16qi3 */ |
| 65090 | case 4019: /* xop_shlv2di3 */ |
| 65091 | case 4018: /* xop_shlv4si3 */ |
| 65092 | case 4017: /* xop_shlv8hi3 */ |
| 65093 | case 4016: /* xop_shlv16qi3 */ |
| 65094 | case 4015: /* xop_shav2di3 */ |
| 65095 | case 4014: /* xop_shav4si3 */ |
| 65096 | case 4013: /* xop_shav8hi3 */ |
| 65097 | case 4012: /* xop_shav16qi3 */ |
| 65098 | case 4011: /* xop_vrotlv2di3 */ |
| 65099 | case 4010: /* xop_vrotlv4si3 */ |
| 65100 | case 4009: /* xop_vrotlv8hi3 */ |
| 65101 | case 4008: /* xop_vrotlv16qi3 */ |
| 65102 | case 4007: /* xop_rotrv2di3 */ |
| 65103 | case 4006: /* xop_rotrv4si3 */ |
| 65104 | case 4005: /* xop_rotrv8hi3 */ |
| 65105 | case 4004: /* xop_rotrv16qi3 */ |
| 65106 | case 4003: /* xop_rotlv2di3 */ |
| 65107 | case 4002: /* xop_rotlv4si3 */ |
| 65108 | case 4001: /* xop_rotlv8hi3 */ |
| 65109 | case 4000: /* xop_rotlv16qi3 */ |
| 65110 | case 3794: /* sse4_1_packusdw_mask */ |
| 65111 | case 3793: /* sse4_1_packusdw */ |
| 65112 | case 3769: /* sse4a_extrq */ |
| 65113 | case 3768: /* sse4a_extrqi */ |
| 65114 | case 3736: /* ssse3_palignrdi */ |
| 65115 | case 3735: /* ssse3_palignrti */ |
| 65116 | case 3734: /* avx2_palignrv2ti */ |
| 65117 | case 3733: /* avx512bw_palignrv4ti */ |
| 65118 | case 3732: /* ssse3_palignrv16qi_mask */ |
| 65119 | case 3731: /* avx2_palignrv32qi_mask */ |
| 65120 | case 3730: /* avx512bw_palignrv64qi_mask */ |
| 65121 | case 3705: /* ssse3_pmaddubsw128 */ |
| 65122 | case 3693: /* ssse3_phsubdv4si3 */ |
| 65123 | case 3692: /* ssse3_phadddv4si3 */ |
| 65124 | case 3685: /* ssse3_phsubswv8hi3 */ |
| 65125 | case 3684: /* ssse3_phsubwv8hi3 */ |
| 65126 | case 3683: /* ssse3_phaddswv8hi3 */ |
| 65127 | case 3682: /* ssse3_phaddwv8hi3 */ |
| 65128 | case 3657: /* sse2_psadbw */ |
| 65129 | case 3654: /* *sse2_uavgv8hi3_mask */ |
| 65130 | case 3653: /* *sse2_uavgv8hi3 */ |
| 65131 | case 3648: /* *sse2_uavgv16qi3_mask */ |
| 65132 | case 3647: /* *sse2_uavgv16qi3 */ |
| 65133 | case 3619: /* sse2_pshufhw_1_mask */ |
| 65134 | case 3618: /* sse2_pshufhw_1 */ |
| 65135 | case 3613: /* sse2_pshuflw_1_mask */ |
| 65136 | case 3612: /* sse2_pshuflw_1 */ |
| 65137 | case 3597: /* avx512vl_shuf_f32x4_1_mask */ |
| 65138 | case 3596: /* avx512vl_shuf_f32x4_1 */ |
| 65139 | case 3561: /* sse4_1_pinsrq */ |
| 65140 | case 3560: /* sse4_1_pinsrd */ |
| 65141 | case 3559: /* sse2_pinsrw */ |
| 65142 | case 3558: /* sse4_1_pinsrb */ |
| 65143 | case 3557: /* vec_interleave_lowv4si_mask */ |
| 65144 | case 3556: /* vec_interleave_lowv4si */ |
| 65145 | case 3551: /* vec_interleave_highv4si_mask */ |
| 65146 | case 3550: /* vec_interleave_highv4si */ |
| 65147 | case 3545: /* vec_interleave_lowv8hi_mask */ |
| 65148 | case 3544: /* vec_interleave_lowv8hi */ |
| 65149 | case 3539: /* vec_interleave_highv8hi_mask */ |
| 65150 | case 3538: /* vec_interleave_highv8hi */ |
| 65151 | case 3533: /* vec_interleave_lowv16qi_mask */ |
| 65152 | case 3532: /* vec_interleave_lowv16qi */ |
| 65153 | case 3527: /* vec_interleave_highv16qi_mask */ |
| 65154 | case 3526: /* vec_interleave_highv16qi */ |
| 65155 | case 3521: /* sse2_packuswb_mask */ |
| 65156 | case 3520: /* sse2_packuswb */ |
| 65157 | case 3515: /* sse2_packssdw_mask */ |
| 65158 | case 3514: /* sse2_packssdw */ |
| 65159 | case 3509: /* sse2_packsswb_mask */ |
| 65160 | case 3508: /* sse2_packsswb */ |
| 65161 | case 3401: /* *andnotv2di3_mask */ |
| 65162 | case 3398: /* *andnotv4si3_mask */ |
| 65163 | case 3383: /* sse2_gtv4si3 */ |
| 65164 | case 3382: /* sse2_gtv8hi3 */ |
| 65165 | case 3381: /* sse2_gtv16qi3 */ |
| 65166 | case 3380: /* avx512vl_gtv8hi3_mask */ |
| 65167 | case 3379: /* avx512vl_gtv8hi3 */ |
| 65168 | case 3372: /* avx512vl_gtv16qi3_mask */ |
| 65169 | case 3371: /* avx512vl_gtv16qi3 */ |
| 65170 | case 3368: /* avx512vl_gtv2di3_mask */ |
| 65171 | case 3367: /* avx512vl_gtv2di3 */ |
| 65172 | case 3362: /* avx512vl_gtv4si3_mask */ |
| 65173 | case 3361: /* avx512vl_gtv4si3 */ |
| 65174 | case 3352: /* sse4_2_gtv2di3 */ |
| 65175 | case 3351: /* *sse2_eqv4si3 */ |
| 65176 | case 3350: /* *sse2_eqv8hi3 */ |
| 65177 | case 3349: /* *sse2_eqv16qi3 */ |
| 65178 | case 3348: /* *sse4_1_eqv2di3 */ |
| 65179 | case 3347: /* avx512vl_eqv2di3_mask_1 */ |
| 65180 | case 3346: /* avx512vl_eqv2di3_1 */ |
| 65181 | case 3341: /* avx512vl_eqv4si3_mask_1 */ |
| 65182 | case 3340: /* avx512vl_eqv4si3_1 */ |
| 65183 | case 3335: /* avx512vl_eqv8hi3_mask_1 */ |
| 65184 | case 3334: /* avx512vl_eqv8hi3_1 */ |
| 65185 | case 3327: /* avx512vl_eqv16qi3_mask_1 */ |
| 65186 | case 3326: /* avx512vl_eqv16qi3_1 */ |
| 65187 | case 3319: /* *uminv16qi3 */ |
| 65188 | case 3318: /* *umaxv16qi3 */ |
| 65189 | case 3317: /* *sse4_1_uminv4si3_mask */ |
| 65190 | case 3316: /* *sse4_1_uminv4si3 */ |
| 65191 | case 3315: /* *sse4_1_umaxv4si3_mask */ |
| 65192 | case 3314: /* *sse4_1_umaxv4si3 */ |
| 65193 | case 3313: /* *sse4_1_uminv8hi3_mask */ |
| 65194 | case 3312: /* *sse4_1_uminv8hi3 */ |
| 65195 | case 3311: /* *sse4_1_umaxv8hi3_mask */ |
| 65196 | case 3310: /* *sse4_1_umaxv8hi3 */ |
| 65197 | case 3309: /* *sminv8hi3 */ |
| 65198 | case 3308: /* *smaxv8hi3 */ |
| 65199 | case 3307: /* *sse4_1_sminv4si3_mask */ |
| 65200 | case 3306: /* *sse4_1_sminv4si3 */ |
| 65201 | case 3305: /* *sse4_1_smaxv4si3_mask */ |
| 65202 | case 3304: /* *sse4_1_smaxv4si3 */ |
| 65203 | case 3303: /* *sse4_1_sminv16qi3_mask */ |
| 65204 | case 3302: /* *sse4_1_sminv16qi3 */ |
| 65205 | case 3301: /* *sse4_1_smaxv16qi3_mask */ |
| 65206 | case 3300: /* *sse4_1_smaxv16qi3 */ |
| 65207 | case 3299: /* uminv8hi3_mask */ |
| 65208 | case 3298: /* *uminv8hi3 */ |
| 65209 | case 3297: /* umaxv8hi3_mask */ |
| 65210 | case 3296: /* *umaxv8hi3 */ |
| 65211 | case 3295: /* sminv8hi3_mask */ |
| 65212 | case 3294: /* *sminv8hi3 */ |
| 65213 | case 3293: /* smaxv8hi3_mask */ |
| 65214 | case 3292: /* *smaxv8hi3 */ |
| 65215 | case 3267: /* uminv16qi3_mask */ |
| 65216 | case 3266: /* *uminv16qi3 */ |
| 65217 | case 3265: /* umaxv16qi3_mask */ |
| 65218 | case 3264: /* *umaxv16qi3 */ |
| 65219 | case 3263: /* sminv16qi3_mask */ |
| 65220 | case 3262: /* *sminv16qi3 */ |
| 65221 | case 3261: /* smaxv16qi3_mask */ |
| 65222 | case 3260: /* *smaxv16qi3 */ |
| 65223 | case 3251: /* *avx512f_uminv2di3_mask */ |
| 65224 | case 3250: /* *avx512f_uminv2di3 */ |
| 65225 | case 3249: /* *avx512f_umaxv2di3_mask */ |
| 65226 | case 3248: /* *avx512f_umaxv2di3 */ |
| 65227 | case 3247: /* *avx512f_sminv2di3_mask */ |
| 65228 | case 3246: /* *avx512f_sminv2di3 */ |
| 65229 | case 3245: /* *avx512f_smaxv2di3_mask */ |
| 65230 | case 3244: /* *avx512f_smaxv2di3 */ |
| 65231 | case 3227: /* *avx512f_uminv4si3_mask */ |
| 65232 | case 3226: /* *avx512f_uminv4si3 */ |
| 65233 | case 3225: /* *avx512f_umaxv4si3_mask */ |
| 65234 | case 3224: /* *avx512f_umaxv4si3 */ |
| 65235 | case 3223: /* *avx512f_sminv4si3_mask */ |
| 65236 | case 3222: /* *avx512f_sminv4si3 */ |
| 65237 | case 3221: /* *avx512f_smaxv4si3_mask */ |
| 65238 | case 3220: /* *avx512f_smaxv4si3 */ |
| 65239 | case 3143: /* sse2_lshrv1ti3 */ |
| 65240 | case 3142: /* avx2_lshrv2ti3 */ |
| 65241 | case 3141: /* avx512bw_lshrv4ti3 */ |
| 65242 | case 3140: /* sse2_ashlv1ti3 */ |
| 65243 | case 3139: /* avx2_ashlv2ti3 */ |
| 65244 | case 3138: /* avx512bw_ashlv4ti3 */ |
| 65245 | case 3137: /* lshrv8di3_mask */ |
| 65246 | case 3136: /* lshrv8di3 */ |
| 65247 | case 3135: /* ashlv8di3_mask */ |
| 65248 | case 3134: /* ashlv8di3 */ |
| 65249 | case 3133: /* lshrv16si3_mask */ |
| 65250 | case 3132: /* lshrv16si3 */ |
| 65251 | case 3131: /* ashlv16si3_mask */ |
| 65252 | case 3130: /* ashlv16si3 */ |
| 65253 | case 3129: /* lshrv2di3_mask */ |
| 65254 | case 3128: /* lshrv2di3 */ |
| 65255 | case 3127: /* ashlv2di3_mask */ |
| 65256 | case 3126: /* ashlv2di3 */ |
| 65257 | case 3125: /* lshrv4di3_mask */ |
| 65258 | case 3124: /* lshrv4di3 */ |
| 65259 | case 3123: /* ashlv4di3_mask */ |
| 65260 | case 3122: /* ashlv4di3 */ |
| 65261 | case 3121: /* lshrv4si3_mask */ |
| 65262 | case 3120: /* lshrv4si3 */ |
| 65263 | case 3119: /* ashlv4si3_mask */ |
| 65264 | case 3118: /* ashlv4si3 */ |
| 65265 | case 3117: /* lshrv8si3_mask */ |
| 65266 | case 3116: /* lshrv8si3 */ |
| 65267 | case 3115: /* ashlv8si3_mask */ |
| 65268 | case 3114: /* ashlv8si3 */ |
| 65269 | case 3113: /* lshrv8hi3_mask */ |
| 65270 | case 3112: /* lshrv8hi3 */ |
| 65271 | case 3111: /* ashlv8hi3_mask */ |
| 65272 | case 3110: /* ashlv8hi3 */ |
| 65273 | case 3109: /* lshrv16hi3_mask */ |
| 65274 | case 3108: /* lshrv16hi3 */ |
| 65275 | case 3107: /* ashlv16hi3_mask */ |
| 65276 | case 3106: /* ashlv16hi3 */ |
| 65277 | case 3105: /* lshrv32hi3_mask */ |
| 65278 | case 3104: /* lshrv32hi3 */ |
| 65279 | case 3103: /* ashlv32hi3_mask */ |
| 65280 | case 3102: /* ashlv32hi3 */ |
| 65281 | case 3101: /* ashrv8di3_mask */ |
| 65282 | case 3100: /* ashrv8di3 */ |
| 65283 | case 3099: /* ashrv16si3_mask */ |
| 65284 | case 3098: /* ashrv16si3 */ |
| 65285 | case 3097: /* ashrv4di3_mask */ |
| 65286 | case 3096: /* ashrv4di3 */ |
| 65287 | case 3095: /* ashrv32hi3_mask */ |
| 65288 | case 3094: /* ashrv32hi3 */ |
| 65289 | case 3093: /* ashrv2di3_mask */ |
| 65290 | case 3092: /* *ashrv2di3 */ |
| 65291 | case 3091: /* ashrv4si3 */ |
| 65292 | case 3090: /* ashrv8si3 */ |
| 65293 | case 3089: /* ashrv8hi3 */ |
| 65294 | case 3088: /* ashrv16hi3 */ |
| 65295 | case 3087: /* ashrv4si3_mask */ |
| 65296 | case 3086: /* *ashrv4si3 */ |
| 65297 | case 3085: /* ashrv8si3_mask */ |
| 65298 | case 3084: /* *ashrv8si3 */ |
| 65299 | case 3083: /* ashrv8hi3_mask */ |
| 65300 | case 3082: /* *ashrv8hi3 */ |
| 65301 | case 3081: /* ashrv16hi3_mask */ |
| 65302 | case 3080: /* *ashrv16hi3 */ |
| 65303 | case 3067: /* *sse2_pmaddwd */ |
| 65304 | case 3029: /* *sse2_ussubv8hi3_mask */ |
| 65305 | case 3028: /* *sse2_ussubv8hi3 */ |
| 65306 | case 3027: /* *sse2_sssubv8hi3_mask */ |
| 65307 | case 3026: /* *sse2_sssubv8hi3 */ |
| 65308 | case 3025: /* *sse2_usaddv8hi3_mask */ |
| 65309 | case 3024: /* *sse2_usaddv8hi3 */ |
| 65310 | case 3023: /* *sse2_ssaddv8hi3_mask */ |
| 65311 | case 3022: /* *sse2_ssaddv8hi3 */ |
| 65312 | case 3021: /* *avx2_ussubv16hi3_mask */ |
| 65313 | case 3020: /* *avx2_ussubv16hi3 */ |
| 65314 | case 3019: /* *avx2_sssubv16hi3_mask */ |
| 65315 | case 3018: /* *avx2_sssubv16hi3 */ |
| 65316 | case 3017: /* *avx2_usaddv16hi3_mask */ |
| 65317 | case 3016: /* *avx2_usaddv16hi3 */ |
| 65318 | case 3015: /* *avx2_ssaddv16hi3_mask */ |
| 65319 | case 3014: /* *avx2_ssaddv16hi3 */ |
| 65320 | case 3013: /* *avx512bw_ussubv32hi3_mask */ |
| 65321 | case 3012: /* *avx512bw_ussubv32hi3 */ |
| 65322 | case 3011: /* *avx512bw_sssubv32hi3_mask */ |
| 65323 | case 3010: /* *avx512bw_sssubv32hi3 */ |
| 65324 | case 3009: /* *avx512bw_usaddv32hi3_mask */ |
| 65325 | case 3008: /* *avx512bw_usaddv32hi3 */ |
| 65326 | case 3007: /* *avx512bw_ssaddv32hi3_mask */ |
| 65327 | case 3006: /* *avx512bw_ssaddv32hi3 */ |
| 65328 | case 3005: /* *sse2_ussubv16qi3_mask */ |
| 65329 | case 3004: /* *sse2_ussubv16qi3 */ |
| 65330 | case 3003: /* *sse2_sssubv16qi3_mask */ |
| 65331 | case 3002: /* *sse2_sssubv16qi3 */ |
| 65332 | case 3001: /* *sse2_usaddv16qi3_mask */ |
| 65333 | case 3000: /* *sse2_usaddv16qi3 */ |
| 65334 | case 2999: /* *sse2_ssaddv16qi3_mask */ |
| 65335 | case 2998: /* *sse2_ssaddv16qi3 */ |
| 65336 | case 2997: /* *avx2_ussubv32qi3_mask */ |
| 65337 | case 2996: /* *avx2_ussubv32qi3 */ |
| 65338 | case 2995: /* *avx2_sssubv32qi3_mask */ |
| 65339 | case 2994: /* *avx2_sssubv32qi3 */ |
| 65340 | case 2993: /* *avx2_usaddv32qi3_mask */ |
| 65341 | case 2992: /* *avx2_usaddv32qi3 */ |
| 65342 | case 2991: /* *avx2_ssaddv32qi3_mask */ |
| 65343 | case 2990: /* *avx2_ssaddv32qi3 */ |
| 65344 | case 2989: /* *avx512bw_ussubv64qi3_mask */ |
| 65345 | case 2988: /* *avx512bw_ussubv64qi3 */ |
| 65346 | case 2987: /* *avx512bw_sssubv64qi3_mask */ |
| 65347 | case 2986: /* *avx512bw_sssubv64qi3 */ |
| 65348 | case 2985: /* *avx512bw_usaddv64qi3_mask */ |
| 65349 | case 2984: /* *avx512bw_usaddv64qi3 */ |
| 65350 | case 2983: /* *avx512bw_ssaddv64qi3_mask */ |
| 65351 | case 2982: /* *avx512bw_ssaddv64qi3 */ |
| 65352 | case 2981: /* *subv8hi3_mask */ |
| 65353 | case 2980: /* *addv8hi3_mask */ |
| 65354 | case 2973: /* *subv16qi3_mask */ |
| 65355 | case 2972: /* *addv16qi3_mask */ |
| 65356 | case 2969: /* *subv2di3_mask */ |
| 65357 | case 2968: /* *addv2di3_mask */ |
| 65358 | case 2963: /* *subv4si3_mask */ |
| 65359 | case 2962: /* *addv4si3_mask */ |
| 65360 | case 2957: /* *subv2di3 */ |
| 65361 | case 2956: /* *addv2di3 */ |
| 65362 | case 2951: /* *subv4si3 */ |
| 65363 | case 2950: /* *addv4si3 */ |
| 65364 | case 2945: /* *subv8hi3 */ |
| 65365 | case 2944: /* *addv8hi3 */ |
| 65366 | case 2939: /* *subv16qi3 */ |
| 65367 | case 2938: /* *addv16qi3 */ |
| 65368 | case 2723: /* vec_interleave_lowv2di_mask */ |
| 65369 | case 2722: /* vec_interleave_lowv2di */ |
| 65370 | case 2717: /* vec_interleave_highv2di_mask */ |
| 65371 | case 2716: /* vec_interleave_highv2di */ |
| 65372 | case 2588: /* avx512vl_vternlogv2di_mask */ |
| 65373 | case 2585: /* avx512vl_vternlogv4si_mask */ |
| 65374 | case 2582: /* avx512vl_vternlogv2di_maskz_1 */ |
| 65375 | case 2581: /* avx512vl_vternlogv2di */ |
| 65376 | case 2576: /* avx512vl_vternlogv4si_maskz_1 */ |
| 65377 | case 2575: /* avx512vl_vternlogv4si */ |
| 65378 | case 2540: /* *avx_unpcklpd256_mask */ |
| 65379 | case 2539: /* *avx_unpcklpd256 */ |
| 65380 | case 2534: /* avx_unpckhpd256_mask */ |
| 65381 | case 2533: /* avx_unpckhpd256 */ |
| 65382 | case 2439: /* avx_movsldup256_mask */ |
| 65383 | case 2438: /* avx_movsldup256 */ |
| 65384 | case 2433: /* avx_movshdup256_mask */ |
| 65385 | case 2432: /* avx_movshdup256 */ |
| 65386 | case 2429: /* avx_unpcklps256_mask */ |
| 65387 | case 2428: /* avx_unpcklps256 */ |
| 65388 | case 2423: /* avx_unpckhps256_mask */ |
| 65389 | case 2422: /* avx_unpckhps256 */ |
| 65390 | case 2226: /* sse2_cvttsd2siq_round */ |
| 65391 | case 2225: /* sse2_cvttsd2siq */ |
| 65392 | case 2222: /* sse2_cvtsd2siq_2 */ |
| 65393 | case 2221: /* sse2_cvtsd2siq_round */ |
| 65394 | case 2220: /* sse2_cvtsd2siq */ |
| 65395 | case 2216: /* avx512f_vcvttsd2usiq_round */ |
| 65396 | case 2215: /* avx512f_vcvttsd2usiq */ |
| 65397 | case 2212: /* avx512f_vcvtsd2usiq_round */ |
| 65398 | case 2211: /* avx512f_vcvtsd2usiq */ |
| 65399 | case 2208: /* avx512f_vcvttss2usiq_round */ |
| 65400 | case 2207: /* avx512f_vcvttss2usiq */ |
| 65401 | case 2204: /* avx512f_vcvtss2usiq_round */ |
| 65402 | case 2203: /* avx512f_vcvtss2usiq */ |
| 65403 | case 2119: /* sse_cvttss2siq_round */ |
| 65404 | case 2118: /* sse_cvttss2siq */ |
| 65405 | case 2115: /* sse_cvtss2siq_2 */ |
| 65406 | case 2114: /* sse_cvtss2siq_round */ |
| 65407 | case 2113: /* sse_cvtss2siq */ |
| 65408 | case 1718: /* avx512vl_ucmpv2di3_mask */ |
| 65409 | case 1717: /* avx512vl_ucmpv2di3 */ |
| 65410 | case 1712: /* avx512vl_ucmpv4si3_mask */ |
| 65411 | case 1711: /* avx512vl_ucmpv4si3 */ |
| 65412 | case 1706: /* avx512vl_ucmpv8hi3_mask */ |
| 65413 | case 1705: /* avx512vl_ucmpv8hi3 */ |
| 65414 | case 1698: /* avx512vl_ucmpv16qi3_mask */ |
| 65415 | case 1697: /* avx512vl_ucmpv16qi3 */ |
| 65416 | case 1694: /* avx512vl_cmpv8hi3_mask */ |
| 65417 | case 1693: /* avx512vl_cmpv8hi3 */ |
| 65418 | case 1686: /* avx512vl_cmpv16qi3_mask */ |
| 65419 | case 1685: /* avx512vl_cmpv16qi3 */ |
| 65420 | case 1666: /* avx512vl_cmpv2di3_mask */ |
| 65421 | case 1665: /* avx512vl_cmpv2di3 */ |
| 65422 | case 1658: /* avx512vl_cmpv4si3_mask */ |
| 65423 | case 1657: /* avx512vl_cmpv4si3 */ |
| 65424 | case 1630: /* reducepv4df_mask */ |
| 65425 | case 1629: /* *reducepv4df */ |
| 65426 | case 1624: /* reducepv8sf_mask */ |
| 65427 | case 1623: /* *reducepv8sf */ |
| 65428 | case 1513: /* rsqrt14v4df_mask */ |
| 65429 | case 1512: /* *rsqrt14v4df */ |
| 65430 | case 1507: /* rsqrt14v8sf_mask */ |
| 65431 | case 1506: /* *rsqrt14v8sf */ |
| 65432 | case 1502: /* avx_rsqrtv8sf2 */ |
| 65433 | case 1477: /* rcp14v4df_mask */ |
| 65434 | case 1476: /* *rcp14v4df */ |
| 65435 | case 1471: /* rcp14v8sf_mask */ |
| 65436 | case 1470: /* *rcp14v8sf */ |
| 65437 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) |
| 65438 | { |
| 65439 | return 6; |
| 65440 | } |
| 65441 | else if (cached_memory == MEMORY_NONE) |
| 65442 | { |
| 65443 | return 1; |
| 65444 | } |
| 65445 | else |
| 65446 | { |
| 65447 | return 0; |
| 65448 | } |
| 65449 | |
| 65450 | case 1462: /* avx_divv4df3_mask */ |
| 65451 | case 1461: /* avx_divv4df3 */ |
| 65452 | case 1454: /* avx_divv8sf3_mask */ |
| 65453 | case 1453: /* avx_divv8sf3 */ |
| 65454 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) |
| 65455 | { |
| 65456 | return 43 /* 0x2b */; |
| 65457 | } |
| 65458 | else if (cached_memory == MEMORY_NONE) |
| 65459 | { |
| 65460 | return 38 /* 0x26 */; |
| 65461 | } |
| 65462 | else |
| 65463 | { |
| 65464 | return 0; |
| 65465 | } |
| 65466 | |
| 65467 | case 1464: /* sse2_divv2df3_mask */ |
| 65468 | case 1463: /* sse2_divv2df3 */ |
| 65469 | case 1456: /* sse_divv4sf3_mask */ |
| 65470 | case 1455: /* sse_divv4sf3 */ |
| 65471 | case 1448: /* sse2_vmdivv2df3_round */ |
| 65472 | case 1447: /* sse2_vmdivv2df3 */ |
| 65473 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) |
| 65474 | { |
| 65475 | return 19 /* 0x13 */; |
| 65476 | } |
| 65477 | else if (cached_memory == MEMORY_LOAD) |
| 65478 | { |
| 65479 | return 24 /* 0x18 */; |
| 65480 | } |
| 65481 | else |
| 65482 | { |
| 65483 | return 0; |
| 65484 | } |
| 65485 | |
| 65486 | case 1444: /* sse_vmdivv4sf3_round */ |
| 65487 | case 1443: /* sse_vmdivv4sf3 */ |
| 65488 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) |
| 65489 | { |
| 65490 | return 14 /* 0xe */; |
| 65491 | } |
| 65492 | else if (cached_memory == MEMORY_LOAD) |
| 65493 | { |
| 65494 | return 19 /* 0x13 */; |
| 65495 | } |
| 65496 | else |
| 65497 | { |
| 65498 | return 0; |
| 65499 | } |
| 65500 | |
| 65501 | case 3079: /* *sse4_1_mulv4si3_mask */ |
| 65502 | case 3078: /* *sse4_1_mulv4si3 */ |
| 65503 | case 3077: /* *avx2_mulv8si3_mask */ |
| 65504 | case 3076: /* *avx2_mulv8si3 */ |
| 65505 | case 3075: /* *avx512f_mulv16si3_mask */ |
| 65506 | case 3074: /* *avx512f_mulv16si3 */ |
| 65507 | case 1436: /* *mulv4df3_mask_round */ |
| 65508 | case 1435: /* *mulv4df3_mask */ |
| 65509 | case 1434: /* *mulv4df3_round */ |
| 65510 | case 1433: /* *mulv4df3 */ |
| 65511 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) |
| 65512 | { |
| 65513 | return 9; |
| 65514 | } |
| 65515 | else if (cached_memory == MEMORY_NONE) |
| 65516 | { |
| 65517 | return 4; |
| 65518 | } |
| 65519 | else |
| 65520 | { |
| 65521 | return 0; |
| 65522 | } |
| 65523 | |
| 65524 | case 4507: /* vcvtph2ps256_mask */ |
| 65525 | case 4506: /* vcvtph2ps256 */ |
| 65526 | case 3896: /* sse4_1_roundsd */ |
| 65527 | case 3894: /* sse4_1_roundpd */ |
| 65528 | case 2417: /* sse2_cvtps2pd_mask */ |
| 65529 | case 2416: /* sse2_cvtps2pd */ |
| 65530 | case 2369: /* sse2_cvttpd2dq_mask */ |
| 65531 | case 2368: /* sse2_cvttpd2dq */ |
| 65532 | case 2367: /* ufix_truncv4sfv4si2_mask */ |
| 65533 | case 2366: /* ufix_truncv4sfv4si2 */ |
| 65534 | case 2363: /* ufix_truncv2sfv2di2_mask */ |
| 65535 | case 2362: /* ufix_truncv2sfv2di2 */ |
| 65536 | case 2361: /* fix_truncv2sfv2di2_mask */ |
| 65537 | case 2360: /* fix_truncv2sfv2di2 */ |
| 65538 | case 2347: /* ufix_notruncv2dfv2di2_mask */ |
| 65539 | case 2346: /* ufix_notruncv2dfv2di2 */ |
| 65540 | case 2339: /* fix_notruncv2dfv2di2_mask */ |
| 65541 | case 2338: /* fix_notruncv2dfv2di2 */ |
| 65542 | case 2331: /* ufix_truncv2dfv2di2_mask */ |
| 65543 | case 2330: /* ufix_truncv2dfv2di2 */ |
| 65544 | case 2329: /* fix_truncv2dfv2di2_mask */ |
| 65545 | case 2328: /* fix_truncv2dfv2di2 */ |
| 65546 | case 2311: /* ufix_truncv2dfv2si2_mask */ |
| 65547 | case 2310: /* ufix_truncv2dfv2si2 */ |
| 65548 | case 2301: /* ufix_notruncv2dfv2si2_mask */ |
| 65549 | case 2300: /* ufix_notruncv2dfv2si2 */ |
| 65550 | case 2291: /* sse2_cvtpd2dq_mask */ |
| 65551 | case 2290: /* sse2_cvtpd2dq */ |
| 65552 | case 2282: /* sse2_cvtdq2pd_mask */ |
| 65553 | case 2281: /* sse2_cvtdq2pd */ |
| 65554 | case 2278: /* ufloatv2siv2df2_mask */ |
| 65555 | case 2277: /* ufloatv2siv2df2 */ |
| 65556 | case 2254: /* ufloatv2div2df2_mask_round */ |
| 65557 | case 2253: /* ufloatv2div2df2_mask */ |
| 65558 | case 2252: /* ufloatv2div2df2_round */ |
| 65559 | case 2251: /* ufloatv2div2df2 */ |
| 65560 | case 2250: /* floatv2div2df2_mask_round */ |
| 65561 | case 2249: /* floatv2div2df2_mask */ |
| 65562 | case 2248: /* floatv2div2df2_round */ |
| 65563 | case 2247: /* floatv2div2df2 */ |
| 65564 | case 2197: /* sse2_cvttpd2pi */ |
| 65565 | case 2196: /* sse2_cvtpd2pi */ |
| 65566 | case 2195: /* sse2_cvtpi2pd */ |
| 65567 | case 2194: /* fix_truncv4sfv4si2_mask */ |
| 65568 | case 2193: /* fix_truncv4sfv4si2 */ |
| 65569 | case 2182: /* avx512dq_cvtps2uqqv2di_mask */ |
| 65570 | case 2181: /* *avx512dq_cvtps2uqqv2di */ |
| 65571 | case 2174: /* avx512dq_cvtps2qqv2di_mask */ |
| 65572 | case 2173: /* *avx512dq_cvtps2qqv2di */ |
| 65573 | case 2166: /* avx512vl_ufix_notruncv4sfv4si_mask_round */ |
| 65574 | case 2165: /* avx512vl_ufix_notruncv4sfv4si_mask */ |
| 65575 | case 2164: /* *avx512vl_ufix_notruncv4sfv4si_round */ |
| 65576 | case 2163: /* *avx512vl_ufix_notruncv4sfv4si */ |
| 65577 | case 2150: /* sse2_fix_notruncv4sfv4si_mask */ |
| 65578 | case 2149: /* sse2_fix_notruncv4sfv4si */ |
| 65579 | case 2104: /* sse_cvtps2pi */ |
| 65580 | case 1307: /* sse2_movntv2di */ |
| 65581 | if (get_attr_memory (insn) == MEMORY_LOAD) |
| 65582 | { |
| 65583 | return 8; |
| 65584 | } |
| 65585 | else |
| 65586 | { |
| 65587 | return 3; |
| 65588 | } |
| 65589 | |
| 65590 | case 3893: /* avx_roundpd256 */ |
| 65591 | case 2390: /* *avx_cvtps2pd256_2 */ |
| 65592 | case 2389: /* avx_cvtps2pd256_mask */ |
| 65593 | case 2388: /* avx_cvtps2pd256 */ |
| 65594 | case 2365: /* ufix_truncv8sfv8si2_mask */ |
| 65595 | case 2364: /* ufix_truncv8sfv8si2 */ |
| 65596 | case 2359: /* ufix_truncv4sfv4di2_mask */ |
| 65597 | case 2358: /* ufix_truncv4sfv4di2 */ |
| 65598 | case 2357: /* fix_truncv4sfv4di2_mask */ |
| 65599 | case 2356: /* fix_truncv4sfv4di2 */ |
| 65600 | case 2345: /* ufix_notruncv4dfv4di2_mask */ |
| 65601 | case 2344: /* ufix_notruncv4dfv4di2 */ |
| 65602 | case 2337: /* fix_notruncv4dfv4di2_mask */ |
| 65603 | case 2336: /* fix_notruncv4dfv4di2 */ |
| 65604 | case 2327: /* ufix_truncv4dfv4di2_mask */ |
| 65605 | case 2326: /* ufix_truncv4dfv4di2 */ |
| 65606 | case 2325: /* fix_truncv4dfv4di2_mask */ |
| 65607 | case 2324: /* fix_truncv4dfv4di2 */ |
| 65608 | case 2315: /* ufix_truncv4dfv4si2_mask */ |
| 65609 | case 2314: /* ufix_truncv4dfv4si2 */ |
| 65610 | case 2313: /* fix_truncv4dfv4si2_mask */ |
| 65611 | case 2312: /* fix_truncv4dfv4si2 */ |
| 65612 | case 2309: /* ufix_truncv8dfv8si2_mask_round */ |
| 65613 | case 2308: /* ufix_truncv8dfv8si2_mask */ |
| 65614 | case 2307: /* ufix_truncv8dfv8si2_round */ |
| 65615 | case 2306: /* ufix_truncv8dfv8si2 */ |
| 65616 | case 2305: /* fix_truncv8dfv8si2_mask_round */ |
| 65617 | case 2304: /* fix_truncv8dfv8si2_mask */ |
| 65618 | case 2303: /* fix_truncv8dfv8si2_round */ |
| 65619 | case 2302: /* fix_truncv8dfv8si2 */ |
| 65620 | case 2299: /* ufix_notruncv4dfv4si2_mask_round */ |
| 65621 | case 2298: /* ufix_notruncv4dfv4si2_mask */ |
| 65622 | case 2297: /* ufix_notruncv4dfv4si2_round */ |
| 65623 | case 2296: /* ufix_notruncv4dfv4si2 */ |
| 65624 | case 2288: /* avx_cvtpd2dq256_mask */ |
| 65625 | case 2287: /* avx_cvtpd2dq256 */ |
| 65626 | case 2286: /* avx512f_cvtpd2dq512_mask_round */ |
| 65627 | case 2285: /* avx512f_cvtpd2dq512_mask */ |
| 65628 | case 2284: /* avx512f_cvtpd2dq512_round */ |
| 65629 | case 2283: /* avx512f_cvtpd2dq512 */ |
| 65630 | case 2280: /* avx_cvtdq2pd256_2 */ |
| 65631 | case 2276: /* ufloatv4siv4df2_mask */ |
| 65632 | case 2275: /* ufloatv4siv4df2 */ |
| 65633 | case 2246: /* ufloatv4div4df2_mask_round */ |
| 65634 | case 2245: /* ufloatv4div4df2_mask */ |
| 65635 | case 2244: /* ufloatv4div4df2_round */ |
| 65636 | case 2243: /* ufloatv4div4df2 */ |
| 65637 | case 2242: /* floatv4div4df2_mask_round */ |
| 65638 | case 2241: /* floatv4div4df2_mask */ |
| 65639 | case 2240: /* floatv4div4df2_round */ |
| 65640 | case 2239: /* floatv4div4df2 */ |
| 65641 | case 2230: /* floatv4siv4df2_mask */ |
| 65642 | case 2229: /* floatv4siv4df2 */ |
| 65643 | case 2192: /* fix_truncv8sfv8si2_mask */ |
| 65644 | case 2191: /* fix_truncv8sfv8si2 */ |
| 65645 | case 2180: /* avx512dq_cvtps2uqqv4di_mask */ |
| 65646 | case 2179: /* *avx512dq_cvtps2uqqv4di */ |
| 65647 | case 2172: /* avx512dq_cvtps2qqv4di_mask */ |
| 65648 | case 2171: /* *avx512dq_cvtps2qqv4di */ |
| 65649 | case 2162: /* avx512vl_ufix_notruncv8sfv8si_mask_round */ |
| 65650 | case 2161: /* avx512vl_ufix_notruncv8sfv8si_mask */ |
| 65651 | case 2160: /* *avx512vl_ufix_notruncv8sfv8si_round */ |
| 65652 | case 2159: /* *avx512vl_ufix_notruncv8sfv8si */ |
| 65653 | case 2148: /* avx_fix_notruncv8sfv8si_mask */ |
| 65654 | case 2147: /* avx_fix_notruncv8sfv8si */ |
| 65655 | case 1306: /* avx_movntv4di */ |
| 65656 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) |
| 65657 | { |
| 65658 | return 8; |
| 65659 | } |
| 65660 | else |
| 65661 | { |
| 65662 | return 0; |
| 65663 | } |
| 65664 | |
| 65665 | case 4757: /* avx512vl_compressstorev2di_mask */ |
| 65666 | case 4755: /* avx512vl_compressstorev4si_mask */ |
| 65667 | case 2933: /* avx512f_us_truncatev8div16qi2_mask_store */ |
| 65668 | case 2932: /* avx512f_truncatev8div16qi2_mask_store */ |
| 65669 | case 2931: /* avx512f_ss_truncatev8div16qi2_mask_store */ |
| 65670 | case 2924: /* *avx512f_us_truncatev8div16qi2_store */ |
| 65671 | case 2923: /* *avx512f_truncatev8div16qi2_store */ |
| 65672 | case 2922: /* *avx512f_ss_truncatev8div16qi2_store */ |
| 65673 | case 2918: /* avx512vl_us_truncatev2div2si2_mask_store */ |
| 65674 | case 2917: /* avx512vl_truncatev2div2si2_mask_store */ |
| 65675 | case 2916: /* avx512vl_ss_truncatev2div2si2_mask_store */ |
| 65676 | case 2909: /* *avx512vl_us_truncatev2div2si2_store */ |
| 65677 | case 2908: /* *avx512vl_truncatev2div2si2_store */ |
| 65678 | case 2907: /* *avx512vl_ss_truncatev2div2si2_store */ |
| 65679 | case 2903: /* avx512vl_us_truncatev2div2hi2_mask_store */ |
| 65680 | case 2902: /* avx512vl_truncatev2div2hi2_mask_store */ |
| 65681 | case 2901: /* avx512vl_ss_truncatev2div2hi2_mask_store */ |
| 65682 | case 2894: /* *avx512vl_us_truncatev2div2hi2_store */ |
| 65683 | case 2893: /* *avx512vl_truncatev2div2hi2_store */ |
| 65684 | case 2892: /* *avx512vl_ss_truncatev2div2hi2_store */ |
| 65685 | case 2891: /* avx512vl_us_truncatev4div4hi2_mask_store */ |
| 65686 | case 2890: /* avx512vl_truncatev4div4hi2_mask_store */ |
| 65687 | case 2889: /* avx512vl_ss_truncatev4div4hi2_mask_store */ |
| 65688 | case 2888: /* avx512vl_us_truncatev4siv4hi2_mask_store */ |
| 65689 | case 2887: /* avx512vl_truncatev4siv4hi2_mask_store */ |
| 65690 | case 2886: /* avx512vl_ss_truncatev4siv4hi2_mask_store */ |
| 65691 | case 2873: /* *avx512vl_us_truncatev4div4hi2_store */ |
| 65692 | case 2872: /* *avx512vl_truncatev4div4hi2_store */ |
| 65693 | case 2871: /* *avx512vl_ss_truncatev4div4hi2_store */ |
| 65694 | case 2870: /* *avx512vl_us_truncatev4siv4hi2_store */ |
| 65695 | case 2869: /* *avx512vl_truncatev4siv4hi2_store */ |
| 65696 | case 2868: /* *avx512vl_ss_truncatev4siv4hi2_store */ |
| 65697 | case 2858: /* avx512vl_us_truncatev8siv8qi2_mask_store */ |
| 65698 | case 2857: /* avx512vl_truncatev8siv8qi2_mask_store */ |
| 65699 | case 2856: /* avx512vl_ss_truncatev8siv8qi2_mask_store */ |
| 65700 | case 2855: /* avx512vl_us_truncatev8hiv8qi2_mask_store */ |
| 65701 | case 2854: /* avx512vl_truncatev8hiv8qi2_mask_store */ |
| 65702 | case 2853: /* avx512vl_ss_truncatev8hiv8qi2_mask_store */ |
| 65703 | case 2840: /* *avx512vl_us_truncatev8siv8qi2_store */ |
| 65704 | case 2839: /* *avx512vl_truncatev8siv8qi2_store */ |
| 65705 | case 2838: /* *avx512vl_ss_truncatev8siv8qi2_store */ |
| 65706 | case 2837: /* *avx512vl_us_truncatev8hiv8qi2_store */ |
| 65707 | case 2836: /* *avx512vl_truncatev8hiv8qi2_store */ |
| 65708 | case 2835: /* *avx512vl_ss_truncatev8hiv8qi2_store */ |
| 65709 | case 2834: /* avx512vl_us_truncatev4div4qi2_mask_store */ |
| 65710 | case 2833: /* avx512vl_truncatev4div4qi2_mask_store */ |
| 65711 | case 2832: /* avx512vl_ss_truncatev4div4qi2_mask_store */ |
| 65712 | case 2831: /* avx512vl_us_truncatev4siv4qi2_mask_store */ |
| 65713 | case 2830: /* avx512vl_truncatev4siv4qi2_mask_store */ |
| 65714 | case 2829: /* avx512vl_ss_truncatev4siv4qi2_mask_store */ |
| 65715 | case 2816: /* *avx512vl_us_truncatev4div4qi2_store */ |
| 65716 | case 2815: /* *avx512vl_truncatev4div4qi2_store */ |
| 65717 | case 2814: /* *avx512vl_ss_truncatev4div4qi2_store */ |
| 65718 | case 2813: /* *avx512vl_us_truncatev4siv4qi2_store */ |
| 65719 | case 2812: /* *avx512vl_truncatev4siv4qi2_store */ |
| 65720 | case 2811: /* *avx512vl_ss_truncatev4siv4qi2_store */ |
| 65721 | case 2810: /* avx512vl_us_truncatev2div2qi2_mask_store */ |
| 65722 | case 2809: /* avx512vl_truncatev2div2qi2_mask_store */ |
| 65723 | case 2808: /* avx512vl_ss_truncatev2div2qi2_mask_store */ |
| 65724 | case 2801: /* *avx512vl_us_truncatev2div2qi2_store */ |
| 65725 | case 2800: /* *avx512vl_truncatev2div2qi2_store */ |
| 65726 | case 2799: /* *avx512vl_ss_truncatev2div2qi2_store */ |
| 65727 | case 1292: /* avx512vl_storev8hi_mask */ |
| 65728 | case 1288: /* avx512vl_storev16qi_mask */ |
| 65729 | case 1280: /* avx512vl_storev2di_mask */ |
| 65730 | case 1277: /* avx512vl_storev4si_mask */ |
| 65731 | extract_insn_cached (insn); |
| 65732 | if ((memory_operand (operands[1], SImode)) || (memory_operand (operands[1], DImode))) |
| 65733 | { |
| 65734 | return 11 /* 0xb */; |
| 65735 | } |
| 65736 | else |
| 65737 | { |
| 65738 | return 6; |
| 65739 | } |
| 65740 | |
| 65741 | case 4758: /* avx512vl_compressstorev2df_mask */ |
| 65742 | case 4756: /* avx512vl_compressstorev4sf_mask */ |
| 65743 | case 4754: /* avx512vl_compressstorev4df_mask */ |
| 65744 | case 4753: /* avx512vl_compressstorev4di_mask */ |
| 65745 | case 4752: /* avx512vl_compressstorev8sf_mask */ |
| 65746 | case 4751: /* avx512vl_compressstorev8si_mask */ |
| 65747 | case 4750: /* avx512f_compressstorev8df_mask */ |
| 65748 | case 4749: /* avx512f_compressstorev8di_mask */ |
| 65749 | case 4748: /* avx512f_compressstorev16sf_mask */ |
| 65750 | case 4747: /* avx512f_compressstorev16si_mask */ |
| 65751 | case 1291: /* avx512vl_storev16hi_mask */ |
| 65752 | case 1290: /* avx512bw_storev32hi_mask */ |
| 65753 | case 1289: /* avx512vl_storev32qi_mask */ |
| 65754 | case 1287: /* avx512bw_storev64qi_mask */ |
| 65755 | case 1286: /* avx512vl_storev2df_mask */ |
| 65756 | case 1285: /* avx512vl_storev4df_mask */ |
| 65757 | case 1284: /* avx512f_storev8df_mask */ |
| 65758 | case 1283: /* avx512vl_storev4sf_mask */ |
| 65759 | case 1282: /* avx512vl_storev8sf_mask */ |
| 65760 | case 1281: /* avx512f_storev16sf_mask */ |
| 65761 | case 1279: /* avx512vl_storev4di_mask */ |
| 65762 | case 1278: /* avx512f_storev8di_mask */ |
| 65763 | case 1276: /* avx512vl_storev8si_mask */ |
| 65764 | case 1275: /* avx512f_storev16si_mask */ |
| 65765 | return 6; |
| 65766 | |
| 65767 | case 4770: /* avx512vl_expandv2df_mask */ |
| 65768 | case 4768: /* avx512vl_expandv4sf_mask */ |
| 65769 | case 1250: /* avx512vl_loadv2df_mask */ |
| 65770 | case 1247: /* avx512vl_loadv4sf_mask */ |
| 65771 | extract_constrain_insn_cached (insn); |
| 65772 | if (which_alternative == 0) |
| 65773 | { |
| 65774 | return 1; |
| 65775 | } |
| 65776 | else |
| 65777 | { |
| 65778 | return 6; |
| 65779 | } |
| 65780 | |
| 65781 | case 4765: /* avx512vl_expandv4di_mask */ |
| 65782 | case 4763: /* avx512vl_expandv8si_mask */ |
| 65783 | case 2756: /* avx512f_us_truncatev8div8si2_mask */ |
| 65784 | case 2755: /* avx512f_truncatev8div8si2_mask */ |
| 65785 | case 2754: /* avx512f_ss_truncatev8div8si2_mask */ |
| 65786 | case 2753: /* avx512f_us_truncatev16siv16hi2_mask */ |
| 65787 | case 2752: /* avx512f_truncatev16siv16hi2_mask */ |
| 65788 | case 2751: /* avx512f_ss_truncatev16siv16hi2_mask */ |
| 65789 | case 2744: /* *avx512f_us_truncatev8div8si2 */ |
| 65790 | case 2743: /* *avx512f_truncatev8div8si2 */ |
| 65791 | case 2742: /* *avx512f_ss_truncatev8div8si2 */ |
| 65792 | case 2741: /* *avx512f_us_truncatev16siv16hi2 */ |
| 65793 | case 2740: /* *avx512f_truncatev16siv16hi2 */ |
| 65794 | case 2739: /* *avx512f_ss_truncatev16siv16hi2 */ |
| 65795 | case 1255: /* avx512vl_loadv16hi_mask */ |
| 65796 | case 1253: /* avx512vl_loadv32qi_mask */ |
| 65797 | case 1243: /* avx512vl_loadv4di_mask */ |
| 65798 | case 1240: /* avx512vl_loadv8si_mask */ |
| 65799 | extract_constrain_insn_cached (insn); |
| 65800 | if (which_alternative != 0) |
| 65801 | { |
| 65802 | return 6; |
| 65803 | } |
| 65804 | else |
| 65805 | { |
| 65806 | return 1; |
| 65807 | } |
| 65808 | |
| 65809 | case 4762: /* avx512f_expandv8df_mask */ |
| 65810 | case 4761: /* avx512f_expandv8di_mask */ |
| 65811 | case 4760: /* avx512f_expandv16sf_mask */ |
| 65812 | case 4759: /* avx512f_expandv16si_mask */ |
| 65813 | case 3901: /* sse4_2_pcmpistr */ |
| 65814 | case 3897: /* sse4_2_pcmpestr */ |
| 65815 | case 2765: /* avx512bw_us_truncatev32hiv32qi2_mask */ |
| 65816 | case 2764: /* avx512bw_truncatev32hiv32qi2_mask */ |
| 65817 | case 2763: /* avx512bw_ss_truncatev32hiv32qi2_mask */ |
| 65818 | case 2762: /* avx512bw_us_truncatev32hiv32qi2 */ |
| 65819 | case 2761: /* avx512bw_truncatev32hiv32qi2 */ |
| 65820 | case 2760: /* avx512bw_ss_truncatev32hiv32qi2 */ |
| 65821 | case 1254: /* avx512bw_loadv32hi_mask */ |
| 65822 | case 1251: /* avx512bw_loadv64qi_mask */ |
| 65823 | case 1248: /* avx512f_loadv8df_mask */ |
| 65824 | case 1245: /* avx512f_loadv16sf_mask */ |
| 65825 | case 1242: /* avx512f_loadv8di_mask */ |
| 65826 | case 1239: /* avx512f_loadv16si_mask */ |
| 65827 | extract_constrain_insn_cached (insn); |
| 65828 | if (which_alternative != 0) |
| 65829 | { |
| 65830 | return 6; |
| 65831 | } |
| 65832 | else |
| 65833 | { |
| 65834 | return 1; |
| 65835 | } |
| 65836 | |
| 65837 | case 1051: /* fnstsw */ |
| 65838 | extract_constrain_insn_cached (insn); |
| 65839 | if (which_alternative != 0) |
| 65840 | { |
| 65841 | return 4; |
| 65842 | } |
| 65843 | else |
| 65844 | { |
| 65845 | return 1; |
| 65846 | } |
| 65847 | |
| 65848 | case 4869: /* sha256rnds2 */ |
| 65849 | case 4868: /* sha256msg2 */ |
| 65850 | case 4867: /* sha256msg1 */ |
| 65851 | case 4866: /* sha1rnds4 */ |
| 65852 | case 4865: /* sha1nexte */ |
| 65853 | case 4864: /* sha1msg2 */ |
| 65854 | case 4863: /* sha1msg1 */ |
| 65855 | case 4838: /* avx512bw_dbpsadbwv32hi_mask */ |
| 65856 | case 4837: /* *avx512bw_dbpsadbwv32hi */ |
| 65857 | case 4836: /* avx512bw_dbpsadbwv16hi_mask */ |
| 65858 | case 4835: /* *avx512bw_dbpsadbwv16hi */ |
| 65859 | case 4834: /* avx512bw_dbpsadbwv8hi_mask */ |
| 65860 | case 4833: /* *avx512bw_dbpsadbwv8hi */ |
| 65861 | case 4054: /* pclmulqdq */ |
| 65862 | case 4053: /* aeskeygenassist */ |
| 65863 | case 4052: /* aesimc */ |
| 65864 | case 3801: /* sse4_1_phminposuw */ |
| 65865 | case 3763: /* absv2si2 */ |
| 65866 | case 3762: /* absv4hi2 */ |
| 65867 | case 3761: /* absv8qi2 */ |
| 65868 | case 3760: /* absv8hi2_mask */ |
| 65869 | case 3759: /* absv16hi2_mask */ |
| 65870 | case 3758: /* absv32hi2_mask */ |
| 65871 | case 3757: /* absv32qi2_mask */ |
| 65872 | case 3756: /* absv16qi2_mask */ |
| 65873 | case 3755: /* absv64qi2_mask */ |
| 65874 | case 3754: /* absv2di2_mask */ |
| 65875 | case 3753: /* absv4di2_mask */ |
| 65876 | case 3752: /* absv8di2_mask */ |
| 65877 | case 3751: /* absv4si2_mask */ |
| 65878 | case 3750: /* absv8si2_mask */ |
| 65879 | case 3749: /* absv16si2_mask */ |
| 65880 | case 3748: /* *absv2di2 */ |
| 65881 | case 3747: /* *absv4di2 */ |
| 65882 | case 3746: /* *absv8di2 */ |
| 65883 | case 3745: /* *absv4si2 */ |
| 65884 | case 3744: /* *absv8si2 */ |
| 65885 | case 3743: /* *absv16si2 */ |
| 65886 | case 3742: /* *absv8hi2 */ |
| 65887 | case 3741: /* *absv16hi2 */ |
| 65888 | case 3740: /* *absv32hi2 */ |
| 65889 | case 3739: /* *absv16qi2 */ |
| 65890 | case 3738: /* *absv32qi2 */ |
| 65891 | case 3737: /* *absv64qi2 */ |
| 65892 | case 3729: /* ssse3_psignv2si3 */ |
| 65893 | case 3728: /* ssse3_psignv4hi3 */ |
| 65894 | case 3727: /* ssse3_psignv8qi3 */ |
| 65895 | case 3726: /* ssse3_psignv4si3 */ |
| 65896 | case 3725: /* avx2_psignv8si3 */ |
| 65897 | case 3724: /* ssse3_psignv8hi3 */ |
| 65898 | case 3723: /* avx2_psignv16hi3 */ |
| 65899 | case 3722: /* ssse3_psignv16qi3 */ |
| 65900 | case 3721: /* avx2_psignv32qi3 */ |
| 65901 | case 3720: /* ssse3_pshufbv8qi3 */ |
| 65902 | case 3635: /* *vec_extractv4si_zext */ |
| 65903 | case 3626: /* *vec_extractv8hi_zext */ |
| 65904 | case 3625: /* *vec_extractv8hi_zext */ |
| 65905 | case 3624: /* *vec_extractv16qi_zext */ |
| 65906 | case 3623: /* *vec_extractv16qi_zext */ |
| 65907 | case 3622: /* *vec_extractv8hi */ |
| 65908 | case 3621: /* *vec_extractv16qi */ |
| 65909 | case 3607: /* sse2_pshufd_1_mask */ |
| 65910 | case 3606: /* sse2_pshufd_1 */ |
| 65911 | case 3605: /* avx2_pshufd_1_mask */ |
| 65912 | case 3604: /* avx2_pshufd_1 */ |
| 65913 | case 3603: /* avx512f_pshufd_1_mask */ |
| 65914 | case 3602: /* avx512f_pshufd_1 */ |
| 65915 | case 2734: /* vec_dupv2df_mask */ |
| 65916 | case 2733: /* vec_dupv2df */ |
| 65917 | case 2521: /* vec_extract_hi_v8si */ |
| 65918 | case 2519: /* vec_extract_hi_v8si_mask */ |
| 65919 | case 2517: /* vec_extract_hi_v8si_maskm */ |
| 65920 | case 2515: /* vec_extract_lo_v8si_maskm */ |
| 65921 | case 2512: /* vec_extract_lo_v8si_mask */ |
| 65922 | case 2511: /* vec_extract_lo_v8si */ |
| 65923 | case 2498: /* vec_extract_hi_v16si_mask */ |
| 65924 | case 2497: /* vec_extract_hi_v16si */ |
| 65925 | case 2496: /* vec_extract_hi_v16sf_mask */ |
| 65926 | case 2495: /* vec_extract_hi_v16sf */ |
| 65927 | case 2494: /* vec_extract_hi_v16si_maskm */ |
| 65928 | case 2493: /* vec_extract_hi_v16sf_maskm */ |
| 65929 | case 2492: /* vec_extract_hi_v8di_mask */ |
| 65930 | case 2491: /* vec_extract_hi_v8di */ |
| 65931 | case 2490: /* vec_extract_hi_v8df_mask */ |
| 65932 | case 2489: /* vec_extract_hi_v8df */ |
| 65933 | case 2486: /* vec_extract_lo_v8di_mask */ |
| 65934 | case 2485: /* vec_extract_lo_v8di */ |
| 65935 | case 2484: /* vec_extract_lo_v8df_mask */ |
| 65936 | case 2483: /* vec_extract_lo_v8df */ |
| 65937 | case 2482: /* vec_extract_lo_v8di_maskm */ |
| 65938 | case 2481: /* vec_extract_lo_v8df_maskm */ |
| 65939 | case 2480: /* avx512f_vextracti32x4_1_mask */ |
| 65940 | case 2479: /* *avx512f_vextracti32x4_1 */ |
| 65941 | case 2478: /* avx512f_vextractf32x4_1_mask */ |
| 65942 | case 2477: /* *avx512f_vextractf32x4_1 */ |
| 65943 | case 2476: /* avx512dq_vextracti64x2_1_mask */ |
| 65944 | case 2475: /* *avx512dq_vextracti64x2_1 */ |
| 65945 | case 2474: /* avx512dq_vextractf64x2_1_mask */ |
| 65946 | case 2473: /* *avx512dq_vextractf64x2_1 */ |
| 65947 | case 2458: /* avx512f_vec_dupv8df_1 */ |
| 65948 | case 2457: /* avx512f_vec_dupv16sf_1 */ |
| 65949 | case 2455: /* avx2_vec_dupv4sf */ |
| 65950 | case 1020: /* sse4_2_crc32di */ |
| 65951 | case 1019: /* sse4_2_crc32si */ |
| 65952 | case 1018: /* sse4_2_crc32hi */ |
| 65953 | case 1017: /* sse4_2_crc32qi */ |
| 65954 | extract_insn_cached (insn); |
| 65955 | if ((register_operand (operands[0], V2DImode)) && (get_attr_memory (insn) == MEMORY_NONE)) |
| 65956 | { |
| 65957 | return 2; |
| 65958 | } |
| 65959 | else |
| 65960 | { |
| 65961 | return 0; |
| 65962 | } |
| 65963 | |
| 65964 | case 3890: /* ptesttf2 */ |
| 65965 | case 1620: /* sse3_hsubv4sf3 */ |
| 65966 | case 1619: /* sse3_haddv4sf3 */ |
| 65967 | case 1618: /* avx_hsubv8sf3 */ |
| 65968 | case 1617: /* avx_haddv8sf3 */ |
| 65969 | case 1616: /* *sse3_hsubv2df3_low */ |
| 65970 | case 1615: /* *sse3_haddv2df3_low */ |
| 65971 | case 1614: /* sse3_hsubv2df3 */ |
| 65972 | case 1613: /* *sse3_haddv2df3 */ |
| 65973 | case 1612: /* avx_hsubv4df3 */ |
| 65974 | case 1611: /* avx_haddv4df3 */ |
| 65975 | case 1610: /* sse3_addsubv4sf3 */ |
| 65976 | case 1609: /* avx_addsubv8sf3 */ |
| 65977 | case 1608: /* sse3_addsubv2df3 */ |
| 65978 | case 1607: /* avx_addsubv4df3 */ |
| 65979 | case 1416: /* sse2_vmsubv2df3_round */ |
| 65980 | case 1415: /* sse2_vmsubv2df3 */ |
| 65981 | case 1414: /* sse2_vmaddv2df3_round */ |
| 65982 | case 1413: /* sse2_vmaddv2df3 */ |
| 65983 | case 1412: /* sse_vmsubv4sf3_round */ |
| 65984 | case 1411: /* sse_vmsubv4sf3 */ |
| 65985 | case 1410: /* sse_vmaddv4sf3_round */ |
| 65986 | case 1409: /* sse_vmaddv4sf3 */ |
| 65987 | case 1408: /* *subv2df3_mask_round */ |
| 65988 | case 1407: /* *subv2df3_mask */ |
| 65989 | case 1406: /* *subv2df3_round */ |
| 65990 | case 1405: /* *subv2df3 */ |
| 65991 | case 1404: /* *addv2df3_mask_round */ |
| 65992 | case 1403: /* *addv2df3_mask */ |
| 65993 | case 1402: /* *addv2df3_round */ |
| 65994 | case 1401: /* *addv2df3 */ |
| 65995 | case 1400: /* *subv4df3_mask_round */ |
| 65996 | case 1399: /* *subv4df3_mask */ |
| 65997 | case 1398: /* *subv4df3_round */ |
| 65998 | case 1397: /* *subv4df3 */ |
| 65999 | case 1396: /* *addv4df3_mask_round */ |
| 66000 | case 1395: /* *addv4df3_mask */ |
| 66001 | case 1394: /* *addv4df3_round */ |
| 66002 | case 1393: /* *addv4df3 */ |
| 66003 | case 1384: /* *subv4sf3_mask_round */ |
| 66004 | case 1383: /* *subv4sf3_mask */ |
| 66005 | case 1382: /* *subv4sf3_round */ |
| 66006 | case 1381: /* *subv4sf3 */ |
| 66007 | case 1380: /* *addv4sf3_mask_round */ |
| 66008 | case 1379: /* *addv4sf3_mask */ |
| 66009 | case 1378: /* *addv4sf3_round */ |
| 66010 | case 1377: /* *addv4sf3 */ |
| 66011 | case 1376: /* *subv8sf3_mask_round */ |
| 66012 | case 1375: /* *subv8sf3_mask */ |
| 66013 | case 1374: /* *subv8sf3_round */ |
| 66014 | case 1373: /* *subv8sf3 */ |
| 66015 | case 1372: /* *addv8sf3_mask_round */ |
| 66016 | case 1371: /* *addv8sf3_mask */ |
| 66017 | case 1370: /* *addv8sf3_round */ |
| 66018 | case 1369: /* *addv8sf3 */ |
| 66019 | case 992: /* *ieee_smindf3 */ |
| 66020 | case 991: /* *ieee_smaxdf3 */ |
| 66021 | case 990: /* *ieee_sminsf3 */ |
| 66022 | case 989: /* *ieee_smaxsf3 */ |
| 66023 | case 988: /* smindf3 */ |
| 66024 | case 987: /* smaxdf3 */ |
| 66025 | case 986: /* sminsf3 */ |
| 66026 | case 985: /* smaxsf3 */ |
| 66027 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) |
| 66028 | { |
| 66029 | return 8; |
| 66030 | } |
| 66031 | else if (cached_memory == MEMORY_NONE) |
| 66032 | { |
| 66033 | return 3; |
| 66034 | } |
| 66035 | else |
| 66036 | { |
| 66037 | return 0; |
| 66038 | } |
| 66039 | |
| 66040 | case 980: /* *movxfcc_1 */ |
| 66041 | case 962: /* *rep_stosqi */ |
| 66042 | case 961: /* *rep_stosqi */ |
| 66043 | case 960: /* *rep_stossi */ |
| 66044 | case 959: /* *rep_stossi */ |
| 66045 | case 958: /* *rep_stosdi_rex64 */ |
| 66046 | case 957: /* *rep_stosdi_rex64 */ |
| 66047 | case 956: /* *strsetqi_1 */ |
| 66048 | case 955: /* *strsetqi_1 */ |
| 66049 | case 954: /* *strsethi_1 */ |
| 66050 | case 953: /* *strsethi_1 */ |
| 66051 | case 952: /* *strsetsi_1 */ |
| 66052 | case 951: /* *strsetsi_1 */ |
| 66053 | case 950: /* *strsetdi_rex_1 */ |
| 66054 | case 949: /* *strsetdi_rex_1 */ |
| 66055 | case 948: /* *rep_movqi */ |
| 66056 | case 947: /* *rep_movqi */ |
| 66057 | case 946: /* *rep_movsi */ |
| 66058 | case 945: /* *rep_movsi */ |
| 66059 | case 944: /* *rep_movdi_rex64 */ |
| 66060 | case 943: /* *rep_movdi_rex64 */ |
| 66061 | case 942: /* *strmovqi_1 */ |
| 66062 | case 941: /* *strmovqi_1 */ |
| 66063 | case 940: /* *strmovhi_1 */ |
| 66064 | case 939: /* *strmovhi_1 */ |
| 66065 | case 938: /* *strmovsi_1 */ |
| 66066 | case 937: /* *strmovsi_1 */ |
| 66067 | case 936: /* *strmovdi_rex_1 */ |
| 66068 | case 935: /* *strmovdi_rex_1 */ |
| 66069 | return 7; |
| 66070 | |
| 66071 | case 1501: /* sse2_vmsqrtv2df2_round */ |
| 66072 | case 1500: /* sse2_vmsqrtv2df2 */ |
| 66073 | case 847: /* *sqrtdf2_sse */ |
| 66074 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) |
| 66075 | { |
| 66076 | return 27 /* 0x1b */; |
| 66077 | } |
| 66078 | else if (cached_memory == MEMORY_LOAD) |
| 66079 | { |
| 66080 | return 32 /* 0x20 */; |
| 66081 | } |
| 66082 | else |
| 66083 | { |
| 66084 | return 0; |
| 66085 | } |
| 66086 | |
| 66087 | case 1499: /* sse_vmsqrtv4sf2_round */ |
| 66088 | case 1498: /* sse_vmsqrtv4sf2 */ |
| 66089 | case 846: /* *sqrtsf2_sse */ |
| 66090 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) |
| 66091 | { |
| 66092 | return 16 /* 0x10 */; |
| 66093 | } |
| 66094 | else if (cached_memory == MEMORY_LOAD) |
| 66095 | { |
| 66096 | return 21 /* 0x15 */; |
| 66097 | } |
| 66098 | else |
| 66099 | { |
| 66100 | return 0; |
| 66101 | } |
| 66102 | |
| 66103 | case 3713: /* *ssse3_pmulhrswv4hi3 */ |
| 66104 | case 3712: /* *ssse3_pmulhrswv8hi3_mask */ |
| 66105 | case 3711: /* *ssse3_pmulhrswv8hi3 */ |
| 66106 | case 3710: /* *avx2_pmulhrswv16hi3_mask */ |
| 66107 | case 3709: /* *avx2_pmulhrswv16hi3 */ |
| 66108 | case 3708: /* *avx512bw_pmulhrswv32hi3_mask */ |
| 66109 | case 3707: /* *avx512bw_pmulhrswv32hi3 */ |
| 66110 | case 3704: /* avx512bw_umulhrswv32hi3_mask */ |
| 66111 | case 3703: /* avx512bw_umulhrswv32hi3 */ |
| 66112 | case 3073: /* avx512dq_mulv2di3_mask */ |
| 66113 | case 3072: /* avx512dq_mulv2di3 */ |
| 66114 | case 3071: /* avx512dq_mulv4di3_mask */ |
| 66115 | case 3070: /* avx512dq_mulv4di3 */ |
| 66116 | case 3069: /* avx512dq_mulv8di3_mask */ |
| 66117 | case 3068: /* avx512dq_mulv8di3 */ |
| 66118 | case 3059: /* *sse4_1_mulv2siv2di3_mask */ |
| 66119 | case 3058: /* *sse4_1_mulv2siv2di3 */ |
| 66120 | case 3057: /* *vec_widen_smult_even_v8si_mask */ |
| 66121 | case 3056: /* *vec_widen_smult_even_v8si */ |
| 66122 | case 3055: /* *vec_widen_smult_even_v16si_mask */ |
| 66123 | case 3054: /* *vec_widen_smult_even_v16si */ |
| 66124 | case 3053: /* *vec_widen_umult_even_v4si_mask */ |
| 66125 | case 3052: /* *vec_widen_umult_even_v4si */ |
| 66126 | case 3051: /* *vec_widen_umult_even_v8si_mask */ |
| 66127 | case 3050: /* *vec_widen_umult_even_v8si */ |
| 66128 | case 3049: /* *vec_widen_umult_even_v16si_mask */ |
| 66129 | case 3048: /* *vec_widen_umult_even_v16si */ |
| 66130 | case 3047: /* *umulv8hi3_highpart_mask */ |
| 66131 | case 3046: /* *umulv8hi3_highpart */ |
| 66132 | case 3045: /* *smulv8hi3_highpart_mask */ |
| 66133 | case 3044: /* *smulv8hi3_highpart */ |
| 66134 | case 3043: /* *umulv16hi3_highpart_mask */ |
| 66135 | case 3042: /* *umulv16hi3_highpart */ |
| 66136 | case 3041: /* *smulv16hi3_highpart_mask */ |
| 66137 | case 3040: /* *smulv16hi3_highpart */ |
| 66138 | case 3039: /* *umulv32hi3_highpart_mask */ |
| 66139 | case 3038: /* *umulv32hi3_highpart */ |
| 66140 | case 3037: /* *smulv32hi3_highpart_mask */ |
| 66141 | case 3036: /* *smulv32hi3_highpart */ |
| 66142 | case 3035: /* *mulv8hi3_mask */ |
| 66143 | case 3034: /* *mulv8hi3 */ |
| 66144 | case 3033: /* *mulv16hi3_mask */ |
| 66145 | case 3032: /* *mulv16hi3 */ |
| 66146 | case 3031: /* *mulv32hi3_mask */ |
| 66147 | case 3030: /* *mulv32hi3 */ |
| 66148 | case 2710: /* avx_shufpd256_1_mask */ |
| 66149 | case 2709: /* avx_shufpd256_1 */ |
| 66150 | case 2445: /* avx_shufps256_1_mask */ |
| 66151 | case 2444: /* avx_shufps256_1 */ |
| 66152 | case 1606: /* sse2_vmsminv2df3_round */ |
| 66153 | case 1605: /* sse2_vmsminv2df3 */ |
| 66154 | case 1604: /* sse2_vmsmaxv2df3_round */ |
| 66155 | case 1603: /* sse2_vmsmaxv2df3 */ |
| 66156 | case 1602: /* sse_vmsminv4sf3_round */ |
| 66157 | case 1601: /* sse_vmsminv4sf3 */ |
| 66158 | case 1600: /* sse_vmsmaxv4sf3_round */ |
| 66159 | case 1599: /* sse_vmsmaxv4sf3 */ |
| 66160 | case 1467: /* sse_vmrcpv4sf2 */ |
| 66161 | case 845: /* *rsqrtsf2_sse */ |
| 66162 | case 814: /* *rcpsf2_sse */ |
| 66163 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) |
| 66164 | { |
| 66165 | return 2; |
| 66166 | } |
| 66167 | else if (cached_memory == MEMORY_LOAD) |
| 66168 | { |
| 66169 | return 7; |
| 66170 | } |
| 66171 | else |
| 66172 | { |
| 66173 | return 0; |
| 66174 | } |
| 66175 | |
| 66176 | case 704: /* leave_rex64 */ |
| 66177 | case 703: /* leave */ |
| 66178 | return 3; |
| 66179 | |
| 66180 | case 693: /* simple_return_indirect_internal */ |
| 66181 | case 663: /* *tablejump_1 */ |
| 66182 | case 662: /* *tablejump_1 */ |
| 66183 | case 661: /* *indirect_jump */ |
| 66184 | case 660: /* *indirect_jump */ |
| 66185 | extract_constrain_insn_cached (insn); |
| 66186 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) |
| 66187 | { |
| 66188 | return 4; |
| 66189 | } |
| 66190 | else if ((cached_memory == MEMORY_NONE) || ( |
| 66191 | #line 12442 "/___NETBSD_SRC___/tools/gcc/../../external/gpl3/gcc/dist/gcc/config/i386/i386.md" |
| 66192 | ((cfun->machine->indirect_branch_type |
| 66193 | != indirect_branch_keep)))) |
| 66194 | { |
| 66195 | return 1; |
| 66196 | } |
| 66197 | else |
| 66198 | { |
| 66199 | return 0; |
| 66200 | } |
| 66201 | |
| 66202 | case 1740: /* sse2_ucomi_round */ |
| 66203 | case 1739: /* sse2_ucomi */ |
| 66204 | case 1738: /* sse_ucomi_round */ |
| 66205 | case 1737: /* sse_ucomi */ |
| 66206 | case 1736: /* sse2_comi_round */ |
| 66207 | case 1735: /* sse2_comi */ |
| 66208 | case 1734: /* sse_comi_round */ |
| 66209 | case 1733: /* sse_comi */ |
| 66210 | case 1732: /* avx512f_maskcmpv2df3 */ |
| 66211 | case 1731: /* avx512f_maskcmpv4df3 */ |
| 66212 | case 1729: /* avx512f_maskcmpv4sf3 */ |
| 66213 | case 1728: /* avx512f_maskcmpv8sf3 */ |
| 66214 | case 1726: /* avx512f_vmcmpv2df3_mask_round */ |
| 66215 | case 1725: /* avx512f_vmcmpv2df3_mask */ |
| 66216 | case 1724: /* avx512f_vmcmpv4sf3_mask_round */ |
| 66217 | case 1723: /* avx512f_vmcmpv4sf3_mask */ |
| 66218 | case 1722: /* avx512f_vmcmpv2df3_round */ |
| 66219 | case 1721: /* avx512f_vmcmpv2df3 */ |
| 66220 | case 1720: /* avx512f_vmcmpv4sf3_round */ |
| 66221 | case 1719: /* avx512f_vmcmpv4sf3 */ |
| 66222 | case 1682: /* avx512vl_cmpv2df3_mask */ |
| 66223 | case 1681: /* avx512vl_cmpv2df3 */ |
| 66224 | case 1680: /* avx512vl_cmpv4df3_mask */ |
| 66225 | case 1679: /* avx512vl_cmpv4df3 */ |
| 66226 | case 1674: /* avx512vl_cmpv4sf3_mask */ |
| 66227 | case 1673: /* avx512vl_cmpv4sf3 */ |
| 66228 | case 1672: /* avx512vl_cmpv8sf3_mask */ |
| 66229 | case 1671: /* avx512vl_cmpv8sf3 */ |
| 66230 | case 1650: /* sse2_vmmaskcmpv2df3 */ |
| 66231 | case 1649: /* sse_vmmaskcmpv4sf3 */ |
| 66232 | case 1648: /* sse2_maskcmpv2df3 */ |
| 66233 | case 1647: /* avx_maskcmpv4df3 */ |
| 66234 | case 1646: /* sse_maskcmpv4sf3 */ |
| 66235 | case 1645: /* avx_maskcmpv8sf3 */ |
| 66236 | case 1644: /* *sse2_maskcmpv2df3_comm */ |
| 66237 | case 1643: /* *avx_maskcmpv4df3_comm */ |
| 66238 | case 1642: /* *sse_maskcmpv4sf3_comm */ |
| 66239 | case 1641: /* *avx_maskcmpv8sf3_comm */ |
| 66240 | case 1640: /* avx_vmcmpv2df3 */ |
| 66241 | case 1639: /* avx_vmcmpv4sf3 */ |
| 66242 | case 1638: /* avx_cmpv2df3 */ |
| 66243 | case 1637: /* avx_cmpv4df3 */ |
| 66244 | case 1636: /* avx_cmpv4sf3 */ |
| 66245 | case 1635: /* avx_cmpv8sf3 */ |
| 66246 | case 1424: /* *mulv8sf3_mask_round */ |
| 66247 | case 1423: /* *mulv8sf3_mask */ |
| 66248 | case 1422: /* *mulv8sf3_round */ |
| 66249 | case 1421: /* *mulv8sf3 */ |
| 66250 | case 626: /* setcc_df_sse */ |
| 66251 | case 625: /* setcc_sf_sse */ |
| 66252 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) |
| 66253 | { |
| 66254 | return 7; |
| 66255 | } |
| 66256 | else if (cached_memory == MEMORY_NONE) |
| 66257 | { |
| 66258 | return 2; |
| 66259 | } |
| 66260 | else |
| 66261 | { |
| 66262 | return 0; |
| 66263 | } |
| 66264 | |
| 66265 | case 624: /* *setcc_qi_slp */ |
| 66266 | case 623: /* *setcc_qi */ |
| 66267 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_STORE) |
| 66268 | { |
| 66269 | return 4; |
| 66270 | } |
| 66271 | else if (cached_memory == MEMORY_NONE) |
| 66272 | { |
| 66273 | return 1; |
| 66274 | } |
| 66275 | else |
| 66276 | { |
| 66277 | return 0; |
| 66278 | } |
| 66279 | |
| 66280 | case 546: /* x86_shrd */ |
| 66281 | case 545: /* x86_64_shrd */ |
| 66282 | case 516: /* x86_shld */ |
| 66283 | case 515: /* x86_64_shld */ |
| 66284 | if (get_attr_memory (insn) == MEMORY_NONE) |
| 66285 | { |
| 66286 | return 1; |
| 66287 | } |
| 66288 | else |
| 66289 | { |
| 66290 | return 0; |
| 66291 | } |
| 66292 | |
| 66293 | case 810: /* *tls_dynamic_gnu2_call_64 */ |
| 66294 | case 807: /* *tls_dynamic_gnu2_call_32 */ |
| 66295 | case 685: /* *sibcall_value_pop_memory */ |
| 66296 | case 684: /* *sibcall_value_pop */ |
| 66297 | case 683: /* *call_value_pop */ |
| 66298 | case 682: /* *sibcall_value_memory */ |
| 66299 | case 681: /* *sibcall_value_memory */ |
| 66300 | case 680: /* *sibcall_value */ |
| 66301 | case 679: /* *sibcall_value */ |
| 66302 | case 678: /* *sibcall_value_GOT_32 */ |
| 66303 | case 677: /* *call_value_got_x32 */ |
| 66304 | case 676: /* *call_value */ |
| 66305 | case 675: /* *call_value */ |
| 66306 | case 674: /* *sibcall_pop_memory */ |
| 66307 | case 673: /* *sibcall_pop */ |
| 66308 | case 672: /* *call_pop */ |
| 66309 | case 671: /* *sibcall_memory */ |
| 66310 | case 670: /* *sibcall_memory */ |
| 66311 | case 669: /* *sibcall */ |
| 66312 | case 668: /* *sibcall */ |
| 66313 | case 667: /* *sibcall_GOT_32 */ |
| 66314 | case 666: /* *call_got_x32 */ |
| 66315 | case 665: /* *call */ |
| 66316 | case 664: /* *call */ |
| 66317 | case 495: /* *negextenddfxf2 */ |
| 66318 | case 494: /* *absextenddfxf2 */ |
| 66319 | case 493: /* *negextendsfxf2 */ |
| 66320 | case 492: /* *absextendsfxf2 */ |
| 66321 | case 491: /* *negextendsfdf2 */ |
| 66322 | case 490: /* *absextendsfdf2 */ |
| 66323 | case 489: /* *negxf2_1 */ |
| 66324 | case 488: /* *absxf2_1 */ |
| 66325 | case 487: /* *negdf2_1 */ |
| 66326 | case 486: /* *absdf2_1 */ |
| 66327 | case 485: /* *negsf2_1 */ |
| 66328 | case 484: /* *abssf2_1 */ |
| 66329 | return 2; |
| 66330 | |
| 66331 | case 927: /* fistsi2_ceil_with_temp */ |
| 66332 | case 926: /* fistsi2_floor_with_temp */ |
| 66333 | case 925: /* fisthi2_ceil_with_temp */ |
| 66334 | case 924: /* fisthi2_floor_with_temp */ |
| 66335 | case 923: /* fistsi2_ceil */ |
| 66336 | case 922: /* fistsi2_floor */ |
| 66337 | case 921: /* fisthi2_ceil */ |
| 66338 | case 920: /* fisthi2_floor */ |
| 66339 | case 919: /* fistdi2_ceil_with_temp */ |
| 66340 | case 918: /* fistdi2_floor_with_temp */ |
| 66341 | case 917: /* fistdi2_ceil */ |
| 66342 | case 916: /* fistdi2_floor */ |
| 66343 | case 915: /* *fistdi2_ceil_1 */ |
| 66344 | case 914: /* *fistdi2_floor_1 */ |
| 66345 | case 913: /* *fistsi2_ceil_1 */ |
| 66346 | case 912: /* *fistsi2_floor_1 */ |
| 66347 | case 911: /* *fisthi2_ceil_1 */ |
| 66348 | case 910: /* *fisthi2_floor_1 */ |
| 66349 | case 191: /* fix_truncsi_i387_with_temp */ |
| 66350 | case 190: /* fix_trunchi_i387_with_temp */ |
| 66351 | case 189: /* fix_truncsi_i387 */ |
| 66352 | case 188: /* fix_trunchi_i387 */ |
| 66353 | case 187: /* fix_truncdi_i387_with_temp */ |
| 66354 | case 186: /* fix_truncdi_i387 */ |
| 66355 | case 185: /* *fix_truncdi_i387_1 */ |
| 66356 | case 184: /* *fix_truncsi_i387_1 */ |
| 66357 | case 183: /* *fix_trunchi_i387_1 */ |
| 66358 | case 182: /* fix_truncdi_i387_fisttp_with_temp */ |
| 66359 | case 181: /* fix_truncsi_i387_fisttp_with_temp */ |
| 66360 | case 180: /* fix_trunchi_i387_fisttp_with_temp */ |
| 66361 | case 179: /* fix_truncdi_i387_fisttp */ |
| 66362 | case 178: /* fix_truncsi_i387_fisttp */ |
| 66363 | case 177: /* fix_trunchi_i387_fisttp */ |
| 66364 | case 176: /* fix_truncdi_fisttp_i387_1 */ |
| 66365 | case 175: /* fix_truncsi_fisttp_i387_1 */ |
| 66366 | case 174: /* fix_trunchi_fisttp_i387_1 */ |
| 66367 | return 9; |
| 66368 | |
| 66369 | case 4935: /* storedi_via_fpu */ |
| 66370 | case 4934: /* loaddi_via_fpu */ |
| 66371 | case 841: /* truncxfdf2_i387_noop_unspec */ |
| 66372 | case 840: /* truncxfsf2_i387_noop_unspec */ |
| 66373 | case 206: /* *floatdidf2_i387 */ |
| 66374 | case 205: /* *floatdisf2_i387 */ |
| 66375 | case 204: /* *floatsidf2_i387 */ |
| 66376 | case 203: /* *floatsisf2_i387 */ |
| 66377 | case 195: /* floathidf2 */ |
| 66378 | case 194: /* floathisf2 */ |
| 66379 | case 167: /* *truncxfdf2_i387 */ |
| 66380 | case 166: /* *truncxfsf2_i387 */ |
| 66381 | case 165: /* truncxfdf2_i387_noop */ |
| 66382 | case 164: /* truncxfsf2_i387_noop */ |
| 66383 | case 161: /* *truncdfsf2_i387_1 */ |
| 66384 | case 158: /* *truncdfsf_fast_i387 */ |
| 66385 | if (((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) || (cached_memory == MEMORY_STORE) || (cached_memory == MEMORY_BOTH)) |
| 66386 | { |
| 66387 | return 11 /* 0xb */; |
| 66388 | } |
| 66389 | else |
| 66390 | { |
| 66391 | return 2; |
| 66392 | } |
| 66393 | |
| 66394 | case 202: /* *floatdidf2_mixed */ |
| 66395 | case 201: /* *floatsidf2_mixed */ |
| 66396 | case 200: /* *floatdisf2_mixed */ |
| 66397 | case 199: /* *floatsisf2_mixed */ |
| 66398 | case 163: /* *truncxfdf2_mixed */ |
| 66399 | case 162: /* *truncxfsf2_mixed */ |
| 66400 | case 160: /* *truncdfsf_i387 */ |
| 66401 | case 159: /* *truncdfsf_mixed */ |
| 66402 | case 157: /* *truncdfsf_fast_mixed */ |
| 66403 | extract_constrain_insn_cached (insn); |
| 66404 | if ((which_alternative == 0) && (((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) || (cached_memory == MEMORY_STORE) || (cached_memory == MEMORY_BOTH))) |
| 66405 | { |
| 66406 | return 11 /* 0xb */; |
| 66407 | } |
| 66408 | else if (which_alternative == 0) |
| 66409 | { |
| 66410 | return 2; |
| 66411 | } |
| 66412 | else |
| 66413 | { |
| 66414 | return 0; |
| 66415 | } |
| 66416 | |
| 66417 | case 123: /* *pushsf */ |
| 66418 | case 122: /* *pushsf_rex64 */ |
| 66419 | extract_constrain_insn_cached (insn); |
| 66420 | if (which_alternative == 1) |
| 66421 | { |
| 66422 | return 1; |
| 66423 | } |
| 66424 | else if ((which_alternative != 0) && (((cached_memory = get_attr_memory (insn)) == MEMORY_BOTH) || (cached_memory == MEMORY_STORE))) |
| 66425 | { |
| 66426 | return 4; |
| 66427 | } |
| 66428 | else if (!((1 << which_alternative) & 0x3)) |
| 66429 | { |
| 66430 | return 1; |
| 66431 | } |
| 66432 | else |
| 66433 | { |
| 66434 | return 0; |
| 66435 | } |
| 66436 | |
| 66437 | case 121: /* *pushdf */ |
| 66438 | extract_constrain_insn_cached (insn); |
| 66439 | if (((1 << which_alternative) & 0x1e)) |
| 66440 | { |
| 66441 | return 1; |
| 66442 | } |
| 66443 | else |
| 66444 | { |
| 66445 | return 0; |
| 66446 | } |
| 66447 | |
| 66448 | case 120: /* *pushxf */ |
| 66449 | case 119: /* *pushxf_rounded */ |
| 66450 | case 118: /* *pushxf_rounded */ |
| 66451 | case 117: /* *pushtf */ |
| 66452 | extract_constrain_insn_cached (insn); |
| 66453 | if (which_alternative != 0) |
| 66454 | { |
| 66455 | return 1; |
| 66456 | } |
| 66457 | else |
| 66458 | { |
| 66459 | return 0; |
| 66460 | } |
| 66461 | |
| 66462 | case 96: /* *swaphi */ |
| 66463 | case 95: /* *swapqi */ |
| 66464 | case 94: /* *swapdi */ |
| 66465 | case 93: /* *swapsi */ |
| 66466 | if (((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) || (cached_memory == MEMORY_STORE)) |
| 66467 | { |
| 66468 | return 4; |
| 66469 | } |
| 66470 | else if (cached_memory == MEMORY_NONE) |
| 66471 | { |
| 66472 | return 1; |
| 66473 | } |
| 66474 | else |
| 66475 | { |
| 66476 | return 0; |
| 66477 | } |
| 66478 | |
| 66479 | case 1100: /* *bnd64_stx */ |
| 66480 | case 1099: /* *bnd32_stx */ |
| 66481 | case 1098: /* *bnd64_ldx */ |
| 66482 | case 1097: /* *bnd32_ldx */ |
| 66483 | case 1050: /* fldenv */ |
| 66484 | case 1049: /* fnstenv */ |
| 66485 | case 1048: /* xrstors64 */ |
| 66486 | case 1047: /* xrstor64 */ |
| 66487 | case 1046: /* xrstors_rex64 */ |
| 66488 | case 1045: /* xrstor_rex64 */ |
| 66489 | case 1044: /* xrstors */ |
| 66490 | case 1043: /* xrstor */ |
| 66491 | case 1042: /* xsaves64 */ |
| 66492 | case 1041: /* xsavec64 */ |
| 66493 | case 1040: /* xsaveopt64 */ |
| 66494 | case 1039: /* xsave64 */ |
| 66495 | case 1038: /* xsaves_rex64 */ |
| 66496 | case 1037: /* xsavec_rex64 */ |
| 66497 | case 1036: /* xsaveopt_rex64 */ |
| 66498 | case 1035: /* xsave_rex64 */ |
| 66499 | case 1034: /* xsaves */ |
| 66500 | case 1033: /* xsavec */ |
| 66501 | case 1032: /* xsaveopt */ |
| 66502 | case 1031: /* xsave */ |
| 66503 | case 1030: /* fxrstor64 */ |
| 66504 | case 1029: /* fxrstor */ |
| 66505 | case 1028: /* fxsave64 */ |
| 66506 | case 1027: /* fxsave */ |
| 66507 | case 805: /* *add_tp_di */ |
| 66508 | case 804: /* *add_tp_si */ |
| 66509 | case 803: /* *add_tp_x32_zext */ |
| 66510 | case 802: /* *add_tp_x32 */ |
| 66511 | case 801: /* *load_tp_di */ |
| 66512 | case 800: /* *load_tp_si */ |
| 66513 | case 799: /* *load_tp_x32_zext */ |
| 66514 | case 798: /* *load_tp_x32 */ |
| 66515 | case 92: /* *movabsdi_2 */ |
| 66516 | case 91: /* *movabssi_2 */ |
| 66517 | case 90: /* *movabshi_2 */ |
| 66518 | case 89: /* *movabsqi_2 */ |
| 66519 | case 88: /* *movabsdi_1 */ |
| 66520 | case 87: /* *movabssi_1 */ |
| 66521 | case 86: /* *movabshi_1 */ |
| 66522 | case 85: /* *movabsqi_1 */ |
| 66523 | return 4; |
| 66524 | |
| 66525 | case 1000: /* probe_stack_di */ |
| 66526 | case 999: /* probe_stack_si */ |
| 66527 | case 732: /* tzcnt_hi */ |
| 66528 | case 730: /* *tzcnt_di_falsedep */ |
| 66529 | case 728: /* *tzcnt_si_falsedep */ |
| 66530 | case 726: /* tzcnt_di */ |
| 66531 | case 724: /* tzcnt_si */ |
| 66532 | case 719: /* *bsrhi */ |
| 66533 | case 718: /* bsr */ |
| 66534 | case 717: /* bsr_rex64 */ |
| 66535 | case 716: /* *ctzdi2_falsedep */ |
| 66536 | case 715: /* *ctzsi2_falsedep */ |
| 66537 | case 714: /* ctzdi2 */ |
| 66538 | case 713: /* ctzsi2 */ |
| 66539 | case 613: /* *btdi */ |
| 66540 | case 612: /* *btsi */ |
| 66541 | case 611: /* *btcq */ |
| 66542 | case 610: /* *btrq */ |
| 66543 | case 609: /* *btsq */ |
| 66544 | case 608: /* *rotrqi3_1_slp */ |
| 66545 | case 607: /* *rotlqi3_1_slp */ |
| 66546 | case 567: /* *ashrqi3_1_slp */ |
| 66547 | case 566: /* *lshrqi3_1_slp */ |
| 66548 | case 512: /* *one_cmplsi2_2_zext */ |
| 66549 | case 511: /* *one_cmpldi2_2 */ |
| 66550 | case 510: /* *one_cmplsi2_2 */ |
| 66551 | case 509: /* *one_cmplhi2_2 */ |
| 66552 | case 508: /* *one_cmplqi2_2 */ |
| 66553 | case 507: /* *one_cmplqi2_1 */ |
| 66554 | case 506: /* *one_cmplsi2_1_zext */ |
| 66555 | case 505: /* *one_cmpldi2_1 */ |
| 66556 | case 504: /* *one_cmplsi2_1 */ |
| 66557 | case 503: /* *one_cmplhi2_1 */ |
| 66558 | case 479: /* *negvdi3 */ |
| 66559 | case 478: /* *negvsi3 */ |
| 66560 | case 477: /* *negvhi3 */ |
| 66561 | case 476: /* *negvqi3 */ |
| 66562 | case 475: /* *negsi2_cmpz_zext */ |
| 66563 | case 474: /* *negdi2_cmpz */ |
| 66564 | case 473: /* *negsi2_cmpz */ |
| 66565 | case 472: /* *neghi2_cmpz */ |
| 66566 | case 471: /* *negqi2_cmpz */ |
| 66567 | case 470: /* *negsi2_1_zext */ |
| 66568 | case 469: /* *negdi2_1 */ |
| 66569 | case 468: /* *negsi2_1 */ |
| 66570 | case 467: /* *neghi2_1 */ |
| 66571 | case 466: /* *negqi2_1 */ |
| 66572 | case 450: /* *xorqi_2_slp */ |
| 66573 | case 449: /* *iorqi_2_slp */ |
| 66574 | case 436: /* *xorqi_1_slp */ |
| 66575 | case 435: /* *iorqi_1_slp */ |
| 66576 | case 410: /* *andqi_2_slp */ |
| 66577 | case 403: /* *andqi_1_slp */ |
| 66578 | case 276: /* *subqi_1_slp */ |
| 66579 | case 138: /* zero_extendqihi2_and */ |
| 66580 | case 135: /* zero_extendhisi2_and */ |
| 66581 | case 134: /* zero_extendqisi2_and */ |
| 66582 | case 100: /* *movstricthi_xor */ |
| 66583 | case 99: /* *movstrictqi_xor */ |
| 66584 | case 77: /* *movdi_or */ |
| 66585 | case 76: /* *movsi_or */ |
| 66586 | case 75: /* *movdi_xor */ |
| 66587 | case 74: /* *movsi_xor */ |
| 66588 | if (((cached_memory = get_attr_memory (insn)) == MEMORY_BOTH) || (cached_memory == MEMORY_STORE)) |
| 66589 | { |
| 66590 | return 4; |
| 66591 | } |
| 66592 | else if (cached_memory == MEMORY_NONE) |
| 66593 | { |
| 66594 | return 1; |
| 66595 | } |
| 66596 | else |
| 66597 | { |
| 66598 | return 0; |
| 66599 | } |
| 66600 | |
| 66601 | case 73: /* *popfldi1 */ |
| 66602 | case 72: /* *popflsi1 */ |
| 66603 | case 69: /* *popdi1_epilogue */ |
| 66604 | case 68: /* *popsi1_epilogue */ |
| 66605 | case 67: /* *popdi1 */ |
| 66606 | case 66: /* *popsi1 */ |
| 66607 | if (get_attr_memory (insn) == MEMORY_LOAD) |
| 66608 | { |
| 66609 | return 4; |
| 66610 | } |
| 66611 | else |
| 66612 | { |
| 66613 | return 1; |
| 66614 | } |
| 66615 | |
| 66616 | case 57: /* *pushdi2_rex64 */ |
| 66617 | extract_constrain_insn_cached (insn); |
| 66618 | if (which_alternative == 0) |
| 66619 | { |
| 66620 | return 1; |
| 66621 | } |
| 66622 | else if (((cached_memory = get_attr_memory (insn)) == MEMORY_BOTH) || (cached_memory == MEMORY_STORE)) |
| 66623 | { |
| 66624 | return 4; |
| 66625 | } |
| 66626 | else |
| 66627 | { |
| 66628 | return 1; |
| 66629 | } |
| 66630 | |
| 66631 | case 54: /* *cmpiuxf_i387 */ |
| 66632 | case 53: /* *cmpixf_i387 */ |
| 66633 | if (get_attr_memory (insn) == MEMORY_LOAD) |
| 66634 | { |
| 66635 | return 7; |
| 66636 | } |
| 66637 | else |
| 66638 | { |
| 66639 | return 2; |
| 66640 | } |
| 66641 | |
| 66642 | case 4984: /* atomic_bit_test_and_resetdi_1 */ |
| 66643 | case 4983: /* atomic_bit_test_and_resetsi_1 */ |
| 66644 | case 4982: /* atomic_bit_test_and_resethi_1 */ |
| 66645 | case 4981: /* atomic_bit_test_and_complementdi_1 */ |
| 66646 | case 4980: /* atomic_bit_test_and_complementsi_1 */ |
| 66647 | case 4979: /* atomic_bit_test_and_complementhi_1 */ |
| 66648 | case 4978: /* atomic_bit_test_and_setdi_1 */ |
| 66649 | case 4977: /* atomic_bit_test_and_setsi_1 */ |
| 66650 | case 4976: /* atomic_bit_test_and_sethi_1 */ |
| 66651 | case 4975: /* atomic_xordi */ |
| 66652 | case 4974: /* atomic_ordi */ |
| 66653 | case 4973: /* atomic_anddi */ |
| 66654 | case 4972: /* atomic_xorsi */ |
| 66655 | case 4971: /* atomic_orsi */ |
| 66656 | case 4970: /* atomic_andsi */ |
| 66657 | case 4969: /* atomic_xorhi */ |
| 66658 | case 4968: /* atomic_orhi */ |
| 66659 | case 4967: /* atomic_andhi */ |
| 66660 | case 4966: /* atomic_xorqi */ |
| 66661 | case 4965: /* atomic_orqi */ |
| 66662 | case 4964: /* atomic_andqi */ |
| 66663 | case 4963: /* atomic_subdi */ |
| 66664 | case 4962: /* atomic_subsi */ |
| 66665 | case 4961: /* atomic_subhi */ |
| 66666 | case 4960: /* atomic_subqi */ |
| 66667 | case 4959: /* atomic_adddi */ |
| 66668 | case 4958: /* atomic_addsi */ |
| 66669 | case 4957: /* atomic_addhi */ |
| 66670 | case 4956: /* atomic_addqi */ |
| 66671 | case 4955: /* atomic_exchangedi */ |
| 66672 | case 4954: /* atomic_exchangesi */ |
| 66673 | case 4953: /* atomic_exchangehi */ |
| 66674 | case 4952: /* atomic_exchangeqi */ |
| 66675 | case 4951: /* *atomic_fetch_add_cmpdi */ |
| 66676 | case 4950: /* *atomic_fetch_add_cmpsi */ |
| 66677 | case 4949: /* *atomic_fetch_add_cmphi */ |
| 66678 | case 4948: /* *atomic_fetch_add_cmpqi */ |
| 66679 | case 4947: /* atomic_fetch_adddi */ |
| 66680 | case 4946: /* atomic_fetch_addsi */ |
| 66681 | case 4945: /* atomic_fetch_addhi */ |
| 66682 | case 4944: /* atomic_fetch_addqi */ |
| 66683 | case 4943: /* atomic_compare_and_swapdi_1 */ |
| 66684 | case 4942: /* atomic_compare_and_swapsi_1 */ |
| 66685 | case 4941: /* atomic_compare_and_swaphi_1 */ |
| 66686 | case 4940: /* atomic_compare_and_swapqi_1 */ |
| 66687 | case 4939: /* atomic_compare_and_swapti_doubleword */ |
| 66688 | case 4938: /* atomic_compare_and_swapdi_doubleword */ |
| 66689 | case 4933: /* atomic_storedi_fpu */ |
| 66690 | case 4932: /* atomic_storedi_1 */ |
| 66691 | case 4931: /* atomic_storesi_1 */ |
| 66692 | case 4930: /* atomic_storehi_1 */ |
| 66693 | case 4929: /* atomic_storeqi_1 */ |
| 66694 | case 4928: /* atomic_loaddi_fpu */ |
| 66695 | case 4927: /* mfence_nosse */ |
| 66696 | case 4923: /* vpopcountv8di_mask */ |
| 66697 | case 4922: /* vpopcountv8di */ |
| 66698 | case 4921: /* vpopcountv16si_mask */ |
| 66699 | case 4920: /* vpopcountv16si */ |
| 66700 | case 4901: /* *movv64si_internal */ |
| 66701 | case 4900: /* *movv64sf_internal */ |
| 66702 | case 4875: /* avx512f_pd512_256pd */ |
| 66703 | case 4874: /* avx512f_ps512_256ps */ |
| 66704 | case 4873: /* avx512f_si512_256si */ |
| 66705 | case 4872: /* avx512f_pd512_pd */ |
| 66706 | case 4871: /* avx512f_ps512_ps */ |
| 66707 | case 4870: /* avx512f_si512_si */ |
| 66708 | case 4832: /* avx512f_vgetmantv2df_round */ |
| 66709 | case 4831: /* avx512f_vgetmantv2df */ |
| 66710 | case 4830: /* avx512f_vgetmantv4sf_round */ |
| 66711 | case 4829: /* avx512f_vgetmantv4sf */ |
| 66712 | case 4828: /* avx512vl_getmantv2df_mask_round */ |
| 66713 | case 4827: /* avx512vl_getmantv2df_mask */ |
| 66714 | case 4826: /* avx512vl_getmantv2df_round */ |
| 66715 | case 4825: /* avx512vl_getmantv2df */ |
| 66716 | case 4824: /* avx512vl_getmantv4df_mask_round */ |
| 66717 | case 4823: /* avx512vl_getmantv4df_mask */ |
| 66718 | case 4822: /* avx512vl_getmantv4df_round */ |
| 66719 | case 4821: /* avx512vl_getmantv4df */ |
| 66720 | case 4820: /* avx512f_getmantv8df_mask_round */ |
| 66721 | case 4819: /* avx512f_getmantv8df_mask */ |
| 66722 | case 4818: /* avx512f_getmantv8df_round */ |
| 66723 | case 4817: /* avx512f_getmantv8df */ |
| 66724 | case 4816: /* avx512vl_getmantv4sf_mask_round */ |
| 66725 | case 4815: /* avx512vl_getmantv4sf_mask */ |
| 66726 | case 4814: /* avx512vl_getmantv4sf_round */ |
| 66727 | case 4813: /* avx512vl_getmantv4sf */ |
| 66728 | case 4812: /* avx512vl_getmantv8sf_mask_round */ |
| 66729 | case 4811: /* avx512vl_getmantv8sf_mask */ |
| 66730 | case 4810: /* avx512vl_getmantv8sf_round */ |
| 66731 | case 4809: /* avx512vl_getmantv8sf */ |
| 66732 | case 4808: /* avx512f_getmantv16sf_mask_round */ |
| 66733 | case 4807: /* avx512f_getmantv16sf_mask */ |
| 66734 | case 4806: /* avx512f_getmantv16sf_round */ |
| 66735 | case 4805: /* avx512f_getmantv16sf */ |
| 66736 | case 4435: /* avx_pd256_pd */ |
| 66737 | case 4434: /* avx_ps256_ps */ |
| 66738 | case 4433: /* avx_si256_si */ |
| 66739 | case 4252: /* *avx_vperm_broadcast_v4df */ |
| 66740 | case 4251: /* *avx_vperm_broadcast_v8sf */ |
| 66741 | case 3677: /* sse3_monitor_di */ |
| 66742 | case 3676: /* sse3_monitor_si */ |
| 66743 | case 3675: /* sse3_mwait */ |
| 66744 | case 3637: /* *vec_extractv4si_zext_mem */ |
| 66745 | case 3636: /* *vec_extractv4si_mem */ |
| 66746 | case 3633: /* *vec_extractv4si_0_zext */ |
| 66747 | case 3632: /* *vec_extractv4si_0_zext_sse4 */ |
| 66748 | case 3631: /* *vec_extractv2di_0_sse */ |
| 66749 | case 3630: /* *vec_extractv2di_0 */ |
| 66750 | case 3629: /* *vec_extractv4si_0 */ |
| 66751 | case 3628: /* *vec_extractv8hi_mem */ |
| 66752 | case 3627: /* *vec_extractv16qi_mem */ |
| 66753 | case 3503: /* avx512vl_testnmv2di3_mask */ |
| 66754 | case 3502: /* avx512vl_testnmv2di3 */ |
| 66755 | case 3501: /* avx512vl_testnmv4di3_mask */ |
| 66756 | case 3500: /* avx512vl_testnmv4di3 */ |
| 66757 | case 3499: /* avx512f_testnmv8di3_mask */ |
| 66758 | case 3498: /* avx512f_testnmv8di3 */ |
| 66759 | case 3497: /* avx512vl_testnmv4si3_mask */ |
| 66760 | case 3496: /* avx512vl_testnmv4si3 */ |
| 66761 | case 3495: /* avx512vl_testnmv8si3_mask */ |
| 66762 | case 3494: /* avx512vl_testnmv8si3 */ |
| 66763 | case 3493: /* avx512f_testnmv16si3_mask */ |
| 66764 | case 3492: /* avx512f_testnmv16si3 */ |
| 66765 | case 3491: /* avx512vl_testnmv8hi3_mask */ |
| 66766 | case 3490: /* avx512vl_testnmv8hi3 */ |
| 66767 | case 3489: /* avx512vl_testnmv16hi3_mask */ |
| 66768 | case 3488: /* avx512vl_testnmv16hi3 */ |
| 66769 | case 3487: /* avx512bw_testnmv32hi3_mask */ |
| 66770 | case 3486: /* avx512bw_testnmv32hi3 */ |
| 66771 | case 3485: /* avx512vl_testnmv32qi3_mask */ |
| 66772 | case 3484: /* avx512vl_testnmv32qi3 */ |
| 66773 | case 3483: /* avx512vl_testnmv16qi3_mask */ |
| 66774 | case 3482: /* avx512vl_testnmv16qi3 */ |
| 66775 | case 3481: /* avx512bw_testnmv64qi3_mask */ |
| 66776 | case 3480: /* avx512bw_testnmv64qi3 */ |
| 66777 | case 3479: /* avx512vl_testmv2di3_mask */ |
| 66778 | case 3478: /* avx512vl_testmv2di3 */ |
| 66779 | case 3477: /* avx512vl_testmv4di3_mask */ |
| 66780 | case 3476: /* avx512vl_testmv4di3 */ |
| 66781 | case 3475: /* avx512f_testmv8di3_mask */ |
| 66782 | case 3474: /* avx512f_testmv8di3 */ |
| 66783 | case 3473: /* avx512vl_testmv4si3_mask */ |
| 66784 | case 3472: /* avx512vl_testmv4si3 */ |
| 66785 | case 3471: /* avx512vl_testmv8si3_mask */ |
| 66786 | case 3470: /* avx512vl_testmv8si3 */ |
| 66787 | case 3469: /* avx512f_testmv16si3_mask */ |
| 66788 | case 3468: /* avx512f_testmv16si3 */ |
| 66789 | case 3467: /* avx512vl_testmv8hi3_mask */ |
| 66790 | case 3466: /* avx512vl_testmv8hi3 */ |
| 66791 | case 3465: /* avx512vl_testmv16hi3_mask */ |
| 66792 | case 3464: /* avx512vl_testmv16hi3 */ |
| 66793 | case 3463: /* avx512bw_testmv32hi3_mask */ |
| 66794 | case 3462: /* avx512bw_testmv32hi3 */ |
| 66795 | case 3461: /* avx512vl_testmv32qi3_mask */ |
| 66796 | case 3460: /* avx512vl_testmv32qi3 */ |
| 66797 | case 3459: /* avx512vl_testmv16qi3_mask */ |
| 66798 | case 3458: /* avx512vl_testmv16qi3 */ |
| 66799 | case 3457: /* avx512bw_testmv64qi3_mask */ |
| 66800 | case 3456: /* avx512bw_testmv64qi3 */ |
| 66801 | case 3191: /* avx512vl_rorv2di_mask */ |
| 66802 | case 3190: /* avx512vl_rorv2di */ |
| 66803 | case 3189: /* avx512vl_rolv2di_mask */ |
| 66804 | case 3188: /* avx512vl_rolv2di */ |
| 66805 | case 3187: /* avx512vl_rorv4di_mask */ |
| 66806 | case 3186: /* avx512vl_rorv4di */ |
| 66807 | case 3185: /* avx512vl_rolv4di_mask */ |
| 66808 | case 3184: /* avx512vl_rolv4di */ |
| 66809 | case 3183: /* avx512f_rorv8di_mask */ |
| 66810 | case 3182: /* avx512f_rorv8di */ |
| 66811 | case 3181: /* avx512f_rolv8di_mask */ |
| 66812 | case 3180: /* avx512f_rolv8di */ |
| 66813 | case 3179: /* avx512vl_rorv4si_mask */ |
| 66814 | case 3178: /* avx512vl_rorv4si */ |
| 66815 | case 3177: /* avx512vl_rolv4si_mask */ |
| 66816 | case 3176: /* avx512vl_rolv4si */ |
| 66817 | case 3175: /* avx512vl_rorv8si_mask */ |
| 66818 | case 3174: /* avx512vl_rorv8si */ |
| 66819 | case 3173: /* avx512vl_rolv8si_mask */ |
| 66820 | case 3172: /* avx512vl_rolv8si */ |
| 66821 | case 3171: /* avx512f_rorv16si_mask */ |
| 66822 | case 3170: /* avx512f_rorv16si */ |
| 66823 | case 3169: /* avx512f_rolv16si_mask */ |
| 66824 | case 3168: /* avx512f_rolv16si */ |
| 66825 | case 3167: /* avx512vl_rorvv2di_mask */ |
| 66826 | case 3166: /* avx512vl_rorvv2di */ |
| 66827 | case 3165: /* avx512vl_rolvv2di_mask */ |
| 66828 | case 3164: /* avx512vl_rolvv2di */ |
| 66829 | case 3163: /* avx512vl_rorvv4di_mask */ |
| 66830 | case 3162: /* avx512vl_rorvv4di */ |
| 66831 | case 3161: /* avx512vl_rolvv4di_mask */ |
| 66832 | case 3160: /* avx512vl_rolvv4di */ |
| 66833 | case 3159: /* avx512f_rorvv8di_mask */ |
| 66834 | case 3158: /* avx512f_rorvv8di */ |
| 66835 | case 3157: /* avx512f_rolvv8di_mask */ |
| 66836 | case 3156: /* avx512f_rolvv8di */ |
| 66837 | case 3155: /* avx512vl_rorvv4si_mask */ |
| 66838 | case 3154: /* avx512vl_rorvv4si */ |
| 66839 | case 3153: /* avx512vl_rolvv4si_mask */ |
| 66840 | case 3152: /* avx512vl_rolvv4si */ |
| 66841 | case 3151: /* avx512vl_rorvv8si_mask */ |
| 66842 | case 3150: /* avx512vl_rorvv8si */ |
| 66843 | case 3149: /* avx512vl_rolvv8si_mask */ |
| 66844 | case 3148: /* avx512vl_rolvv8si */ |
| 66845 | case 3147: /* avx512f_rorvv16si_mask */ |
| 66846 | case 3146: /* avx512f_rorvv16si */ |
| 66847 | case 3145: /* avx512f_rolvv16si_mask */ |
| 66848 | case 3144: /* avx512f_rolvv16si */ |
| 66849 | case 2704: /* avx512f_rndscalev2df_round */ |
| 66850 | case 2703: /* avx512f_rndscalev2df */ |
| 66851 | case 2702: /* avx512f_rndscalev4sf_round */ |
| 66852 | case 2701: /* avx512f_rndscalev4sf */ |
| 66853 | case 2700: /* avx512vl_rndscalev2df_mask_round */ |
| 66854 | case 2699: /* avx512vl_rndscalev2df_mask */ |
| 66855 | case 2698: /* avx512vl_rndscalev2df_round */ |
| 66856 | case 2697: /* avx512vl_rndscalev2df */ |
| 66857 | case 2696: /* avx512vl_rndscalev4df_mask_round */ |
| 66858 | case 2695: /* avx512vl_rndscalev4df_mask */ |
| 66859 | case 2694: /* avx512vl_rndscalev4df_round */ |
| 66860 | case 2693: /* avx512vl_rndscalev4df */ |
| 66861 | case 2692: /* avx512f_rndscalev8df_mask_round */ |
| 66862 | case 2691: /* avx512f_rndscalev8df_mask */ |
| 66863 | case 2690: /* avx512f_rndscalev8df_round */ |
| 66864 | case 2689: /* avx512f_rndscalev8df */ |
| 66865 | case 2688: /* avx512vl_rndscalev4sf_mask_round */ |
| 66866 | case 2687: /* avx512vl_rndscalev4sf_mask */ |
| 66867 | case 2686: /* avx512vl_rndscalev4sf_round */ |
| 66868 | case 2685: /* avx512vl_rndscalev4sf */ |
| 66869 | case 2684: /* avx512vl_rndscalev8sf_mask_round */ |
| 66870 | case 2683: /* avx512vl_rndscalev8sf_mask */ |
| 66871 | case 2682: /* avx512vl_rndscalev8sf_round */ |
| 66872 | case 2681: /* avx512vl_rndscalev8sf */ |
| 66873 | case 2680: /* avx512f_rndscalev16sf_mask_round */ |
| 66874 | case 2679: /* avx512f_rndscalev16sf_mask */ |
| 66875 | case 2678: /* avx512f_rndscalev16sf_round */ |
| 66876 | case 2677: /* avx512f_rndscalev16sf */ |
| 66877 | case 2676: /* avx512f_sfixupimmv2df_mask_round */ |
| 66878 | case 2675: /* avx512f_sfixupimmv2df_mask */ |
| 66879 | case 2674: /* avx512f_sfixupimmv4sf_mask_round */ |
| 66880 | case 2673: /* avx512f_sfixupimmv4sf_mask */ |
| 66881 | case 2672: /* avx512f_sfixupimmv2df_maskz_1_round */ |
| 66882 | case 2671: /* avx512f_sfixupimmv2df_maskz_1 */ |
| 66883 | case 2670: /* avx512f_sfixupimmv2df_round */ |
| 66884 | case 2669: /* avx512f_sfixupimmv2df */ |
| 66885 | case 2668: /* avx512f_sfixupimmv4sf_maskz_1_round */ |
| 66886 | case 2667: /* avx512f_sfixupimmv4sf_maskz_1 */ |
| 66887 | case 2666: /* avx512f_sfixupimmv4sf_round */ |
| 66888 | case 2665: /* avx512f_sfixupimmv4sf */ |
| 66889 | case 2664: /* avx512vl_fixupimmv2df_mask_round */ |
| 66890 | case 2663: /* avx512vl_fixupimmv2df_mask */ |
| 66891 | case 2662: /* avx512vl_fixupimmv4df_mask_round */ |
| 66892 | case 2661: /* avx512vl_fixupimmv4df_mask */ |
| 66893 | case 2660: /* avx512f_fixupimmv8df_mask_round */ |
| 66894 | case 2659: /* avx512f_fixupimmv8df_mask */ |
| 66895 | case 2658: /* avx512vl_fixupimmv4sf_mask_round */ |
| 66896 | case 2657: /* avx512vl_fixupimmv4sf_mask */ |
| 66897 | case 2656: /* avx512vl_fixupimmv8sf_mask_round */ |
| 66898 | case 2655: /* avx512vl_fixupimmv8sf_mask */ |
| 66899 | case 2654: /* avx512f_fixupimmv16sf_mask_round */ |
| 66900 | case 2653: /* avx512f_fixupimmv16sf_mask */ |
| 66901 | case 2652: /* avx512vl_fixupimmv2df_maskz_1_round */ |
| 66902 | case 2651: /* avx512vl_fixupimmv2df_maskz_1 */ |
| 66903 | case 2650: /* avx512vl_fixupimmv2df_round */ |
| 66904 | case 2649: /* avx512vl_fixupimmv2df */ |
| 66905 | case 2648: /* avx512vl_fixupimmv4df_maskz_1_round */ |
| 66906 | case 2647: /* avx512vl_fixupimmv4df_maskz_1 */ |
| 66907 | case 2646: /* avx512vl_fixupimmv4df_round */ |
| 66908 | case 2645: /* avx512vl_fixupimmv4df */ |
| 66909 | case 2644: /* avx512f_fixupimmv8df_maskz_1_round */ |
| 66910 | case 2643: /* avx512f_fixupimmv8df_maskz_1 */ |
| 66911 | case 2642: /* avx512f_fixupimmv8df_round */ |
| 66912 | case 2641: /* avx512f_fixupimmv8df */ |
| 66913 | case 2640: /* avx512vl_fixupimmv4sf_maskz_1_round */ |
| 66914 | case 2639: /* avx512vl_fixupimmv4sf_maskz_1 */ |
| 66915 | case 2638: /* avx512vl_fixupimmv4sf_round */ |
| 66916 | case 2637: /* avx512vl_fixupimmv4sf */ |
| 66917 | case 2636: /* avx512vl_fixupimmv8sf_maskz_1_round */ |
| 66918 | case 2635: /* avx512vl_fixupimmv8sf_maskz_1 */ |
| 66919 | case 2634: /* avx512vl_fixupimmv8sf_round */ |
| 66920 | case 2633: /* avx512vl_fixupimmv8sf */ |
| 66921 | case 2632: /* avx512f_fixupimmv16sf_maskz_1_round */ |
| 66922 | case 2631: /* avx512f_fixupimmv16sf_maskz_1 */ |
| 66923 | case 2630: /* avx512f_fixupimmv16sf_round */ |
| 66924 | case 2629: /* avx512f_fixupimmv16sf */ |
| 66925 | case 2628: /* avx512vl_alignv2di_mask */ |
| 66926 | case 2627: /* *avx512vl_alignv2di */ |
| 66927 | case 2626: /* avx512vl_alignv4di_mask */ |
| 66928 | case 2625: /* *avx512vl_alignv4di */ |
| 66929 | case 2624: /* avx512f_alignv8di_mask */ |
| 66930 | case 2623: /* *avx512f_alignv8di */ |
| 66931 | case 2622: /* avx512vl_alignv4si_mask */ |
| 66932 | case 2621: /* *avx512vl_alignv4si */ |
| 66933 | case 2620: /* avx512vl_alignv8si_mask */ |
| 66934 | case 2619: /* *avx512vl_alignv8si */ |
| 66935 | case 2618: /* avx512f_alignv16si_mask */ |
| 66936 | case 2617: /* *avx512f_alignv16si */ |
| 66937 | case 2616: /* avx512f_sgetexpv2df_round */ |
| 66938 | case 2615: /* avx512f_sgetexpv2df */ |
| 66939 | case 2614: /* avx512f_sgetexpv4sf_round */ |
| 66940 | case 2613: /* avx512f_sgetexpv4sf */ |
| 66941 | case 2612: /* avx512vl_getexpv2df_mask_round */ |
| 66942 | case 2611: /* avx512vl_getexpv2df_mask */ |
| 66943 | case 2610: /* avx512vl_getexpv2df_round */ |
| 66944 | case 2609: /* avx512vl_getexpv2df */ |
| 66945 | case 2608: /* avx512vl_getexpv4df_mask_round */ |
| 66946 | case 2607: /* avx512vl_getexpv4df_mask */ |
| 66947 | case 2606: /* avx512vl_getexpv4df_round */ |
| 66948 | case 2605: /* avx512vl_getexpv4df */ |
| 66949 | case 2604: /* avx512f_getexpv8df_mask_round */ |
| 66950 | case 2603: /* avx512f_getexpv8df_mask */ |
| 66951 | case 2602: /* avx512f_getexpv8df_round */ |
| 66952 | case 2601: /* avx512f_getexpv8df */ |
| 66953 | case 2600: /* avx512vl_getexpv4sf_mask_round */ |
| 66954 | case 2599: /* avx512vl_getexpv4sf_mask */ |
| 66955 | case 2598: /* avx512vl_getexpv4sf_round */ |
| 66956 | case 2597: /* avx512vl_getexpv4sf */ |
| 66957 | case 2596: /* avx512vl_getexpv8sf_mask_round */ |
| 66958 | case 2595: /* avx512vl_getexpv8sf_mask */ |
| 66959 | case 2594: /* avx512vl_getexpv8sf_round */ |
| 66960 | case 2593: /* avx512vl_getexpv8sf */ |
| 66961 | case 2592: /* avx512f_getexpv16sf_mask_round */ |
| 66962 | case 2591: /* avx512f_getexpv16sf_mask */ |
| 66963 | case 2590: /* avx512f_getexpv16sf_round */ |
| 66964 | case 2589: /* avx512f_getexpv16sf */ |
| 66965 | case 2570: /* avx512vl_scalefv2df_mask_round */ |
| 66966 | case 2569: /* avx512vl_scalefv2df_mask */ |
| 66967 | case 2568: /* avx512vl_scalefv2df_round */ |
| 66968 | case 2567: /* avx512vl_scalefv2df */ |
| 66969 | case 2566: /* avx512vl_scalefv4df_mask_round */ |
| 66970 | case 2565: /* avx512vl_scalefv4df_mask */ |
| 66971 | case 2564: /* avx512vl_scalefv4df_round */ |
| 66972 | case 2563: /* avx512vl_scalefv4df */ |
| 66973 | case 2562: /* avx512f_scalefv8df_mask_round */ |
| 66974 | case 2561: /* avx512f_scalefv8df_mask */ |
| 66975 | case 2560: /* avx512f_scalefv8df_round */ |
| 66976 | case 2559: /* avx512f_scalefv8df */ |
| 66977 | case 2558: /* avx512vl_scalefv4sf_mask_round */ |
| 66978 | case 2557: /* avx512vl_scalefv4sf_mask */ |
| 66979 | case 2556: /* avx512vl_scalefv4sf_round */ |
| 66980 | case 2555: /* avx512vl_scalefv4sf */ |
| 66981 | case 2554: /* avx512vl_scalefv8sf_mask_round */ |
| 66982 | case 2553: /* avx512vl_scalefv8sf_mask */ |
| 66983 | case 2552: /* avx512vl_scalefv8sf_round */ |
| 66984 | case 2551: /* avx512vl_scalefv8sf */ |
| 66985 | case 2550: /* avx512f_scalefv16sf_mask_round */ |
| 66986 | case 2549: /* avx512f_scalefv16sf_mask */ |
| 66987 | case 2548: /* avx512f_scalefv16sf_round */ |
| 66988 | case 2547: /* avx512f_scalefv16sf */ |
| 66989 | case 2546: /* avx512f_vmscalefv2df_round */ |
| 66990 | case 2545: /* avx512f_vmscalefv2df */ |
| 66991 | case 2544: /* avx512f_vmscalefv4sf_round */ |
| 66992 | case 2543: /* avx512f_vmscalefv4sf */ |
| 66993 | case 2529: /* vec_extract_lo_v32qi */ |
| 66994 | case 2527: /* vec_extract_lo_v64qi */ |
| 66995 | case 2525: /* vec_extract_lo_v16hi */ |
| 66996 | case 2523: /* vec_extract_lo_v32hi */ |
| 66997 | case 2502: /* vec_extract_lo_v16si_mask */ |
| 66998 | case 2501: /* vec_extract_lo_v16si */ |
| 66999 | case 2500: /* vec_extract_lo_v16sf_mask */ |
| 67000 | case 2499: /* vec_extract_lo_v16sf */ |
| 67001 | case 2468: /* *vec_extractv4sf_mem */ |
| 67002 | case 2466: /* *vec_extractv4sf_0 */ |
| 67003 | case 2415: /* *avx512vl_cvtmask2qv2di */ |
| 67004 | case 2414: /* *avx512vl_cvtmask2qv4di */ |
| 67005 | case 2413: /* *avx512f_cvtmask2qv8di */ |
| 67006 | case 2412: /* *avx512vl_cvtmask2dv4si */ |
| 67007 | case 2411: /* *avx512vl_cvtmask2dv8si */ |
| 67008 | case 2410: /* *avx512f_cvtmask2dv16si */ |
| 67009 | case 2409: /* *avx512vl_cvtmask2wv8hi */ |
| 67010 | case 2408: /* *avx512vl_cvtmask2wv16hi */ |
| 67011 | case 2407: /* *avx512bw_cvtmask2wv32hi */ |
| 67012 | case 2406: /* *avx512vl_cvtmask2bv32qi */ |
| 67013 | case 2405: /* *avx512vl_cvtmask2bv16qi */ |
| 67014 | case 2404: /* *avx512bw_cvtmask2bv64qi */ |
| 67015 | case 2403: /* avx512vl_cvtq2maskv2di */ |
| 67016 | case 2402: /* avx512vl_cvtq2maskv4di */ |
| 67017 | case 2401: /* avx512f_cvtq2maskv8di */ |
| 67018 | case 2400: /* avx512vl_cvtd2maskv4si */ |
| 67019 | case 2399: /* avx512vl_cvtd2maskv8si */ |
| 67020 | case 2398: /* avx512f_cvtd2maskv16si */ |
| 67021 | case 2397: /* avx512vl_cvtw2maskv8hi */ |
| 67022 | case 2396: /* avx512vl_cvtw2maskv16hi */ |
| 67023 | case 2395: /* avx512bw_cvtw2maskv32hi */ |
| 67024 | case 2394: /* avx512vl_cvtb2maskv32qi */ |
| 67025 | case 2393: /* avx512vl_cvtb2maskv16qi */ |
| 67026 | case 2392: /* avx512bw_cvtb2maskv64qi */ |
| 67027 | case 1360: /* *absnegv2df2 */ |
| 67028 | case 1359: /* *absnegv4df2 */ |
| 67029 | case 1358: /* *absnegv8df2 */ |
| 67030 | case 1357: /* *absnegv4sf2 */ |
| 67031 | case 1356: /* *absnegv8sf2 */ |
| 67032 | case 1355: /* *absnegv16sf2 */ |
| 67033 | case 1354: /* kunpckdi */ |
| 67034 | case 1353: /* kunpcksi */ |
| 67035 | case 1294: /* movdi_to_sse */ |
| 67036 | case 1209: /* *vec_extractv2si_zext_mem */ |
| 67037 | case 1207: /* *vec_extractv2si_0 */ |
| 67038 | case 1137: /* *vec_extractv2sf_0 */ |
| 67039 | case 1105: /* rdpid */ |
| 67040 | case 1104: /* *wrpkru */ |
| 67041 | case 1103: /* *rdpkru */ |
| 67042 | case 1096: /* *bnd64_cn */ |
| 67043 | case 1095: /* *bnd64_cu */ |
| 67044 | case 1094: /* *bnd64_cl */ |
| 67045 | case 1093: /* *bnd32_cn */ |
| 67046 | case 1092: /* *bnd32_cu */ |
| 67047 | case 1091: /* *bnd32_cl */ |
| 67048 | case 1088: /* *bnd64_mk */ |
| 67049 | case 1087: /* *bnd32_mk */ |
| 67050 | case 1086: /* clzero_di */ |
| 67051 | case 1085: /* clzero_si */ |
| 67052 | case 1084: /* monitorx_di */ |
| 67053 | case 1083: /* monitorx_si */ |
| 67054 | case 1082: /* mwaitx */ |
| 67055 | case 1079: /* xtest_1 */ |
| 67056 | case 1078: /* xabort */ |
| 67057 | case 1077: /* xend */ |
| 67058 | case 1076: /* xbegin_1 */ |
| 67059 | case 1075: /* *pause */ |
| 67060 | case 1074: /* rdseeddi_1 */ |
| 67061 | case 1073: /* rdseedsi_1 */ |
| 67062 | case 1072: /* rdseedhi_1 */ |
| 67063 | case 1071: /* rdranddi_1 */ |
| 67064 | case 1070: /* rdrandsi_1 */ |
| 67065 | case 1069: /* rdrandhi_1 */ |
| 67066 | case 1068: /* wrgsbasedi */ |
| 67067 | case 1067: /* wrfsbasedi */ |
| 67068 | case 1066: /* wrgsbasesi */ |
| 67069 | case 1065: /* wrfsbasesi */ |
| 67070 | case 1064: /* rdgsbasedi */ |
| 67071 | case 1063: /* rdfsbasedi */ |
| 67072 | case 1062: /* rdgsbasesi */ |
| 67073 | case 1061: /* rdfsbasesi */ |
| 67074 | case 1060: /* *lwp_lwpinsdi3_1 */ |
| 67075 | case 1059: /* *lwp_lwpinssi3_1 */ |
| 67076 | case 1058: /* *lwp_lwpvaldi3_1 */ |
| 67077 | case 1057: /* *lwp_lwpvalsi3_1 */ |
| 67078 | case 1056: /* lwp_slwpcbdi */ |
| 67079 | case 1055: /* lwp_slwpcbsi */ |
| 67080 | case 1054: /* *lwp_llwpcbdi1 */ |
| 67081 | case 1053: /* *lwp_llwpcbsi1 */ |
| 67082 | case 1052: /* fnclex */ |
| 67083 | case 1026: /* rdtscp_rex64 */ |
| 67084 | case 1025: /* rdtscp */ |
| 67085 | case 1024: /* rdtsc_rex64 */ |
| 67086 | case 1023: /* rdtsc */ |
| 67087 | case 1022: /* rdpmc_rex64 */ |
| 67088 | case 1021: /* rdpmc */ |
| 67089 | case 1016: /* stack_tls_protect_test_di */ |
| 67090 | case 1015: /* stack_tls_protect_test_si */ |
| 67091 | case 1014: /* stack_protect_test_di */ |
| 67092 | case 1013: /* stack_protect_test_si */ |
| 67093 | case 1012: /* stack_tls_protect_set_di */ |
| 67094 | case 1011: /* stack_tls_protect_set_si */ |
| 67095 | case 1010: /* stack_protect_set_di */ |
| 67096 | case 1009: /* stack_protect_set_si */ |
| 67097 | case 1005: /* trap */ |
| 67098 | case 1004: /* probe_stack_rangedi */ |
| 67099 | case 1003: /* probe_stack_rangesi */ |
| 67100 | case 1002: /* adjust_stack_and_probedi */ |
| 67101 | case 1001: /* adjust_stack_and_probesi */ |
| 67102 | case 998: /* allocate_stack_worker_probe_di */ |
| 67103 | case 997: /* allocate_stack_worker_probe_si */ |
| 67104 | case 974: /* *x86_movdicc_0_m1_neg */ |
| 67105 | case 973: /* *x86_movsicc_0_m1_neg */ |
| 67106 | case 972: /* *x86_movdicc_0_m1_se */ |
| 67107 | case 971: /* *x86_movsicc_0_m1_se */ |
| 67108 | case 970: /* *x86_movdicc_0_m1 */ |
| 67109 | case 969: /* *x86_movsicc_0_m1 */ |
| 67110 | case 968: /* *strlenqi_1 */ |
| 67111 | case 967: /* *strlenqi_1 */ |
| 67112 | case 966: /* *cmpstrnqi_1 */ |
| 67113 | case 965: /* *cmpstrnqi_1 */ |
| 67114 | case 964: /* *cmpstrnqi_nz_1 */ |
| 67115 | case 963: /* *cmpstrnqi_nz_1 */ |
| 67116 | case 934: /* cld */ |
| 67117 | case 811: /* *tls_dynamic_gnu2_combine_64 */ |
| 67118 | case 809: /* *tls_dynamic_gnu2_lea_64 */ |
| 67119 | case 808: /* *tls_dynamic_gnu2_combine_32 */ |
| 67120 | case 806: /* *tls_dynamic_gnu2_lea_32 */ |
| 67121 | case 797: /* *tls_local_dynamic_32_once */ |
| 67122 | case 796: /* *tls_local_dynamic_base_64_largepic */ |
| 67123 | case 795: /* *tls_local_dynamic_base_64_di */ |
| 67124 | case 794: /* *tls_local_dynamic_base_64_si */ |
| 67125 | case 793: /* *tls_local_dynamic_base_32_gnu */ |
| 67126 | case 792: /* *tls_global_dynamic_64_largepic */ |
| 67127 | case 791: /* *tls_global_dynamic_64_di */ |
| 67128 | case 790: /* *tls_global_dynamic_64_si */ |
| 67129 | case 789: /* *tls_global_dynamic_32_gnu */ |
| 67130 | case 788: /* *parityhi2_cmp */ |
| 67131 | case 787: /* paritysi2_cmp */ |
| 67132 | case 786: /* paritydi2_cmp */ |
| 67133 | case 785: /* bswaphi_lowpart */ |
| 67134 | case 784: /* *bswaphi_lowpart_1 */ |
| 67135 | case 778: /* *popcounthi2_1 */ |
| 67136 | case 706: /* ffssi2_no_cmove */ |
| 67137 | case 705: /* split_stack_return */ |
| 67138 | case 702: /* eh_return_internal */ |
| 67139 | case 700: /* set_rip_rex64 */ |
| 67140 | case 699: /* set_got_rex64 */ |
| 67141 | case 698: /* *set_got_labelled */ |
| 67142 | case 697: /* *set_got */ |
| 67143 | case 696: /* pad */ |
| 67144 | case 695: /* nops */ |
| 67145 | case 694: /* nop */ |
| 67146 | case 692: /* simple_return_pop_internal */ |
| 67147 | case 691: /* simple_return_internal_long */ |
| 67148 | case 690: /* interrupt_return */ |
| 67149 | case 689: /* simple_return_internal */ |
| 67150 | case 688: /* prologue_use */ |
| 67151 | case 687: /* *memory_blockage */ |
| 67152 | case 686: /* blockage */ |
| 67153 | case 658: /* *jccxf_si_r_i387 */ |
| 67154 | case 657: /* *jccdf_si_r_i387 */ |
| 67155 | case 656: /* *jccsf_si_r_i387 */ |
| 67156 | case 655: /* *jccxf_hi_r_i387 */ |
| 67157 | case 654: /* *jccdf_hi_r_i387 */ |
| 67158 | case 653: /* *jccsf_hi_r_i387 */ |
| 67159 | case 652: /* *jccxf_si_i387 */ |
| 67160 | case 651: /* *jccdf_si_i387 */ |
| 67161 | case 650: /* *jccsf_si_i387 */ |
| 67162 | case 649: /* *jccxf_hi_i387 */ |
| 67163 | case 648: /* *jccdf_hi_i387 */ |
| 67164 | case 647: /* *jccsf_hi_i387 */ |
| 67165 | case 646: /* *jccuxf_r_i387 */ |
| 67166 | case 645: /* *jccudf_r_i387 */ |
| 67167 | case 644: /* *jccusf_r_i387 */ |
| 67168 | case 643: /* *jccuxf_i387 */ |
| 67169 | case 642: /* *jccudf_i387 */ |
| 67170 | case 641: /* *jccusf_i387 */ |
| 67171 | case 640: /* *jccdf_r_i387 */ |
| 67172 | case 639: /* *jccsf_r_i387 */ |
| 67173 | case 638: /* *jccdf_i387 */ |
| 67174 | case 637: /* *jccsf_i387 */ |
| 67175 | case 636: /* *jccxf_r_i387 */ |
| 67176 | case 635: /* *jccxf_i387 */ |
| 67177 | case 634: /* *jccxf_0_r_i387 */ |
| 67178 | case 633: /* *jccdf_0_r_i387 */ |
| 67179 | case 632: /* *jccsf_0_r_i387 */ |
| 67180 | case 631: /* *jccxf_0_i387 */ |
| 67181 | case 630: /* *jccdf_0_i387 */ |
| 67182 | case 629: /* *jccsf_0_i387 */ |
| 67183 | case 622: /* *setcc_si_1_movzbl */ |
| 67184 | case 621: /* *setcc_si_1_and */ |
| 67185 | case 620: /* *setcc_di_1 */ |
| 67186 | case 619: /* *jcc_btdi_mask */ |
| 67187 | case 618: /* *jcc_btsi_mask */ |
| 67188 | case 617: /* *jcc_btdi_1 */ |
| 67189 | case 616: /* *jcc_btsi_1 */ |
| 67190 | case 615: /* *jcc_btdi */ |
| 67191 | case 614: /* *jcc_btsi */ |
| 67192 | case 593: /* ix86_rotrti3_doubleword */ |
| 67193 | case 592: /* ix86_rotrdi3_doubleword */ |
| 67194 | case 591: /* ix86_rotlti3_doubleword */ |
| 67195 | case 590: /* ix86_rotldi3_doubleword */ |
| 67196 | case 589: /* *rotrdi3_mask */ |
| 67197 | case 588: /* *rotldi3_mask */ |
| 67198 | case 587: /* *rotrsi3_mask */ |
| 67199 | case 586: /* *rotlsi3_mask */ |
| 67200 | case 544: /* *ashrti3_doubleword */ |
| 67201 | case 543: /* *lshrti3_doubleword */ |
| 67202 | case 542: /* *ashrdi3_doubleword */ |
| 67203 | case 541: /* *lshrdi3_doubleword */ |
| 67204 | case 540: /* *ashrdi3_mask */ |
| 67205 | case 539: /* *lshrdi3_mask */ |
| 67206 | case 538: /* *ashrsi3_mask */ |
| 67207 | case 537: /* *lshrsi3_mask */ |
| 67208 | case 518: /* *ashldi3_mask */ |
| 67209 | case 517: /* *ashlsi3_mask */ |
| 67210 | case 514: /* *ashlti3_doubleword */ |
| 67211 | case 513: /* *ashldi3_doubleword */ |
| 67212 | case 502: /* *one_cmpldi2_doubleword */ |
| 67213 | case 501: /* copysigntf3_var */ |
| 67214 | case 500: /* copysigndf3_var */ |
| 67215 | case 499: /* copysignsf3_var */ |
| 67216 | case 498: /* copysigntf3_const */ |
| 67217 | case 497: /* copysigndf3_const */ |
| 67218 | case 496: /* copysignsf3_const */ |
| 67219 | case 483: /* *absnegtf2_sse */ |
| 67220 | case 482: /* *absnegxf2_i387 */ |
| 67221 | case 481: /* *absnegdf2 */ |
| 67222 | case 480: /* *absnegsf2 */ |
| 67223 | case 465: /* *negti2_doubleword */ |
| 67224 | case 464: /* *negdi2_doubleword */ |
| 67225 | case 422: /* *xordi3_doubleword */ |
| 67226 | case 421: /* *iordi3_doubleword */ |
| 67227 | case 414: /* *andndi3_doubleword */ |
| 67228 | case 397: /* *anddi3_doubleword */ |
| 67229 | case 396: /* *testqi_ext_3 */ |
| 67230 | case 395: /* *testqi_ext_3 */ |
| 67231 | case 394: /* *testqi_ext_3 */ |
| 67232 | case 382: /* *udivmoddi4_pow2 */ |
| 67233 | case 381: /* *udivmodsi4_pow2 */ |
| 67234 | case 380: /* *udivmoddi4 */ |
| 67235 | case 379: /* *udivmodsi4 */ |
| 67236 | case 378: /* *udivmodhi4 */ |
| 67237 | case 377: /* udivmoddi4_1 */ |
| 67238 | case 376: /* udivmodsi4_1 */ |
| 67239 | case 371: /* *divmoddi4 */ |
| 67240 | case 370: /* *divmodsi4 */ |
| 67241 | case 369: /* *divmodhi4 */ |
| 67242 | case 368: /* divmoddi4_1 */ |
| 67243 | case 367: /* divmodsi4_1 */ |
| 67244 | case 270: /* *subti3_doubleword */ |
| 67245 | case 269: /* *subdi3_doubleword */ |
| 67246 | case 268: /* *leadi_general_4 */ |
| 67247 | case 267: /* *leadi_general_4 */ |
| 67248 | case 266: /* *leasi_general_4 */ |
| 67249 | case 265: /* *leasi_general_4 */ |
| 67250 | case 264: /* *leahi_general_4 */ |
| 67251 | case 263: /* *leahi_general_4 */ |
| 67252 | case 262: /* *leaqi_general_4 */ |
| 67253 | case 261: /* *leaqi_general_4 */ |
| 67254 | case 260: /* *leahi_general_3b */ |
| 67255 | case 259: /* *leaqi_general_3b */ |
| 67256 | case 258: /* *leahi_general_3 */ |
| 67257 | case 257: /* *leaqi_general_3 */ |
| 67258 | case 256: /* *leahi_general_2b */ |
| 67259 | case 255: /* *leaqi_general_2b */ |
| 67260 | case 254: /* *leahi_general_2 */ |
| 67261 | case 253: /* *leaqi_general_2 */ |
| 67262 | case 252: /* *leahi_general_1 */ |
| 67263 | case 251: /* *leaqi_general_1 */ |
| 67264 | case 216: /* *addti3_doubleword */ |
| 67265 | case 215: /* *adddi3_doubleword */ |
| 67266 | case 214: /* *leadi */ |
| 67267 | case 213: /* *leasi */ |
| 67268 | case 212: /* *floatunssixf2_i387_with_xmm */ |
| 67269 | case 211: /* *floatunssidf2_i387_with_xmm */ |
| 67270 | case 210: /* *floatunssisf2_i387_with_xmm */ |
| 67271 | case 169: /* *fixuns_truncdf_1 */ |
| 67272 | case 168: /* *fixuns_truncsf_1 */ |
| 67273 | case 146: /* extendsidi2_1 */ |
| 67274 | case 144: /* *zextsi_doubleword */ |
| 67275 | case 143: /* *zexthi_doubleword */ |
| 67276 | case 142: /* *zextqi_doubleword */ |
| 67277 | case 141: /* *zexthi_doubleword_and */ |
| 67278 | case 140: /* *zextqi_doubleword_and */ |
| 67279 | case 130: /* *swapdf */ |
| 67280 | case 129: /* *swapsf */ |
| 67281 | case 128: /* swapxf */ |
| 67282 | case 71: /* *pushfldi2 */ |
| 67283 | case 70: /* *pushflsi2 */ |
| 67284 | case 65: /* *pushdi2_prologue */ |
| 67285 | case 64: /* *pushsi2_prologue */ |
| 67286 | case 63: /* *pushhi2 */ |
| 67287 | case 62: /* *pushqi2 */ |
| 67288 | case 61: /* *pushsi2_rex64 */ |
| 67289 | case 60: /* *pushhi2_rex64 */ |
| 67290 | case 59: /* *pushqi2_rex64 */ |
| 67291 | case 58: /* *pushsi2 */ |
| 67292 | case 56: /* *pushti2 */ |
| 67293 | case 55: /* *pushdi2 */ |
| 67294 | case 48: /* x86_sahf_1 */ |
| 67295 | return 1; |
| 67296 | |
| 67297 | case 659: /* jump */ |
| 67298 | case 628: /* *jcc_2 */ |
| 67299 | case 627: /* *jcc_1 */ |
| 67300 | case 393: /* *testqi_ext_2 */ |
| 67301 | case 392: /* *testqi_ext_1 */ |
| 67302 | case 391: /* *testsi_1 */ |
| 67303 | case 390: /* *testhi_1 */ |
| 67304 | case 389: /* *testqi_1 */ |
| 67305 | case 388: /* *testqi_1_maybe_si */ |
| 67306 | case 387: /* *testdi_1 */ |
| 67307 | case 222: /* *addqi_1_slp */ |
| 67308 | case 16: /* *cmpqi_ext_4 */ |
| 67309 | case 15: /* *cmpqi_ext_3 */ |
| 67310 | case 14: /* *cmpqi_ext_2 */ |
| 67311 | case 13: /* *cmpqi_ext_1 */ |
| 67312 | case 12: /* *cmpdi_minus_1 */ |
| 67313 | case 11: /* *cmpsi_minus_1 */ |
| 67314 | case 10: /* *cmphi_minus_1 */ |
| 67315 | case 9: /* *cmpqi_minus_1 */ |
| 67316 | case 8: /* *cmpdi_1 */ |
| 67317 | case 7: /* *cmpsi_1 */ |
| 67318 | case 6: /* *cmphi_1 */ |
| 67319 | case 5: /* *cmpqi_1 */ |
| 67320 | case 4: /* *cmpdi_ccno_1 */ |
| 67321 | case 3: /* *cmpsi_ccno_1 */ |
| 67322 | case 2: /* *cmphi_ccno_1 */ |
| 67323 | case 1: /* *cmpqi_ccno_1 */ |
| 67324 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) |
| 67325 | { |
| 67326 | return 4; |
| 67327 | } |
| 67328 | else if (cached_memory == MEMORY_NONE) |
| 67329 | { |
| 67330 | return 1; |
| 67331 | } |
| 67332 | else |
| 67333 | { |
| 67334 | return 0; |
| 67335 | } |
| 67336 | |
| 67337 | case -1: |
| 67338 | if (GET_CODE (PATTERN (insn)) != ASM_INPUT |
| 67339 | && asm_noperands (PATTERN (insn)) < 0) |
| 67340 | fatal_insn_not_found (insn); |
| 67341 | /* FALLTHRU */ |
| 67342 | case 49: /* *cmpisf */ |
| 67343 | case 50: /* *cmpidf */ |
| 67344 | case 51: /* *cmpiusf */ |
| 67345 | case 52: /* *cmpiudf */ |
| 67346 | case 78: /* *movxi_internal_avx512f */ |
| 67347 | case 79: /* *movoi_internal_avx */ |
| 67348 | case 80: /* *movti_internal */ |
| 67349 | case 81: /* *movdi_internal */ |
| 67350 | case 82: /* *movsi_internal */ |
| 67351 | case 83: /* *movhi_internal */ |
| 67352 | case 84: /* *movqi_internal */ |
| 67353 | case 97: /* *movstrictqi_1 */ |
| 67354 | case 98: /* *movstricthi_1 */ |
| 67355 | case 101: /* *extvhi */ |
| 67356 | case 102: /* *extvsi */ |
| 67357 | case 103: /* *extzvhi */ |
| 67358 | case 104: /* *extzvsi */ |
| 67359 | case 105: /* *extzvdi */ |
| 67360 | case 106: /* *extzvqi_mem_rex64 */ |
| 67361 | case 107: /* *extzvqi */ |
| 67362 | case 108: /* insvhi_1 */ |
| 67363 | case 109: /* insvsi_1 */ |
| 67364 | case 110: /* insvdi_1 */ |
| 67365 | case 111: /* *insvqi_1_mem_rex64 */ |
| 67366 | case 112: /* *insvqi_1 */ |
| 67367 | case 113: /* *insvqi_2 */ |
| 67368 | case 114: /* *insvqi_2 */ |
| 67369 | case 115: /* *insvqi_3 */ |
| 67370 | case 116: /* *insvqi_3 */ |
| 67371 | case 124: /* *movtf_internal */ |
| 67372 | case 125: /* *movxf_internal */ |
| 67373 | case 126: /* *movdf_internal */ |
| 67374 | case 127: /* *movsf_internal */ |
| 67375 | case 131: /* *zero_extendsidi2 */ |
| 67376 | case 132: /* zero_extendqidi2 */ |
| 67377 | case 133: /* zero_extendhidi2 */ |
| 67378 | case 136: /* *zero_extendqisi2 */ |
| 67379 | case 137: /* *zero_extendhisi2 */ |
| 67380 | case 139: /* *zero_extendqihi2 */ |
| 67381 | case 145: /* *extendsidi2_rex64 */ |
| 67382 | case 147: /* extendqidi2 */ |
| 67383 | case 148: /* extendhidi2 */ |
| 67384 | case 149: /* extendhisi2 */ |
| 67385 | case 150: /* *extendhisi2_zext */ |
| 67386 | case 151: /* extendqisi2 */ |
| 67387 | case 152: /* *extendqisi2_zext */ |
| 67388 | case 153: /* extendqihi2 */ |
| 67389 | case 154: /* *extendsfdf2 */ |
| 67390 | case 155: /* *extendsfxf2_i387 */ |
| 67391 | case 156: /* *extenddfxf2_i387 */ |
| 67392 | case 196: /* floathixf2 */ |
| 67393 | case 197: /* floatsixf2 */ |
| 67394 | case 198: /* floatdixf2 */ |
| 67395 | case 217: /* *addsi_1 */ |
| 67396 | case 218: /* *adddi_1 */ |
| 67397 | case 219: /* addsi_1_zext */ |
| 67398 | case 220: /* *addhi_1 */ |
| 67399 | case 221: /* *addqi_1 */ |
| 67400 | case 223: /* *addqi_2 */ |
| 67401 | case 224: /* *addhi_2 */ |
| 67402 | case 225: /* *addsi_2 */ |
| 67403 | case 226: /* *adddi_2 */ |
| 67404 | case 227: /* *addsi_2_zext */ |
| 67405 | case 228: /* *addqi_3 */ |
| 67406 | case 229: /* *addhi_3 */ |
| 67407 | case 230: /* *addsi_3 */ |
| 67408 | case 231: /* *adddi_3 */ |
| 67409 | case 232: /* *addsi_3_zext */ |
| 67410 | case 233: /* *adddi_4 */ |
| 67411 | case 234: /* *addqi_4 */ |
| 67412 | case 235: /* *addhi_4 */ |
| 67413 | case 236: /* *addsi_4 */ |
| 67414 | case 237: /* *addqi_5 */ |
| 67415 | case 238: /* *addhi_5 */ |
| 67416 | case 239: /* *addsi_5 */ |
| 67417 | case 240: /* *adddi_5 */ |
| 67418 | case 241: /* addqi_ext_1 */ |
| 67419 | case 242: /* *addqi_ext_2 */ |
| 67420 | case 243: /* *addvqi4 */ |
| 67421 | case 244: /* *addvhi4 */ |
| 67422 | case 245: /* *addvsi4 */ |
| 67423 | case 246: /* *addvdi4 */ |
| 67424 | case 247: /* *addvqi4_1 */ |
| 67425 | case 248: /* *addvhi4_1 */ |
| 67426 | case 249: /* *addvsi4_1 */ |
| 67427 | case 250: /* *addvdi4_1 */ |
| 67428 | case 271: /* *subqi_1 */ |
| 67429 | case 272: /* *subhi_1 */ |
| 67430 | case 273: /* *subsi_1 */ |
| 67431 | case 274: /* *subdi_1 */ |
| 67432 | case 275: /* *subsi_1_zext */ |
| 67433 | case 277: /* *subqi_2 */ |
| 67434 | case 278: /* *subhi_2 */ |
| 67435 | case 279: /* *subsi_2 */ |
| 67436 | case 280: /* *subdi_2 */ |
| 67437 | case 281: /* *subsi_2_zext */ |
| 67438 | case 282: /* *subvqi4 */ |
| 67439 | case 283: /* *subvhi4 */ |
| 67440 | case 284: /* *subvsi4 */ |
| 67441 | case 285: /* *subvdi4 */ |
| 67442 | case 286: /* *subvqi4_1 */ |
| 67443 | case 287: /* *subvhi4_1 */ |
| 67444 | case 288: /* *subvsi4_1 */ |
| 67445 | case 289: /* *subvdi4_1 */ |
| 67446 | case 290: /* *subqi_3 */ |
| 67447 | case 291: /* *subhi_3 */ |
| 67448 | case 292: /* *subsi_3 */ |
| 67449 | case 293: /* *subdi_3 */ |
| 67450 | case 294: /* *subsi_3_zext */ |
| 67451 | case 295: /* addqi3_carry */ |
| 67452 | case 296: /* addhi3_carry */ |
| 67453 | case 297: /* addsi3_carry */ |
| 67454 | case 298: /* adddi3_carry */ |
| 67455 | case 299: /* *addqi3_carry_0 */ |
| 67456 | case 300: /* *addhi3_carry_0 */ |
| 67457 | case 301: /* *addsi3_carry_0 */ |
| 67458 | case 302: /* *adddi3_carry_0 */ |
| 67459 | case 303: /* *addsi3_carry_zext */ |
| 67460 | case 304: /* *addsi3_carry_zext_0 */ |
| 67461 | case 305: /* addcarrysi */ |
| 67462 | case 306: /* addcarrydi */ |
| 67463 | case 307: /* subqi3_carry */ |
| 67464 | case 308: /* subhi3_carry */ |
| 67465 | case 309: /* subsi3_carry */ |
| 67466 | case 310: /* subdi3_carry */ |
| 67467 | case 311: /* *subqi3_carry_0 */ |
| 67468 | case 312: /* *subhi3_carry_0 */ |
| 67469 | case 313: /* *subsi3_carry_0 */ |
| 67470 | case 314: /* *subdi3_carry_0 */ |
| 67471 | case 315: /* *subsi3_carry_zext */ |
| 67472 | case 316: /* *subsi3_carry_zext_0 */ |
| 67473 | case 317: /* subborrowsi */ |
| 67474 | case 318: /* subborrowdi */ |
| 67475 | case 319: /* *addqi3_cconly_overflow_1 */ |
| 67476 | case 320: /* *addhi3_cconly_overflow_1 */ |
| 67477 | case 321: /* *addsi3_cconly_overflow_1 */ |
| 67478 | case 322: /* *adddi3_cconly_overflow_1 */ |
| 67479 | case 323: /* *addqi3_cc_overflow_1 */ |
| 67480 | case 324: /* *addhi3_cc_overflow_1 */ |
| 67481 | case 325: /* *addsi3_cc_overflow_1 */ |
| 67482 | case 326: /* *adddi3_cc_overflow_1 */ |
| 67483 | case 327: /* *addsi3_zext_cc_overflow_1 */ |
| 67484 | case 328: /* *addqi3_cconly_overflow_2 */ |
| 67485 | case 329: /* *addhi3_cconly_overflow_2 */ |
| 67486 | case 330: /* *addsi3_cconly_overflow_2 */ |
| 67487 | case 331: /* *adddi3_cconly_overflow_2 */ |
| 67488 | case 332: /* *addqi3_cc_overflow_2 */ |
| 67489 | case 333: /* *addhi3_cc_overflow_2 */ |
| 67490 | case 334: /* *addsi3_cc_overflow_2 */ |
| 67491 | case 335: /* *adddi3_cc_overflow_2 */ |
| 67492 | case 336: /* *addsi3_zext_cc_overflow_2 */ |
| 67493 | case 337: /* *mulhi3_1 */ |
| 67494 | case 338: /* *mulsi3_1 */ |
| 67495 | case 339: /* *muldi3_1 */ |
| 67496 | case 340: /* *mulsi3_1_zext */ |
| 67497 | case 341: /* *mulqi3_1 */ |
| 67498 | case 342: /* *mulvsi4 */ |
| 67499 | case 343: /* *mulvdi4 */ |
| 67500 | case 344: /* *mulvhi4 */ |
| 67501 | case 345: /* *mulvhi4_1 */ |
| 67502 | case 346: /* *mulvsi4_1 */ |
| 67503 | case 347: /* *mulvdi4_1 */ |
| 67504 | case 348: /* *umulvhi4 */ |
| 67505 | case 349: /* *umulvsi4 */ |
| 67506 | case 350: /* *umulvdi4 */ |
| 67507 | case 351: /* *mulvqi4 */ |
| 67508 | case 352: /* *umulvqi4 */ |
| 67509 | case 353: /* *bmi2_umulsidi3_1 */ |
| 67510 | case 354: /* *bmi2_umulditi3_1 */ |
| 67511 | case 355: /* *umulsidi3_1 */ |
| 67512 | case 356: /* *umulditi3_1 */ |
| 67513 | case 357: /* *mulsidi3_1 */ |
| 67514 | case 358: /* *mulditi3_1 */ |
| 67515 | case 359: /* *mulqihi3_1 */ |
| 67516 | case 360: /* *umulqihi3_1 */ |
| 67517 | case 361: /* *smuldi3_highpart_1 */ |
| 67518 | case 362: /* *umuldi3_highpart_1 */ |
| 67519 | case 363: /* *smulsi3_highpart_zext */ |
| 67520 | case 364: /* *umulsi3_highpart_zext */ |
| 67521 | case 365: /* *smulsi3_highpart_1 */ |
| 67522 | case 366: /* *umulsi3_highpart_1 */ |
| 67523 | case 372: /* *divmodhi4_noext */ |
| 67524 | case 373: /* *divmodsi4_noext */ |
| 67525 | case 374: /* *divmoddi4_noext */ |
| 67526 | case 375: /* divmodhiqi3 */ |
| 67527 | case 383: /* *udivmodhi4_noext */ |
| 67528 | case 384: /* *udivmodsi4_noext */ |
| 67529 | case 385: /* *udivmoddi4_noext */ |
| 67530 | case 386: /* udivmodhiqi3 */ |
| 67531 | case 398: /* *anddi_1 */ |
| 67532 | case 399: /* *andsi_1_zext */ |
| 67533 | case 400: /* *andhi_1 */ |
| 67534 | case 401: /* *andsi_1 */ |
| 67535 | case 402: /* *andqi_1 */ |
| 67536 | case 404: /* *anddi_2 */ |
| 67537 | case 405: /* *andsi_2_zext */ |
| 67538 | case 406: /* *andqi_2_maybe_si */ |
| 67539 | case 407: /* *andqi_2 */ |
| 67540 | case 408: /* *andhi_2 */ |
| 67541 | case 409: /* *andsi_2 */ |
| 67542 | case 411: /* andqi_ext_1 */ |
| 67543 | case 412: /* *andqi_ext_1_cc */ |
| 67544 | case 413: /* *andqi_ext_2 */ |
| 67545 | case 415: /* *andnsi_1 */ |
| 67546 | case 416: /* *andndi_1 */ |
| 67547 | case 417: /* *andnqi_1 */ |
| 67548 | case 418: /* *andnhi_1 */ |
| 67549 | case 419: /* *andn_si_ccno */ |
| 67550 | case 420: /* *andn_di_ccno */ |
| 67551 | case 423: /* *iorhi_1 */ |
| 67552 | case 424: /* *xorhi_1 */ |
| 67553 | case 425: /* *iorsi_1 */ |
| 67554 | case 426: /* *xorsi_1 */ |
| 67555 | case 427: /* *iordi_1 */ |
| 67556 | case 428: /* *xordi_1 */ |
| 67557 | case 429: /* *iorsi_1_zext */ |
| 67558 | case 430: /* *xorsi_1_zext */ |
| 67559 | case 431: /* *iorsi_1_zext_imm */ |
| 67560 | case 432: /* *xorsi_1_zext_imm */ |
| 67561 | case 433: /* *iorqi_1 */ |
| 67562 | case 434: /* *xorqi_1 */ |
| 67563 | case 437: /* *iorqi_2 */ |
| 67564 | case 438: /* *xorqi_2 */ |
| 67565 | case 439: /* *iorhi_2 */ |
| 67566 | case 440: /* *xorhi_2 */ |
| 67567 | case 441: /* *iorsi_2 */ |
| 67568 | case 442: /* *xorsi_2 */ |
| 67569 | case 443: /* *iordi_2 */ |
| 67570 | case 444: /* *xordi_2 */ |
| 67571 | case 445: /* *iorsi_2_zext */ |
| 67572 | case 446: /* *xorsi_2_zext */ |
| 67573 | case 447: /* *iorsi_2_zext_imm */ |
| 67574 | case 448: /* *xorsi_2_zext_imm */ |
| 67575 | case 451: /* *iorqi_3 */ |
| 67576 | case 452: /* *xorqi_3 */ |
| 67577 | case 453: /* *iorhi_3 */ |
| 67578 | case 454: /* *xorhi_3 */ |
| 67579 | case 455: /* *iorsi_3 */ |
| 67580 | case 456: /* *xorsi_3 */ |
| 67581 | case 457: /* *iordi_3 */ |
| 67582 | case 458: /* *xordi_3 */ |
| 67583 | case 459: /* *iorqi_ext_1 */ |
| 67584 | case 460: /* *xorqi_ext_1 */ |
| 67585 | case 461: /* *iorqi_ext_2 */ |
| 67586 | case 462: /* *xorqi_ext_2 */ |
| 67587 | case 463: /* *xorqi_ext_1_cc */ |
| 67588 | case 519: /* *bmi2_ashlsi3_1 */ |
| 67589 | case 520: /* *bmi2_ashldi3_1 */ |
| 67590 | case 521: /* *ashlsi3_1 */ |
| 67591 | case 522: /* *ashldi3_1 */ |
| 67592 | case 523: /* *bmi2_ashlsi3_1_zext */ |
| 67593 | case 524: /* *ashlsi3_1_zext */ |
| 67594 | case 525: /* *ashlhi3_1 */ |
| 67595 | case 526: /* *ashlqi3_1 */ |
| 67596 | case 527: /* *ashlqi3_1_slp */ |
| 67597 | case 528: /* *ashlqi3_cmp */ |
| 67598 | case 529: /* *ashlhi3_cmp */ |
| 67599 | case 530: /* *ashlsi3_cmp */ |
| 67600 | case 531: /* *ashldi3_cmp */ |
| 67601 | case 532: /* *ashlsi3_cmp_zext */ |
| 67602 | case 533: /* *ashlqi3_cconly */ |
| 67603 | case 534: /* *ashlhi3_cconly */ |
| 67604 | case 535: /* *ashlsi3_cconly */ |
| 67605 | case 536: /* *ashldi3_cconly */ |
| 67606 | case 547: /* ashrdi3_cvt */ |
| 67607 | case 548: /* *ashrsi3_cvt_zext */ |
| 67608 | case 549: /* ashrsi3_cvt */ |
| 67609 | case 550: /* *bmi2_lshrsi3_1 */ |
| 67610 | case 551: /* *bmi2_ashrsi3_1 */ |
| 67611 | case 552: /* *bmi2_lshrdi3_1 */ |
| 67612 | case 553: /* *bmi2_ashrdi3_1 */ |
| 67613 | case 554: /* *lshrsi3_1 */ |
| 67614 | case 555: /* *ashrsi3_1 */ |
| 67615 | case 556: /* *lshrdi3_1 */ |
| 67616 | case 557: /* *ashrdi3_1 */ |
| 67617 | case 558: /* *bmi2_lshrsi3_1_zext */ |
| 67618 | case 559: /* *bmi2_ashrsi3_1_zext */ |
| 67619 | case 560: /* *lshrsi3_1_zext */ |
| 67620 | case 561: /* *ashrsi3_1_zext */ |
| 67621 | case 562: /* *lshrqi3_1 */ |
| 67622 | case 563: /* *ashrqi3_1 */ |
| 67623 | case 564: /* *lshrhi3_1 */ |
| 67624 | case 565: /* *ashrhi3_1 */ |
| 67625 | case 568: /* *lshrqi3_cmp */ |
| 67626 | case 569: /* *ashrqi3_cmp */ |
| 67627 | case 570: /* *lshrhi3_cmp */ |
| 67628 | case 571: /* *ashrhi3_cmp */ |
| 67629 | case 572: /* *lshrsi3_cmp */ |
| 67630 | case 573: /* *ashrsi3_cmp */ |
| 67631 | case 574: /* *lshrdi3_cmp */ |
| 67632 | case 575: /* *ashrdi3_cmp */ |
| 67633 | case 576: /* *lshrsi3_cmp_zext */ |
| 67634 | case 577: /* *ashrsi3_cmp_zext */ |
| 67635 | case 578: /* *lshrqi3_cconly */ |
| 67636 | case 579: /* *ashrqi3_cconly */ |
| 67637 | case 580: /* *lshrhi3_cconly */ |
| 67638 | case 581: /* *ashrhi3_cconly */ |
| 67639 | case 582: /* *lshrsi3_cconly */ |
| 67640 | case 583: /* *ashrsi3_cconly */ |
| 67641 | case 584: /* *lshrdi3_cconly */ |
| 67642 | case 585: /* *ashrdi3_cconly */ |
| 67643 | case 594: /* *bmi2_rorxsi3_1 */ |
| 67644 | case 595: /* *bmi2_rorxdi3_1 */ |
| 67645 | case 596: /* *rotlsi3_1 */ |
| 67646 | case 597: /* *rotrsi3_1 */ |
| 67647 | case 598: /* *rotldi3_1 */ |
| 67648 | case 599: /* *rotrdi3_1 */ |
| 67649 | case 600: /* *bmi2_rorxsi3_1_zext */ |
| 67650 | case 601: /* *rotlsi3_1_zext */ |
| 67651 | case 602: /* *rotrsi3_1_zext */ |
| 67652 | case 603: /* *rotlqi3_1 */ |
| 67653 | case 604: /* *rotrqi3_1 */ |
| 67654 | case 605: /* *rotlhi3_1 */ |
| 67655 | case 606: /* *rotrhi3_1 */ |
| 67656 | case 701: /* set_got_offset_rex64 */ |
| 67657 | case 707: /* *tzcntsi_1 */ |
| 67658 | case 708: /* *tzcntdi_1 */ |
| 67659 | case 709: /* *tzcntsi_1_falsedep */ |
| 67660 | case 710: /* *tzcntdi_1_falsedep */ |
| 67661 | case 711: /* *bsfsi_1 */ |
| 67662 | case 712: /* *bsfdi_1 */ |
| 67663 | case 720: /* clzsi2_lzcnt */ |
| 67664 | case 721: /* clzdi2_lzcnt */ |
| 67665 | case 722: /* *clzsi2_lzcnt_falsedep */ |
| 67666 | case 723: /* *clzdi2_lzcnt_falsedep */ |
| 67667 | case 725: /* lzcnt_si */ |
| 67668 | case 727: /* lzcnt_di */ |
| 67669 | case 729: /* *lzcnt_si_falsedep */ |
| 67670 | case 731: /* *lzcnt_di_falsedep */ |
| 67671 | case 733: /* lzcnt_hi */ |
| 67672 | case 734: /* bmi_bextr_si */ |
| 67673 | case 735: /* bmi_bextr_di */ |
| 67674 | case 736: /* *bmi_bextr_si_ccz */ |
| 67675 | case 737: /* *bmi_bextr_di_ccz */ |
| 67676 | case 738: /* *bmi_blsi_si */ |
| 67677 | case 739: /* *bmi_blsi_di */ |
| 67678 | case 740: /* *bmi_blsmsk_si */ |
| 67679 | case 741: /* *bmi_blsmsk_di */ |
| 67680 | case 742: /* *bmi_blsr_si */ |
| 67681 | case 743: /* *bmi_blsr_di */ |
| 67682 | case 744: /* *bmi2_bzhi_si3 */ |
| 67683 | case 745: /* *bmi2_bzhi_di3 */ |
| 67684 | case 746: /* *bmi2_bzhi_si3_1 */ |
| 67685 | case 747: /* *bmi2_bzhi_di3_1 */ |
| 67686 | case 748: /* *bmi2_bzhi_si3_1_ccz */ |
| 67687 | case 749: /* *bmi2_bzhi_di3_1_ccz */ |
| 67688 | case 750: /* bmi2_pdep_si3 */ |
| 67689 | case 751: /* bmi2_pdep_di3 */ |
| 67690 | case 752: /* bmi2_pext_si3 */ |
| 67691 | case 753: /* bmi2_pext_di3 */ |
| 67692 | case 754: /* tbm_bextri_si */ |
| 67693 | case 755: /* tbm_bextri_di */ |
| 67694 | case 756: /* *tbm_blcfill_si */ |
| 67695 | case 757: /* *tbm_blcfill_di */ |
| 67696 | case 758: /* *tbm_blci_si */ |
| 67697 | case 759: /* *tbm_blci_di */ |
| 67698 | case 760: /* *tbm_blcic_si */ |
| 67699 | case 761: /* *tbm_blcic_di */ |
| 67700 | case 762: /* *tbm_blcmsk_si */ |
| 67701 | case 763: /* *tbm_blcmsk_di */ |
| 67702 | case 764: /* *tbm_blcs_si */ |
| 67703 | case 765: /* *tbm_blcs_di */ |
| 67704 | case 766: /* *tbm_blsfill_si */ |
| 67705 | case 767: /* *tbm_blsfill_di */ |
| 67706 | case 768: /* *tbm_blsic_si */ |
| 67707 | case 769: /* *tbm_blsic_di */ |
| 67708 | case 770: /* *tbm_t1mskc_si */ |
| 67709 | case 771: /* *tbm_t1mskc_di */ |
| 67710 | case 772: /* *tbm_tzmsk_si */ |
| 67711 | case 773: /* *tbm_tzmsk_di */ |
| 67712 | case 774: /* popcountsi2 */ |
| 67713 | case 775: /* popcountdi2 */ |
| 67714 | case 776: /* *popcountsi2_falsedep */ |
| 67715 | case 777: /* *popcountdi2_falsedep */ |
| 67716 | case 779: /* popcounthi2 */ |
| 67717 | case 780: /* *bswapsi2_movbe */ |
| 67718 | case 781: /* *bswapdi2_movbe */ |
| 67719 | case 782: /* *bswapsi2 */ |
| 67720 | case 783: /* *bswapdi2 */ |
| 67721 | case 812: /* *fop_sf_comm */ |
| 67722 | case 813: /* *fop_df_comm */ |
| 67723 | case 815: /* *fop_sf_1 */ |
| 67724 | case 816: /* *fop_df_1 */ |
| 67725 | case 817: /* *fop_sf_2_i387 */ |
| 67726 | case 818: /* *fop_df_2_i387 */ |
| 67727 | case 819: /* *fop_sf_2_i387 */ |
| 67728 | case 820: /* *fop_df_2_i387 */ |
| 67729 | case 821: /* *fop_sf_3_i387 */ |
| 67730 | case 822: /* *fop_df_3_i387 */ |
| 67731 | case 823: /* *fop_sf_3_i387 */ |
| 67732 | case 824: /* *fop_df_3_i387 */ |
| 67733 | case 825: /* *fop_df_4_i387 */ |
| 67734 | case 826: /* *fop_df_5_i387 */ |
| 67735 | case 827: /* *fop_df_6_i387 */ |
| 67736 | case 828: /* *fop_xf_comm_i387 */ |
| 67737 | case 829: /* *fop_xf_1_i387 */ |
| 67738 | case 830: /* *fop_xf_2_i387 */ |
| 67739 | case 831: /* *fop_xf_2_i387 */ |
| 67740 | case 832: /* *fop_xf_3_i387 */ |
| 67741 | case 833: /* *fop_xf_3_i387 */ |
| 67742 | case 834: /* *fop_xf_4_i387 */ |
| 67743 | case 835: /* *fop_xf_4_i387 */ |
| 67744 | case 836: /* *fop_xf_5_i387 */ |
| 67745 | case 837: /* *fop_xf_5_i387 */ |
| 67746 | case 838: /* *fop_xf_6_i387 */ |
| 67747 | case 839: /* *fop_xf_6_i387 */ |
| 67748 | case 933: /* movmsk_df */ |
| 67749 | case 975: /* *movhicc_noc */ |
| 67750 | case 976: /* *movsicc_noc */ |
| 67751 | case 977: /* *movdicc_noc */ |
| 67752 | case 978: /* *movsicc_noc_zext */ |
| 67753 | case 979: /* *movqicc_noc */ |
| 67754 | case 981: /* *movdfcc_1 */ |
| 67755 | case 982: /* *movsfcc_1_387 */ |
| 67756 | case 993: /* pro_epilogue_adjust_stack_si_add */ |
| 67757 | case 994: /* pro_epilogue_adjust_stack_di_add */ |
| 67758 | case 995: /* pro_epilogue_adjust_stack_si_sub */ |
| 67759 | case 996: /* pro_epilogue_adjust_stack_di_sub */ |
| 67760 | case 1089: /* *movbnd32_internal_mpx */ |
| 67761 | case 1090: /* *movbnd64_internal_mpx */ |
| 67762 | case 1101: /* move_size_reloc_si */ |
| 67763 | case 1102: /* move_size_reloc_di */ |
| 67764 | case 1106: /* *movv8qi_internal */ |
| 67765 | case 1107: /* *movv4hi_internal */ |
| 67766 | case 1108: /* *movv2si_internal */ |
| 67767 | case 1109: /* *movv1di_internal */ |
| 67768 | case 1110: /* *movv2sf_internal */ |
| 67769 | case 1111: /* sse_movntq */ |
| 67770 | case 1136: /* *mmx_concatv2sf */ |
| 67771 | case 1138: /* *vec_extractv2sf_1 */ |
| 67772 | case 1206: /* *mmx_concatv2si */ |
| 67773 | case 1208: /* *vec_extractv2si_1 */ |
| 67774 | case 1218: /* movv64qi_internal */ |
| 67775 | case 1219: /* movv32qi_internal */ |
| 67776 | case 1220: /* movv16qi_internal */ |
| 67777 | case 1221: /* movv32hi_internal */ |
| 67778 | case 1222: /* movv16hi_internal */ |
| 67779 | case 1223: /* movv8hi_internal */ |
| 67780 | case 1224: /* movv16si_internal */ |
| 67781 | case 1225: /* movv8si_internal */ |
| 67782 | case 1226: /* movv4si_internal */ |
| 67783 | case 1227: /* movv8di_internal */ |
| 67784 | case 1228: /* movv4di_internal */ |
| 67785 | case 1229: /* movv2di_internal */ |
| 67786 | case 1230: /* movv4ti_internal */ |
| 67787 | case 1231: /* movv2ti_internal */ |
| 67788 | case 1232: /* movv1ti_internal */ |
| 67789 | case 1233: /* movv16sf_internal */ |
| 67790 | case 1234: /* movv8sf_internal */ |
| 67791 | case 1235: /* movv4sf_internal */ |
| 67792 | case 1236: /* movv8df_internal */ |
| 67793 | case 1237: /* movv4df_internal */ |
| 67794 | case 1238: /* movv2df_internal */ |
| 67795 | case 1241: /* avx512vl_loadv4si_mask */ |
| 67796 | case 1244: /* avx512vl_loadv2di_mask */ |
| 67797 | case 1246: /* avx512vl_loadv8sf_mask */ |
| 67798 | case 1249: /* avx512vl_loadv4df_mask */ |
| 67799 | case 1252: /* avx512vl_loadv16qi_mask */ |
| 67800 | case 1256: /* avx512vl_loadv8hi_mask */ |
| 67801 | case 1257: /* avx512f_blendmv16si */ |
| 67802 | case 1258: /* avx512vl_blendmv8si */ |
| 67803 | case 1259: /* avx512vl_blendmv4si */ |
| 67804 | case 1260: /* avx512f_blendmv8di */ |
| 67805 | case 1261: /* avx512vl_blendmv4di */ |
| 67806 | case 1262: /* avx512vl_blendmv2di */ |
| 67807 | case 1263: /* avx512f_blendmv16sf */ |
| 67808 | case 1264: /* avx512vl_blendmv8sf */ |
| 67809 | case 1265: /* avx512vl_blendmv4sf */ |
| 67810 | case 1266: /* avx512f_blendmv8df */ |
| 67811 | case 1267: /* avx512vl_blendmv4df */ |
| 67812 | case 1268: /* avx512vl_blendmv2df */ |
| 67813 | case 1269: /* avx512bw_blendmv64qi */ |
| 67814 | case 1270: /* avx512vl_blendmv16qi */ |
| 67815 | case 1271: /* avx512vl_blendmv32qi */ |
| 67816 | case 1272: /* avx512bw_blendmv32hi */ |
| 67817 | case 1273: /* avx512vl_blendmv16hi */ |
| 67818 | case 1274: /* avx512vl_blendmv8hi */ |
| 67819 | case 1293: /* sse2_movq128 */ |
| 67820 | case 1295: /* avx_lddqu256 */ |
| 67821 | case 1296: /* sse3_lddqu */ |
| 67822 | case 1297: /* sse2_movntisi */ |
| 67823 | case 1298: /* sse2_movntidi */ |
| 67824 | case 1299: /* avx512f_movntv16sf */ |
| 67825 | case 1300: /* avx_movntv8sf */ |
| 67826 | case 1301: /* sse_movntv4sf */ |
| 67827 | case 1302: /* avx512f_movntv8df */ |
| 67828 | case 1303: /* avx_movntv4df */ |
| 67829 | case 1304: /* sse2_movntv2df */ |
| 67830 | case 1308: /* kandqi */ |
| 67831 | case 1309: /* kiorqi */ |
| 67832 | case 1310: /* kxorqi */ |
| 67833 | case 1311: /* kandhi */ |
| 67834 | case 1312: /* kiorhi */ |
| 67835 | case 1313: /* kxorhi */ |
| 67836 | case 1314: /* kandsi */ |
| 67837 | case 1315: /* kiorsi */ |
| 67838 | case 1316: /* kxorsi */ |
| 67839 | case 1317: /* kanddi */ |
| 67840 | case 1318: /* kiordi */ |
| 67841 | case 1319: /* kxordi */ |
| 67842 | case 1320: /* kandnqi */ |
| 67843 | case 1321: /* kandnhi */ |
| 67844 | case 1322: /* kandnsi */ |
| 67845 | case 1323: /* kandndi */ |
| 67846 | case 1324: /* kxnorqi */ |
| 67847 | case 1325: /* kxnorhi */ |
| 67848 | case 1326: /* kxnorsi */ |
| 67849 | case 1327: /* kxnordi */ |
| 67850 | case 1328: /* knotqi */ |
| 67851 | case 1329: /* knothi */ |
| 67852 | case 1330: /* knotsi */ |
| 67853 | case 1331: /* knotdi */ |
| 67854 | case 1332: /* kaddqi */ |
| 67855 | case 1333: /* kaddhi */ |
| 67856 | case 1334: /* kaddsi */ |
| 67857 | case 1335: /* kadddi */ |
| 67858 | case 1336: /* kashiftqi */ |
| 67859 | case 1337: /* klshiftrtqi */ |
| 67860 | case 1338: /* kashifthi */ |
| 67861 | case 1339: /* klshiftrthi */ |
| 67862 | case 1340: /* kashiftsi */ |
| 67863 | case 1341: /* klshiftrtsi */ |
| 67864 | case 1342: /* kashiftdi */ |
| 67865 | case 1343: /* klshiftrtdi */ |
| 67866 | case 1344: /* ktestqi */ |
| 67867 | case 1345: /* ktesthi */ |
| 67868 | case 1346: /* ktestsi */ |
| 67869 | case 1347: /* ktestdi */ |
| 67870 | case 1348: /* kortestqi */ |
| 67871 | case 1349: /* kortesthi */ |
| 67872 | case 1350: /* kortestsi */ |
| 67873 | case 1351: /* kortestdi */ |
| 67874 | case 1352: /* kunpckhi */ |
| 67875 | case 1425: /* *mulv4sf3 */ |
| 67876 | case 1426: /* *mulv4sf3_round */ |
| 67877 | case 1427: /* *mulv4sf3_mask */ |
| 67878 | case 1428: /* *mulv4sf3_mask_round */ |
| 67879 | case 1437: /* *mulv2df3 */ |
| 67880 | case 1438: /* *mulv2df3_round */ |
| 67881 | case 1439: /* *mulv2df3_mask */ |
| 67882 | case 1440: /* *mulv2df3_mask_round */ |
| 67883 | case 1441: /* sse_vmmulv4sf3 */ |
| 67884 | case 1442: /* sse_vmmulv4sf3_round */ |
| 67885 | case 1445: /* sse2_vmmulv2df3 */ |
| 67886 | case 1446: /* sse2_vmmulv2df3_round */ |
| 67887 | case 1465: /* avx_rcpv8sf2 */ |
| 67888 | case 1466: /* sse_rcpv4sf2 */ |
| 67889 | case 1486: /* avx_sqrtv8sf2 */ |
| 67890 | case 1487: /* avx_sqrtv8sf2_mask */ |
| 67891 | case 1488: /* sse_sqrtv4sf2 */ |
| 67892 | case 1489: /* sse_sqrtv4sf2_mask */ |
| 67893 | case 1494: /* avx_sqrtv4df2 */ |
| 67894 | case 1495: /* avx_sqrtv4df2_mask */ |
| 67895 | case 1496: /* sse2_sqrtv2df2 */ |
| 67896 | case 1497: /* sse2_sqrtv2df2_mask */ |
| 67897 | case 1527: /* *smaxv8sf3 */ |
| 67898 | case 1528: /* *smaxv8sf3_round */ |
| 67899 | case 1529: /* *smaxv8sf3_mask */ |
| 67900 | case 1530: /* *smaxv8sf3_mask_round */ |
| 67901 | case 1531: /* *sminv8sf3 */ |
| 67902 | case 1532: /* *sminv8sf3_round */ |
| 67903 | case 1533: /* *sminv8sf3_mask */ |
| 67904 | case 1534: /* *sminv8sf3_mask_round */ |
| 67905 | case 1535: /* *smaxv4sf3 */ |
| 67906 | case 1536: /* *smaxv4sf3_round */ |
| 67907 | case 1537: /* *smaxv4sf3_mask */ |
| 67908 | case 1538: /* *smaxv4sf3_mask_round */ |
| 67909 | case 1539: /* *sminv4sf3 */ |
| 67910 | case 1540: /* *sminv4sf3_round */ |
| 67911 | case 1541: /* *sminv4sf3_mask */ |
| 67912 | case 1542: /* *sminv4sf3_mask_round */ |
| 67913 | case 1551: /* *smaxv4df3 */ |
| 67914 | case 1552: /* *smaxv4df3_round */ |
| 67915 | case 1553: /* *smaxv4df3_mask */ |
| 67916 | case 1554: /* *smaxv4df3_mask_round */ |
| 67917 | case 1555: /* *sminv4df3 */ |
| 67918 | case 1556: /* *sminv4df3_round */ |
| 67919 | case 1557: /* *sminv4df3_mask */ |
| 67920 | case 1558: /* *sminv4df3_mask_round */ |
| 67921 | case 1559: /* *smaxv2df3 */ |
| 67922 | case 1560: /* *smaxv2df3_round */ |
| 67923 | case 1561: /* *smaxv2df3_mask */ |
| 67924 | case 1562: /* *smaxv2df3_mask_round */ |
| 67925 | case 1563: /* *sminv2df3 */ |
| 67926 | case 1564: /* *sminv2df3_round */ |
| 67927 | case 1565: /* *sminv2df3_mask */ |
| 67928 | case 1566: /* *sminv2df3_mask_round */ |
| 67929 | case 1575: /* ieee_maxv8sf3 */ |
| 67930 | case 1576: /* ieee_maxv8sf3_mask */ |
| 67931 | case 1577: /* ieee_minv8sf3 */ |
| 67932 | case 1578: /* ieee_minv8sf3_mask */ |
| 67933 | case 1579: /* ieee_maxv4sf3 */ |
| 67934 | case 1580: /* ieee_maxv4sf3_mask */ |
| 67935 | case 1581: /* ieee_minv4sf3 */ |
| 67936 | case 1582: /* ieee_minv4sf3_mask */ |
| 67937 | case 1591: /* ieee_maxv4df3 */ |
| 67938 | case 1592: /* ieee_maxv4df3_mask */ |
| 67939 | case 1593: /* ieee_minv4df3 */ |
| 67940 | case 1594: /* ieee_minv4df3_mask */ |
| 67941 | case 1595: /* ieee_maxv2df3 */ |
| 67942 | case 1596: /* ieee_maxv2df3_mask */ |
| 67943 | case 1597: /* ieee_minv2df3 */ |
| 67944 | case 1598: /* ieee_minv2df3_mask */ |
| 67945 | case 1741: /* avx_andnotv8sf3 */ |
| 67946 | case 1742: /* avx_andnotv8sf3_mask */ |
| 67947 | case 1743: /* sse_andnotv4sf3 */ |
| 67948 | case 1744: /* sse_andnotv4sf3_mask */ |
| 67949 | case 1745: /* avx_andnotv4df3 */ |
| 67950 | case 1746: /* avx_andnotv4df3_mask */ |
| 67951 | case 1747: /* sse2_andnotv2df3 */ |
| 67952 | case 1748: /* sse2_andnotv2df3_mask */ |
| 67953 | case 1753: /* *andv8sf3 */ |
| 67954 | case 1754: /* *andv8sf3_mask */ |
| 67955 | case 1755: /* *iorv8sf3 */ |
| 67956 | case 1756: /* *iorv8sf3_mask */ |
| 67957 | case 1757: /* *xorv8sf3 */ |
| 67958 | case 1758: /* *xorv8sf3_mask */ |
| 67959 | case 1759: /* *andv4sf3 */ |
| 67960 | case 1760: /* *andv4sf3_mask */ |
| 67961 | case 1761: /* *iorv4sf3 */ |
| 67962 | case 1762: /* *iorv4sf3_mask */ |
| 67963 | case 1763: /* *xorv4sf3 */ |
| 67964 | case 1764: /* *xorv4sf3_mask */ |
| 67965 | case 1765: /* *andv4df3 */ |
| 67966 | case 1766: /* *andv4df3_mask */ |
| 67967 | case 1767: /* *iorv4df3 */ |
| 67968 | case 1768: /* *iorv4df3_mask */ |
| 67969 | case 1769: /* *xorv4df3 */ |
| 67970 | case 1770: /* *xorv4df3_mask */ |
| 67971 | case 1771: /* *andv2df3 */ |
| 67972 | case 1772: /* *andv2df3_mask */ |
| 67973 | case 1773: /* *iorv2df3 */ |
| 67974 | case 1774: /* *iorv2df3_mask */ |
| 67975 | case 1775: /* *xorv2df3 */ |
| 67976 | case 1776: /* *xorv2df3_mask */ |
| 67977 | case 1789: /* *andnotsf3 */ |
| 67978 | case 1790: /* *andnotdf3 */ |
| 67979 | case 1791: /* *andnottf3 */ |
| 67980 | case 1792: /* *andsf3 */ |
| 67981 | case 1793: /* *iorsf3 */ |
| 67982 | case 1794: /* *xorsf3 */ |
| 67983 | case 1795: /* *anddf3 */ |
| 67984 | case 1796: /* *iordf3 */ |
| 67985 | case 1797: /* *xordf3 */ |
| 67986 | case 1798: /* *andtf3 */ |
| 67987 | case 1799: /* *iortf3 */ |
| 67988 | case 1800: /* *xortf3 */ |
| 67989 | case 2418: /* sse_movhlps */ |
| 67990 | case 2419: /* sse_movlhps */ |
| 67991 | case 2449: /* sse_storehps */ |
| 67992 | case 2450: /* sse_loadhps */ |
| 67993 | case 2451: /* sse_storelps */ |
| 67994 | case 2452: /* sse_loadlps */ |
| 67995 | case 2453: /* sse_movss */ |
| 67996 | case 2459: /* *vec_concatv2sf_sse4_1 */ |
| 67997 | case 2460: /* *vec_concatv2sf_sse */ |
| 67998 | case 2461: /* *vec_concatv4sf */ |
| 67999 | case 2462: /* vec_setv4si_0 */ |
| 68000 | case 2463: /* vec_setv4sf_0 */ |
| 68001 | case 2467: /* *sse4_1_extractps */ |
| 68002 | case 2536: /* *vec_interleave_highv2df */ |
| 68003 | case 2542: /* *vec_interleave_lowv2df */ |
| 68004 | case 2726: /* sse2_storehpd */ |
| 68005 | case 2727: /* *vec_extractv2df_1_sse */ |
| 68006 | case 2728: /* sse2_storelpd */ |
| 68007 | case 2729: /* *vec_extractv2df_0_sse */ |
| 68008 | case 2730: /* sse2_loadhpd */ |
| 68009 | case 2731: /* sse2_loadlpd */ |
| 68010 | case 2732: /* sse2_movsd */ |
| 68011 | case 2735: /* vec_concatv2df */ |
| 68012 | case 2736: /* *avx512f_ss_truncatev16siv16qi2 */ |
| 68013 | case 2737: /* *avx512f_truncatev16siv16qi2 */ |
| 68014 | case 2738: /* *avx512f_us_truncatev16siv16qi2 */ |
| 68015 | case 2745: /* *avx512f_ss_truncatev8div8hi2 */ |
| 68016 | case 2746: /* *avx512f_truncatev8div8hi2 */ |
| 68017 | case 2747: /* *avx512f_us_truncatev8div8hi2 */ |
| 68018 | case 2748: /* avx512f_ss_truncatev16siv16qi2_mask */ |
| 68019 | case 2749: /* avx512f_truncatev16siv16qi2_mask */ |
| 68020 | case 2750: /* avx512f_us_truncatev16siv16qi2_mask */ |
| 68021 | case 2757: /* avx512f_ss_truncatev8div8hi2_mask */ |
| 68022 | case 2758: /* avx512f_truncatev8div8hi2_mask */ |
| 68023 | case 2759: /* avx512f_us_truncatev8div8hi2_mask */ |
| 68024 | case 2766: /* *avx512vl_ss_truncatev4div4si2 */ |
| 68025 | case 2767: /* *avx512vl_truncatev4div4si2 */ |
| 68026 | case 2768: /* *avx512vl_us_truncatev4div4si2 */ |
| 68027 | case 2769: /* *avx512vl_ss_truncatev8siv8hi2 */ |
| 68028 | case 2770: /* *avx512vl_truncatev8siv8hi2 */ |
| 68029 | case 2771: /* *avx512vl_us_truncatev8siv8hi2 */ |
| 68030 | case 2772: /* *avx512vl_ss_truncatev16hiv16qi2 */ |
| 68031 | case 2773: /* *avx512vl_truncatev16hiv16qi2 */ |
| 68032 | case 2774: /* *avx512vl_us_truncatev16hiv16qi2 */ |
| 68033 | case 2775: /* avx512vl_ss_truncatev4div4si2_mask */ |
| 68034 | case 2776: /* avx512vl_truncatev4div4si2_mask */ |
| 68035 | case 2777: /* avx512vl_us_truncatev4div4si2_mask */ |
| 68036 | case 2778: /* avx512vl_ss_truncatev8siv8hi2_mask */ |
| 68037 | case 2779: /* avx512vl_truncatev8siv8hi2_mask */ |
| 68038 | case 2780: /* avx512vl_us_truncatev8siv8hi2_mask */ |
| 68039 | case 2781: /* avx512vl_ss_truncatev16hiv16qi2_mask */ |
| 68040 | case 2782: /* avx512vl_truncatev16hiv16qi2_mask */ |
| 68041 | case 2783: /* avx512vl_us_truncatev16hiv16qi2_mask */ |
| 68042 | case 2784: /* *avx512vl_ss_truncatev4div4qi2 */ |
| 68043 | case 2785: /* *avx512vl_truncatev4div4qi2 */ |
| 68044 | case 2786: /* *avx512vl_us_truncatev4div4qi2 */ |
| 68045 | case 2787: /* *avx512vl_ss_truncatev2div2qi2 */ |
| 68046 | case 2788: /* *avx512vl_truncatev2div2qi2 */ |
| 68047 | case 2789: /* *avx512vl_us_truncatev2div2qi2 */ |
| 68048 | case 2790: /* *avx512vl_ss_truncatev8siv8qi2 */ |
| 68049 | case 2791: /* *avx512vl_truncatev8siv8qi2 */ |
| 68050 | case 2792: /* *avx512vl_us_truncatev8siv8qi2 */ |
| 68051 | case 2793: /* *avx512vl_ss_truncatev4siv4qi2 */ |
| 68052 | case 2794: /* *avx512vl_truncatev4siv4qi2 */ |
| 68053 | case 2795: /* *avx512vl_us_truncatev4siv4qi2 */ |
| 68054 | case 2796: /* *avx512vl_ss_truncatev8hiv8qi2 */ |
| 68055 | case 2797: /* *avx512vl_truncatev8hiv8qi2 */ |
| 68056 | case 2798: /* *avx512vl_us_truncatev8hiv8qi2 */ |
| 68057 | case 2802: /* avx512vl_ss_truncatev2div2qi2_mask */ |
| 68058 | case 2803: /* avx512vl_truncatev2div2qi2_mask */ |
| 68059 | case 2804: /* avx512vl_us_truncatev2div2qi2_mask */ |
| 68060 | case 2805: /* *avx512vl_ss_truncatev2div2qi2_mask_1 */ |
| 68061 | case 2806: /* *avx512vl_truncatev2div2qi2_mask_1 */ |
| 68062 | case 2807: /* *avx512vl_us_truncatev2div2qi2_mask_1 */ |
| 68063 | case 2817: /* avx512vl_ss_truncatev4siv4qi2_mask */ |
| 68064 | case 2818: /* avx512vl_truncatev4siv4qi2_mask */ |
| 68065 | case 2819: /* avx512vl_us_truncatev4siv4qi2_mask */ |
| 68066 | case 2820: /* avx512vl_ss_truncatev4div4qi2_mask */ |
| 68067 | case 2821: /* avx512vl_truncatev4div4qi2_mask */ |
| 68068 | case 2822: /* avx512vl_us_truncatev4div4qi2_mask */ |
| 68069 | case 2823: /* *avx512vl_ss_truncatev4siv4qi2_mask_1 */ |
| 68070 | case 2824: /* *avx512vl_truncatev4siv4qi2_mask_1 */ |
| 68071 | case 2825: /* *avx512vl_us_truncatev4siv4qi2_mask_1 */ |
| 68072 | case 2826: /* *avx512vl_ss_truncatev4div4qi2_mask_1 */ |
| 68073 | case 2827: /* *avx512vl_truncatev4div4qi2_mask_1 */ |
| 68074 | case 2828: /* *avx512vl_us_truncatev4div4qi2_mask_1 */ |
| 68075 | case 2841: /* avx512vl_ss_truncatev8hiv8qi2_mask */ |
| 68076 | case 2842: /* avx512vl_truncatev8hiv8qi2_mask */ |
| 68077 | case 2843: /* avx512vl_us_truncatev8hiv8qi2_mask */ |
| 68078 | case 2844: /* avx512vl_ss_truncatev8siv8qi2_mask */ |
| 68079 | case 2845: /* avx512vl_truncatev8siv8qi2_mask */ |
| 68080 | case 2846: /* avx512vl_us_truncatev8siv8qi2_mask */ |
| 68081 | case 2847: /* *avx512vl_ss_truncatev8hiv8qi2_mask_1 */ |
| 68082 | case 2848: /* *avx512vl_truncatev8hiv8qi2_mask_1 */ |
| 68083 | case 2849: /* *avx512vl_us_truncatev8hiv8qi2_mask_1 */ |
| 68084 | case 2850: /* *avx512vl_ss_truncatev8siv8qi2_mask_1 */ |
| 68085 | case 2851: /* *avx512vl_truncatev8siv8qi2_mask_1 */ |
| 68086 | case 2852: /* *avx512vl_us_truncatev8siv8qi2_mask_1 */ |
| 68087 | case 2859: /* *avx512vl_ss_truncatev4div4hi2 */ |
| 68088 | case 2860: /* *avx512vl_truncatev4div4hi2 */ |
| 68089 | case 2861: /* *avx512vl_us_truncatev4div4hi2 */ |
| 68090 | case 2862: /* *avx512vl_ss_truncatev2div2hi2 */ |
| 68091 | case 2863: /* *avx512vl_truncatev2div2hi2 */ |
| 68092 | case 2864: /* *avx512vl_us_truncatev2div2hi2 */ |
| 68093 | case 2865: /* *avx512vl_ss_truncatev4siv4hi2 */ |
| 68094 | case 2866: /* *avx512vl_truncatev4siv4hi2 */ |
| 68095 | case 2867: /* *avx512vl_us_truncatev4siv4hi2 */ |
| 68096 | case 2874: /* avx512vl_ss_truncatev4siv4hi2_mask */ |
| 68097 | case 2875: /* avx512vl_truncatev4siv4hi2_mask */ |
| 68098 | case 2876: /* avx512vl_us_truncatev4siv4hi2_mask */ |
| 68099 | case 2877: /* avx512vl_ss_truncatev4div4hi2_mask */ |
| 68100 | case 2878: /* avx512vl_truncatev4div4hi2_mask */ |
| 68101 | case 2879: /* avx512vl_us_truncatev4div4hi2_mask */ |
| 68102 | case 2880: /* *avx512vl_ss_truncatev4siv4hi2_mask_1 */ |
| 68103 | case 2881: /* *avx512vl_truncatev4siv4hi2_mask_1 */ |
| 68104 | case 2882: /* *avx512vl_us_truncatev4siv4hi2_mask_1 */ |
| 68105 | case 2883: /* *avx512vl_ss_truncatev4div4hi2_mask_1 */ |
| 68106 | case 2884: /* *avx512vl_truncatev4div4hi2_mask_1 */ |
| 68107 | case 2885: /* *avx512vl_us_truncatev4div4hi2_mask_1 */ |
| 68108 | case 2895: /* avx512vl_ss_truncatev2div2hi2_mask */ |
| 68109 | case 2896: /* avx512vl_truncatev2div2hi2_mask */ |
| 68110 | case 2897: /* avx512vl_us_truncatev2div2hi2_mask */ |
| 68111 | case 2898: /* *avx512vl_ss_truncatev2div2hi2_mask_1 */ |
| 68112 | case 2899: /* *avx512vl_truncatev2div2hi2_mask_1 */ |
| 68113 | case 2900: /* *avx512vl_us_truncatev2div2hi2_mask_1 */ |
| 68114 | case 2904: /* *avx512vl_ss_truncatev2div2si2 */ |
| 68115 | case 2905: /* *avx512vl_truncatev2div2si2 */ |
| 68116 | case 2906: /* *avx512vl_us_truncatev2div2si2 */ |
| 68117 | case 2910: /* avx512vl_ss_truncatev2div2si2_mask */ |
| 68118 | case 2911: /* avx512vl_truncatev2div2si2_mask */ |
| 68119 | case 2912: /* avx512vl_us_truncatev2div2si2_mask */ |
| 68120 | case 2913: /* *avx512vl_ss_truncatev2div2si2_mask_1 */ |
| 68121 | case 2914: /* *avx512vl_truncatev2div2si2_mask_1 */ |
| 68122 | case 2915: /* *avx512vl_us_truncatev2div2si2_mask_1 */ |
| 68123 | case 2919: /* *avx512f_ss_truncatev8div16qi2 */ |
| 68124 | case 2920: /* *avx512f_truncatev8div16qi2 */ |
| 68125 | case 2921: /* *avx512f_us_truncatev8div16qi2 */ |
| 68126 | case 2925: /* avx512f_ss_truncatev8div16qi2_mask */ |
| 68127 | case 2926: /* avx512f_truncatev8div16qi2_mask */ |
| 68128 | case 2927: /* avx512f_us_truncatev8div16qi2_mask */ |
| 68129 | case 2928: /* *avx512f_ss_truncatev8div16qi2_mask_1 */ |
| 68130 | case 2929: /* *avx512f_truncatev8div16qi2_mask_1 */ |
| 68131 | case 2930: /* *avx512f_us_truncatev8div16qi2_mask_1 */ |
| 68132 | case 3384: /* *andnotv16si3 */ |
| 68133 | case 3385: /* *andnotv8di3 */ |
| 68134 | case 3386: /* *andnotv64qi3 */ |
| 68135 | case 3387: /* *andnotv32qi3 */ |
| 68136 | case 3388: /* *andnotv16qi3 */ |
| 68137 | case 3389: /* *andnotv32hi3 */ |
| 68138 | case 3390: /* *andnotv16hi3 */ |
| 68139 | case 3391: /* *andnotv8hi3 */ |
| 68140 | case 3392: /* *andnotv8si3 */ |
| 68141 | case 3393: /* *andnotv4si3 */ |
| 68142 | case 3394: /* *andnotv4di3 */ |
| 68143 | case 3395: /* *andnotv2di3 */ |
| 68144 | case 3402: /* *andv16si3 */ |
| 68145 | case 3403: /* andv16si3_mask */ |
| 68146 | case 3404: /* *iorv16si3 */ |
| 68147 | case 3405: /* iorv16si3_mask */ |
| 68148 | case 3406: /* *xorv16si3 */ |
| 68149 | case 3407: /* xorv16si3_mask */ |
| 68150 | case 3408: /* *andv8si3 */ |
| 68151 | case 3409: /* andv8si3_mask */ |
| 68152 | case 3410: /* *iorv8si3 */ |
| 68153 | case 3411: /* iorv8si3_mask */ |
| 68154 | case 3412: /* *xorv8si3 */ |
| 68155 | case 3413: /* xorv8si3_mask */ |
| 68156 | case 3414: /* *andv4si3 */ |
| 68157 | case 3415: /* andv4si3_mask */ |
| 68158 | case 3416: /* *iorv4si3 */ |
| 68159 | case 3417: /* iorv4si3_mask */ |
| 68160 | case 3418: /* *xorv4si3 */ |
| 68161 | case 3419: /* xorv4si3_mask */ |
| 68162 | case 3420: /* *andv8di3 */ |
| 68163 | case 3421: /* andv8di3_mask */ |
| 68164 | case 3422: /* *iorv8di3 */ |
| 68165 | case 3423: /* iorv8di3_mask */ |
| 68166 | case 3424: /* *xorv8di3 */ |
| 68167 | case 3425: /* xorv8di3_mask */ |
| 68168 | case 3426: /* *andv4di3 */ |
| 68169 | case 3427: /* andv4di3_mask */ |
| 68170 | case 3428: /* *iorv4di3 */ |
| 68171 | case 3429: /* iorv4di3_mask */ |
| 68172 | case 3430: /* *xorv4di3 */ |
| 68173 | case 3431: /* xorv4di3_mask */ |
| 68174 | case 3432: /* *andv2di3 */ |
| 68175 | case 3433: /* andv2di3_mask */ |
| 68176 | case 3434: /* *iorv2di3 */ |
| 68177 | case 3435: /* iorv2di3_mask */ |
| 68178 | case 3436: /* *xorv2di3 */ |
| 68179 | case 3437: /* xorv2di3_mask */ |
| 68180 | case 3438: /* *andv64qi3 */ |
| 68181 | case 3439: /* *iorv64qi3 */ |
| 68182 | case 3440: /* *xorv64qi3 */ |
| 68183 | case 3441: /* *andv32qi3 */ |
| 68184 | case 3442: /* *iorv32qi3 */ |
| 68185 | case 3443: /* *xorv32qi3 */ |
| 68186 | case 3444: /* *andv16qi3 */ |
| 68187 | case 3445: /* *iorv16qi3 */ |
| 68188 | case 3446: /* *xorv16qi3 */ |
| 68189 | case 3447: /* *andv32hi3 */ |
| 68190 | case 3448: /* *iorv32hi3 */ |
| 68191 | case 3449: /* *xorv32hi3 */ |
| 68192 | case 3450: /* *andv16hi3 */ |
| 68193 | case 3451: /* *iorv16hi3 */ |
| 68194 | case 3452: /* *xorv16hi3 */ |
| 68195 | case 3453: /* *andv8hi3 */ |
| 68196 | case 3454: /* *iorv8hi3 */ |
| 68197 | case 3455: /* *xorv8hi3 */ |
| 68198 | case 3620: /* sse2_loadld */ |
| 68199 | case 3634: /* *vec_extractv4si */ |
| 68200 | case 3638: /* *vec_extractv2di_1 */ |
| 68201 | case 3639: /* *vec_concatv2si_sse4_1 */ |
| 68202 | case 3640: /* *vec_concatv2si */ |
| 68203 | case 3641: /* *vec_concatv4si */ |
| 68204 | case 3642: /* vec_concatv2di */ |
| 68205 | case 3658: /* avx_movmskps256 */ |
| 68206 | case 3659: /* sse_movmskps */ |
| 68207 | case 3660: /* avx_movmskpd256 */ |
| 68208 | case 3661: /* sse2_movmskpd */ |
| 68209 | case 3662: /* *avx_movmskps256_zext */ |
| 68210 | case 3663: /* *sse_movmskps_zext */ |
| 68211 | case 3664: /* *avx_movmskpd256_zext */ |
| 68212 | case 3665: /* *sse2_movmskpd_zext */ |
| 68213 | case 3666: /* avx2_pmovmskb */ |
| 68214 | case 3667: /* sse2_pmovmskb */ |
| 68215 | case 3668: /* *avx2_pmovmskb_zext */ |
| 68216 | case 3669: /* *sse2_pmovmskb_zext */ |
| 68217 | case 3670: /* *sse2_maskmovdqu */ |
| 68218 | case 3671: /* *sse2_maskmovdqu */ |
| 68219 | case 3764: /* sse4a_movntsf */ |
| 68220 | case 3765: /* sse4a_movntdf */ |
| 68221 | case 3766: /* sse4a_vmmovntv4sf */ |
| 68222 | case 3767: /* sse4a_vmmovntv2df */ |
| 68223 | case 3772: /* avx_blendps256 */ |
| 68224 | case 3773: /* sse4_1_blendps */ |
| 68225 | case 3774: /* avx_blendpd256 */ |
| 68226 | case 3775: /* sse4_1_blendpd */ |
| 68227 | case 3776: /* avx_blendvps256 */ |
| 68228 | case 3778: /* avx_blendvpd256 */ |
| 68229 | case 3781: /* sse4_1_dpps */ |
| 68230 | case 3783: /* sse4_1_dppd */ |
| 68231 | case 3784: /* avx512f_movntdqa */ |
| 68232 | case 3785: /* avx2_movntdqa */ |
| 68233 | case 3786: /* sse4_1_movntdqa */ |
| 68234 | case 3795: /* avx2_pblendvb */ |
| 68235 | case 3796: /* sse4_1_pblendvb */ |
| 68236 | case 3797: /* sse4_1_pblendw */ |
| 68237 | case 3798: /* *avx2_pblendw */ |
| 68238 | case 3799: /* avx2_pblenddv8si */ |
| 68239 | case 3800: /* avx2_pblenddv4si */ |
| 68240 | case 3802: /* avx2_sign_extendv16qiv16hi2 */ |
| 68241 | case 3803: /* avx2_sign_extendv16qiv16hi2_mask */ |
| 68242 | case 3804: /* avx2_zero_extendv16qiv16hi2 */ |
| 68243 | case 3805: /* avx2_zero_extendv16qiv16hi2_mask */ |
| 68244 | case 3806: /* avx512bw_sign_extendv32qiv32hi2 */ |
| 68245 | case 3807: /* avx512bw_sign_extendv32qiv32hi2_mask */ |
| 68246 | case 3808: /* avx512bw_zero_extendv32qiv32hi2 */ |
| 68247 | case 3809: /* avx512bw_zero_extendv32qiv32hi2_mask */ |
| 68248 | case 3810: /* sse4_1_sign_extendv8qiv8hi2 */ |
| 68249 | case 3811: /* sse4_1_sign_extendv8qiv8hi2_mask */ |
| 68250 | case 3812: /* sse4_1_zero_extendv8qiv8hi2 */ |
| 68251 | case 3813: /* sse4_1_zero_extendv8qiv8hi2_mask */ |
| 68252 | case 3814: /* *avx512f_sign_extendv16qiv16si2 */ |
| 68253 | case 3815: /* avx512f_sign_extendv16qiv16si2_mask */ |
| 68254 | case 3816: /* *avx512f_zero_extendv16qiv16si2 */ |
| 68255 | case 3817: /* avx512f_zero_extendv16qiv16si2_mask */ |
| 68256 | case 3818: /* avx2_sign_extendv8qiv8si2 */ |
| 68257 | case 3819: /* avx2_sign_extendv8qiv8si2_mask */ |
| 68258 | case 3820: /* avx2_zero_extendv8qiv8si2 */ |
| 68259 | case 3821: /* avx2_zero_extendv8qiv8si2_mask */ |
| 68260 | case 3822: /* sse4_1_sign_extendv4qiv4si2 */ |
| 68261 | case 3823: /* sse4_1_sign_extendv4qiv4si2_mask */ |
| 68262 | case 3824: /* sse4_1_zero_extendv4qiv4si2 */ |
| 68263 | case 3825: /* sse4_1_zero_extendv4qiv4si2_mask */ |
| 68264 | case 3826: /* avx512f_sign_extendv16hiv16si2 */ |
| 68265 | case 3827: /* avx512f_sign_extendv16hiv16si2_mask */ |
| 68266 | case 3828: /* avx512f_zero_extendv16hiv16si2 */ |
| 68267 | case 3829: /* avx512f_zero_extendv16hiv16si2_mask */ |
| 68268 | case 3830: /* avx2_sign_extendv8hiv8si2 */ |
| 68269 | case 3831: /* avx2_sign_extendv8hiv8si2_mask */ |
| 68270 | case 3832: /* avx2_zero_extendv8hiv8si2 */ |
| 68271 | case 3833: /* avx2_zero_extendv8hiv8si2_mask */ |
| 68272 | case 3834: /* sse4_1_sign_extendv4hiv4si2 */ |
| 68273 | case 3835: /* sse4_1_sign_extendv4hiv4si2_mask */ |
| 68274 | case 3836: /* sse4_1_zero_extendv4hiv4si2 */ |
| 68275 | case 3837: /* sse4_1_zero_extendv4hiv4si2_mask */ |
| 68276 | case 3838: /* avx512f_sign_extendv8qiv8di2 */ |
| 68277 | case 3839: /* avx512f_sign_extendv8qiv8di2_mask */ |
| 68278 | case 3840: /* avx512f_zero_extendv8qiv8di2 */ |
| 68279 | case 3841: /* avx512f_zero_extendv8qiv8di2_mask */ |
| 68280 | case 3842: /* avx2_sign_extendv4qiv4di2 */ |
| 68281 | case 3843: /* avx2_sign_extendv4qiv4di2_mask */ |
| 68282 | case 3844: /* avx2_zero_extendv4qiv4di2 */ |
| 68283 | case 3845: /* avx2_zero_extendv4qiv4di2_mask */ |
| 68284 | case 3846: /* sse4_1_sign_extendv2qiv2di2 */ |
| 68285 | case 3847: /* sse4_1_sign_extendv2qiv2di2_mask */ |
| 68286 | case 3848: /* sse4_1_zero_extendv2qiv2di2 */ |
| 68287 | case 3849: /* sse4_1_zero_extendv2qiv2di2_mask */ |
| 68288 | case 3850: /* avx512f_sign_extendv8hiv8di2 */ |
| 68289 | case 3851: /* avx512f_sign_extendv8hiv8di2_mask */ |
| 68290 | case 3852: /* avx512f_zero_extendv8hiv8di2 */ |
| 68291 | case 3853: /* avx512f_zero_extendv8hiv8di2_mask */ |
| 68292 | case 3854: /* avx2_sign_extendv4hiv4di2 */ |
| 68293 | case 3855: /* avx2_sign_extendv4hiv4di2_mask */ |
| 68294 | case 3856: /* avx2_zero_extendv4hiv4di2 */ |
| 68295 | case 3857: /* avx2_zero_extendv4hiv4di2_mask */ |
| 68296 | case 3858: /* sse4_1_sign_extendv2hiv2di2 */ |
| 68297 | case 3859: /* sse4_1_sign_extendv2hiv2di2_mask */ |
| 68298 | case 3860: /* sse4_1_zero_extendv2hiv2di2 */ |
| 68299 | case 3861: /* sse4_1_zero_extendv2hiv2di2_mask */ |
| 68300 | case 3862: /* avx512f_sign_extendv8siv8di2 */ |
| 68301 | case 3863: /* avx512f_sign_extendv8siv8di2_mask */ |
| 68302 | case 3864: /* avx512f_zero_extendv8siv8di2 */ |
| 68303 | case 3865: /* avx512f_zero_extendv8siv8di2_mask */ |
| 68304 | case 3866: /* avx2_sign_extendv4siv4di2 */ |
| 68305 | case 3867: /* avx2_sign_extendv4siv4di2_mask */ |
| 68306 | case 3868: /* avx2_zero_extendv4siv4di2 */ |
| 68307 | case 3869: /* avx2_zero_extendv4siv4di2_mask */ |
| 68308 | case 3870: /* sse4_1_sign_extendv2siv2di2 */ |
| 68309 | case 3871: /* sse4_1_sign_extendv2siv2di2_mask */ |
| 68310 | case 3872: /* sse4_1_zero_extendv2siv2di2 */ |
| 68311 | case 3873: /* sse4_1_zero_extendv2siv2di2_mask */ |
| 68312 | case 4057: /* avx2_pbroadcastv16si */ |
| 68313 | case 4058: /* avx2_pbroadcastv8di */ |
| 68314 | case 4059: /* avx2_pbroadcastv64qi */ |
| 68315 | case 4060: /* avx2_pbroadcastv32qi */ |
| 68316 | case 4061: /* avx2_pbroadcastv16qi */ |
| 68317 | case 4062: /* avx2_pbroadcastv32hi */ |
| 68318 | case 4063: /* avx2_pbroadcastv16hi */ |
| 68319 | case 4064: /* avx2_pbroadcastv8hi */ |
| 68320 | case 4065: /* avx2_pbroadcastv8si */ |
| 68321 | case 4066: /* avx2_pbroadcastv4si */ |
| 68322 | case 4067: /* avx2_pbroadcastv4di */ |
| 68323 | case 4068: /* avx2_pbroadcastv2di */ |
| 68324 | case 4069: /* avx2_pbroadcastv32qi_1 */ |
| 68325 | case 4070: /* avx2_pbroadcastv16hi_1 */ |
| 68326 | case 4071: /* avx2_pbroadcastv8si_1 */ |
| 68327 | case 4072: /* avx2_pbroadcastv4di_1 */ |
| 68328 | case 4110: /* avx2_vec_dupv4df */ |
| 68329 | case 4111: /* avx512f_vec_dupv16si_1 */ |
| 68330 | case 4112: /* avx512f_vec_dupv8di_1 */ |
| 68331 | case 4113: /* avx512bw_vec_dupv32hi_1 */ |
| 68332 | case 4114: /* avx512bw_vec_dupv64qi_1 */ |
| 68333 | case 4115: /* avx512f_vec_dupv16si */ |
| 68334 | case 4116: /* avx512f_vec_dupv16si_mask */ |
| 68335 | case 4117: /* avx512vl_vec_dupv8si */ |
| 68336 | case 4118: /* avx512vl_vec_dupv8si_mask */ |
| 68337 | case 4119: /* avx512vl_vec_dupv4si */ |
| 68338 | case 4120: /* avx512vl_vec_dupv4si_mask */ |
| 68339 | case 4121: /* avx512f_vec_dupv8di */ |
| 68340 | case 4122: /* avx512f_vec_dupv8di_mask */ |
| 68341 | case 4123: /* avx512vl_vec_dupv4di */ |
| 68342 | case 4124: /* avx512vl_vec_dupv4di_mask */ |
| 68343 | case 4125: /* avx512vl_vec_dupv2di */ |
| 68344 | case 4126: /* avx512vl_vec_dupv2di_mask */ |
| 68345 | case 4127: /* avx512f_vec_dupv16sf */ |
| 68346 | case 4128: /* avx512f_vec_dupv16sf_mask */ |
| 68347 | case 4129: /* avx512vl_vec_dupv8sf */ |
| 68348 | case 4130: /* avx512vl_vec_dupv8sf_mask */ |
| 68349 | case 4131: /* avx512vl_vec_dupv4sf */ |
| 68350 | case 4132: /* avx512vl_vec_dupv4sf_mask */ |
| 68351 | case 4133: /* avx512f_vec_dupv8df */ |
| 68352 | case 4134: /* avx512f_vec_dupv8df_mask */ |
| 68353 | case 4135: /* avx512vl_vec_dupv4df */ |
| 68354 | case 4136: /* avx512vl_vec_dupv4df_mask */ |
| 68355 | case 4137: /* avx512vl_vec_dupv2df */ |
| 68356 | case 4138: /* avx512vl_vec_dupv2df_mask */ |
| 68357 | case 4139: /* avx512bw_vec_dupv64qi */ |
| 68358 | case 4140: /* avx512bw_vec_dupv64qi_mask */ |
| 68359 | case 4141: /* avx512vl_vec_dupv16qi */ |
| 68360 | case 4142: /* avx512vl_vec_dupv16qi_mask */ |
| 68361 | case 4143: /* avx512vl_vec_dupv32qi */ |
| 68362 | case 4144: /* avx512vl_vec_dupv32qi_mask */ |
| 68363 | case 4145: /* avx512bw_vec_dupv32hi */ |
| 68364 | case 4146: /* avx512bw_vec_dupv32hi_mask */ |
| 68365 | case 4147: /* avx512vl_vec_dupv16hi */ |
| 68366 | case 4148: /* avx512vl_vec_dupv16hi_mask */ |
| 68367 | case 4149: /* avx512vl_vec_dupv8hi */ |
| 68368 | case 4150: /* avx512vl_vec_dupv8hi_mask */ |
| 68369 | case 4151: /* *avx512f_broadcastv16sf */ |
| 68370 | case 4152: /* avx512f_broadcastv16sf_mask */ |
| 68371 | case 4153: /* *avx512f_broadcastv16si */ |
| 68372 | case 4154: /* avx512f_broadcastv16si_mask */ |
| 68373 | case 4155: /* *avx512f_broadcastv8df */ |
| 68374 | case 4156: /* avx512f_broadcastv8df_mask */ |
| 68375 | case 4157: /* *avx512f_broadcastv8di */ |
| 68376 | case 4158: /* avx512f_broadcastv8di_mask */ |
| 68377 | case 4159: /* *avx512bw_vec_dup_gprv64qi */ |
| 68378 | case 4160: /* avx512bw_vec_dup_gprv64qi_mask */ |
| 68379 | case 4161: /* *avx512vl_vec_dup_gprv16qi */ |
| 68380 | case 4162: /* avx512vl_vec_dup_gprv16qi_mask */ |
| 68381 | case 4163: /* *avx512vl_vec_dup_gprv32qi */ |
| 68382 | case 4164: /* avx512vl_vec_dup_gprv32qi_mask */ |
| 68383 | case 4165: /* *avx512bw_vec_dup_gprv32hi */ |
| 68384 | case 4166: /* avx512bw_vec_dup_gprv32hi_mask */ |
| 68385 | case 4167: /* *avx512vl_vec_dup_gprv16hi */ |
| 68386 | case 4168: /* avx512vl_vec_dup_gprv16hi_mask */ |
| 68387 | case 4169: /* *avx512vl_vec_dup_gprv8hi */ |
| 68388 | case 4170: /* avx512vl_vec_dup_gprv8hi_mask */ |
| 68389 | case 4171: /* *avx512f_vec_dup_gprv16si */ |
| 68390 | case 4172: /* avx512f_vec_dup_gprv16si_mask */ |
| 68391 | case 4173: /* *avx512vl_vec_dup_gprv8si */ |
| 68392 | case 4174: /* avx512vl_vec_dup_gprv8si_mask */ |
| 68393 | case 4175: /* *avx512vl_vec_dup_gprv4si */ |
| 68394 | case 4176: /* avx512vl_vec_dup_gprv4si_mask */ |
| 68395 | case 4177: /* *avx512f_vec_dup_gprv8di */ |
| 68396 | case 4178: /* avx512f_vec_dup_gprv8di_mask */ |
| 68397 | case 4179: /* *avx512vl_vec_dup_gprv4di */ |
| 68398 | case 4180: /* avx512vl_vec_dup_gprv4di_mask */ |
| 68399 | case 4181: /* *avx512vl_vec_dup_gprv2di */ |
| 68400 | case 4182: /* avx512vl_vec_dup_gprv2di_mask */ |
| 68401 | case 4183: /* *avx512f_vec_dup_gprv16sf */ |
| 68402 | case 4184: /* avx512f_vec_dup_gprv16sf_mask */ |
| 68403 | case 4185: /* *avx512vl_vec_dup_gprv8sf */ |
| 68404 | case 4186: /* avx512vl_vec_dup_gprv8sf_mask */ |
| 68405 | case 4187: /* *avx512vl_vec_dup_gprv4sf */ |
| 68406 | case 4188: /* avx512vl_vec_dup_gprv4sf_mask */ |
| 68407 | case 4189: /* *avx512f_vec_dup_gprv8df */ |
| 68408 | case 4190: /* avx512f_vec_dup_gprv8df_mask */ |
| 68409 | case 4191: /* *avx512vl_vec_dup_gprv4df */ |
| 68410 | case 4192: /* avx512vl_vec_dup_gprv4df_mask */ |
| 68411 | case 4193: /* *avx512vl_vec_dup_gprv2df */ |
| 68412 | case 4194: /* avx512vl_vec_dup_gprv2df_mask */ |
| 68413 | case 4195: /* vec_dupv4sf */ |
| 68414 | case 4196: /* *vec_dupv4si */ |
| 68415 | case 4197: /* *vec_dupv2di */ |
| 68416 | case 4198: /* avx2_vbroadcasti128_v32qi */ |
| 68417 | case 4199: /* avx2_vbroadcasti128_v16hi */ |
| 68418 | case 4200: /* avx2_vbroadcasti128_v8si */ |
| 68419 | case 4201: /* avx2_vbroadcasti128_v4di */ |
| 68420 | case 4202: /* *vec_dupv32qi */ |
| 68421 | case 4203: /* *vec_dupv16qi */ |
| 68422 | case 4204: /* *vec_dupv16hi */ |
| 68423 | case 4205: /* *vec_dupv8hi */ |
| 68424 | case 4206: /* *vec_dupv8si */ |
| 68425 | case 4207: /* *vec_dupv4si */ |
| 68426 | case 4208: /* vec_dupv8si */ |
| 68427 | case 4209: /* vec_dupv8sf */ |
| 68428 | case 4210: /* vec_dupv4di */ |
| 68429 | case 4211: /* vec_dupv4df */ |
| 68430 | case 4212: /* avx_vbroadcastf128_v32qi */ |
| 68431 | case 4213: /* avx_vbroadcastf128_v16hi */ |
| 68432 | case 4214: /* avx_vbroadcastf128_v8si */ |
| 68433 | case 4215: /* avx_vbroadcastf128_v4di */ |
| 68434 | case 4216: /* avx_vbroadcastf128_v8sf */ |
| 68435 | case 4217: /* avx_vbroadcastf128_v4df */ |
| 68436 | case 4218: /* *avx512dq_broadcastv16si */ |
| 68437 | case 4219: /* avx512dq_broadcastv16si_mask */ |
| 68438 | case 4220: /* *avx512dq_broadcastv8si */ |
| 68439 | case 4221: /* avx512dq_broadcastv8si_mask */ |
| 68440 | case 4222: /* *avx512dq_broadcastv4si */ |
| 68441 | case 4223: /* avx512dq_broadcastv4si_mask */ |
| 68442 | case 4224: /* *avx512dq_broadcastv16sf */ |
| 68443 | case 4225: /* avx512dq_broadcastv16sf_mask */ |
| 68444 | case 4226: /* *avx512dq_broadcastv8sf */ |
| 68445 | case 4227: /* avx512dq_broadcastv8sf_mask */ |
| 68446 | case 4228: /* *avx512vl_broadcastv8si_1 */ |
| 68447 | case 4229: /* avx512vl_broadcastv8si_mask_1 */ |
| 68448 | case 4230: /* *avx512vl_broadcastv8sf_1 */ |
| 68449 | case 4231: /* avx512vl_broadcastv8sf_mask_1 */ |
| 68450 | case 4232: /* *avx512dq_broadcastv16sf_1 */ |
| 68451 | case 4233: /* avx512dq_broadcastv16sf_mask_1 */ |
| 68452 | case 4234: /* *avx512dq_broadcastv16si_1 */ |
| 68453 | case 4235: /* avx512dq_broadcastv16si_mask_1 */ |
| 68454 | case 4236: /* *avx512dq_broadcastv8di_1 */ |
| 68455 | case 4237: /* avx512dq_broadcastv8di_mask_1 */ |
| 68456 | case 4238: /* *avx512dq_broadcastv8df_1 */ |
| 68457 | case 4239: /* avx512dq_broadcastv8df_mask_1 */ |
| 68458 | case 4240: /* *avx512dq_broadcastv4di_1 */ |
| 68459 | case 4241: /* avx512dq_broadcastv4di_mask_1 */ |
| 68460 | case 4242: /* *avx512dq_broadcastv4df_1 */ |
| 68461 | case 4243: /* avx512dq_broadcastv4df_mask_1 */ |
| 68462 | case 4250: /* *avx_vperm_broadcast_v4sf */ |
| 68463 | case 4490: /* avx_vec_concatv32qi */ |
| 68464 | case 4491: /* avx_vec_concatv16hi */ |
| 68465 | case 4492: /* avx_vec_concatv8si */ |
| 68466 | case 4493: /* avx_vec_concatv4di */ |
| 68467 | case 4494: /* avx_vec_concatv8sf */ |
| 68468 | case 4495: /* avx_vec_concatv4df */ |
| 68469 | case 4496: /* avx_vec_concatv64qi */ |
| 68470 | case 4497: /* avx_vec_concatv32hi */ |
| 68471 | case 4498: /* avx_vec_concatv16si */ |
| 68472 | case 4499: /* avx_vec_concatv8di */ |
| 68473 | case 4500: /* avx_vec_concatv16sf */ |
| 68474 | case 4501: /* avx_vec_concatv8df */ |
| 68475 | case 4519: /* *avx2_gathersiv2di */ |
| 68476 | case 4520: /* *avx2_gathersiv2di */ |
| 68477 | case 4521: /* *avx2_gathersiv2df */ |
| 68478 | case 4522: /* *avx2_gathersiv2df */ |
| 68479 | case 4523: /* *avx2_gathersiv4di */ |
| 68480 | case 4524: /* *avx2_gathersiv4di */ |
| 68481 | case 4525: /* *avx2_gathersiv4df */ |
| 68482 | case 4526: /* *avx2_gathersiv4df */ |
| 68483 | case 4527: /* *avx2_gathersiv4si */ |
| 68484 | case 4528: /* *avx2_gathersiv4si */ |
| 68485 | case 4529: /* *avx2_gathersiv4sf */ |
| 68486 | case 4530: /* *avx2_gathersiv4sf */ |
| 68487 | case 4531: /* *avx2_gathersiv8si */ |
| 68488 | case 4532: /* *avx2_gathersiv8si */ |
| 68489 | case 4533: /* *avx2_gathersiv8sf */ |
| 68490 | case 4534: /* *avx2_gathersiv8sf */ |
| 68491 | case 4535: /* *avx2_gathersiv2di_2 */ |
| 68492 | case 4536: /* *avx2_gathersiv2di_2 */ |
| 68493 | case 4537: /* *avx2_gathersiv2df_2 */ |
| 68494 | case 4538: /* *avx2_gathersiv2df_2 */ |
| 68495 | case 4539: /* *avx2_gathersiv4di_2 */ |
| 68496 | case 4540: /* *avx2_gathersiv4di_2 */ |
| 68497 | case 4541: /* *avx2_gathersiv4df_2 */ |
| 68498 | case 4542: /* *avx2_gathersiv4df_2 */ |
| 68499 | case 4543: /* *avx2_gathersiv4si_2 */ |
| 68500 | case 4544: /* *avx2_gathersiv4si_2 */ |
| 68501 | case 4545: /* *avx2_gathersiv4sf_2 */ |
| 68502 | case 4546: /* *avx2_gathersiv4sf_2 */ |
| 68503 | case 4547: /* *avx2_gathersiv8si_2 */ |
| 68504 | case 4548: /* *avx2_gathersiv8si_2 */ |
| 68505 | case 4549: /* *avx2_gathersiv8sf_2 */ |
| 68506 | case 4550: /* *avx2_gathersiv8sf_2 */ |
| 68507 | case 4551: /* *avx2_gatherdiv2di */ |
| 68508 | case 4552: /* *avx2_gatherdiv2di */ |
| 68509 | case 4553: /* *avx2_gatherdiv2df */ |
| 68510 | case 4554: /* *avx2_gatherdiv2df */ |
| 68511 | case 4555: /* *avx2_gatherdiv4di */ |
| 68512 | case 4556: /* *avx2_gatherdiv4di */ |
| 68513 | case 4557: /* *avx2_gatherdiv4df */ |
| 68514 | case 4558: /* *avx2_gatherdiv4df */ |
| 68515 | case 4559: /* *avx2_gatherdiv4si */ |
| 68516 | case 4560: /* *avx2_gatherdiv4si */ |
| 68517 | case 4561: /* *avx2_gatherdiv4sf */ |
| 68518 | case 4562: /* *avx2_gatherdiv4sf */ |
| 68519 | case 4563: /* *avx2_gatherdiv8si */ |
| 68520 | case 4564: /* *avx2_gatherdiv8si */ |
| 68521 | case 4565: /* *avx2_gatherdiv8sf */ |
| 68522 | case 4566: /* *avx2_gatherdiv8sf */ |
| 68523 | case 4567: /* *avx2_gatherdiv2di_2 */ |
| 68524 | case 4568: /* *avx2_gatherdiv2di_2 */ |
| 68525 | case 4569: /* *avx2_gatherdiv2df_2 */ |
| 68526 | case 4570: /* *avx2_gatherdiv2df_2 */ |
| 68527 | case 4571: /* *avx2_gatherdiv4di_2 */ |
| 68528 | case 4572: /* *avx2_gatherdiv4di_2 */ |
| 68529 | case 4573: /* *avx2_gatherdiv4df_2 */ |
| 68530 | case 4574: /* *avx2_gatherdiv4df_2 */ |
| 68531 | case 4575: /* *avx2_gatherdiv4si_2 */ |
| 68532 | case 4576: /* *avx2_gatherdiv4si_2 */ |
| 68533 | case 4577: /* *avx2_gatherdiv4sf_2 */ |
| 68534 | case 4578: /* *avx2_gatherdiv4sf_2 */ |
| 68535 | case 4579: /* *avx2_gatherdiv8si_2 */ |
| 68536 | case 4580: /* *avx2_gatherdiv8si_2 */ |
| 68537 | case 4581: /* *avx2_gatherdiv8sf_2 */ |
| 68538 | case 4582: /* *avx2_gatherdiv8sf_2 */ |
| 68539 | case 4583: /* *avx2_gatherdiv8si_3 */ |
| 68540 | case 4584: /* *avx2_gatherdiv8si_3 */ |
| 68541 | case 4585: /* *avx2_gatherdiv8sf_3 */ |
| 68542 | case 4586: /* *avx2_gatherdiv8sf_3 */ |
| 68543 | case 4587: /* *avx2_gatherdiv8si_4 */ |
| 68544 | case 4588: /* *avx2_gatherdiv8si_4 */ |
| 68545 | case 4589: /* *avx2_gatherdiv8sf_4 */ |
| 68546 | case 4590: /* *avx2_gatherdiv8sf_4 */ |
| 68547 | case 4591: /* *avx512f_gathersiv16si */ |
| 68548 | case 4592: /* *avx512f_gathersiv16si */ |
| 68549 | case 4593: /* *avx512f_gathersiv16sf */ |
| 68550 | case 4594: /* *avx512f_gathersiv16sf */ |
| 68551 | case 4595: /* *avx512f_gathersiv8di */ |
| 68552 | case 4596: /* *avx512f_gathersiv8di */ |
| 68553 | case 4597: /* *avx512f_gathersiv8df */ |
| 68554 | case 4598: /* *avx512f_gathersiv8df */ |
| 68555 | case 4599: /* *avx512f_gathersiv8si */ |
| 68556 | case 4600: /* *avx512f_gathersiv8si */ |
| 68557 | case 4601: /* *avx512f_gathersiv8sf */ |
| 68558 | case 4602: /* *avx512f_gathersiv8sf */ |
| 68559 | case 4603: /* *avx512f_gathersiv4di */ |
| 68560 | case 4604: /* *avx512f_gathersiv4di */ |
| 68561 | case 4605: /* *avx512f_gathersiv4df */ |
| 68562 | case 4606: /* *avx512f_gathersiv4df */ |
| 68563 | case 4607: /* *avx512f_gathersiv4si */ |
| 68564 | case 4608: /* *avx512f_gathersiv4si */ |
| 68565 | case 4609: /* *avx512f_gathersiv4sf */ |
| 68566 | case 4610: /* *avx512f_gathersiv4sf */ |
| 68567 | case 4611: /* *avx512f_gathersiv2di */ |
| 68568 | case 4612: /* *avx512f_gathersiv2di */ |
| 68569 | case 4613: /* *avx512f_gathersiv2df */ |
| 68570 | case 4614: /* *avx512f_gathersiv2df */ |
| 68571 | case 4615: /* *avx512f_gathersiv16si_2 */ |
| 68572 | case 4616: /* *avx512f_gathersiv16si_2 */ |
| 68573 | case 4617: /* *avx512f_gathersiv16sf_2 */ |
| 68574 | case 4618: /* *avx512f_gathersiv16sf_2 */ |
| 68575 | case 4619: /* *avx512f_gathersiv8di_2 */ |
| 68576 | case 4620: /* *avx512f_gathersiv8di_2 */ |
| 68577 | case 4621: /* *avx512f_gathersiv8df_2 */ |
| 68578 | case 4622: /* *avx512f_gathersiv8df_2 */ |
| 68579 | case 4623: /* *avx512f_gathersiv8si_2 */ |
| 68580 | case 4624: /* *avx512f_gathersiv8si_2 */ |
| 68581 | case 4625: /* *avx512f_gathersiv8sf_2 */ |
| 68582 | case 4626: /* *avx512f_gathersiv8sf_2 */ |
| 68583 | case 4627: /* *avx512f_gathersiv4di_2 */ |
| 68584 | case 4628: /* *avx512f_gathersiv4di_2 */ |
| 68585 | case 4629: /* *avx512f_gathersiv4df_2 */ |
| 68586 | case 4630: /* *avx512f_gathersiv4df_2 */ |
| 68587 | case 4631: /* *avx512f_gathersiv4si_2 */ |
| 68588 | case 4632: /* *avx512f_gathersiv4si_2 */ |
| 68589 | case 4633: /* *avx512f_gathersiv4sf_2 */ |
| 68590 | case 4634: /* *avx512f_gathersiv4sf_2 */ |
| 68591 | case 4635: /* *avx512f_gathersiv2di_2 */ |
| 68592 | case 4636: /* *avx512f_gathersiv2di_2 */ |
| 68593 | case 4637: /* *avx512f_gathersiv2df_2 */ |
| 68594 | case 4638: /* *avx512f_gathersiv2df_2 */ |
| 68595 | case 4639: /* *avx512f_gatherdiv16si */ |
| 68596 | case 4640: /* *avx512f_gatherdiv16si */ |
| 68597 | case 4641: /* *avx512f_gatherdiv16sf */ |
| 68598 | case 4642: /* *avx512f_gatherdiv16sf */ |
| 68599 | case 4643: /* *avx512f_gatherdiv8di */ |
| 68600 | case 4644: /* *avx512f_gatherdiv8di */ |
| 68601 | case 4645: /* *avx512f_gatherdiv8df */ |
| 68602 | case 4646: /* *avx512f_gatherdiv8df */ |
| 68603 | case 4647: /* *avx512f_gatherdiv8si */ |
| 68604 | case 4648: /* *avx512f_gatherdiv8si */ |
| 68605 | case 4649: /* *avx512f_gatherdiv8sf */ |
| 68606 | case 4650: /* *avx512f_gatherdiv8sf */ |
| 68607 | case 4651: /* *avx512f_gatherdiv4di */ |
| 68608 | case 4652: /* *avx512f_gatherdiv4di */ |
| 68609 | case 4653: /* *avx512f_gatherdiv4df */ |
| 68610 | case 4654: /* *avx512f_gatherdiv4df */ |
| 68611 | case 4655: /* *avx512f_gatherdiv4si */ |
| 68612 | case 4656: /* *avx512f_gatherdiv4si */ |
| 68613 | case 4657: /* *avx512f_gatherdiv4sf */ |
| 68614 | case 4658: /* *avx512f_gatherdiv4sf */ |
| 68615 | case 4659: /* *avx512f_gatherdiv2di */ |
| 68616 | case 4660: /* *avx512f_gatherdiv2di */ |
| 68617 | case 4661: /* *avx512f_gatherdiv2df */ |
| 68618 | case 4662: /* *avx512f_gatherdiv2df */ |
| 68619 | case 4663: /* *avx512f_gatherdiv16si_2 */ |
| 68620 | case 4664: /* *avx512f_gatherdiv16si_2 */ |
| 68621 | case 4665: /* *avx512f_gatherdiv16sf_2 */ |
| 68622 | case 4666: /* *avx512f_gatherdiv16sf_2 */ |
| 68623 | case 4667: /* *avx512f_gatherdiv8di_2 */ |
| 68624 | case 4668: /* *avx512f_gatherdiv8di_2 */ |
| 68625 | case 4669: /* *avx512f_gatherdiv8df_2 */ |
| 68626 | case 4670: /* *avx512f_gatherdiv8df_2 */ |
| 68627 | case 4671: /* *avx512f_gatherdiv8si_2 */ |
| 68628 | case 4672: /* *avx512f_gatherdiv8si_2 */ |
| 68629 | case 4673: /* *avx512f_gatherdiv8sf_2 */ |
| 68630 | case 4674: /* *avx512f_gatherdiv8sf_2 */ |
| 68631 | case 4675: /* *avx512f_gatherdiv4di_2 */ |
| 68632 | case 4676: /* *avx512f_gatherdiv4di_2 */ |
| 68633 | case 4677: /* *avx512f_gatherdiv4df_2 */ |
| 68634 | case 4678: /* *avx512f_gatherdiv4df_2 */ |
| 68635 | case 4679: /* *avx512f_gatherdiv4si_2 */ |
| 68636 | case 4680: /* *avx512f_gatherdiv4si_2 */ |
| 68637 | case 4681: /* *avx512f_gatherdiv4sf_2 */ |
| 68638 | case 4682: /* *avx512f_gatherdiv4sf_2 */ |
| 68639 | case 4683: /* *avx512f_gatherdiv2di_2 */ |
| 68640 | case 4684: /* *avx512f_gatherdiv2di_2 */ |
| 68641 | case 4685: /* *avx512f_gatherdiv2df_2 */ |
| 68642 | case 4686: /* *avx512f_gatherdiv2df_2 */ |
| 68643 | case 4687: /* *avx512f_scattersiv16si */ |
| 68644 | case 4688: /* *avx512f_scattersiv16si */ |
| 68645 | case 4689: /* *avx512f_scattersiv16sf */ |
| 68646 | case 4690: /* *avx512f_scattersiv16sf */ |
| 68647 | case 4691: /* *avx512f_scattersiv8di */ |
| 68648 | case 4692: /* *avx512f_scattersiv8di */ |
| 68649 | case 4693: /* *avx512f_scattersiv8df */ |
| 68650 | case 4694: /* *avx512f_scattersiv8df */ |
| 68651 | case 4695: /* *avx512f_scattersiv8si */ |
| 68652 | case 4696: /* *avx512f_scattersiv8si */ |
| 68653 | case 4697: /* *avx512f_scattersiv8sf */ |
| 68654 | case 4698: /* *avx512f_scattersiv8sf */ |
| 68655 | case 4699: /* *avx512f_scattersiv4di */ |
| 68656 | case 4700: /* *avx512f_scattersiv4di */ |
| 68657 | case 4701: /* *avx512f_scattersiv4df */ |
| 68658 | case 4702: /* *avx512f_scattersiv4df */ |
| 68659 | case 4703: /* *avx512f_scattersiv4si */ |
| 68660 | case 4704: /* *avx512f_scattersiv4si */ |
| 68661 | case 4705: /* *avx512f_scattersiv4sf */ |
| 68662 | case 4706: /* *avx512f_scattersiv4sf */ |
| 68663 | case 4707: /* *avx512f_scattersiv2di */ |
| 68664 | case 4708: /* *avx512f_scattersiv2di */ |
| 68665 | case 4709: /* *avx512f_scattersiv2df */ |
| 68666 | case 4710: /* *avx512f_scattersiv2df */ |
| 68667 | case 4711: /* *avx512f_scatterdiv16si */ |
| 68668 | case 4712: /* *avx512f_scatterdiv16si */ |
| 68669 | case 4713: /* *avx512f_scatterdiv16sf */ |
| 68670 | case 4714: /* *avx512f_scatterdiv16sf */ |
| 68671 | case 4715: /* *avx512f_scatterdiv8di */ |
| 68672 | case 4716: /* *avx512f_scatterdiv8di */ |
| 68673 | case 4717: /* *avx512f_scatterdiv8df */ |
| 68674 | case 4718: /* *avx512f_scatterdiv8df */ |
| 68675 | case 4719: /* *avx512f_scatterdiv8si */ |
| 68676 | case 4720: /* *avx512f_scatterdiv8si */ |
| 68677 | case 4721: /* *avx512f_scatterdiv8sf */ |
| 68678 | case 4722: /* *avx512f_scatterdiv8sf */ |
| 68679 | case 4723: /* *avx512f_scatterdiv4di */ |
| 68680 | case 4724: /* *avx512f_scatterdiv4di */ |
| 68681 | case 4725: /* *avx512f_scatterdiv4df */ |
| 68682 | case 4726: /* *avx512f_scatterdiv4df */ |
| 68683 | case 4727: /* *avx512f_scatterdiv4si */ |
| 68684 | case 4728: /* *avx512f_scatterdiv4si */ |
| 68685 | case 4729: /* *avx512f_scatterdiv4sf */ |
| 68686 | case 4730: /* *avx512f_scatterdiv4sf */ |
| 68687 | case 4731: /* *avx512f_scatterdiv2di */ |
| 68688 | case 4732: /* *avx512f_scatterdiv2di */ |
| 68689 | case 4733: /* *avx512f_scatterdiv2df */ |
| 68690 | case 4734: /* *avx512f_scatterdiv2df */ |
| 68691 | case 4735: /* avx512f_compressv16si_mask */ |
| 68692 | case 4736: /* avx512f_compressv16sf_mask */ |
| 68693 | case 4737: /* avx512f_compressv8di_mask */ |
| 68694 | case 4738: /* avx512f_compressv8df_mask */ |
| 68695 | case 4739: /* avx512vl_compressv8si_mask */ |
| 68696 | case 4740: /* avx512vl_compressv8sf_mask */ |
| 68697 | case 4741: /* avx512vl_compressv4di_mask */ |
| 68698 | case 4742: /* avx512vl_compressv4df_mask */ |
| 68699 | case 4743: /* avx512vl_compressv4si_mask */ |
| 68700 | case 4744: /* avx512vl_compressv4sf_mask */ |
| 68701 | case 4745: /* avx512vl_compressv2di_mask */ |
| 68702 | case 4746: /* avx512vl_compressv2df_mask */ |
| 68703 | case 4764: /* avx512vl_expandv8sf_mask */ |
| 68704 | case 4766: /* avx512vl_expandv4df_mask */ |
| 68705 | case 4767: /* avx512vl_expandv4si_mask */ |
| 68706 | case 4769: /* avx512vl_expandv2di_mask */ |
| 68707 | case 4936: /* loaddi_via_sse */ |
| 68708 | case 4937: /* storedi_via_sse */ |
| 68709 | extract_insn_cached (insn); |
| 68710 | if (((cached_type = get_attr_type (insn)) == TYPE_CALL) || (cached_type == TYPE_CALLV)) |
| 68711 | { |
| 68712 | return 2; |
| 68713 | } |
| 68714 | else if (((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) && (cached_type == TYPE_PUSH)) |
| 68715 | { |
| 68716 | return 4; |
| 68717 | } |
| 68718 | else if (cached_type == TYPE_PUSH) |
| 68719 | { |
| 68720 | return 1; |
| 68721 | } |
| 68722 | else if ((cached_memory == MEMORY_LOAD) && (cached_type == TYPE_POP)) |
| 68723 | { |
| 68724 | return 4; |
| 68725 | } |
| 68726 | else if (cached_type == TYPE_POP) |
| 68727 | { |
| 68728 | return 1; |
| 68729 | } |
| 68730 | else if (cached_type == TYPE_LEAVE) |
| 68731 | { |
| 68732 | return 3; |
| 68733 | } |
| 68734 | else if (cached_type == TYPE_LEA) |
| 68735 | { |
| 68736 | return 1; |
| 68737 | } |
| 68738 | else if ((cached_type == TYPE_IMUL) && ((cached_mode = get_attr_mode (insn)) == MODE_DI) && ((cached_memory == MEMORY_NONE) || (cached_memory == MEMORY_UNKNOWN))) |
| 68739 | { |
| 68740 | return 6; |
| 68741 | } |
| 68742 | else if ((cached_type == TYPE_IMUL) && ((cached_memory == MEMORY_NONE) || (cached_memory == MEMORY_UNKNOWN))) |
| 68743 | { |
| 68744 | return 3; |
| 68745 | } |
| 68746 | else if ((cached_type == TYPE_IMUL) && ((cached_mode = get_attr_mode (insn)) == MODE_DI) && ((cached_memory == MEMORY_LOAD) || (cached_memory == MEMORY_BOTH))) |
| 68747 | { |
| 68748 | return 9; |
| 68749 | } |
| 68750 | else if ((cached_type == TYPE_IMUL) && ((cached_memory == MEMORY_LOAD) || (cached_memory == MEMORY_BOTH))) |
| 68751 | { |
| 68752 | return 6; |
| 68753 | } |
| 68754 | else if ((cached_type == TYPE_IDIV) && ((cached_mode = get_attr_mode (insn)) == MODE_DI) && ((cached_memory == MEMORY_NONE) || (cached_memory == MEMORY_UNKNOWN))) |
| 68755 | { |
| 68756 | return 41 /* 0x29 */; |
| 68757 | } |
| 68758 | else if ((cached_type == TYPE_IDIV) && ((cached_mode = get_attr_mode (insn)) == MODE_DI) && (cached_memory == MEMORY_LOAD)) |
| 68759 | { |
| 68760 | return 44 /* 0x2c */; |
| 68761 | } |
| 68762 | else if ((cached_type == TYPE_IDIV) && ((cached_mode = get_attr_mode (insn)) == MODE_SI) && ((cached_memory == MEMORY_NONE) || (cached_memory == MEMORY_UNKNOWN))) |
| 68763 | { |
| 68764 | return 25 /* 0x19 */; |
| 68765 | } |
| 68766 | else if ((cached_type == TYPE_IDIV) && ((cached_mode = get_attr_mode (insn)) == MODE_SI) && (cached_memory == MEMORY_LOAD)) |
| 68767 | { |
| 68768 | return 28 /* 0x1c */; |
| 68769 | } |
| 68770 | else if ((cached_type == TYPE_IDIV) && ((cached_mode = get_attr_mode (insn)) == MODE_HI) && ((cached_memory == MEMORY_NONE) || (cached_memory == MEMORY_UNKNOWN))) |
| 68771 | { |
| 68772 | return 17 /* 0x11 */; |
| 68773 | } |
| 68774 | else if ((cached_type == TYPE_IDIV) && ((cached_mode = get_attr_mode (insn)) == MODE_HI) && (cached_memory == MEMORY_LOAD)) |
| 68775 | { |
| 68776 | return 20 /* 0x14 */; |
| 68777 | } |
| 68778 | else if ((cached_type == TYPE_IDIV) && ((cached_mode = get_attr_mode (insn)) == MODE_SI) && ((cached_memory == MEMORY_NONE) || (cached_memory == MEMORY_UNKNOWN))) |
| 68779 | { |
| 68780 | return 12 /* 0xc */; |
| 68781 | } |
| 68782 | else if ((cached_type == TYPE_IDIV) && ((cached_mode = get_attr_mode (insn)) == MODE_SI) && (cached_memory == MEMORY_LOAD)) |
| 68783 | { |
| 68784 | return 15 /* 0xf */; |
| 68785 | } |
| 68786 | else if ((cached_type == TYPE_STR) && ((cached_memory == MEMORY_LOAD) || (cached_memory == MEMORY_BOTH) || (cached_memory == MEMORY_STORE))) |
| 68787 | { |
| 68788 | return 7; |
| 68789 | } |
| 68790 | else if ((cached_type == TYPE_IMOV) && (cached_memory == MEMORY_LOAD)) |
| 68791 | { |
| 68792 | return 4; |
| 68793 | } |
| 68794 | else if (((cached_bdver1_decode = get_attr_bdver1_decode (insn)) == BDVER1_DECODE_DIRECT) && (((cached_unit = get_attr_unit (insn)) == UNIT_INTEGER) || (cached_unit == UNIT_UNKNOWN)) && (cached_memory == MEMORY_LOAD)) |
| 68795 | { |
| 68796 | return 4; |
| 68797 | } |
| 68798 | else if ((cached_type == TYPE_IMOV) && (cached_memory == MEMORY_STORE)) |
| 68799 | { |
| 68800 | return 4; |
| 68801 | } |
| 68802 | else if ((cached_bdver1_decode == BDVER1_DECODE_DIRECT) && (((cached_unit = get_attr_unit (insn)) == UNIT_INTEGER) || (cached_unit == UNIT_UNKNOWN)) && (cached_memory == MEMORY_BOTH)) |
| 68803 | { |
| 68804 | return 4; |
| 68805 | } |
| 68806 | else if ((cached_bdver1_decode == BDVER1_DECODE_DIRECT) && (((cached_unit = get_attr_unit (insn)) == UNIT_INTEGER) || (cached_unit == UNIT_UNKNOWN)) && (cached_memory == MEMORY_STORE)) |
| 68807 | { |
| 68808 | return 4; |
| 68809 | } |
| 68810 | else if (((cached_btver2_decode = get_attr_btver2_decode (insn)) == BTVER2_DECODE_DIRECT) && (((cached_unit = get_attr_unit (insn)) == UNIT_INTEGER) || (cached_unit == UNIT_UNKNOWN)) && ((cached_memory == MEMORY_NONE) || (cached_memory == MEMORY_UNKNOWN))) |
| 68811 | { |
| 68812 | return 1; |
| 68813 | } |
| 68814 | else if ((cached_type == TYPE_FMOV) && (cached_memory == MEMORY_LOAD) && ((cached_mode = get_attr_mode (insn)) == MODE_XF)) |
| 68815 | { |
| 68816 | return 19 /* 0x13 */; |
| 68817 | } |
| 68818 | else if ((cached_type == TYPE_FMOV) && (cached_memory == MEMORY_LOAD)) |
| 68819 | { |
| 68820 | return 11 /* 0xb */; |
| 68821 | } |
| 68822 | else if ((cached_type == TYPE_FMOV) && (cached_memory == MEMORY_BOTH) && ((cached_mode = get_attr_mode (insn)) == MODE_XF)) |
| 68823 | { |
| 68824 | return 24 /* 0x18 */; |
| 68825 | } |
| 68826 | else if ((cached_type == TYPE_FMOV) && ((cached_memory == MEMORY_STORE) || (cached_memory == MEMORY_BOTH))) |
| 68827 | { |
| 68828 | return 11 /* 0xb */; |
| 68829 | } |
| 68830 | else if ((cached_type == TYPE_FISTP) || (cached_type == TYPE_FISTTP)) |
| 68831 | { |
| 68832 | return 9; |
| 68833 | } |
| 68834 | else if (cached_type == TYPE_FMOV) |
| 68835 | { |
| 68836 | return 2; |
| 68837 | } |
| 68838 | else if ((cached_type == TYPE_FOP) && (cached_memory == MEMORY_LOAD)) |
| 68839 | { |
| 68840 | return 8; |
| 68841 | } |
| 68842 | else if (cached_type == TYPE_FOP) |
| 68843 | { |
| 68844 | return 3; |
| 68845 | } |
| 68846 | else if ((cached_type == TYPE_FMUL) && (cached_memory == MEMORY_LOAD)) |
| 68847 | { |
| 68848 | return 10 /* 0xa */; |
| 68849 | } |
| 68850 | else if (cached_type == TYPE_FMUL) |
| 68851 | { |
| 68852 | return 5; |
| 68853 | } |
| 68854 | else if (cached_type == TYPE_FSGN) |
| 68855 | { |
| 68856 | return 2; |
| 68857 | } |
| 68858 | else if ((cached_type == TYPE_FDIV) && (cached_memory == MEMORY_LOAD)) |
| 68859 | { |
| 68860 | return 24 /* 0x18 */; |
| 68861 | } |
| 68862 | else if (cached_type == TYPE_FDIV) |
| 68863 | { |
| 68864 | return 19 /* 0x13 */; |
| 68865 | } |
| 68866 | else if ((cached_type == TYPE_FCMOV) && (cached_memory == MEMORY_LOAD)) |
| 68867 | { |
| 68868 | return 12 /* 0xc */; |
| 68869 | } |
| 68870 | else if (cached_type == TYPE_FCMOV) |
| 68871 | { |
| 68872 | return 7; |
| 68873 | } |
| 68874 | else if ((cached_type == TYPE_FCMP) && (cached_bdver1_decode == BDVER1_DECODE_DOUBLE) && (cached_memory == MEMORY_LOAD)) |
| 68875 | { |
| 68876 | return 7; |
| 68877 | } |
| 68878 | else if ((cached_bdver1_decode == BDVER1_DECODE_DOUBLE) && (cached_type == TYPE_FCMP)) |
| 68879 | { |
| 68880 | return 2; |
| 68881 | } |
| 68882 | else if ((cached_type == TYPE_FCMP) && (cached_memory == MEMORY_LOAD)) |
| 68883 | { |
| 68884 | return 6; |
| 68885 | } |
| 68886 | else if (cached_type == TYPE_FCMP) |
| 68887 | { |
| 68888 | return 1; |
| 68889 | } |
| 68890 | else if (cached_type == TYPE_FXCH) |
| 68891 | { |
| 68892 | return 1; |
| 68893 | } |
| 68894 | else if ((((cached_mode = get_attr_mode (insn)) == MODE_V8SF) || (cached_mode == MODE_V4DF) || (cached_mode == MODE_V2DF) || (cached_mode == MODE_V4SF) || (cached_mode == MODE_SF) || (cached_mode == MODE_DF)) && ((cached_memory == MEMORY_NONE) || (cached_memory == MEMORY_UNKNOWN)) && ((cached_btver2_sse_attr = get_attr_btver2_sse_attr (insn)) == BTVER2_SSE_ATTR_MAXMIN) && ((cached_type == TYPE_SSE) || (cached_type == TYPE_SSEADD))) |
| 68895 | { |
| 68896 | return 2; |
| 68897 | } |
| 68898 | else if (((cached_mode == MODE_V8SF) || (cached_mode == MODE_V4DF) || (cached_mode == MODE_V2DF) || (cached_mode == MODE_V4SF) || (cached_mode == MODE_SF) || (cached_mode == MODE_DF)) && (cached_memory == MEMORY_LOAD) && ((cached_btver2_sse_attr = get_attr_btver2_sse_attr (insn)) == BTVER2_SSE_ATTR_MAXMIN) && ((cached_type == TYPE_SSE) || (cached_type == TYPE_SSEADD))) |
| 68899 | { |
| 68900 | return 7; |
| 68901 | } |
| 68902 | else if (((cached_mode == MODE_V4SF) || (cached_mode == MODE_SF)) && ((cached_memory == MEMORY_NONE) || (cached_memory == MEMORY_UNKNOWN)) && ((cached_btver2_sse_attr = get_attr_btver2_sse_attr (insn)) == BTVER2_SSE_ATTR_RCP) && (cached_type == TYPE_SSE)) |
| 68903 | { |
| 68904 | return 2; |
| 68905 | } |
| 68906 | else if (((cached_mode == MODE_V4SF) || (cached_mode == MODE_SF)) && (cached_memory == MEMORY_LOAD) && ((cached_btver2_sse_attr = get_attr_btver2_sse_attr (insn)) == BTVER2_SSE_ATTR_RCP) && (cached_type == TYPE_SSE)) |
| 68907 | { |
| 68908 | return 7; |
| 68909 | } |
| 68910 | else if ((cached_mode == MODE_V8SF) && ((cached_memory == MEMORY_NONE) || (cached_memory == MEMORY_UNKNOWN)) && ((cached_btver2_sse_attr = get_attr_btver2_sse_attr (insn)) == BTVER2_SSE_ATTR_RCP) && (cached_type == TYPE_SSE)) |
| 68911 | { |
| 68912 | return 2; |
| 68913 | } |
| 68914 | else if ((cached_mode == MODE_V8SF) && (cached_memory == MEMORY_LOAD) && ((cached_btver2_sse_attr = get_attr_btver2_sse_attr (insn)) == BTVER2_SSE_ATTR_RCP) && (cached_type == TYPE_SSE)) |
| 68915 | { |
| 68916 | return 7; |
| 68917 | } |
| 68918 | else if ((cached_mode == MODE_V4SF) && ((cached_memory == MEMORY_NONE) || (cached_memory == MEMORY_UNKNOWN)) && ((cached_btver2_sse_attr = get_attr_btver2_sse_attr (insn)) == BTVER2_SSE_ATTR_SQRT) && (cached_type == TYPE_SSE)) |
| 68919 | { |
| 68920 | return 21 /* 0x15 */; |
| 68921 | } |
| 68922 | else if ((cached_mode == MODE_V4SF) && (cached_memory == MEMORY_LOAD) && ((cached_btver2_sse_attr = get_attr_btver2_sse_attr (insn)) == BTVER2_SSE_ATTR_SQRT) && (cached_type == TYPE_SSE)) |
| 68923 | { |
| 68924 | return 26 /* 0x1a */; |
| 68925 | } |
| 68926 | else if ((cached_mode == MODE_V4DF) && ((cached_memory == MEMORY_NONE) || (cached_memory == MEMORY_UNKNOWN)) && ((cached_btver2_sse_attr = get_attr_btver2_sse_attr (insn)) == BTVER2_SSE_ATTR_SQRT) && (cached_type == TYPE_SSE)) |
| 68927 | { |
| 68928 | return 54 /* 0x36 */; |
| 68929 | } |
| 68930 | else if ((cached_mode == MODE_V4DF) && (cached_memory == MEMORY_LOAD) && ((cached_btver2_sse_attr = get_attr_btver2_sse_attr (insn)) == BTVER2_SSE_ATTR_SQRT) && (cached_type == TYPE_SSE)) |
| 68931 | { |
| 68932 | return 59 /* 0x3b */; |
| 68933 | } |
| 68934 | else if ((cached_mode == MODE_SF) && ((cached_memory == MEMORY_NONE) || (cached_memory == MEMORY_UNKNOWN)) && ((cached_btver2_sse_attr = get_attr_btver2_sse_attr (insn)) == BTVER2_SSE_ATTR_SQRT) && (cached_type == TYPE_SSE)) |
| 68935 | { |
| 68936 | return 16 /* 0x10 */; |
| 68937 | } |
| 68938 | else if ((cached_mode == MODE_SF) && (cached_memory == MEMORY_LOAD) && ((cached_btver2_sse_attr = get_attr_btver2_sse_attr (insn)) == BTVER2_SSE_ATTR_SQRT) && (cached_type == TYPE_SSE)) |
| 68939 | { |
| 68940 | return 21 /* 0x15 */; |
| 68941 | } |
| 68942 | else if (((cached_mode == MODE_V2DF) || (cached_mode == MODE_DF)) && ((cached_memory == MEMORY_NONE) || (cached_memory == MEMORY_UNKNOWN)) && ((cached_btver2_sse_attr = get_attr_btver2_sse_attr (insn)) == BTVER2_SSE_ATTR_SQRT) && (cached_type == TYPE_SSE)) |
| 68943 | { |
| 68944 | return 27 /* 0x1b */; |
| 68945 | } |
| 68946 | else if (((cached_mode == MODE_V2DF) || (cached_mode == MODE_DF)) && (cached_memory == MEMORY_LOAD) && ((cached_btver2_sse_attr = get_attr_btver2_sse_attr (insn)) == BTVER2_SSE_ATTR_SQRT) && (cached_type == TYPE_SSE)) |
| 68947 | { |
| 68948 | return 32 /* 0x20 */; |
| 68949 | } |
| 68950 | else if ((cached_mode == MODE_V8SF) && ((cached_memory == MEMORY_NONE) || (cached_memory == MEMORY_UNKNOWN)) && ((cached_btver2_sse_attr = get_attr_btver2_sse_attr (insn)) == BTVER2_SSE_ATTR_SQRT) && (cached_type == TYPE_SSE)) |
| 68951 | { |
| 68952 | return 42 /* 0x2a */; |
| 68953 | } |
| 68954 | else if ((cached_mode == MODE_V8SF) && (cached_memory == MEMORY_LOAD) && ((cached_btver2_sse_attr = get_attr_btver2_sse_attr (insn)) == BTVER2_SSE_ATTR_SQRT) && (cached_type == TYPE_SSE)) |
| 68955 | { |
| 68956 | return 42 /* 0x2a */; |
| 68957 | } |
| 68958 | else if ((cached_btver2_decode == BTVER2_DECODE_DIRECT) && (cached_memory == MEMORY_NONE) && (cached_type == TYPE_BITMANIP)) |
| 68959 | { |
| 68960 | return 1; |
| 68961 | } |
| 68962 | else if ((cached_btver2_decode == BTVER2_DECODE_DIRECT) && (cached_memory == MEMORY_LOAD) && (cached_type == TYPE_BITMANIP)) |
| 68963 | { |
| 68964 | return 4; |
| 68965 | } |
| 68966 | else if ((cached_btver2_decode == BTVER2_DECODE_DOUBLE) && (cached_memory == MEMORY_NONE) && ((cached_type == TYPE_BITMANIP) || (cached_type == TYPE_ALU1))) |
| 68967 | { |
| 68968 | return 2; |
| 68969 | } |
| 68970 | else if ((cached_memory == MEMORY_STORE) && (cached_btver2_decode == BTVER2_DECODE_DOUBLE) && ((cached_type == TYPE_BITMANIP) || (cached_type == TYPE_ALU1))) |
| 68971 | { |
| 68972 | return 5; |
| 68973 | } |
| 68974 | else if ((cached_btver2_decode == BTVER2_DECODE_DOUBLE) && (cached_memory == MEMORY_LOAD) && ((cached_type == TYPE_BITMANIP) || (cached_type == TYPE_ALU1))) |
| 68975 | { |
| 68976 | return 4; |
| 68977 | } |
| 68978 | else if (((cached_mode == MODE_V8SF) || (cached_mode == MODE_V4SF)) && (cached_memory == MEMORY_LOAD) && (cached_btver2_decode == BTVER2_DECODE_DIRECT) && (cached_type == TYPE_SSECVT)) |
| 68979 | { |
| 68980 | return 8; |
| 68981 | } |
| 68982 | else if (((cached_mode == MODE_V8SF) || (cached_mode == MODE_V4SF)) && (cached_memory == MEMORY_STORE) && (cached_btver2_decode == BTVER2_DECODE_DIRECT) && (cached_type == TYPE_SSECVT)) |
| 68983 | { |
| 68984 | return 8; |
| 68985 | } |
| 68986 | else if (((cached_mode == MODE_V8SF) || (cached_mode == MODE_V4SF)) && (cached_btver2_decode == BTVER2_DECODE_DIRECT) && (cached_type == TYPE_SSECVT)) |
| 68987 | { |
| 68988 | return 3; |
| 68989 | } |
| 68990 | else if (((cached_mode == MODE_V8SF) || (cached_mode == MODE_V4SF)) && (cached_memory == MEMORY_LOAD) && (cached_btver2_decode == BTVER2_DECODE_DOUBLE) && (cached_type == TYPE_SSECVT)) |
| 68991 | { |
| 68992 | return 8; |
| 68993 | } |
| 68994 | else if (((cached_mode == MODE_V8SF) || (cached_mode == MODE_V4SF)) && (cached_btver2_decode == BTVER2_DECODE_DOUBLE) && (cached_type == TYPE_SSECVT)) |
| 68995 | { |
| 68996 | return 3; |
| 68997 | } |
| 68998 | else if (((cached_mode == MODE_V8SF) || (cached_mode == MODE_V4SF)) && (cached_memory == MEMORY_STORE) && (cached_btver2_decode == BTVER2_DECODE_VECTOR) && (cached_type == TYPE_SSECVT)) |
| 68999 | { |
| 69000 | return 11 /* 0xb */; |
| 69001 | } |
| 69002 | else if (((cached_mode == MODE_V8SF) || (cached_mode == MODE_V4SF)) && (cached_btver2_decode == BTVER2_DECODE_VECTOR) && (cached_type == TYPE_SSECVT)) |
| 69003 | { |
| 69004 | return 6; |
| 69005 | } |
| 69006 | else if (((cached_mode == MODE_V4DF) || (cached_mode == MODE_V8SF)) && (cached_memory == MEMORY_LOAD) && ((cached_type == TYPE_SSEADD) || (cached_type == TYPE_SSEADD1))) |
| 69007 | { |
| 69008 | return 8; |
| 69009 | } |
| 69010 | else if (((cached_mode == MODE_V4DF) || (cached_mode == MODE_V8SF)) && ((cached_memory == MEMORY_NONE) || (cached_memory == MEMORY_UNKNOWN)) && ((cached_type == TYPE_SSEADD) || (cached_type == TYPE_SSEADD1))) |
| 69011 | { |
| 69012 | return 3; |
| 69013 | } |
| 69014 | else if (((cached_mode == MODE_V4DF) || (cached_mode == MODE_V8SF)) && (cached_memory == MEMORY_LOAD) && (! (cached_btver2_decode == BTVER2_DECODE_VECTOR)) && ((cached_type == TYPE_SSELOG) || (cached_type == TYPE_SSELOG1))) |
| 69015 | { |
| 69016 | return 6; |
| 69017 | } |
| 69018 | else if (((cached_mode == MODE_V4DF) || (cached_mode == MODE_V8SF)) && ((cached_memory == MEMORY_NONE) || (cached_memory == MEMORY_UNKNOWN)) && (! (cached_btver2_decode == BTVER2_DECODE_VECTOR)) && ((cached_type == TYPE_SSELOG) || (cached_type == TYPE_SSELOG1))) |
| 69019 | { |
| 69020 | return 1; |
| 69021 | } |
| 69022 | else if (((cached_mode == MODE_V4DF) || (cached_mode == MODE_V8SF)) && (cached_memory == MEMORY_LOAD) && (! (cached_btver2_decode == BTVER2_DECODE_VECTOR)) && (cached_type == TYPE_SSE)) |
| 69023 | { |
| 69024 | return 6; |
| 69025 | } |
| 69026 | else if (((cached_mode == MODE_V4DF) || (cached_mode == MODE_V8SF)) && ((cached_memory == MEMORY_NONE) || (cached_memory == MEMORY_UNKNOWN)) && (! (cached_btver2_decode == BTVER2_DECODE_VECTOR)) && (cached_type == TYPE_SSE)) |
| 69027 | { |
| 69028 | return 1; |
| 69029 | } |
| 69030 | else if ((cached_mode == MODE_OI) && (cached_memory == MEMORY_LOAD) && (cached_type == TYPE_SSEMOV)) |
| 69031 | { |
| 69032 | return 6; |
| 69033 | } |
| 69034 | else if ((cached_mode == MODE_OI) && (cached_memory == MEMORY_STORE) && (cached_type == TYPE_SSEMOV)) |
| 69035 | { |
| 69036 | return 6; |
| 69037 | } |
| 69038 | else if ((cached_mode == MODE_OI) && ((cached_memory == MEMORY_NONE) || (cached_memory == MEMORY_UNKNOWN)) && (cached_type == TYPE_SSEMOV)) |
| 69039 | { |
| 69040 | return 1; |
| 69041 | } |
| 69042 | else if (((cached_mode == MODE_V8SF) || (cached_mode == MODE_V4DF)) && ((memory_operand (operands[1], V4SFmode)) || (memory_operand (operands[1], V2DFmode))) && (cached_memory == MEMORY_LOAD) && (cached_type == TYPE_SSEMOV)) |
| 69043 | { |
| 69044 | return 6; |
| 69045 | } |
| 69046 | else if (((cached_mode == MODE_V8SF) || (cached_mode == MODE_V4DF)) && ((memory_operand (operands[1], SFmode)) || (memory_operand (operands[1], DFmode))) && (cached_memory == MEMORY_LOAD) && (cached_type == TYPE_SSEMOV)) |
| 69047 | { |
| 69048 | return 6; |
| 69049 | } |
| 69050 | else if (((cached_mode == MODE_V4DF) || (cached_mode == MODE_V8SF)) && (cached_memory == MEMORY_STORE) && (! (cached_btver2_decode == BTVER2_DECODE_VECTOR)) && (cached_type == TYPE_SSEMOV)) |
| 69051 | { |
| 69052 | return 6; |
| 69053 | } |
| 69054 | else if (((cached_mode == MODE_V4DF) || (cached_mode == MODE_V8SF)) && (cached_memory == MEMORY_LOAD) && (! (cached_btver2_decode == BTVER2_DECODE_VECTOR)) && (cached_type == TYPE_SSEMOV)) |
| 69055 | { |
| 69056 | return 6; |
| 69057 | } |
| 69058 | else if (((cached_mode == MODE_V4DF) || (cached_mode == MODE_V8SF)) && ((cached_memory == MEMORY_NONE) || (cached_memory == MEMORY_UNKNOWN)) && (! (cached_btver2_decode == BTVER2_DECODE_VECTOR)) && (cached_type == TYPE_SSEMOV)) |
| 69059 | { |
| 69060 | return 1; |
| 69061 | } |
| 69062 | else if (((cached_mode == MODE_V4DF) || (cached_mode == MODE_V8SF)) && (cached_memory == MEMORY_LOAD) && (cached_type == TYPE_SSECMP)) |
| 69063 | { |
| 69064 | return 7; |
| 69065 | } |
| 69066 | else if (((cached_mode == MODE_V4DF) || (cached_mode == MODE_V8SF)) && ((cached_memory == MEMORY_NONE) || (cached_memory == MEMORY_UNKNOWN)) && (cached_type == TYPE_SSECMP)) |
| 69067 | { |
| 69068 | return 2; |
| 69069 | } |
| 69070 | else if (((cached_mode == MODE_V4DF) || (cached_mode == MODE_OI)) && ((cached_memory == MEMORY_NONE) || (cached_memory == MEMORY_UNKNOWN)) && (! (cached_btver2_decode == BTVER2_DECODE_VECTOR)) && (cached_type == TYPE_SSECVT)) |
| 69071 | { |
| 69072 | return 8; |
| 69073 | } |
| 69074 | else if (((cached_mode == MODE_V4DF) || (cached_mode == MODE_OI)) && ((cached_memory == MEMORY_NONE) || (cached_memory == MEMORY_UNKNOWN)) && (! (cached_btver2_decode == BTVER2_DECODE_VECTOR)) && (cached_type == TYPE_SSECVT)) |
| 69075 | { |
| 69076 | return 3; |
| 69077 | } |
| 69078 | else if (((cached_mode == MODE_V4DF) || (cached_mode == MODE_OI)) && ((cached_memory == MEMORY_NONE) || (cached_memory == MEMORY_UNKNOWN)) && (cached_btver2_decode == BTVER2_DECODE_VECTOR) && (cached_type == TYPE_SSECVT)) |
| 69079 | { |
| 69080 | return 11 /* 0xb */; |
| 69081 | } |
| 69082 | else if (((cached_mode == MODE_V4DF) || (cached_mode == MODE_OI)) && ((cached_memory == MEMORY_NONE) || (cached_memory == MEMORY_UNKNOWN)) && (cached_btver2_decode == BTVER2_DECODE_VECTOR) && (cached_type == TYPE_SSECVT)) |
| 69083 | { |
| 69084 | return 6; |
| 69085 | } |
| 69086 | else if (((cached_mode == MODE_V4DF) || (cached_mode == MODE_V8SF)) && (cached_memory == MEMORY_LOAD) && (! (cached_btver2_decode == BTVER2_DECODE_VECTOR)) && (cached_type == TYPE_SSEDIV)) |
| 69087 | { |
| 69088 | return 43 /* 0x2b */; |
| 69089 | } |
| 69090 | else if (((cached_mode == MODE_V4DF) || (cached_mode == MODE_V8SF)) && ((cached_memory == MEMORY_NONE) || (cached_memory == MEMORY_UNKNOWN)) && (! (cached_btver2_decode == BTVER2_DECODE_VECTOR)) && (cached_type == TYPE_SSEDIV)) |
| 69091 | { |
| 69092 | return 38 /* 0x26 */; |
| 69093 | } |
| 69094 | else if ((cached_mode == MODE_V4DF) && (cached_memory == MEMORY_LOAD) && (! (cached_btver2_decode == BTVER2_DECODE_VECTOR)) && (cached_type == TYPE_SSEMUL)) |
| 69095 | { |
| 69096 | return 9; |
| 69097 | } |
| 69098 | else if ((cached_mode == MODE_V8SF) && (cached_memory == MEMORY_LOAD) && (! (cached_btver2_decode == BTVER2_DECODE_VECTOR)) && (cached_type == TYPE_SSEMUL)) |
| 69099 | { |
| 69100 | return 7; |
| 69101 | } |
| 69102 | else if ((cached_mode == MODE_V4DF) && ((cached_memory == MEMORY_NONE) || (cached_memory == MEMORY_UNKNOWN)) && (! (cached_btver2_decode == BTVER2_DECODE_VECTOR)) && (cached_type == TYPE_SSEMUL)) |
| 69103 | { |
| 69104 | return 4; |
| 69105 | } |
| 69106 | else if ((cached_mode == MODE_V8SF) && ((cached_memory == MEMORY_NONE) || (cached_memory == MEMORY_UNKNOWN)) && (! (cached_btver2_decode == BTVER2_DECODE_VECTOR)) && (cached_type == TYPE_SSEMUL)) |
| 69107 | { |
| 69108 | return 2; |
| 69109 | } |
| 69110 | else if ((cached_mode == MODE_V8SF) && (cached_memory == MEMORY_LOAD) && (cached_btver2_decode == BTVER2_DECODE_VECTOR) && (cached_type == TYPE_SSEMUL)) |
| 69111 | { |
| 69112 | return 17 /* 0x11 */; |
| 69113 | } |
| 69114 | else if ((cached_mode == MODE_V8SF) && ((cached_memory == MEMORY_NONE) || (cached_memory == MEMORY_UNKNOWN)) && (cached_btver2_decode == BTVER2_DECODE_VECTOR) && (cached_type == TYPE_SSEMUL)) |
| 69115 | { |
| 69116 | return 12 /* 0xc */; |
| 69117 | } |
| 69118 | else if ((register_operand (operands[0], V2DImode)) && ((cached_memory == MEMORY_NONE) || (cached_memory == MEMORY_UNKNOWN)) && (cached_btver2_decode == BTVER2_DECODE_DOUBLE) && (cached_type == TYPE_SSELOG1)) |
| 69119 | { |
| 69120 | return 3; |
| 69121 | } |
| 69122 | else if ((register_operand (operands[0], V2DImode)) && ((cached_memory == MEMORY_NONE) || (cached_memory == MEMORY_UNKNOWN)) && (cached_btver2_decode == BTVER2_DECODE_DIRECT) && (cached_type == TYPE_SSELOG1)) |
| 69123 | { |
| 69124 | return 2; |
| 69125 | } |
| 69126 | else if ((cached_mode == MODE_TI) && (cached_memory == MEMORY_LOAD) && (cached_btver2_decode == BTVER2_DECODE_DIRECT) && ((cached_type == TYPE_SSE) || (cached_type == TYPE_SSECMP) || (cached_type == TYPE_SSEIADD))) |
| 69127 | { |
| 69128 | return 6; |
| 69129 | } |
| 69130 | else if ((cached_mode == MODE_TI) && ((cached_memory == MEMORY_NONE) || (cached_memory == MEMORY_UNKNOWN)) && (cached_btver2_decode == BTVER2_DECODE_DIRECT) && ((cached_type == TYPE_SSE) || (cached_type == TYPE_SSECMP) || (cached_type == TYPE_SSEIADD))) |
| 69131 | { |
| 69132 | return 1; |
| 69133 | } |
| 69134 | else if (((cached_mode == MODE_V2DF) || (cached_mode == MODE_V4SF)) && ((cached_memory == MEMORY_NONE) || (cached_memory == MEMORY_UNKNOWN)) && (cached_btver2_decode == BTVER2_DECODE_DIRECT) && ((cached_type == TYPE_SSE) || (cached_type == TYPE_SSELOG))) |
| 69135 | { |
| 69136 | return 1; |
| 69137 | } |
| 69138 | else if (((cached_mode == MODE_V2DF) || (cached_mode == MODE_V4SF)) && (cached_memory == MEMORY_LOAD) && (cached_btver2_decode == BTVER2_DECODE_DIRECT) && ((cached_type == TYPE_SSE) || (cached_type == TYPE_SSELOG))) |
| 69139 | { |
| 69140 | return 6; |
| 69141 | } |
| 69142 | else if (((cached_mode == MODE_SF) || (cached_mode == MODE_QI) || (cached_mode == MODE_SI) || (cached_mode == MODE_HI)) && ((cached_memory == MEMORY_NONE) || (cached_memory == MEMORY_UNKNOWN)) && (cached_btver2_decode == BTVER2_DECODE_DIRECT) && (cached_type == TYPE_SSELOG)) |
| 69143 | { |
| 69144 | return 3; |
| 69145 | } |
| 69146 | else if (((cached_mode == MODE_V2DF) || (cached_mode == MODE_V4SF)) && ((cached_memory == MEMORY_NONE) || (cached_memory == MEMORY_UNKNOWN)) && (cached_btver2_decode == BTVER2_DECODE_DIRECT) && (cached_type == TYPE_SSEMOV)) |
| 69147 | { |
| 69148 | return 1; |
| 69149 | } |
| 69150 | else if (((cached_mode == MODE_V2DF) || (cached_mode == MODE_V4SF)) && ((cached_memory == MEMORY_NONE) || (cached_memory == MEMORY_UNKNOWN)) && (cached_btver2_decode == BTVER2_DECODE_VECTOR) && (cached_type == TYPE_SSEMOV)) |
| 69151 | { |
| 69152 | return 2; |
| 69153 | } |
| 69154 | else if ((cached_mode == MODE_TI) && (cached_memory == MEMORY_LOAD) && (! (cached_btver2_decode == BTVER2_DECODE_VECTOR)) && (cached_type == TYPE_SSECOMI)) |
| 69155 | { |
| 69156 | return 8; |
| 69157 | } |
| 69158 | else if ((cached_mode == MODE_TI) && ((cached_memory == MEMORY_NONE) || (cached_memory == MEMORY_UNKNOWN)) && (! (cached_btver2_decode == BTVER2_DECODE_VECTOR)) && (cached_type == TYPE_SSECOMI)) |
| 69159 | { |
| 69160 | return 3; |
| 69161 | } |
| 69162 | else if ((cached_mode == MODE_V2DF) && (cached_memory == MEMORY_LOAD) && (cached_btver2_decode == BTVER2_DECODE_VECTOR) && (cached_type == TYPE_SSEMUL)) |
| 69163 | { |
| 69164 | return 14 /* 0xe */; |
| 69165 | } |
| 69166 | else if ((cached_mode == MODE_V2DF) && ((cached_memory == MEMORY_NONE) || (cached_memory == MEMORY_UNKNOWN)) && (cached_btver2_decode == BTVER2_DECODE_VECTOR) && (cached_type == TYPE_SSEMUL)) |
| 69167 | { |
| 69168 | return 9; |
| 69169 | } |
| 69170 | else if ((cached_mode == MODE_V4SF) && ((cached_memory == MEMORY_NONE) || (cached_memory == MEMORY_UNKNOWN)) && (cached_btver2_decode == BTVER2_DECODE_VECTOR) && (cached_type == TYPE_SSEMUL)) |
| 69171 | { |
| 69172 | return 16 /* 0x10 */; |
| 69173 | } |
| 69174 | else if ((cached_mode == MODE_V4SF) && ((cached_memory == MEMORY_NONE) || (cached_memory == MEMORY_UNKNOWN)) && (cached_btver2_decode == BTVER2_DECODE_VECTOR) && (cached_type == TYPE_SSEMUL)) |
| 69175 | { |
| 69176 | return 11 /* 0xb */; |
| 69177 | } |
| 69178 | else if ((cached_memory == MEMORY_LOAD) && (cached_btver2_decode == BTVER2_DECODE_VECTOR) && (cached_type == TYPE_SSEMOV)) |
| 69179 | { |
| 69180 | return 8; |
| 69181 | } |
| 69182 | else if ((cached_memory == MEMORY_LOAD) && (cached_btver2_decode == BTVER2_DECODE_VECTOR) && (cached_type == TYPE_SSEMOV)) |
| 69183 | { |
| 69184 | return 8; |
| 69185 | } |
| 69186 | else if (((cached_memory == MEMORY_NONE) || (cached_memory == MEMORY_UNKNOWN)) && (cached_btver2_decode == BTVER2_DECODE_VECTOR) && (cached_type == TYPE_SSEMOV)) |
| 69187 | { |
| 69188 | return 3; |
| 69189 | } |
| 69190 | else if (((cached_memory == MEMORY_NONE) || (cached_memory == MEMORY_UNKNOWN)) && (cached_btver2_decode == BTVER2_DECODE_DIRECT) && (cached_type == TYPE_SSEIMUL)) |
| 69191 | { |
| 69192 | return 2; |
| 69193 | } |
| 69194 | else if ((cached_memory == MEMORY_LOAD) && (cached_btver2_decode == BTVER2_DECODE_DIRECT) && (cached_type == TYPE_SSEIMUL)) |
| 69195 | { |
| 69196 | return 7; |
| 69197 | } |
| 69198 | else if ((cached_memory == MEMORY_LOAD) && (cached_btver2_decode == BTVER2_DECODE_VECTOR) && (cached_type == TYPE_SSEIMUL)) |
| 69199 | { |
| 69200 | return 9; |
| 69201 | } |
| 69202 | else if (((cached_memory == MEMORY_NONE) || (cached_memory == MEMORY_UNKNOWN)) && (cached_btver2_decode == BTVER2_DECODE_VECTOR) && (cached_type == TYPE_SSEIMUL)) |
| 69203 | { |
| 69204 | return 4; |
| 69205 | } |
| 69206 | else if (((cached_memory == MEMORY_NONE) || (cached_memory == MEMORY_UNKNOWN)) && (cached_type == TYPE_SSEINS)) |
| 69207 | { |
| 69208 | return 3; |
| 69209 | } |
| 69210 | else if ((cached_memory == MEMORY_LOAD) && (cached_btver2_decode == BTVER2_DECODE_DIRECT) && (cached_type == TYPE_SSEISHFT)) |
| 69211 | { |
| 69212 | return 6; |
| 69213 | } |
| 69214 | else if (((cached_memory == MEMORY_NONE) || (cached_memory == MEMORY_UNKNOWN)) && (cached_btver2_decode == BTVER2_DECODE_DIRECT) && (cached_type == TYPE_SSEISHFT)) |
| 69215 | { |
| 69216 | return 1; |
| 69217 | } |
| 69218 | else if ((cached_mode == MODE_V4DF) && (cached_memory == MEMORY_LOAD) && (cached_btver2_decode == BTVER2_DECODE_DIRECT) && (cached_type == TYPE_SSELOG1)) |
| 69219 | { |
| 69220 | return 6; |
| 69221 | } |
| 69222 | else if ((cached_mode == MODE_V4DF) && ((cached_memory == MEMORY_NONE) || (cached_memory == MEMORY_UNKNOWN)) && (cached_btver2_decode == BTVER2_DECODE_DIRECT) && (cached_type == TYPE_SSELOG1)) |
| 69223 | { |
| 69224 | return 1; |
| 69225 | } |
| 69226 | else if ((cached_memory == MEMORY_LOAD) && (cached_btver2_decode == BTVER2_DECODE_VECTOR) && (cached_type == TYPE_SSELOG1)) |
| 69227 | { |
| 69228 | return 7; |
| 69229 | } |
| 69230 | else if (((cached_memory == MEMORY_NONE) || (cached_memory == MEMORY_UNKNOWN)) && (cached_btver2_decode == BTVER2_DECODE_VECTOR) && (cached_type == TYPE_SSELOG1)) |
| 69231 | { |
| 69232 | return 2; |
| 69233 | } |
| 69234 | else if (((cached_mode == MODE_V4SF) || (cached_mode == MODE_V2DF)) && (cached_memory == MEMORY_LOAD) && (cached_btver2_decode == BTVER2_DECODE_DIRECT) && ((cached_type == TYPE_SSEADD) || (cached_type == TYPE_SSEADD1))) |
| 69235 | { |
| 69236 | return 8; |
| 69237 | } |
| 69238 | else if (((cached_mode == MODE_V4SF) || (cached_mode == MODE_V2DF)) && ((cached_memory == MEMORY_NONE) || (cached_memory == MEMORY_UNKNOWN)) && (cached_btver2_decode == BTVER2_DECODE_DIRECT) && ((cached_type == TYPE_SSEADD) || (cached_type == TYPE_SSEADD1))) |
| 69239 | { |
| 69240 | return 3; |
| 69241 | } |
| 69242 | else if (((cached_mode == MODE_SI) || (cached_mode == MODE_DI)) && (cached_memory == MEMORY_LOAD) && (cached_btver2_decode == BTVER2_DECODE_DIRECT) && (cached_type == TYPE_SSEMOV)) |
| 69243 | { |
| 69244 | return 8; |
| 69245 | } |
| 69246 | else if (((cached_mode == MODE_SI) || (cached_mode == MODE_DI)) && (cached_memory == MEMORY_STORE) && (cached_btver2_decode == BTVER2_DECODE_DIRECT) && (cached_type == TYPE_SSEMOV)) |
| 69247 | { |
| 69248 | return 8; |
| 69249 | } |
| 69250 | else if ((cached_mode == MODE_TI) && ((memory_operand (operands[1], SImode)) || (memory_operand (operands[1], DImode))) && (cached_type == TYPE_SSEMOV)) |
| 69251 | { |
| 69252 | return 11 /* 0xb */; |
| 69253 | } |
| 69254 | else if (((cached_mode == MODE_SI) || (cached_mode == MODE_DI)) && ((cached_memory == MEMORY_NONE) || (cached_memory == MEMORY_UNKNOWN)) && (cached_btver2_decode == BTVER2_DECODE_DIRECT) && (cached_type == TYPE_SSEMOV)) |
| 69255 | { |
| 69256 | return 3; |
| 69257 | } |
| 69258 | else if ((cached_mode == MODE_TI) && ((register_operand (operands[1], SImode)) || (register_operand (operands[1], DImode))) && (cached_type == TYPE_SSEMOV)) |
| 69259 | { |
| 69260 | return 6; |
| 69261 | } |
| 69262 | else if ((cached_mode == MODE_TI) && (cached_memory == MEMORY_LOAD) && (cached_btver2_decode == BTVER2_DECODE_DIRECT) && ((cached_type == TYPE_SSEMOV) || (cached_type == TYPE_SSELOG) || (cached_type == TYPE_SSEISHFT1))) |
| 69263 | { |
| 69264 | return 6; |
| 69265 | } |
| 69266 | else if ((cached_mode == MODE_TI) && ((cached_memory == MEMORY_NONE) || (cached_memory == MEMORY_UNKNOWN)) && (cached_btver2_decode == BTVER2_DECODE_DIRECT) && ((cached_type == TYPE_SSEMOV) || (cached_type == TYPE_SSELOG) || (cached_type == TYPE_SSEISHFT1))) |
| 69267 | { |
| 69268 | return 1; |
| 69269 | } |
| 69270 | else if ((cached_mode == MODE_DI) && (cached_memory == MEMORY_LOAD) && (cached_btver2_decode == BTVER2_DECODE_DIRECT) && (cached_type == TYPE_SSEICVT)) |
| 69271 | { |
| 69272 | return 6; |
| 69273 | } |
| 69274 | else if ((cached_mode == MODE_DI) && ((cached_memory == MEMORY_NONE) || (cached_memory == MEMORY_UNKNOWN)) && (cached_btver2_decode == BTVER2_DECODE_DIRECT) && (cached_type == TYPE_SSEICVT)) |
| 69275 | { |
| 69276 | return 1; |
| 69277 | } |
| 69278 | else if (((cached_mode == MODE_SI) || (cached_mode == MODE_DI)) && ((cached_memory == MEMORY_NONE) || (cached_memory == MEMORY_UNKNOWN)) && (cached_btver2_decode == BTVER2_DECODE_DIRECT) && (cached_type == TYPE_SSEMOV)) |
| 69279 | { |
| 69280 | return 3; |
| 69281 | } |
| 69282 | else if ((cached_mode == MODE_TI) && ((register_operand (operands[1], SImode)) || (register_operand (operands[1], DImode))) && (cached_type == TYPE_SSEMOV)) |
| 69283 | { |
| 69284 | return 6; |
| 69285 | } |
| 69286 | else if (((cached_mode == MODE_TI) || (cached_mode == MODE_V4SF) || (cached_mode == MODE_V2DF) || (cached_mode == MODE_DI)) && (cached_memory == MEMORY_LOAD) && (cached_btver2_decode == BTVER2_DECODE_DIRECT) && (cached_type == TYPE_SSECVT)) |
| 69287 | { |
| 69288 | return 8; |
| 69289 | } |
| 69290 | else if (((cached_mode == MODE_TI) || (cached_mode == MODE_V4SF) || (cached_mode == MODE_V2DF) || (cached_mode == MODE_DI)) && (cached_btver2_decode == BTVER2_DECODE_DIRECT) && (cached_type == TYPE_SSECVT)) |
| 69291 | { |
| 69292 | return 3; |
| 69293 | } |
| 69294 | else if ((cached_mode == MODE_SI) && (cached_memory == MEMORY_LOAD) && (cached_btver2_decode == BTVER2_DECODE_DOUBLE) && (cached_type == TYPE_SSEICVT)) |
| 69295 | { |
| 69296 | return 11 /* 0xb */; |
| 69297 | } |
| 69298 | else if ((cached_mode == MODE_SI) && (cached_btver2_decode == BTVER2_DECODE_DOUBLE) && (cached_type == TYPE_SSEICVT)) |
| 69299 | { |
| 69300 | return 6; |
| 69301 | } |
| 69302 | else if ((cached_mode == MODE_DF) && (cached_memory == MEMORY_LOAD) && (cached_btver2_decode == BTVER2_DECODE_DOUBLE) && (cached_type == TYPE_SSECVT)) |
| 69303 | { |
| 69304 | return 11 /* 0xb */; |
| 69305 | } |
| 69306 | else if ((cached_mode == MODE_DF) && (cached_btver2_decode == BTVER2_DECODE_DOUBLE) && (cached_type == TYPE_SSECVT)) |
| 69307 | { |
| 69308 | return 6; |
| 69309 | } |
| 69310 | else if ((cached_mode == MODE_SF) && (cached_memory == MEMORY_LOAD) && (cached_btver2_decode == BTVER2_DECODE_DOUBLE) && (cached_type == TYPE_SSECVT)) |
| 69311 | { |
| 69312 | return 12 /* 0xc */; |
| 69313 | } |
| 69314 | else if ((cached_mode == MODE_SF) && (cached_btver2_decode == BTVER2_DECODE_DOUBLE) && (cached_type == TYPE_SSECVT)) |
| 69315 | { |
| 69316 | return 7; |
| 69317 | } |
| 69318 | else if (((cached_mode == MODE_DF) || (cached_mode == MODE_SF)) && (cached_memory == MEMORY_LOAD) && (cached_btver2_decode == BTVER2_DECODE_DOUBLE) && (cached_type == TYPE_SSEICVT)) |
| 69319 | { |
| 69320 | return 14 /* 0xe */; |
| 69321 | } |
| 69322 | else if (((cached_mode == MODE_DF) || (cached_mode == MODE_SF)) && (cached_btver2_decode == BTVER2_DECODE_DOUBLE) && (cached_type == TYPE_SSEICVT)) |
| 69323 | { |
| 69324 | return 9; |
| 69325 | } |
| 69326 | else if (((cached_mode == MODE_DF) || (cached_mode == MODE_SF)) && (cached_memory == MEMORY_LOAD) && (cached_btver2_decode == BTVER2_DECODE_DIRECT) && (cached_type == TYPE_SSEADD)) |
| 69327 | { |
| 69328 | return 8; |
| 69329 | } |
| 69330 | else if (((cached_mode == MODE_DF) || (cached_mode == MODE_SF)) && ((cached_memory == MEMORY_NONE) || (cached_memory == MEMORY_UNKNOWN)) && (cached_btver2_decode == BTVER2_DECODE_DIRECT) && (cached_type == TYPE_SSEADD)) |
| 69331 | { |
| 69332 | return 3; |
| 69333 | } |
| 69334 | else if (((cached_mode == MODE_V2DF) || (cached_mode == MODE_V4SF) || (cached_mode == MODE_DF) || (cached_mode == MODE_SF)) && (cached_memory == MEMORY_LOAD) && (cached_btver2_decode == BTVER2_DECODE_DIRECT) && (cached_type == TYPE_SSECMP)) |
| 69335 | { |
| 69336 | return 7; |
| 69337 | } |
| 69338 | else if (((cached_mode == MODE_V2DF) || (cached_mode == MODE_V4SF) || (cached_mode == MODE_DF) || (cached_mode == MODE_SF)) && ((cached_memory == MEMORY_NONE) || (cached_memory == MEMORY_UNKNOWN)) && (cached_btver2_decode == BTVER2_DECODE_DIRECT) && (cached_type == TYPE_SSECMP)) |
| 69339 | { |
| 69340 | return 2; |
| 69341 | } |
| 69342 | else if (((cached_mode == MODE_DF) || (cached_mode == MODE_SF)) && (cached_memory == MEMORY_LOAD) && (cached_btver2_decode == BTVER2_DECODE_DIRECT) && (cached_type == TYPE_SSECOMI)) |
| 69343 | { |
| 69344 | return 7; |
| 69345 | } |
| 69346 | else if (((cached_mode == MODE_DF) || (cached_mode == MODE_SF)) && ((cached_memory == MEMORY_NONE) || (cached_memory == MEMORY_UNKNOWN)) && (cached_btver2_decode == BTVER2_DECODE_DIRECT) && (cached_type == TYPE_SSECOMI)) |
| 69347 | { |
| 69348 | return 2; |
| 69349 | } |
| 69350 | else if ((cached_memory == MEMORY_LOAD) && (cached_btver2_decode == BTVER2_DECODE_DIRECT) && ((cached_type == TYPE_SSEMOV) || (cached_type == TYPE_MMXMOV))) |
| 69351 | { |
| 69352 | return 6; |
| 69353 | } |
| 69354 | else if (((cached_memory == MEMORY_STORE) || (cached_memory == MEMORY_BOTH)) && (cached_btver2_decode == BTVER2_DECODE_DIRECT) && ((cached_type == TYPE_SSEMOV) || (cached_type == TYPE_MMXMOV))) |
| 69355 | { |
| 69356 | return 6; |
| 69357 | } |
| 69358 | else if (((cached_memory == MEMORY_NONE) || (cached_memory == MEMORY_UNKNOWN)) && (cached_btver2_decode == BTVER2_DECODE_DIRECT) && ((cached_type == TYPE_SSEMOV) || (cached_type == TYPE_MMXMOV))) |
| 69359 | { |
| 69360 | return 1; |
| 69361 | } |
| 69362 | else if (((cached_memory == MEMORY_NONE) || (cached_memory == MEMORY_UNKNOWN)) && ((cached_mode == MODE_V4DF) || (cached_mode == MODE_V8SF)) && (cached_type == TYPE_SSESHUF)) |
| 69363 | { |
| 69364 | return 2; |
| 69365 | } |
| 69366 | else if (((cached_memory == MEMORY_NONE) || (cached_memory == MEMORY_UNKNOWN)) && ((cached_mode == MODE_V2DF) || (cached_mode == MODE_V4SF)) && ((cached_type == TYPE_SSESHUF) || (cached_type == TYPE_SSESHUF1))) |
| 69367 | { |
| 69368 | return 1; |
| 69369 | } |
| 69370 | else if ((cached_memory == MEMORY_LOAD) && ((cached_mode == MODE_V4DF) || (cached_mode == MODE_V8SF)) && (cached_type == TYPE_SSESHUF)) |
| 69371 | { |
| 69372 | return 7; |
| 69373 | } |
| 69374 | else if ((cached_memory == MEMORY_LOAD) && ((cached_mode == MODE_V2DF) || (cached_mode == MODE_V4SF)) && ((cached_type == TYPE_SSESHUF) || (cached_type == TYPE_SSESHUF1))) |
| 69375 | { |
| 69376 | return 6; |
| 69377 | } |
| 69378 | else if (((cached_mode == MODE_V2DF) || (cached_mode == MODE_DF) || (cached_mode == MODE_V4SF)) && ((cached_memory == MEMORY_NONE) || (cached_memory == MEMORY_UNKNOWN)) && (cached_type == TYPE_SSEDIV)) |
| 69379 | { |
| 69380 | return 19 /* 0x13 */; |
| 69381 | } |
| 69382 | else if ((cached_mode == MODE_SF) && ((cached_memory == MEMORY_NONE) || (cached_memory == MEMORY_UNKNOWN)) && (cached_type == TYPE_SSEDIV)) |
| 69383 | { |
| 69384 | return 14 /* 0xe */; |
| 69385 | } |
| 69386 | else if (((cached_mode == MODE_V2DF) || (cached_mode == MODE_DF) || (cached_mode == MODE_V4SF) || (cached_mode == MODE_SF)) && ((cached_memory == MEMORY_NONE) || (cached_memory == MEMORY_UNKNOWN)) && (cached_type == TYPE_SSEMUL)) |
| 69387 | { |
| 69388 | return 4; |
| 69389 | } |
| 69390 | else if (((cached_mode == MODE_V2DF) || (cached_mode == MODE_DF) || (cached_mode == MODE_V4SF) || (cached_mode == MODE_SF)) && ((cached_memory == MEMORY_NONE) || (cached_memory == MEMORY_UNKNOWN)) && (cached_type == TYPE_SSEMUL)) |
| 69391 | { |
| 69392 | return 2; |
| 69393 | } |
| 69394 | else if (((cached_mode == MODE_V2DF) || (cached_mode == MODE_DF) || (cached_mode == MODE_V4SF)) && (cached_memory == MEMORY_LOAD) && (cached_type == TYPE_SSEDIV)) |
| 69395 | { |
| 69396 | return 24 /* 0x18 */; |
| 69397 | } |
| 69398 | else if ((cached_mode == MODE_SF) && (cached_memory == MEMORY_LOAD) && (cached_type == TYPE_SSEDIV)) |
| 69399 | { |
| 69400 | return 19 /* 0x13 */; |
| 69401 | } |
| 69402 | else if (((cached_mode == MODE_V2DF) || (cached_mode == MODE_DF) || (cached_mode == MODE_V4SF) || (cached_mode == MODE_SF)) && (cached_memory == MEMORY_LOAD) && (cached_type == TYPE_SSEMUL)) |
| 69403 | { |
| 69404 | return 9; |
| 69405 | } |
| 69406 | else if (((cached_mode == MODE_V2DF) || (cached_mode == MODE_DF) || (cached_mode == MODE_V4SF) || (cached_mode == MODE_SF)) && (cached_memory == MEMORY_LOAD) && (cached_type == TYPE_SSEMUL)) |
| 69407 | { |
| 69408 | return 7; |
| 69409 | } |
| 69410 | else |
| 69411 | { |
| 69412 | return 0; |
| 69413 | } |
| 69414 | |
| 69415 | default: |
| 69416 | return 0; |
| 69417 | |
| 69418 | } |
| 69419 | } |
| 69420 | |
| 69421 | int |
| 69422 | insn_default_latency_znver1 (rtx_insn *insn ATTRIBUTE_UNUSED) |
| 69423 | { |
| 69424 | enum attr_memory cached_memory ATTRIBUTE_UNUSED; |
| 69425 | enum attr_type cached_type ATTRIBUTE_UNUSED; |
| 69426 | enum attr_mode cached_mode ATTRIBUTE_UNUSED; |
| 69427 | enum attr_znver1_decode cached_znver1_decode ATTRIBUTE_UNUSED; |
| 69428 | enum attr_unit cached_unit ATTRIBUTE_UNUSED; |
| 69429 | enum attr_fp_int_src cached_fp_int_src ATTRIBUTE_UNUSED; |
| 69430 | enum attr_prefix cached_prefix ATTRIBUTE_UNUSED; |
| 69431 | int ATTRIBUTE_UNUSED; |
| 69432 | enum attr_isa cached_isa ATTRIBUTE_UNUSED; |
| 69433 | |
| 69434 | switch (recog_memoized (insn)) |
| 69435 | { |
| 69436 | case 3904: /* sse4_2_pcmpistr_cconly */ |
| 69437 | case 3900: /* sse4_2_pcmpestr_cconly */ |
| 69438 | extract_constrain_insn_cached (insn); |
| 69439 | if (((1 << which_alternative) & 0x5)) |
| 69440 | { |
| 69441 | return 1; |
| 69442 | } |
| 69443 | else |
| 69444 | { |
| 69445 | return 8; |
| 69446 | } |
| 69447 | |
| 69448 | case 2542: /* *vec_interleave_lowv2df */ |
| 69449 | case 2536: /* *vec_interleave_highv2df */ |
| 69450 | extract_constrain_insn_cached (insn); |
| 69451 | if ((((1 << which_alternative) & 0x7)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 69452 | { |
| 69453 | return 1; |
| 69454 | } |
| 69455 | else if ((((1 << which_alternative) & 0x7)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 69456 | { |
| 69457 | return 8; |
| 69458 | } |
| 69459 | else |
| 69460 | { |
| 69461 | return 0; |
| 69462 | } |
| 69463 | |
| 69464 | case 2530: /* vec_extract_hi_v32qi */ |
| 69465 | case 2526: /* vec_extract_hi_v16hi */ |
| 69466 | extract_constrain_insn_cached (insn); |
| 69467 | if (((1 << which_alternative) & 0x15)) |
| 69468 | { |
| 69469 | return 1; |
| 69470 | } |
| 69471 | else |
| 69472 | { |
| 69473 | return 0; |
| 69474 | } |
| 69475 | |
| 69476 | case 2528: /* vec_extract_hi_v64qi */ |
| 69477 | case 2524: /* vec_extract_hi_v32hi */ |
| 69478 | case 2510: /* vec_extract_hi_v4df_mask */ |
| 69479 | case 2509: /* vec_extract_hi_v4df */ |
| 69480 | case 2508: /* vec_extract_hi_v4di_mask */ |
| 69481 | case 2507: /* vec_extract_hi_v4di */ |
| 69482 | case 2506: /* vec_extract_lo_v4df_mask */ |
| 69483 | case 2505: /* vec_extract_lo_v4df */ |
| 69484 | case 2504: /* vec_extract_lo_v4di_mask */ |
| 69485 | case 2503: /* vec_extract_lo_v4di */ |
| 69486 | extract_constrain_insn_cached (insn); |
| 69487 | if (which_alternative == 0) |
| 69488 | { |
| 69489 | return 1; |
| 69490 | } |
| 69491 | else |
| 69492 | { |
| 69493 | return 0; |
| 69494 | } |
| 69495 | |
| 69496 | case 2467: /* *sse4_1_extractps */ |
| 69497 | extract_constrain_insn_cached (insn); |
| 69498 | if (!((1 << which_alternative) & 0x7)) |
| 69499 | { |
| 69500 | return 6; |
| 69501 | } |
| 69502 | else if ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) |
| 69503 | { |
| 69504 | return 1; |
| 69505 | } |
| 69506 | else if (cached_memory == MEMORY_LOAD) |
| 69507 | { |
| 69508 | return 8; |
| 69509 | } |
| 69510 | else |
| 69511 | { |
| 69512 | return 0; |
| 69513 | } |
| 69514 | |
| 69515 | case 4501: /* avx_vec_concatv8df */ |
| 69516 | case 4500: /* avx_vec_concatv16sf */ |
| 69517 | case 4499: /* avx_vec_concatv8di */ |
| 69518 | case 4498: /* avx_vec_concatv16si */ |
| 69519 | case 4497: /* avx_vec_concatv32hi */ |
| 69520 | case 4496: /* avx_vec_concatv64qi */ |
| 69521 | case 2452: /* sse_loadlps */ |
| 69522 | extract_constrain_insn_cached (insn); |
| 69523 | if ((((1 << which_alternative) & 0x3)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 69524 | { |
| 69525 | return 1; |
| 69526 | } |
| 69527 | else if ((((1 << which_alternative) & 0x3)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 69528 | { |
| 69529 | return 8; |
| 69530 | } |
| 69531 | else |
| 69532 | { |
| 69533 | return 0; |
| 69534 | } |
| 69535 | |
| 69536 | case 2450: /* sse_loadhps */ |
| 69537 | extract_constrain_insn_cached (insn); |
| 69538 | if ((((1 << which_alternative) & 0xc)) && (((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) || (cached_memory == MEMORY_STORE))) |
| 69539 | { |
| 69540 | return 1; |
| 69541 | } |
| 69542 | else if ((((1 << which_alternative) & 0xc)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 69543 | { |
| 69544 | return 8; |
| 69545 | } |
| 69546 | else |
| 69547 | { |
| 69548 | return 0; |
| 69549 | } |
| 69550 | |
| 69551 | case 2729: /* *vec_extractv2df_0_sse */ |
| 69552 | case 2727: /* *vec_extractv2df_1_sse */ |
| 69553 | case 2451: /* sse_storelps */ |
| 69554 | case 2449: /* sse_storehps */ |
| 69555 | extract_constrain_insn_cached (insn); |
| 69556 | if ((which_alternative == 1) && (((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) || (cached_memory == MEMORY_STORE))) |
| 69557 | { |
| 69558 | return 1; |
| 69559 | } |
| 69560 | else if ((which_alternative == 1) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 69561 | { |
| 69562 | return 8; |
| 69563 | } |
| 69564 | else |
| 69565 | { |
| 69566 | return 0; |
| 69567 | } |
| 69568 | |
| 69569 | case 2461: /* *vec_concatv4sf */ |
| 69570 | case 2419: /* sse_movlhps */ |
| 69571 | case 2418: /* sse_movhlps */ |
| 69572 | extract_constrain_insn_cached (insn); |
| 69573 | if ((((1 << which_alternative) & 0x3)) && (((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) || (cached_memory == MEMORY_STORE))) |
| 69574 | { |
| 69575 | return 1; |
| 69576 | } |
| 69577 | else if ((((1 << which_alternative) & 0x3)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 69578 | { |
| 69579 | return 8; |
| 69580 | } |
| 69581 | else |
| 69582 | { |
| 69583 | return 0; |
| 69584 | } |
| 69585 | |
| 69586 | case 1462: /* avx_divv4df3_mask */ |
| 69587 | case 1461: /* avx_divv4df3 */ |
| 69588 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) |
| 69589 | { |
| 69590 | return 15 /* 0xf */; |
| 69591 | } |
| 69592 | else if (cached_memory == MEMORY_LOAD) |
| 69593 | { |
| 69594 | return 22 /* 0x16 */; |
| 69595 | } |
| 69596 | else |
| 69597 | { |
| 69598 | return 0; |
| 69599 | } |
| 69600 | |
| 69601 | case 1454: /* avx_divv8sf3_mask */ |
| 69602 | case 1453: /* avx_divv8sf3 */ |
| 69603 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) |
| 69604 | { |
| 69605 | return 12 /* 0xc */; |
| 69606 | } |
| 69607 | else if (cached_memory == MEMORY_LOAD) |
| 69608 | { |
| 69609 | return 19 /* 0x13 */; |
| 69610 | } |
| 69611 | else |
| 69612 | { |
| 69613 | return 0; |
| 69614 | } |
| 69615 | |
| 69616 | case 1464: /* sse2_divv2df3_mask */ |
| 69617 | case 1463: /* sse2_divv2df3 */ |
| 69618 | case 1448: /* sse2_vmdivv2df3_round */ |
| 69619 | case 1447: /* sse2_vmdivv2df3 */ |
| 69620 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) |
| 69621 | { |
| 69622 | return 13 /* 0xd */; |
| 69623 | } |
| 69624 | else if (cached_memory == MEMORY_LOAD) |
| 69625 | { |
| 69626 | return 20 /* 0x14 */; |
| 69627 | } |
| 69628 | else |
| 69629 | { |
| 69630 | return 0; |
| 69631 | } |
| 69632 | |
| 69633 | case 1456: /* sse_divv4sf3_mask */ |
| 69634 | case 1455: /* sse_divv4sf3 */ |
| 69635 | case 1444: /* sse_vmdivv4sf3_round */ |
| 69636 | case 1443: /* sse_vmdivv4sf3 */ |
| 69637 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) |
| 69638 | { |
| 69639 | return 10 /* 0xa */; |
| 69640 | } |
| 69641 | else if (cached_memory == MEMORY_LOAD) |
| 69642 | { |
| 69643 | return 17 /* 0x11 */; |
| 69644 | } |
| 69645 | else |
| 69646 | { |
| 69647 | return 0; |
| 69648 | } |
| 69649 | |
| 69650 | case 4913: /* avx5124fmaddps_4fnmaddss_maskz */ |
| 69651 | case 4912: /* avx5124fmaddps_4fnmaddss_mask */ |
| 69652 | case 4911: /* avx5124fmaddps_4fnmaddss */ |
| 69653 | case 4907: /* avx5124fmaddps_4fmaddss_maskz */ |
| 69654 | case 4906: /* avx5124fmaddps_4fmaddss_mask */ |
| 69655 | case 4905: /* avx5124fmaddps_4fmaddss */ |
| 69656 | case 2102: /* *fma4i_vmfnmsub_v2df */ |
| 69657 | case 2101: /* *fma4i_vmfnmsub_v4sf */ |
| 69658 | case 2100: /* *fma4i_vmfnmadd_v2df */ |
| 69659 | case 2099: /* *fma4i_vmfnmadd_v4sf */ |
| 69660 | case 2098: /* *fma4i_vmfmsub_v2df */ |
| 69661 | case 2097: /* *fma4i_vmfmsub_v4sf */ |
| 69662 | case 2096: /* *fma4i_vmfmadd_v2df */ |
| 69663 | case 2095: /* *fma4i_vmfmadd_v4sf */ |
| 69664 | case 2094: /* *fmai_fnmsub_v2df_round */ |
| 69665 | case 2093: /* *fmai_fnmsub_v2df */ |
| 69666 | case 2092: /* *fmai_fnmsub_v4sf_round */ |
| 69667 | case 2091: /* *fmai_fnmsub_v4sf */ |
| 69668 | case 2090: /* *fmai_fnmadd_v2df_round */ |
| 69669 | case 2089: /* *fmai_fnmadd_v2df */ |
| 69670 | case 2088: /* *fmai_fnmadd_v4sf_round */ |
| 69671 | case 2087: /* *fmai_fnmadd_v4sf */ |
| 69672 | case 2086: /* *fmai_fmsub_v2df */ |
| 69673 | case 2085: /* *fmai_fmsub_v2df */ |
| 69674 | case 2084: /* *fmai_fmsub_v4sf */ |
| 69675 | case 2083: /* *fmai_fmsub_v4sf */ |
| 69676 | case 2082: /* *fmai_fmadd_v2df */ |
| 69677 | case 2081: /* *fmai_fmadd_v2df */ |
| 69678 | case 2080: /* *fmai_fmadd_v4sf */ |
| 69679 | case 2079: /* *fmai_fmadd_v4sf */ |
| 69680 | case 2078: /* avx512vl_fmsubadd_v2df_mask3_round */ |
| 69681 | case 2077: /* avx512vl_fmsubadd_v2df_mask3 */ |
| 69682 | case 2076: /* avx512vl_fmsubadd_v4df_mask3_round */ |
| 69683 | case 2075: /* avx512vl_fmsubadd_v4df_mask3 */ |
| 69684 | case 2072: /* avx512vl_fmsubadd_v4sf_mask3_round */ |
| 69685 | case 2071: /* avx512vl_fmsubadd_v4sf_mask3 */ |
| 69686 | case 2070: /* avx512vl_fmsubadd_v8sf_mask3_round */ |
| 69687 | case 2069: /* avx512vl_fmsubadd_v8sf_mask3 */ |
| 69688 | case 2066: /* avx512vl_fmsubadd_v2df_mask_round */ |
| 69689 | case 2065: /* avx512vl_fmsubadd_v2df_mask */ |
| 69690 | case 2064: /* avx512vl_fmsubadd_v4df_mask_round */ |
| 69691 | case 2063: /* avx512vl_fmsubadd_v4df_mask */ |
| 69692 | case 2060: /* avx512vl_fmsubadd_v4sf_mask_round */ |
| 69693 | case 2059: /* avx512vl_fmsubadd_v4sf_mask */ |
| 69694 | case 2058: /* avx512vl_fmsubadd_v8sf_mask_round */ |
| 69695 | case 2057: /* avx512vl_fmsubadd_v8sf_mask */ |
| 69696 | case 2054: /* fma_fmsubadd_v2df_maskz_1 */ |
| 69697 | case 2053: /* *fma_fmsubadd_v2df */ |
| 69698 | case 2052: /* fma_fmsubadd_v4df_maskz_1 */ |
| 69699 | case 2051: /* *fma_fmsubadd_v4df */ |
| 69700 | case 2046: /* *fma_fmsubadd_df */ |
| 69701 | case 2045: /* fma_fmsubadd_v4sf_maskz_1 */ |
| 69702 | case 2044: /* *fma_fmsubadd_v4sf */ |
| 69703 | case 2043: /* fma_fmsubadd_v8sf_maskz_1 */ |
| 69704 | case 2042: /* *fma_fmsubadd_v8sf */ |
| 69705 | case 2037: /* *fma_fmsubadd_sf */ |
| 69706 | case 2036: /* *fma_fmsubadd_v2df */ |
| 69707 | case 2035: /* *fma_fmsubadd_v4df */ |
| 69708 | case 2034: /* *fma_fmsubadd_v4sf */ |
| 69709 | case 2033: /* *fma_fmsubadd_v8sf */ |
| 69710 | case 2032: /* avx512vl_fmaddsub_v2df_mask3_round */ |
| 69711 | case 2031: /* avx512vl_fmaddsub_v2df_mask3 */ |
| 69712 | case 2030: /* avx512vl_fmaddsub_v4df_mask3_round */ |
| 69713 | case 2029: /* avx512vl_fmaddsub_v4df_mask3 */ |
| 69714 | case 2026: /* avx512vl_fmaddsub_v4sf_mask3_round */ |
| 69715 | case 2025: /* avx512vl_fmaddsub_v4sf_mask3 */ |
| 69716 | case 2024: /* avx512vl_fmaddsub_v8sf_mask3_round */ |
| 69717 | case 2023: /* avx512vl_fmaddsub_v8sf_mask3 */ |
| 69718 | case 2020: /* avx512vl_fmaddsub_v2df_mask_round */ |
| 69719 | case 2019: /* avx512vl_fmaddsub_v2df_mask */ |
| 69720 | case 2018: /* avx512vl_fmaddsub_v4df_mask_round */ |
| 69721 | case 2017: /* avx512vl_fmaddsub_v4df_mask */ |
| 69722 | case 2014: /* avx512vl_fmaddsub_v4sf_mask_round */ |
| 69723 | case 2013: /* avx512vl_fmaddsub_v4sf_mask */ |
| 69724 | case 2012: /* avx512vl_fmaddsub_v8sf_mask_round */ |
| 69725 | case 2011: /* avx512vl_fmaddsub_v8sf_mask */ |
| 69726 | case 2008: /* fma_fmaddsub_v2df_maskz_1 */ |
| 69727 | case 2007: /* *fma_fmaddsub_v2df */ |
| 69728 | case 2006: /* fma_fmaddsub_v4df_maskz_1 */ |
| 69729 | case 2005: /* *fma_fmaddsub_v4df */ |
| 69730 | case 2000: /* *fma_fmaddsub_df */ |
| 69731 | case 1999: /* fma_fmaddsub_v4sf_maskz_1 */ |
| 69732 | case 1998: /* *fma_fmaddsub_v4sf */ |
| 69733 | case 1997: /* fma_fmaddsub_v8sf_maskz_1 */ |
| 69734 | case 1996: /* *fma_fmaddsub_v8sf */ |
| 69735 | case 1991: /* *fma_fmaddsub_sf */ |
| 69736 | case 1990: /* *fma_fmaddsub_v2df */ |
| 69737 | case 1989: /* *fma_fmaddsub_v4df */ |
| 69738 | case 1988: /* *fma_fmaddsub_v4sf */ |
| 69739 | case 1987: /* *fma_fmaddsub_v8sf */ |
| 69740 | case 1986: /* avx512vl_fnmsub_v2df_mask3_round */ |
| 69741 | case 1985: /* avx512vl_fnmsub_v2df_mask3 */ |
| 69742 | case 1984: /* avx512vl_fnmsub_v4df_mask3_round */ |
| 69743 | case 1983: /* avx512vl_fnmsub_v4df_mask3 */ |
| 69744 | case 1980: /* avx512vl_fnmsub_v4sf_mask3_round */ |
| 69745 | case 1979: /* avx512vl_fnmsub_v4sf_mask3 */ |
| 69746 | case 1978: /* avx512vl_fnmsub_v8sf_mask3_round */ |
| 69747 | case 1977: /* avx512vl_fnmsub_v8sf_mask3 */ |
| 69748 | case 1974: /* avx512vl_fnmsub_v2df_mask */ |
| 69749 | case 1973: /* avx512vl_fnmsub_v4df_mask */ |
| 69750 | case 1970: /* avx512vl_fnmsub_v4sf_mask */ |
| 69751 | case 1969: /* avx512vl_fnmsub_v8sf_mask */ |
| 69752 | case 1966: /* fma_fnmsub_v2df_maskz_1 */ |
| 69753 | case 1965: /* *fma_fnmsub_v2df */ |
| 69754 | case 1964: /* fma_fnmsub_v4df_maskz_1 */ |
| 69755 | case 1963: /* *fma_fnmsub_v4df */ |
| 69756 | case 1958: /* *fma_fnmsub_df */ |
| 69757 | case 1957: /* fma_fnmsub_v4sf_maskz_1 */ |
| 69758 | case 1956: /* *fma_fnmsub_v4sf */ |
| 69759 | case 1955: /* fma_fnmsub_v8sf_maskz_1 */ |
| 69760 | case 1954: /* *fma_fnmsub_v8sf */ |
| 69761 | case 1949: /* *fma_fnmsub_sf */ |
| 69762 | case 1948: /* *fma_fnmsub_v4df */ |
| 69763 | case 1947: /* *fma_fnmsub_v4df */ |
| 69764 | case 1946: /* *fma_fnmsub_v4df */ |
| 69765 | case 1945: /* *fma_fnmsub_v4df */ |
| 69766 | case 1944: /* *fma_fnmsub_v8sf */ |
| 69767 | case 1943: /* *fma_fnmsub_v8sf */ |
| 69768 | case 1942: /* *fma_fnmsub_v8sf */ |
| 69769 | case 1941: /* *fma_fnmsub_v8sf */ |
| 69770 | case 1940: /* *fma_fnmsub_v2df */ |
| 69771 | case 1939: /* *fma_fnmsub_v2df */ |
| 69772 | case 1938: /* *fma_fnmsub_v2df */ |
| 69773 | case 1937: /* *fma_fnmsub_v2df */ |
| 69774 | case 1936: /* *fma_fnmsub_v4sf */ |
| 69775 | case 1935: /* *fma_fnmsub_v4sf */ |
| 69776 | case 1934: /* *fma_fnmsub_v4sf */ |
| 69777 | case 1933: /* *fma_fnmsub_v4sf */ |
| 69778 | case 1932: /* *fma_fnmsub_df */ |
| 69779 | case 1931: /* *fma_fnmsub_df */ |
| 69780 | case 1930: /* *fma_fnmsub_sf */ |
| 69781 | case 1929: /* *fma_fnmsub_sf */ |
| 69782 | case 1928: /* avx512vl_fnmadd_v2df_mask3 */ |
| 69783 | case 1927: /* avx512vl_fnmadd_v4df_mask3 */ |
| 69784 | case 1924: /* avx512vl_fnmadd_v4sf_mask3 */ |
| 69785 | case 1923: /* avx512vl_fnmadd_v8sf_mask3 */ |
| 69786 | case 1920: /* avx512vl_fnmadd_v2df_mask */ |
| 69787 | case 1919: /* avx512vl_fnmadd_v4df_mask */ |
| 69788 | case 1916: /* avx512vl_fnmadd_v4sf_mask */ |
| 69789 | case 1915: /* avx512vl_fnmadd_v8sf_mask */ |
| 69790 | case 1912: /* fma_fnmadd_v2df_maskz_1 */ |
| 69791 | case 1911: /* *fma_fnmadd_v2df */ |
| 69792 | case 1910: /* fma_fnmadd_v4df_maskz_1 */ |
| 69793 | case 1909: /* *fma_fnmadd_v4df */ |
| 69794 | case 1904: /* *fma_fnmadd_df */ |
| 69795 | case 1903: /* fma_fnmadd_v4sf_maskz_1 */ |
| 69796 | case 1902: /* *fma_fnmadd_v4sf */ |
| 69797 | case 1901: /* fma_fnmadd_v8sf_maskz_1 */ |
| 69798 | case 1900: /* *fma_fnmadd_v8sf */ |
| 69799 | case 1895: /* *fma_fnmadd_sf */ |
| 69800 | case 1894: /* *fma_fnmadd_v4df */ |
| 69801 | case 1893: /* *fma_fnmadd_v8sf */ |
| 69802 | case 1892: /* *fma_fnmadd_v2df */ |
| 69803 | case 1891: /* *fma_fnmadd_v4sf */ |
| 69804 | case 1890: /* *fma_fnmadd_df */ |
| 69805 | case 1889: /* *fma_fnmadd_sf */ |
| 69806 | case 1888: /* avx512vl_fmsub_v2df_mask3 */ |
| 69807 | case 1887: /* avx512vl_fmsub_v4df_mask3 */ |
| 69808 | case 1884: /* avx512vl_fmsub_v4sf_mask3 */ |
| 69809 | case 1883: /* avx512vl_fmsub_v8sf_mask3 */ |
| 69810 | case 1880: /* avx512vl_fmsub_v2df_mask_round */ |
| 69811 | case 1879: /* avx512vl_fmsub_v2df_mask */ |
| 69812 | case 1878: /* avx512vl_fmsub_v4df_mask_round */ |
| 69813 | case 1877: /* avx512vl_fmsub_v4df_mask */ |
| 69814 | case 1874: /* avx512vl_fmsub_v4sf_mask_round */ |
| 69815 | case 1873: /* avx512vl_fmsub_v4sf_mask */ |
| 69816 | case 1872: /* avx512vl_fmsub_v8sf_mask_round */ |
| 69817 | case 1871: /* avx512vl_fmsub_v8sf_mask */ |
| 69818 | case 1868: /* fma_fmsub_v2df_maskz_1 */ |
| 69819 | case 1867: /* *fma_fmsub_v2df */ |
| 69820 | case 1866: /* fma_fmsub_v4df_maskz_1 */ |
| 69821 | case 1865: /* *fma_fmsub_v4df */ |
| 69822 | case 1860: /* *fma_fmsub_df */ |
| 69823 | case 1859: /* fma_fmsub_v4sf_maskz_1 */ |
| 69824 | case 1858: /* *fma_fmsub_v4sf */ |
| 69825 | case 1857: /* fma_fmsub_v8sf_maskz_1 */ |
| 69826 | case 1856: /* *fma_fmsub_v8sf */ |
| 69827 | case 1851: /* *fma_fmsub_sf */ |
| 69828 | case 1850: /* *fma_fmsub_v4df */ |
| 69829 | case 1849: /* *fma_fmsub_v8sf */ |
| 69830 | case 1848: /* *fma_fmsub_v2df */ |
| 69831 | case 1847: /* *fma_fmsub_v4sf */ |
| 69832 | case 1846: /* *fma_fmsub_df */ |
| 69833 | case 1845: /* *fma_fmsub_sf */ |
| 69834 | case 1844: /* avx512vl_fmadd_v2df_mask3_round */ |
| 69835 | case 1843: /* avx512vl_fmadd_v2df_mask3 */ |
| 69836 | case 1842: /* avx512vl_fmadd_v4df_mask3_round */ |
| 69837 | case 1841: /* avx512vl_fmadd_v4df_mask3 */ |
| 69838 | case 1838: /* avx512vl_fmadd_v4sf_mask3_round */ |
| 69839 | case 1837: /* avx512vl_fmadd_v4sf_mask3 */ |
| 69840 | case 1836: /* avx512vl_fmadd_v8sf_mask3_round */ |
| 69841 | case 1835: /* avx512vl_fmadd_v8sf_mask3 */ |
| 69842 | case 1832: /* avx512vl_fmadd_v2df_mask */ |
| 69843 | case 1831: /* avx512vl_fmadd_v4df_mask */ |
| 69844 | case 1828: /* avx512vl_fmadd_v4sf_mask */ |
| 69845 | case 1827: /* avx512vl_fmadd_v8sf_mask */ |
| 69846 | case 1824: /* fma_fmadd_v2df_maskz_1 */ |
| 69847 | case 1823: /* *fma_fmadd_v2df */ |
| 69848 | case 1822: /* fma_fmadd_v4df_maskz_1 */ |
| 69849 | case 1821: /* *fma_fmadd_v4df */ |
| 69850 | case 1816: /* *fma_fmadd_df */ |
| 69851 | case 1815: /* fma_fmadd_v4sf_maskz_1 */ |
| 69852 | case 1814: /* *fma_fmadd_v4sf */ |
| 69853 | case 1813: /* fma_fmadd_v8sf_maskz_1 */ |
| 69854 | case 1812: /* *fma_fmadd_v8sf */ |
| 69855 | case 1807: /* *fma_fmadd_sf */ |
| 69856 | case 1806: /* *fma_fmadd_v4df */ |
| 69857 | case 1805: /* *fma_fmadd_v8sf */ |
| 69858 | case 1804: /* *fma_fmadd_v2df */ |
| 69859 | case 1803: /* *fma_fmadd_v4sf */ |
| 69860 | case 1802: /* *fma_fmadd_df */ |
| 69861 | case 1801: /* *fma_fmadd_sf */ |
| 69862 | case 1436: /* *mulv4df3_mask_round */ |
| 69863 | case 1435: /* *mulv4df3_mask */ |
| 69864 | case 1434: /* *mulv4df3_round */ |
| 69865 | case 1433: /* *mulv4df3 */ |
| 69866 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) |
| 69867 | { |
| 69868 | return 5; |
| 69869 | } |
| 69870 | else if (cached_memory == MEMORY_LOAD) |
| 69871 | { |
| 69872 | return 12 /* 0xc */; |
| 69873 | } |
| 69874 | else |
| 69875 | { |
| 69876 | return 0; |
| 69877 | } |
| 69878 | |
| 69879 | case 4770: /* avx512vl_expandv2df_mask */ |
| 69880 | case 4769: /* avx512vl_expandv2di_mask */ |
| 69881 | case 4768: /* avx512vl_expandv4sf_mask */ |
| 69882 | case 4767: /* avx512vl_expandv4si_mask */ |
| 69883 | case 4766: /* avx512vl_expandv4df_mask */ |
| 69884 | case 4765: /* avx512vl_expandv4di_mask */ |
| 69885 | case 4764: /* avx512vl_expandv8sf_mask */ |
| 69886 | case 4763: /* avx512vl_expandv8si_mask */ |
| 69887 | case 3903: /* sse4_2_pcmpistrm */ |
| 69888 | case 3902: /* sse4_2_pcmpistri */ |
| 69889 | case 3901: /* sse4_2_pcmpistr */ |
| 69890 | case 3899: /* sse4_2_pcmpestrm */ |
| 69891 | case 3898: /* sse4_2_pcmpestri */ |
| 69892 | case 3897: /* sse4_2_pcmpestr */ |
| 69893 | case 1256: /* avx512vl_loadv8hi_mask */ |
| 69894 | case 1255: /* avx512vl_loadv16hi_mask */ |
| 69895 | case 1253: /* avx512vl_loadv32qi_mask */ |
| 69896 | case 1252: /* avx512vl_loadv16qi_mask */ |
| 69897 | case 1250: /* avx512vl_loadv2df_mask */ |
| 69898 | case 1249: /* avx512vl_loadv4df_mask */ |
| 69899 | case 1247: /* avx512vl_loadv4sf_mask */ |
| 69900 | case 1246: /* avx512vl_loadv8sf_mask */ |
| 69901 | case 1244: /* avx512vl_loadv2di_mask */ |
| 69902 | case 1243: /* avx512vl_loadv4di_mask */ |
| 69903 | case 1241: /* avx512vl_loadv4si_mask */ |
| 69904 | case 1240: /* avx512vl_loadv8si_mask */ |
| 69905 | extract_constrain_insn_cached (insn); |
| 69906 | if (which_alternative == 0) |
| 69907 | { |
| 69908 | return 1; |
| 69909 | } |
| 69910 | else |
| 69911 | { |
| 69912 | return 8; |
| 69913 | } |
| 69914 | |
| 69915 | case 4869: /* sha256rnds2 */ |
| 69916 | case 4868: /* sha256msg2 */ |
| 69917 | case 4867: /* sha256msg1 */ |
| 69918 | case 4866: /* sha1rnds4 */ |
| 69919 | case 4865: /* sha1nexte */ |
| 69920 | case 4864: /* sha1msg2 */ |
| 69921 | case 4863: /* sha1msg1 */ |
| 69922 | case 4838: /* avx512bw_dbpsadbwv32hi_mask */ |
| 69923 | case 4837: /* *avx512bw_dbpsadbwv32hi */ |
| 69924 | case 4834: /* avx512bw_dbpsadbwv8hi_mask */ |
| 69925 | case 4833: /* *avx512bw_dbpsadbwv8hi */ |
| 69926 | case 4430: /* avx2_maskstoreq */ |
| 69927 | case 4429: /* avx2_maskstored */ |
| 69928 | case 4426: /* avx_maskstorepd */ |
| 69929 | case 4425: /* avx_maskstoreps */ |
| 69930 | case 4422: /* avx2_maskloadq */ |
| 69931 | case 4421: /* avx2_maskloadd */ |
| 69932 | case 4418: /* avx_maskloadpd */ |
| 69933 | case 4417: /* avx_maskloadps */ |
| 69934 | case 4054: /* pclmulqdq */ |
| 69935 | case 4053: /* aeskeygenassist */ |
| 69936 | case 4052: /* aesimc */ |
| 69937 | case 4051: /* aesdeclast */ |
| 69938 | case 4050: /* aesdec */ |
| 69939 | case 4049: /* aesenclast */ |
| 69940 | case 4048: /* aesenc */ |
| 69941 | case 3801: /* sse4_1_phminposuw */ |
| 69942 | case 3763: /* absv2si2 */ |
| 69943 | case 3762: /* absv4hi2 */ |
| 69944 | case 3761: /* absv8qi2 */ |
| 69945 | case 3760: /* absv8hi2_mask */ |
| 69946 | case 3758: /* absv32hi2_mask */ |
| 69947 | case 3756: /* absv16qi2_mask */ |
| 69948 | case 3755: /* absv64qi2_mask */ |
| 69949 | case 3754: /* absv2di2_mask */ |
| 69950 | case 3752: /* absv8di2_mask */ |
| 69951 | case 3751: /* absv4si2_mask */ |
| 69952 | case 3749: /* absv16si2_mask */ |
| 69953 | case 3748: /* *absv2di2 */ |
| 69954 | case 3746: /* *absv8di2 */ |
| 69955 | case 3745: /* *absv4si2 */ |
| 69956 | case 3743: /* *absv16si2 */ |
| 69957 | case 3742: /* *absv8hi2 */ |
| 69958 | case 3740: /* *absv32hi2 */ |
| 69959 | case 3739: /* *absv16qi2 */ |
| 69960 | case 3737: /* *absv64qi2 */ |
| 69961 | case 3729: /* ssse3_psignv2si3 */ |
| 69962 | case 3728: /* ssse3_psignv4hi3 */ |
| 69963 | case 3727: /* ssse3_psignv8qi3 */ |
| 69964 | case 3726: /* ssse3_psignv4si3 */ |
| 69965 | case 3724: /* ssse3_psignv8hi3 */ |
| 69966 | case 3722: /* ssse3_psignv16qi3 */ |
| 69967 | case 3720: /* ssse3_pshufbv8qi3 */ |
| 69968 | case 3719: /* ssse3_pshufbv16qi3_mask */ |
| 69969 | case 3718: /* ssse3_pshufbv16qi3 */ |
| 69970 | case 3715: /* avx512bw_pshufbv64qi3_mask */ |
| 69971 | case 3714: /* avx512bw_pshufbv64qi3 */ |
| 69972 | case 3635: /* *vec_extractv4si_zext */ |
| 69973 | case 3626: /* *vec_extractv8hi_zext */ |
| 69974 | case 3625: /* *vec_extractv8hi_zext */ |
| 69975 | case 3624: /* *vec_extractv16qi_zext */ |
| 69976 | case 3623: /* *vec_extractv16qi_zext */ |
| 69977 | case 3622: /* *vec_extractv8hi */ |
| 69978 | case 3621: /* *vec_extractv16qi */ |
| 69979 | case 3607: /* sse2_pshufd_1_mask */ |
| 69980 | case 3606: /* sse2_pshufd_1 */ |
| 69981 | case 3603: /* avx512f_pshufd_1_mask */ |
| 69982 | case 3602: /* avx512f_pshufd_1 */ |
| 69983 | case 2734: /* vec_dupv2df_mask */ |
| 69984 | case 2733: /* vec_dupv2df */ |
| 69985 | case 2498: /* vec_extract_hi_v16si_mask */ |
| 69986 | case 2497: /* vec_extract_hi_v16si */ |
| 69987 | case 2496: /* vec_extract_hi_v16sf_mask */ |
| 69988 | case 2495: /* vec_extract_hi_v16sf */ |
| 69989 | case 2494: /* vec_extract_hi_v16si_maskm */ |
| 69990 | case 2493: /* vec_extract_hi_v16sf_maskm */ |
| 69991 | case 2492: /* vec_extract_hi_v8di_mask */ |
| 69992 | case 2491: /* vec_extract_hi_v8di */ |
| 69993 | case 2490: /* vec_extract_hi_v8df_mask */ |
| 69994 | case 2489: /* vec_extract_hi_v8df */ |
| 69995 | case 2486: /* vec_extract_lo_v8di_mask */ |
| 69996 | case 2485: /* vec_extract_lo_v8di */ |
| 69997 | case 2484: /* vec_extract_lo_v8df_mask */ |
| 69998 | case 2483: /* vec_extract_lo_v8df */ |
| 69999 | case 2482: /* vec_extract_lo_v8di_maskm */ |
| 70000 | case 2481: /* vec_extract_lo_v8df_maskm */ |
| 70001 | case 2480: /* avx512f_vextracti32x4_1_mask */ |
| 70002 | case 2479: /* *avx512f_vextracti32x4_1 */ |
| 70003 | case 2478: /* avx512f_vextractf32x4_1_mask */ |
| 70004 | case 2477: /* *avx512f_vextractf32x4_1 */ |
| 70005 | case 2476: /* avx512dq_vextracti64x2_1_mask */ |
| 70006 | case 2475: /* *avx512dq_vextracti64x2_1 */ |
| 70007 | case 2474: /* avx512dq_vextractf64x2_1_mask */ |
| 70008 | case 2473: /* *avx512dq_vextractf64x2_1 */ |
| 70009 | case 2458: /* avx512f_vec_dupv8df_1 */ |
| 70010 | case 2457: /* avx512f_vec_dupv16sf_1 */ |
| 70011 | case 2455: /* avx2_vec_dupv4sf */ |
| 70012 | case 1020: /* sse4_2_crc32di */ |
| 70013 | case 1019: /* sse4_2_crc32si */ |
| 70014 | case 1018: /* sse4_2_crc32hi */ |
| 70015 | case 1017: /* sse4_2_crc32qi */ |
| 70016 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) |
| 70017 | { |
| 70018 | return 1; |
| 70019 | } |
| 70020 | else |
| 70021 | { |
| 70022 | return 8; |
| 70023 | } |
| 70024 | |
| 70025 | case 3713: /* *ssse3_pmulhrswv4hi3 */ |
| 70026 | case 3712: /* *ssse3_pmulhrswv8hi3_mask */ |
| 70027 | case 3711: /* *ssse3_pmulhrswv8hi3 */ |
| 70028 | case 3079: /* *sse4_1_mulv4si3_mask */ |
| 70029 | case 3078: /* *sse4_1_mulv4si3 */ |
| 70030 | case 3073: /* avx512dq_mulv2di3_mask */ |
| 70031 | case 3072: /* avx512dq_mulv2di3 */ |
| 70032 | case 3059: /* *sse4_1_mulv2siv2di3_mask */ |
| 70033 | case 3058: /* *sse4_1_mulv2siv2di3 */ |
| 70034 | case 3053: /* *vec_widen_umult_even_v4si_mask */ |
| 70035 | case 3052: /* *vec_widen_umult_even_v4si */ |
| 70036 | case 3047: /* *umulv8hi3_highpart_mask */ |
| 70037 | case 3046: /* *umulv8hi3_highpart */ |
| 70038 | case 3045: /* *smulv8hi3_highpart_mask */ |
| 70039 | case 3044: /* *smulv8hi3_highpart */ |
| 70040 | case 3035: /* *mulv8hi3_mask */ |
| 70041 | case 3034: /* *mulv8hi3 */ |
| 70042 | case 1620: /* sse3_hsubv4sf3 */ |
| 70043 | case 1619: /* sse3_haddv4sf3 */ |
| 70044 | case 1618: /* avx_hsubv8sf3 */ |
| 70045 | case 1617: /* avx_haddv8sf3 */ |
| 70046 | case 1614: /* sse3_hsubv2df3 */ |
| 70047 | case 1613: /* *sse3_haddv2df3 */ |
| 70048 | case 1612: /* avx_hsubv4df3 */ |
| 70049 | case 1611: /* avx_haddv4df3 */ |
| 70050 | case 1610: /* sse3_addsubv4sf3 */ |
| 70051 | case 1609: /* avx_addsubv8sf3 */ |
| 70052 | case 1608: /* sse3_addsubv2df3 */ |
| 70053 | case 1607: /* avx_addsubv4df3 */ |
| 70054 | case 1598: /* ieee_minv2df3_mask */ |
| 70055 | case 1597: /* ieee_minv2df3 */ |
| 70056 | case 1596: /* ieee_maxv2df3_mask */ |
| 70057 | case 1595: /* ieee_maxv2df3 */ |
| 70058 | case 1594: /* ieee_minv4df3_mask */ |
| 70059 | case 1593: /* ieee_minv4df3 */ |
| 70060 | case 1592: /* ieee_maxv4df3_mask */ |
| 70061 | case 1591: /* ieee_maxv4df3 */ |
| 70062 | case 1582: /* ieee_minv4sf3_mask */ |
| 70063 | case 1581: /* ieee_minv4sf3 */ |
| 70064 | case 1580: /* ieee_maxv4sf3_mask */ |
| 70065 | case 1579: /* ieee_maxv4sf3 */ |
| 70066 | case 1578: /* ieee_minv8sf3_mask */ |
| 70067 | case 1577: /* ieee_minv8sf3 */ |
| 70068 | case 1576: /* ieee_maxv8sf3_mask */ |
| 70069 | case 1575: /* ieee_maxv8sf3 */ |
| 70070 | case 1566: /* *sminv2df3_mask_round */ |
| 70071 | case 1565: /* *sminv2df3_mask */ |
| 70072 | case 1564: /* *sminv2df3_round */ |
| 70073 | case 1563: /* *sminv2df3 */ |
| 70074 | case 1562: /* *smaxv2df3_mask_round */ |
| 70075 | case 1561: /* *smaxv2df3_mask */ |
| 70076 | case 1560: /* *smaxv2df3_round */ |
| 70077 | case 1559: /* *smaxv2df3 */ |
| 70078 | case 1558: /* *sminv4df3_mask_round */ |
| 70079 | case 1557: /* *sminv4df3_mask */ |
| 70080 | case 1556: /* *sminv4df3_round */ |
| 70081 | case 1555: /* *sminv4df3 */ |
| 70082 | case 1554: /* *smaxv4df3_mask_round */ |
| 70083 | case 1553: /* *smaxv4df3_mask */ |
| 70084 | case 1552: /* *smaxv4df3_round */ |
| 70085 | case 1551: /* *smaxv4df3 */ |
| 70086 | case 1542: /* *sminv4sf3_mask_round */ |
| 70087 | case 1541: /* *sminv4sf3_mask */ |
| 70088 | case 1540: /* *sminv4sf3_round */ |
| 70089 | case 1539: /* *sminv4sf3 */ |
| 70090 | case 1538: /* *smaxv4sf3_mask_round */ |
| 70091 | case 1537: /* *smaxv4sf3_mask */ |
| 70092 | case 1536: /* *smaxv4sf3_round */ |
| 70093 | case 1535: /* *smaxv4sf3 */ |
| 70094 | case 1534: /* *sminv8sf3_mask_round */ |
| 70095 | case 1533: /* *sminv8sf3_mask */ |
| 70096 | case 1532: /* *sminv8sf3_round */ |
| 70097 | case 1531: /* *sminv8sf3 */ |
| 70098 | case 1530: /* *smaxv8sf3_mask_round */ |
| 70099 | case 1529: /* *smaxv8sf3_mask */ |
| 70100 | case 1528: /* *smaxv8sf3_round */ |
| 70101 | case 1527: /* *smaxv8sf3 */ |
| 70102 | case 1442: /* sse_vmmulv4sf3_round */ |
| 70103 | case 1441: /* sse_vmmulv4sf3 */ |
| 70104 | case 1428: /* *mulv4sf3_mask_round */ |
| 70105 | case 1427: /* *mulv4sf3_mask */ |
| 70106 | case 1426: /* *mulv4sf3_round */ |
| 70107 | case 1425: /* *mulv4sf3 */ |
| 70108 | case 1424: /* *mulv8sf3_mask_round */ |
| 70109 | case 1423: /* *mulv8sf3_mask */ |
| 70110 | case 1422: /* *mulv8sf3_round */ |
| 70111 | case 1421: /* *mulv8sf3 */ |
| 70112 | case 1416: /* sse2_vmsubv2df3_round */ |
| 70113 | case 1415: /* sse2_vmsubv2df3 */ |
| 70114 | case 1414: /* sse2_vmaddv2df3_round */ |
| 70115 | case 1413: /* sse2_vmaddv2df3 */ |
| 70116 | case 1412: /* sse_vmsubv4sf3_round */ |
| 70117 | case 1411: /* sse_vmsubv4sf3 */ |
| 70118 | case 1410: /* sse_vmaddv4sf3_round */ |
| 70119 | case 1409: /* sse_vmaddv4sf3 */ |
| 70120 | case 1408: /* *subv2df3_mask_round */ |
| 70121 | case 1407: /* *subv2df3_mask */ |
| 70122 | case 1406: /* *subv2df3_round */ |
| 70123 | case 1405: /* *subv2df3 */ |
| 70124 | case 1404: /* *addv2df3_mask_round */ |
| 70125 | case 1403: /* *addv2df3_mask */ |
| 70126 | case 1402: /* *addv2df3_round */ |
| 70127 | case 1401: /* *addv2df3 */ |
| 70128 | case 1400: /* *subv4df3_mask_round */ |
| 70129 | case 1399: /* *subv4df3_mask */ |
| 70130 | case 1398: /* *subv4df3_round */ |
| 70131 | case 1397: /* *subv4df3 */ |
| 70132 | case 1396: /* *addv4df3_mask_round */ |
| 70133 | case 1395: /* *addv4df3_mask */ |
| 70134 | case 1394: /* *addv4df3_round */ |
| 70135 | case 1393: /* *addv4df3 */ |
| 70136 | case 1384: /* *subv4sf3_mask_round */ |
| 70137 | case 1383: /* *subv4sf3_mask */ |
| 70138 | case 1382: /* *subv4sf3_round */ |
| 70139 | case 1381: /* *subv4sf3 */ |
| 70140 | case 1380: /* *addv4sf3_mask_round */ |
| 70141 | case 1379: /* *addv4sf3_mask */ |
| 70142 | case 1378: /* *addv4sf3_round */ |
| 70143 | case 1377: /* *addv4sf3 */ |
| 70144 | case 1376: /* *subv8sf3_mask_round */ |
| 70145 | case 1375: /* *subv8sf3_mask */ |
| 70146 | case 1374: /* *subv8sf3_round */ |
| 70147 | case 1373: /* *subv8sf3 */ |
| 70148 | case 1372: /* *addv8sf3_mask_round */ |
| 70149 | case 1371: /* *addv8sf3_mask */ |
| 70150 | case 1370: /* *addv8sf3_round */ |
| 70151 | case 1369: /* *addv8sf3 */ |
| 70152 | case 1160: /* *sse2_umulv1siv1di3 */ |
| 70153 | case 1159: /* *mmx_pmulhrwv4hi3 */ |
| 70154 | case 1158: /* *mmx_pmaddwd */ |
| 70155 | case 1157: /* *mmx_umulv4hi3_highpart */ |
| 70156 | case 1156: /* *mmx_smulv4hi3_highpart */ |
| 70157 | case 1155: /* *mmx_mulv4hi3 */ |
| 70158 | case 1114: /* *mmx_mulv2sf3 */ |
| 70159 | case 992: /* *ieee_smindf3 */ |
| 70160 | case 991: /* *ieee_smaxdf3 */ |
| 70161 | case 990: /* *ieee_sminsf3 */ |
| 70162 | case 989: /* *ieee_smaxsf3 */ |
| 70163 | case 988: /* smindf3 */ |
| 70164 | case 987: /* smaxdf3 */ |
| 70165 | case 986: /* sminsf3 */ |
| 70166 | case 985: /* smaxsf3 */ |
| 70167 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) |
| 70168 | { |
| 70169 | return 3; |
| 70170 | } |
| 70171 | else if (cached_memory == MEMORY_LOAD) |
| 70172 | { |
| 70173 | return 10 /* 0xa */; |
| 70174 | } |
| 70175 | else |
| 70176 | { |
| 70177 | return 0; |
| 70178 | } |
| 70179 | |
| 70180 | case 4746: /* avx512vl_compressv2df_mask */ |
| 70181 | case 4745: /* avx512vl_compressv2di_mask */ |
| 70182 | case 4744: /* avx512vl_compressv4sf_mask */ |
| 70183 | case 4743: /* avx512vl_compressv4si_mask */ |
| 70184 | case 4742: /* avx512vl_compressv4df_mask */ |
| 70185 | case 4741: /* avx512vl_compressv4di_mask */ |
| 70186 | case 4740: /* avx512vl_compressv8sf_mask */ |
| 70187 | case 4739: /* avx512vl_compressv8si_mask */ |
| 70188 | case 4734: /* *avx512f_scatterdiv2df */ |
| 70189 | case 4733: /* *avx512f_scatterdiv2df */ |
| 70190 | case 4732: /* *avx512f_scatterdiv2di */ |
| 70191 | case 4731: /* *avx512f_scatterdiv2di */ |
| 70192 | case 4730: /* *avx512f_scatterdiv4sf */ |
| 70193 | case 4729: /* *avx512f_scatterdiv4sf */ |
| 70194 | case 4728: /* *avx512f_scatterdiv4si */ |
| 70195 | case 4727: /* *avx512f_scatterdiv4si */ |
| 70196 | case 4726: /* *avx512f_scatterdiv4df */ |
| 70197 | case 4725: /* *avx512f_scatterdiv4df */ |
| 70198 | case 4724: /* *avx512f_scatterdiv4di */ |
| 70199 | case 4723: /* *avx512f_scatterdiv4di */ |
| 70200 | case 4722: /* *avx512f_scatterdiv8sf */ |
| 70201 | case 4721: /* *avx512f_scatterdiv8sf */ |
| 70202 | case 4720: /* *avx512f_scatterdiv8si */ |
| 70203 | case 4719: /* *avx512f_scatterdiv8si */ |
| 70204 | case 4710: /* *avx512f_scattersiv2df */ |
| 70205 | case 4709: /* *avx512f_scattersiv2df */ |
| 70206 | case 4708: /* *avx512f_scattersiv2di */ |
| 70207 | case 4707: /* *avx512f_scattersiv2di */ |
| 70208 | case 4706: /* *avx512f_scattersiv4sf */ |
| 70209 | case 4705: /* *avx512f_scattersiv4sf */ |
| 70210 | case 4704: /* *avx512f_scattersiv4si */ |
| 70211 | case 4703: /* *avx512f_scattersiv4si */ |
| 70212 | case 4702: /* *avx512f_scattersiv4df */ |
| 70213 | case 4701: /* *avx512f_scattersiv4df */ |
| 70214 | case 4700: /* *avx512f_scattersiv4di */ |
| 70215 | case 4699: /* *avx512f_scattersiv4di */ |
| 70216 | case 4698: /* *avx512f_scattersiv8sf */ |
| 70217 | case 4697: /* *avx512f_scattersiv8sf */ |
| 70218 | case 4696: /* *avx512f_scattersiv8si */ |
| 70219 | case 4695: /* *avx512f_scattersiv8si */ |
| 70220 | case 4686: /* *avx512f_gatherdiv2df_2 */ |
| 70221 | case 4685: /* *avx512f_gatherdiv2df_2 */ |
| 70222 | case 4684: /* *avx512f_gatherdiv2di_2 */ |
| 70223 | case 4683: /* *avx512f_gatherdiv2di_2 */ |
| 70224 | case 4682: /* *avx512f_gatherdiv4sf_2 */ |
| 70225 | case 4681: /* *avx512f_gatherdiv4sf_2 */ |
| 70226 | case 4680: /* *avx512f_gatherdiv4si_2 */ |
| 70227 | case 4679: /* *avx512f_gatherdiv4si_2 */ |
| 70228 | case 4678: /* *avx512f_gatherdiv4df_2 */ |
| 70229 | case 4677: /* *avx512f_gatherdiv4df_2 */ |
| 70230 | case 4676: /* *avx512f_gatherdiv4di_2 */ |
| 70231 | case 4675: /* *avx512f_gatherdiv4di_2 */ |
| 70232 | case 4674: /* *avx512f_gatherdiv8sf_2 */ |
| 70233 | case 4673: /* *avx512f_gatherdiv8sf_2 */ |
| 70234 | case 4672: /* *avx512f_gatherdiv8si_2 */ |
| 70235 | case 4671: /* *avx512f_gatherdiv8si_2 */ |
| 70236 | case 4662: /* *avx512f_gatherdiv2df */ |
| 70237 | case 4661: /* *avx512f_gatherdiv2df */ |
| 70238 | case 4660: /* *avx512f_gatherdiv2di */ |
| 70239 | case 4659: /* *avx512f_gatherdiv2di */ |
| 70240 | case 4658: /* *avx512f_gatherdiv4sf */ |
| 70241 | case 4657: /* *avx512f_gatherdiv4sf */ |
| 70242 | case 4656: /* *avx512f_gatherdiv4si */ |
| 70243 | case 4655: /* *avx512f_gatherdiv4si */ |
| 70244 | case 4654: /* *avx512f_gatherdiv4df */ |
| 70245 | case 4653: /* *avx512f_gatherdiv4df */ |
| 70246 | case 4652: /* *avx512f_gatherdiv4di */ |
| 70247 | case 4651: /* *avx512f_gatherdiv4di */ |
| 70248 | case 4650: /* *avx512f_gatherdiv8sf */ |
| 70249 | case 4649: /* *avx512f_gatherdiv8sf */ |
| 70250 | case 4648: /* *avx512f_gatherdiv8si */ |
| 70251 | case 4647: /* *avx512f_gatherdiv8si */ |
| 70252 | case 4638: /* *avx512f_gathersiv2df_2 */ |
| 70253 | case 4637: /* *avx512f_gathersiv2df_2 */ |
| 70254 | case 4636: /* *avx512f_gathersiv2di_2 */ |
| 70255 | case 4635: /* *avx512f_gathersiv2di_2 */ |
| 70256 | case 4634: /* *avx512f_gathersiv4sf_2 */ |
| 70257 | case 4633: /* *avx512f_gathersiv4sf_2 */ |
| 70258 | case 4632: /* *avx512f_gathersiv4si_2 */ |
| 70259 | case 4631: /* *avx512f_gathersiv4si_2 */ |
| 70260 | case 4630: /* *avx512f_gathersiv4df_2 */ |
| 70261 | case 4629: /* *avx512f_gathersiv4df_2 */ |
| 70262 | case 4628: /* *avx512f_gathersiv4di_2 */ |
| 70263 | case 4627: /* *avx512f_gathersiv4di_2 */ |
| 70264 | case 4626: /* *avx512f_gathersiv8sf_2 */ |
| 70265 | case 4625: /* *avx512f_gathersiv8sf_2 */ |
| 70266 | case 4624: /* *avx512f_gathersiv8si_2 */ |
| 70267 | case 4623: /* *avx512f_gathersiv8si_2 */ |
| 70268 | case 4614: /* *avx512f_gathersiv2df */ |
| 70269 | case 4613: /* *avx512f_gathersiv2df */ |
| 70270 | case 4612: /* *avx512f_gathersiv2di */ |
| 70271 | case 4611: /* *avx512f_gathersiv2di */ |
| 70272 | case 4610: /* *avx512f_gathersiv4sf */ |
| 70273 | case 4609: /* *avx512f_gathersiv4sf */ |
| 70274 | case 4608: /* *avx512f_gathersiv4si */ |
| 70275 | case 4607: /* *avx512f_gathersiv4si */ |
| 70276 | case 4606: /* *avx512f_gathersiv4df */ |
| 70277 | case 4605: /* *avx512f_gathersiv4df */ |
| 70278 | case 4604: /* *avx512f_gathersiv4di */ |
| 70279 | case 4603: /* *avx512f_gathersiv4di */ |
| 70280 | case 4602: /* *avx512f_gathersiv8sf */ |
| 70281 | case 4601: /* *avx512f_gathersiv8sf */ |
| 70282 | case 4600: /* *avx512f_gathersiv8si */ |
| 70283 | case 4599: /* *avx512f_gathersiv8si */ |
| 70284 | case 4590: /* *avx2_gatherdiv8sf_4 */ |
| 70285 | case 4589: /* *avx2_gatherdiv8sf_4 */ |
| 70286 | case 4588: /* *avx2_gatherdiv8si_4 */ |
| 70287 | case 4587: /* *avx2_gatherdiv8si_4 */ |
| 70288 | case 4586: /* *avx2_gatherdiv8sf_3 */ |
| 70289 | case 4585: /* *avx2_gatherdiv8sf_3 */ |
| 70290 | case 4584: /* *avx2_gatherdiv8si_3 */ |
| 70291 | case 4583: /* *avx2_gatherdiv8si_3 */ |
| 70292 | case 4582: /* *avx2_gatherdiv8sf_2 */ |
| 70293 | case 4581: /* *avx2_gatherdiv8sf_2 */ |
| 70294 | case 4580: /* *avx2_gatherdiv8si_2 */ |
| 70295 | case 4579: /* *avx2_gatherdiv8si_2 */ |
| 70296 | case 4578: /* *avx2_gatherdiv4sf_2 */ |
| 70297 | case 4577: /* *avx2_gatherdiv4sf_2 */ |
| 70298 | case 4576: /* *avx2_gatherdiv4si_2 */ |
| 70299 | case 4575: /* *avx2_gatherdiv4si_2 */ |
| 70300 | case 4574: /* *avx2_gatherdiv4df_2 */ |
| 70301 | case 4573: /* *avx2_gatherdiv4df_2 */ |
| 70302 | case 4572: /* *avx2_gatherdiv4di_2 */ |
| 70303 | case 4571: /* *avx2_gatherdiv4di_2 */ |
| 70304 | case 4570: /* *avx2_gatherdiv2df_2 */ |
| 70305 | case 4569: /* *avx2_gatherdiv2df_2 */ |
| 70306 | case 4568: /* *avx2_gatherdiv2di_2 */ |
| 70307 | case 4567: /* *avx2_gatherdiv2di_2 */ |
| 70308 | case 4566: /* *avx2_gatherdiv8sf */ |
| 70309 | case 4565: /* *avx2_gatherdiv8sf */ |
| 70310 | case 4564: /* *avx2_gatherdiv8si */ |
| 70311 | case 4563: /* *avx2_gatherdiv8si */ |
| 70312 | case 4562: /* *avx2_gatherdiv4sf */ |
| 70313 | case 4561: /* *avx2_gatherdiv4sf */ |
| 70314 | case 4560: /* *avx2_gatherdiv4si */ |
| 70315 | case 4559: /* *avx2_gatherdiv4si */ |
| 70316 | case 4558: /* *avx2_gatherdiv4df */ |
| 70317 | case 4557: /* *avx2_gatherdiv4df */ |
| 70318 | case 4556: /* *avx2_gatherdiv4di */ |
| 70319 | case 4555: /* *avx2_gatherdiv4di */ |
| 70320 | case 4554: /* *avx2_gatherdiv2df */ |
| 70321 | case 4553: /* *avx2_gatherdiv2df */ |
| 70322 | case 4552: /* *avx2_gatherdiv2di */ |
| 70323 | case 4551: /* *avx2_gatherdiv2di */ |
| 70324 | case 4550: /* *avx2_gathersiv8sf_2 */ |
| 70325 | case 4549: /* *avx2_gathersiv8sf_2 */ |
| 70326 | case 4548: /* *avx2_gathersiv8si_2 */ |
| 70327 | case 4547: /* *avx2_gathersiv8si_2 */ |
| 70328 | case 4546: /* *avx2_gathersiv4sf_2 */ |
| 70329 | case 4545: /* *avx2_gathersiv4sf_2 */ |
| 70330 | case 4544: /* *avx2_gathersiv4si_2 */ |
| 70331 | case 4543: /* *avx2_gathersiv4si_2 */ |
| 70332 | case 4542: /* *avx2_gathersiv4df_2 */ |
| 70333 | case 4541: /* *avx2_gathersiv4df_2 */ |
| 70334 | case 4540: /* *avx2_gathersiv4di_2 */ |
| 70335 | case 4539: /* *avx2_gathersiv4di_2 */ |
| 70336 | case 4538: /* *avx2_gathersiv2df_2 */ |
| 70337 | case 4537: /* *avx2_gathersiv2df_2 */ |
| 70338 | case 4536: /* *avx2_gathersiv2di_2 */ |
| 70339 | case 4535: /* *avx2_gathersiv2di_2 */ |
| 70340 | case 4534: /* *avx2_gathersiv8sf */ |
| 70341 | case 4533: /* *avx2_gathersiv8sf */ |
| 70342 | case 4532: /* *avx2_gathersiv8si */ |
| 70343 | case 4531: /* *avx2_gathersiv8si */ |
| 70344 | case 4530: /* *avx2_gathersiv4sf */ |
| 70345 | case 4529: /* *avx2_gathersiv4sf */ |
| 70346 | case 4528: /* *avx2_gathersiv4si */ |
| 70347 | case 4527: /* *avx2_gathersiv4si */ |
| 70348 | case 4526: /* *avx2_gathersiv4df */ |
| 70349 | case 4525: /* *avx2_gathersiv4df */ |
| 70350 | case 4524: /* *avx2_gathersiv4di */ |
| 70351 | case 4523: /* *avx2_gathersiv4di */ |
| 70352 | case 4522: /* *avx2_gathersiv2df */ |
| 70353 | case 4521: /* *avx2_gathersiv2df */ |
| 70354 | case 4520: /* *avx2_gathersiv2di */ |
| 70355 | case 4519: /* *avx2_gathersiv2di */ |
| 70356 | case 4243: /* avx512dq_broadcastv4df_mask_1 */ |
| 70357 | case 4242: /* *avx512dq_broadcastv4df_1 */ |
| 70358 | case 4241: /* avx512dq_broadcastv4di_mask_1 */ |
| 70359 | case 4240: /* *avx512dq_broadcastv4di_1 */ |
| 70360 | case 4231: /* avx512vl_broadcastv8sf_mask_1 */ |
| 70361 | case 4230: /* *avx512vl_broadcastv8sf_1 */ |
| 70362 | case 4229: /* avx512vl_broadcastv8si_mask_1 */ |
| 70363 | case 4228: /* *avx512vl_broadcastv8si_1 */ |
| 70364 | case 4227: /* avx512dq_broadcastv8sf_mask */ |
| 70365 | case 4226: /* *avx512dq_broadcastv8sf */ |
| 70366 | case 4223: /* avx512dq_broadcastv4si_mask */ |
| 70367 | case 4222: /* *avx512dq_broadcastv4si */ |
| 70368 | case 4221: /* avx512dq_broadcastv8si_mask */ |
| 70369 | case 4220: /* *avx512dq_broadcastv8si */ |
| 70370 | case 4211: /* vec_dupv4df */ |
| 70371 | case 4210: /* vec_dupv4di */ |
| 70372 | case 4209: /* vec_dupv8sf */ |
| 70373 | case 4208: /* vec_dupv8si */ |
| 70374 | case 4207: /* *vec_dupv4si */ |
| 70375 | case 4206: /* *vec_dupv8si */ |
| 70376 | case 4205: /* *vec_dupv8hi */ |
| 70377 | case 4204: /* *vec_dupv16hi */ |
| 70378 | case 4203: /* *vec_dupv16qi */ |
| 70379 | case 4202: /* *vec_dupv32qi */ |
| 70380 | case 4201: /* avx2_vbroadcasti128_v4di */ |
| 70381 | case 4200: /* avx2_vbroadcasti128_v8si */ |
| 70382 | case 4199: /* avx2_vbroadcasti128_v16hi */ |
| 70383 | case 4198: /* avx2_vbroadcasti128_v32qi */ |
| 70384 | case 4194: /* avx512vl_vec_dup_gprv2df_mask */ |
| 70385 | case 4193: /* *avx512vl_vec_dup_gprv2df */ |
| 70386 | case 4192: /* avx512vl_vec_dup_gprv4df_mask */ |
| 70387 | case 4191: /* *avx512vl_vec_dup_gprv4df */ |
| 70388 | case 4188: /* avx512vl_vec_dup_gprv4sf_mask */ |
| 70389 | case 4187: /* *avx512vl_vec_dup_gprv4sf */ |
| 70390 | case 4186: /* avx512vl_vec_dup_gprv8sf_mask */ |
| 70391 | case 4185: /* *avx512vl_vec_dup_gprv8sf */ |
| 70392 | case 4182: /* avx512vl_vec_dup_gprv2di_mask */ |
| 70393 | case 4181: /* *avx512vl_vec_dup_gprv2di */ |
| 70394 | case 4180: /* avx512vl_vec_dup_gprv4di_mask */ |
| 70395 | case 4179: /* *avx512vl_vec_dup_gprv4di */ |
| 70396 | case 4176: /* avx512vl_vec_dup_gprv4si_mask */ |
| 70397 | case 4175: /* *avx512vl_vec_dup_gprv4si */ |
| 70398 | case 4174: /* avx512vl_vec_dup_gprv8si_mask */ |
| 70399 | case 4173: /* *avx512vl_vec_dup_gprv8si */ |
| 70400 | case 4170: /* avx512vl_vec_dup_gprv8hi_mask */ |
| 70401 | case 4169: /* *avx512vl_vec_dup_gprv8hi */ |
| 70402 | case 4168: /* avx512vl_vec_dup_gprv16hi_mask */ |
| 70403 | case 4167: /* *avx512vl_vec_dup_gprv16hi */ |
| 70404 | case 4164: /* avx512vl_vec_dup_gprv32qi_mask */ |
| 70405 | case 4163: /* *avx512vl_vec_dup_gprv32qi */ |
| 70406 | case 4162: /* avx512vl_vec_dup_gprv16qi_mask */ |
| 70407 | case 4161: /* *avx512vl_vec_dup_gprv16qi */ |
| 70408 | case 4150: /* avx512vl_vec_dupv8hi_mask */ |
| 70409 | case 4149: /* avx512vl_vec_dupv8hi */ |
| 70410 | case 4148: /* avx512vl_vec_dupv16hi_mask */ |
| 70411 | case 4147: /* avx512vl_vec_dupv16hi */ |
| 70412 | case 4144: /* avx512vl_vec_dupv32qi_mask */ |
| 70413 | case 4143: /* avx512vl_vec_dupv32qi */ |
| 70414 | case 4142: /* avx512vl_vec_dupv16qi_mask */ |
| 70415 | case 4141: /* avx512vl_vec_dupv16qi */ |
| 70416 | case 4138: /* avx512vl_vec_dupv2df_mask */ |
| 70417 | case 4137: /* avx512vl_vec_dupv2df */ |
| 70418 | case 4136: /* avx512vl_vec_dupv4df_mask */ |
| 70419 | case 4135: /* avx512vl_vec_dupv4df */ |
| 70420 | case 4132: /* avx512vl_vec_dupv4sf_mask */ |
| 70421 | case 4131: /* avx512vl_vec_dupv4sf */ |
| 70422 | case 4130: /* avx512vl_vec_dupv8sf_mask */ |
| 70423 | case 4129: /* avx512vl_vec_dupv8sf */ |
| 70424 | case 4126: /* avx512vl_vec_dupv2di_mask */ |
| 70425 | case 4125: /* avx512vl_vec_dupv2di */ |
| 70426 | case 4124: /* avx512vl_vec_dupv4di_mask */ |
| 70427 | case 4123: /* avx512vl_vec_dupv4di */ |
| 70428 | case 4120: /* avx512vl_vec_dupv4si_mask */ |
| 70429 | case 4119: /* avx512vl_vec_dupv4si */ |
| 70430 | case 4118: /* avx512vl_vec_dupv8si_mask */ |
| 70431 | case 4117: /* avx512vl_vec_dupv8si */ |
| 70432 | case 4072: /* avx2_pbroadcastv4di_1 */ |
| 70433 | case 4071: /* avx2_pbroadcastv8si_1 */ |
| 70434 | case 4070: /* avx2_pbroadcastv16hi_1 */ |
| 70435 | case 4069: /* avx2_pbroadcastv32qi_1 */ |
| 70436 | case 4068: /* avx2_pbroadcastv2di */ |
| 70437 | case 4067: /* avx2_pbroadcastv4di */ |
| 70438 | case 4066: /* avx2_pbroadcastv4si */ |
| 70439 | case 4065: /* avx2_pbroadcastv8si */ |
| 70440 | case 4064: /* avx2_pbroadcastv8hi */ |
| 70441 | case 4063: /* avx2_pbroadcastv16hi */ |
| 70442 | case 4061: /* avx2_pbroadcastv16qi */ |
| 70443 | case 4060: /* avx2_pbroadcastv32qi */ |
| 70444 | case 3869: /* avx2_zero_extendv4siv4di2_mask */ |
| 70445 | case 3868: /* avx2_zero_extendv4siv4di2 */ |
| 70446 | case 3867: /* avx2_sign_extendv4siv4di2_mask */ |
| 70447 | case 3866: /* avx2_sign_extendv4siv4di2 */ |
| 70448 | case 3857: /* avx2_zero_extendv4hiv4di2_mask */ |
| 70449 | case 3856: /* avx2_zero_extendv4hiv4di2 */ |
| 70450 | case 3855: /* avx2_sign_extendv4hiv4di2_mask */ |
| 70451 | case 3854: /* avx2_sign_extendv4hiv4di2 */ |
| 70452 | case 3845: /* avx2_zero_extendv4qiv4di2_mask */ |
| 70453 | case 3844: /* avx2_zero_extendv4qiv4di2 */ |
| 70454 | case 3843: /* avx2_sign_extendv4qiv4di2_mask */ |
| 70455 | case 3842: /* avx2_sign_extendv4qiv4di2 */ |
| 70456 | case 3833: /* avx2_zero_extendv8hiv8si2_mask */ |
| 70457 | case 3832: /* avx2_zero_extendv8hiv8si2 */ |
| 70458 | case 3831: /* avx2_sign_extendv8hiv8si2_mask */ |
| 70459 | case 3830: /* avx2_sign_extendv8hiv8si2 */ |
| 70460 | case 3821: /* avx2_zero_extendv8qiv8si2_mask */ |
| 70461 | case 3820: /* avx2_zero_extendv8qiv8si2 */ |
| 70462 | case 3819: /* avx2_sign_extendv8qiv8si2_mask */ |
| 70463 | case 3818: /* avx2_sign_extendv8qiv8si2 */ |
| 70464 | case 3805: /* avx2_zero_extendv16qiv16hi2_mask */ |
| 70465 | case 3804: /* avx2_zero_extendv16qiv16hi2 */ |
| 70466 | case 3803: /* avx2_sign_extendv16qiv16hi2_mask */ |
| 70467 | case 3802: /* avx2_sign_extendv16qiv16hi2 */ |
| 70468 | case 3800: /* avx2_pblenddv4si */ |
| 70469 | case 3799: /* avx2_pblenddv8si */ |
| 70470 | case 3798: /* *avx2_pblendw */ |
| 70471 | case 3795: /* avx2_pblendvb */ |
| 70472 | case 3785: /* avx2_movntdqa */ |
| 70473 | case 3779: /* sse4_1_blendvpd */ |
| 70474 | case 3778: /* avx_blendvpd256 */ |
| 70475 | case 3777: /* sse4_1_blendvps */ |
| 70476 | case 3776: /* avx_blendvps256 */ |
| 70477 | case 3775: /* sse4_1_blendpd */ |
| 70478 | case 3774: /* avx_blendpd256 */ |
| 70479 | case 3773: /* sse4_1_blendps */ |
| 70480 | case 3772: /* avx_blendps256 */ |
| 70481 | case 3767: /* sse4a_vmmovntv2df */ |
| 70482 | case 3766: /* sse4a_vmmovntv4sf */ |
| 70483 | case 3765: /* sse4a_movntdf */ |
| 70484 | case 3764: /* sse4a_movntsf */ |
| 70485 | case 3665: /* *sse2_movmskpd_zext */ |
| 70486 | case 3664: /* *avx_movmskpd256_zext */ |
| 70487 | case 3663: /* *sse_movmskps_zext */ |
| 70488 | case 3662: /* *avx_movmskps256_zext */ |
| 70489 | case 3661: /* sse2_movmskpd */ |
| 70490 | case 3660: /* avx_movmskpd256 */ |
| 70491 | case 3659: /* sse_movmskps */ |
| 70492 | case 3658: /* avx_movmskps256 */ |
| 70493 | case 3620: /* sse2_loadld */ |
| 70494 | case 2930: /* *avx512f_us_truncatev8div16qi2_mask_1 */ |
| 70495 | case 2929: /* *avx512f_truncatev8div16qi2_mask_1 */ |
| 70496 | case 2928: /* *avx512f_ss_truncatev8div16qi2_mask_1 */ |
| 70497 | case 2927: /* avx512f_us_truncatev8div16qi2_mask */ |
| 70498 | case 2926: /* avx512f_truncatev8div16qi2_mask */ |
| 70499 | case 2925: /* avx512f_ss_truncatev8div16qi2_mask */ |
| 70500 | case 2921: /* *avx512f_us_truncatev8div16qi2 */ |
| 70501 | case 2920: /* *avx512f_truncatev8div16qi2 */ |
| 70502 | case 2919: /* *avx512f_ss_truncatev8div16qi2 */ |
| 70503 | case 2915: /* *avx512vl_us_truncatev2div2si2_mask_1 */ |
| 70504 | case 2914: /* *avx512vl_truncatev2div2si2_mask_1 */ |
| 70505 | case 2913: /* *avx512vl_ss_truncatev2div2si2_mask_1 */ |
| 70506 | case 2912: /* avx512vl_us_truncatev2div2si2_mask */ |
| 70507 | case 2911: /* avx512vl_truncatev2div2si2_mask */ |
| 70508 | case 2910: /* avx512vl_ss_truncatev2div2si2_mask */ |
| 70509 | case 2906: /* *avx512vl_us_truncatev2div2si2 */ |
| 70510 | case 2905: /* *avx512vl_truncatev2div2si2 */ |
| 70511 | case 2904: /* *avx512vl_ss_truncatev2div2si2 */ |
| 70512 | case 2900: /* *avx512vl_us_truncatev2div2hi2_mask_1 */ |
| 70513 | case 2899: /* *avx512vl_truncatev2div2hi2_mask_1 */ |
| 70514 | case 2898: /* *avx512vl_ss_truncatev2div2hi2_mask_1 */ |
| 70515 | case 2897: /* avx512vl_us_truncatev2div2hi2_mask */ |
| 70516 | case 2896: /* avx512vl_truncatev2div2hi2_mask */ |
| 70517 | case 2895: /* avx512vl_ss_truncatev2div2hi2_mask */ |
| 70518 | case 2885: /* *avx512vl_us_truncatev4div4hi2_mask_1 */ |
| 70519 | case 2884: /* *avx512vl_truncatev4div4hi2_mask_1 */ |
| 70520 | case 2883: /* *avx512vl_ss_truncatev4div4hi2_mask_1 */ |
| 70521 | case 2882: /* *avx512vl_us_truncatev4siv4hi2_mask_1 */ |
| 70522 | case 2881: /* *avx512vl_truncatev4siv4hi2_mask_1 */ |
| 70523 | case 2880: /* *avx512vl_ss_truncatev4siv4hi2_mask_1 */ |
| 70524 | case 2879: /* avx512vl_us_truncatev4div4hi2_mask */ |
| 70525 | case 2878: /* avx512vl_truncatev4div4hi2_mask */ |
| 70526 | case 2877: /* avx512vl_ss_truncatev4div4hi2_mask */ |
| 70527 | case 2876: /* avx512vl_us_truncatev4siv4hi2_mask */ |
| 70528 | case 2875: /* avx512vl_truncatev4siv4hi2_mask */ |
| 70529 | case 2874: /* avx512vl_ss_truncatev4siv4hi2_mask */ |
| 70530 | case 2867: /* *avx512vl_us_truncatev4siv4hi2 */ |
| 70531 | case 2866: /* *avx512vl_truncatev4siv4hi2 */ |
| 70532 | case 2865: /* *avx512vl_ss_truncatev4siv4hi2 */ |
| 70533 | case 2864: /* *avx512vl_us_truncatev2div2hi2 */ |
| 70534 | case 2863: /* *avx512vl_truncatev2div2hi2 */ |
| 70535 | case 2862: /* *avx512vl_ss_truncatev2div2hi2 */ |
| 70536 | case 2861: /* *avx512vl_us_truncatev4div4hi2 */ |
| 70537 | case 2860: /* *avx512vl_truncatev4div4hi2 */ |
| 70538 | case 2859: /* *avx512vl_ss_truncatev4div4hi2 */ |
| 70539 | case 2852: /* *avx512vl_us_truncatev8siv8qi2_mask_1 */ |
| 70540 | case 2851: /* *avx512vl_truncatev8siv8qi2_mask_1 */ |
| 70541 | case 2850: /* *avx512vl_ss_truncatev8siv8qi2_mask_1 */ |
| 70542 | case 2849: /* *avx512vl_us_truncatev8hiv8qi2_mask_1 */ |
| 70543 | case 2848: /* *avx512vl_truncatev8hiv8qi2_mask_1 */ |
| 70544 | case 2847: /* *avx512vl_ss_truncatev8hiv8qi2_mask_1 */ |
| 70545 | case 2846: /* avx512vl_us_truncatev8siv8qi2_mask */ |
| 70546 | case 2845: /* avx512vl_truncatev8siv8qi2_mask */ |
| 70547 | case 2844: /* avx512vl_ss_truncatev8siv8qi2_mask */ |
| 70548 | case 2843: /* avx512vl_us_truncatev8hiv8qi2_mask */ |
| 70549 | case 2842: /* avx512vl_truncatev8hiv8qi2_mask */ |
| 70550 | case 2841: /* avx512vl_ss_truncatev8hiv8qi2_mask */ |
| 70551 | case 2828: /* *avx512vl_us_truncatev4div4qi2_mask_1 */ |
| 70552 | case 2827: /* *avx512vl_truncatev4div4qi2_mask_1 */ |
| 70553 | case 2826: /* *avx512vl_ss_truncatev4div4qi2_mask_1 */ |
| 70554 | case 2825: /* *avx512vl_us_truncatev4siv4qi2_mask_1 */ |
| 70555 | case 2824: /* *avx512vl_truncatev4siv4qi2_mask_1 */ |
| 70556 | case 2823: /* *avx512vl_ss_truncatev4siv4qi2_mask_1 */ |
| 70557 | case 2822: /* avx512vl_us_truncatev4div4qi2_mask */ |
| 70558 | case 2821: /* avx512vl_truncatev4div4qi2_mask */ |
| 70559 | case 2820: /* avx512vl_ss_truncatev4div4qi2_mask */ |
| 70560 | case 2819: /* avx512vl_us_truncatev4siv4qi2_mask */ |
| 70561 | case 2818: /* avx512vl_truncatev4siv4qi2_mask */ |
| 70562 | case 2817: /* avx512vl_ss_truncatev4siv4qi2_mask */ |
| 70563 | case 2807: /* *avx512vl_us_truncatev2div2qi2_mask_1 */ |
| 70564 | case 2806: /* *avx512vl_truncatev2div2qi2_mask_1 */ |
| 70565 | case 2805: /* *avx512vl_ss_truncatev2div2qi2_mask_1 */ |
| 70566 | case 2804: /* avx512vl_us_truncatev2div2qi2_mask */ |
| 70567 | case 2803: /* avx512vl_truncatev2div2qi2_mask */ |
| 70568 | case 2802: /* avx512vl_ss_truncatev2div2qi2_mask */ |
| 70569 | case 2798: /* *avx512vl_us_truncatev8hiv8qi2 */ |
| 70570 | case 2797: /* *avx512vl_truncatev8hiv8qi2 */ |
| 70571 | case 2796: /* *avx512vl_ss_truncatev8hiv8qi2 */ |
| 70572 | case 2795: /* *avx512vl_us_truncatev4siv4qi2 */ |
| 70573 | case 2794: /* *avx512vl_truncatev4siv4qi2 */ |
| 70574 | case 2793: /* *avx512vl_ss_truncatev4siv4qi2 */ |
| 70575 | case 2792: /* *avx512vl_us_truncatev8siv8qi2 */ |
| 70576 | case 2791: /* *avx512vl_truncatev8siv8qi2 */ |
| 70577 | case 2790: /* *avx512vl_ss_truncatev8siv8qi2 */ |
| 70578 | case 2789: /* *avx512vl_us_truncatev2div2qi2 */ |
| 70579 | case 2788: /* *avx512vl_truncatev2div2qi2 */ |
| 70580 | case 2787: /* *avx512vl_ss_truncatev2div2qi2 */ |
| 70581 | case 2786: /* *avx512vl_us_truncatev4div4qi2 */ |
| 70582 | case 2785: /* *avx512vl_truncatev4div4qi2 */ |
| 70583 | case 2784: /* *avx512vl_ss_truncatev4div4qi2 */ |
| 70584 | case 2453: /* sse_movss */ |
| 70585 | case 1304: /* sse2_movntv2df */ |
| 70586 | case 1303: /* avx_movntv4df */ |
| 70587 | case 1301: /* sse_movntv4sf */ |
| 70588 | case 1300: /* avx_movntv8sf */ |
| 70589 | case 1296: /* sse3_lddqu */ |
| 70590 | case 1295: /* avx_lddqu256 */ |
| 70591 | case 1293: /* sse2_movq128 */ |
| 70592 | case 1274: /* avx512vl_blendmv8hi */ |
| 70593 | case 1273: /* avx512vl_blendmv16hi */ |
| 70594 | case 1271: /* avx512vl_blendmv32qi */ |
| 70595 | case 1270: /* avx512vl_blendmv16qi */ |
| 70596 | case 1268: /* avx512vl_blendmv2df */ |
| 70597 | case 1267: /* avx512vl_blendmv4df */ |
| 70598 | case 1265: /* avx512vl_blendmv4sf */ |
| 70599 | case 1264: /* avx512vl_blendmv8sf */ |
| 70600 | case 1262: /* avx512vl_blendmv2di */ |
| 70601 | case 1261: /* avx512vl_blendmv4di */ |
| 70602 | case 1259: /* avx512vl_blendmv4si */ |
| 70603 | case 1258: /* avx512vl_blendmv8si */ |
| 70604 | case 933: /* movmsk_df */ |
| 70605 | if (((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) || (cached_memory == MEMORY_STORE)) |
| 70606 | { |
| 70607 | return 1; |
| 70608 | } |
| 70609 | else if (cached_memory == MEMORY_LOAD) |
| 70610 | { |
| 70611 | return 8; |
| 70612 | } |
| 70613 | else |
| 70614 | { |
| 70615 | return 0; |
| 70616 | } |
| 70617 | |
| 70618 | case 4518: /* avx512f_vcvtps2ph512_mask */ |
| 70619 | case 4517: /* *avx512f_vcvtps2ph512 */ |
| 70620 | case 4516: /* vcvtps2ph256_mask */ |
| 70621 | case 4515: /* vcvtps2ph256 */ |
| 70622 | case 4514: /* *vcvtps2ph_store */ |
| 70623 | case 4513: /* *vcvtps2ph_mask */ |
| 70624 | case 4512: /* *vcvtps2ph */ |
| 70625 | case 4511: /* avx512f_vcvtph2ps512_mask_round */ |
| 70626 | case 4510: /* avx512f_vcvtph2ps512_mask */ |
| 70627 | case 4509: /* *avx512f_vcvtph2ps512_round */ |
| 70628 | case 4508: /* *avx512f_vcvtph2ps512 */ |
| 70629 | case 4507: /* vcvtph2ps256_mask */ |
| 70630 | case 4506: /* vcvtph2ps256 */ |
| 70631 | case 4505: /* *vcvtph2ps_load_mask */ |
| 70632 | case 4504: /* *vcvtph2ps_load */ |
| 70633 | case 4503: /* vcvtph2ps_mask */ |
| 70634 | case 4502: /* vcvtph2ps */ |
| 70635 | case 3896: /* sse4_1_roundsd */ |
| 70636 | case 3895: /* sse4_1_roundss */ |
| 70637 | case 3894: /* sse4_1_roundpd */ |
| 70638 | case 3893: /* avx_roundpd256 */ |
| 70639 | case 3892: /* sse4_1_roundps */ |
| 70640 | case 3891: /* avx_roundps256 */ |
| 70641 | case 3710: /* *avx2_pmulhrswv16hi3_mask */ |
| 70642 | case 3709: /* *avx2_pmulhrswv16hi3 */ |
| 70643 | case 3077: /* *avx2_mulv8si3_mask */ |
| 70644 | case 3076: /* *avx2_mulv8si3 */ |
| 70645 | case 3071: /* avx512dq_mulv4di3_mask */ |
| 70646 | case 3070: /* avx512dq_mulv4di3 */ |
| 70647 | case 3057: /* *vec_widen_smult_even_v8si_mask */ |
| 70648 | case 3056: /* *vec_widen_smult_even_v8si */ |
| 70649 | case 3051: /* *vec_widen_umult_even_v8si_mask */ |
| 70650 | case 3050: /* *vec_widen_umult_even_v8si */ |
| 70651 | case 3043: /* *umulv16hi3_highpart_mask */ |
| 70652 | case 3042: /* *umulv16hi3_highpart */ |
| 70653 | case 3041: /* *smulv16hi3_highpart_mask */ |
| 70654 | case 3040: /* *smulv16hi3_highpart */ |
| 70655 | case 3033: /* *mulv16hi3_mask */ |
| 70656 | case 3032: /* *mulv16hi3 */ |
| 70657 | case 2417: /* sse2_cvtps2pd_mask */ |
| 70658 | case 2416: /* sse2_cvtps2pd */ |
| 70659 | case 2391: /* vec_unpacks_lo_v16sf */ |
| 70660 | case 2390: /* *avx_cvtps2pd256_2 */ |
| 70661 | case 2389: /* avx_cvtps2pd256_mask */ |
| 70662 | case 2388: /* avx_cvtps2pd256 */ |
| 70663 | case 2387: /* avx512f_cvtps2pd512_mask_round */ |
| 70664 | case 2386: /* avx512f_cvtps2pd512_mask */ |
| 70665 | case 2385: /* avx512f_cvtps2pd512_round */ |
| 70666 | case 2384: /* avx512f_cvtps2pd512 */ |
| 70667 | case 2383: /* *sse2_cvtpd2ps_mask */ |
| 70668 | case 2382: /* *sse2_cvtpd2ps */ |
| 70669 | case 2381: /* avx_cvtpd2ps256_mask */ |
| 70670 | case 2380: /* avx_cvtpd2ps256 */ |
| 70671 | case 2379: /* avx512f_cvtpd2ps512_mask_round */ |
| 70672 | case 2378: /* avx512f_cvtpd2ps512_mask */ |
| 70673 | case 2377: /* *avx512f_cvtpd2ps512_round */ |
| 70674 | case 2376: /* *avx512f_cvtpd2ps512 */ |
| 70675 | case 2375: /* *sse2_vd_cvtss2sd */ |
| 70676 | case 2374: /* sse2_cvtss2sd_round */ |
| 70677 | case 2373: /* sse2_cvtss2sd */ |
| 70678 | case 2372: /* *sse2_vd_cvtsd2ss */ |
| 70679 | case 2371: /* sse2_cvtsd2ss_round */ |
| 70680 | case 2370: /* sse2_cvtsd2ss */ |
| 70681 | case 2369: /* sse2_cvttpd2dq_mask */ |
| 70682 | case 2368: /* sse2_cvttpd2dq */ |
| 70683 | case 2367: /* ufix_truncv4sfv4si2_mask */ |
| 70684 | case 2366: /* ufix_truncv4sfv4si2 */ |
| 70685 | case 2365: /* ufix_truncv8sfv8si2_mask */ |
| 70686 | case 2364: /* ufix_truncv8sfv8si2 */ |
| 70687 | case 2363: /* ufix_truncv2sfv2di2_mask */ |
| 70688 | case 2362: /* ufix_truncv2sfv2di2 */ |
| 70689 | case 2361: /* fix_truncv2sfv2di2_mask */ |
| 70690 | case 2360: /* fix_truncv2sfv2di2 */ |
| 70691 | case 2359: /* ufix_truncv4sfv4di2_mask */ |
| 70692 | case 2358: /* ufix_truncv4sfv4di2 */ |
| 70693 | case 2357: /* fix_truncv4sfv4di2_mask */ |
| 70694 | case 2356: /* fix_truncv4sfv4di2 */ |
| 70695 | case 2355: /* ufix_truncv8sfv8di2_mask_round */ |
| 70696 | case 2354: /* ufix_truncv8sfv8di2_mask */ |
| 70697 | case 2353: /* ufix_truncv8sfv8di2_round */ |
| 70698 | case 2352: /* ufix_truncv8sfv8di2 */ |
| 70699 | case 2351: /* fix_truncv8sfv8di2_mask_round */ |
| 70700 | case 2350: /* fix_truncv8sfv8di2_mask */ |
| 70701 | case 2349: /* fix_truncv8sfv8di2_round */ |
| 70702 | case 2348: /* fix_truncv8sfv8di2 */ |
| 70703 | case 2347: /* ufix_notruncv2dfv2di2_mask */ |
| 70704 | case 2346: /* ufix_notruncv2dfv2di2 */ |
| 70705 | case 2345: /* ufix_notruncv4dfv4di2_mask */ |
| 70706 | case 2344: /* ufix_notruncv4dfv4di2 */ |
| 70707 | case 2343: /* ufix_notruncv8dfv8di2_mask_round */ |
| 70708 | case 2342: /* ufix_notruncv8dfv8di2_mask */ |
| 70709 | case 2341: /* ufix_notruncv8dfv8di2_round */ |
| 70710 | case 2340: /* ufix_notruncv8dfv8di2 */ |
| 70711 | case 2339: /* fix_notruncv2dfv2di2_mask */ |
| 70712 | case 2338: /* fix_notruncv2dfv2di2 */ |
| 70713 | case 2337: /* fix_notruncv4dfv4di2_mask */ |
| 70714 | case 2336: /* fix_notruncv4dfv4di2 */ |
| 70715 | case 2335: /* fix_notruncv8dfv8di2_mask_round */ |
| 70716 | case 2334: /* fix_notruncv8dfv8di2_mask */ |
| 70717 | case 2333: /* fix_notruncv8dfv8di2_round */ |
| 70718 | case 2332: /* fix_notruncv8dfv8di2 */ |
| 70719 | case 2331: /* ufix_truncv2dfv2di2_mask */ |
| 70720 | case 2330: /* ufix_truncv2dfv2di2 */ |
| 70721 | case 2329: /* fix_truncv2dfv2di2_mask */ |
| 70722 | case 2328: /* fix_truncv2dfv2di2 */ |
| 70723 | case 2327: /* ufix_truncv4dfv4di2_mask */ |
| 70724 | case 2326: /* ufix_truncv4dfv4di2 */ |
| 70725 | case 2325: /* fix_truncv4dfv4di2_mask */ |
| 70726 | case 2324: /* fix_truncv4dfv4di2 */ |
| 70727 | case 2323: /* ufix_truncv8dfv8di2_mask_round */ |
| 70728 | case 2322: /* ufix_truncv8dfv8di2_mask */ |
| 70729 | case 2321: /* ufix_truncv8dfv8di2_round */ |
| 70730 | case 2320: /* ufix_truncv8dfv8di2 */ |
| 70731 | case 2319: /* fix_truncv8dfv8di2_mask_round */ |
| 70732 | case 2318: /* fix_truncv8dfv8di2_mask */ |
| 70733 | case 2317: /* fix_truncv8dfv8di2_round */ |
| 70734 | case 2316: /* fix_truncv8dfv8di2 */ |
| 70735 | case 2315: /* ufix_truncv4dfv4si2_mask */ |
| 70736 | case 2314: /* ufix_truncv4dfv4si2 */ |
| 70737 | case 2313: /* fix_truncv4dfv4si2_mask */ |
| 70738 | case 2312: /* fix_truncv4dfv4si2 */ |
| 70739 | case 2311: /* ufix_truncv2dfv2si2_mask */ |
| 70740 | case 2310: /* ufix_truncv2dfv2si2 */ |
| 70741 | case 2309: /* ufix_truncv8dfv8si2_mask_round */ |
| 70742 | case 2308: /* ufix_truncv8dfv8si2_mask */ |
| 70743 | case 2307: /* ufix_truncv8dfv8si2_round */ |
| 70744 | case 2306: /* ufix_truncv8dfv8si2 */ |
| 70745 | case 2305: /* fix_truncv8dfv8si2_mask_round */ |
| 70746 | case 2304: /* fix_truncv8dfv8si2_mask */ |
| 70747 | case 2303: /* fix_truncv8dfv8si2_round */ |
| 70748 | case 2302: /* fix_truncv8dfv8si2 */ |
| 70749 | case 2301: /* ufix_notruncv2dfv2si2_mask */ |
| 70750 | case 2300: /* ufix_notruncv2dfv2si2 */ |
| 70751 | case 2299: /* ufix_notruncv4dfv4si2_mask_round */ |
| 70752 | case 2298: /* ufix_notruncv4dfv4si2_mask */ |
| 70753 | case 2297: /* ufix_notruncv4dfv4si2_round */ |
| 70754 | case 2296: /* ufix_notruncv4dfv4si2 */ |
| 70755 | case 2295: /* ufix_notruncv8dfv8si2_mask_round */ |
| 70756 | case 2294: /* ufix_notruncv8dfv8si2_mask */ |
| 70757 | case 2293: /* ufix_notruncv8dfv8si2_round */ |
| 70758 | case 2292: /* ufix_notruncv8dfv8si2 */ |
| 70759 | case 2291: /* sse2_cvtpd2dq_mask */ |
| 70760 | case 2290: /* sse2_cvtpd2dq */ |
| 70761 | case 2289: /* *avx_cvtpd2dq256_2 */ |
| 70762 | case 2288: /* avx_cvtpd2dq256_mask */ |
| 70763 | case 2287: /* avx_cvtpd2dq256 */ |
| 70764 | case 2286: /* avx512f_cvtpd2dq512_mask_round */ |
| 70765 | case 2285: /* avx512f_cvtpd2dq512_mask */ |
| 70766 | case 2284: /* avx512f_cvtpd2dq512_round */ |
| 70767 | case 2283: /* avx512f_cvtpd2dq512 */ |
| 70768 | case 2282: /* sse2_cvtdq2pd_mask */ |
| 70769 | case 2281: /* sse2_cvtdq2pd */ |
| 70770 | case 2280: /* avx_cvtdq2pd256_2 */ |
| 70771 | case 2279: /* avx512f_cvtdq2pd512_2 */ |
| 70772 | case 2278: /* ufloatv2siv2df2_mask */ |
| 70773 | case 2277: /* ufloatv2siv2df2 */ |
| 70774 | case 2276: /* ufloatv4siv4df2_mask */ |
| 70775 | case 2275: /* ufloatv4siv4df2 */ |
| 70776 | case 2274: /* ufloatv8siv8df2_mask */ |
| 70777 | case 2273: /* ufloatv8siv8df2 */ |
| 70778 | case 2272: /* *ufloatv2div2sf2_mask_1 */ |
| 70779 | case 2271: /* *floatv2div2sf2_mask_1 */ |
| 70780 | case 2270: /* ufloatv2div2sf2_mask */ |
| 70781 | case 2269: /* floatv2div2sf2_mask */ |
| 70782 | case 2268: /* *ufloatv2div2sf2 */ |
| 70783 | case 2267: /* *floatv2div2sf2 */ |
| 70784 | case 2266: /* ufloatv4div4sf2_mask */ |
| 70785 | case 2265: /* ufloatv4div4sf2 */ |
| 70786 | case 2264: /* floatv4div4sf2_mask */ |
| 70787 | case 2263: /* floatv4div4sf2 */ |
| 70788 | case 2262: /* ufloatv8div8sf2_mask_round */ |
| 70789 | case 2261: /* ufloatv8div8sf2_mask */ |
| 70790 | case 2260: /* ufloatv8div8sf2_round */ |
| 70791 | case 2259: /* ufloatv8div8sf2 */ |
| 70792 | case 2258: /* floatv8div8sf2_mask_round */ |
| 70793 | case 2257: /* floatv8div8sf2_mask */ |
| 70794 | case 2256: /* floatv8div8sf2_round */ |
| 70795 | case 2255: /* floatv8div8sf2 */ |
| 70796 | case 2254: /* ufloatv2div2df2_mask_round */ |
| 70797 | case 2253: /* ufloatv2div2df2_mask */ |
| 70798 | case 2252: /* ufloatv2div2df2_round */ |
| 70799 | case 2251: /* ufloatv2div2df2 */ |
| 70800 | case 2250: /* floatv2div2df2_mask_round */ |
| 70801 | case 2249: /* floatv2div2df2_mask */ |
| 70802 | case 2248: /* floatv2div2df2_round */ |
| 70803 | case 2247: /* floatv2div2df2 */ |
| 70804 | case 2246: /* ufloatv4div4df2_mask_round */ |
| 70805 | case 2245: /* ufloatv4div4df2_mask */ |
| 70806 | case 2244: /* ufloatv4div4df2_round */ |
| 70807 | case 2243: /* ufloatv4div4df2 */ |
| 70808 | case 2242: /* floatv4div4df2_mask_round */ |
| 70809 | case 2241: /* floatv4div4df2_mask */ |
| 70810 | case 2240: /* floatv4div4df2_round */ |
| 70811 | case 2239: /* floatv4div4df2 */ |
| 70812 | case 2238: /* ufloatv8div8df2_mask_round */ |
| 70813 | case 2237: /* ufloatv8div8df2_mask */ |
| 70814 | case 2236: /* ufloatv8div8df2_round */ |
| 70815 | case 2235: /* ufloatv8div8df2 */ |
| 70816 | case 2234: /* floatv8div8df2_mask_round */ |
| 70817 | case 2233: /* floatv8div8df2_mask */ |
| 70818 | case 2232: /* floatv8div8df2_round */ |
| 70819 | case 2231: /* floatv8div8df2 */ |
| 70820 | case 2230: /* floatv4siv4df2_mask */ |
| 70821 | case 2229: /* floatv4siv4df2 */ |
| 70822 | case 2228: /* floatv8siv8df2_mask */ |
| 70823 | case 2227: /* floatv8siv8df2 */ |
| 70824 | case 2197: /* sse2_cvttpd2pi */ |
| 70825 | case 2196: /* sse2_cvtpd2pi */ |
| 70826 | case 2195: /* sse2_cvtpi2pd */ |
| 70827 | case 2194: /* fix_truncv4sfv4si2_mask */ |
| 70828 | case 2193: /* fix_truncv4sfv4si2 */ |
| 70829 | case 2192: /* fix_truncv8sfv8si2_mask */ |
| 70830 | case 2191: /* fix_truncv8sfv8si2 */ |
| 70831 | case 2190: /* ufix_truncv16sfv16si2_mask_round */ |
| 70832 | case 2189: /* ufix_truncv16sfv16si2_mask */ |
| 70833 | case 2188: /* ufix_truncv16sfv16si2_round */ |
| 70834 | case 2187: /* ufix_truncv16sfv16si2 */ |
| 70835 | case 2186: /* fix_truncv16sfv16si2_mask_round */ |
| 70836 | case 2185: /* fix_truncv16sfv16si2_mask */ |
| 70837 | case 2184: /* fix_truncv16sfv16si2_round */ |
| 70838 | case 2183: /* fix_truncv16sfv16si2 */ |
| 70839 | case 2182: /* avx512dq_cvtps2uqqv2di_mask */ |
| 70840 | case 2181: /* *avx512dq_cvtps2uqqv2di */ |
| 70841 | case 2180: /* avx512dq_cvtps2uqqv4di_mask */ |
| 70842 | case 2179: /* *avx512dq_cvtps2uqqv4di */ |
| 70843 | case 2178: /* avx512dq_cvtps2uqqv8di_mask_round */ |
| 70844 | case 2177: /* avx512dq_cvtps2uqqv8di_mask */ |
| 70845 | case 2176: /* *avx512dq_cvtps2uqqv8di_round */ |
| 70846 | case 2175: /* *avx512dq_cvtps2uqqv8di */ |
| 70847 | case 2174: /* avx512dq_cvtps2qqv2di_mask */ |
| 70848 | case 2173: /* *avx512dq_cvtps2qqv2di */ |
| 70849 | case 2172: /* avx512dq_cvtps2qqv4di_mask */ |
| 70850 | case 2171: /* *avx512dq_cvtps2qqv4di */ |
| 70851 | case 2170: /* avx512dq_cvtps2qqv8di_mask_round */ |
| 70852 | case 2169: /* avx512dq_cvtps2qqv8di_mask */ |
| 70853 | case 2168: /* *avx512dq_cvtps2qqv8di_round */ |
| 70854 | case 2167: /* *avx512dq_cvtps2qqv8di */ |
| 70855 | case 2166: /* avx512vl_ufix_notruncv4sfv4si_mask_round */ |
| 70856 | case 2165: /* avx512vl_ufix_notruncv4sfv4si_mask */ |
| 70857 | case 2164: /* *avx512vl_ufix_notruncv4sfv4si_round */ |
| 70858 | case 2163: /* *avx512vl_ufix_notruncv4sfv4si */ |
| 70859 | case 2162: /* avx512vl_ufix_notruncv8sfv8si_mask_round */ |
| 70860 | case 2161: /* avx512vl_ufix_notruncv8sfv8si_mask */ |
| 70861 | case 2160: /* *avx512vl_ufix_notruncv8sfv8si_round */ |
| 70862 | case 2159: /* *avx512vl_ufix_notruncv8sfv8si */ |
| 70863 | case 2158: /* avx512f_ufix_notruncv16sfv16si_mask_round */ |
| 70864 | case 2157: /* avx512f_ufix_notruncv16sfv16si_mask */ |
| 70865 | case 2156: /* *avx512f_ufix_notruncv16sfv16si_round */ |
| 70866 | case 2155: /* *avx512f_ufix_notruncv16sfv16si */ |
| 70867 | case 2154: /* avx512f_fix_notruncv16sfv16si_mask_round */ |
| 70868 | case 2153: /* avx512f_fix_notruncv16sfv16si_mask */ |
| 70869 | case 2152: /* avx512f_fix_notruncv16sfv16si_round */ |
| 70870 | case 2151: /* avx512f_fix_notruncv16sfv16si */ |
| 70871 | case 2150: /* sse2_fix_notruncv4sfv4si_mask */ |
| 70872 | case 2149: /* sse2_fix_notruncv4sfv4si */ |
| 70873 | case 2148: /* avx_fix_notruncv8sfv8si_mask */ |
| 70874 | case 2147: /* avx_fix_notruncv8sfv8si */ |
| 70875 | case 2146: /* ufloatv4siv4sf2_mask_round */ |
| 70876 | case 2145: /* ufloatv4siv4sf2_mask */ |
| 70877 | case 2144: /* ufloatv4siv4sf2_round */ |
| 70878 | case 2143: /* ufloatv4siv4sf2 */ |
| 70879 | case 2142: /* ufloatv8siv8sf2_mask_round */ |
| 70880 | case 2141: /* ufloatv8siv8sf2_mask */ |
| 70881 | case 2140: /* ufloatv8siv8sf2_round */ |
| 70882 | case 2139: /* ufloatv8siv8sf2 */ |
| 70883 | case 2138: /* ufloatv16siv16sf2_mask_round */ |
| 70884 | case 2137: /* ufloatv16siv16sf2_mask */ |
| 70885 | case 2136: /* ufloatv16siv16sf2_round */ |
| 70886 | case 2135: /* ufloatv16siv16sf2 */ |
| 70887 | case 2134: /* floatv4siv4sf2_mask */ |
| 70888 | case 2133: /* floatv4siv4sf2 */ |
| 70889 | case 2132: /* floatv8siv8sf2_mask */ |
| 70890 | case 2131: /* floatv8siv8sf2 */ |
| 70891 | case 2130: /* floatv16siv16sf2_mask_round */ |
| 70892 | case 2129: /* floatv16siv16sf2_mask */ |
| 70893 | case 2128: /* floatv16siv16sf2_round */ |
| 70894 | case 2127: /* floatv16siv16sf2 */ |
| 70895 | case 2105: /* sse_cvttps2pi */ |
| 70896 | case 2104: /* sse_cvtps2pi */ |
| 70897 | case 2103: /* sse_cvtpi2ps */ |
| 70898 | case 1446: /* sse2_vmmulv2df3_round */ |
| 70899 | case 1445: /* sse2_vmmulv2df3 */ |
| 70900 | case 1440: /* *mulv2df3_mask_round */ |
| 70901 | case 1439: /* *mulv2df3_mask */ |
| 70902 | case 1438: /* *mulv2df3_round */ |
| 70903 | case 1437: /* *mulv2df3 */ |
| 70904 | case 1307: /* sse2_movntv2di */ |
| 70905 | case 1306: /* avx_movntv4di */ |
| 70906 | case 1305: /* avx512f_movntv8di */ |
| 70907 | case 877: /* sse4_1_rounddf2 */ |
| 70908 | case 876: /* sse4_1_roundsf2 */ |
| 70909 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) |
| 70910 | { |
| 70911 | return 4; |
| 70912 | } |
| 70913 | else if (cached_memory == MEMORY_LOAD) |
| 70914 | { |
| 70915 | return 11 /* 0xb */; |
| 70916 | } |
| 70917 | else |
| 70918 | { |
| 70919 | return 0; |
| 70920 | } |
| 70921 | |
| 70922 | case 805: /* *add_tp_di */ |
| 70923 | case 804: /* *add_tp_si */ |
| 70924 | case 803: /* *add_tp_x32_zext */ |
| 70925 | case 802: /* *add_tp_x32 */ |
| 70926 | return 5; |
| 70927 | |
| 70928 | case 719: /* *bsrhi */ |
| 70929 | case 718: /* bsr */ |
| 70930 | case 717: /* bsr_rex64 */ |
| 70931 | case 712: /* *bsfdi_1 */ |
| 70932 | case 711: /* *bsfsi_1 */ |
| 70933 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) |
| 70934 | { |
| 70935 | return 3; |
| 70936 | } |
| 70937 | else |
| 70938 | { |
| 70939 | return 0; |
| 70940 | } |
| 70941 | |
| 70942 | case 659: /* jump */ |
| 70943 | case 628: /* *jcc_2 */ |
| 70944 | case 627: /* *jcc_1 */ |
| 70945 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) |
| 70946 | { |
| 70947 | return 1; |
| 70948 | } |
| 70949 | else if (cached_memory == MEMORY_LOAD) |
| 70950 | { |
| 70951 | return 6; |
| 70952 | } |
| 70953 | else |
| 70954 | { |
| 70955 | return 0; |
| 70956 | } |
| 70957 | |
| 70958 | case 4897: /* vpmultishiftqbv16qi_mask */ |
| 70959 | case 4896: /* vpmultishiftqbv16qi */ |
| 70960 | case 4895: /* vpmultishiftqbv64qi_mask */ |
| 70961 | case 4894: /* vpmultishiftqbv64qi */ |
| 70962 | case 4384: /* avx512bw_vpermt2varv32hi3_mask */ |
| 70963 | case 4382: /* avx512vl_vpermt2varv8hi3_mask */ |
| 70964 | case 4380: /* avx512vl_vpermt2varv16qi3_mask */ |
| 70965 | case 4379: /* avx512bw_vpermt2varv64qi3_mask */ |
| 70966 | case 4378: /* avx512vl_vpermt2varv2df3_mask */ |
| 70967 | case 4377: /* avx512vl_vpermt2varv2di3_mask */ |
| 70968 | case 4376: /* avx512vl_vpermt2varv4sf3_mask */ |
| 70969 | case 4375: /* avx512vl_vpermt2varv4si3_mask */ |
| 70970 | case 4370: /* avx512f_vpermt2varv8df3_mask */ |
| 70971 | case 4369: /* avx512f_vpermt2varv8di3_mask */ |
| 70972 | case 4368: /* avx512f_vpermt2varv16sf3_mask */ |
| 70973 | case 4367: /* avx512f_vpermt2varv16si3_mask */ |
| 70974 | case 4366: /* avx512bw_vpermt2varv32hi3_maskz_1 */ |
| 70975 | case 4365: /* avx512bw_vpermt2varv32hi3 */ |
| 70976 | case 4362: /* avx512vl_vpermt2varv8hi3_maskz_1 */ |
| 70977 | case 4361: /* avx512vl_vpermt2varv8hi3 */ |
| 70978 | case 4358: /* avx512vl_vpermt2varv16qi3_maskz_1 */ |
| 70979 | case 4357: /* avx512vl_vpermt2varv16qi3 */ |
| 70980 | case 4356: /* avx512bw_vpermt2varv64qi3_maskz_1 */ |
| 70981 | case 4355: /* avx512bw_vpermt2varv64qi3 */ |
| 70982 | case 4354: /* avx512vl_vpermt2varv2df3_maskz_1 */ |
| 70983 | case 4353: /* avx512vl_vpermt2varv2df3 */ |
| 70984 | case 4352: /* avx512vl_vpermt2varv2di3_maskz_1 */ |
| 70985 | case 4351: /* avx512vl_vpermt2varv2di3 */ |
| 70986 | case 4350: /* avx512vl_vpermt2varv4sf3_maskz_1 */ |
| 70987 | case 4349: /* avx512vl_vpermt2varv4sf3 */ |
| 70988 | case 4348: /* avx512vl_vpermt2varv4si3_maskz_1 */ |
| 70989 | case 4347: /* avx512vl_vpermt2varv4si3 */ |
| 70990 | case 4338: /* avx512f_vpermt2varv8df3_maskz_1 */ |
| 70991 | case 4337: /* avx512f_vpermt2varv8df3 */ |
| 70992 | case 4336: /* avx512f_vpermt2varv8di3_maskz_1 */ |
| 70993 | case 4335: /* avx512f_vpermt2varv8di3 */ |
| 70994 | case 4334: /* avx512f_vpermt2varv16sf3_maskz_1 */ |
| 70995 | case 4333: /* avx512f_vpermt2varv16sf3 */ |
| 70996 | case 4332: /* avx512f_vpermt2varv16si3_maskz_1 */ |
| 70997 | case 4331: /* avx512f_vpermt2varv16si3 */ |
| 70998 | case 4330: /* avx512bw_vpermi2varv32hi3_mask */ |
| 70999 | case 4328: /* avx512vl_vpermi2varv8hi3_mask */ |
| 71000 | case 4326: /* avx512vl_vpermi2varv16qi3_mask */ |
| 71001 | case 4325: /* avx512bw_vpermi2varv64qi3_mask */ |
| 71002 | case 4324: /* avx512vl_vpermi2varv2df3_mask */ |
| 71003 | case 4323: /* avx512vl_vpermi2varv2di3_mask */ |
| 71004 | case 4322: /* avx512vl_vpermi2varv4sf3_mask */ |
| 71005 | case 4321: /* avx512vl_vpermi2varv4si3_mask */ |
| 71006 | case 4316: /* avx512f_vpermi2varv8df3_mask */ |
| 71007 | case 4315: /* avx512f_vpermi2varv8di3_mask */ |
| 71008 | case 4314: /* avx512f_vpermi2varv16sf3_mask */ |
| 71009 | case 4313: /* avx512f_vpermi2varv16si3_mask */ |
| 71010 | case 4312: /* avx512bw_vpermi2varv32hi3_maskz_1 */ |
| 71011 | case 4311: /* avx512bw_vpermi2varv32hi3 */ |
| 71012 | case 4308: /* avx512vl_vpermi2varv8hi3_maskz_1 */ |
| 71013 | case 4307: /* avx512vl_vpermi2varv8hi3 */ |
| 71014 | case 4304: /* avx512vl_vpermi2varv16qi3_maskz_1 */ |
| 71015 | case 4303: /* avx512vl_vpermi2varv16qi3 */ |
| 71016 | case 4302: /* avx512bw_vpermi2varv64qi3_maskz_1 */ |
| 71017 | case 4301: /* avx512bw_vpermi2varv64qi3 */ |
| 71018 | case 4300: /* avx512vl_vpermi2varv2df3_maskz_1 */ |
| 71019 | case 4299: /* avx512vl_vpermi2varv2df3 */ |
| 71020 | case 4298: /* avx512vl_vpermi2varv2di3_maskz_1 */ |
| 71021 | case 4297: /* avx512vl_vpermi2varv2di3 */ |
| 71022 | case 4296: /* avx512vl_vpermi2varv4sf3_maskz_1 */ |
| 71023 | case 4295: /* avx512vl_vpermi2varv4sf3 */ |
| 71024 | case 4294: /* avx512vl_vpermi2varv4si3_maskz_1 */ |
| 71025 | case 4293: /* avx512vl_vpermi2varv4si3 */ |
| 71026 | case 4284: /* avx512f_vpermi2varv8df3_maskz_1 */ |
| 71027 | case 4283: /* avx512f_vpermi2varv8df3 */ |
| 71028 | case 4282: /* avx512f_vpermi2varv8di3_maskz_1 */ |
| 71029 | case 4281: /* avx512f_vpermi2varv8di3 */ |
| 71030 | case 4280: /* avx512f_vpermi2varv16sf3_maskz_1 */ |
| 71031 | case 4279: /* avx512f_vpermi2varv16sf3 */ |
| 71032 | case 4278: /* avx512f_vpermi2varv16si3_maskz_1 */ |
| 71033 | case 4277: /* avx512f_vpermi2varv16si3 */ |
| 71034 | case 4276: /* avx_vpermilvarv2df3_mask */ |
| 71035 | case 4275: /* avx_vpermilvarv2df3 */ |
| 71036 | case 4272: /* avx512f_vpermilvarv8df3_mask */ |
| 71037 | case 4271: /* avx512f_vpermilvarv8df3 */ |
| 71038 | case 4270: /* avx_vpermilvarv4sf3_mask */ |
| 71039 | case 4269: /* avx_vpermilvarv4sf3 */ |
| 71040 | case 4266: /* avx512f_vpermilvarv16sf3_mask */ |
| 71041 | case 4265: /* avx512f_vpermilvarv16sf3 */ |
| 71042 | case 4264: /* *avx_vpermilpv2df_mask */ |
| 71043 | case 4263: /* *avx_vpermilpv2df */ |
| 71044 | case 4260: /* *avx512f_vpermilpv8df_mask */ |
| 71045 | case 4259: /* *avx512f_vpermilpv8df */ |
| 71046 | case 4258: /* *avx_vpermilpv4sf_mask */ |
| 71047 | case 4257: /* *avx_vpermilpv4sf */ |
| 71048 | case 4254: /* *avx512f_vpermilpv16sf_mask */ |
| 71049 | case 4253: /* *avx512f_vpermilpv16sf */ |
| 71050 | case 4108: /* avx512f_permv8di_1_mask */ |
| 71051 | case 4107: /* avx512f_permv8di_1 */ |
| 71052 | case 4106: /* avx512f_permv8df_1_mask */ |
| 71053 | case 4105: /* avx512f_permv8df_1 */ |
| 71054 | case 4100: /* avx512bw_permvarv32hi_mask */ |
| 71055 | case 4099: /* avx512bw_permvarv32hi */ |
| 71056 | case 4096: /* avx512vl_permvarv8hi_mask */ |
| 71057 | case 4095: /* avx512vl_permvarv8hi */ |
| 71058 | case 4092: /* avx512vl_permvarv16qi_mask */ |
| 71059 | case 4091: /* avx512vl_permvarv16qi */ |
| 71060 | case 4090: /* avx512bw_permvarv64qi_mask */ |
| 71061 | case 4089: /* avx512bw_permvarv64qi */ |
| 71062 | case 4084: /* avx512f_permvarv8df_mask */ |
| 71063 | case 4083: /* avx512f_permvarv8df */ |
| 71064 | case 4082: /* avx512f_permvarv8di_mask */ |
| 71065 | case 4081: /* avx512f_permvarv8di */ |
| 71066 | case 4080: /* avx512f_permvarv16sf_mask */ |
| 71067 | case 4079: /* avx512f_permvarv16sf */ |
| 71068 | case 4078: /* avx512f_permvarv16si_mask */ |
| 71069 | case 4077: /* avx512f_permvarv16si */ |
| 71070 | case 4043: /* xop_pcom_tfv2di3 */ |
| 71071 | case 4042: /* xop_pcom_tfv4si3 */ |
| 71072 | case 4041: /* xop_pcom_tfv8hi3 */ |
| 71073 | case 4040: /* xop_pcom_tfv16qi3 */ |
| 71074 | case 4039: /* xop_maskcmp_uns2v2di3 */ |
| 71075 | case 4038: /* xop_maskcmp_uns2v4si3 */ |
| 71076 | case 4037: /* xop_maskcmp_uns2v8hi3 */ |
| 71077 | case 4036: /* xop_maskcmp_uns2v16qi3 */ |
| 71078 | case 4035: /* xop_maskcmp_unsv2di3 */ |
| 71079 | case 4034: /* xop_maskcmp_unsv4si3 */ |
| 71080 | case 4033: /* xop_maskcmp_unsv8hi3 */ |
| 71081 | case 4032: /* xop_maskcmp_unsv16qi3 */ |
| 71082 | case 3890: /* ptesttf2 */ |
| 71083 | case 3883: /* sse4_1_ptestv2df */ |
| 71084 | case 3882: /* sse4_1_ptestv4sf */ |
| 71085 | case 3881: /* sse4_1_ptestv2di */ |
| 71086 | case 3880: /* sse4_1_ptestv4si */ |
| 71087 | case 3879: /* sse4_1_ptestv8hi */ |
| 71088 | case 3878: /* sse4_1_ptestv16qi */ |
| 71089 | case 3877: /* avx_vtestpd */ |
| 71090 | case 3875: /* avx_vtestps */ |
| 71091 | case 3794: /* sse4_1_packusdw_mask */ |
| 71092 | case 3793: /* sse4_1_packusdw */ |
| 71093 | case 3790: /* avx512bw_packusdw_mask */ |
| 71094 | case 3789: /* avx512bw_packusdw */ |
| 71095 | case 3706: /* ssse3_pmaddubsw */ |
| 71096 | case 3705: /* ssse3_pmaddubsw128 */ |
| 71097 | case 3696: /* avx2_pmaddubsw256 */ |
| 71098 | case 3695: /* ssse3_phsubdv2si3 */ |
| 71099 | case 3694: /* ssse3_phadddv2si3 */ |
| 71100 | case 3693: /* ssse3_phsubdv4si3 */ |
| 71101 | case 3692: /* ssse3_phadddv4si3 */ |
| 71102 | case 3691: /* avx2_phsubdv8si3 */ |
| 71103 | case 3690: /* avx2_phadddv8si3 */ |
| 71104 | case 3689: /* ssse3_phsubswv4hi3 */ |
| 71105 | case 3688: /* ssse3_phsubwv4hi3 */ |
| 71106 | case 3687: /* ssse3_phaddswv4hi3 */ |
| 71107 | case 3686: /* ssse3_phaddwv4hi3 */ |
| 71108 | case 3685: /* ssse3_phsubswv8hi3 */ |
| 71109 | case 3684: /* ssse3_phsubwv8hi3 */ |
| 71110 | case 3683: /* ssse3_phaddswv8hi3 */ |
| 71111 | case 3682: /* ssse3_phaddwv8hi3 */ |
| 71112 | case 3681: /* avx2_phsubswv16hi3 */ |
| 71113 | case 3680: /* avx2_phsubwv16hi3 */ |
| 71114 | case 3679: /* avx2_phaddswv16hi3 */ |
| 71115 | case 3678: /* avx2_phaddwv16hi3 */ |
| 71116 | case 3657: /* sse2_psadbw */ |
| 71117 | case 3656: /* avx2_psadbw */ |
| 71118 | case 3654: /* *sse2_uavgv8hi3_mask */ |
| 71119 | case 3653: /* *sse2_uavgv8hi3 */ |
| 71120 | case 3652: /* *avx2_uavgv16hi3_mask */ |
| 71121 | case 3651: /* *avx2_uavgv16hi3 */ |
| 71122 | case 3648: /* *sse2_uavgv16qi3_mask */ |
| 71123 | case 3647: /* *sse2_uavgv16qi3 */ |
| 71124 | case 3646: /* *avx2_uavgv32qi3_mask */ |
| 71125 | case 3645: /* *avx2_uavgv32qi3 */ |
| 71126 | case 3619: /* sse2_pshufhw_1_mask */ |
| 71127 | case 3618: /* sse2_pshufhw_1 */ |
| 71128 | case 3615: /* avx512bw_pshufhwv32hi_mask */ |
| 71129 | case 3614: /* *avx512bw_pshufhwv32hi */ |
| 71130 | case 3613: /* sse2_pshuflw_1_mask */ |
| 71131 | case 3612: /* sse2_pshuflw_1 */ |
| 71132 | case 3609: /* avx512bw_pshuflwv32hi_mask */ |
| 71133 | case 3608: /* *avx512bw_pshuflwv32hi */ |
| 71134 | case 3601: /* avx512f_shuf_i32x4_1_mask */ |
| 71135 | case 3600: /* avx512f_shuf_i32x4_1 */ |
| 71136 | case 3599: /* avx512f_shuf_f32x4_1_mask */ |
| 71137 | case 3598: /* avx512f_shuf_f32x4_1 */ |
| 71138 | case 3593: /* avx512f_shuf_i64x2_1_mask */ |
| 71139 | case 3592: /* avx512f_shuf_i64x2_1 */ |
| 71140 | case 3591: /* avx512f_shuf_f64x2_1_mask */ |
| 71141 | case 3590: /* avx512f_shuf_f64x2_1 */ |
| 71142 | case 3589: /* avx512dq_shuf_f64x2_1_mask */ |
| 71143 | case 3588: /* *avx512dq_shuf_f64x2_1 */ |
| 71144 | case 3587: /* avx512dq_shuf_i64x2_1_mask */ |
| 71145 | case 3586: /* *avx512dq_shuf_i64x2_1 */ |
| 71146 | case 3585: /* vec_set_hi_v8di_mask */ |
| 71147 | case 3584: /* vec_set_hi_v8di */ |
| 71148 | case 3583: /* vec_set_hi_v8df_mask */ |
| 71149 | case 3582: /* vec_set_hi_v8df */ |
| 71150 | case 3581: /* vec_set_lo_v8di_mask */ |
| 71151 | case 3580: /* vec_set_lo_v8di */ |
| 71152 | case 3579: /* vec_set_lo_v8df_mask */ |
| 71153 | case 3578: /* vec_set_lo_v8df */ |
| 71154 | case 3577: /* vec_set_hi_v16si_mask */ |
| 71155 | case 3576: /* vec_set_hi_v16si */ |
| 71156 | case 3575: /* vec_set_hi_v16sf_mask */ |
| 71157 | case 3574: /* vec_set_hi_v16sf */ |
| 71158 | case 3573: /* vec_set_lo_v16si_mask */ |
| 71159 | case 3572: /* vec_set_lo_v16si */ |
| 71160 | case 3571: /* vec_set_lo_v16sf_mask */ |
| 71161 | case 3570: /* vec_set_lo_v16sf */ |
| 71162 | case 3569: /* avx512f_vinserti32x4_1_mask */ |
| 71163 | case 3568: /* *avx512f_vinserti32x4_1 */ |
| 71164 | case 3567: /* avx512f_vinsertf32x4_1_mask */ |
| 71165 | case 3566: /* *avx512f_vinsertf32x4_1 */ |
| 71166 | case 3565: /* avx512dq_vinserti64x2_1_mask */ |
| 71167 | case 3564: /* *avx512dq_vinserti64x2_1 */ |
| 71168 | case 3563: /* avx512dq_vinsertf64x2_1_mask */ |
| 71169 | case 3562: /* *avx512dq_vinsertf64x2_1 */ |
| 71170 | case 3561: /* sse4_1_pinsrq */ |
| 71171 | case 3560: /* sse4_1_pinsrd */ |
| 71172 | case 3559: /* sse2_pinsrw */ |
| 71173 | case 3558: /* sse4_1_pinsrb */ |
| 71174 | case 3557: /* vec_interleave_lowv4si_mask */ |
| 71175 | case 3556: /* vec_interleave_lowv4si */ |
| 71176 | case 3555: /* avx512f_interleave_lowv16si_mask */ |
| 71177 | case 3554: /* *avx512f_interleave_lowv16si */ |
| 71178 | case 3551: /* vec_interleave_highv4si_mask */ |
| 71179 | case 3550: /* vec_interleave_highv4si */ |
| 71180 | case 3549: /* avx512f_interleave_highv16si_mask */ |
| 71181 | case 3548: /* *avx512f_interleave_highv16si */ |
| 71182 | case 3545: /* vec_interleave_lowv8hi_mask */ |
| 71183 | case 3544: /* vec_interleave_lowv8hi */ |
| 71184 | case 3541: /* avx512bw_interleave_lowv32hi_mask */ |
| 71185 | case 3540: /* *avx512bw_interleave_lowv32hi */ |
| 71186 | case 3539: /* vec_interleave_highv8hi_mask */ |
| 71187 | case 3538: /* vec_interleave_highv8hi */ |
| 71188 | case 3535: /* avx512bw_interleave_highv32hi_mask */ |
| 71189 | case 3534: /* avx512bw_interleave_highv32hi */ |
| 71190 | case 3533: /* vec_interleave_lowv16qi_mask */ |
| 71191 | case 3532: /* vec_interleave_lowv16qi */ |
| 71192 | case 3529: /* avx512bw_interleave_lowv64qi_mask */ |
| 71193 | case 3528: /* avx512bw_interleave_lowv64qi */ |
| 71194 | case 3527: /* vec_interleave_highv16qi_mask */ |
| 71195 | case 3526: /* vec_interleave_highv16qi */ |
| 71196 | case 3523: /* avx512bw_interleave_highv64qi_mask */ |
| 71197 | case 3522: /* avx512bw_interleave_highv64qi */ |
| 71198 | case 3521: /* sse2_packuswb_mask */ |
| 71199 | case 3520: /* sse2_packuswb */ |
| 71200 | case 3517: /* avx512bw_packuswb_mask */ |
| 71201 | case 3516: /* avx512bw_packuswb */ |
| 71202 | case 3515: /* sse2_packssdw_mask */ |
| 71203 | case 3514: /* sse2_packssdw */ |
| 71204 | case 3511: /* avx512bw_packssdw_mask */ |
| 71205 | case 3510: /* avx512bw_packssdw */ |
| 71206 | case 3509: /* sse2_packsswb_mask */ |
| 71207 | case 3508: /* sse2_packsswb */ |
| 71208 | case 3505: /* avx512bw_packsswb_mask */ |
| 71209 | case 3504: /* avx512bw_packsswb */ |
| 71210 | case 3401: /* *andnotv2di3_mask */ |
| 71211 | case 3399: /* *andnotv8di3_mask */ |
| 71212 | case 3398: /* *andnotv4si3_mask */ |
| 71213 | case 3396: /* *andnotv16si3_mask */ |
| 71214 | case 3383: /* sse2_gtv4si3 */ |
| 71215 | case 3382: /* sse2_gtv8hi3 */ |
| 71216 | case 3381: /* sse2_gtv16qi3 */ |
| 71217 | case 3380: /* avx512vl_gtv8hi3_mask */ |
| 71218 | case 3379: /* avx512vl_gtv8hi3 */ |
| 71219 | case 3378: /* avx512vl_gtv16hi3_mask */ |
| 71220 | case 3377: /* avx512vl_gtv16hi3 */ |
| 71221 | case 3374: /* avx512vl_gtv32qi3_mask */ |
| 71222 | case 3373: /* avx512vl_gtv32qi3 */ |
| 71223 | case 3372: /* avx512vl_gtv16qi3_mask */ |
| 71224 | case 3371: /* avx512vl_gtv16qi3 */ |
| 71225 | case 3368: /* avx512vl_gtv2di3_mask */ |
| 71226 | case 3367: /* avx512vl_gtv2di3 */ |
| 71227 | case 3366: /* avx512vl_gtv4di3_mask */ |
| 71228 | case 3365: /* avx512vl_gtv4di3 */ |
| 71229 | case 3362: /* avx512vl_gtv4si3_mask */ |
| 71230 | case 3361: /* avx512vl_gtv4si3 */ |
| 71231 | case 3360: /* avx512vl_gtv8si3_mask */ |
| 71232 | case 3359: /* avx512vl_gtv8si3 */ |
| 71233 | case 3356: /* avx2_gtv4di3 */ |
| 71234 | case 3355: /* avx2_gtv8si3 */ |
| 71235 | case 3354: /* avx2_gtv16hi3 */ |
| 71236 | case 3353: /* avx2_gtv32qi3 */ |
| 71237 | case 3352: /* sse4_2_gtv2di3 */ |
| 71238 | case 3351: /* *sse2_eqv4si3 */ |
| 71239 | case 3350: /* *sse2_eqv8hi3 */ |
| 71240 | case 3349: /* *sse2_eqv16qi3 */ |
| 71241 | case 3348: /* *sse4_1_eqv2di3 */ |
| 71242 | case 3347: /* avx512vl_eqv2di3_mask_1 */ |
| 71243 | case 3346: /* avx512vl_eqv2di3_1 */ |
| 71244 | case 3345: /* avx512vl_eqv4di3_mask_1 */ |
| 71245 | case 3344: /* avx512vl_eqv4di3_1 */ |
| 71246 | case 3341: /* avx512vl_eqv4si3_mask_1 */ |
| 71247 | case 3340: /* avx512vl_eqv4si3_1 */ |
| 71248 | case 3339: /* avx512vl_eqv8si3_mask_1 */ |
| 71249 | case 3338: /* avx512vl_eqv8si3_1 */ |
| 71250 | case 3335: /* avx512vl_eqv8hi3_mask_1 */ |
| 71251 | case 3334: /* avx512vl_eqv8hi3_1 */ |
| 71252 | case 3333: /* avx512vl_eqv16hi3_mask_1 */ |
| 71253 | case 3332: /* avx512vl_eqv16hi3_1 */ |
| 71254 | case 3329: /* avx512vl_eqv32qi3_mask_1 */ |
| 71255 | case 3328: /* avx512vl_eqv32qi3_1 */ |
| 71256 | case 3327: /* avx512vl_eqv16qi3_mask_1 */ |
| 71257 | case 3326: /* avx512vl_eqv16qi3_1 */ |
| 71258 | case 3323: /* *avx2_eqv4di3 */ |
| 71259 | case 3322: /* *avx2_eqv8si3 */ |
| 71260 | case 3321: /* *avx2_eqv16hi3 */ |
| 71261 | case 3320: /* *avx2_eqv32qi3 */ |
| 71262 | case 3319: /* *uminv16qi3 */ |
| 71263 | case 3318: /* *umaxv16qi3 */ |
| 71264 | case 3317: /* *sse4_1_uminv4si3_mask */ |
| 71265 | case 3316: /* *sse4_1_uminv4si3 */ |
| 71266 | case 3315: /* *sse4_1_umaxv4si3_mask */ |
| 71267 | case 3314: /* *sse4_1_umaxv4si3 */ |
| 71268 | case 3313: /* *sse4_1_uminv8hi3_mask */ |
| 71269 | case 3312: /* *sse4_1_uminv8hi3 */ |
| 71270 | case 3311: /* *sse4_1_umaxv8hi3_mask */ |
| 71271 | case 3310: /* *sse4_1_umaxv8hi3 */ |
| 71272 | case 3309: /* *sminv8hi3 */ |
| 71273 | case 3308: /* *smaxv8hi3 */ |
| 71274 | case 3307: /* *sse4_1_sminv4si3_mask */ |
| 71275 | case 3306: /* *sse4_1_sminv4si3 */ |
| 71276 | case 3305: /* *sse4_1_smaxv4si3_mask */ |
| 71277 | case 3304: /* *sse4_1_smaxv4si3 */ |
| 71278 | case 3303: /* *sse4_1_sminv16qi3_mask */ |
| 71279 | case 3302: /* *sse4_1_sminv16qi3 */ |
| 71280 | case 3301: /* *sse4_1_smaxv16qi3_mask */ |
| 71281 | case 3300: /* *sse4_1_smaxv16qi3 */ |
| 71282 | case 3299: /* uminv8hi3_mask */ |
| 71283 | case 3298: /* *uminv8hi3 */ |
| 71284 | case 3297: /* umaxv8hi3_mask */ |
| 71285 | case 3296: /* *umaxv8hi3 */ |
| 71286 | case 3295: /* sminv8hi3_mask */ |
| 71287 | case 3294: /* *sminv8hi3 */ |
| 71288 | case 3293: /* smaxv8hi3_mask */ |
| 71289 | case 3292: /* *smaxv8hi3 */ |
| 71290 | case 3291: /* uminv16hi3_mask */ |
| 71291 | case 3290: /* *uminv16hi3 */ |
| 71292 | case 3289: /* umaxv16hi3_mask */ |
| 71293 | case 3288: /* *umaxv16hi3 */ |
| 71294 | case 3287: /* sminv16hi3_mask */ |
| 71295 | case 3286: /* *sminv16hi3 */ |
| 71296 | case 3285: /* smaxv16hi3_mask */ |
| 71297 | case 3284: /* *smaxv16hi3 */ |
| 71298 | case 3275: /* uminv32qi3_mask */ |
| 71299 | case 3274: /* *uminv32qi3 */ |
| 71300 | case 3273: /* umaxv32qi3_mask */ |
| 71301 | case 3272: /* *umaxv32qi3 */ |
| 71302 | case 3271: /* sminv32qi3_mask */ |
| 71303 | case 3270: /* *sminv32qi3 */ |
| 71304 | case 3269: /* smaxv32qi3_mask */ |
| 71305 | case 3268: /* *smaxv32qi3 */ |
| 71306 | case 3267: /* uminv16qi3_mask */ |
| 71307 | case 3266: /* *uminv16qi3 */ |
| 71308 | case 3265: /* umaxv16qi3_mask */ |
| 71309 | case 3264: /* *umaxv16qi3 */ |
| 71310 | case 3263: /* sminv16qi3_mask */ |
| 71311 | case 3262: /* *sminv16qi3 */ |
| 71312 | case 3261: /* smaxv16qi3_mask */ |
| 71313 | case 3260: /* *smaxv16qi3 */ |
| 71314 | case 3251: /* *avx512f_uminv2di3_mask */ |
| 71315 | case 3250: /* *avx512f_uminv2di3 */ |
| 71316 | case 3249: /* *avx512f_umaxv2di3_mask */ |
| 71317 | case 3248: /* *avx512f_umaxv2di3 */ |
| 71318 | case 3247: /* *avx512f_sminv2di3_mask */ |
| 71319 | case 3246: /* *avx512f_sminv2di3 */ |
| 71320 | case 3245: /* *avx512f_smaxv2di3_mask */ |
| 71321 | case 3244: /* *avx512f_smaxv2di3 */ |
| 71322 | case 3243: /* *avx512f_uminv4di3_mask */ |
| 71323 | case 3242: /* *avx512f_uminv4di3 */ |
| 71324 | case 3241: /* *avx512f_umaxv4di3_mask */ |
| 71325 | case 3240: /* *avx512f_umaxv4di3 */ |
| 71326 | case 3239: /* *avx512f_sminv4di3_mask */ |
| 71327 | case 3238: /* *avx512f_sminv4di3 */ |
| 71328 | case 3237: /* *avx512f_smaxv4di3_mask */ |
| 71329 | case 3236: /* *avx512f_smaxv4di3 */ |
| 71330 | case 3227: /* *avx512f_uminv4si3_mask */ |
| 71331 | case 3226: /* *avx512f_uminv4si3 */ |
| 71332 | case 3225: /* *avx512f_umaxv4si3_mask */ |
| 71333 | case 3224: /* *avx512f_umaxv4si3 */ |
| 71334 | case 3223: /* *avx512f_sminv4si3_mask */ |
| 71335 | case 3222: /* *avx512f_sminv4si3 */ |
| 71336 | case 3221: /* *avx512f_smaxv4si3_mask */ |
| 71337 | case 3220: /* *avx512f_smaxv4si3 */ |
| 71338 | case 3219: /* *avx512f_uminv8si3_mask */ |
| 71339 | case 3218: /* *avx512f_uminv8si3 */ |
| 71340 | case 3217: /* *avx512f_umaxv8si3_mask */ |
| 71341 | case 3216: /* *avx512f_umaxv8si3 */ |
| 71342 | case 3215: /* *avx512f_sminv8si3_mask */ |
| 71343 | case 3214: /* *avx512f_sminv8si3 */ |
| 71344 | case 3213: /* *avx512f_smaxv8si3_mask */ |
| 71345 | case 3212: /* *avx512f_smaxv8si3 */ |
| 71346 | case 3203: /* *avx2_uminv8si3 */ |
| 71347 | case 3202: /* *avx2_umaxv8si3 */ |
| 71348 | case 3201: /* *avx2_sminv8si3 */ |
| 71349 | case 3200: /* *avx2_smaxv8si3 */ |
| 71350 | case 3199: /* *avx2_uminv16hi3 */ |
| 71351 | case 3198: /* *avx2_umaxv16hi3 */ |
| 71352 | case 3197: /* *avx2_sminv16hi3 */ |
| 71353 | case 3196: /* *avx2_smaxv16hi3 */ |
| 71354 | case 3195: /* *avx2_uminv32qi3 */ |
| 71355 | case 3194: /* *avx2_umaxv32qi3 */ |
| 71356 | case 3193: /* *avx2_sminv32qi3 */ |
| 71357 | case 3192: /* *avx2_smaxv32qi3 */ |
| 71358 | case 3067: /* *sse2_pmaddwd */ |
| 71359 | case 3066: /* *avx2_pmaddwd */ |
| 71360 | case 3029: /* *sse2_ussubv8hi3_mask */ |
| 71361 | case 3028: /* *sse2_ussubv8hi3 */ |
| 71362 | case 3027: /* *sse2_sssubv8hi3_mask */ |
| 71363 | case 3026: /* *sse2_sssubv8hi3 */ |
| 71364 | case 3025: /* *sse2_usaddv8hi3_mask */ |
| 71365 | case 3024: /* *sse2_usaddv8hi3 */ |
| 71366 | case 3023: /* *sse2_ssaddv8hi3_mask */ |
| 71367 | case 3022: /* *sse2_ssaddv8hi3 */ |
| 71368 | case 3021: /* *avx2_ussubv16hi3_mask */ |
| 71369 | case 3020: /* *avx2_ussubv16hi3 */ |
| 71370 | case 3019: /* *avx2_sssubv16hi3_mask */ |
| 71371 | case 3018: /* *avx2_sssubv16hi3 */ |
| 71372 | case 3017: /* *avx2_usaddv16hi3_mask */ |
| 71373 | case 3016: /* *avx2_usaddv16hi3 */ |
| 71374 | case 3015: /* *avx2_ssaddv16hi3_mask */ |
| 71375 | case 3014: /* *avx2_ssaddv16hi3 */ |
| 71376 | case 3013: /* *avx512bw_ussubv32hi3_mask */ |
| 71377 | case 3012: /* *avx512bw_ussubv32hi3 */ |
| 71378 | case 3011: /* *avx512bw_sssubv32hi3_mask */ |
| 71379 | case 3010: /* *avx512bw_sssubv32hi3 */ |
| 71380 | case 3009: /* *avx512bw_usaddv32hi3_mask */ |
| 71381 | case 3008: /* *avx512bw_usaddv32hi3 */ |
| 71382 | case 3007: /* *avx512bw_ssaddv32hi3_mask */ |
| 71383 | case 3006: /* *avx512bw_ssaddv32hi3 */ |
| 71384 | case 3005: /* *sse2_ussubv16qi3_mask */ |
| 71385 | case 3004: /* *sse2_ussubv16qi3 */ |
| 71386 | case 3003: /* *sse2_sssubv16qi3_mask */ |
| 71387 | case 3002: /* *sse2_sssubv16qi3 */ |
| 71388 | case 3001: /* *sse2_usaddv16qi3_mask */ |
| 71389 | case 3000: /* *sse2_usaddv16qi3 */ |
| 71390 | case 2999: /* *sse2_ssaddv16qi3_mask */ |
| 71391 | case 2998: /* *sse2_ssaddv16qi3 */ |
| 71392 | case 2997: /* *avx2_ussubv32qi3_mask */ |
| 71393 | case 2996: /* *avx2_ussubv32qi3 */ |
| 71394 | case 2995: /* *avx2_sssubv32qi3_mask */ |
| 71395 | case 2994: /* *avx2_sssubv32qi3 */ |
| 71396 | case 2993: /* *avx2_usaddv32qi3_mask */ |
| 71397 | case 2992: /* *avx2_usaddv32qi3 */ |
| 71398 | case 2991: /* *avx2_ssaddv32qi3_mask */ |
| 71399 | case 2990: /* *avx2_ssaddv32qi3 */ |
| 71400 | case 2989: /* *avx512bw_ussubv64qi3_mask */ |
| 71401 | case 2988: /* *avx512bw_ussubv64qi3 */ |
| 71402 | case 2987: /* *avx512bw_sssubv64qi3_mask */ |
| 71403 | case 2986: /* *avx512bw_sssubv64qi3 */ |
| 71404 | case 2985: /* *avx512bw_usaddv64qi3_mask */ |
| 71405 | case 2984: /* *avx512bw_usaddv64qi3 */ |
| 71406 | case 2983: /* *avx512bw_ssaddv64qi3_mask */ |
| 71407 | case 2982: /* *avx512bw_ssaddv64qi3 */ |
| 71408 | case 2981: /* *subv8hi3_mask */ |
| 71409 | case 2980: /* *addv8hi3_mask */ |
| 71410 | case 2979: /* *subv16hi3_mask */ |
| 71411 | case 2978: /* *addv16hi3_mask */ |
| 71412 | case 2975: /* *subv32qi3_mask */ |
| 71413 | case 2974: /* *addv32qi3_mask */ |
| 71414 | case 2973: /* *subv16qi3_mask */ |
| 71415 | case 2972: /* *addv16qi3_mask */ |
| 71416 | case 2969: /* *subv2di3_mask */ |
| 71417 | case 2968: /* *addv2di3_mask */ |
| 71418 | case 2967: /* *subv4di3_mask */ |
| 71419 | case 2966: /* *addv4di3_mask */ |
| 71420 | case 2963: /* *subv4si3_mask */ |
| 71421 | case 2962: /* *addv4si3_mask */ |
| 71422 | case 2961: /* *subv8si3_mask */ |
| 71423 | case 2960: /* *addv8si3_mask */ |
| 71424 | case 2957: /* *subv2di3 */ |
| 71425 | case 2956: /* *addv2di3 */ |
| 71426 | case 2955: /* *subv4di3 */ |
| 71427 | case 2954: /* *addv4di3 */ |
| 71428 | case 2951: /* *subv4si3 */ |
| 71429 | case 2950: /* *addv4si3 */ |
| 71430 | case 2949: /* *subv8si3 */ |
| 71431 | case 2948: /* *addv8si3 */ |
| 71432 | case 2945: /* *subv8hi3 */ |
| 71433 | case 2944: /* *addv8hi3 */ |
| 71434 | case 2943: /* *subv16hi3 */ |
| 71435 | case 2942: /* *addv16hi3 */ |
| 71436 | case 2939: /* *subv16qi3 */ |
| 71437 | case 2938: /* *addv16qi3 */ |
| 71438 | case 2937: /* *subv32qi3 */ |
| 71439 | case 2936: /* *addv32qi3 */ |
| 71440 | case 2725: /* sse2_shufpd_v2df */ |
| 71441 | case 2724: /* sse2_shufpd_v2di */ |
| 71442 | case 2723: /* vec_interleave_lowv2di_mask */ |
| 71443 | case 2722: /* vec_interleave_lowv2di */ |
| 71444 | case 2721: /* avx512f_interleave_lowv8di_mask */ |
| 71445 | case 2720: /* *avx512f_interleave_lowv8di */ |
| 71446 | case 2717: /* vec_interleave_highv2di_mask */ |
| 71447 | case 2716: /* vec_interleave_highv2di */ |
| 71448 | case 2715: /* avx512f_interleave_highv8di_mask */ |
| 71449 | case 2714: /* *avx512f_interleave_highv8di */ |
| 71450 | case 2711: /* sse2_shufpd_v2df_mask */ |
| 71451 | case 2710: /* avx_shufpd256_1_mask */ |
| 71452 | case 2709: /* avx_shufpd256_1 */ |
| 71453 | case 2708: /* avx512f_shufpd512_1_mask */ |
| 71454 | case 2707: /* avx512f_shufpd512_1 */ |
| 71455 | case 2706: /* avx512f_shufps512_1_mask */ |
| 71456 | case 2705: /* avx512f_shufps512_1 */ |
| 71457 | case 2588: /* avx512vl_vternlogv2di_mask */ |
| 71458 | case 2586: /* avx512f_vternlogv8di_mask */ |
| 71459 | case 2585: /* avx512vl_vternlogv4si_mask */ |
| 71460 | case 2583: /* avx512f_vternlogv16si_mask */ |
| 71461 | case 2582: /* avx512vl_vternlogv2di_maskz_1 */ |
| 71462 | case 2581: /* avx512vl_vternlogv2di */ |
| 71463 | case 2578: /* avx512f_vternlogv8di_maskz_1 */ |
| 71464 | case 2577: /* avx512f_vternlogv8di */ |
| 71465 | case 2576: /* avx512vl_vternlogv4si_maskz_1 */ |
| 71466 | case 2575: /* avx512vl_vternlogv4si */ |
| 71467 | case 2572: /* avx512f_vternlogv16si_maskz_1 */ |
| 71468 | case 2571: /* avx512f_vternlogv16si */ |
| 71469 | case 2541: /* avx512vl_unpcklpd128_mask */ |
| 71470 | case 2538: /* *avx512f_unpcklpd512_mask */ |
| 71471 | case 2537: /* *avx512f_unpcklpd512 */ |
| 71472 | case 2535: /* avx512vl_unpckhpd128_mask */ |
| 71473 | case 2532: /* avx512f_unpckhpd512_mask */ |
| 71474 | case 2531: /* *avx512f_unpckhpd512 */ |
| 71475 | case 2465: /* sse4_1_insertps */ |
| 71476 | case 2464: /* *vec_setv4sf_sse4_1 */ |
| 71477 | case 2448: /* sse_shufps_v4sf */ |
| 71478 | case 2447: /* sse_shufps_v4si */ |
| 71479 | case 2446: /* sse_shufps_v4sf_mask */ |
| 71480 | case 2445: /* avx_shufps256_1_mask */ |
| 71481 | case 2444: /* avx_shufps256_1 */ |
| 71482 | case 2431: /* vec_interleave_lowv4sf */ |
| 71483 | case 2430: /* unpcklps128_mask */ |
| 71484 | case 2427: /* avx512f_unpcklps512_mask */ |
| 71485 | case 2426: /* *avx512f_unpcklps512 */ |
| 71486 | case 2425: /* vec_interleave_highv4sf_mask */ |
| 71487 | case 2424: /* vec_interleave_highv4sf */ |
| 71488 | case 2421: /* avx512f_unpckhps512_mask */ |
| 71489 | case 2420: /* *avx512f_unpckhps512 */ |
| 71490 | case 1800: /* *xortf3 */ |
| 71491 | case 1799: /* *iortf3 */ |
| 71492 | case 1798: /* *andtf3 */ |
| 71493 | case 1797: /* *xordf3 */ |
| 71494 | case 1796: /* *iordf3 */ |
| 71495 | case 1795: /* *anddf3 */ |
| 71496 | case 1794: /* *xorsf3 */ |
| 71497 | case 1793: /* *iorsf3 */ |
| 71498 | case 1792: /* *andsf3 */ |
| 71499 | case 1791: /* *andnottf3 */ |
| 71500 | case 1790: /* *andnotdf3 */ |
| 71501 | case 1789: /* *andnotsf3 */ |
| 71502 | case 1788: /* *xorv8df3_mask */ |
| 71503 | case 1787: /* *xorv8df3 */ |
| 71504 | case 1786: /* *iorv8df3_mask */ |
| 71505 | case 1785: /* *iorv8df3 */ |
| 71506 | case 1784: /* *andv8df3_mask */ |
| 71507 | case 1783: /* *andv8df3 */ |
| 71508 | case 1782: /* *xorv16sf3_mask */ |
| 71509 | case 1781: /* *xorv16sf3 */ |
| 71510 | case 1780: /* *iorv16sf3_mask */ |
| 71511 | case 1779: /* *iorv16sf3 */ |
| 71512 | case 1778: /* *andv16sf3_mask */ |
| 71513 | case 1777: /* *andv16sf3 */ |
| 71514 | case 1776: /* *xorv2df3_mask */ |
| 71515 | case 1775: /* *xorv2df3 */ |
| 71516 | case 1774: /* *iorv2df3_mask */ |
| 71517 | case 1773: /* *iorv2df3 */ |
| 71518 | case 1772: /* *andv2df3_mask */ |
| 71519 | case 1771: /* *andv2df3 */ |
| 71520 | case 1764: /* *xorv4sf3_mask */ |
| 71521 | case 1763: /* *xorv4sf3 */ |
| 71522 | case 1762: /* *iorv4sf3_mask */ |
| 71523 | case 1761: /* *iorv4sf3 */ |
| 71524 | case 1760: /* *andv4sf3_mask */ |
| 71525 | case 1759: /* *andv4sf3 */ |
| 71526 | case 1752: /* avx512f_andnotv8df3_mask */ |
| 71527 | case 1751: /* avx512f_andnotv8df3 */ |
| 71528 | case 1750: /* avx512f_andnotv16sf3_mask */ |
| 71529 | case 1749: /* avx512f_andnotv16sf3 */ |
| 71530 | case 1748: /* sse2_andnotv2df3_mask */ |
| 71531 | case 1747: /* sse2_andnotv2df3 */ |
| 71532 | case 1744: /* sse_andnotv4sf3_mask */ |
| 71533 | case 1743: /* sse_andnotv4sf3 */ |
| 71534 | case 1740: /* sse2_ucomi_round */ |
| 71535 | case 1739: /* sse2_ucomi */ |
| 71536 | case 1738: /* sse_ucomi_round */ |
| 71537 | case 1737: /* sse_ucomi */ |
| 71538 | case 1736: /* sse2_comi_round */ |
| 71539 | case 1735: /* sse2_comi */ |
| 71540 | case 1734: /* sse_comi_round */ |
| 71541 | case 1733: /* sse_comi */ |
| 71542 | case 1732: /* avx512f_maskcmpv2df3 */ |
| 71543 | case 1731: /* avx512f_maskcmpv4df3 */ |
| 71544 | case 1729: /* avx512f_maskcmpv4sf3 */ |
| 71545 | case 1728: /* avx512f_maskcmpv8sf3 */ |
| 71546 | case 1726: /* avx512f_vmcmpv2df3_mask_round */ |
| 71547 | case 1725: /* avx512f_vmcmpv2df3_mask */ |
| 71548 | case 1724: /* avx512f_vmcmpv4sf3_mask_round */ |
| 71549 | case 1723: /* avx512f_vmcmpv4sf3_mask */ |
| 71550 | case 1722: /* avx512f_vmcmpv2df3_round */ |
| 71551 | case 1721: /* avx512f_vmcmpv2df3 */ |
| 71552 | case 1720: /* avx512f_vmcmpv4sf3_round */ |
| 71553 | case 1719: /* avx512f_vmcmpv4sf3 */ |
| 71554 | case 1718: /* avx512vl_ucmpv2di3_mask */ |
| 71555 | case 1717: /* avx512vl_ucmpv2di3 */ |
| 71556 | case 1716: /* avx512vl_ucmpv4di3_mask */ |
| 71557 | case 1715: /* avx512vl_ucmpv4di3 */ |
| 71558 | case 1712: /* avx512vl_ucmpv4si3_mask */ |
| 71559 | case 1711: /* avx512vl_ucmpv4si3 */ |
| 71560 | case 1710: /* avx512vl_ucmpv8si3_mask */ |
| 71561 | case 1709: /* avx512vl_ucmpv8si3 */ |
| 71562 | case 1706: /* avx512vl_ucmpv8hi3_mask */ |
| 71563 | case 1705: /* avx512vl_ucmpv8hi3 */ |
| 71564 | case 1704: /* avx512vl_ucmpv16hi3_mask */ |
| 71565 | case 1703: /* avx512vl_ucmpv16hi3 */ |
| 71566 | case 1700: /* avx512vl_ucmpv32qi3_mask */ |
| 71567 | case 1699: /* avx512vl_ucmpv32qi3 */ |
| 71568 | case 1698: /* avx512vl_ucmpv16qi3_mask */ |
| 71569 | case 1697: /* avx512vl_ucmpv16qi3 */ |
| 71570 | case 1694: /* avx512vl_cmpv8hi3_mask */ |
| 71571 | case 1693: /* avx512vl_cmpv8hi3 */ |
| 71572 | case 1692: /* avx512vl_cmpv16hi3_mask */ |
| 71573 | case 1691: /* avx512vl_cmpv16hi3 */ |
| 71574 | case 1688: /* avx512vl_cmpv32qi3_mask */ |
| 71575 | case 1687: /* avx512vl_cmpv32qi3 */ |
| 71576 | case 1686: /* avx512vl_cmpv16qi3_mask */ |
| 71577 | case 1685: /* avx512vl_cmpv16qi3 */ |
| 71578 | case 1682: /* avx512vl_cmpv2df3_mask */ |
| 71579 | case 1681: /* avx512vl_cmpv2df3 */ |
| 71580 | case 1680: /* avx512vl_cmpv4df3_mask */ |
| 71581 | case 1679: /* avx512vl_cmpv4df3 */ |
| 71582 | case 1674: /* avx512vl_cmpv4sf3_mask */ |
| 71583 | case 1673: /* avx512vl_cmpv4sf3 */ |
| 71584 | case 1672: /* avx512vl_cmpv8sf3_mask */ |
| 71585 | case 1671: /* avx512vl_cmpv8sf3 */ |
| 71586 | case 1666: /* avx512vl_cmpv2di3_mask */ |
| 71587 | case 1665: /* avx512vl_cmpv2di3 */ |
| 71588 | case 1664: /* avx512vl_cmpv4di3_mask */ |
| 71589 | case 1663: /* avx512vl_cmpv4di3 */ |
| 71590 | case 1658: /* avx512vl_cmpv4si3_mask */ |
| 71591 | case 1657: /* avx512vl_cmpv4si3 */ |
| 71592 | case 1656: /* avx512vl_cmpv8si3_mask */ |
| 71593 | case 1655: /* avx512vl_cmpv8si3 */ |
| 71594 | case 1650: /* sse2_vmmaskcmpv2df3 */ |
| 71595 | case 1649: /* sse_vmmaskcmpv4sf3 */ |
| 71596 | case 1648: /* sse2_maskcmpv2df3 */ |
| 71597 | case 1647: /* avx_maskcmpv4df3 */ |
| 71598 | case 1646: /* sse_maskcmpv4sf3 */ |
| 71599 | case 1645: /* avx_maskcmpv8sf3 */ |
| 71600 | case 1644: /* *sse2_maskcmpv2df3_comm */ |
| 71601 | case 1643: /* *avx_maskcmpv4df3_comm */ |
| 71602 | case 1642: /* *sse_maskcmpv4sf3_comm */ |
| 71603 | case 1641: /* *avx_maskcmpv8sf3_comm */ |
| 71604 | case 1640: /* avx_vmcmpv2df3 */ |
| 71605 | case 1639: /* avx_vmcmpv4sf3 */ |
| 71606 | case 1638: /* avx_cmpv2df3 */ |
| 71607 | case 1637: /* avx_cmpv4df3 */ |
| 71608 | case 1636: /* avx_cmpv4sf3 */ |
| 71609 | case 1635: /* avx_cmpv8sf3 */ |
| 71610 | case 1213: /* mmx_pmovmskb */ |
| 71611 | case 1205: /* *vec_dupv2si */ |
| 71612 | case 1204: /* *vec_dupv4hi */ |
| 71613 | case 1203: /* mmx_pswapdv2si2 */ |
| 71614 | case 1202: /* mmx_pshufw_1 */ |
| 71615 | case 1201: /* mmx_pextrw */ |
| 71616 | case 1200: /* *mmx_pinsrw */ |
| 71617 | case 1199: /* mmx_punpckldq */ |
| 71618 | case 1198: /* mmx_punpckhdq */ |
| 71619 | case 1197: /* mmx_punpcklwd */ |
| 71620 | case 1196: /* mmx_punpckhwd */ |
| 71621 | case 1195: /* mmx_punpcklbw */ |
| 71622 | case 1194: /* mmx_punpckhbw */ |
| 71623 | case 1190: /* *mmx_xorv2si3 */ |
| 71624 | case 1189: /* *mmx_iorv2si3 */ |
| 71625 | case 1188: /* *mmx_andv2si3 */ |
| 71626 | case 1187: /* *mmx_xorv4hi3 */ |
| 71627 | case 1186: /* *mmx_iorv4hi3 */ |
| 71628 | case 1185: /* *mmx_andv4hi3 */ |
| 71629 | case 1184: /* *mmx_xorv8qi3 */ |
| 71630 | case 1183: /* *mmx_iorv8qi3 */ |
| 71631 | case 1182: /* *mmx_andv8qi3 */ |
| 71632 | case 1181: /* mmx_andnotv2si3 */ |
| 71633 | case 1180: /* mmx_andnotv4hi3 */ |
| 71634 | case 1179: /* mmx_andnotv8qi3 */ |
| 71635 | case 1178: /* mmx_gtv2si3 */ |
| 71636 | case 1177: /* mmx_gtv4hi3 */ |
| 71637 | case 1176: /* mmx_gtv8qi3 */ |
| 71638 | case 1175: /* *mmx_eqv2si3 */ |
| 71639 | case 1174: /* *mmx_eqv4hi3 */ |
| 71640 | case 1173: /* *mmx_eqv8qi3 */ |
| 71641 | case 1164: /* *mmx_uminv8qi3 */ |
| 71642 | case 1163: /* *mmx_umaxv8qi3 */ |
| 71643 | case 1162: /* *mmx_sminv4hi3 */ |
| 71644 | case 1161: /* *mmx_smaxv4hi3 */ |
| 71645 | case 1154: /* *mmx_ussubv4hi3 */ |
| 71646 | case 1153: /* *mmx_sssubv4hi3 */ |
| 71647 | case 1152: /* *mmx_usaddv4hi3 */ |
| 71648 | case 1151: /* *mmx_ssaddv4hi3 */ |
| 71649 | case 1150: /* *mmx_ussubv8qi3 */ |
| 71650 | case 1149: /* *mmx_sssubv8qi3 */ |
| 71651 | case 1148: /* *mmx_usaddv8qi3 */ |
| 71652 | case 1147: /* *mmx_ssaddv8qi3 */ |
| 71653 | case 1146: /* *mmx_subv1di3 */ |
| 71654 | case 1145: /* *mmx_addv1di3 */ |
| 71655 | case 1144: /* *mmx_subv2si3 */ |
| 71656 | case 1143: /* *mmx_addv2si3 */ |
| 71657 | case 1142: /* *mmx_subv4hi3 */ |
| 71658 | case 1141: /* *mmx_addv4hi3 */ |
| 71659 | case 1140: /* *mmx_subv8qi3 */ |
| 71660 | case 1139: /* *mmx_addv8qi3 */ |
| 71661 | case 1135: /* *vec_dupv2sf */ |
| 71662 | case 1134: /* mmx_pswapdv2sf2 */ |
| 71663 | case 1133: /* mmx_floatv2si2 */ |
| 71664 | case 1132: /* mmx_pi2fw */ |
| 71665 | case 1131: /* mmx_pf2iw */ |
| 71666 | case 1130: /* mmx_pf2id */ |
| 71667 | case 1129: /* mmx_gev2sf3 */ |
| 71668 | case 1128: /* mmx_gtv2sf3 */ |
| 71669 | case 1127: /* *mmx_eqv2sf3 */ |
| 71670 | case 1126: /* mmx_addsubv2sf3 */ |
| 71671 | case 1125: /* mmx_hsubv2sf3 */ |
| 71672 | case 1124: /* mmx_haddv2sf3 */ |
| 71673 | case 1118: /* mmx_ieee_minv2sf3 */ |
| 71674 | case 1117: /* mmx_ieee_maxv2sf3 */ |
| 71675 | case 1116: /* *mmx_sminv2sf3 */ |
| 71676 | case 1115: /* *mmx_smaxv2sf3 */ |
| 71677 | case 1113: /* *mmx_subv2sf3 */ |
| 71678 | case 1112: /* *mmx_addv2sf3 */ |
| 71679 | case 626: /* setcc_df_sse */ |
| 71680 | case 625: /* setcc_sf_sse */ |
| 71681 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) |
| 71682 | { |
| 71683 | return 1; |
| 71684 | } |
| 71685 | else if (cached_memory == MEMORY_LOAD) |
| 71686 | { |
| 71687 | return 8; |
| 71688 | } |
| 71689 | else |
| 71690 | { |
| 71691 | return 0; |
| 71692 | } |
| 71693 | |
| 71694 | case 624: /* *setcc_qi_slp */ |
| 71695 | case 623: /* *setcc_qi */ |
| 71696 | if (((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) || (cached_memory == MEMORY_STORE)) |
| 71697 | { |
| 71698 | return 1; |
| 71699 | } |
| 71700 | else |
| 71701 | { |
| 71702 | return 0; |
| 71703 | } |
| 71704 | |
| 71705 | case 611: /* *btcq */ |
| 71706 | case 610: /* *btrq */ |
| 71707 | case 609: /* *btsq */ |
| 71708 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) |
| 71709 | { |
| 71710 | return 2; |
| 71711 | } |
| 71712 | else |
| 71713 | { |
| 71714 | return 0; |
| 71715 | } |
| 71716 | |
| 71717 | case 386: /* udivmodhiqi3 */ |
| 71718 | case 375: /* divmodhiqi3 */ |
| 71719 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) |
| 71720 | { |
| 71721 | return 12 /* 0xc */; |
| 71722 | } |
| 71723 | else |
| 71724 | { |
| 71725 | return 0; |
| 71726 | } |
| 71727 | |
| 71728 | case 385: /* *udivmoddi4_noext */ |
| 71729 | case 374: /* *divmoddi4_noext */ |
| 71730 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) |
| 71731 | { |
| 71732 | return 41 /* 0x29 */; |
| 71733 | } |
| 71734 | else |
| 71735 | { |
| 71736 | return 0; |
| 71737 | } |
| 71738 | |
| 71739 | case 384: /* *udivmodsi4_noext */ |
| 71740 | case 373: /* *divmodsi4_noext */ |
| 71741 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) |
| 71742 | { |
| 71743 | return 25 /* 0x19 */; |
| 71744 | } |
| 71745 | else |
| 71746 | { |
| 71747 | return 0; |
| 71748 | } |
| 71749 | |
| 71750 | case 383: /* *udivmodhi4_noext */ |
| 71751 | case 372: /* *divmodhi4_noext */ |
| 71752 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) |
| 71753 | { |
| 71754 | return 17 /* 0x11 */; |
| 71755 | } |
| 71756 | else |
| 71757 | { |
| 71758 | return 0; |
| 71759 | } |
| 71760 | |
| 71761 | case 356: /* *umulditi3_1 */ |
| 71762 | case 355: /* *umulsidi3_1 */ |
| 71763 | extract_constrain_insn_cached (insn); |
| 71764 | if ((which_alternative == 1) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 71765 | { |
| 71766 | return 3; |
| 71767 | } |
| 71768 | else if ((which_alternative == 1) && (! ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE))) |
| 71769 | { |
| 71770 | return 7; |
| 71771 | } |
| 71772 | else if ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) |
| 71773 | { |
| 71774 | return 1; |
| 71775 | } |
| 71776 | else |
| 71777 | { |
| 71778 | return 0; |
| 71779 | } |
| 71780 | |
| 71781 | case 366: /* *umulsi3_highpart_1 */ |
| 71782 | case 365: /* *smulsi3_highpart_1 */ |
| 71783 | case 364: /* *umulsi3_highpart_zext */ |
| 71784 | case 363: /* *smulsi3_highpart_zext */ |
| 71785 | case 362: /* *umuldi3_highpart_1 */ |
| 71786 | case 361: /* *smuldi3_highpart_1 */ |
| 71787 | case 360: /* *umulqihi3_1 */ |
| 71788 | case 359: /* *mulqihi3_1 */ |
| 71789 | case 358: /* *mulditi3_1 */ |
| 71790 | case 357: /* *mulsidi3_1 */ |
| 71791 | case 352: /* *umulvqi4 */ |
| 71792 | case 351: /* *mulvqi4 */ |
| 71793 | case 350: /* *umulvdi4 */ |
| 71794 | case 349: /* *umulvsi4 */ |
| 71795 | case 348: /* *umulvhi4 */ |
| 71796 | case 347: /* *mulvdi4_1 */ |
| 71797 | case 346: /* *mulvsi4_1 */ |
| 71798 | case 345: /* *mulvhi4_1 */ |
| 71799 | case 344: /* *mulvhi4 */ |
| 71800 | case 343: /* *mulvdi4 */ |
| 71801 | case 342: /* *mulvsi4 */ |
| 71802 | case 341: /* *mulqi3_1 */ |
| 71803 | case 340: /* *mulsi3_1_zext */ |
| 71804 | case 339: /* *muldi3_1 */ |
| 71805 | case 338: /* *mulsi3_1 */ |
| 71806 | case 337: /* *mulhi3_1 */ |
| 71807 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) |
| 71808 | { |
| 71809 | return 3; |
| 71810 | } |
| 71811 | else |
| 71812 | { |
| 71813 | return 7; |
| 71814 | } |
| 71815 | |
| 71816 | case 202: /* *floatdidf2_mixed */ |
| 71817 | case 201: /* *floatsidf2_mixed */ |
| 71818 | case 200: /* *floatdisf2_mixed */ |
| 71819 | case 199: /* *floatsisf2_mixed */ |
| 71820 | extract_constrain_insn_cached (insn); |
| 71821 | if ((which_alternative == 0) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 71822 | { |
| 71823 | return 4; |
| 71824 | } |
| 71825 | else if ((which_alternative == 0) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 71826 | { |
| 71827 | return 12 /* 0xc */; |
| 71828 | } |
| 71829 | else if (which_alternative == 0) |
| 71830 | { |
| 71831 | return 1; |
| 71832 | } |
| 71833 | else |
| 71834 | { |
| 71835 | return 0; |
| 71836 | } |
| 71837 | |
| 71838 | case 206: /* *floatdidf2_i387 */ |
| 71839 | case 205: /* *floatdisf2_i387 */ |
| 71840 | case 204: /* *floatsidf2_i387 */ |
| 71841 | case 203: /* *floatsisf2_i387 */ |
| 71842 | case 198: /* floatdixf2 */ |
| 71843 | case 197: /* floatsixf2 */ |
| 71844 | case 196: /* floathixf2 */ |
| 71845 | case 195: /* floathidf2 */ |
| 71846 | case 194: /* floathisf2 */ |
| 71847 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) |
| 71848 | { |
| 71849 | return 4; |
| 71850 | } |
| 71851 | else if (cached_memory == MEMORY_LOAD) |
| 71852 | { |
| 71853 | return 12 /* 0xc */; |
| 71854 | } |
| 71855 | else |
| 71856 | { |
| 71857 | return 1; |
| 71858 | } |
| 71859 | |
| 71860 | case 163: /* *truncxfdf2_mixed */ |
| 71861 | case 162: /* *truncxfsf2_mixed */ |
| 71862 | case 160: /* *truncdfsf_i387 */ |
| 71863 | extract_constrain_insn_cached (insn); |
| 71864 | if (which_alternative != 0) |
| 71865 | { |
| 71866 | return 6; |
| 71867 | } |
| 71868 | else if ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) |
| 71869 | { |
| 71870 | return 8; |
| 71871 | } |
| 71872 | else if (cached_memory == MEMORY_STORE) |
| 71873 | { |
| 71874 | return 5; |
| 71875 | } |
| 71876 | else |
| 71877 | { |
| 71878 | return 1; |
| 71879 | } |
| 71880 | |
| 71881 | case 4935: /* storedi_via_fpu */ |
| 71882 | case 4934: /* loaddi_via_fpu */ |
| 71883 | case 841: /* truncxfdf2_i387_noop_unspec */ |
| 71884 | case 840: /* truncxfsf2_i387_noop_unspec */ |
| 71885 | case 167: /* *truncxfdf2_i387 */ |
| 71886 | case 166: /* *truncxfsf2_i387 */ |
| 71887 | case 165: /* truncxfdf2_i387_noop */ |
| 71888 | case 164: /* truncxfsf2_i387_noop */ |
| 71889 | case 161: /* *truncdfsf2_i387_1 */ |
| 71890 | case 158: /* *truncdfsf_fast_i387 */ |
| 71891 | case 156: /* *extenddfxf2_i387 */ |
| 71892 | case 155: /* *extendsfxf2_i387 */ |
| 71893 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) |
| 71894 | { |
| 71895 | return 8; |
| 71896 | } |
| 71897 | else if (cached_memory == MEMORY_STORE) |
| 71898 | { |
| 71899 | return 5; |
| 71900 | } |
| 71901 | else |
| 71902 | { |
| 71903 | return 1; |
| 71904 | } |
| 71905 | |
| 71906 | case 125: /* *movxf_internal */ |
| 71907 | extract_constrain_insn_cached (insn); |
| 71908 | if (((1 << which_alternative) & 0xff8)) |
| 71909 | { |
| 71910 | return 6; |
| 71911 | } |
| 71912 | else if ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) |
| 71913 | { |
| 71914 | return 8; |
| 71915 | } |
| 71916 | else if (cached_memory == MEMORY_STORE) |
| 71917 | { |
| 71918 | return 5; |
| 71919 | } |
| 71920 | else |
| 71921 | { |
| 71922 | return 1; |
| 71923 | } |
| 71924 | |
| 71925 | case 123: /* *pushsf */ |
| 71926 | case 122: /* *pushsf_rex64 */ |
| 71927 | extract_constrain_insn_cached (insn); |
| 71928 | if ((which_alternative == 1) && ((cached_memory = get_attr_memory (insn)) == MEMORY_STORE)) |
| 71929 | { |
| 71930 | return 1; |
| 71931 | } |
| 71932 | else if ((which_alternative == 1) && ((cached_memory = get_attr_memory (insn)) == MEMORY_BOTH)) |
| 71933 | { |
| 71934 | return 5; |
| 71935 | } |
| 71936 | else if (which_alternative != 1) |
| 71937 | { |
| 71938 | return 6; |
| 71939 | } |
| 71940 | else |
| 71941 | { |
| 71942 | return 0; |
| 71943 | } |
| 71944 | |
| 71945 | case 801: /* *load_tp_di */ |
| 71946 | case 800: /* *load_tp_si */ |
| 71947 | case 799: /* *load_tp_x32_zext */ |
| 71948 | case 798: /* *load_tp_x32 */ |
| 71949 | case 92: /* *movabsdi_2 */ |
| 71950 | case 91: /* *movabssi_2 */ |
| 71951 | case 90: /* *movabshi_2 */ |
| 71952 | case 89: /* *movabsqi_2 */ |
| 71953 | return 4; |
| 71954 | |
| 71955 | case 4758: /* avx512vl_compressstorev2df_mask */ |
| 71956 | case 4757: /* avx512vl_compressstorev2di_mask */ |
| 71957 | case 4756: /* avx512vl_compressstorev4sf_mask */ |
| 71958 | case 4755: /* avx512vl_compressstorev4si_mask */ |
| 71959 | case 4754: /* avx512vl_compressstorev4df_mask */ |
| 71960 | case 4753: /* avx512vl_compressstorev4di_mask */ |
| 71961 | case 4752: /* avx512vl_compressstorev8sf_mask */ |
| 71962 | case 4751: /* avx512vl_compressstorev8si_mask */ |
| 71963 | case 2933: /* avx512f_us_truncatev8div16qi2_mask_store */ |
| 71964 | case 2932: /* avx512f_truncatev8div16qi2_mask_store */ |
| 71965 | case 2931: /* avx512f_ss_truncatev8div16qi2_mask_store */ |
| 71966 | case 2924: /* *avx512f_us_truncatev8div16qi2_store */ |
| 71967 | case 2923: /* *avx512f_truncatev8div16qi2_store */ |
| 71968 | case 2922: /* *avx512f_ss_truncatev8div16qi2_store */ |
| 71969 | case 2918: /* avx512vl_us_truncatev2div2si2_mask_store */ |
| 71970 | case 2917: /* avx512vl_truncatev2div2si2_mask_store */ |
| 71971 | case 2916: /* avx512vl_ss_truncatev2div2si2_mask_store */ |
| 71972 | case 2909: /* *avx512vl_us_truncatev2div2si2_store */ |
| 71973 | case 2908: /* *avx512vl_truncatev2div2si2_store */ |
| 71974 | case 2907: /* *avx512vl_ss_truncatev2div2si2_store */ |
| 71975 | case 2903: /* avx512vl_us_truncatev2div2hi2_mask_store */ |
| 71976 | case 2902: /* avx512vl_truncatev2div2hi2_mask_store */ |
| 71977 | case 2901: /* avx512vl_ss_truncatev2div2hi2_mask_store */ |
| 71978 | case 2894: /* *avx512vl_us_truncatev2div2hi2_store */ |
| 71979 | case 2893: /* *avx512vl_truncatev2div2hi2_store */ |
| 71980 | case 2892: /* *avx512vl_ss_truncatev2div2hi2_store */ |
| 71981 | case 2891: /* avx512vl_us_truncatev4div4hi2_mask_store */ |
| 71982 | case 2890: /* avx512vl_truncatev4div4hi2_mask_store */ |
| 71983 | case 2889: /* avx512vl_ss_truncatev4div4hi2_mask_store */ |
| 71984 | case 2888: /* avx512vl_us_truncatev4siv4hi2_mask_store */ |
| 71985 | case 2887: /* avx512vl_truncatev4siv4hi2_mask_store */ |
| 71986 | case 2886: /* avx512vl_ss_truncatev4siv4hi2_mask_store */ |
| 71987 | case 2873: /* *avx512vl_us_truncatev4div4hi2_store */ |
| 71988 | case 2872: /* *avx512vl_truncatev4div4hi2_store */ |
| 71989 | case 2871: /* *avx512vl_ss_truncatev4div4hi2_store */ |
| 71990 | case 2870: /* *avx512vl_us_truncatev4siv4hi2_store */ |
| 71991 | case 2869: /* *avx512vl_truncatev4siv4hi2_store */ |
| 71992 | case 2868: /* *avx512vl_ss_truncatev4siv4hi2_store */ |
| 71993 | case 2858: /* avx512vl_us_truncatev8siv8qi2_mask_store */ |
| 71994 | case 2857: /* avx512vl_truncatev8siv8qi2_mask_store */ |
| 71995 | case 2856: /* avx512vl_ss_truncatev8siv8qi2_mask_store */ |
| 71996 | case 2855: /* avx512vl_us_truncatev8hiv8qi2_mask_store */ |
| 71997 | case 2854: /* avx512vl_truncatev8hiv8qi2_mask_store */ |
| 71998 | case 2853: /* avx512vl_ss_truncatev8hiv8qi2_mask_store */ |
| 71999 | case 2840: /* *avx512vl_us_truncatev8siv8qi2_store */ |
| 72000 | case 2839: /* *avx512vl_truncatev8siv8qi2_store */ |
| 72001 | case 2838: /* *avx512vl_ss_truncatev8siv8qi2_store */ |
| 72002 | case 2837: /* *avx512vl_us_truncatev8hiv8qi2_store */ |
| 72003 | case 2836: /* *avx512vl_truncatev8hiv8qi2_store */ |
| 72004 | case 2835: /* *avx512vl_ss_truncatev8hiv8qi2_store */ |
| 72005 | case 2834: /* avx512vl_us_truncatev4div4qi2_mask_store */ |
| 72006 | case 2833: /* avx512vl_truncatev4div4qi2_mask_store */ |
| 72007 | case 2832: /* avx512vl_ss_truncatev4div4qi2_mask_store */ |
| 72008 | case 2831: /* avx512vl_us_truncatev4siv4qi2_mask_store */ |
| 72009 | case 2830: /* avx512vl_truncatev4siv4qi2_mask_store */ |
| 72010 | case 2829: /* avx512vl_ss_truncatev4siv4qi2_mask_store */ |
| 72011 | case 2816: /* *avx512vl_us_truncatev4div4qi2_store */ |
| 72012 | case 2815: /* *avx512vl_truncatev4div4qi2_store */ |
| 72013 | case 2814: /* *avx512vl_ss_truncatev4div4qi2_store */ |
| 72014 | case 2813: /* *avx512vl_us_truncatev4siv4qi2_store */ |
| 72015 | case 2812: /* *avx512vl_truncatev4siv4qi2_store */ |
| 72016 | case 2811: /* *avx512vl_ss_truncatev4siv4qi2_store */ |
| 72017 | case 2810: /* avx512vl_us_truncatev2div2qi2_mask_store */ |
| 72018 | case 2809: /* avx512vl_truncatev2div2qi2_mask_store */ |
| 72019 | case 2808: /* avx512vl_ss_truncatev2div2qi2_mask_store */ |
| 72020 | case 2801: /* *avx512vl_us_truncatev2div2qi2_store */ |
| 72021 | case 2800: /* *avx512vl_truncatev2div2qi2_store */ |
| 72022 | case 2799: /* *avx512vl_ss_truncatev2div2qi2_store */ |
| 72023 | case 2783: /* avx512vl_us_truncatev16hiv16qi2_mask */ |
| 72024 | case 2782: /* avx512vl_truncatev16hiv16qi2_mask */ |
| 72025 | case 2781: /* avx512vl_ss_truncatev16hiv16qi2_mask */ |
| 72026 | case 2780: /* avx512vl_us_truncatev8siv8hi2_mask */ |
| 72027 | case 2779: /* avx512vl_truncatev8siv8hi2_mask */ |
| 72028 | case 2778: /* avx512vl_ss_truncatev8siv8hi2_mask */ |
| 72029 | case 2777: /* avx512vl_us_truncatev4div4si2_mask */ |
| 72030 | case 2776: /* avx512vl_truncatev4div4si2_mask */ |
| 72031 | case 2775: /* avx512vl_ss_truncatev4div4si2_mask */ |
| 72032 | case 2774: /* *avx512vl_us_truncatev16hiv16qi2 */ |
| 72033 | case 2773: /* *avx512vl_truncatev16hiv16qi2 */ |
| 72034 | case 2772: /* *avx512vl_ss_truncatev16hiv16qi2 */ |
| 72035 | case 2771: /* *avx512vl_us_truncatev8siv8hi2 */ |
| 72036 | case 2770: /* *avx512vl_truncatev8siv8hi2 */ |
| 72037 | case 2769: /* *avx512vl_ss_truncatev8siv8hi2 */ |
| 72038 | case 2768: /* *avx512vl_us_truncatev4div4si2 */ |
| 72039 | case 2767: /* *avx512vl_truncatev4div4si2 */ |
| 72040 | case 2766: /* *avx512vl_ss_truncatev4div4si2 */ |
| 72041 | case 2759: /* avx512f_us_truncatev8div8hi2_mask */ |
| 72042 | case 2758: /* avx512f_truncatev8div8hi2_mask */ |
| 72043 | case 2757: /* avx512f_ss_truncatev8div8hi2_mask */ |
| 72044 | case 2756: /* avx512f_us_truncatev8div8si2_mask */ |
| 72045 | case 2755: /* avx512f_truncatev8div8si2_mask */ |
| 72046 | case 2754: /* avx512f_ss_truncatev8div8si2_mask */ |
| 72047 | case 2753: /* avx512f_us_truncatev16siv16hi2_mask */ |
| 72048 | case 2752: /* avx512f_truncatev16siv16hi2_mask */ |
| 72049 | case 2751: /* avx512f_ss_truncatev16siv16hi2_mask */ |
| 72050 | case 2750: /* avx512f_us_truncatev16siv16qi2_mask */ |
| 72051 | case 2749: /* avx512f_truncatev16siv16qi2_mask */ |
| 72052 | case 2748: /* avx512f_ss_truncatev16siv16qi2_mask */ |
| 72053 | case 2747: /* *avx512f_us_truncatev8div8hi2 */ |
| 72054 | case 2746: /* *avx512f_truncatev8div8hi2 */ |
| 72055 | case 2745: /* *avx512f_ss_truncatev8div8hi2 */ |
| 72056 | case 2744: /* *avx512f_us_truncatev8div8si2 */ |
| 72057 | case 2743: /* *avx512f_truncatev8div8si2 */ |
| 72058 | case 2742: /* *avx512f_ss_truncatev8div8si2 */ |
| 72059 | case 2741: /* *avx512f_us_truncatev16siv16hi2 */ |
| 72060 | case 2740: /* *avx512f_truncatev16siv16hi2 */ |
| 72061 | case 2739: /* *avx512f_ss_truncatev16siv16hi2 */ |
| 72062 | case 2738: /* *avx512f_us_truncatev16siv16qi2 */ |
| 72063 | case 2737: /* *avx512f_truncatev16siv16qi2 */ |
| 72064 | case 2736: /* *avx512f_ss_truncatev16siv16qi2 */ |
| 72065 | case 1292: /* avx512vl_storev8hi_mask */ |
| 72066 | case 1291: /* avx512vl_storev16hi_mask */ |
| 72067 | case 1289: /* avx512vl_storev32qi_mask */ |
| 72068 | case 1288: /* avx512vl_storev16qi_mask */ |
| 72069 | case 1286: /* avx512vl_storev2df_mask */ |
| 72070 | case 1285: /* avx512vl_storev4df_mask */ |
| 72071 | case 1283: /* avx512vl_storev4sf_mask */ |
| 72072 | case 1282: /* avx512vl_storev8sf_mask */ |
| 72073 | case 1280: /* avx512vl_storev2di_mask */ |
| 72074 | case 1279: /* avx512vl_storev4di_mask */ |
| 72075 | case 1277: /* avx512vl_storev4si_mask */ |
| 72076 | case 1276: /* avx512vl_storev8si_mask */ |
| 72077 | case 1217: /* *mmx_femms */ |
| 72078 | case 1216: /* *mmx_emms */ |
| 72079 | case 1123: /* mmx_rsqit1v2sf3 */ |
| 72080 | case 1122: /* mmx_rsqrtv2sf2 */ |
| 72081 | case 1121: /* mmx_rcpit2v2sf3 */ |
| 72082 | case 1120: /* mmx_rcpit1v2sf3 */ |
| 72083 | case 1119: /* mmx_rcpv2sf2 */ |
| 72084 | case 1096: /* *bnd64_cn */ |
| 72085 | case 1095: /* *bnd64_cu */ |
| 72086 | case 1094: /* *bnd64_cl */ |
| 72087 | case 1093: /* *bnd32_cn */ |
| 72088 | case 1092: /* *bnd32_cu */ |
| 72089 | case 1091: /* *bnd32_cl */ |
| 72090 | case 1088: /* *bnd64_mk */ |
| 72091 | case 1087: /* *bnd32_mk */ |
| 72092 | case 1060: /* *lwp_lwpinsdi3_1 */ |
| 72093 | case 1059: /* *lwp_lwpinssi3_1 */ |
| 72094 | case 1058: /* *lwp_lwpvaldi3_1 */ |
| 72095 | case 1057: /* *lwp_lwpvalsi3_1 */ |
| 72096 | case 1056: /* lwp_slwpcbdi */ |
| 72097 | case 1055: /* lwp_slwpcbsi */ |
| 72098 | case 1054: /* *lwp_llwpcbdi1 */ |
| 72099 | case 1053: /* *lwp_llwpcbsi1 */ |
| 72100 | case 1007: /* *prefetch_3dnow */ |
| 72101 | case 974: /* *x86_movdicc_0_m1_neg */ |
| 72102 | case 973: /* *x86_movsicc_0_m1_neg */ |
| 72103 | case 972: /* *x86_movdicc_0_m1_se */ |
| 72104 | case 971: /* *x86_movsicc_0_m1_se */ |
| 72105 | case 970: /* *x86_movdicc_0_m1 */ |
| 72106 | case 969: /* *x86_movsicc_0_m1 */ |
| 72107 | case 810: /* *tls_dynamic_gnu2_call_64 */ |
| 72108 | case 809: /* *tls_dynamic_gnu2_lea_64 */ |
| 72109 | case 807: /* *tls_dynamic_gnu2_call_32 */ |
| 72110 | case 806: /* *tls_dynamic_gnu2_lea_32 */ |
| 72111 | case 704: /* leave_rex64 */ |
| 72112 | case 703: /* leave */ |
| 72113 | case 700: /* set_rip_rex64 */ |
| 72114 | case 699: /* set_got_rex64 */ |
| 72115 | case 685: /* *sibcall_value_pop_memory */ |
| 72116 | case 684: /* *sibcall_value_pop */ |
| 72117 | case 683: /* *call_value_pop */ |
| 72118 | case 682: /* *sibcall_value_memory */ |
| 72119 | case 681: /* *sibcall_value_memory */ |
| 72120 | case 680: /* *sibcall_value */ |
| 72121 | case 679: /* *sibcall_value */ |
| 72122 | case 678: /* *sibcall_value_GOT_32 */ |
| 72123 | case 677: /* *call_value_got_x32 */ |
| 72124 | case 676: /* *call_value */ |
| 72125 | case 675: /* *call_value */ |
| 72126 | case 674: /* *sibcall_pop_memory */ |
| 72127 | case 673: /* *sibcall_pop */ |
| 72128 | case 672: /* *call_pop */ |
| 72129 | case 671: /* *sibcall_memory */ |
| 72130 | case 670: /* *sibcall_memory */ |
| 72131 | case 669: /* *sibcall */ |
| 72132 | case 668: /* *sibcall */ |
| 72133 | case 667: /* *sibcall_GOT_32 */ |
| 72134 | case 666: /* *call_got_x32 */ |
| 72135 | case 665: /* *call */ |
| 72136 | case 664: /* *call */ |
| 72137 | case 495: /* *negextenddfxf2 */ |
| 72138 | case 494: /* *absextenddfxf2 */ |
| 72139 | case 493: /* *negextendsfxf2 */ |
| 72140 | case 492: /* *absextendsfxf2 */ |
| 72141 | case 491: /* *negextendsfdf2 */ |
| 72142 | case 490: /* *absextendsfdf2 */ |
| 72143 | case 489: /* *negxf2_1 */ |
| 72144 | case 488: /* *absxf2_1 */ |
| 72145 | case 487: /* *negdf2_1 */ |
| 72146 | case 486: /* *absdf2_1 */ |
| 72147 | case 485: /* *negsf2_1 */ |
| 72148 | case 484: /* *abssf2_1 */ |
| 72149 | case 268: /* *leadi_general_4 */ |
| 72150 | case 267: /* *leadi_general_4 */ |
| 72151 | case 266: /* *leasi_general_4 */ |
| 72152 | case 265: /* *leasi_general_4 */ |
| 72153 | case 264: /* *leahi_general_4 */ |
| 72154 | case 263: /* *leahi_general_4 */ |
| 72155 | case 262: /* *leaqi_general_4 */ |
| 72156 | case 261: /* *leaqi_general_4 */ |
| 72157 | case 260: /* *leahi_general_3b */ |
| 72158 | case 259: /* *leaqi_general_3b */ |
| 72159 | case 258: /* *leahi_general_3 */ |
| 72160 | case 257: /* *leaqi_general_3 */ |
| 72161 | case 256: /* *leahi_general_2b */ |
| 72162 | case 255: /* *leaqi_general_2b */ |
| 72163 | case 254: /* *leahi_general_2 */ |
| 72164 | case 253: /* *leaqi_general_2 */ |
| 72165 | case 252: /* *leahi_general_1 */ |
| 72166 | case 251: /* *leaqi_general_1 */ |
| 72167 | case 214: /* *leadi */ |
| 72168 | case 213: /* *leasi */ |
| 72169 | case 88: /* *movabsdi_1 */ |
| 72170 | case 87: /* *movabssi_1 */ |
| 72171 | case 86: /* *movabshi_1 */ |
| 72172 | case 85: /* *movabsqi_1 */ |
| 72173 | return 1; |
| 72174 | |
| 72175 | case 3634: /* *vec_extractv4si */ |
| 72176 | case 78: /* *movxi_internal_avx512f */ |
| 72177 | extract_constrain_insn_cached (insn); |
| 72178 | if ((((1 << which_alternative) & 0x3)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 72179 | { |
| 72180 | return 1; |
| 72181 | } |
| 72182 | else if ((((1 << which_alternative) & 0x3)) && (! ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE))) |
| 72183 | { |
| 72184 | return 8; |
| 72185 | } |
| 72186 | else |
| 72187 | { |
| 72188 | return 0; |
| 72189 | } |
| 72190 | |
| 72191 | case 1352: /* kunpckhi */ |
| 72192 | case 1351: /* kortestdi */ |
| 72193 | case 1350: /* kortestsi */ |
| 72194 | case 1349: /* kortesthi */ |
| 72195 | case 1348: /* kortestqi */ |
| 72196 | case 1347: /* ktestdi */ |
| 72197 | case 1346: /* ktestsi */ |
| 72198 | case 1345: /* ktesthi */ |
| 72199 | case 1344: /* ktestqi */ |
| 72200 | case 1343: /* klshiftrtdi */ |
| 72201 | case 1342: /* kashiftdi */ |
| 72202 | case 1341: /* klshiftrtsi */ |
| 72203 | case 1340: /* kashiftsi */ |
| 72204 | case 1339: /* klshiftrthi */ |
| 72205 | case 1338: /* kashifthi */ |
| 72206 | case 1337: /* klshiftrtqi */ |
| 72207 | case 1336: /* kashiftqi */ |
| 72208 | case 1335: /* kadddi */ |
| 72209 | case 1334: /* kaddsi */ |
| 72210 | case 1333: /* kaddhi */ |
| 72211 | case 1332: /* kaddqi */ |
| 72212 | case 1331: /* knotdi */ |
| 72213 | case 1330: /* knotsi */ |
| 72214 | case 1329: /* knothi */ |
| 72215 | case 1328: /* knotqi */ |
| 72216 | case 1327: /* kxnordi */ |
| 72217 | case 1326: /* kxnorsi */ |
| 72218 | case 1325: /* kxnorhi */ |
| 72219 | case 1324: /* kxnorqi */ |
| 72220 | case 1323: /* kandndi */ |
| 72221 | case 1322: /* kandnsi */ |
| 72222 | case 1321: /* kandnhi */ |
| 72223 | case 1320: /* kandnqi */ |
| 72224 | case 1319: /* kxordi */ |
| 72225 | case 1318: /* kiordi */ |
| 72226 | case 1317: /* kanddi */ |
| 72227 | case 1316: /* kxorsi */ |
| 72228 | case 1315: /* kiorsi */ |
| 72229 | case 1314: /* kandsi */ |
| 72230 | case 1313: /* kxorhi */ |
| 72231 | case 1312: /* kiorhi */ |
| 72232 | case 1311: /* kandhi */ |
| 72233 | case 1310: /* kxorqi */ |
| 72234 | case 1309: /* kiorqi */ |
| 72235 | case 1308: /* kandqi */ |
| 72236 | case 1090: /* *movbnd64_internal_mpx */ |
| 72237 | case 1089: /* *movbnd32_internal_mpx */ |
| 72238 | case 1000: /* probe_stack_di */ |
| 72239 | case 999: /* probe_stack_si */ |
| 72240 | case 783: /* *bswapdi2 */ |
| 72241 | case 782: /* *bswapsi2 */ |
| 72242 | case 779: /* popcounthi2 */ |
| 72243 | case 777: /* *popcountdi2_falsedep */ |
| 72244 | case 776: /* *popcountsi2_falsedep */ |
| 72245 | case 775: /* popcountdi2 */ |
| 72246 | case 774: /* popcountsi2 */ |
| 72247 | case 773: /* *tbm_tzmsk_di */ |
| 72248 | case 772: /* *tbm_tzmsk_si */ |
| 72249 | case 771: /* *tbm_t1mskc_di */ |
| 72250 | case 770: /* *tbm_t1mskc_si */ |
| 72251 | case 769: /* *tbm_blsic_di */ |
| 72252 | case 768: /* *tbm_blsic_si */ |
| 72253 | case 767: /* *tbm_blsfill_di */ |
| 72254 | case 766: /* *tbm_blsfill_si */ |
| 72255 | case 765: /* *tbm_blcs_di */ |
| 72256 | case 764: /* *tbm_blcs_si */ |
| 72257 | case 763: /* *tbm_blcmsk_di */ |
| 72258 | case 762: /* *tbm_blcmsk_si */ |
| 72259 | case 761: /* *tbm_blcic_di */ |
| 72260 | case 760: /* *tbm_blcic_si */ |
| 72261 | case 759: /* *tbm_blci_di */ |
| 72262 | case 758: /* *tbm_blci_si */ |
| 72263 | case 757: /* *tbm_blcfill_di */ |
| 72264 | case 756: /* *tbm_blcfill_si */ |
| 72265 | case 755: /* tbm_bextri_di */ |
| 72266 | case 754: /* tbm_bextri_si */ |
| 72267 | case 753: /* bmi2_pext_di3 */ |
| 72268 | case 752: /* bmi2_pext_si3 */ |
| 72269 | case 751: /* bmi2_pdep_di3 */ |
| 72270 | case 750: /* bmi2_pdep_si3 */ |
| 72271 | case 749: /* *bmi2_bzhi_di3_1_ccz */ |
| 72272 | case 748: /* *bmi2_bzhi_si3_1_ccz */ |
| 72273 | case 747: /* *bmi2_bzhi_di3_1 */ |
| 72274 | case 746: /* *bmi2_bzhi_si3_1 */ |
| 72275 | case 745: /* *bmi2_bzhi_di3 */ |
| 72276 | case 744: /* *bmi2_bzhi_si3 */ |
| 72277 | case 743: /* *bmi_blsr_di */ |
| 72278 | case 742: /* *bmi_blsr_si */ |
| 72279 | case 741: /* *bmi_blsmsk_di */ |
| 72280 | case 740: /* *bmi_blsmsk_si */ |
| 72281 | case 739: /* *bmi_blsi_di */ |
| 72282 | case 738: /* *bmi_blsi_si */ |
| 72283 | case 737: /* *bmi_bextr_di_ccz */ |
| 72284 | case 736: /* *bmi_bextr_si_ccz */ |
| 72285 | case 735: /* bmi_bextr_di */ |
| 72286 | case 734: /* bmi_bextr_si */ |
| 72287 | case 733: /* lzcnt_hi */ |
| 72288 | case 732: /* tzcnt_hi */ |
| 72289 | case 731: /* *lzcnt_di_falsedep */ |
| 72290 | case 730: /* *tzcnt_di_falsedep */ |
| 72291 | case 729: /* *lzcnt_si_falsedep */ |
| 72292 | case 728: /* *tzcnt_si_falsedep */ |
| 72293 | case 727: /* lzcnt_di */ |
| 72294 | case 726: /* tzcnt_di */ |
| 72295 | case 725: /* lzcnt_si */ |
| 72296 | case 724: /* tzcnt_si */ |
| 72297 | case 723: /* *clzdi2_lzcnt_falsedep */ |
| 72298 | case 722: /* *clzsi2_lzcnt_falsedep */ |
| 72299 | case 721: /* clzdi2_lzcnt */ |
| 72300 | case 720: /* clzsi2_lzcnt */ |
| 72301 | case 716: /* *ctzdi2_falsedep */ |
| 72302 | case 715: /* *ctzsi2_falsedep */ |
| 72303 | case 714: /* ctzdi2 */ |
| 72304 | case 713: /* ctzsi2 */ |
| 72305 | case 710: /* *tzcntdi_1_falsedep */ |
| 72306 | case 709: /* *tzcntsi_1_falsedep */ |
| 72307 | case 708: /* *tzcntdi_1 */ |
| 72308 | case 707: /* *tzcntsi_1 */ |
| 72309 | case 613: /* *btdi */ |
| 72310 | case 612: /* *btsi */ |
| 72311 | case 600: /* *bmi2_rorxsi3_1_zext */ |
| 72312 | case 595: /* *bmi2_rorxdi3_1 */ |
| 72313 | case 594: /* *bmi2_rorxsi3_1 */ |
| 72314 | case 559: /* *bmi2_ashrsi3_1_zext */ |
| 72315 | case 558: /* *bmi2_lshrsi3_1_zext */ |
| 72316 | case 553: /* *bmi2_ashrdi3_1 */ |
| 72317 | case 552: /* *bmi2_lshrdi3_1 */ |
| 72318 | case 551: /* *bmi2_ashrsi3_1 */ |
| 72319 | case 550: /* *bmi2_lshrsi3_1 */ |
| 72320 | case 523: /* *bmi2_ashlsi3_1_zext */ |
| 72321 | case 520: /* *bmi2_ashldi3_1 */ |
| 72322 | case 519: /* *bmi2_ashlsi3_1 */ |
| 72323 | case 512: /* *one_cmplsi2_2_zext */ |
| 72324 | case 511: /* *one_cmpldi2_2 */ |
| 72325 | case 510: /* *one_cmplsi2_2 */ |
| 72326 | case 509: /* *one_cmplhi2_2 */ |
| 72327 | case 508: /* *one_cmplqi2_2 */ |
| 72328 | case 450: /* *xorqi_2_slp */ |
| 72329 | case 449: /* *iorqi_2_slp */ |
| 72330 | case 436: /* *xorqi_1_slp */ |
| 72331 | case 435: /* *iorqi_1_slp */ |
| 72332 | case 420: /* *andn_di_ccno */ |
| 72333 | case 419: /* *andn_si_ccno */ |
| 72334 | case 418: /* *andnhi_1 */ |
| 72335 | case 417: /* *andnqi_1 */ |
| 72336 | case 416: /* *andndi_1 */ |
| 72337 | case 415: /* *andnsi_1 */ |
| 72338 | case 410: /* *andqi_2_slp */ |
| 72339 | case 403: /* *andqi_1_slp */ |
| 72340 | case 354: /* *bmi2_umulditi3_1 */ |
| 72341 | case 353: /* *bmi2_umulsidi3_1 */ |
| 72342 | case 276: /* *subqi_1_slp */ |
| 72343 | case 138: /* zero_extendqihi2_and */ |
| 72344 | case 135: /* zero_extendhisi2_and */ |
| 72345 | case 134: /* zero_extendqisi2_and */ |
| 72346 | case 100: /* *movstricthi_xor */ |
| 72347 | case 99: /* *movstrictqi_xor */ |
| 72348 | case 77: /* *movdi_or */ |
| 72349 | case 76: /* *movsi_or */ |
| 72350 | case 75: /* *movdi_xor */ |
| 72351 | case 74: /* *movsi_xor */ |
| 72352 | if (get_attr_memory (insn) == MEMORY_NONE) |
| 72353 | { |
| 72354 | return 1; |
| 72355 | } |
| 72356 | else |
| 72357 | { |
| 72358 | return 0; |
| 72359 | } |
| 72360 | |
| 72361 | case 73: /* *popfldi1 */ |
| 72362 | case 72: /* *popflsi1 */ |
| 72363 | case 69: /* *popdi1_epilogue */ |
| 72364 | case 68: /* *popsi1_epilogue */ |
| 72365 | case 67: /* *popdi1 */ |
| 72366 | case 66: /* *popsi1 */ |
| 72367 | if (((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD) || (cached_memory == MEMORY_BOTH)) |
| 72368 | { |
| 72369 | return 4; |
| 72370 | } |
| 72371 | else |
| 72372 | { |
| 72373 | return 0; |
| 72374 | } |
| 72375 | |
| 72376 | case 71: /* *pushfldi2 */ |
| 72377 | case 70: /* *pushflsi2 */ |
| 72378 | case 65: /* *pushdi2_prologue */ |
| 72379 | case 64: /* *pushsi2_prologue */ |
| 72380 | case 63: /* *pushhi2 */ |
| 72381 | case 62: /* *pushqi2 */ |
| 72382 | case 61: /* *pushsi2_rex64 */ |
| 72383 | case 60: /* *pushhi2_rex64 */ |
| 72384 | case 59: /* *pushqi2_rex64 */ |
| 72385 | case 58: /* *pushsi2 */ |
| 72386 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_STORE) |
| 72387 | { |
| 72388 | return 1; |
| 72389 | } |
| 72390 | else if (cached_memory == MEMORY_BOTH) |
| 72391 | { |
| 72392 | return 5; |
| 72393 | } |
| 72394 | else |
| 72395 | { |
| 72396 | return 0; |
| 72397 | } |
| 72398 | |
| 72399 | case 57: /* *pushdi2_rex64 */ |
| 72400 | extract_constrain_insn_cached (insn); |
| 72401 | if ((which_alternative == 0) && ((cached_memory = get_attr_memory (insn)) == MEMORY_STORE)) |
| 72402 | { |
| 72403 | return 1; |
| 72404 | } |
| 72405 | else if ((which_alternative == 0) && ((cached_memory = get_attr_memory (insn)) == MEMORY_BOTH)) |
| 72406 | { |
| 72407 | return 5; |
| 72408 | } |
| 72409 | else if (which_alternative != 0) |
| 72410 | { |
| 72411 | return 6; |
| 72412 | } |
| 72413 | else |
| 72414 | { |
| 72415 | return 0; |
| 72416 | } |
| 72417 | |
| 72418 | case 54: /* *cmpiuxf_i387 */ |
| 72419 | case 53: /* *cmpixf_i387 */ |
| 72420 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) |
| 72421 | { |
| 72422 | return 2; |
| 72423 | } |
| 72424 | else |
| 72425 | { |
| 72426 | return 0; |
| 72427 | } |
| 72428 | |
| 72429 | case 4984: /* atomic_bit_test_and_resetdi_1 */ |
| 72430 | case 4983: /* atomic_bit_test_and_resetsi_1 */ |
| 72431 | case 4982: /* atomic_bit_test_and_resethi_1 */ |
| 72432 | case 4981: /* atomic_bit_test_and_complementdi_1 */ |
| 72433 | case 4980: /* atomic_bit_test_and_complementsi_1 */ |
| 72434 | case 4979: /* atomic_bit_test_and_complementhi_1 */ |
| 72435 | case 4978: /* atomic_bit_test_and_setdi_1 */ |
| 72436 | case 4977: /* atomic_bit_test_and_setsi_1 */ |
| 72437 | case 4976: /* atomic_bit_test_and_sethi_1 */ |
| 72438 | case 4975: /* atomic_xordi */ |
| 72439 | case 4974: /* atomic_ordi */ |
| 72440 | case 4973: /* atomic_anddi */ |
| 72441 | case 4972: /* atomic_xorsi */ |
| 72442 | case 4971: /* atomic_orsi */ |
| 72443 | case 4970: /* atomic_andsi */ |
| 72444 | case 4969: /* atomic_xorhi */ |
| 72445 | case 4968: /* atomic_orhi */ |
| 72446 | case 4967: /* atomic_andhi */ |
| 72447 | case 4966: /* atomic_xorqi */ |
| 72448 | case 4965: /* atomic_orqi */ |
| 72449 | case 4964: /* atomic_andqi */ |
| 72450 | case 4963: /* atomic_subdi */ |
| 72451 | case 4962: /* atomic_subsi */ |
| 72452 | case 4961: /* atomic_subhi */ |
| 72453 | case 4960: /* atomic_subqi */ |
| 72454 | case 4959: /* atomic_adddi */ |
| 72455 | case 4958: /* atomic_addsi */ |
| 72456 | case 4957: /* atomic_addhi */ |
| 72457 | case 4956: /* atomic_addqi */ |
| 72458 | case 4955: /* atomic_exchangedi */ |
| 72459 | case 4954: /* atomic_exchangesi */ |
| 72460 | case 4953: /* atomic_exchangehi */ |
| 72461 | case 4952: /* atomic_exchangeqi */ |
| 72462 | case 4951: /* *atomic_fetch_add_cmpdi */ |
| 72463 | case 4950: /* *atomic_fetch_add_cmpsi */ |
| 72464 | case 4949: /* *atomic_fetch_add_cmphi */ |
| 72465 | case 4948: /* *atomic_fetch_add_cmpqi */ |
| 72466 | case 4947: /* atomic_fetch_adddi */ |
| 72467 | case 4946: /* atomic_fetch_addsi */ |
| 72468 | case 4945: /* atomic_fetch_addhi */ |
| 72469 | case 4944: /* atomic_fetch_addqi */ |
| 72470 | case 4943: /* atomic_compare_and_swapdi_1 */ |
| 72471 | case 4942: /* atomic_compare_and_swapsi_1 */ |
| 72472 | case 4941: /* atomic_compare_and_swaphi_1 */ |
| 72473 | case 4940: /* atomic_compare_and_swapqi_1 */ |
| 72474 | case 4939: /* atomic_compare_and_swapti_doubleword */ |
| 72475 | case 4938: /* atomic_compare_and_swapdi_doubleword */ |
| 72476 | case 4933: /* atomic_storedi_fpu */ |
| 72477 | case 4932: /* atomic_storedi_1 */ |
| 72478 | case 4931: /* atomic_storesi_1 */ |
| 72479 | case 4930: /* atomic_storehi_1 */ |
| 72480 | case 4929: /* atomic_storeqi_1 */ |
| 72481 | case 4928: /* atomic_loaddi_fpu */ |
| 72482 | case 4927: /* mfence_nosse */ |
| 72483 | case 4923: /* vpopcountv8di_mask */ |
| 72484 | case 4922: /* vpopcountv8di */ |
| 72485 | case 4921: /* vpopcountv16si_mask */ |
| 72486 | case 4920: /* vpopcountv16si */ |
| 72487 | case 4901: /* *movv64si_internal */ |
| 72488 | case 4900: /* *movv64sf_internal */ |
| 72489 | case 4875: /* avx512f_pd512_256pd */ |
| 72490 | case 4874: /* avx512f_ps512_256ps */ |
| 72491 | case 4873: /* avx512f_si512_256si */ |
| 72492 | case 4872: /* avx512f_pd512_pd */ |
| 72493 | case 4871: /* avx512f_ps512_ps */ |
| 72494 | case 4870: /* avx512f_si512_si */ |
| 72495 | case 4832: /* avx512f_vgetmantv2df_round */ |
| 72496 | case 4831: /* avx512f_vgetmantv2df */ |
| 72497 | case 4830: /* avx512f_vgetmantv4sf_round */ |
| 72498 | case 4829: /* avx512f_vgetmantv4sf */ |
| 72499 | case 4828: /* avx512vl_getmantv2df_mask_round */ |
| 72500 | case 4827: /* avx512vl_getmantv2df_mask */ |
| 72501 | case 4826: /* avx512vl_getmantv2df_round */ |
| 72502 | case 4825: /* avx512vl_getmantv2df */ |
| 72503 | case 4824: /* avx512vl_getmantv4df_mask_round */ |
| 72504 | case 4823: /* avx512vl_getmantv4df_mask */ |
| 72505 | case 4822: /* avx512vl_getmantv4df_round */ |
| 72506 | case 4821: /* avx512vl_getmantv4df */ |
| 72507 | case 4820: /* avx512f_getmantv8df_mask_round */ |
| 72508 | case 4819: /* avx512f_getmantv8df_mask */ |
| 72509 | case 4818: /* avx512f_getmantv8df_round */ |
| 72510 | case 4817: /* avx512f_getmantv8df */ |
| 72511 | case 4816: /* avx512vl_getmantv4sf_mask_round */ |
| 72512 | case 4815: /* avx512vl_getmantv4sf_mask */ |
| 72513 | case 4814: /* avx512vl_getmantv4sf_round */ |
| 72514 | case 4813: /* avx512vl_getmantv4sf */ |
| 72515 | case 4812: /* avx512vl_getmantv8sf_mask_round */ |
| 72516 | case 4811: /* avx512vl_getmantv8sf_mask */ |
| 72517 | case 4810: /* avx512vl_getmantv8sf_round */ |
| 72518 | case 4809: /* avx512vl_getmantv8sf */ |
| 72519 | case 4808: /* avx512f_getmantv16sf_mask_round */ |
| 72520 | case 4807: /* avx512f_getmantv16sf_mask */ |
| 72521 | case 4806: /* avx512f_getmantv16sf_round */ |
| 72522 | case 4805: /* avx512f_getmantv16sf */ |
| 72523 | case 4435: /* avx_pd256_pd */ |
| 72524 | case 4434: /* avx_ps256_ps */ |
| 72525 | case 4433: /* avx_si256_si */ |
| 72526 | case 4252: /* *avx_vperm_broadcast_v4df */ |
| 72527 | case 4251: /* *avx_vperm_broadcast_v8sf */ |
| 72528 | case 3788: /* sse4_1_mpsadbw */ |
| 72529 | case 3787: /* avx2_mpsadbw */ |
| 72530 | case 3783: /* sse4_1_dppd */ |
| 72531 | case 3782: /* avx_dppd256 */ |
| 72532 | case 3781: /* sse4_1_dpps */ |
| 72533 | case 3780: /* avx_dpps256 */ |
| 72534 | case 3677: /* sse3_monitor_di */ |
| 72535 | case 3676: /* sse3_monitor_si */ |
| 72536 | case 3675: /* sse3_mwait */ |
| 72537 | case 3671: /* *sse2_maskmovdqu */ |
| 72538 | case 3670: /* *sse2_maskmovdqu */ |
| 72539 | case 3637: /* *vec_extractv4si_zext_mem */ |
| 72540 | case 3636: /* *vec_extractv4si_mem */ |
| 72541 | case 3633: /* *vec_extractv4si_0_zext */ |
| 72542 | case 3632: /* *vec_extractv4si_0_zext_sse4 */ |
| 72543 | case 3631: /* *vec_extractv2di_0_sse */ |
| 72544 | case 3630: /* *vec_extractv2di_0 */ |
| 72545 | case 3629: /* *vec_extractv4si_0 */ |
| 72546 | case 3628: /* *vec_extractv8hi_mem */ |
| 72547 | case 3627: /* *vec_extractv16qi_mem */ |
| 72548 | case 3503: /* avx512vl_testnmv2di3_mask */ |
| 72549 | case 3502: /* avx512vl_testnmv2di3 */ |
| 72550 | case 3501: /* avx512vl_testnmv4di3_mask */ |
| 72551 | case 3500: /* avx512vl_testnmv4di3 */ |
| 72552 | case 3499: /* avx512f_testnmv8di3_mask */ |
| 72553 | case 3498: /* avx512f_testnmv8di3 */ |
| 72554 | case 3497: /* avx512vl_testnmv4si3_mask */ |
| 72555 | case 3496: /* avx512vl_testnmv4si3 */ |
| 72556 | case 3495: /* avx512vl_testnmv8si3_mask */ |
| 72557 | case 3494: /* avx512vl_testnmv8si3 */ |
| 72558 | case 3493: /* avx512f_testnmv16si3_mask */ |
| 72559 | case 3492: /* avx512f_testnmv16si3 */ |
| 72560 | case 3491: /* avx512vl_testnmv8hi3_mask */ |
| 72561 | case 3490: /* avx512vl_testnmv8hi3 */ |
| 72562 | case 3489: /* avx512vl_testnmv16hi3_mask */ |
| 72563 | case 3488: /* avx512vl_testnmv16hi3 */ |
| 72564 | case 3487: /* avx512bw_testnmv32hi3_mask */ |
| 72565 | case 3486: /* avx512bw_testnmv32hi3 */ |
| 72566 | case 3485: /* avx512vl_testnmv32qi3_mask */ |
| 72567 | case 3484: /* avx512vl_testnmv32qi3 */ |
| 72568 | case 3483: /* avx512vl_testnmv16qi3_mask */ |
| 72569 | case 3482: /* avx512vl_testnmv16qi3 */ |
| 72570 | case 3481: /* avx512bw_testnmv64qi3_mask */ |
| 72571 | case 3480: /* avx512bw_testnmv64qi3 */ |
| 72572 | case 3479: /* avx512vl_testmv2di3_mask */ |
| 72573 | case 3478: /* avx512vl_testmv2di3 */ |
| 72574 | case 3477: /* avx512vl_testmv4di3_mask */ |
| 72575 | case 3476: /* avx512vl_testmv4di3 */ |
| 72576 | case 3475: /* avx512f_testmv8di3_mask */ |
| 72577 | case 3474: /* avx512f_testmv8di3 */ |
| 72578 | case 3473: /* avx512vl_testmv4si3_mask */ |
| 72579 | case 3472: /* avx512vl_testmv4si3 */ |
| 72580 | case 3471: /* avx512vl_testmv8si3_mask */ |
| 72581 | case 3470: /* avx512vl_testmv8si3 */ |
| 72582 | case 3469: /* avx512f_testmv16si3_mask */ |
| 72583 | case 3468: /* avx512f_testmv16si3 */ |
| 72584 | case 3467: /* avx512vl_testmv8hi3_mask */ |
| 72585 | case 3466: /* avx512vl_testmv8hi3 */ |
| 72586 | case 3465: /* avx512vl_testmv16hi3_mask */ |
| 72587 | case 3464: /* avx512vl_testmv16hi3 */ |
| 72588 | case 3463: /* avx512bw_testmv32hi3_mask */ |
| 72589 | case 3462: /* avx512bw_testmv32hi3 */ |
| 72590 | case 3461: /* avx512vl_testmv32qi3_mask */ |
| 72591 | case 3460: /* avx512vl_testmv32qi3 */ |
| 72592 | case 3459: /* avx512vl_testmv16qi3_mask */ |
| 72593 | case 3458: /* avx512vl_testmv16qi3 */ |
| 72594 | case 3457: /* avx512bw_testmv64qi3_mask */ |
| 72595 | case 3456: /* avx512bw_testmv64qi3 */ |
| 72596 | case 3191: /* avx512vl_rorv2di_mask */ |
| 72597 | case 3190: /* avx512vl_rorv2di */ |
| 72598 | case 3189: /* avx512vl_rolv2di_mask */ |
| 72599 | case 3188: /* avx512vl_rolv2di */ |
| 72600 | case 3187: /* avx512vl_rorv4di_mask */ |
| 72601 | case 3186: /* avx512vl_rorv4di */ |
| 72602 | case 3185: /* avx512vl_rolv4di_mask */ |
| 72603 | case 3184: /* avx512vl_rolv4di */ |
| 72604 | case 3183: /* avx512f_rorv8di_mask */ |
| 72605 | case 3182: /* avx512f_rorv8di */ |
| 72606 | case 3181: /* avx512f_rolv8di_mask */ |
| 72607 | case 3180: /* avx512f_rolv8di */ |
| 72608 | case 3179: /* avx512vl_rorv4si_mask */ |
| 72609 | case 3178: /* avx512vl_rorv4si */ |
| 72610 | case 3177: /* avx512vl_rolv4si_mask */ |
| 72611 | case 3176: /* avx512vl_rolv4si */ |
| 72612 | case 3175: /* avx512vl_rorv8si_mask */ |
| 72613 | case 3174: /* avx512vl_rorv8si */ |
| 72614 | case 3173: /* avx512vl_rolv8si_mask */ |
| 72615 | case 3172: /* avx512vl_rolv8si */ |
| 72616 | case 3171: /* avx512f_rorv16si_mask */ |
| 72617 | case 3170: /* avx512f_rorv16si */ |
| 72618 | case 3169: /* avx512f_rolv16si_mask */ |
| 72619 | case 3168: /* avx512f_rolv16si */ |
| 72620 | case 3167: /* avx512vl_rorvv2di_mask */ |
| 72621 | case 3166: /* avx512vl_rorvv2di */ |
| 72622 | case 3165: /* avx512vl_rolvv2di_mask */ |
| 72623 | case 3164: /* avx512vl_rolvv2di */ |
| 72624 | case 3163: /* avx512vl_rorvv4di_mask */ |
| 72625 | case 3162: /* avx512vl_rorvv4di */ |
| 72626 | case 3161: /* avx512vl_rolvv4di_mask */ |
| 72627 | case 3160: /* avx512vl_rolvv4di */ |
| 72628 | case 3159: /* avx512f_rorvv8di_mask */ |
| 72629 | case 3158: /* avx512f_rorvv8di */ |
| 72630 | case 3157: /* avx512f_rolvv8di_mask */ |
| 72631 | case 3156: /* avx512f_rolvv8di */ |
| 72632 | case 3155: /* avx512vl_rorvv4si_mask */ |
| 72633 | case 3154: /* avx512vl_rorvv4si */ |
| 72634 | case 3153: /* avx512vl_rolvv4si_mask */ |
| 72635 | case 3152: /* avx512vl_rolvv4si */ |
| 72636 | case 3151: /* avx512vl_rorvv8si_mask */ |
| 72637 | case 3150: /* avx512vl_rorvv8si */ |
| 72638 | case 3149: /* avx512vl_rolvv8si_mask */ |
| 72639 | case 3148: /* avx512vl_rolvv8si */ |
| 72640 | case 3147: /* avx512f_rorvv16si_mask */ |
| 72641 | case 3146: /* avx512f_rorvv16si */ |
| 72642 | case 3145: /* avx512f_rolvv16si_mask */ |
| 72643 | case 3144: /* avx512f_rolvv16si */ |
| 72644 | case 2704: /* avx512f_rndscalev2df_round */ |
| 72645 | case 2703: /* avx512f_rndscalev2df */ |
| 72646 | case 2702: /* avx512f_rndscalev4sf_round */ |
| 72647 | case 2701: /* avx512f_rndscalev4sf */ |
| 72648 | case 2700: /* avx512vl_rndscalev2df_mask_round */ |
| 72649 | case 2699: /* avx512vl_rndscalev2df_mask */ |
| 72650 | case 2698: /* avx512vl_rndscalev2df_round */ |
| 72651 | case 2697: /* avx512vl_rndscalev2df */ |
| 72652 | case 2696: /* avx512vl_rndscalev4df_mask_round */ |
| 72653 | case 2695: /* avx512vl_rndscalev4df_mask */ |
| 72654 | case 2694: /* avx512vl_rndscalev4df_round */ |
| 72655 | case 2693: /* avx512vl_rndscalev4df */ |
| 72656 | case 2692: /* avx512f_rndscalev8df_mask_round */ |
| 72657 | case 2691: /* avx512f_rndscalev8df_mask */ |
| 72658 | case 2690: /* avx512f_rndscalev8df_round */ |
| 72659 | case 2689: /* avx512f_rndscalev8df */ |
| 72660 | case 2688: /* avx512vl_rndscalev4sf_mask_round */ |
| 72661 | case 2687: /* avx512vl_rndscalev4sf_mask */ |
| 72662 | case 2686: /* avx512vl_rndscalev4sf_round */ |
| 72663 | case 2685: /* avx512vl_rndscalev4sf */ |
| 72664 | case 2684: /* avx512vl_rndscalev8sf_mask_round */ |
| 72665 | case 2683: /* avx512vl_rndscalev8sf_mask */ |
| 72666 | case 2682: /* avx512vl_rndscalev8sf_round */ |
| 72667 | case 2681: /* avx512vl_rndscalev8sf */ |
| 72668 | case 2680: /* avx512f_rndscalev16sf_mask_round */ |
| 72669 | case 2679: /* avx512f_rndscalev16sf_mask */ |
| 72670 | case 2678: /* avx512f_rndscalev16sf_round */ |
| 72671 | case 2677: /* avx512f_rndscalev16sf */ |
| 72672 | case 2676: /* avx512f_sfixupimmv2df_mask_round */ |
| 72673 | case 2675: /* avx512f_sfixupimmv2df_mask */ |
| 72674 | case 2674: /* avx512f_sfixupimmv4sf_mask_round */ |
| 72675 | case 2673: /* avx512f_sfixupimmv4sf_mask */ |
| 72676 | case 2672: /* avx512f_sfixupimmv2df_maskz_1_round */ |
| 72677 | case 2671: /* avx512f_sfixupimmv2df_maskz_1 */ |
| 72678 | case 2670: /* avx512f_sfixupimmv2df_round */ |
| 72679 | case 2669: /* avx512f_sfixupimmv2df */ |
| 72680 | case 2668: /* avx512f_sfixupimmv4sf_maskz_1_round */ |
| 72681 | case 2667: /* avx512f_sfixupimmv4sf_maskz_1 */ |
| 72682 | case 2666: /* avx512f_sfixupimmv4sf_round */ |
| 72683 | case 2665: /* avx512f_sfixupimmv4sf */ |
| 72684 | case 2664: /* avx512vl_fixupimmv2df_mask_round */ |
| 72685 | case 2663: /* avx512vl_fixupimmv2df_mask */ |
| 72686 | case 2662: /* avx512vl_fixupimmv4df_mask_round */ |
| 72687 | case 2661: /* avx512vl_fixupimmv4df_mask */ |
| 72688 | case 2660: /* avx512f_fixupimmv8df_mask_round */ |
| 72689 | case 2659: /* avx512f_fixupimmv8df_mask */ |
| 72690 | case 2658: /* avx512vl_fixupimmv4sf_mask_round */ |
| 72691 | case 2657: /* avx512vl_fixupimmv4sf_mask */ |
| 72692 | case 2656: /* avx512vl_fixupimmv8sf_mask_round */ |
| 72693 | case 2655: /* avx512vl_fixupimmv8sf_mask */ |
| 72694 | case 2654: /* avx512f_fixupimmv16sf_mask_round */ |
| 72695 | case 2653: /* avx512f_fixupimmv16sf_mask */ |
| 72696 | case 2652: /* avx512vl_fixupimmv2df_maskz_1_round */ |
| 72697 | case 2651: /* avx512vl_fixupimmv2df_maskz_1 */ |
| 72698 | case 2650: /* avx512vl_fixupimmv2df_round */ |
| 72699 | case 2649: /* avx512vl_fixupimmv2df */ |
| 72700 | case 2648: /* avx512vl_fixupimmv4df_maskz_1_round */ |
| 72701 | case 2647: /* avx512vl_fixupimmv4df_maskz_1 */ |
| 72702 | case 2646: /* avx512vl_fixupimmv4df_round */ |
| 72703 | case 2645: /* avx512vl_fixupimmv4df */ |
| 72704 | case 2644: /* avx512f_fixupimmv8df_maskz_1_round */ |
| 72705 | case 2643: /* avx512f_fixupimmv8df_maskz_1 */ |
| 72706 | case 2642: /* avx512f_fixupimmv8df_round */ |
| 72707 | case 2641: /* avx512f_fixupimmv8df */ |
| 72708 | case 2640: /* avx512vl_fixupimmv4sf_maskz_1_round */ |
| 72709 | case 2639: /* avx512vl_fixupimmv4sf_maskz_1 */ |
| 72710 | case 2638: /* avx512vl_fixupimmv4sf_round */ |
| 72711 | case 2637: /* avx512vl_fixupimmv4sf */ |
| 72712 | case 2636: /* avx512vl_fixupimmv8sf_maskz_1_round */ |
| 72713 | case 2635: /* avx512vl_fixupimmv8sf_maskz_1 */ |
| 72714 | case 2634: /* avx512vl_fixupimmv8sf_round */ |
| 72715 | case 2633: /* avx512vl_fixupimmv8sf */ |
| 72716 | case 2632: /* avx512f_fixupimmv16sf_maskz_1_round */ |
| 72717 | case 2631: /* avx512f_fixupimmv16sf_maskz_1 */ |
| 72718 | case 2630: /* avx512f_fixupimmv16sf_round */ |
| 72719 | case 2629: /* avx512f_fixupimmv16sf */ |
| 72720 | case 2628: /* avx512vl_alignv2di_mask */ |
| 72721 | case 2627: /* *avx512vl_alignv2di */ |
| 72722 | case 2626: /* avx512vl_alignv4di_mask */ |
| 72723 | case 2625: /* *avx512vl_alignv4di */ |
| 72724 | case 2624: /* avx512f_alignv8di_mask */ |
| 72725 | case 2623: /* *avx512f_alignv8di */ |
| 72726 | case 2622: /* avx512vl_alignv4si_mask */ |
| 72727 | case 2621: /* *avx512vl_alignv4si */ |
| 72728 | case 2620: /* avx512vl_alignv8si_mask */ |
| 72729 | case 2619: /* *avx512vl_alignv8si */ |
| 72730 | case 2618: /* avx512f_alignv16si_mask */ |
| 72731 | case 2617: /* *avx512f_alignv16si */ |
| 72732 | case 2616: /* avx512f_sgetexpv2df_round */ |
| 72733 | case 2615: /* avx512f_sgetexpv2df */ |
| 72734 | case 2614: /* avx512f_sgetexpv4sf_round */ |
| 72735 | case 2613: /* avx512f_sgetexpv4sf */ |
| 72736 | case 2612: /* avx512vl_getexpv2df_mask_round */ |
| 72737 | case 2611: /* avx512vl_getexpv2df_mask */ |
| 72738 | case 2610: /* avx512vl_getexpv2df_round */ |
| 72739 | case 2609: /* avx512vl_getexpv2df */ |
| 72740 | case 2608: /* avx512vl_getexpv4df_mask_round */ |
| 72741 | case 2607: /* avx512vl_getexpv4df_mask */ |
| 72742 | case 2606: /* avx512vl_getexpv4df_round */ |
| 72743 | case 2605: /* avx512vl_getexpv4df */ |
| 72744 | case 2604: /* avx512f_getexpv8df_mask_round */ |
| 72745 | case 2603: /* avx512f_getexpv8df_mask */ |
| 72746 | case 2602: /* avx512f_getexpv8df_round */ |
| 72747 | case 2601: /* avx512f_getexpv8df */ |
| 72748 | case 2600: /* avx512vl_getexpv4sf_mask_round */ |
| 72749 | case 2599: /* avx512vl_getexpv4sf_mask */ |
| 72750 | case 2598: /* avx512vl_getexpv4sf_round */ |
| 72751 | case 2597: /* avx512vl_getexpv4sf */ |
| 72752 | case 2596: /* avx512vl_getexpv8sf_mask_round */ |
| 72753 | case 2595: /* avx512vl_getexpv8sf_mask */ |
| 72754 | case 2594: /* avx512vl_getexpv8sf_round */ |
| 72755 | case 2593: /* avx512vl_getexpv8sf */ |
| 72756 | case 2592: /* avx512f_getexpv16sf_mask_round */ |
| 72757 | case 2591: /* avx512f_getexpv16sf_mask */ |
| 72758 | case 2590: /* avx512f_getexpv16sf_round */ |
| 72759 | case 2589: /* avx512f_getexpv16sf */ |
| 72760 | case 2570: /* avx512vl_scalefv2df_mask_round */ |
| 72761 | case 2569: /* avx512vl_scalefv2df_mask */ |
| 72762 | case 2568: /* avx512vl_scalefv2df_round */ |
| 72763 | case 2567: /* avx512vl_scalefv2df */ |
| 72764 | case 2566: /* avx512vl_scalefv4df_mask_round */ |
| 72765 | case 2565: /* avx512vl_scalefv4df_mask */ |
| 72766 | case 2564: /* avx512vl_scalefv4df_round */ |
| 72767 | case 2563: /* avx512vl_scalefv4df */ |
| 72768 | case 2562: /* avx512f_scalefv8df_mask_round */ |
| 72769 | case 2561: /* avx512f_scalefv8df_mask */ |
| 72770 | case 2560: /* avx512f_scalefv8df_round */ |
| 72771 | case 2559: /* avx512f_scalefv8df */ |
| 72772 | case 2558: /* avx512vl_scalefv4sf_mask_round */ |
| 72773 | case 2557: /* avx512vl_scalefv4sf_mask */ |
| 72774 | case 2556: /* avx512vl_scalefv4sf_round */ |
| 72775 | case 2555: /* avx512vl_scalefv4sf */ |
| 72776 | case 2554: /* avx512vl_scalefv8sf_mask_round */ |
| 72777 | case 2553: /* avx512vl_scalefv8sf_mask */ |
| 72778 | case 2552: /* avx512vl_scalefv8sf_round */ |
| 72779 | case 2551: /* avx512vl_scalefv8sf */ |
| 72780 | case 2550: /* avx512f_scalefv16sf_mask_round */ |
| 72781 | case 2549: /* avx512f_scalefv16sf_mask */ |
| 72782 | case 2548: /* avx512f_scalefv16sf_round */ |
| 72783 | case 2547: /* avx512f_scalefv16sf */ |
| 72784 | case 2546: /* avx512f_vmscalefv2df_round */ |
| 72785 | case 2545: /* avx512f_vmscalefv2df */ |
| 72786 | case 2544: /* avx512f_vmscalefv4sf_round */ |
| 72787 | case 2543: /* avx512f_vmscalefv4sf */ |
| 72788 | case 2529: /* vec_extract_lo_v32qi */ |
| 72789 | case 2527: /* vec_extract_lo_v64qi */ |
| 72790 | case 2525: /* vec_extract_lo_v16hi */ |
| 72791 | case 2523: /* vec_extract_lo_v32hi */ |
| 72792 | case 2502: /* vec_extract_lo_v16si_mask */ |
| 72793 | case 2501: /* vec_extract_lo_v16si */ |
| 72794 | case 2500: /* vec_extract_lo_v16sf_mask */ |
| 72795 | case 2499: /* vec_extract_lo_v16sf */ |
| 72796 | case 2468: /* *vec_extractv4sf_mem */ |
| 72797 | case 2466: /* *vec_extractv4sf_0 */ |
| 72798 | case 2415: /* *avx512vl_cvtmask2qv2di */ |
| 72799 | case 2414: /* *avx512vl_cvtmask2qv4di */ |
| 72800 | case 2413: /* *avx512f_cvtmask2qv8di */ |
| 72801 | case 2412: /* *avx512vl_cvtmask2dv4si */ |
| 72802 | case 2411: /* *avx512vl_cvtmask2dv8si */ |
| 72803 | case 2410: /* *avx512f_cvtmask2dv16si */ |
| 72804 | case 2409: /* *avx512vl_cvtmask2wv8hi */ |
| 72805 | case 2408: /* *avx512vl_cvtmask2wv16hi */ |
| 72806 | case 2407: /* *avx512bw_cvtmask2wv32hi */ |
| 72807 | case 2406: /* *avx512vl_cvtmask2bv32qi */ |
| 72808 | case 2405: /* *avx512vl_cvtmask2bv16qi */ |
| 72809 | case 2404: /* *avx512bw_cvtmask2bv64qi */ |
| 72810 | case 2403: /* avx512vl_cvtq2maskv2di */ |
| 72811 | case 2402: /* avx512vl_cvtq2maskv4di */ |
| 72812 | case 2401: /* avx512f_cvtq2maskv8di */ |
| 72813 | case 2400: /* avx512vl_cvtd2maskv4si */ |
| 72814 | case 2399: /* avx512vl_cvtd2maskv8si */ |
| 72815 | case 2398: /* avx512f_cvtd2maskv16si */ |
| 72816 | case 2397: /* avx512vl_cvtw2maskv8hi */ |
| 72817 | case 2396: /* avx512vl_cvtw2maskv16hi */ |
| 72818 | case 2395: /* avx512bw_cvtw2maskv32hi */ |
| 72819 | case 2394: /* avx512vl_cvtb2maskv32qi */ |
| 72820 | case 2393: /* avx512vl_cvtb2maskv16qi */ |
| 72821 | case 2392: /* avx512bw_cvtb2maskv64qi */ |
| 72822 | case 1360: /* *absnegv2df2 */ |
| 72823 | case 1359: /* *absnegv4df2 */ |
| 72824 | case 1358: /* *absnegv8df2 */ |
| 72825 | case 1357: /* *absnegv4sf2 */ |
| 72826 | case 1356: /* *absnegv8sf2 */ |
| 72827 | case 1355: /* *absnegv16sf2 */ |
| 72828 | case 1354: /* kunpckdi */ |
| 72829 | case 1353: /* kunpcksi */ |
| 72830 | case 1294: /* movdi_to_sse */ |
| 72831 | case 1215: /* *mmx_maskmovq */ |
| 72832 | case 1214: /* *mmx_maskmovq */ |
| 72833 | case 1209: /* *vec_extractv2si_zext_mem */ |
| 72834 | case 1207: /* *vec_extractv2si_0 */ |
| 72835 | case 1137: /* *vec_extractv2sf_0 */ |
| 72836 | case 1105: /* rdpid */ |
| 72837 | case 1104: /* *wrpkru */ |
| 72838 | case 1103: /* *rdpkru */ |
| 72839 | case 1086: /* clzero_di */ |
| 72840 | case 1085: /* clzero_si */ |
| 72841 | case 1084: /* monitorx_di */ |
| 72842 | case 1083: /* monitorx_si */ |
| 72843 | case 1082: /* mwaitx */ |
| 72844 | case 1079: /* xtest_1 */ |
| 72845 | case 1078: /* xabort */ |
| 72846 | case 1077: /* xend */ |
| 72847 | case 1076: /* xbegin_1 */ |
| 72848 | case 1075: /* *pause */ |
| 72849 | case 1074: /* rdseeddi_1 */ |
| 72850 | case 1073: /* rdseedsi_1 */ |
| 72851 | case 1072: /* rdseedhi_1 */ |
| 72852 | case 1071: /* rdranddi_1 */ |
| 72853 | case 1070: /* rdrandsi_1 */ |
| 72854 | case 1069: /* rdrandhi_1 */ |
| 72855 | case 1068: /* wrgsbasedi */ |
| 72856 | case 1067: /* wrfsbasedi */ |
| 72857 | case 1066: /* wrgsbasesi */ |
| 72858 | case 1065: /* wrfsbasesi */ |
| 72859 | case 1064: /* rdgsbasedi */ |
| 72860 | case 1063: /* rdfsbasedi */ |
| 72861 | case 1062: /* rdgsbasesi */ |
| 72862 | case 1061: /* rdfsbasesi */ |
| 72863 | case 1052: /* fnclex */ |
| 72864 | case 1051: /* fnstsw */ |
| 72865 | case 1050: /* fldenv */ |
| 72866 | case 1049: /* fnstenv */ |
| 72867 | case 1048: /* xrstors64 */ |
| 72868 | case 1047: /* xrstor64 */ |
| 72869 | case 1046: /* xrstors_rex64 */ |
| 72870 | case 1045: /* xrstor_rex64 */ |
| 72871 | case 1044: /* xrstors */ |
| 72872 | case 1043: /* xrstor */ |
| 72873 | case 1042: /* xsaves64 */ |
| 72874 | case 1041: /* xsavec64 */ |
| 72875 | case 1040: /* xsaveopt64 */ |
| 72876 | case 1039: /* xsave64 */ |
| 72877 | case 1038: /* xsaves_rex64 */ |
| 72878 | case 1037: /* xsavec_rex64 */ |
| 72879 | case 1036: /* xsaveopt_rex64 */ |
| 72880 | case 1035: /* xsave_rex64 */ |
| 72881 | case 1034: /* xsaves */ |
| 72882 | case 1033: /* xsavec */ |
| 72883 | case 1032: /* xsaveopt */ |
| 72884 | case 1031: /* xsave */ |
| 72885 | case 1030: /* fxrstor64 */ |
| 72886 | case 1029: /* fxrstor */ |
| 72887 | case 1028: /* fxsave64 */ |
| 72888 | case 1027: /* fxsave */ |
| 72889 | case 1026: /* rdtscp_rex64 */ |
| 72890 | case 1025: /* rdtscp */ |
| 72891 | case 1024: /* rdtsc_rex64 */ |
| 72892 | case 1023: /* rdtsc */ |
| 72893 | case 1022: /* rdpmc_rex64 */ |
| 72894 | case 1021: /* rdpmc */ |
| 72895 | case 1016: /* stack_tls_protect_test_di */ |
| 72896 | case 1015: /* stack_tls_protect_test_si */ |
| 72897 | case 1014: /* stack_protect_test_di */ |
| 72898 | case 1013: /* stack_protect_test_si */ |
| 72899 | case 1012: /* stack_tls_protect_set_di */ |
| 72900 | case 1011: /* stack_tls_protect_set_si */ |
| 72901 | case 1010: /* stack_protect_set_di */ |
| 72902 | case 1009: /* stack_protect_set_si */ |
| 72903 | case 1005: /* trap */ |
| 72904 | case 1004: /* probe_stack_rangedi */ |
| 72905 | case 1003: /* probe_stack_rangesi */ |
| 72906 | case 1002: /* adjust_stack_and_probedi */ |
| 72907 | case 1001: /* adjust_stack_and_probesi */ |
| 72908 | case 998: /* allocate_stack_worker_probe_di */ |
| 72909 | case 997: /* allocate_stack_worker_probe_si */ |
| 72910 | case 980: /* *movxfcc_1 */ |
| 72911 | case 968: /* *strlenqi_1 */ |
| 72912 | case 967: /* *strlenqi_1 */ |
| 72913 | case 966: /* *cmpstrnqi_1 */ |
| 72914 | case 965: /* *cmpstrnqi_1 */ |
| 72915 | case 964: /* *cmpstrnqi_nz_1 */ |
| 72916 | case 963: /* *cmpstrnqi_nz_1 */ |
| 72917 | case 962: /* *rep_stosqi */ |
| 72918 | case 961: /* *rep_stosqi */ |
| 72919 | case 960: /* *rep_stossi */ |
| 72920 | case 959: /* *rep_stossi */ |
| 72921 | case 958: /* *rep_stosdi_rex64 */ |
| 72922 | case 957: /* *rep_stosdi_rex64 */ |
| 72923 | case 956: /* *strsetqi_1 */ |
| 72924 | case 955: /* *strsetqi_1 */ |
| 72925 | case 954: /* *strsethi_1 */ |
| 72926 | case 953: /* *strsethi_1 */ |
| 72927 | case 952: /* *strsetsi_1 */ |
| 72928 | case 951: /* *strsetsi_1 */ |
| 72929 | case 950: /* *strsetdi_rex_1 */ |
| 72930 | case 949: /* *strsetdi_rex_1 */ |
| 72931 | case 948: /* *rep_movqi */ |
| 72932 | case 947: /* *rep_movqi */ |
| 72933 | case 946: /* *rep_movsi */ |
| 72934 | case 945: /* *rep_movsi */ |
| 72935 | case 944: /* *rep_movdi_rex64 */ |
| 72936 | case 943: /* *rep_movdi_rex64 */ |
| 72937 | case 942: /* *strmovqi_1 */ |
| 72938 | case 941: /* *strmovqi_1 */ |
| 72939 | case 940: /* *strmovhi_1 */ |
| 72940 | case 939: /* *strmovhi_1 */ |
| 72941 | case 938: /* *strmovsi_1 */ |
| 72942 | case 937: /* *strmovsi_1 */ |
| 72943 | case 936: /* *strmovdi_rex_1 */ |
| 72944 | case 935: /* *strmovdi_rex_1 */ |
| 72945 | case 934: /* cld */ |
| 72946 | case 932: /* fxamdf2_i387_with_temp */ |
| 72947 | case 931: /* fxamsf2_i387_with_temp */ |
| 72948 | case 930: /* fxamxf2_i387 */ |
| 72949 | case 929: /* fxamdf2_i387 */ |
| 72950 | case 928: /* fxamsf2_i387 */ |
| 72951 | case 880: /* rintdf2_frndint */ |
| 72952 | case 879: /* rintsf2_frndint */ |
| 72953 | case 878: /* rintxf2 */ |
| 72954 | case 875: /* fscalexf4_i387 */ |
| 72955 | case 874: /* *f2xm1xf2_i387 */ |
| 72956 | case 873: /* fxtract_extenddfxf3_i387 */ |
| 72957 | case 872: /* fxtract_extendsfxf3_i387 */ |
| 72958 | case 871: /* fxtractxf3_i387 */ |
| 72959 | case 870: /* fyl2xp1_extenddfxf3_i387 */ |
| 72960 | case 869: /* fyl2xp1_extendsfxf3_i387 */ |
| 72961 | case 868: /* fyl2xp1xf3_i387 */ |
| 72962 | case 867: /* fyl2x_extenddfxf3_i387 */ |
| 72963 | case 866: /* fyl2x_extendsfxf3_i387 */ |
| 72964 | case 865: /* fyl2xxf3_i387 */ |
| 72965 | case 864: /* fpatan_extenddfxf3_i387 */ |
| 72966 | case 863: /* fpatan_extendsfxf3_i387 */ |
| 72967 | case 862: /* *fpatanxf3_i387 */ |
| 72968 | case 861: /* fptan_extenddfxf4_i387 */ |
| 72969 | case 860: /* fptan_extendsfxf4_i387 */ |
| 72970 | case 859: /* fptanxf4_i387 */ |
| 72971 | case 858: /* sincos_extenddfxf3_i387 */ |
| 72972 | case 857: /* sincos_extendsfxf3_i387 */ |
| 72973 | case 856: /* sincosxf3 */ |
| 72974 | case 855: /* *cos_extenddfxf2_i387 */ |
| 72975 | case 854: /* *sin_extenddfxf2_i387 */ |
| 72976 | case 853: /* *cos_extendsfxf2_i387 */ |
| 72977 | case 852: /* *sin_extendsfxf2_i387 */ |
| 72978 | case 851: /* *cosxf2_i387 */ |
| 72979 | case 850: /* *sinxf2_i387 */ |
| 72980 | case 849: /* fprem1xf4_i387 */ |
| 72981 | case 848: /* fpremxf4_i387 */ |
| 72982 | case 811: /* *tls_dynamic_gnu2_combine_64 */ |
| 72983 | case 808: /* *tls_dynamic_gnu2_combine_32 */ |
| 72984 | case 797: /* *tls_local_dynamic_32_once */ |
| 72985 | case 796: /* *tls_local_dynamic_base_64_largepic */ |
| 72986 | case 795: /* *tls_local_dynamic_base_64_di */ |
| 72987 | case 794: /* *tls_local_dynamic_base_64_si */ |
| 72988 | case 793: /* *tls_local_dynamic_base_32_gnu */ |
| 72989 | case 792: /* *tls_global_dynamic_64_largepic */ |
| 72990 | case 791: /* *tls_global_dynamic_64_di */ |
| 72991 | case 790: /* *tls_global_dynamic_64_si */ |
| 72992 | case 789: /* *tls_global_dynamic_32_gnu */ |
| 72993 | case 788: /* *parityhi2_cmp */ |
| 72994 | case 787: /* paritysi2_cmp */ |
| 72995 | case 786: /* paritydi2_cmp */ |
| 72996 | case 785: /* bswaphi_lowpart */ |
| 72997 | case 784: /* *bswaphi_lowpart_1 */ |
| 72998 | case 778: /* *popcounthi2_1 */ |
| 72999 | case 706: /* ffssi2_no_cmove */ |
| 73000 | case 705: /* split_stack_return */ |
| 73001 | case 702: /* eh_return_internal */ |
| 73002 | case 698: /* *set_got_labelled */ |
| 73003 | case 697: /* *set_got */ |
| 73004 | case 696: /* pad */ |
| 73005 | case 695: /* nops */ |
| 73006 | case 694: /* nop */ |
| 73007 | case 692: /* simple_return_pop_internal */ |
| 73008 | case 691: /* simple_return_internal_long */ |
| 73009 | case 690: /* interrupt_return */ |
| 73010 | case 689: /* simple_return_internal */ |
| 73011 | case 688: /* prologue_use */ |
| 73012 | case 687: /* *memory_blockage */ |
| 73013 | case 686: /* blockage */ |
| 73014 | case 658: /* *jccxf_si_r_i387 */ |
| 73015 | case 657: /* *jccdf_si_r_i387 */ |
| 73016 | case 656: /* *jccsf_si_r_i387 */ |
| 73017 | case 655: /* *jccxf_hi_r_i387 */ |
| 73018 | case 654: /* *jccdf_hi_r_i387 */ |
| 73019 | case 653: /* *jccsf_hi_r_i387 */ |
| 73020 | case 652: /* *jccxf_si_i387 */ |
| 73021 | case 651: /* *jccdf_si_i387 */ |
| 73022 | case 650: /* *jccsf_si_i387 */ |
| 73023 | case 649: /* *jccxf_hi_i387 */ |
| 73024 | case 648: /* *jccdf_hi_i387 */ |
| 73025 | case 647: /* *jccsf_hi_i387 */ |
| 73026 | case 646: /* *jccuxf_r_i387 */ |
| 73027 | case 645: /* *jccudf_r_i387 */ |
| 73028 | case 644: /* *jccusf_r_i387 */ |
| 73029 | case 643: /* *jccuxf_i387 */ |
| 73030 | case 642: /* *jccudf_i387 */ |
| 73031 | case 641: /* *jccusf_i387 */ |
| 73032 | case 640: /* *jccdf_r_i387 */ |
| 73033 | case 639: /* *jccsf_r_i387 */ |
| 73034 | case 638: /* *jccdf_i387 */ |
| 73035 | case 637: /* *jccsf_i387 */ |
| 73036 | case 636: /* *jccxf_r_i387 */ |
| 73037 | case 635: /* *jccxf_i387 */ |
| 73038 | case 634: /* *jccxf_0_r_i387 */ |
| 73039 | case 633: /* *jccdf_0_r_i387 */ |
| 73040 | case 632: /* *jccsf_0_r_i387 */ |
| 73041 | case 631: /* *jccxf_0_i387 */ |
| 73042 | case 630: /* *jccdf_0_i387 */ |
| 73043 | case 629: /* *jccsf_0_i387 */ |
| 73044 | case 622: /* *setcc_si_1_movzbl */ |
| 73045 | case 621: /* *setcc_si_1_and */ |
| 73046 | case 620: /* *setcc_di_1 */ |
| 73047 | case 619: /* *jcc_btdi_mask */ |
| 73048 | case 618: /* *jcc_btsi_mask */ |
| 73049 | case 617: /* *jcc_btdi_1 */ |
| 73050 | case 616: /* *jcc_btsi_1 */ |
| 73051 | case 615: /* *jcc_btdi */ |
| 73052 | case 614: /* *jcc_btsi */ |
| 73053 | case 593: /* ix86_rotrti3_doubleword */ |
| 73054 | case 592: /* ix86_rotrdi3_doubleword */ |
| 73055 | case 591: /* ix86_rotlti3_doubleword */ |
| 73056 | case 590: /* ix86_rotldi3_doubleword */ |
| 73057 | case 589: /* *rotrdi3_mask */ |
| 73058 | case 588: /* *rotldi3_mask */ |
| 73059 | case 587: /* *rotrsi3_mask */ |
| 73060 | case 586: /* *rotlsi3_mask */ |
| 73061 | case 544: /* *ashrti3_doubleword */ |
| 73062 | case 543: /* *lshrti3_doubleword */ |
| 73063 | case 542: /* *ashrdi3_doubleword */ |
| 73064 | case 541: /* *lshrdi3_doubleword */ |
| 73065 | case 540: /* *ashrdi3_mask */ |
| 73066 | case 539: /* *lshrdi3_mask */ |
| 73067 | case 538: /* *ashrsi3_mask */ |
| 73068 | case 537: /* *lshrsi3_mask */ |
| 73069 | case 518: /* *ashldi3_mask */ |
| 73070 | case 517: /* *ashlsi3_mask */ |
| 73071 | case 514: /* *ashlti3_doubleword */ |
| 73072 | case 513: /* *ashldi3_doubleword */ |
| 73073 | case 502: /* *one_cmpldi2_doubleword */ |
| 73074 | case 501: /* copysigntf3_var */ |
| 73075 | case 500: /* copysigndf3_var */ |
| 73076 | case 499: /* copysignsf3_var */ |
| 73077 | case 498: /* copysigntf3_const */ |
| 73078 | case 497: /* copysigndf3_const */ |
| 73079 | case 496: /* copysignsf3_const */ |
| 73080 | case 483: /* *absnegtf2_sse */ |
| 73081 | case 482: /* *absnegxf2_i387 */ |
| 73082 | case 481: /* *absnegdf2 */ |
| 73083 | case 480: /* *absnegsf2 */ |
| 73084 | case 465: /* *negti2_doubleword */ |
| 73085 | case 464: /* *negdi2_doubleword */ |
| 73086 | case 422: /* *xordi3_doubleword */ |
| 73087 | case 421: /* *iordi3_doubleword */ |
| 73088 | case 414: /* *andndi3_doubleword */ |
| 73089 | case 397: /* *anddi3_doubleword */ |
| 73090 | case 396: /* *testqi_ext_3 */ |
| 73091 | case 395: /* *testqi_ext_3 */ |
| 73092 | case 394: /* *testqi_ext_3 */ |
| 73093 | case 382: /* *udivmoddi4_pow2 */ |
| 73094 | case 381: /* *udivmodsi4_pow2 */ |
| 73095 | case 380: /* *udivmoddi4 */ |
| 73096 | case 379: /* *udivmodsi4 */ |
| 73097 | case 378: /* *udivmodhi4 */ |
| 73098 | case 377: /* udivmoddi4_1 */ |
| 73099 | case 376: /* udivmodsi4_1 */ |
| 73100 | case 371: /* *divmoddi4 */ |
| 73101 | case 370: /* *divmodsi4 */ |
| 73102 | case 369: /* *divmodhi4 */ |
| 73103 | case 368: /* divmoddi4_1 */ |
| 73104 | case 367: /* divmodsi4_1 */ |
| 73105 | case 270: /* *subti3_doubleword */ |
| 73106 | case 269: /* *subdi3_doubleword */ |
| 73107 | case 216: /* *addti3_doubleword */ |
| 73108 | case 215: /* *adddi3_doubleword */ |
| 73109 | case 212: /* *floatunssixf2_i387_with_xmm */ |
| 73110 | case 211: /* *floatunssidf2_i387_with_xmm */ |
| 73111 | case 210: /* *floatunssisf2_i387_with_xmm */ |
| 73112 | case 209: /* floatdixf2_i387_with_xmm */ |
| 73113 | case 208: /* floatdidf2_i387_with_xmm */ |
| 73114 | case 207: /* floatdisf2_i387_with_xmm */ |
| 73115 | case 193: /* x86_fldcw_1 */ |
| 73116 | case 192: /* x86_fnstcw_1 */ |
| 73117 | case 169: /* *fixuns_truncdf_1 */ |
| 73118 | case 168: /* *fixuns_truncsf_1 */ |
| 73119 | case 146: /* extendsidi2_1 */ |
| 73120 | case 144: /* *zextsi_doubleword */ |
| 73121 | case 143: /* *zexthi_doubleword */ |
| 73122 | case 142: /* *zextqi_doubleword */ |
| 73123 | case 141: /* *zexthi_doubleword_and */ |
| 73124 | case 140: /* *zextqi_doubleword_and */ |
| 73125 | case 121: /* *pushdf */ |
| 73126 | case 120: /* *pushxf */ |
| 73127 | case 119: /* *pushxf_rounded */ |
| 73128 | case 118: /* *pushxf_rounded */ |
| 73129 | case 117: /* *pushtf */ |
| 73130 | case 56: /* *pushti2 */ |
| 73131 | case 55: /* *pushdi2 */ |
| 73132 | case 48: /* x86_sahf_1 */ |
| 73133 | case 47: /* x86_fnstsw_1 */ |
| 73134 | case 46: /* *cmpxf_si_cc_i387 */ |
| 73135 | case 45: /* *cmpdf_si_cc_i387 */ |
| 73136 | case 44: /* *cmpsf_si_cc_i387 */ |
| 73137 | case 43: /* *cmpxf_hi_cc_i387 */ |
| 73138 | case 42: /* *cmpdf_hi_cc_i387 */ |
| 73139 | case 41: /* *cmpsf_hi_cc_i387 */ |
| 73140 | case 40: /* *cmpxf_si_i387 */ |
| 73141 | case 39: /* *cmpdf_si_i387 */ |
| 73142 | case 38: /* *cmpsf_si_i387 */ |
| 73143 | case 37: /* *cmpxf_hi_i387 */ |
| 73144 | case 36: /* *cmpdf_hi_i387 */ |
| 73145 | case 35: /* *cmpsf_hi_i387 */ |
| 73146 | case 34: /* *cmpuxf_cc_i387 */ |
| 73147 | case 33: /* *cmpudf_cc_i387 */ |
| 73148 | case 32: /* *cmpusf_cc_i387 */ |
| 73149 | case 31: /* *cmpuxf_i387 */ |
| 73150 | case 30: /* *cmpudf_i387 */ |
| 73151 | case 29: /* *cmpusf_i387 */ |
| 73152 | case 28: /* *cmpdf_cc_i387 */ |
| 73153 | case 27: /* *cmpsf_cc_i387 */ |
| 73154 | case 26: /* *cmpdf_i387 */ |
| 73155 | case 25: /* *cmpsf_i387 */ |
| 73156 | case 24: /* *cmpxf_cc_i387 */ |
| 73157 | case 23: /* *cmpxf_i387 */ |
| 73158 | case 22: /* *cmpxf_0_cc_i387 */ |
| 73159 | case 21: /* *cmpdf_0_cc_i387 */ |
| 73160 | case 20: /* *cmpsf_0_cc_i387 */ |
| 73161 | case 19: /* *cmpxf_0_i387 */ |
| 73162 | case 18: /* *cmpdf_0_i387 */ |
| 73163 | case 17: /* *cmpsf_0_i387 */ |
| 73164 | return 6; |
| 73165 | |
| 73166 | case 979: /* *movqicc_noc */ |
| 73167 | case 978: /* *movsicc_noc_zext */ |
| 73168 | case 977: /* *movdicc_noc */ |
| 73169 | case 976: /* *movsicc_noc */ |
| 73170 | case 975: /* *movhicc_noc */ |
| 73171 | case 393: /* *testqi_ext_2 */ |
| 73172 | case 392: /* *testqi_ext_1 */ |
| 73173 | case 391: /* *testsi_1 */ |
| 73174 | case 390: /* *testhi_1 */ |
| 73175 | case 389: /* *testqi_1 */ |
| 73176 | case 388: /* *testqi_1_maybe_si */ |
| 73177 | case 387: /* *testdi_1 */ |
| 73178 | case 16: /* *cmpqi_ext_4 */ |
| 73179 | case 15: /* *cmpqi_ext_3 */ |
| 73180 | case 14: /* *cmpqi_ext_2 */ |
| 73181 | case 13: /* *cmpqi_ext_1 */ |
| 73182 | case 12: /* *cmpdi_minus_1 */ |
| 73183 | case 11: /* *cmpsi_minus_1 */ |
| 73184 | case 10: /* *cmphi_minus_1 */ |
| 73185 | case 9: /* *cmpqi_minus_1 */ |
| 73186 | case 8: /* *cmpdi_1 */ |
| 73187 | case 7: /* *cmpsi_1 */ |
| 73188 | case 6: /* *cmphi_1 */ |
| 73189 | case 5: /* *cmpqi_1 */ |
| 73190 | case 4: /* *cmpdi_ccno_1 */ |
| 73191 | case 3: /* *cmpsi_ccno_1 */ |
| 73192 | case 2: /* *cmphi_ccno_1 */ |
| 73193 | case 1: /* *cmpqi_ccno_1 */ |
| 73194 | if ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) |
| 73195 | { |
| 73196 | return 1; |
| 73197 | } |
| 73198 | else if (cached_memory == MEMORY_LOAD) |
| 73199 | { |
| 73200 | return 5; |
| 73201 | } |
| 73202 | else |
| 73203 | { |
| 73204 | return 0; |
| 73205 | } |
| 73206 | |
| 73207 | case -1: |
| 73208 | if (GET_CODE (PATTERN (insn)) != ASM_INPUT |
| 73209 | && asm_noperands (PATTERN (insn)) < 0) |
| 73210 | fatal_insn_not_found (insn); |
| 73211 | /* FALLTHRU */ |
| 73212 | case 49: /* *cmpisf */ |
| 73213 | case 50: /* *cmpidf */ |
| 73214 | case 51: /* *cmpiusf */ |
| 73215 | case 52: /* *cmpiudf */ |
| 73216 | case 79: /* *movoi_internal_avx */ |
| 73217 | case 80: /* *movti_internal */ |
| 73218 | case 81: /* *movdi_internal */ |
| 73219 | case 82: /* *movsi_internal */ |
| 73220 | case 83: /* *movhi_internal */ |
| 73221 | case 84: /* *movqi_internal */ |
| 73222 | case 93: /* *swapsi */ |
| 73223 | case 94: /* *swapdi */ |
| 73224 | case 95: /* *swapqi */ |
| 73225 | case 96: /* *swaphi */ |
| 73226 | case 97: /* *movstrictqi_1 */ |
| 73227 | case 98: /* *movstricthi_1 */ |
| 73228 | case 101: /* *extvhi */ |
| 73229 | case 102: /* *extvsi */ |
| 73230 | case 103: /* *extzvhi */ |
| 73231 | case 104: /* *extzvsi */ |
| 73232 | case 105: /* *extzvdi */ |
| 73233 | case 106: /* *extzvqi_mem_rex64 */ |
| 73234 | case 107: /* *extzvqi */ |
| 73235 | case 108: /* insvhi_1 */ |
| 73236 | case 109: /* insvsi_1 */ |
| 73237 | case 110: /* insvdi_1 */ |
| 73238 | case 111: /* *insvqi_1_mem_rex64 */ |
| 73239 | case 112: /* *insvqi_1 */ |
| 73240 | case 113: /* *insvqi_2 */ |
| 73241 | case 114: /* *insvqi_2 */ |
| 73242 | case 115: /* *insvqi_3 */ |
| 73243 | case 116: /* *insvqi_3 */ |
| 73244 | case 124: /* *movtf_internal */ |
| 73245 | case 126: /* *movdf_internal */ |
| 73246 | case 127: /* *movsf_internal */ |
| 73247 | case 131: /* *zero_extendsidi2 */ |
| 73248 | case 132: /* zero_extendqidi2 */ |
| 73249 | case 133: /* zero_extendhidi2 */ |
| 73250 | case 136: /* *zero_extendqisi2 */ |
| 73251 | case 137: /* *zero_extendhisi2 */ |
| 73252 | case 139: /* *zero_extendqihi2 */ |
| 73253 | case 145: /* *extendsidi2_rex64 */ |
| 73254 | case 147: /* extendqidi2 */ |
| 73255 | case 148: /* extendhidi2 */ |
| 73256 | case 149: /* extendhisi2 */ |
| 73257 | case 150: /* *extendhisi2_zext */ |
| 73258 | case 151: /* extendqisi2 */ |
| 73259 | case 152: /* *extendqisi2_zext */ |
| 73260 | case 153: /* extendqihi2 */ |
| 73261 | case 154: /* *extendsfdf2 */ |
| 73262 | case 157: /* *truncdfsf_fast_mixed */ |
| 73263 | case 159: /* *truncdfsf_mixed */ |
| 73264 | case 217: /* *addsi_1 */ |
| 73265 | case 218: /* *adddi_1 */ |
| 73266 | case 219: /* addsi_1_zext */ |
| 73267 | case 220: /* *addhi_1 */ |
| 73268 | case 221: /* *addqi_1 */ |
| 73269 | case 222: /* *addqi_1_slp */ |
| 73270 | case 223: /* *addqi_2 */ |
| 73271 | case 224: /* *addhi_2 */ |
| 73272 | case 225: /* *addsi_2 */ |
| 73273 | case 226: /* *adddi_2 */ |
| 73274 | case 227: /* *addsi_2_zext */ |
| 73275 | case 228: /* *addqi_3 */ |
| 73276 | case 229: /* *addhi_3 */ |
| 73277 | case 230: /* *addsi_3 */ |
| 73278 | case 231: /* *adddi_3 */ |
| 73279 | case 232: /* *addsi_3_zext */ |
| 73280 | case 233: /* *adddi_4 */ |
| 73281 | case 234: /* *addqi_4 */ |
| 73282 | case 235: /* *addhi_4 */ |
| 73283 | case 236: /* *addsi_4 */ |
| 73284 | case 237: /* *addqi_5 */ |
| 73285 | case 238: /* *addhi_5 */ |
| 73286 | case 239: /* *addsi_5 */ |
| 73287 | case 240: /* *adddi_5 */ |
| 73288 | case 241: /* addqi_ext_1 */ |
| 73289 | case 242: /* *addqi_ext_2 */ |
| 73290 | case 243: /* *addvqi4 */ |
| 73291 | case 244: /* *addvhi4 */ |
| 73292 | case 245: /* *addvsi4 */ |
| 73293 | case 246: /* *addvdi4 */ |
| 73294 | case 247: /* *addvqi4_1 */ |
| 73295 | case 248: /* *addvhi4_1 */ |
| 73296 | case 249: /* *addvsi4_1 */ |
| 73297 | case 250: /* *addvdi4_1 */ |
| 73298 | case 271: /* *subqi_1 */ |
| 73299 | case 272: /* *subhi_1 */ |
| 73300 | case 273: /* *subsi_1 */ |
| 73301 | case 274: /* *subdi_1 */ |
| 73302 | case 275: /* *subsi_1_zext */ |
| 73303 | case 277: /* *subqi_2 */ |
| 73304 | case 278: /* *subhi_2 */ |
| 73305 | case 279: /* *subsi_2 */ |
| 73306 | case 280: /* *subdi_2 */ |
| 73307 | case 281: /* *subsi_2_zext */ |
| 73308 | case 282: /* *subvqi4 */ |
| 73309 | case 283: /* *subvhi4 */ |
| 73310 | case 284: /* *subvsi4 */ |
| 73311 | case 285: /* *subvdi4 */ |
| 73312 | case 286: /* *subvqi4_1 */ |
| 73313 | case 287: /* *subvhi4_1 */ |
| 73314 | case 288: /* *subvsi4_1 */ |
| 73315 | case 289: /* *subvdi4_1 */ |
| 73316 | case 290: /* *subqi_3 */ |
| 73317 | case 291: /* *subhi_3 */ |
| 73318 | case 292: /* *subsi_3 */ |
| 73319 | case 293: /* *subdi_3 */ |
| 73320 | case 294: /* *subsi_3_zext */ |
| 73321 | case 295: /* addqi3_carry */ |
| 73322 | case 296: /* addhi3_carry */ |
| 73323 | case 297: /* addsi3_carry */ |
| 73324 | case 298: /* adddi3_carry */ |
| 73325 | case 299: /* *addqi3_carry_0 */ |
| 73326 | case 300: /* *addhi3_carry_0 */ |
| 73327 | case 301: /* *addsi3_carry_0 */ |
| 73328 | case 302: /* *adddi3_carry_0 */ |
| 73329 | case 303: /* *addsi3_carry_zext */ |
| 73330 | case 304: /* *addsi3_carry_zext_0 */ |
| 73331 | case 305: /* addcarrysi */ |
| 73332 | case 306: /* addcarrydi */ |
| 73333 | case 307: /* subqi3_carry */ |
| 73334 | case 308: /* subhi3_carry */ |
| 73335 | case 309: /* subsi3_carry */ |
| 73336 | case 310: /* subdi3_carry */ |
| 73337 | case 311: /* *subqi3_carry_0 */ |
| 73338 | case 312: /* *subhi3_carry_0 */ |
| 73339 | case 313: /* *subsi3_carry_0 */ |
| 73340 | case 314: /* *subdi3_carry_0 */ |
| 73341 | case 315: /* *subsi3_carry_zext */ |
| 73342 | case 316: /* *subsi3_carry_zext_0 */ |
| 73343 | case 317: /* subborrowsi */ |
| 73344 | case 318: /* subborrowdi */ |
| 73345 | case 319: /* *addqi3_cconly_overflow_1 */ |
| 73346 | case 320: /* *addhi3_cconly_overflow_1 */ |
| 73347 | case 321: /* *addsi3_cconly_overflow_1 */ |
| 73348 | case 322: /* *adddi3_cconly_overflow_1 */ |
| 73349 | case 323: /* *addqi3_cc_overflow_1 */ |
| 73350 | case 324: /* *addhi3_cc_overflow_1 */ |
| 73351 | case 325: /* *addsi3_cc_overflow_1 */ |
| 73352 | case 326: /* *adddi3_cc_overflow_1 */ |
| 73353 | case 327: /* *addsi3_zext_cc_overflow_1 */ |
| 73354 | case 328: /* *addqi3_cconly_overflow_2 */ |
| 73355 | case 329: /* *addhi3_cconly_overflow_2 */ |
| 73356 | case 330: /* *addsi3_cconly_overflow_2 */ |
| 73357 | case 331: /* *adddi3_cconly_overflow_2 */ |
| 73358 | case 332: /* *addqi3_cc_overflow_2 */ |
| 73359 | case 333: /* *addhi3_cc_overflow_2 */ |
| 73360 | case 334: /* *addsi3_cc_overflow_2 */ |
| 73361 | case 335: /* *adddi3_cc_overflow_2 */ |
| 73362 | case 336: /* *addsi3_zext_cc_overflow_2 */ |
| 73363 | case 398: /* *anddi_1 */ |
| 73364 | case 399: /* *andsi_1_zext */ |
| 73365 | case 400: /* *andhi_1 */ |
| 73366 | case 401: /* *andsi_1 */ |
| 73367 | case 402: /* *andqi_1 */ |
| 73368 | case 404: /* *anddi_2 */ |
| 73369 | case 405: /* *andsi_2_zext */ |
| 73370 | case 406: /* *andqi_2_maybe_si */ |
| 73371 | case 407: /* *andqi_2 */ |
| 73372 | case 408: /* *andhi_2 */ |
| 73373 | case 409: /* *andsi_2 */ |
| 73374 | case 411: /* andqi_ext_1 */ |
| 73375 | case 412: /* *andqi_ext_1_cc */ |
| 73376 | case 413: /* *andqi_ext_2 */ |
| 73377 | case 423: /* *iorhi_1 */ |
| 73378 | case 424: /* *xorhi_1 */ |
| 73379 | case 425: /* *iorsi_1 */ |
| 73380 | case 426: /* *xorsi_1 */ |
| 73381 | case 427: /* *iordi_1 */ |
| 73382 | case 428: /* *xordi_1 */ |
| 73383 | case 429: /* *iorsi_1_zext */ |
| 73384 | case 430: /* *xorsi_1_zext */ |
| 73385 | case 431: /* *iorsi_1_zext_imm */ |
| 73386 | case 432: /* *xorsi_1_zext_imm */ |
| 73387 | case 433: /* *iorqi_1 */ |
| 73388 | case 434: /* *xorqi_1 */ |
| 73389 | case 437: /* *iorqi_2 */ |
| 73390 | case 438: /* *xorqi_2 */ |
| 73391 | case 439: /* *iorhi_2 */ |
| 73392 | case 440: /* *xorhi_2 */ |
| 73393 | case 441: /* *iorsi_2 */ |
| 73394 | case 442: /* *xorsi_2 */ |
| 73395 | case 443: /* *iordi_2 */ |
| 73396 | case 444: /* *xordi_2 */ |
| 73397 | case 445: /* *iorsi_2_zext */ |
| 73398 | case 446: /* *xorsi_2_zext */ |
| 73399 | case 447: /* *iorsi_2_zext_imm */ |
| 73400 | case 448: /* *xorsi_2_zext_imm */ |
| 73401 | case 451: /* *iorqi_3 */ |
| 73402 | case 452: /* *xorqi_3 */ |
| 73403 | case 453: /* *iorhi_3 */ |
| 73404 | case 454: /* *xorhi_3 */ |
| 73405 | case 455: /* *iorsi_3 */ |
| 73406 | case 456: /* *xorsi_3 */ |
| 73407 | case 457: /* *iordi_3 */ |
| 73408 | case 458: /* *xordi_3 */ |
| 73409 | case 459: /* *iorqi_ext_1 */ |
| 73410 | case 460: /* *xorqi_ext_1 */ |
| 73411 | case 461: /* *iorqi_ext_2 */ |
| 73412 | case 462: /* *xorqi_ext_2 */ |
| 73413 | case 463: /* *xorqi_ext_1_cc */ |
| 73414 | case 466: /* *negqi2_1 */ |
| 73415 | case 467: /* *neghi2_1 */ |
| 73416 | case 468: /* *negsi2_1 */ |
| 73417 | case 469: /* *negdi2_1 */ |
| 73418 | case 470: /* *negsi2_1_zext */ |
| 73419 | case 471: /* *negqi2_cmpz */ |
| 73420 | case 472: /* *neghi2_cmpz */ |
| 73421 | case 473: /* *negsi2_cmpz */ |
| 73422 | case 474: /* *negdi2_cmpz */ |
| 73423 | case 475: /* *negsi2_cmpz_zext */ |
| 73424 | case 476: /* *negvqi3 */ |
| 73425 | case 477: /* *negvhi3 */ |
| 73426 | case 478: /* *negvsi3 */ |
| 73427 | case 479: /* *negvdi3 */ |
| 73428 | case 503: /* *one_cmplhi2_1 */ |
| 73429 | case 504: /* *one_cmplsi2_1 */ |
| 73430 | case 505: /* *one_cmpldi2_1 */ |
| 73431 | case 506: /* *one_cmplsi2_1_zext */ |
| 73432 | case 507: /* *one_cmplqi2_1 */ |
| 73433 | case 515: /* x86_64_shld */ |
| 73434 | case 516: /* x86_shld */ |
| 73435 | case 521: /* *ashlsi3_1 */ |
| 73436 | case 522: /* *ashldi3_1 */ |
| 73437 | case 524: /* *ashlsi3_1_zext */ |
| 73438 | case 525: /* *ashlhi3_1 */ |
| 73439 | case 526: /* *ashlqi3_1 */ |
| 73440 | case 527: /* *ashlqi3_1_slp */ |
| 73441 | case 528: /* *ashlqi3_cmp */ |
| 73442 | case 529: /* *ashlhi3_cmp */ |
| 73443 | case 530: /* *ashlsi3_cmp */ |
| 73444 | case 531: /* *ashldi3_cmp */ |
| 73445 | case 532: /* *ashlsi3_cmp_zext */ |
| 73446 | case 533: /* *ashlqi3_cconly */ |
| 73447 | case 534: /* *ashlhi3_cconly */ |
| 73448 | case 535: /* *ashlsi3_cconly */ |
| 73449 | case 536: /* *ashldi3_cconly */ |
| 73450 | case 545: /* x86_64_shrd */ |
| 73451 | case 546: /* x86_shrd */ |
| 73452 | case 547: /* ashrdi3_cvt */ |
| 73453 | case 548: /* *ashrsi3_cvt_zext */ |
| 73454 | case 549: /* ashrsi3_cvt */ |
| 73455 | case 554: /* *lshrsi3_1 */ |
| 73456 | case 555: /* *ashrsi3_1 */ |
| 73457 | case 556: /* *lshrdi3_1 */ |
| 73458 | case 557: /* *ashrdi3_1 */ |
| 73459 | case 560: /* *lshrsi3_1_zext */ |
| 73460 | case 561: /* *ashrsi3_1_zext */ |
| 73461 | case 562: /* *lshrqi3_1 */ |
| 73462 | case 563: /* *ashrqi3_1 */ |
| 73463 | case 564: /* *lshrhi3_1 */ |
| 73464 | case 565: /* *ashrhi3_1 */ |
| 73465 | case 566: /* *lshrqi3_1_slp */ |
| 73466 | case 567: /* *ashrqi3_1_slp */ |
| 73467 | case 568: /* *lshrqi3_cmp */ |
| 73468 | case 569: /* *ashrqi3_cmp */ |
| 73469 | case 570: /* *lshrhi3_cmp */ |
| 73470 | case 571: /* *ashrhi3_cmp */ |
| 73471 | case 572: /* *lshrsi3_cmp */ |
| 73472 | case 573: /* *ashrsi3_cmp */ |
| 73473 | case 574: /* *lshrdi3_cmp */ |
| 73474 | case 575: /* *ashrdi3_cmp */ |
| 73475 | case 576: /* *lshrsi3_cmp_zext */ |
| 73476 | case 577: /* *ashrsi3_cmp_zext */ |
| 73477 | case 578: /* *lshrqi3_cconly */ |
| 73478 | case 579: /* *ashrqi3_cconly */ |
| 73479 | case 580: /* *lshrhi3_cconly */ |
| 73480 | case 581: /* *ashrhi3_cconly */ |
| 73481 | case 582: /* *lshrsi3_cconly */ |
| 73482 | case 583: /* *ashrsi3_cconly */ |
| 73483 | case 584: /* *lshrdi3_cconly */ |
| 73484 | case 585: /* *ashrdi3_cconly */ |
| 73485 | case 596: /* *rotlsi3_1 */ |
| 73486 | case 597: /* *rotrsi3_1 */ |
| 73487 | case 598: /* *rotldi3_1 */ |
| 73488 | case 599: /* *rotrdi3_1 */ |
| 73489 | case 601: /* *rotlsi3_1_zext */ |
| 73490 | case 602: /* *rotrsi3_1_zext */ |
| 73491 | case 603: /* *rotlqi3_1 */ |
| 73492 | case 604: /* *rotrqi3_1 */ |
| 73493 | case 605: /* *rotlhi3_1 */ |
| 73494 | case 606: /* *rotrhi3_1 */ |
| 73495 | case 607: /* *rotlqi3_1_slp */ |
| 73496 | case 608: /* *rotrqi3_1_slp */ |
| 73497 | case 660: /* *indirect_jump */ |
| 73498 | case 661: /* *indirect_jump */ |
| 73499 | case 662: /* *tablejump_1 */ |
| 73500 | case 663: /* *tablejump_1 */ |
| 73501 | case 693: /* simple_return_indirect_internal */ |
| 73502 | case 701: /* set_got_offset_rex64 */ |
| 73503 | case 780: /* *bswapsi2_movbe */ |
| 73504 | case 781: /* *bswapdi2_movbe */ |
| 73505 | case 812: /* *fop_sf_comm */ |
| 73506 | case 813: /* *fop_df_comm */ |
| 73507 | case 815: /* *fop_sf_1 */ |
| 73508 | case 816: /* *fop_df_1 */ |
| 73509 | case 817: /* *fop_sf_2_i387 */ |
| 73510 | case 818: /* *fop_df_2_i387 */ |
| 73511 | case 819: /* *fop_sf_2_i387 */ |
| 73512 | case 820: /* *fop_df_2_i387 */ |
| 73513 | case 821: /* *fop_sf_3_i387 */ |
| 73514 | case 822: /* *fop_df_3_i387 */ |
| 73515 | case 823: /* *fop_sf_3_i387 */ |
| 73516 | case 824: /* *fop_df_3_i387 */ |
| 73517 | case 825: /* *fop_df_4_i387 */ |
| 73518 | case 826: /* *fop_df_5_i387 */ |
| 73519 | case 827: /* *fop_df_6_i387 */ |
| 73520 | case 828: /* *fop_xf_comm_i387 */ |
| 73521 | case 829: /* *fop_xf_1_i387 */ |
| 73522 | case 830: /* *fop_xf_2_i387 */ |
| 73523 | case 831: /* *fop_xf_2_i387 */ |
| 73524 | case 832: /* *fop_xf_3_i387 */ |
| 73525 | case 833: /* *fop_xf_3_i387 */ |
| 73526 | case 834: /* *fop_xf_4_i387 */ |
| 73527 | case 835: /* *fop_xf_4_i387 */ |
| 73528 | case 836: /* *fop_xf_5_i387 */ |
| 73529 | case 837: /* *fop_xf_5_i387 */ |
| 73530 | case 838: /* *fop_xf_6_i387 */ |
| 73531 | case 839: /* *fop_xf_6_i387 */ |
| 73532 | case 981: /* *movdfcc_1 */ |
| 73533 | case 982: /* *movsfcc_1_387 */ |
| 73534 | case 993: /* pro_epilogue_adjust_stack_si_add */ |
| 73535 | case 994: /* pro_epilogue_adjust_stack_di_add */ |
| 73536 | case 995: /* pro_epilogue_adjust_stack_si_sub */ |
| 73537 | case 996: /* pro_epilogue_adjust_stack_di_sub */ |
| 73538 | case 1101: /* move_size_reloc_si */ |
| 73539 | case 1102: /* move_size_reloc_di */ |
| 73540 | case 1106: /* *movv8qi_internal */ |
| 73541 | case 1107: /* *movv4hi_internal */ |
| 73542 | case 1108: /* *movv2si_internal */ |
| 73543 | case 1109: /* *movv1di_internal */ |
| 73544 | case 1110: /* *movv2sf_internal */ |
| 73545 | case 1111: /* sse_movntq */ |
| 73546 | case 1136: /* *mmx_concatv2sf */ |
| 73547 | case 1138: /* *vec_extractv2sf_1 */ |
| 73548 | case 1165: /* mmx_ashrv4hi3 */ |
| 73549 | case 1166: /* mmx_ashrv2si3 */ |
| 73550 | case 1167: /* mmx_ashlv4hi3 */ |
| 73551 | case 1168: /* mmx_lshrv4hi3 */ |
| 73552 | case 1169: /* mmx_ashlv2si3 */ |
| 73553 | case 1170: /* mmx_lshrv2si3 */ |
| 73554 | case 1171: /* mmx_ashlv1di3 */ |
| 73555 | case 1172: /* mmx_lshrv1di3 */ |
| 73556 | case 1191: /* mmx_packsswb */ |
| 73557 | case 1192: /* mmx_packssdw */ |
| 73558 | case 1193: /* mmx_packuswb */ |
| 73559 | case 1206: /* *mmx_concatv2si */ |
| 73560 | case 1208: /* *vec_extractv2si_1 */ |
| 73561 | case 1210: /* *mmx_uavgv8qi3 */ |
| 73562 | case 1211: /* *mmx_uavgv4hi3 */ |
| 73563 | case 1212: /* mmx_psadbw */ |
| 73564 | case 1218: /* movv64qi_internal */ |
| 73565 | case 1219: /* movv32qi_internal */ |
| 73566 | case 1220: /* movv16qi_internal */ |
| 73567 | case 1221: /* movv32hi_internal */ |
| 73568 | case 1222: /* movv16hi_internal */ |
| 73569 | case 1223: /* movv8hi_internal */ |
| 73570 | case 1224: /* movv16si_internal */ |
| 73571 | case 1225: /* movv8si_internal */ |
| 73572 | case 1226: /* movv4si_internal */ |
| 73573 | case 1227: /* movv8di_internal */ |
| 73574 | case 1228: /* movv4di_internal */ |
| 73575 | case 1229: /* movv2di_internal */ |
| 73576 | case 1230: /* movv4ti_internal */ |
| 73577 | case 1231: /* movv2ti_internal */ |
| 73578 | case 1232: /* movv1ti_internal */ |
| 73579 | case 1233: /* movv16sf_internal */ |
| 73580 | case 1234: /* movv8sf_internal */ |
| 73581 | case 1235: /* movv4sf_internal */ |
| 73582 | case 1236: /* movv8df_internal */ |
| 73583 | case 1237: /* movv4df_internal */ |
| 73584 | case 1238: /* movv2df_internal */ |
| 73585 | case 1741: /* avx_andnotv8sf3 */ |
| 73586 | case 1742: /* avx_andnotv8sf3_mask */ |
| 73587 | case 1745: /* avx_andnotv4df3 */ |
| 73588 | case 1746: /* avx_andnotv4df3_mask */ |
| 73589 | case 1753: /* *andv8sf3 */ |
| 73590 | case 1754: /* *andv8sf3_mask */ |
| 73591 | case 1755: /* *iorv8sf3 */ |
| 73592 | case 1756: /* *iorv8sf3_mask */ |
| 73593 | case 1757: /* *xorv8sf3 */ |
| 73594 | case 1758: /* *xorv8sf3_mask */ |
| 73595 | case 1765: /* *andv4df3 */ |
| 73596 | case 1766: /* *andv4df3_mask */ |
| 73597 | case 1767: /* *iorv4df3 */ |
| 73598 | case 1768: /* *iorv4df3_mask */ |
| 73599 | case 1769: /* *xorv4df3 */ |
| 73600 | case 1770: /* *xorv4df3_mask */ |
| 73601 | case 2110: /* sse_cvtss2si */ |
| 73602 | case 2111: /* sse_cvtss2si_round */ |
| 73603 | case 2112: /* sse_cvtss2si_2 */ |
| 73604 | case 2116: /* sse_cvttss2si */ |
| 73605 | case 2117: /* sse_cvttss2si_round */ |
| 73606 | case 2201: /* avx512f_vcvtss2usi */ |
| 73607 | case 2202: /* avx512f_vcvtss2usi_round */ |
| 73608 | case 2205: /* avx512f_vcvttss2usi */ |
| 73609 | case 2206: /* avx512f_vcvttss2usi_round */ |
| 73610 | case 2209: /* avx512f_vcvtsd2usi */ |
| 73611 | case 2210: /* avx512f_vcvtsd2usi_round */ |
| 73612 | case 2213: /* avx512f_vcvttsd2usi */ |
| 73613 | case 2214: /* avx512f_vcvttsd2usi_round */ |
| 73614 | case 2217: /* sse2_cvtsd2si */ |
| 73615 | case 2218: /* sse2_cvtsd2si_round */ |
| 73616 | case 2219: /* sse2_cvtsd2si_2 */ |
| 73617 | case 2223: /* sse2_cvttsd2si */ |
| 73618 | case 2224: /* sse2_cvttsd2si_round */ |
| 73619 | case 2422: /* avx_unpckhps256 */ |
| 73620 | case 2423: /* avx_unpckhps256_mask */ |
| 73621 | case 2428: /* avx_unpcklps256 */ |
| 73622 | case 2429: /* avx_unpcklps256_mask */ |
| 73623 | case 2454: /* avx2_vec_dupv8sf */ |
| 73624 | case 2456: /* avx2_vec_dupv8sf_1 */ |
| 73625 | case 2459: /* *vec_concatv2sf_sse4_1 */ |
| 73626 | case 2460: /* *vec_concatv2sf_sse */ |
| 73627 | case 2462: /* vec_setv4si_0 */ |
| 73628 | case 2463: /* vec_setv4sf_0 */ |
| 73629 | case 2511: /* vec_extract_lo_v8si */ |
| 73630 | case 2512: /* vec_extract_lo_v8si_mask */ |
| 73631 | case 2513: /* vec_extract_lo_v8sf */ |
| 73632 | case 2514: /* vec_extract_lo_v8sf_mask */ |
| 73633 | case 2515: /* vec_extract_lo_v8si_maskm */ |
| 73634 | case 2516: /* vec_extract_lo_v8sf_maskm */ |
| 73635 | case 2517: /* vec_extract_hi_v8si_maskm */ |
| 73636 | case 2518: /* vec_extract_hi_v8sf_maskm */ |
| 73637 | case 2519: /* vec_extract_hi_v8si_mask */ |
| 73638 | case 2520: /* vec_extract_hi_v8sf_mask */ |
| 73639 | case 2521: /* vec_extract_hi_v8si */ |
| 73640 | case 2522: /* vec_extract_hi_v8sf */ |
| 73641 | case 2533: /* avx_unpckhpd256 */ |
| 73642 | case 2534: /* avx_unpckhpd256_mask */ |
| 73643 | case 2539: /* *avx_unpcklpd256 */ |
| 73644 | case 2540: /* *avx_unpcklpd256_mask */ |
| 73645 | case 2573: /* avx512vl_vternlogv8si */ |
| 73646 | case 2574: /* avx512vl_vternlogv8si_maskz_1 */ |
| 73647 | case 2579: /* avx512vl_vternlogv4di */ |
| 73648 | case 2580: /* avx512vl_vternlogv4di_maskz_1 */ |
| 73649 | case 2584: /* avx512vl_vternlogv8si_mask */ |
| 73650 | case 2587: /* avx512vl_vternlogv4di_mask */ |
| 73651 | case 2712: /* avx2_interleave_highv4di */ |
| 73652 | case 2713: /* avx2_interleave_highv4di_mask */ |
| 73653 | case 2718: /* avx2_interleave_lowv4di */ |
| 73654 | case 2719: /* avx2_interleave_lowv4di_mask */ |
| 73655 | case 2726: /* sse2_storehpd */ |
| 73656 | case 2728: /* sse2_storelpd */ |
| 73657 | case 2730: /* sse2_loadhpd */ |
| 73658 | case 2731: /* sse2_loadlpd */ |
| 73659 | case 2732: /* sse2_movsd */ |
| 73660 | case 2735: /* vec_concatv2df */ |
| 73661 | case 3384: /* *andnotv16si3 */ |
| 73662 | case 3385: /* *andnotv8di3 */ |
| 73663 | case 3386: /* *andnotv64qi3 */ |
| 73664 | case 3387: /* *andnotv32qi3 */ |
| 73665 | case 3388: /* *andnotv16qi3 */ |
| 73666 | case 3389: /* *andnotv32hi3 */ |
| 73667 | case 3390: /* *andnotv16hi3 */ |
| 73668 | case 3391: /* *andnotv8hi3 */ |
| 73669 | case 3392: /* *andnotv8si3 */ |
| 73670 | case 3393: /* *andnotv4si3 */ |
| 73671 | case 3394: /* *andnotv4di3 */ |
| 73672 | case 3395: /* *andnotv2di3 */ |
| 73673 | case 3397: /* *andnotv8si3_mask */ |
| 73674 | case 3400: /* *andnotv4di3_mask */ |
| 73675 | case 3402: /* *andv16si3 */ |
| 73676 | case 3403: /* andv16si3_mask */ |
| 73677 | case 3404: /* *iorv16si3 */ |
| 73678 | case 3405: /* iorv16si3_mask */ |
| 73679 | case 3406: /* *xorv16si3 */ |
| 73680 | case 3407: /* xorv16si3_mask */ |
| 73681 | case 3408: /* *andv8si3 */ |
| 73682 | case 3409: /* andv8si3_mask */ |
| 73683 | case 3410: /* *iorv8si3 */ |
| 73684 | case 3411: /* iorv8si3_mask */ |
| 73685 | case 3412: /* *xorv8si3 */ |
| 73686 | case 3413: /* xorv8si3_mask */ |
| 73687 | case 3414: /* *andv4si3 */ |
| 73688 | case 3415: /* andv4si3_mask */ |
| 73689 | case 3416: /* *iorv4si3 */ |
| 73690 | case 3417: /* iorv4si3_mask */ |
| 73691 | case 3418: /* *xorv4si3 */ |
| 73692 | case 3419: /* xorv4si3_mask */ |
| 73693 | case 3420: /* *andv8di3 */ |
| 73694 | case 3421: /* andv8di3_mask */ |
| 73695 | case 3422: /* *iorv8di3 */ |
| 73696 | case 3423: /* iorv8di3_mask */ |
| 73697 | case 3424: /* *xorv8di3 */ |
| 73698 | case 3425: /* xorv8di3_mask */ |
| 73699 | case 3426: /* *andv4di3 */ |
| 73700 | case 3427: /* andv4di3_mask */ |
| 73701 | case 3428: /* *iorv4di3 */ |
| 73702 | case 3429: /* iorv4di3_mask */ |
| 73703 | case 3430: /* *xorv4di3 */ |
| 73704 | case 3431: /* xorv4di3_mask */ |
| 73705 | case 3432: /* *andv2di3 */ |
| 73706 | case 3433: /* andv2di3_mask */ |
| 73707 | case 3434: /* *iorv2di3 */ |
| 73708 | case 3435: /* iorv2di3_mask */ |
| 73709 | case 3436: /* *xorv2di3 */ |
| 73710 | case 3437: /* xorv2di3_mask */ |
| 73711 | case 3438: /* *andv64qi3 */ |
| 73712 | case 3439: /* *iorv64qi3 */ |
| 73713 | case 3440: /* *xorv64qi3 */ |
| 73714 | case 3441: /* *andv32qi3 */ |
| 73715 | case 3442: /* *iorv32qi3 */ |
| 73716 | case 3443: /* *xorv32qi3 */ |
| 73717 | case 3444: /* *andv16qi3 */ |
| 73718 | case 3445: /* *iorv16qi3 */ |
| 73719 | case 3446: /* *xorv16qi3 */ |
| 73720 | case 3447: /* *andv32hi3 */ |
| 73721 | case 3448: /* *iorv32hi3 */ |
| 73722 | case 3449: /* *xorv32hi3 */ |
| 73723 | case 3450: /* *andv16hi3 */ |
| 73724 | case 3451: /* *iorv16hi3 */ |
| 73725 | case 3452: /* *xorv16hi3 */ |
| 73726 | case 3453: /* *andv8hi3 */ |
| 73727 | case 3454: /* *iorv8hi3 */ |
| 73728 | case 3455: /* *xorv8hi3 */ |
| 73729 | case 3506: /* avx2_packsswb */ |
| 73730 | case 3507: /* avx2_packsswb_mask */ |
| 73731 | case 3512: /* avx2_packssdw */ |
| 73732 | case 3513: /* avx2_packssdw_mask */ |
| 73733 | case 3518: /* avx2_packuswb */ |
| 73734 | case 3519: /* avx2_packuswb_mask */ |
| 73735 | case 3524: /* avx2_interleave_highv32qi */ |
| 73736 | case 3525: /* avx2_interleave_highv32qi_mask */ |
| 73737 | case 3530: /* avx2_interleave_lowv32qi */ |
| 73738 | case 3531: /* avx2_interleave_lowv32qi_mask */ |
| 73739 | case 3536: /* avx2_interleave_highv16hi */ |
| 73740 | case 3537: /* avx2_interleave_highv16hi_mask */ |
| 73741 | case 3542: /* avx2_interleave_lowv16hi */ |
| 73742 | case 3543: /* avx2_interleave_lowv16hi_mask */ |
| 73743 | case 3546: /* avx2_interleave_highv8si */ |
| 73744 | case 3547: /* avx2_interleave_highv8si_mask */ |
| 73745 | case 3552: /* avx2_interleave_lowv8si */ |
| 73746 | case 3553: /* avx2_interleave_lowv8si_mask */ |
| 73747 | case 3594: /* avx512vl_shuf_i32x4_1 */ |
| 73748 | case 3595: /* avx512vl_shuf_i32x4_1_mask */ |
| 73749 | case 3596: /* avx512vl_shuf_f32x4_1 */ |
| 73750 | case 3597: /* avx512vl_shuf_f32x4_1_mask */ |
| 73751 | case 3604: /* avx2_pshufd_1 */ |
| 73752 | case 3605: /* avx2_pshufd_1_mask */ |
| 73753 | case 3610: /* avx2_pshuflw_1 */ |
| 73754 | case 3611: /* avx2_pshuflw_1_mask */ |
| 73755 | case 3616: /* avx2_pshufhw_1 */ |
| 73756 | case 3617: /* avx2_pshufhw_1_mask */ |
| 73757 | case 3638: /* *vec_extractv2di_1 */ |
| 73758 | case 3639: /* *vec_concatv2si_sse4_1 */ |
| 73759 | case 3640: /* *vec_concatv2si */ |
| 73760 | case 3641: /* *vec_concatv4si */ |
| 73761 | case 3642: /* vec_concatv2di */ |
| 73762 | case 3716: /* avx2_pshufbv32qi3 */ |
| 73763 | case 3717: /* avx2_pshufbv32qi3_mask */ |
| 73764 | case 3721: /* avx2_psignv32qi3 */ |
| 73765 | case 3723: /* avx2_psignv16hi3 */ |
| 73766 | case 3725: /* avx2_psignv8si3 */ |
| 73767 | case 3738: /* *absv32qi2 */ |
| 73768 | case 3741: /* *absv16hi2 */ |
| 73769 | case 3744: /* *absv8si2 */ |
| 73770 | case 3747: /* *absv4di2 */ |
| 73771 | case 3750: /* absv8si2_mask */ |
| 73772 | case 3753: /* absv4di2_mask */ |
| 73773 | case 3757: /* absv32qi2_mask */ |
| 73774 | case 3759: /* absv16hi2_mask */ |
| 73775 | case 3786: /* sse4_1_movntdqa */ |
| 73776 | case 3791: /* avx2_packusdw */ |
| 73777 | case 3792: /* avx2_packusdw_mask */ |
| 73778 | case 3796: /* sse4_1_pblendvb */ |
| 73779 | case 3797: /* sse4_1_pblendw */ |
| 73780 | case 3810: /* sse4_1_sign_extendv8qiv8hi2 */ |
| 73781 | case 3811: /* sse4_1_sign_extendv8qiv8hi2_mask */ |
| 73782 | case 3812: /* sse4_1_zero_extendv8qiv8hi2 */ |
| 73783 | case 3813: /* sse4_1_zero_extendv8qiv8hi2_mask */ |
| 73784 | case 3822: /* sse4_1_sign_extendv4qiv4si2 */ |
| 73785 | case 3823: /* sse4_1_sign_extendv4qiv4si2_mask */ |
| 73786 | case 3824: /* sse4_1_zero_extendv4qiv4si2 */ |
| 73787 | case 3825: /* sse4_1_zero_extendv4qiv4si2_mask */ |
| 73788 | case 3834: /* sse4_1_sign_extendv4hiv4si2 */ |
| 73789 | case 3835: /* sse4_1_sign_extendv4hiv4si2_mask */ |
| 73790 | case 3836: /* sse4_1_zero_extendv4hiv4si2 */ |
| 73791 | case 3837: /* sse4_1_zero_extendv4hiv4si2_mask */ |
| 73792 | case 3846: /* sse4_1_sign_extendv2qiv2di2 */ |
| 73793 | case 3847: /* sse4_1_sign_extendv2qiv2di2_mask */ |
| 73794 | case 3848: /* sse4_1_zero_extendv2qiv2di2 */ |
| 73795 | case 3849: /* sse4_1_zero_extendv2qiv2di2_mask */ |
| 73796 | case 3858: /* sse4_1_sign_extendv2hiv2di2 */ |
| 73797 | case 3859: /* sse4_1_sign_extendv2hiv2di2_mask */ |
| 73798 | case 3860: /* sse4_1_zero_extendv2hiv2di2 */ |
| 73799 | case 3861: /* sse4_1_zero_extendv2hiv2di2_mask */ |
| 73800 | case 3870: /* sse4_1_sign_extendv2siv2di2 */ |
| 73801 | case 3871: /* sse4_1_sign_extendv2siv2di2_mask */ |
| 73802 | case 3872: /* sse4_1_zero_extendv2siv2di2 */ |
| 73803 | case 3873: /* sse4_1_zero_extendv2siv2di2_mask */ |
| 73804 | case 4073: /* avx2_permvarv8si */ |
| 73805 | case 4074: /* avx2_permvarv8si_mask */ |
| 73806 | case 4075: /* avx2_permvarv8sf */ |
| 73807 | case 4076: /* avx2_permvarv8sf_mask */ |
| 73808 | case 4085: /* avx2_permvarv4di */ |
| 73809 | case 4086: /* avx2_permvarv4di_mask */ |
| 73810 | case 4087: /* avx2_permvarv4df */ |
| 73811 | case 4088: /* avx2_permvarv4df_mask */ |
| 73812 | case 4093: /* avx512vl_permvarv32qi */ |
| 73813 | case 4094: /* avx512vl_permvarv32qi_mask */ |
| 73814 | case 4097: /* avx512vl_permvarv16hi */ |
| 73815 | case 4098: /* avx512vl_permvarv16hi_mask */ |
| 73816 | case 4101: /* avx2_permv4di_1 */ |
| 73817 | case 4102: /* avx2_permv4di_1_mask */ |
| 73818 | case 4103: /* avx2_permv4df_1 */ |
| 73819 | case 4104: /* avx2_permv4df_1_mask */ |
| 73820 | case 4109: /* avx2_permv2ti */ |
| 73821 | case 4110: /* avx2_vec_dupv4df */ |
| 73822 | case 4195: /* vec_dupv4sf */ |
| 73823 | case 4196: /* *vec_dupv4si */ |
| 73824 | case 4197: /* *vec_dupv2di */ |
| 73825 | case 4212: /* avx_vbroadcastf128_v32qi */ |
| 73826 | case 4213: /* avx_vbroadcastf128_v16hi */ |
| 73827 | case 4214: /* avx_vbroadcastf128_v8si */ |
| 73828 | case 4215: /* avx_vbroadcastf128_v4di */ |
| 73829 | case 4216: /* avx_vbroadcastf128_v8sf */ |
| 73830 | case 4217: /* avx_vbroadcastf128_v4df */ |
| 73831 | case 4250: /* *avx_vperm_broadcast_v4sf */ |
| 73832 | case 4255: /* *avx_vpermilpv8sf */ |
| 73833 | case 4256: /* *avx_vpermilpv8sf_mask */ |
| 73834 | case 4261: /* *avx_vpermilpv4df */ |
| 73835 | case 4262: /* *avx_vpermilpv4df_mask */ |
| 73836 | case 4267: /* avx_vpermilvarv8sf3 */ |
| 73837 | case 4268: /* avx_vpermilvarv8sf3_mask */ |
| 73838 | case 4273: /* avx_vpermilvarv4df3 */ |
| 73839 | case 4274: /* avx_vpermilvarv4df3_mask */ |
| 73840 | case 4285: /* avx512vl_vpermi2varv8si3 */ |
| 73841 | case 4286: /* avx512vl_vpermi2varv8si3_maskz_1 */ |
| 73842 | case 4287: /* avx512vl_vpermi2varv8sf3 */ |
| 73843 | case 4288: /* avx512vl_vpermi2varv8sf3_maskz_1 */ |
| 73844 | case 4289: /* avx512vl_vpermi2varv4di3 */ |
| 73845 | case 4290: /* avx512vl_vpermi2varv4di3_maskz_1 */ |
| 73846 | case 4291: /* avx512vl_vpermi2varv4df3 */ |
| 73847 | case 4292: /* avx512vl_vpermi2varv4df3_maskz_1 */ |
| 73848 | case 4305: /* avx512vl_vpermi2varv32qi3 */ |
| 73849 | case 4306: /* avx512vl_vpermi2varv32qi3_maskz_1 */ |
| 73850 | case 4309: /* avx512vl_vpermi2varv16hi3 */ |
| 73851 | case 4310: /* avx512vl_vpermi2varv16hi3_maskz_1 */ |
| 73852 | case 4317: /* avx512vl_vpermi2varv8si3_mask */ |
| 73853 | case 4318: /* avx512vl_vpermi2varv8sf3_mask */ |
| 73854 | case 4319: /* avx512vl_vpermi2varv4di3_mask */ |
| 73855 | case 4320: /* avx512vl_vpermi2varv4df3_mask */ |
| 73856 | case 4327: /* avx512vl_vpermi2varv32qi3_mask */ |
| 73857 | case 4329: /* avx512vl_vpermi2varv16hi3_mask */ |
| 73858 | case 4339: /* avx512vl_vpermt2varv8si3 */ |
| 73859 | case 4340: /* avx512vl_vpermt2varv8si3_maskz_1 */ |
| 73860 | case 4341: /* avx512vl_vpermt2varv8sf3 */ |
| 73861 | case 4342: /* avx512vl_vpermt2varv8sf3_maskz_1 */ |
| 73862 | case 4343: /* avx512vl_vpermt2varv4di3 */ |
| 73863 | case 4344: /* avx512vl_vpermt2varv4di3_maskz_1 */ |
| 73864 | case 4345: /* avx512vl_vpermt2varv4df3 */ |
| 73865 | case 4346: /* avx512vl_vpermt2varv4df3_maskz_1 */ |
| 73866 | case 4359: /* avx512vl_vpermt2varv32qi3 */ |
| 73867 | case 4360: /* avx512vl_vpermt2varv32qi3_maskz_1 */ |
| 73868 | case 4363: /* avx512vl_vpermt2varv16hi3 */ |
| 73869 | case 4364: /* avx512vl_vpermt2varv16hi3_maskz_1 */ |
| 73870 | case 4371: /* avx512vl_vpermt2varv8si3_mask */ |
| 73871 | case 4372: /* avx512vl_vpermt2varv8sf3_mask */ |
| 73872 | case 4373: /* avx512vl_vpermt2varv4di3_mask */ |
| 73873 | case 4374: /* avx512vl_vpermt2varv4df3_mask */ |
| 73874 | case 4381: /* avx512vl_vpermt2varv32qi3_mask */ |
| 73875 | case 4383: /* avx512vl_vpermt2varv16hi3_mask */ |
| 73876 | case 4385: /* *avx_vperm2f128v8si_full */ |
| 73877 | case 4386: /* *avx_vperm2f128v8sf_full */ |
| 73878 | case 4387: /* *avx_vperm2f128v4df_full */ |
| 73879 | case 4388: /* *avx_vperm2f128v8si_nozero */ |
| 73880 | case 4389: /* *avx_vperm2f128v8sf_nozero */ |
| 73881 | case 4390: /* *avx_vperm2f128v4df_nozero */ |
| 73882 | case 4397: /* vec_set_lo_v4di */ |
| 73883 | case 4398: /* vec_set_lo_v4di_mask */ |
| 73884 | case 4399: /* vec_set_lo_v4df */ |
| 73885 | case 4400: /* vec_set_lo_v4df_mask */ |
| 73886 | case 4401: /* vec_set_hi_v4di */ |
| 73887 | case 4402: /* vec_set_hi_v4di_mask */ |
| 73888 | case 4403: /* vec_set_hi_v4df */ |
| 73889 | case 4404: /* vec_set_hi_v4df_mask */ |
| 73890 | case 4405: /* vec_set_lo_v8si */ |
| 73891 | case 4406: /* vec_set_lo_v8si_mask */ |
| 73892 | case 4407: /* vec_set_lo_v8sf */ |
| 73893 | case 4408: /* vec_set_lo_v8sf_mask */ |
| 73894 | case 4409: /* vec_set_hi_v8si */ |
| 73895 | case 4410: /* vec_set_hi_v8si_mask */ |
| 73896 | case 4411: /* vec_set_hi_v8sf */ |
| 73897 | case 4412: /* vec_set_hi_v8sf_mask */ |
| 73898 | case 4413: /* vec_set_lo_v16hi */ |
| 73899 | case 4414: /* vec_set_hi_v16hi */ |
| 73900 | case 4415: /* vec_set_lo_v32qi */ |
| 73901 | case 4416: /* vec_set_hi_v32qi */ |
| 73902 | case 4419: /* avx_maskloadps256 */ |
| 73903 | case 4420: /* avx_maskloadpd256 */ |
| 73904 | case 4423: /* avx2_maskloadd256 */ |
| 73905 | case 4424: /* avx2_maskloadq256 */ |
| 73906 | case 4427: /* avx_maskstoreps256 */ |
| 73907 | case 4428: /* avx_maskstorepd256 */ |
| 73908 | case 4431: /* avx2_maskstored256 */ |
| 73909 | case 4432: /* avx2_maskstoreq256 */ |
| 73910 | case 4490: /* avx_vec_concatv32qi */ |
| 73911 | case 4491: /* avx_vec_concatv16hi */ |
| 73912 | case 4492: /* avx_vec_concatv8si */ |
| 73913 | case 4493: /* avx_vec_concatv4di */ |
| 73914 | case 4494: /* avx_vec_concatv8sf */ |
| 73915 | case 4495: /* avx_vec_concatv4df */ |
| 73916 | case 4835: /* *avx512bw_dbpsadbwv16hi */ |
| 73917 | case 4836: /* avx512bw_dbpsadbwv16hi_mask */ |
| 73918 | case 4898: /* vpmultishiftqbv32qi */ |
| 73919 | case 4899: /* vpmultishiftqbv32qi_mask */ |
| 73920 | extract_insn_cached (insn); |
| 73921 | if (((cached_type = get_attr_type (insn)) == TYPE_CALL) || (cached_type == TYPE_CALLV)) |
| 73922 | { |
| 73923 | return 1; |
| 73924 | } |
| 73925 | else if ((cached_type == TYPE_PUSH) && (((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) || (cached_memory == MEMORY_UNKNOWN))) |
| 73926 | { |
| 73927 | return 1; |
| 73928 | } |
| 73929 | else if ((cached_type == TYPE_PUSH) && ((cached_memory = get_attr_memory (insn)) == MEMORY_STORE)) |
| 73930 | { |
| 73931 | return 1; |
| 73932 | } |
| 73933 | else if ((cached_type == TYPE_PUSH) && ((cached_memory = get_attr_memory (insn)) == MEMORY_BOTH)) |
| 73934 | { |
| 73935 | return 5; |
| 73936 | } |
| 73937 | else if ((cached_type == TYPE_POP) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 73938 | { |
| 73939 | return 4; |
| 73940 | } |
| 73941 | else if ((cached_type == TYPE_POP) && ((cached_memory = get_attr_memory (insn)) == MEMORY_BOTH)) |
| 73942 | { |
| 73943 | return 4; |
| 73944 | } |
| 73945 | else if (cached_type == TYPE_LEAVE) |
| 73946 | { |
| 73947 | return 1; |
| 73948 | } |
| 73949 | else if ((cached_type == TYPE_IMUL) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 73950 | { |
| 73951 | return 3; |
| 73952 | } |
| 73953 | else if ((cached_type == TYPE_IMUL) && (! ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE))) |
| 73954 | { |
| 73955 | return 7; |
| 73956 | } |
| 73957 | else if ((cached_type == TYPE_IDIV) && ((cached_mode = get_attr_mode (insn)) == MODE_DI) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 73958 | { |
| 73959 | return 41 /* 0x29 */; |
| 73960 | } |
| 73961 | else if ((cached_type == TYPE_IDIV) && ((cached_mode = get_attr_mode (insn)) == MODE_SI) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 73962 | { |
| 73963 | return 25 /* 0x19 */; |
| 73964 | } |
| 73965 | else if ((cached_type == TYPE_IDIV) && ((cached_mode = get_attr_mode (insn)) == MODE_HI) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 73966 | { |
| 73967 | return 17 /* 0x11 */; |
| 73968 | } |
| 73969 | else if ((cached_type == TYPE_IDIV) && ((cached_mode = get_attr_mode (insn)) == MODE_QI) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 73970 | { |
| 73971 | return 12 /* 0xc */; |
| 73972 | } |
| 73973 | else if ((cached_type == TYPE_IDIV) && ((cached_mode = get_attr_mode (insn)) == MODE_DI) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 73974 | { |
| 73975 | return 45 /* 0x2d */; |
| 73976 | } |
| 73977 | else if ((cached_type == TYPE_IDIV) && ((cached_mode = get_attr_mode (insn)) == MODE_SI) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 73978 | { |
| 73979 | return 29 /* 0x1d */; |
| 73980 | } |
| 73981 | else if ((cached_type == TYPE_IDIV) && ((cached_mode = get_attr_mode (insn)) == MODE_HI) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 73982 | { |
| 73983 | return 21 /* 0x15 */; |
| 73984 | } |
| 73985 | else if ((cached_type == TYPE_IDIV) && ((cached_mode = get_attr_mode (insn)) == MODE_QI) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 73986 | { |
| 73987 | return 16 /* 0x10 */; |
| 73988 | } |
| 73989 | else if (((cached_type == TYPE_STR) || (cached_type == TYPE_ISHIFT)) && (((cached_memory = get_attr_memory (insn)) == MEMORY_BOTH) || (cached_memory == MEMORY_STORE))) |
| 73990 | { |
| 73991 | return 6; |
| 73992 | } |
| 73993 | else if (((cached_znver1_decode = get_attr_znver1_decode (insn)) == ZNVER1_DECODE_DOUBLE) && (cached_type == TYPE_IMOVX) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 73994 | { |
| 73995 | return 2; |
| 73996 | } |
| 73997 | else if (((cached_type == TYPE_IMOV) || (cached_type == TYPE_IMOVX)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 73998 | { |
| 73999 | return 1; |
| 74000 | } |
| 74001 | else if ((cached_znver1_decode == ZNVER1_DECODE_DOUBLE) && (cached_type == TYPE_IMOVX) && ((cached_memory = get_attr_memory (insn)) == MEMORY_STORE)) |
| 74002 | { |
| 74003 | return 2; |
| 74004 | } |
| 74005 | else if (((cached_type == TYPE_IMOV) || (cached_type == TYPE_IMOVX)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_STORE)) |
| 74006 | { |
| 74007 | return 1; |
| 74008 | } |
| 74009 | else if ((cached_znver1_decode == ZNVER1_DECODE_DOUBLE) && (cached_type == TYPE_IMOVX) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 74010 | { |
| 74011 | return 5; |
| 74012 | } |
| 74013 | else if (((cached_type == TYPE_IMOV) || (cached_type == TYPE_IMOVX)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 74014 | { |
| 74015 | return 4; |
| 74016 | } |
| 74017 | else if (((cached_type == TYPE_ALU) || (cached_type == TYPE_ICMP) || (cached_type == TYPE_NEGNOT) || (cached_type == TYPE_ROTATE) || (cached_type == TYPE_ROTATE1) || (cached_type == TYPE_ISHIFT) || (cached_type == TYPE_ISHIFT1) || (cached_type == TYPE_TEST) || (cached_type == TYPE_SETCC) || (cached_type == TYPE_INCDEC) || (cached_type == TYPE_ICMOV)) && (((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) || (cached_memory == MEMORY_UNKNOWN))) |
| 74018 | { |
| 74019 | return 1; |
| 74020 | } |
| 74021 | else if (((cached_type == TYPE_ALU) || (cached_type == TYPE_ICMP) || (cached_type == TYPE_NEGNOT) || (cached_type == TYPE_ROTATE) || (cached_type == TYPE_ROTATE1) || (cached_type == TYPE_ISHIFT) || (cached_type == TYPE_ISHIFT1) || (cached_type == TYPE_TEST) || (cached_type == TYPE_SETCC) || (cached_type == TYPE_INCDEC) || (cached_type == TYPE_ICMOV)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 74022 | { |
| 74023 | return 5; |
| 74024 | } |
| 74025 | else if (((cached_type == TYPE_ALU) || (cached_type == TYPE_ICMP) || (cached_type == TYPE_NEGNOT) || (cached_type == TYPE_ROTATE) || (cached_type == TYPE_ROTATE1) || (cached_type == TYPE_ISHIFT1) || (cached_type == TYPE_TEST) || (cached_type == TYPE_SETCC) || (cached_type == TYPE_INCDEC)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_STORE)) |
| 74026 | { |
| 74027 | return 1; |
| 74028 | } |
| 74029 | else if (((cached_type == TYPE_ALU) || (cached_type == TYPE_ICMP) || (cached_type == TYPE_NEGNOT) || (cached_type == TYPE_ROTATE) || (cached_type == TYPE_ROTATE1) || (cached_type == TYPE_ISHIFT1) || (cached_type == TYPE_TEST) || (cached_type == TYPE_SETCC) || (cached_type == TYPE_INCDEC)) && ((cached_memory = get_attr_memory (insn)) == MEMORY_BOTH)) |
| 74030 | { |
| 74031 | return 5; |
| 74032 | } |
| 74033 | else if ((cached_type == TYPE_OTHER) || (cached_type == TYPE_STR) || (cached_type == TYPE_MULTI)) |
| 74034 | { |
| 74035 | return 6; |
| 74036 | } |
| 74037 | else if ((cached_znver1_decode == ZNVER1_DECODE_VECTOR) && (cached_type == TYPE_ALU1) && (((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) || (cached_memory == MEMORY_UNKNOWN))) |
| 74038 | { |
| 74039 | return 3; |
| 74040 | } |
| 74041 | else if ((cached_znver1_decode == ZNVER1_DECODE_DOUBLE) && (cached_type == TYPE_ALU1) && (((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) || (cached_memory == MEMORY_UNKNOWN))) |
| 74042 | { |
| 74043 | return 2; |
| 74044 | } |
| 74045 | else if ((cached_znver1_decode == ZNVER1_DECODE_DIRECT) && (cached_type == TYPE_ALU1) && (((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) || (cached_memory == MEMORY_UNKNOWN))) |
| 74046 | { |
| 74047 | return 1; |
| 74048 | } |
| 74049 | else if ((cached_type == TYPE_IBR) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 74050 | { |
| 74051 | return 1; |
| 74052 | } |
| 74053 | else if ((cached_type == TYPE_IBR) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 74054 | { |
| 74055 | return 6; |
| 74056 | } |
| 74057 | else if (cached_type == TYPE_LEA) |
| 74058 | { |
| 74059 | return 1; |
| 74060 | } |
| 74061 | else if ((((cached_unit = get_attr_unit (insn)) == UNIT_INTEGER) || (cached_unit == UNIT_UNKNOWN)) && (((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) || (cached_memory == MEMORY_UNKNOWN))) |
| 74062 | { |
| 74063 | return 1; |
| 74064 | } |
| 74065 | else if (cached_type == TYPE_FCMOV) |
| 74066 | { |
| 74067 | return 6; |
| 74068 | } |
| 74069 | else if ((cached_znver1_decode == ZNVER1_DECODE_DIRECT) && (cached_type == TYPE_FMOV) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 74070 | { |
| 74071 | return 8; |
| 74072 | } |
| 74073 | else if ((cached_znver1_decode == ZNVER1_DECODE_DIRECT) && (cached_type == TYPE_FMOV) && ((cached_memory = get_attr_memory (insn)) == MEMORY_STORE)) |
| 74074 | { |
| 74075 | return 5; |
| 74076 | } |
| 74077 | else if ((cached_znver1_decode == ZNVER1_DECODE_DOUBLE) && (cached_type == TYPE_FMOV) && ((cached_memory = get_attr_memory (insn)) == MEMORY_NONE)) |
| 74078 | { |
| 74079 | return 4; |
| 74080 | } |
| 74081 | else if ((cached_znver1_decode == ZNVER1_DECODE_DOUBLE) && (cached_type == TYPE_FMOV) && ((cached_memory = get_attr_memory (insn)) == MEMORY_LOAD)) |
| 74082 | { |
| 74083 | return 12 /* 0xc */; |
| 74084 | } |
| 74085 | else if (cached_type == TYPE_FMOV) |
| 74086 | { |
| 74087 | return 1; |
| 74088 | } |
| 74089 | else if ((cached_type == TYPE_FPSPC) && ((cached_memory = get_attr_memory (insn)) == MEMORY_STORE)) |
| 74090 | { |
| 74091 | return 5; |
| 74092 | } |
| 74093 | else if ((cached_znver1_decode == ZNVER1_DECODE_VECTOR) && ((cached_type == TYPE_FPSPC) || (cached_type == TYPE_MMXCVT) || (cached_type == TYPE_SSELOG1) || (cached_type == TYPE_SSEMUL) || (cached_type == TYPE_SSEMOV))) |
| 74094 | { |
| 74095 | return 6; |
| 74096 | } |
| 74097 | else if (cached_type == TYPE_FSGN) |
| 74098 | { |
| 74099 | return 1; |
| 74100 | } |
| 74101 | else if (((cached_memory = get_attr_memory (insn)) == MEMORY_NONE) && (cached_znver1_decode == ZNVER1_DECODE_DOUBLE) && (cached_type == TYPE_FCMP)) |
| 74102 | { |
| 74103 | return 2; |
| 74104 | } |
| 74105 | else if ((cached_memory == MEMORY_NONE) && (cached_znver1_decode == ZNVER1_DECODE_DOUBLE) && (cached_type == TYPE_FCMP)) |
| 74106 | { |
| 74107 | return 9; |
| 74108 | } |
| 74109 | else if (((cached_type == TYPE_FOP) || (cached_type == TYPE_FMUL)) && (cached_memory == MEMORY_NONE)) |
| 74110 | { |
| 74111 | return 5; |
| 74112 | } |
| 74113 | else if (((cached_type == TYPE_FOP) || (cached_type == TYPE_FMUL)) && (cached_memory == MEMORY_LOAD)) |
| 74114 | { |
| 74115 | return 12 /* 0xc */; |
| 74116 | } |
| 74117 | else if (((cached_type == TYPE_FOP) || (cached_type == TYPE_FMUL)) && ((cached_fp_int_src = get_attr_fp_int_src (insn)) == FP_INT_SRC_TRUE) && (cached_memory == MEMORY_LOAD)) |
| 74118 | { |
| 74119 | return 16 /* 0x10 */; |
| 74120 | } |
| 74121 | else if ((cached_type == TYPE_FDIV) && (cached_memory == MEMORY_NONE)) |
| 74122 | { |
| 74123 | return 15 /* 0xf */; |
| 74124 | } |
| 74125 | else if ((cached_type == TYPE_FDIV) && (cached_memory == MEMORY_LOAD)) |
| 74126 | { |
| 74127 | return 22 /* 0x16 */; |
| 74128 | } |
| 74129 | else if (cached_type == TYPE_MMX) |
| 74130 | { |
| 74131 | return 1; |
| 74132 | } |
| 74133 | else if ((cached_type == TYPE_MMXADD) && (cached_memory == MEMORY_NONE)) |
| 74134 | { |
| 74135 | return 1; |
| 74136 | } |
| 74137 | else if ((cached_type == TYPE_MMXADD) && (cached_memory == MEMORY_LOAD)) |
| 74138 | { |
| 74139 | return 8; |
| 74140 | } |
| 74141 | else if ((cached_type == TYPE_MMXCMP) && (cached_memory == MEMORY_NONE)) |
| 74142 | { |
| 74143 | return 1; |
| 74144 | } |
| 74145 | else if ((cached_type == TYPE_MMXCMP) && (cached_memory == MEMORY_LOAD)) |
| 74146 | { |
| 74147 | return 8; |
| 74148 | } |
| 74149 | else if (((cached_type == TYPE_MMXCVT) || (cached_type == TYPE_SSESHUF) || (cached_type == TYPE_SSESHUF1)) && (cached_memory == MEMORY_NONE)) |
| 74150 | { |
| 74151 | return 1; |
| 74152 | } |
| 74153 | else if (((cached_type == TYPE_MMXCVT) || (cached_type == TYPE_SSESHUF) || (cached_type == TYPE_SSESHUF1)) && (cached_memory == MEMORY_LOAD)) |
| 74154 | { |
| 74155 | return 8; |
| 74156 | } |
| 74157 | else if (((cached_type == TYPE_MMXSHFT) || (cached_type == TYPE_MMXMOV)) && (cached_memory == MEMORY_NONE)) |
| 74158 | { |
| 74159 | return 1; |
| 74160 | } |
| 74161 | else if (((cached_type == TYPE_MMXSHFT) || (cached_type == TYPE_MMXMOV)) && (cached_memory == MEMORY_LOAD)) |
| 74162 | { |
| 74163 | return 8; |
| 74164 | } |
| 74165 | else if (((cached_type == TYPE_MMXSHFT) || (cached_type == TYPE_MMXMOV)) && ((cached_memory == MEMORY_STORE) || (cached_memory == MEMORY_BOTH))) |
| 74166 | { |
| 74167 | return 1; |
| 74168 | } |
| 74169 | else if ((cached_type == TYPE_MMXMUL) && (cached_memory == MEMORY_NONE)) |
| 74170 | { |
| 74171 | return 3; |
| 74172 | } |
| 74173 | else if ((cached_type == TYPE_MMXMUL) && (cached_memory == MEMORY_LOAD)) |
| 74174 | { |
| 74175 | return 10 /* 0xa */; |
| 74176 | } |
| 74177 | else if ((((cached_mode = get_attr_mode (insn)) == MODE_V8SF) || (cached_mode == MODE_V4DF) || (cached_mode == MODE_OI)) && (cached_type == TYPE_SSELOG) && (cached_memory == MEMORY_NONE)) |
| 74178 | { |
| 74179 | return 1; |
| 74180 | } |
| 74181 | else if (((cached_mode == MODE_V8SF) || (cached_mode == MODE_V4DF) || (cached_mode == MODE_OI)) && (cached_type == TYPE_SSELOG) && (cached_memory == MEMORY_LOAD)) |
| 74182 | { |
| 74183 | return 8; |
| 74184 | } |
| 74185 | else if ((cached_type == TYPE_SSELOG) && (cached_memory == MEMORY_NONE)) |
| 74186 | { |
| 74187 | return 1; |
| 74188 | } |
| 74189 | else if ((cached_type == TYPE_SSELOG) && (cached_memory == MEMORY_LOAD)) |
| 74190 | { |
| 74191 | return 8; |
| 74192 | } |
| 74193 | else if (((cached_mode == MODE_V8SF) || (cached_mode == MODE_V4DF) || (cached_mode == MODE_OI)) && (cached_type == TYPE_SSELOG1) && (cached_memory == MEMORY_NONE)) |
| 74194 | { |
| 74195 | return 1; |
| 74196 | } |
| 74197 | else if (((cached_mode == MODE_V8SF) || (cached_mode == MODE_V4DF) || (cached_mode == MODE_OI)) && (cached_type == TYPE_SSELOG1) && (! (cached_memory == MEMORY_NONE))) |
| 74198 | { |
| 74199 | return 8; |
| 74200 | } |
| 74201 | else if ((cached_type == TYPE_SSELOG1) && (cached_memory == MEMORY_NONE)) |
| 74202 | { |
| 74203 | return 1; |
| 74204 | } |
| 74205 | else if ((cached_type == TYPE_SSELOG1) && (! (cached_memory == MEMORY_NONE))) |
| 74206 | { |
| 74207 | return 8; |
| 74208 | } |
| 74209 | else if (((cached_mode == MODE_SF) || (cached_mode == MODE_DF) || (cached_mode == MODE_V4SF) || (cached_mode == MODE_V2DF)) && (! ((cached_prefix = get_attr_prefix (insn)) == PREFIX_VEX)) && ((cached_prefix_extra = get_attr_prefix_extra (insn)) == 0) && (cached_type == TYPE_SSECOMI) && (cached_memory == MEMORY_NONE)) |
| 74210 | { |
| 74211 | return 1; |
| 74212 | } |
| 74213 | else if (((cached_mode == MODE_SF) || (cached_mode == MODE_DF) || (cached_mode == MODE_V4SF) || (cached_mode == MODE_V2DF)) && (! ((cached_prefix = get_attr_prefix (insn)) == PREFIX_VEX)) && ((cached_prefix_extra = get_attr_prefix_extra (insn)) == 0) && (cached_type == TYPE_SSECOMI) && (cached_memory == MEMORY_LOAD)) |
| 74214 | { |
| 74215 | return 8; |
| 74216 | } |
| 74217 | else if (((cached_mode == MODE_V4SF) || (cached_mode == MODE_V2DF) || (cached_mode == MODE_TI)) && ((cached_prefix = get_attr_prefix (insn)) == PREFIX_VEX) && ((cached_prefix_extra = get_attr_prefix_extra (insn)) == 0) && (cached_type == TYPE_SSECOMI) && (cached_memory == MEMORY_NONE)) |
| 74218 | { |
| 74219 | return 2; |
| 74220 | } |
| 74221 | else if (((cached_mode == MODE_V4SF) || (cached_mode == MODE_V2DF) || (cached_mode == MODE_TI)) && ((cached_prefix = get_attr_prefix (insn)) == PREFIX_VEX) && ((cached_prefix_extra = get_attr_prefix_extra (insn)) == 0) && (cached_type == TYPE_SSECOMI) && (cached_memory == MEMORY_LOAD)) |
| 74222 | { |
| 74223 | return 10 /* 0xa */; |
| 74224 | } |
| 74225 | else if (((cached_mode == MODE_SF) || (cached_mode == MODE_DF) || (cached_mode == MODE_V4SF) || (cached_mode == MODE_V2DF) || (cached_mode == MODE_TI)) && ((cached_prefix_extra = get_attr_prefix_extra (insn)) == 1) && (cached_type == TYPE_SSECOMI) && (cached_memory == MEMORY_NONE)) |
| 74226 | { |
| 74227 | return 1; |
| 74228 | } |
| 74229 | else if (((cached_mode == MODE_SF) || (cached_mode == MODE_DF) || (cached_mode == MODE_V4SF) || (cached_mode == MODE_V2DF) || (cached_mode == MODE_TI)) && ((cached_prefix_extra = get_attr_prefix_extra (insn)) == 1) && (cached_type == TYPE_SSECOMI) && (cached_memory == MEMORY_LOAD)) |
| 74230 | { |
| 74231 | return 8; |
| 74232 | } |
| 74233 | else if ((cached_mode == MODE_SI) && ((cached_isa = get_attr_isa (insn)) == ISA_AVX) && (cached_type == TYPE_SSEMOV) && (cached_memory == MEMORY_NONE)) |
| 74234 | { |
| 74235 | return 2; |
| 74236 | } |
| 74237 | else if ((cached_mode == MODE_TI) && ((cached_isa = get_attr_isa (insn)) == ISA_AVX) && (cached_type == TYPE_SSEMOV) && (register_operand (operands[1], SImode)) && (cached_memory == MEMORY_NONE)) |
| 74238 | { |
| 74239 | return 2; |
| 74240 | } |
| 74241 | else if (((cached_mode == MODE_SF) || (cached_mode == MODE_DF) || (cached_mode == MODE_V4SF) || (cached_mode == MODE_V2DF) || (cached_mode == MODE_TI)) && (cached_type == TYPE_SSEMOV) && (cached_memory == MEMORY_NONE)) |
| 74242 | { |
| 74243 | return 1; |
| 74244 | } |
| 74245 | else if (((cached_mode == MODE_SF) || (cached_mode == MODE_DF) || (cached_mode == MODE_V4SF) || (cached_mode == MODE_V2DF) || (cached_mode == MODE_TI)) && (cached_type == TYPE_SSEMOV) && (cached_memory == MEMORY_STORE)) |
| 74246 | { |
| 74247 | return 1; |
| 74248 | } |
| 74249 | else if (((cached_mode == MODE_SF) || (cached_mode == MODE_DF) || (cached_mode == MODE_V4SF) || (cached_mode == MODE_V2DF) || (cached_mode == MODE_TI)) && (cached_type == TYPE_SSEMOV) && (cached_memory == MEMORY_LOAD)) |
| 74250 | { |
| 74251 | return 8; |
| 74252 | } |
| 74253 | else if (((cached_mode == MODE_V8SF) || (cached_mode == MODE_V4DF) || (cached_mode == MODE_OI)) && (cached_type == TYPE_SSEMOV) && (cached_memory == MEMORY_NONE)) |
| 74254 | { |
| 74255 | return 1; |
| 74256 | } |
| 74257 | else if (((cached_mode == MODE_V8SF) || (cached_mode == MODE_V4DF) || (cached_mode == MODE_OI)) && (cached_type == TYPE_SSEMOV) && (cached_memory == MEMORY_STORE)) |
| 74258 | { |
| 74259 | return 1; |
| 74260 | } |
| 74261 | else if (((cached_mode == MODE_V8SF) || (cached_mode == MODE_V4DF) || (cached_mode == MODE_OI)) && (cached_type == TYPE_SSEMOV) && (cached_memory == MEMORY_LOAD)) |
| 74262 | { |
| 74263 | return 8; |
| 74264 | } |
| 74265 | else if (((cached_mode == MODE_SF) || (cached_mode == MODE_DF) || (cached_mode == MODE_V4SF) || (cached_mode == MODE_V2DF) || (cached_mode == MODE_TI)) && (cached_type == TYPE_SSEADD) && (cached_memory == MEMORY_NONE)) |
| 74266 | { |
| 74267 | return 3; |
| 74268 | } |
| 74269 | else if (((cached_mode == MODE_SF) || (cached_mode == MODE_DF) || (cached_mode == MODE_V4SF) || (cached_mode == MODE_V2DF) || (cached_mode == MODE_TI)) && (cached_type == TYPE_SSEADD) && (cached_memory == MEMORY_LOAD)) |
| 74270 | { |
| 74271 | return 10 /* 0xa */; |
| 74272 | } |
| 74273 | else if (((cached_mode == MODE_V8SF) || (cached_mode == MODE_V4DF) || (cached_mode == MODE_OI)) && (cached_type == TYPE_SSEADD) && (cached_memory == MEMORY_NONE)) |
| 74274 | { |
| 74275 | return 3; |
| 74276 | } |
| 74277 | else if (((cached_mode == MODE_V8SF) || (cached_mode == MODE_V4DF) || (cached_mode == MODE_OI)) && (cached_type == TYPE_SSEADD) && (cached_memory == MEMORY_LOAD)) |
| 74278 | { |
| 74279 | return 10 /* 0xa */; |
| 74280 | } |
| 74281 | else if (((cached_mode == MODE_SF) || (cached_mode == MODE_DF) || (cached_mode == MODE_V4SF) || (cached_mode == MODE_V2DF)) && (cached_type == TYPE_SSEMULADD) && (cached_memory == MEMORY_NONE)) |
| 74282 | { |
| 74283 | return 5; |
| 74284 | } |
| 74285 | else if (((cached_mode == MODE_SF) || (cached_mode == MODE_DF) || (cached_mode == MODE_V4SF) || (cached_mode == MODE_V2DF)) && (cached_type == TYPE_SSEMULADD) && (cached_memory == MEMORY_LOAD)) |
| 74286 | { |
| 74287 | return 12 /* 0xc */; |
| 74288 | } |
| 74289 | else if (((cached_mode == MODE_V8SF) || (cached_mode == MODE_V4DF)) && (cached_type == TYPE_SSEMULADD) && (cached_memory == MEMORY_NONE)) |
| 74290 | { |
| 74291 | return 5; |
| 74292 | } |
| 74293 | else if (((cached_mode == MODE_V8SF) || (cached_mode == MODE_V4DF)) && (cached_type == TYPE_SSEMULADD) && (cached_memory == MEMORY_LOAD)) |
| 74294 | { |
| 74295 | return 12 /* 0xc */; |
| 74296 | } |
| 74297 | else if (((cached_mode == MODE_DI) || (cached_mode == MODE_TI)) && (cached_type == TYPE_SSEIADD) && (cached_memory == MEMORY_NONE)) |
| 74298 | { |
| 74299 | return 1; |
| 74300 | } |
| 74301 | else if (((cached_mode == MODE_DI) || (cached_mode == MODE_TI)) && (cached_type == TYPE_SSEIADD) && (cached_memory == MEMORY_LOAD)) |
| 74302 | { |
| 74303 | return 8; |
| 74304 | } |
| 74305 | else if ((cached_mode == MODE_OI) && (cached_type == TYPE_SSEIADD) && (cached_memory == MEMORY_NONE)) |
| 74306 | { |
| 74307 | return 1; |
| 74308 | } |
| 74309 | else if ((cached_mode == MODE_OI) && (cached_type == TYPE_SSEIADD) && (cached_memory == MEMORY_LOAD)) |
| 74310 | { |
| 74311 | return 8; |
| 74312 | } |
| 74313 | else if ((cached_mode == MODE_SI) && (cached_type == TYPE_SSEICVT) && (memory_operand (operands[1], SFmode)) && (cached_memory == MEMORY_LOAD)) |
| 74314 | { |
| 74315 | return 12 /* 0xc */; |
| 74316 | } |
| 74317 | else if ((cached_mode == MODE_SI) && (register_operand (operands[1], DFmode)) && (cached_type == TYPE_SSEICVT) && (cached_memory == MEMORY_NONE)) |
| 74318 | { |
| 74319 | return 5; |
| 74320 | } |
| 74321 | else if ((cached_mode == MODE_SI) && (cached_type == TYPE_SSEICVT) && (memory_operand (operands[1], DFmode)) && (cached_memory == MEMORY_LOAD)) |
| 74322 | { |
| 74323 | return 12 /* 0xc */; |
| 74324 | } |
| 74325 | else if ((cached_type == TYPE_SSECVT) && (cached_memory == MEMORY_NONE)) |
| 74326 | { |
| 74327 | return 4; |
| 74328 | } |
| 74329 | else if ((cached_type == TYPE_SSECVT) && (cached_memory == MEMORY_LOAD)) |
| 74330 | { |
| 74331 | return 11 /* 0xb */; |
| 74332 | } |
| 74333 | else if (((cached_mode == MODE_V4SF) || (cached_mode == MODE_SF)) && (cached_type == TYPE_SSEDIV) && (cached_memory == MEMORY_NONE)) |
| 74334 | { |
| 74335 | return 10 /* 0xa */; |
| 74336 | } |
| 74337 | else if (((cached_mode == MODE_V4SF) || (cached_mode == MODE_SF)) && (cached_type == TYPE_SSEDIV) && (cached_memory == MEMORY_LOAD)) |
| 74338 | { |
| 74339 | return 17 /* 0x11 */; |
| 74340 | } |
| 74341 | else if (((cached_mode == MODE_V2DF) || (cached_mode == MODE_DF)) && (cached_type == TYPE_SSEDIV) && (cached_memory == MEMORY_NONE)) |
| 74342 | { |
| 74343 | return 13 /* 0xd */; |
| 74344 | } |
| 74345 | else if (((cached_mode == MODE_V2DF) || (cached_mode == MODE_DF)) && (cached_type == TYPE_SSEDIV) && (cached_memory == MEMORY_LOAD)) |
| 74346 | { |
| 74347 | return 20 /* 0x14 */; |
| 74348 | } |
| 74349 | else if ((cached_mode == MODE_V8SF) && (cached_memory == MEMORY_NONE) && (cached_type == TYPE_SSEDIV)) |
| 74350 | { |
| 74351 | return 12 /* 0xc */; |
| 74352 | } |
| 74353 | else if ((cached_mode == MODE_V8SF) && (cached_type == TYPE_SSEDIV) && (cached_memory == MEMORY_LOAD)) |
| 74354 | { |
| 74355 | return 19 /* 0x13 */; |
| 74356 | } |
| 74357 | else if ((cached_mode == MODE_V4DF) && (cached_type == TYPE_SSEDIV) && (cached_memory == MEMORY_NONE)) |
| 74358 | { |
| 74359 | return 15 /* 0xf */; |
| 74360 | } |
| 74361 | else if ((cached_mode == MODE_V4DF) && (cached_type == TYPE_SSEDIV) && (cached_memory == MEMORY_LOAD)) |
| 74362 | { |
| 74363 | return 22 /* 0x16 */; |
| 74364 | } |
| 74365 | else if (((cached_mode == MODE_V4SF) || (cached_mode == MODE_SF)) && (cached_type == TYPE_SSEMUL) && (cached_memory == MEMORY_NONE)) |
| 74366 | { |
| 74367 | return 3; |
| 74368 | } |
| 74369 | else if (((cached_mode == MODE_V4SF) || (cached_mode == MODE_SF)) && (cached_type == TYPE_SSEMUL) && (cached_memory == MEMORY_LOAD)) |
| 74370 | { |
| 74371 | return 10 /* 0xa */; |
| 74372 | } |
| 74373 | else if ((cached_mode == MODE_V8SF) && (cached_type == TYPE_SSEMUL) && (cached_memory == MEMORY_NONE)) |
| 74374 | { |
| 74375 | return 3; |
| 74376 | } |
| 74377 | else if ((cached_mode == MODE_V8SF) && (cached_type == TYPE_SSEMUL) && (cached_memory == MEMORY_LOAD)) |
| 74378 | { |
| 74379 | return 10 /* 0xa */; |
| 74380 | } |
| 74381 | else if (((cached_mode == MODE_V2DF) || (cached_mode == MODE_DF)) && (cached_type == TYPE_SSEMUL) && (cached_memory == MEMORY_NONE)) |
| 74382 | { |
| 74383 | return 4; |
| 74384 | } |
| 74385 | else if (((cached_mode == MODE_V2DF) || (cached_mode == MODE_DF)) && (cached_type == TYPE_SSEMUL) && (cached_memory == MEMORY_LOAD)) |
| 74386 | { |
| 74387 | return 11 /* 0xb */; |
| 74388 | } |
| 74389 | else if ((cached_mode == MODE_V4DF) && (cached_type == TYPE_SSEMUL) && (cached_memory == MEMORY_NONE)) |
| 74390 | { |
| 74391 | return 5; |
| 74392 | } |
| 74393 | else if ((cached_mode == MODE_V4DF) && (cached_type == TYPE_SSEMUL) && (cached_memory == MEMORY_LOAD)) |
| 74394 | { |
| 74395 | return 12 /* 0xc */; |
| 74396 | } |
| 74397 | else if ((cached_mode == MODE_TI) && (cached_type == TYPE_SSEIMUL) && (cached_memory == MEMORY_NONE)) |
| 74398 | { |
| 74399 | return 3; |
| 74400 | } |
| 74401 | else if ((cached_mode == MODE_OI) && (cached_type == TYPE_SSEIMUL) && (cached_memory == MEMORY_NONE)) |
| 74402 | { |
| 74403 | return 4; |
| 74404 | } |
| 74405 | else if ((cached_mode == MODE_TI) && (cached_type == TYPE_SSEIMUL) && (cached_memory == MEMORY_LOAD)) |
| 74406 | { |
| 74407 | return 10 /* 0xa */; |
| 74408 | } |
| 74409 | else if ((cached_mode == MODE_OI) && (cached_type == TYPE_SSEIMUL) && (cached_memory == MEMORY_LOAD)) |
| 74410 | { |
| 74411 | return 11 /* 0xb */; |
| 74412 | } |
| 74413 | else if ((cached_mode == MODE_DI) && (cached_memory == MEMORY_NONE) && (cached_type == TYPE_SSEIMUL)) |
| 74414 | { |
| 74415 | return 3; |
| 74416 | } |
| 74417 | else if ((cached_mode == MODE_DI) && (cached_type == TYPE_SSEIMUL) && (cached_memory == MEMORY_LOAD)) |
| 74418 | { |
| 74419 | return 10 /* 0xa */; |
| 74420 | } |
| 74421 | else if (((cached_mode == MODE_SF) || (cached_mode == MODE_DF) || (cached_mode == MODE_V4SF) || (cached_mode == MODE_V2DF)) && (cached_type == TYPE_SSECMP) && (cached_memory == MEMORY_NONE)) |
| 74422 | { |
| 74423 | return 1; |
| 74424 | } |
| 74425 | else if (((cached_mode == MODE_SF) || (cached_mode == MODE_DF) || (cached_mode == MODE_V4SF) || (cached_mode == MODE_V2DF)) && (cached_type == TYPE_SSECMP) && (cached_memory == MEMORY_LOAD)) |
| 74426 | { |
| 74427 | return 8; |
| 74428 | } |
| 74429 | else if (((cached_mode == MODE_V8SF) || (cached_mode == MODE_V4DF)) && (cached_type == TYPE_SSECMP) && (cached_memory == MEMORY_NONE)) |
| 74430 | { |
| 74431 | return 1; |
| 74432 | } |
| 74433 | else if (((cached_mode == MODE_V8SF) || (cached_mode == MODE_V4DF)) && (cached_type == TYPE_SSECMP) && (cached_memory == MEMORY_LOAD)) |
| 74434 | { |
| 74435 | return 8; |
| 74436 | } |
| 74437 | else if (((cached_mode == MODE_QI) || (cached_mode == MODE_HI) || (cached_mode == MODE_SI) || (cached_mode == MODE_DI) || (cached_mode == MODE_TI)) && (cached_type == TYPE_SSECMP) && (cached_memory == MEMORY_NONE)) |
| 74438 | { |
| 74439 | return 1; |
| 74440 | } |
| 74441 | else if (((cached_mode == MODE_QI) || (cached_mode == MODE_HI) || (cached_mode == MODE_SI) || (cached_mode == MODE_DI) || (cached_mode == MODE_TI)) && (cached_type == TYPE_SSECMP) && (cached_memory == MEMORY_LOAD)) |
| 74442 | { |
| 74443 | return 8; |
| 74444 | } |
| 74445 | else if ((cached_mode == MODE_OI) && (cached_type == TYPE_SSECMP) && (cached_memory == MEMORY_NONE)) |
| 74446 | { |
| 74447 | return 1; |
| 74448 | } |
| 74449 | else if ((cached_mode == MODE_OI) && (cached_type == TYPE_SSECMP) && (cached_memory == MEMORY_LOAD)) |
| 74450 | { |
| 74451 | return 8; |
| 74452 | } |
| 74453 | else |
| 74454 | { |
| 74455 | return 0; |
| 74456 | } |
| 74457 | |
| 74458 | default: |
| 74459 | return 0; |
| 74460 | |
| 74461 | } |
| 74462 | } |
| 74463 | |
| 74464 | |